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-rw-r--r--www/chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/www/chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h b/www/chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h
index 1d8bace64511..c1bb659b0a23 100644
--- a/www/chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h
+++ b/www/chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h
@@ -1,4 +1,4 @@
---- v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h.orig 2022-08-31 12:19:35 UTC
+--- v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h.orig 2022-09-24 10:57:32 UTC
+++ v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h
@@ -432,7 +432,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst
}
@@ -7,7 +7,7 @@
- Register offset_reg, uint32_t offset_imm,
+ Register offset_reg, uintptr_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
- bool is_load_mem, bool i64_offset) {
+ bool /* is_load_mem */, bool i64_offset) {
// Offsets >=2GB are statically OOB on 32-bit systems.
@@ -508,7 +508,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis
}
@@ -16,18 +16,18 @@
- uint32_t offset_imm, LiftoffRegister src,
+ uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
- uint32_t* protected_store_pc, bool is_store_mem) {
- DCHECK_EQ(type.value_type() == kWasmI64, src.is_gp_pair());
-@@ -576,7 +576,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist
+ uint32_t* protected_store_pc,
+ bool /* is_store_mem */, bool /* i64_offset */) {
+@@ -577,7 +577,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist
}
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
- Register offset_reg, uint32_t offset_imm,
+ Register offset_reg, uintptr_t offset_imm,
- LoadType type, LiftoffRegList pinned) {
+ LoadType type, LiftoffRegList /* pinned */) {
if (type.value() != LoadType::kI64Load) {
Load(dst, src_addr, offset_reg, offset_imm, type, nullptr, true);
-@@ -595,7 +595,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst,
+@@ -596,7 +596,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst,
}
void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
@@ -36,7 +36,7 @@
StoreType type, LiftoffRegList pinned) {
DCHECK_NE(offset_reg, no_reg);
DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
-@@ -935,7 +935,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino
+@@ -936,7 +936,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino
} // namespace liftoff
void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg,
@@ -45,7 +45,7 @@
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
liftoff::AtomicBinop64(this, liftoff::kAdd, dst_addr, offset_reg,
-@@ -948,7 +948,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re
+@@ -949,7 +949,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re
}
void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg,
@@ -54,7 +54,7 @@
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
liftoff::AtomicBinop64(this, liftoff::kSub, dst_addr, offset_reg,
-@@ -960,7 +960,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re
+@@ -961,7 +961,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re
}
void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg,
@@ -63,7 +63,7 @@
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
liftoff::AtomicBinop64(this, liftoff::kAnd, dst_addr, offset_reg,
-@@ -973,7 +973,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re
+@@ -974,7 +974,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re
}
void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg,
@@ -72,7 +72,7 @@
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
liftoff::AtomicBinop64(this, liftoff::kOr, dst_addr, offset_reg, offset_imm,
-@@ -986,7 +986,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg
+@@ -987,7 +987,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg
}
void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg,
@@ -81,7 +81,7 @@
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
liftoff::AtomicBinop64(this, liftoff::kXor, dst_addr, offset_reg,
-@@ -999,7 +999,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re
+@@ -1000,7 +1000,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re
}
void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg,
@@ -90,7 +90,7 @@
LiftoffRegister value,
LiftoffRegister result, StoreType type) {
if (type.value() == StoreType::kI64Store) {
-@@ -1013,7 +1013,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add
+@@ -1014,7 +1014,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add
}
void LiftoffAssembler::AtomicCompareExchange(