diff options
Diffstat (limited to 'www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h')
| -rw-r--r-- | www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h b/www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h index 174870543e59..3dc87904205c 100644 --- a/www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h +++ b/www/qt6-webengine/files/patch-src_3rdparty_chromium_v8_src_wasm_baseline_ia32_liftoff-assembler-ia32.h @@ -1,6 +1,6 @@ ---- src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h.orig 2023-04-05 11:05:06 UTC +--- src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h.orig 2023-09-13 12:11:42 UTC +++ src/3rdparty/chromium/v8/src/wasm/baseline/ia32/liftoff-assembler-ia32.h -@@ -424,7 +424,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst +@@ -491,7 +491,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst } void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, @@ -9,7 +9,7 @@ LoadType type, uint32_t* protected_load_pc, bool /* is_load_mem */, bool /* i64_offset */, bool needs_shift) { -@@ -504,7 +504,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis +@@ -571,7 +571,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis } void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, @@ -18,7 +18,7 @@ StoreType type, LiftoffRegList pinned, uint32_t* protected_store_pc, bool /* is_store_mem */, bool /* i64_offset */) { -@@ -573,7 +573,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist +@@ -651,7 +651,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist } void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, @@ -27,7 +27,7 @@ LoadType type, LiftoffRegList /* pinned */, bool /* i64_offset */) { if (type.value() != LoadType::kI64Load) { -@@ -593,7 +593,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, +@@ -671,7 +671,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, } void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, @@ -36,7 +36,7 @@ StoreType type, LiftoffRegList pinned, bool /* i64_offset */) { DCHECK_NE(offset_reg, no_reg); -@@ -663,7 +663,7 @@ enum Binop { kAdd, kSub, kAnd, kOr, kXor, kExchange }; +@@ -741,7 +741,7 @@ enum Binop { kAdd, kSub, kAnd, kOr, kXor, kExchange }; inline void AtomicAddOrSubOrExchange32(LiftoffAssembler* lasm, Binop binop, Register dst_addr, Register offset_reg, @@ -45,7 +45,7 @@ LiftoffRegister value, LiftoffRegister result, StoreType type) { DCHECK_EQ(value, result); -@@ -730,7 +730,7 @@ inline void AtomicAddOrSubOrExchange32(LiftoffAssemble +@@ -808,7 +808,7 @@ inline void AtomicAddOrSubOrExchange32(LiftoffAssemble } inline void AtomicBinop32(LiftoffAssembler* lasm, Binop op, Register dst_addr, @@ -54,7 +54,7 @@ LiftoffRegister value, LiftoffRegister result, StoreType type) { DCHECK_EQ(value, result); -@@ -842,7 +842,7 @@ inline void AtomicBinop32(LiftoffAssembler* lasm, Bino +@@ -920,7 +920,7 @@ inline void AtomicBinop32(LiftoffAssembler* lasm, Bino } inline void AtomicBinop64(LiftoffAssembler* lasm, Binop op, Register dst_addr, @@ -63,7 +63,7 @@ LiftoffRegister value, LiftoffRegister result) { // We need {ebx} here, which is the root register. As the root register it // needs special treatment. As we use {ebx} directly in the code below, we -@@ -934,7 +934,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino +@@ -1012,7 +1012,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino } // namespace liftoff void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, @@ -72,7 +72,7 @@ LiftoffRegister result, StoreType type, bool /* i64_offset */) { if (type.value() == StoreType::kI64Store) { -@@ -948,7 +948,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re +@@ -1026,7 +1026,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re } void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, @@ -81,7 +81,7 @@ LiftoffRegister result, StoreType type, bool /* i64_offset */) { if (type.value() == StoreType::kI64Store) { -@@ -961,7 +961,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re +@@ -1039,7 +1039,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re } void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, @@ -90,7 +90,7 @@ LiftoffRegister result, StoreType type, bool /* i64_offset */) { if (type.value() == StoreType::kI64Store) { -@@ -975,7 +975,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re +@@ -1053,7 +1053,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re } void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, @@ -99,7 +99,7 @@ LiftoffRegister result, StoreType type, bool /* i64_offset */) { if (type.value() == StoreType::kI64Store) { -@@ -989,7 +989,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg +@@ -1067,7 +1067,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg } void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, @@ -108,7 +108,7 @@ LiftoffRegister result, StoreType type, bool /* i64_offset */) { if (type.value() == StoreType::kI64Store) { -@@ -1003,7 +1003,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re +@@ -1081,7 +1081,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re } void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, @@ -117,7 +117,7 @@ LiftoffRegister value, LiftoffRegister result, StoreType type, bool /* i64_offset */) { -@@ -1018,7 +1018,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add +@@ -1096,7 +1096,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add } void LiftoffAssembler::AtomicCompareExchange( |