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authorKirill Ponomarev <krion@FreeBSD.org>2004-03-18 22:19:00 +0000
committerKirill Ponomarev <krion@FreeBSD.org>2004-03-18 22:19:00 +0000
commita0d455de93e7e021744b578195e83290a7c650bb (patch)
treec3d85a588e26ab4ea8724d102a092b3817857a89
parentf1f3aad0f73ae16c97f479e68b8e317fa620dabc (diff)
downloadports-a0d455de93e7e021744b578195e83290a7c650bb.tar.gz
ports-a0d455de93e7e021744b578195e83290a7c650bb.zip
Notes
-rw-r--r--cad/iverilog/Makefile5
-rw-r--r--cad/iverilog/distinfo3
2 files changed, 4 insertions, 4 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile
index 08521e758260..2f4fe2e4635f 100644
--- a/cad/iverilog/Makefile
+++ b/cad/iverilog/Makefile
@@ -7,11 +7,10 @@
#
PORTNAME= iverilog
-PORTVERSION= 0.7.20031202
-PORTREVISION= 1
+PORTVERSION= 0.7.20040220
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
-DISTNAME= verilog-20031202
+DISTNAME= verilog-20040220
MAINTAINER= watchman@ludd.luth.se
COMMENT= A Verilog simulation and synthesis tool
diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo
index 79f67819869f..1030f8c3da09 100644
--- a/cad/iverilog/distinfo
+++ b/cad/iverilog/distinfo
@@ -1 +1,2 @@
-MD5 (verilog-20031202.tar.gz) = 14401d3da60ee3da3043523684fbb442
+MD5 (verilog-20040220.tar.gz) = 208d579866e9904a385296220104dcb2
+SIZE (verilog-20040220.tar.gz) = 1354505