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| author | Danilo Egea Gondolfo <danilo@FreeBSD.org> | 2018-02-18 22:19:11 +0000 |
|---|---|---|
| committer | Danilo Egea Gondolfo <danilo@FreeBSD.org> | 2018-02-18 22:19:11 +0000 |
| commit | fef31dc2450dc1cc89d12e43c0a347e9679bb42b (patch) | |
| tree | 28de10304c15ee828739498b2b7ce20911aa5187 /cad/irsim/Makefile | |
| parent | c28aa17db270e870f6d4001eebb4b1a4ee74a771 (diff) | |
| download | ports-fef31dc2450dc1cc89d12e43c0a347e9679bb42b.tar.gz ports-fef31dc2450dc1cc89d12e43c0a347e9679bb42b.zip | |
Notes
Diffstat (limited to 'cad/irsim/Makefile')
| -rw-r--r-- | cad/irsim/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/irsim/Makefile b/cad/irsim/Makefile index 0a5694ad769c..4d8b7bd46450 100644 --- a/cad/irsim/Makefile +++ b/cad/irsim/Makefile @@ -2,7 +2,7 @@ # $FreeBSD$ PORTNAME= irsim -PORTVERSION= 9.7.98 +PORTVERSION= 9.7.100 CATEGORIES= cad MASTER_SITES= http://opencircuitdesign.com/irsim/archive/ |