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authorMark Linimon <linimon@FreeBSD.org>2003-12-17 16:02:50 +0000
committerMark Linimon <linimon@FreeBSD.org>2003-12-17 16:02:50 +0000
commit4805bf3d84ba064796fcaa9a3870afe3fe1ba365 (patch)
tree50d02062db46443032904134f207720485ba8bbb /cad/iverilog/Makefile
parent130380dc86f94a3c1145b7ad722624d51790693a (diff)
downloadports-4805bf3d84ba064796fcaa9a3870afe3fe1ba365.tar.gz
ports-4805bf3d84ba064796fcaa9a3870afe3fe1ba365.zip
Notes
Diffstat (limited to 'cad/iverilog/Makefile')
-rw-r--r--cad/iverilog/Makefile16
1 files changed, 10 insertions, 6 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile
index e805d41232e4..d52bdbf98235 100644
--- a/cad/iverilog/Makefile
+++ b/cad/iverilog/Makefile
@@ -7,20 +7,24 @@
#
PORTNAME= iverilog
-PORTVERSION= 0.7.20031009
+PORTVERSION= 0.7.20031202
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
-DISTNAME= verilog-20031009
+DISTNAME= verilog-20031202
MAINTAINER= watchman@ludd.luth.se
COMMENT= A Verilog simulation and synthesis tool
-BROKEN= "fails to compile - missing definition of TIME_FMT"
-
USE_BISON= yes
USE_GMAKE= yes
GNU_CONFIGURE= yes
-MAN1= iverilog-vpi.1 iverilog.1 vvp.1
+MAN1= iverilog-vpi.1 iverilog.1 vvp.1 iverilog-fpga.1
+
+.include <bsd.port.pre.mk>
+
+.if ${OSVERSION} <= 500000
+BROKEN= "Does not install on FreeBSD ${OSVERSION}"
+.endif
-.include <bsd.port.mk>
+.include <bsd.port.post.mk>