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authorMark Linimon <linimon@FreeBSD.org>2006-09-06 01:56:59 +0000
committerMark Linimon <linimon@FreeBSD.org>2006-09-06 01:56:59 +0000
commitc08034c3ba49a6f905f251429183255e7175d6d5 (patch)
treeda5b45cca31d6aba56d61ad5a34d877fa5644c5f /cad/iverilog
parent6b7655c906bf70e4f2dd92b8c361ac958f622598 (diff)
downloadports-c08034c3ba49a6f905f251429183255e7175d6d5.tar.gz
ports-c08034c3ba49a6f905f251429183255e7175d6d5.zip
Notes
Diffstat (limited to 'cad/iverilog')
-rw-r--r--cad/iverilog/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile
index d3ba518d8539..5305e4663f9d 100644
--- a/cad/iverilog/Makefile
+++ b/cad/iverilog/Makefile
@@ -13,7 +13,7 @@ MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION}/ \
ftp://ftp.geda.seul.org/pub/geda/dist/
DISTNAME= verilog-${PORTVERSION}
-MAINTAINER= watchman@ludd.ltu.se
+MAINTAINER= ports@FreeBSD.org
COMMENT= A Verilog simulation and synthesis tool
USE_BISON= yes