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author | Jimmy Olgeni <olgeni@FreeBSD.org> | 2010-07-30 14:51:37 +0000 |
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committer | Jimmy Olgeni <olgeni@FreeBSD.org> | 2010-07-30 14:51:37 +0000 |
commit | ece96ee943646b70e279738cb0b88a2a2ef956e0 (patch) | |
tree | 49e41da530bef89ee8ff4cdc09ada0d00727b25d /cad/tkgate | |
parent | 2c0c53adc6d8361d3412a2e09a4c37100583e166 (diff) | |
download | ports-ece96ee943646b70e279738cb0b88a2a2ef956e0.tar.gz ports-ece96ee943646b70e279738cb0b88a2a2ef956e0.zip |
Notes
Diffstat (limited to 'cad/tkgate')
-rw-r--r-- | cad/tkgate/pkg-descr | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/tkgate/pkg-descr b/cad/tkgate/pkg-descr index 096406393fe9..da20f774157a 100644 --- a/cad/tkgate/pkg-descr +++ b/cad/tkgate/pkg-descr @@ -5,7 +5,7 @@ design. The simulator can be controlled either interactively or through a simulation script. Memory contents can be loaded from files, and a microcode/macrocode compiler (gmac) is included to create tkgate memory files from a high-level description. The simulator -supports continous simulation, single step simulation (by clock or +supports continuous simulation, single step simulation (by clock or epoch) and breakpoints. Save files are in a Verilog-like format. TkGate also includes a number of tutorial and example circuits which |