19 files changed, 60 insertions, 60 deletions

diff --git a/cad/admesh/pkg-descr b/cad/admesh/pkg-descr
index 7603c257903f..b7413b23a773 100644
--- a/cad/admesh/pkg-descr
+++ b/cad/admesh/pkg-descr
@@ -1,5 +1,5 @@
-ADMesh is a program for processing triangulated solid meshes. Currently, 
-ADMesh only reads the STL file format that is used for rapid prototyping 
+ADMesh is a program for processing triangulated solid meshes. Currently,
+ADMesh only reads the STL file format that is used for rapid prototyping
 applications, although it can write STL, VRML, OFF, and DXF files.
 
 Features
diff --git a/cad/basicdsp/pkg-descr b/cad/basicdsp/pkg-descr
index cc2f315ab266..71abebf19679 100644
--- a/cad/basicdsp/pkg-descr
+++ b/cad/basicdsp/pkg-descr
@@ -2,6 +2,6 @@ BasicDSP is an educational tool that makes it easy to experiment with simple
 Digital Signal Processing algorithms for audio signals. The input can either
 be taken from the sound card, or be a locally generated sine wave, white noise
 or impulse signal. The output is fed to the sound card, as well as to a virtual
-oscilloscope and spectrum analyzer. 
+oscilloscope and spectrum analyzer.
 
 WWW: http://wwwhome.cs.utwente.nl/~ptdeboer/ham/basicdsp/
diff --git a/cad/calculix/pkg-descr b/cad/calculix/pkg-descr
index a942c55144d9..6186cd31b7d8 100644
--- a/cad/calculix/pkg-descr
+++ b/cad/calculix/pkg-descr
@@ -1,17 +1,17 @@
 A Three-Dimensional Structural Finite Element Program
 
 CalculiX Finite Element Models can be build, calculated and
-post-processed. The pre- and post-processor is an interactive 3D-tool 
-using the openGL API. 
+post-processed. The pre- and post-processor is an interactive 3D-tool
+using the openGL API.
 
-Notice: The authors acknowledge that naming conventions and input style 
-formats for CalculiX are based on those used by ABAQUS, a proprietary, 
-general purpose finite element code developed and supported by Hibbitt, 
-Karlsson & Sorensen, Inc (HKS) and are used with kind permission from HKS. 
+Notice: The authors acknowledge that naming conventions and input style
+formats for CalculiX are based on those used by ABAQUS, a proprietary,
+general purpose finite element code developed and supported by Hibbitt,
+Karlsson & Sorensen, Inc (HKS) and are used with kind permission from HKS.
 Results obtained from CalculiX are in no way connected to ABAQUS.
 
 WWW: http://www.calculix.de/
 
-note: By default the single-threaded solver is used, this can be changed 
-by setting the OMP_NUM_THREADS environment variable with the number of 
+note: By default the single-threaded solver is used, this can be changed
+by setting the OMP_NUM_THREADS environment variable with the number of
 processors you want to use.
diff --git a/cad/cider/pkg-descr b/cad/cider/pkg-descr
index bb5355c9e4ba..d3cd59f7521e 100644
--- a/cad/cider/pkg-descr
+++ b/cad/cider/pkg-descr
@@ -1,6 +1,6 @@
 CIDER is a mixed-level circuit and device simulator.  CIDER attempts to
 provide greater simulation accuracy than a stand-alone circuit or device
-simulator can provide.  CIDER is based on the sequential mixed-level 
+simulator can provide.  CIDER is based on the sequential mixed-level
 circuit and device simulator, CODECS.  In common with CODECS, CIDER embeds
 the circuit simulator, SPICE3, which provides circuit simulation
 capabilities, analytical models for semiconductor devices, and an
diff --git a/cad/electric-ng/pkg-descr b/cad/electric-ng/pkg-descr
index 10e5be13374c..2b2b3aa5fdfc 100644
--- a/cad/electric-ng/pkg-descr
+++ b/cad/electric-ng/pkg-descr
@@ -1,8 +1,8 @@
 Electric is a sophisticated electrical CAD system that can handle
 many forms of circuit design, including:
- - Custom IC layout (ASICs) 
- - Schematic drawing 
- - Hardware description language specifications 
+ - Custom IC layout (ASICs)
+ - Schematic drawing
+ - Hardware description language specifications
 
 For real functionality, one should consider installing
 support simulation software such as cad/spice.
diff --git a/cad/electric/pkg-descr b/cad/electric/pkg-descr
index e67c6d20c3f2..1d26add695fa 100644
--- a/cad/electric/pkg-descr
+++ b/cad/electric/pkg-descr
@@ -1,20 +1,20 @@
 Electric is a sophisticated electrical CAD system that can handle
 many forms of circuit design, including:
 
-   Custom IC layout (ASICs) 
-   Schematic drawing 
-   Hardware description language specifications 
-   Electro-mechanical hybrid layout 
+   Custom IC layout (ASICs)
+   Schematic drawing
+   Hardware description language specifications
+   Electro-mechanical hybrid layout
 
 (snip, this is an edited version of Electric's homepage)
 
-Electric handles these file formats: 
+Electric handles these file formats:
 
-   CIF I/O 
-   GDS I/O 
-   VHDL I/O 
-   DXF I/O 
-   PostScript, HPGL, and QuickDraw output 
+   CIF I/O
+   GDS I/O
+   VHDL I/O
+   DXF I/O
+   PostScript, HPGL, and QuickDraw output
 
 For real functionality, one should consider installing
 support simulation software such as cad/spice.
diff --git a/cad/fidocadj/pkg-descr b/cad/fidocadj/pkg-descr
index b748d9096442..625c5db94381 100644
--- a/cad/fidocadj/pkg-descr
+++ b/cad/fidocadj/pkg-descr
@@ -1,6 +1,6 @@
 FidoCadJ is an easy to use graphical editor, with a library of electrical
 symbols and footprints (traditional and SMD). It aims to be an agile and
-effective small EDA tool for hobbyists. 
+effective small EDA tool for hobbyists.
 
 FidoCadJ stores its drawings in a compact text format, practical for the
 copy and paste in newsgroups and forums: this has determined its success
diff --git a/cad/ghdl/pkg-descr b/cad/ghdl/pkg-descr
index 9637021a3679..34345b492634 100644
--- a/cad/ghdl/pkg-descr
+++ b/cad/ghdl/pkg-descr
@@ -5,7 +5,7 @@ and integrated circuits can be described by VHDL, and VHDL  can also be
 used as a general purpose parallel programming language.  GHDL compiles
 VHDL files and creates a binary which simulates the design.
 
-GHDL fully supports IEEE 1076-1987, IEEE 1-76-1993, IEEE 1076-2002 
+GHDL fully supports IEEE 1076-1987, IEEE 1-76-1993, IEEE 1076-2002
 versions of VHDL, and partially IEEE 1076-2008.
 
 WWW: https://sourceforge.net/projects/ghdl-updates/
diff --git a/cad/iverilog/pkg-descr b/cad/iverilog/pkg-descr
index d11b892e0798..2b56cfb04552 100644
--- a/cad/iverilog/pkg-descr
+++ b/cad/iverilog/pkg-descr
@@ -4,12 +4,12 @@ operates as a compiler, compiling source code written in Verilog
 compiler can generate C++ code that is compiled and linked with
 a run time library (called "vvm") then executed as a command to
 run the simulation. For synthesis, the compiler generates netlists
-in the desired format. 
+in the desired format.
 
 The compiler proper is intended to parse and elaborate design
 descriptions written to the IEEE standard IEEE Std 1364-2000. The
 standard proper is due to be release towards the middle of the
 year 2000. This is a fairly large and complex standard, so it will
-take some time for it to get there, but that's the goal. 
+take some time for it to get there, but that's the goal.
 
 WWW: http://iverilog.icarus.com/
diff --git a/cad/jspice3/pkg-descr b/cad/jspice3/pkg-descr
index da0f153e04b7..5c276dc01aae 100644
--- a/cad/jspice3/pkg-descr
+++ b/cad/jspice3/pkg-descr
@@ -7,7 +7,7 @@ features. One added feature is a built-in graphical input front end for
 schematic capture. While displayed, simulations can be run and data
 plotted through this graphical interface.
 
-While not as powerful or as pretty as the Xic graphical interface, it 
+While not as powerful or as pretty as the Xic graphical interface, it
 holds its own in functionality.
 
 A significantly enhanced output plotting capability is provided, and
diff --git a/cad/meshdev/pkg-descr b/cad/meshdev/pkg-descr
index 9196474c09da..0739f49f9aa2 100644
--- a/cad/meshdev/pkg-descr
+++ b/cad/meshdev/pkg-descr
@@ -1,5 +1,5 @@
 MeshDev is a mesh comparison software. It accepts two meshes as input and
-computes the geometrical deviation between the two meshes. 
+computes the geometrical deviation between the two meshes.
 It return numerical values and can optionaly generate visual results (with a
 pseudo-colored mesh corresponding to the measured deviation) in OpenInventor
 format.
diff --git a/cad/p5-GDS2/pkg-descr b/cad/p5-GDS2/pkg-descr
index 05baaf7d02e8..2184d6e5c6db 100644
--- a/cad/p5-GDS2/pkg-descr
+++ b/cad/p5-GDS2/pkg-descr
@@ -1,4 +1,4 @@
-This is GDS2, a module for quickly creating programs to read, 
+This is GDS2, a module for quickly creating programs to read,
 write, and manipulate GDS2 (GDSII) stream files.
 
 WWW: http://search.cpan.org/dist/GDS2/
diff --git a/cad/p5-Verilog-Perl/pkg-descr b/cad/p5-Verilog-Perl/pkg-descr
index dc92d97fe7d4..fa9315cdf53c 100644
--- a/cad/p5-Verilog-Perl/pkg-descr
+++ b/cad/p5-Verilog-Perl/pkg-descr
@@ -1,19 +1,19 @@
-The Verilog-Perl library is a building point for Verilog support in the Perl 
+The Verilog-Perl library is a building point for Verilog support in the Perl
 language. It includes:
 * Verilog::Getopt which parses command line options similar to C++ and VCS.
 * Verilog::Language which knows the language keywords and parses numbers.
-* Verilog::Netlist which builds netlists out of Verilog files. This allows 
+* Verilog::Netlist which builds netlists out of Verilog files. This allows
   easy scripts to determine things such as the hierarchy of modules.
 * Verilog::Parser invokes callbacks for language tokens.
-* Verilog::Preproc preprocesses the language, and allows reading 
+* Verilog::Preproc preprocesses the language, and allows reading
   post-processed files right from Perl without temporary files.
 * vpassert inserts PLIish warnings and assertions for any simulator.
 * vppreproc preprocesses the complete Verilog 2001 and SystemVerilog language.
 * vrename renames and cross-references Verilog symbols. Vrename creates Verilog
-  cross references and makes it easy to rename signal and module names across 
-  multiple files. Vrename uses a simple and efficient three step process. 
-  First, you run vrename to create a list of signals in the design. You then 
-  edit this list, changing as many symbols as you wish. Vrename is then run a 
+  cross references and makes it easy to rename signal and module names across
+  multiple files. Vrename uses a simple and efficient three step process.
+  First, you run vrename to create a list of signals in the design. You then
+  edit this list, changing as many symbols as you wish. Vrename is then run a
   second time to apply the changes.
 
 WWW: http://www.veripool.org/wiki/verilog-perl
diff --git a/cad/pdnmesh/pkg-descr b/cad/pdnmesh/pkg-descr
index b74caf9d06f1..6abd3d2c987e 100644
--- a/cad/pdnmesh/pkg-descr
+++ b/cad/pdnmesh/pkg-descr
@@ -3,15 +3,15 @@ pdnMesh: A finite element program
 
 Copyright (C) 2001-2005 Sarod Yatawatta
 
-pdnMesh is a program that can solve 2D potential problems (Poisson Equation) 
-and eigenvalue problems (Helmholtz Equation) using the Finite Element Method. 
-Common applications occur in electromagnetics, heat flow and fluid dynamics. 
-It can solve problems using both Nodal Based Formulation and Edge Based 
-(Vector) Formulation. 
+pdnMesh is a program that can solve 2D potential problems (Poisson Equation)
+and eigenvalue problems (Helmholtz Equation) using the Finite Element Method.
+Common applications occur in electromagnetics, heat flow and fluid dynamics.
+It can solve problems using both Nodal Based Formulation and Edge Based
+(Vector) Formulation.
 The features of the program are as follows.
     * Automatic mesh generation according to given boundaries.
     * Adaptive and Interactive mesh refinement.
-    * Problem solution using Cholesky Decomposition or Conjugate Gradient 
+    * Problem solution using Cholesky Decomposition or Conjugate Gradient
      Method with sparse storage.
     * Eigenvalue solution using LAPACK.
     * (Optionally) Eigenvalue solution using QR iteration with shifts.
diff --git a/cad/py-lcapy/pkg-descr b/cad/py-lcapy/pkg-descr
index 313b0e40487b..21b41d942797 100644
--- a/cad/py-lcapy/pkg-descr
+++ b/cad/py-lcapy/pkg-descr
@@ -6,5 +6,5 @@ nodal analysis.
 
 Alternatively, Lcapy can analyse networks and circuits formed by
 combining one, two, and (some) three port networks.
- 
+
 WWW: https://github.com/mph-/lcapy
diff --git a/cad/qelectrotech/pkg-descr b/cad/qelectrotech/pkg-descr
index 48c4d8ea436e..950fca987525 100644
--- a/cad/qelectrotech/pkg-descr
+++ b/cad/qelectrotech/pkg-descr
@@ -1,5 +1,5 @@
-QElectroTech is a Qt4 application to design electric diagrams. It uses XML 
-files for elements and diagrams, and includes both a diagram editor and an 
+QElectroTech is a Qt4 application to design electric diagrams. It uses XML
+files for elements and diagrams, and includes both a diagram editor and an
 element editor.
 
 WWW: http://qelectrotech.org/
diff --git a/cad/repsnapper/pkg-descr b/cad/repsnapper/pkg-descr
index 3fb69e7a176f..910c654cfeef 100644
--- a/cad/repsnapper/pkg-descr
+++ b/cad/repsnapper/pkg-descr
@@ -1,5 +1,5 @@
 RepSnapper is a host software for controlling a RepRap 3D printer.  It has a
-3D OpenGL interface, slices objects and calculates the extrusion toolpath. 
+3D OpenGL interface, slices objects and calculates the extrusion toolpath.
 It can manipulate 3D objects and save constellations in STL and AMF format.
 
 WWW: http://reprap.org/wiki/RepSnapper_Manual:Introduction
diff --git a/cad/varkon/pkg-descr b/cad/varkon/pkg-descr
index b4a6da2352a2..d3659075aacd 100644
--- a/cad/varkon/pkg-descr
+++ b/cad/varkon/pkg-descr
@@ -1,12 +1,12 @@
-VARKON can be used as a traditional CAD-system with drafting, modelling 
-and visualization if you want to but the real power of VARKON is in 
-parametric modelling and CAD applications development. VARKON includes 
-interactive parametric modelling in 2D or 3D but also the unique MBS 
+VARKON can be used as a traditional CAD-system with drafting, modelling
+and visualization if you want to but the real power of VARKON is in
+parametric modelling and CAD applications development. VARKON includes
+interactive parametric modelling in 2D or 3D but also the unique MBS
 programming language integrated in the graphical environment.
 
-The system was originally developed by a group at the University of 
-Linkoping in Sweden during 1984-86 under the leadership of Dr. Johan 
-Kjellander who was then the president of Microform AB. From 1986 the 
+The system was originally developed by a group at the University of
+Linkoping in Sweden during 1984-86 under the leadership of Dr. Johan
+Kjellander who was then the president of Microform AB. From 1986 the
 system was owned, marketed and further developed by Microform AB.
 
 WWW: http://varkon.sourceforge.net/
diff --git a/cad/z88/pkg-descr b/cad/z88/pkg-descr
index 232677f2a1d7..f142b4fc3ecc 100644
--- a/cad/z88/pkg-descr
+++ b/cad/z88/pkg-descr
@@ -1,21 +1,21 @@
 What is Z88?
 
 Z88 is a fast, powerful and compact Finite Elements Analysis Program
-especially designed for PCs, workstations and large computers with UNIX 
+especially designed for PCs, workstations and large computers with UNIX
 and PCs with Windows XP/95.
 
 FEATURES
 
 	# Z88 features 20 finite element types.
-	# It covers plane stress, plate bending, axial symmetric 
+	# It covers plane stress, plate bending, axial symmetric
 	structures and spacial structures up to 20-node Serendipity hexahedrons.
 	# Comes with a user-friendly interface (the Z88 Commander).
 	# Has a powerful mesh generator.
 	# Features a DXF converter and two plot programs.
-	# Contains the FEA solver featuring an in-situ Cholesky solver along 
+	# Contains the FEA solver featuring an in-situ Cholesky solver along
 	with the Jennings storage method.
 	# For large structures the new iteration solver is recommended.
-	# The import of COSMOS and NASTRAN files from Pro/ENGINEER (with 
+	# The import of COSMOS and NASTRAN files from Pro/ENGINEER (with
 	option Pro/MECHANICA) is possible.
 
 WWW: http://www.z88.org/