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| author | Renato Botelho <garga@FreeBSD.org> | 2009-05-26 11:54:56 +0000 |
|---|---|---|
| committer | Renato Botelho <garga@FreeBSD.org> | 2009-05-26 11:54:56 +0000 |
| commit | ad8bca908153141eca5402a567d13b4f1a7ee440 (patch) | |
| tree | 9782dce5a370d97b278ad92a2a9259b0893bd9ce /cad | |
| parent | 3c69db4249e3480ed3e458f2cba6e0b2f33ccd4d (diff) | |
| download | ports-ad8bca908153141eca5402a567d13b4f1a7ee440.tar.gz ports-ad8bca908153141eca5402a567d13b4f1a7ee440.zip | |
Notes
Diffstat (limited to 'cad')
| -rw-r--r-- | cad/p5-Verilog-Perl/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile index 16867f033ce2..88882d43e51b 100644 --- a/cad/p5-Verilog-Perl/Makefile +++ b/cad/p5-Verilog-Perl/Makefile @@ -16,6 +16,7 @@ COMMENT= Building point for Verilog support in the Perl language USE_GMAKE= yes USE_PERL5= yes +USE_BISON= yes PERL_CONFIGURE= yes |