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authorGreg Lewis <glewis@FreeBSD.org>2020-03-22 20:32:24 +0000
committerGreg Lewis <glewis@FreeBSD.org>2020-03-22 20:32:24 +0000
commit46a96691cb66c474a1d2acb4a7aa78bd5a6761f8 (patch)
treeff12b85607262dee7976ebd78477f17d6f89f93a /java
parentf6edb11a704d73775c799483449bcdf94a6aeaa9 (diff)
downloadports-46a96691cb66c474a1d2acb4a7aa78bd5a6761f8.tar.gz
ports-46a96691cb66c474a1d2acb4a7aa78bd5a6761f8.zip
Notes
Diffstat (limited to 'java')
-rw-r--r--java/openjdk14/files/patch-src_hotspot_cpu_aarch64_vm__version__aarch64.cpp10
-rw-r--r--java/openjdk14/files/patch-src_hotspot_os__cpu_bsd__aarch64_vm__version__bsd__aarch64.cpp95
2 files changed, 105 insertions, 0 deletions
diff --git a/java/openjdk14/files/patch-src_hotspot_cpu_aarch64_vm__version__aarch64.cpp b/java/openjdk14/files/patch-src_hotspot_cpu_aarch64_vm__version__aarch64.cpp
new file mode 100644
index 000000000000..09ab72295c53
--- /dev/null
+++ b/java/openjdk14/files/patch-src_hotspot_cpu_aarch64_vm__version__aarch64.cpp
@@ -0,0 +1,10 @@
+--- src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
++++ src/hotspot/cpu/aarch64/vm_version_aarch64.cpp
+@@ -35,6 +35,7 @@
+
+ #include OS_HEADER_INLINE(os)
+
++#ifndef BUILTIN_SIM
+ #if defined (__linux__)
+ #include <sys/auxv.h>
+ #include <asm/hwcap.h>
diff --git a/java/openjdk14/files/patch-src_hotspot_os__cpu_bsd__aarch64_vm__version__bsd__aarch64.cpp b/java/openjdk14/files/patch-src_hotspot_os__cpu_bsd__aarch64_vm__version__bsd__aarch64.cpp
new file mode 100644
index 000000000000..b0410f7b9579
--- /dev/null
+++ b/java/openjdk14/files/patch-src_hotspot_os__cpu_bsd__aarch64_vm__version__bsd__aarch64.cpp
@@ -0,0 +1,95 @@
+--- src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp
++++ src/hotspot/os_cpu/bsd_aarch64/vm_version_bsd_aarch64.cpp
+@@ -25,10 +25,10 @@
+
+ #include "precompiled.hpp"
+ #include "runtime/os.hpp"
+-#include "runtime/vm_version.hpp"
++#include "vm_version_aarch64.hpp"
+
+-#if defined (__FreeBSD__)
+ #include <machine/armreg.h>
++#if defined (__FreeBSD__)
+ #include <machine/elf.h>
+ #endif
+
+@@ -76,6 +76,22 @@
+ #define ID_AA64PFR0_AdvSIMD_HP (UL(0x1) << ID_AA64PFR0_AdvSIMD_SHIFT)
+ #endif
+
++#ifndef ID_AA64ISAR0_AES_VAL
++#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
++#endif
++
++#ifndef ID_AA64ISAR0_SHA1_VAL
++#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1
++#endif
++
++#ifndef ID_AA64ISAR0_SHA2_VAL
++#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2
++#endif
++
++#ifndef ID_AA64ISAR0_CRC32_VAL
++#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
++#endif
++
+ #define CPU_IMPL_ARM 0x41
+ #define CPU_IMPL_BROADCOM 0x42
+ #define CPU_IMPL_CAVIUM 0x43
+@@ -186,6 +202,17 @@ const struct cpu_implementers cpu_implementers[] = {
+ CPU_IMPLEMENTER_NONE,
+ };
+
++#ifdef __OpenBSD__
++// READ_SPECIALREG is not available from userland on OpenBSD.
++// Hardcode these values to the "lowest common denominator"
++unsigned long VM_Version::os_get_processor_features() {
++ _cpu = CPU_IMPL_ARM;
++ _model = CPU_PART_CORTEX_A53;
++ _variant = 0;
++ _revision = 0;
++ return HWCAP_ASIMD;
++}
++#else
+ unsigned long VM_Version::os_get_processor_features() {
+ struct cpu_desc cpu_desc[1];
+ struct cpu_desc user_cpu_desc;
+@@ -229,26 +256,26 @@ unsigned long VM_Version::os_get_processor_features() {
+ _model = cpu_desc[cpu].cpu_part_num;
+ _revision = cpu_desc[cpu].cpu_revision;
+
+- id_aa64isar0 = READ_SPECIALREG(ID_AA64ISAR0_EL1);
+- id_aa64pfr0 = READ_SPECIALREG(ID_AA64PFR0_EL1);
++ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
++ id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
+
+- if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_BASE) {
++ if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_BASE) {
+ auxv = auxv | HWCAP_AES;
+ }
+
+- if (ID_AA64ISAR0_AES(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
++ if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL) {
+ auxv = auxv | HWCAP_PMULL;
+ }
+
+- if (ID_AA64ISAR0_SHA1(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
++ if (ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA1_BASE) {
+ auxv = auxv | HWCAP_SHA1;
+ }
+
+- if (ID_AA64ISAR0_SHA2(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE) {
++ if (ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) == ID_AA64ISAR0_SHA2_BASE) {
+ auxv = auxv | HWCAP_SHA2;
+ }
+
+- if (ID_AA64ISAR0_CRC32(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE) {
++ if (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE) {
+ auxv = auxv | HWCAP_CRC32;
+ }
+
+@@ -259,3 +286,4 @@ unsigned long VM_Version::os_get_processor_features() {
+
+ return auxv;
+ }
++#endif