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-rw-r--r--graphics/Makefile1
-rw-r--r--graphics/picturebook/Makefile26
-rw-r--r--graphics/picturebook/distinfo1
-rw-r--r--graphics/picturebook/files/README.FreeBSD39
-rw-r--r--graphics/picturebook/files/patch-aa13
-rw-r--r--graphics/picturebook/files/patch-ab49
-rw-r--r--graphics/picturebook/files/patch-ac30
-rw-r--r--graphics/picturebook/files/patch-ad268
-rw-r--r--graphics/picturebook/files/patch-ae151
-rw-r--r--graphics/picturebook/files/patch-af15
-rw-r--r--graphics/picturebook/files/patch-ag278
-rw-r--r--graphics/picturebook/files/patch-ah89
-rw-r--r--graphics/picturebook/files/patch-ai20
-rw-r--r--graphics/picturebook/pkg-comment1
-rw-r--r--graphics/picturebook/pkg-descr2
-rw-r--r--graphics/picturebook/pkg-plist4
16 files changed, 987 insertions, 0 deletions
diff --git a/graphics/Makefile b/graphics/Makefile
index 7df943c18bcc..d2e81ee2b4c2 100644
--- a/graphics/Makefile
+++ b/graphics/Makefile
@@ -166,6 +166,7 @@
SUBDIR += pgperl
SUBDIR += pgplot
SUBDIR += photopc
+ SUBDIR += picturebook
SUBDIR += piddle
SUBDIR += pixmap
SUBDIR += plasma-kmod
diff --git a/graphics/picturebook/Makefile b/graphics/picturebook/Makefile
new file mode 100644
index 000000000000..5e0e650b96f4
--- /dev/null
+++ b/graphics/picturebook/Makefile
@@ -0,0 +1,26 @@
+# New ports collection Makefile for: pictureboook
+# Date created: 25 December 2000
+# Whom: Takanori Watanabe <takawata@FreeBSD.ORG>
+#
+# $FreeBSD$
+#
+
+PORTNAME= picturebook
+PORTVERSION= 20010422
+CATEGORIES= graphics
+MASTER_SITES= http://samba.org/picturebook/
+DISTNAME= capture
+EXTRACT_SUFX= .tgz
+
+MAINTAINER= alan@clegg.com
+
+WRKSRC= ${WRKDIR}/picturebook
+USE_IMLIB=yes
+do-install:
+ ${INSTALL_PROGRAM} ${WRKSRC}/capture ${PREFIX}/bin/capture
+ ${MKDIR} ${PREFIX}/share/doc/picturebook
+ ${INSTALL_MAN} ${WRKSRC}/README ${PREFIX}/share/doc/picturebook/README
+.if!defined(NOPORTDOCS)
+ ${INSTALL_MAN} ${PATCHDIR}/README.FreeBSD ${PREFIX}/share/doc/picturebook/README.FreeBSD
+.endif
+.include <bsd.port.mk>
diff --git a/graphics/picturebook/distinfo b/graphics/picturebook/distinfo
new file mode 100644
index 000000000000..9552c4b8048c
--- /dev/null
+++ b/graphics/picturebook/distinfo
@@ -0,0 +1 @@
+MD5 (capture.tgz) = b2120abca5bd5dafac603578055415ab
diff --git a/graphics/picturebook/files/README.FreeBSD b/graphics/picturebook/files/README.FreeBSD
new file mode 100644
index 000000000000..f53345ffd4b3
--- /dev/null
+++ b/graphics/picturebook/files/README.FreeBSD
@@ -0,0 +1,39 @@
+Work memo
+Modified File:
+sonypi.c: Add OUT[BW] function. the order of the argument of these function
+ is different between in Linux and in FreeBSD.Replaced out[bw] into
+ OUT[BW].
+ Add iopl compatibility shim.(by open/close /dev/io)
+capture.c: Delete getopt_long and use getopt instead.
+ Change type of signal handler.
+ptable.c: Change memalign to malloc.Because memalign(PAGE_SIZE,size)==
+ valloc(size) and valloc is obsoleted in FreeBSD by malloc(3).
+
+Added File:
+pci.h: From Linux kernel. and removed needless description.All I need is
+ register definition.
+pci_freebsd.c: Substantially rewrtten version of pci.c
+
+***************************IMPORTANT********************************
+*I don't recieve question about this code. All I can say is *
+*that this can be compiled and pci device probe routine and 32 bit *
+*configuration space reading routine is working. *
+* Takanori Watanabe *
+***************************IMPORTANT********************************
+----
+Original code was designed for Linux by Andrew Tridgell <tridge@linuxcare.com>.
+See README file for details.
+
+Port for FreeBSD was done by Takanori Watanabe of Kobe Univ, in July 2000,
+as described in README.fbsdport. Since then, original Linux code has been
+revised.
+
+I, Noriyuki Takahashi <nrt@exa.onlab.ntt.co.jp>, merged Watanabe's
+modification for FreeBSD into newer code (of 30 Octover 2000 version or like)
+for Linux. The merged code is O.K. on my VAIO PCS-C1VJ running
+FreeBSD 5.0-current.
+
+Noriyuki Takahashi <nrt@exa.onlab.ntt.co.jp>
+2 November 2000
+
+
diff --git a/graphics/picturebook/files/patch-aa b/graphics/picturebook/files/patch-aa
new file mode 100644
index 000000000000..399cd3aed5a6
--- /dev/null
+++ b/graphics/picturebook/files/patch-aa
@@ -0,0 +1,13 @@
+--- ../picturebook.orig/Makefile Mon Apr 23 23:33:16 2001
++++ Makefile Mon Apr 23 23:35:31 2001
+@@ -1,5 +1,9 @@
+ CFLAGS = -DWITH_DISPLAY=1 -Wall -O2 -g -I/usr/X11R6/include -I/usr/local/include
+-SRC = mchip.c capture.c dump.c sonypi.c pci.c yuv.c timer.c avi.c command.c display.c ptable.c jpeg.c
++SRCMI = mchip.c capture.c dump.c sonypi.c yuv.c timer.c avi.c command.c display.c ptable.c jpeg.c
++#LINUX
++#SRCMD = pci.c
++SRCMD = pci_freebsd.c
++SRC = ${SRCMI} ${SRCMD}
+ OBJ = $(SRC:.c=.o)
+ LIBS = `imlib-config --libs`
+
diff --git a/graphics/picturebook/files/patch-ab b/graphics/picturebook/files/patch-ab
new file mode 100644
index 000000000000..e84520095079
--- /dev/null
+++ b/graphics/picturebook/files/patch-ab
@@ -0,0 +1,49 @@
+--- ../picturebook.old/capture.c Mon Dec 25 19:01:43 2000
++++ capture.c Mon Dec 25 19:03:16 2000
+@@ -39,7 +39,7 @@
+ }
+ }
+
+-static void sigint(void)
++static void sigint(int dummy)
+ {
+ spic_shutdown(0);
+ _exit(1);
+@@ -81,6 +81,7 @@
+
+ static char *short_options = "to:hPV:4Odvr:sjq:";
+
++#ifdef HAVE_GETOPT_LONG_H
+ static struct option long_options[] = {
+ {"help", 0, 0, 'h'},
+ {"version", 0, 0, OPT_VERSION},
+@@ -93,6 +94,7 @@
+ {"agc", 1, 0, OPT_AGC},
+ {"explode", 1, 0, OPT_EXPLODE},
+ {0, 0, 0, 0}};
++#endif
+
+ int main(int argc, char *argv[])
+ {
+@@ -108,15 +110,20 @@
+ int snap=0;
+ int subsample=0;
+ int test=0;
++#ifdef HAVE_GETOPT_LONG_H
+ int option_index;
++#endif
+ int spic_brightness=32, spic_contrast=32, spic_hue=32, spic_color=32, spic_sharpness=32;
+ int spic_agc=48, spic_picture=0;
+ double framerate=0;
+
+ setlinebuf(stdout);
+-
++#ifdef HAVE_GETOPT_LONG_H
+ while ((c = getopt_long(argc, argv,
+ short_options, long_options, &option_index)) != -1) {
++#else
++ while ((c = getopt(argc, argv, short_options)) != -1) {
++#endif
+ switch (c) {
+ default:
+ case OPT_VERSION:
diff --git a/graphics/picturebook/files/patch-ac b/graphics/picturebook/files/patch-ac
new file mode 100644
index 000000000000..b7b64fa6f4c9
--- /dev/null
+++ b/graphics/picturebook/files/patch-ac
@@ -0,0 +1,30 @@
+--- ../picturebook.old/capture.h Mon Dec 25 19:01:43 2000
++++ capture.h Mon Dec 25 19:03:17 2000
+@@ -21,15 +21,28 @@
+ #include <unistd.h>
+ #include <fcntl.h>
+ #include <errno.h>
++#ifdef LINUX
+ #include <sys/io.h>
++#endif
+ #include <sys/mman.h>
+ #include <dirent.h>
+ #include <ctype.h>
++#ifdef LINUX
+ #include <malloc.h>
++#endif
+ #include <string.h>
+ #include <signal.h>
++#ifdef HAVE_GETOPT_H
+ #include <getopt.h>
++#endif
++#ifdef LINUX
+ #include <linux/pci.h>
++#else ifdef __FreeBSD__
++#include <sys/pciio.h>
++#include "pci.h" /*This is taken from Linux kernel*/
++#define O_SYNC O_FSYNC
++#include <sys/stat.h>
++#endif
+ #include <sys/time.h>
+ #include "mchip.h"
diff --git a/graphics/picturebook/files/patch-ad b/graphics/picturebook/files/patch-ad
new file mode 100644
index 000000000000..d7782d1d4f37
--- /dev/null
+++ b/graphics/picturebook/files/patch-ad
@@ -0,0 +1,268 @@
+--- ../picturebook.old/pci.h Mon Dec 25 19:08:54 2000
++++ pci.h Mon Dec 25 19:03:17 2000
+@@ -0,0 +1,265 @@
++/*
++ * $Id: pci.h,v 1.87 1998/10/11 15:13:12 mj Exp $
++ *
++ * PCI defines and function prototypes
++ * Copyright 1994, Drew Eckhardt
++ * Copyright 1997--1999 Martin Mares <mj@suse.cz>
++ *
++ * For more information, please consult the following manuals (look at
++ * http://www.pcisig.com/ for how to get them):
++ *
++ * PCI BIOS Specification
++ * PCI Local Bus Specification
++ * PCI to PCI Bridge Specification
++ * PCI System Design Guide
++ */
++
++#ifndef LINUX_PCI_H
++#define LINUX_PCI_H
++
++/*
++ * Under PCI, each device has 256 bytes of configuration address space,
++ * of which the first 64 bytes are standardized as follows:
++ */
++#define PCI_VENDOR_ID 0x00 /* 16 bits */
++#define PCI_DEVICE_ID 0x02 /* 16 bits */
++#define PCI_COMMAND 0x04 /* 16 bits */
++#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
++#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
++#define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
++#define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
++#define PCI_COMMAND_INVALIDATE 0x10 /* Use memory write and invalidate */
++#define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
++#define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
++#define PCI_COMMAND_WAIT 0x80 /* Enable address/data stepping */
++#define PCI_COMMAND_SERR 0x100 /* Enable SERR */
++#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
++
++#define PCI_STATUS 0x06 /* 16 bits */
++#define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */
++#define PCI_STATUS_66MHZ 0x20 /* Support 66 Mhz PCI 2.1 bus */
++#define PCI_STATUS_UDF 0x40 /* Support User Definable Features [obsolete] */
++#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
++#define PCI_STATUS_PARITY 0x100 /* Detected parity error */
++#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */
++#define PCI_STATUS_DEVSEL_FAST 0x000
++#define PCI_STATUS_DEVSEL_MEDIUM 0x200
++#define PCI_STATUS_DEVSEL_SLOW 0x400
++#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
++#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
++#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
++#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
++#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
++
++#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8
++ revision */
++#define PCI_REVISION_ID 0x08 /* Revision ID */
++#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
++#define PCI_CLASS_DEVICE 0x0a /* Device class */
++
++#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
++#define PCI_LATENCY_TIMER 0x0d /* 8 bits */
++#define PCI_HEADER_TYPE 0x0e /* 8 bits */
++#define PCI_HEADER_TYPE_NORMAL 0
++#define PCI_HEADER_TYPE_BRIDGE 1
++#define PCI_HEADER_TYPE_CARDBUS 2
++
++#define PCI_BIST 0x0f /* 8 bits */
++#define PCI_BIST_CODE_MASK 0x0f /* Return result */
++#define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */
++#define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */
++
++/*
++ * Base addresses specify locations in memory or I/O space.
++ * Decoded size can be determined by writing a value of
++ * 0xffffffff to the register, and reading it back. Only
++ * 1 bits are decoded.
++ */
++#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
++#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
++#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
++#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
++#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
++#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
++#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
++#define PCI_BASE_ADDRESS_SPACE_IO 0x01
++#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
++#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
++#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */
++#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */
++#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
++#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
++#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
++#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL)
++/* bit 1 is reserved if address_space = 1 */
++
++/* Header type 0 (normal devices) */
++#define PCI_CARDBUS_CIS 0x28
++#define PCI_SUBSYSTEM_VENDOR_ID 0x2c
++#define PCI_SUBSYSTEM_ID 0x2e
++#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
++#define PCI_ROM_ADDRESS_ENABLE 0x01
++#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
++
++#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
++
++/* 0x35-0x3b are reserved */
++#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
++#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
++#define PCI_MIN_GNT 0x3e /* 8 bits */
++#define PCI_MAX_LAT 0x3f /* 8 bits */
++
++/* Header type 1 (PCI-to-PCI bridges) */
++#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
++#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
++#define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */
++#define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */
++#define PCI_IO_BASE 0x1c /* I/O range behind the bridge */
++#define PCI_IO_LIMIT 0x1d
++#define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */
++#define PCI_IO_RANGE_TYPE_16 0x00
++#define PCI_IO_RANGE_TYPE_32 0x01
++#define PCI_IO_RANGE_MASK ~0x0f
++#define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
++#define PCI_MEMORY_BASE 0x20 /* Memory range behind */
++#define PCI_MEMORY_LIMIT 0x22
++#define PCI_MEMORY_RANGE_TYPE_MASK 0x0f
++#define PCI_MEMORY_RANGE_MASK ~0x0f
++#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
++#define PCI_PREF_MEMORY_LIMIT 0x26
++#define PCI_PREF_RANGE_TYPE_MASK 0x0f
++#define PCI_PREF_RANGE_TYPE_32 0x00
++#define PCI_PREF_RANGE_TYPE_64 0x01
++#define PCI_PREF_RANGE_MASK ~0x0f
++#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */
++#define PCI_PREF_LIMIT_UPPER32 0x2c
++#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */
++#define PCI_IO_LIMIT_UPPER16 0x32
++/* 0x34 same as for htype 0 */
++/* 0x35-0x3b is reserved */
++#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */
++/* 0x3c-0x3d are same as for htype 0 */
++#define PCI_BRIDGE_CONTROL 0x3e
++#define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */
++#define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */
++#define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */
++#define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */
++#define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */
++#define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
++#define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */
++
++/* Header type 2 (CardBus bridges) */
++/* 0x14-0x15 reserved */
++#define PCI_CB_SEC_STATUS 0x16 /* Secondary status */
++#define PCI_CB_PRIMARY_BUS 0x18 /* PCI bus number */
++#define PCI_CB_CARD_BUS 0x19 /* CardBus bus number */
++#define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
++#define PCI_CB_LATENCY_TIMER 0x1b /* CardBus latency timer */
++#define PCI_CB_MEMORY_BASE_0 0x1c
++#define PCI_CB_MEMORY_LIMIT_0 0x20
++#define PCI_CB_MEMORY_BASE_1 0x24
++#define PCI_CB_MEMORY_LIMIT_1 0x28
++#define PCI_CB_IO_BASE_0 0x2c
++#define PCI_CB_IO_BASE_0_HI 0x2e
++#define PCI_CB_IO_LIMIT_0 0x30
++#define PCI_CB_IO_LIMIT_0_HI 0x32
++#define PCI_CB_IO_BASE_1 0x34
++#define PCI_CB_IO_BASE_1_HI 0x36
++#define PCI_CB_IO_LIMIT_1 0x38
++#define PCI_CB_IO_LIMIT_1_HI 0x3a
++#define PCI_CB_IO_RANGE_MASK ~0x03
++/* 0x3c-0x3d are same as for htype 0 */
++#define PCI_CB_BRIDGE_CONTROL 0x3e
++#define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge control register */
++#define PCI_CB_BRIDGE_CTL_SERR 0x02
++#define PCI_CB_BRIDGE_CTL_ISA 0x04
++#define PCI_CB_BRIDGE_CTL_VGA 0x08
++#define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
++#define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */
++#define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */
++#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for both memory regions */
++#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
++#define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400
++#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
++#define PCI_CB_SUBSYSTEM_ID 0x42
++#define PCI_CB_LEGACY_MODE_BASE 0x44 /* 16-bit PC Card legacy mode base address (ExCa) */
++/* 0x48-0x7f reserved */
++
++/* Capability lists */
++
++#define PCI_CAP_LIST_ID 0 /* Capability ID */
++#define PCI_CAP_ID_PM 0x01 /* Power Management */
++#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */
++#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */
++#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */
++#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */
++#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
++#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
++#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
++#define PCI_CAP_SIZEOF 4
++
++/* Power Management Registers */
++
++#define PCI_PM_CAP_VER_MASK 0x0007 /* Version */
++#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */
++#define PCI_PM_CAP_AUX_POWER 0x0010 /* Auxilliary power support */
++#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */
++#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */
++#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */
++#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */
++#define PCI_PM_CTRL 4 /* PM control and status register */
++#define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */
++#define PCI_PM_CTRL_PME_ENABLE 0x0100 /* PME pin enable */
++#define PCI_PM_CTRL_DATA_SEL_MASK 0x1e00 /* Data select (??) */
++#define PCI_PM_CTRL_DATA_SCALE_MASK 0x6000 /* Data scale (??) */
++#define PCI_PM_CTRL_PME_STATUS 0x8000 /* PME pin status */
++#define PCI_PM_PPB_EXTENSIONS 6 /* PPB support extensions (??) */
++#define PCI_PM_PPB_B2_B3 0x40 /* Stop clock when in D3hot (??) */
++#define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */
++#define PCI_PM_DATA_REGISTER 7 /* (??) */
++#define PCI_PM_SIZEOF 8
++
++/* AGP registers */
++
++#define PCI_AGP_VERSION 2 /* BCD version number */
++#define PCI_AGP_RFU 3 /* Rest of capability flags */
++#define PCI_AGP_STATUS 4 /* Status register */
++#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */
++#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */
++#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */
++#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */
++#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */
++#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */
++#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */
++#define PCI_AGP_COMMAND 8 /* Control register */
++#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */
++#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */
++#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */
++#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */
++#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */
++#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */
++#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 4x rate */
++#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 4x rate */
++#define PCI_AGP_SIZEOF 12
++
++/* Slot Identification */
++
++#define PCI_SID_ESR 2 /* Expansion Slot Register */
++#define PCI_SID_ESR_NSLOTS 0x1f /* Number of expansion slots available */
++#define PCI_SID_ESR_FIC 0x20 /* First In Chassis Flag */
++#define PCI_SID_CHASSIS_NR 3 /* Chassis Number */
++
++/* Message Signalled Interrupts registers */
++
++#define PCI_MSI_FLAGS 2 /* Various flags */
++#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */
++#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */
++#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */
++#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */
++#define PCI_MSI_RFU 3 /* Rest of capability flags */
++#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */
++#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
++#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */
++#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */
++
++#endif
diff --git a/graphics/picturebook/files/patch-ae b/graphics/picturebook/files/patch-ae
new file mode 100644
index 000000000000..dfb91c82e75f
--- /dev/null
+++ b/graphics/picturebook/files/patch-ae
@@ -0,0 +1,151 @@
+--- ../picturebook.old/pci_freebsd.c Mon Dec 25 19:09:23 2000
++++ pci_freebsd.c Mon Dec 25 19:03:20 2000
+@@ -0,0 +1,148 @@
++/* manipulate PCI devices from user space
++
++ Tridge, July 2000
++*/
++/*
++ Copyright (C) Andrew Tridgell 2000
++ Copyright (C) Takanori Watanabe 2000
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program; if not, write to the Free Software
++ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*/
++#include "capture.h"
++#include <sys/types.h>
++#include <sys/pciio.h>
++#include <sys/fcntl.h>
++#define MAX_BUS 8
++
++#define PCI_GETCONF_MATCH_VENDDEV (PCI_GETCONF_MATCH_VENDOR|PCI_GETCONF_MATCH_DEVICE)
++#define MAXHANDLE 32
++
++static struct pci_io pio[MAXHANDLE];
++static u_int32_t handlebmp=0;
++static int pci_fd=-1;
++static int pcifd_internal_init();
++int pcifd_internal_init()
++{
++ return pci_fd=open("/dev/pci",O_RDWR,0);
++}
++/* find a PCI device and return a handle to it */
++int pci_find_device(u32 vendor, u32 device)
++{
++
++ struct pci_conf pc[4];/*I think only one is enough*/
++ struct pci_conf_io pcfi;
++ struct pci_match_conf pmc={{0,0,0},"",0,0xffff,0xffff,0,
++ PCI_GETCONF_MATCH_VENDDEV};
++ int handle;
++ if(pci_fd==-1){
++ if(pcifd_internal_init()==-1)
++ return -1;
++ }
++ pmc.pc_vendor=vendor;
++ pmc.pc_device=device;
++ pcfi.pat_buf_len=sizeof(pmc);
++ pcfi.num_patterns=1;
++ pcfi.patterns=&pmc;
++ pcfi.match_buf_len=sizeof(pc);
++ pcfi.num_matches=0;
++ pcfi.matches=pc;
++ pcfi.offset=0;
++ pcfi.generation=0;
++ ioctl(pci_fd,PCIOCGETCONF,&pcfi);
++ if(pcfi.num_matches==0){
++ goto error;
++ }
++ for(handle=0;handle<32;handle++){
++ if(!(handlebmp&(1<<handle))){
++ pio[handle].pi_sel=pc[0].pc_sel;
++ handlebmp|=(1<<handle);
++ return handle;
++ }
++ }
++ error:
++ close(pci_fd);
++ return -1;
++}
++
++
++/* routines to read and write PCI config space */
++#define PCICFGWACCESSOR(bsize) \
++int pci_config_write_u##bsize(int fd, int ofs, u##bsize v)\
++{\
++ int result;\
++ if(fd==-1){\
++ return -1;\
++ }\
++ if(pci_fd==-1){\
++ if(pcifd_internal_init()==-1)\
++ return -1;\
++ }\
++ pio[fd].pi_reg=ofs;\
++ pio[fd].pi_width=bsize/8;\
++ pio[fd].pi_data=v;\
++ result=ioctl(pci_fd,PCIOCWRITE,&pio[fd]);\
++ return result;\
++}
++PCICFGWACCESSOR(8)
++PCICFGWACCESSOR(16)
++PCICFGWACCESSOR(32)
++#undef PCICFGWACCESSOR
++/*Acctually define
++ pci_config_write_u8();
++ pci_config_write_u16();
++ pci_config_write_u32();
++*/
++#define PCICFGRACCESSOR(bsize) \
++int pci_config_read_u##bsize(int fd, int ofs, u##bsize *v)\
++{\
++ int result;\
++ if(fd==-1){\
++ return -1;\
++ }\
++ if(pci_fd==-1){\
++ if(pcifd_internal_init()==-1)\
++ return -1;\
++ }\
++ pio[fd].pi_reg=ofs;\
++ pio[fd].pi_width=bsize/8;\
++ result=ioctl(pci_fd,PCIOCREAD,&pio[fd]);\
++ *v=pio[fd].pi_data&((bsize==32)? 0xffffffff: (1<<bsize)-1);\
++ return result;\
++}
++/*Acctually define
++ pci_config_read_u8();
++ pci_config_read_u16();
++ pci_config_read_u32();
++*/
++PCICFGRACCESSOR(8)
++PCICFGRACCESSOR(16)
++PCICFGRACCESSOR(32)
++#undef PCICFGRACCESSOR
++
++/* find a pci base address via /proc/bus/pci/devices. This seems to be
++ needed on some boxes. Why? */
++u_int32_t pci_read_base_address(u32 vendor, u32 device)
++{
++ return 0;/* In FreeBSD???*/
++}
++
++
++
++
++
++
++
++
++
diff --git a/graphics/picturebook/files/patch-af b/graphics/picturebook/files/patch-af
new file mode 100644
index 000000000000..eab6008386ea
--- /dev/null
+++ b/graphics/picturebook/files/patch-af
@@ -0,0 +1,15 @@
+--- ../picturebook.old/ptable.c Mon Dec 25 19:01:43 2000
++++ ptable.c Mon Dec 25 19:03:21 2000
+@@ -38,8 +38,11 @@
+ perror("virt_to_phys: open(/dev/mem)");
+ exit(1);
+ }
+-
++#ifdef LINUX
+ vmem = memalign(PAGE_SIZE, (npages+1)*PAGE_SIZE);
++#else __FreeBSD__
++ vmem = malloc((npages+1)*PAGE_SIZE);/*Never mind!PAGESIZE aligned memalign is equivalent to valloc and see valloc(3).*/
++#endif
+ if (!vmem) {
+ printf("failed to allocate ptable\n");
+ exit(1);
diff --git a/graphics/picturebook/files/patch-ag b/graphics/picturebook/files/patch-ag
new file mode 100644
index 000000000000..5fdec8b05070
--- /dev/null
+++ b/graphics/picturebook/files/patch-ag
@@ -0,0 +1,278 @@
+--- ../picturebook.old/sonypi.c Mon Dec 25 19:01:43 2000
++++ sonypi.c Mon Dec 25 19:03:23 2000
+@@ -72,7 +72,7 @@
+ #define MUTE_V2 0x29
+
+ static int spic_fd;
+-
++#ifdef LINUX
+ static void OUTB(u8 v, int port)
+ {
+ outb(v, port);
+@@ -83,7 +83,42 @@
+ usleep(10);
+ return inb(port);
+ }
++#define OUTW outw
++#else ifdef __FreeBSD__
++#include <machine/cpufunc.h>
++static void OUTB(u8 v, unsigned int port)
++{
++ outb(port,v);
++}
++static void OUTW(u16 v, unsigned int port)
++{
++ outw(port,v);
++}
++
++static u8 INB(unsigned int port)
++{
++ usleep(10);
++ return inb(port);
++}
++static int deviofd=-1;
++static int iopl(int lvl)
++{
++ if(lvl==0){
++ if(deviofd!=-1){
++ close(deviofd);
++ deviofd=-1;
++ }
++ return 0;
++ }else if(lvl==3){
++ if(deviofd==-1){
++ deviofd=open("/dev/io",0);
++ }
++ return deviofd;
++ }
++ return -1;
++}
+
++#endif
+ /* initialise the SPIC - this comes from the AML code in the ACPI bios */
+ static void spic_srs(int fd, u16 port1, u16 port2, u8 irq)
+ {
+@@ -98,7 +133,7 @@
+ v2 = inw(SPI_IRQ_PORT);
+ v2 &= ~(0x3 << SPI_IRQ_SHIFT);
+ v2 |= (irq << SPI_IRQ_SHIFT);
+- outw(v2, SPI_IRQ_PORT);
++ OUTW(v2, SPI_IRQ_PORT);
+
+ pci_config_read_u8(fd, SPI_G10L, &v);
+ v = (v & 0x1F) | 0xC0;
+@@ -116,7 +151,7 @@
+
+ v = inw(SPI_IRQ_PORT);
+ v |= (0x3 << SPI_IRQ_SHIFT);
+- outw(v, SPI_IRQ_PORT);
++ OUTW(v, SPI_IRQ_PORT);
+ close(spic_fd);
+ }
+
+@@ -144,10 +179,10 @@
+ u8 v1;
+
+ while (INB(SPIC_PORT2) & 2) ;
+- outb(dev, SPIC_PORT2);
++ OUTB(dev, SPIC_PORT2);
+
+ while (INB(SPIC_PORT2) & 2) ;
+- outb(fn, SPIC_PORT1);
++ OUTB(fn, SPIC_PORT1);
+
+ v1 = INB(SPIC_PORT1);
+ if (debug)
+@@ -160,13 +195,13 @@
+ u8 v1;
+
+ while (INB(SPIC_PORT2) & 2) ;
+- outb(dev, SPIC_PORT2);
++ OUTB(dev, SPIC_PORT2);
+
+ while (INB(SPIC_PORT2) & 2) ;
+- outb(fn, SPIC_PORT1);
++ OUTB(fn, SPIC_PORT1);
+
+ while (INB(SPIC_PORT2) & 2) ;
+- outb(v, SPIC_PORT1);
++ OUTB(v, SPIC_PORT1);
+
+ v1 = INB(SPIC_PORT1);
+ if (debug)
+@@ -259,7 +294,7 @@
+ v1 = inb(SPIC_PORT1);
+ v2 = inb(SPIC_PORT2);
+ if ((v2 & 0x10) == 0 || v1 == 0) return 0;
+- /* the following clears the event bits */
++ /* the following clears the evnet bits */
+ spic_call2(0x81, 0xff);
+ return (signed char)v1;
+ }
+@@ -292,96 +327,96 @@
+ void spic_setup_vga(void)
+ {
+ /* :about to start capture again */
+-outb(0x09, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outb(0x0A, 0x03CE); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000021 */
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000020 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000000F3 */
+-outw(0x2008, 0x03C4); usleep(10);
+-outw(0xF309, 0x03C4); usleep(10);
+-outw(0x2609, 0x03CE); usleep(10);
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x09, 0x03CE); usleep(10);
++OUTW(0x2008, 0x03C4); usleep(10);
++OUTW(0xF309, 0x03C4); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outb(0x0A, 0x03CE); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000021 */
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000020 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000000F3 */
+-outw(0xF109, 0x03C4); usleep(10);
+-outw(0x2609, 0x03CE); usleep(10);
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x09, 0x03CE); usleep(10);
++OUTW(0xF109, 0x03C4); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outb(0x0A, 0x03CE); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000021 */
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000020 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 0000001F */
+-outw(0x1D09, 0x03C4); usleep(10);
+-outw(0x2609, 0x03CE); usleep(10);
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x1D09, 0x03C4); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00002621 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000026E9 */
+-outb(0x08, 0x03C4); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00002621 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000026F9 */
+-outb(0x09, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outb(0x09, 0x03CE); usleep(10);
+-outb(0x26, 0x03CF); usleep(10);
+-outb(0x0A, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
++OUTB(0x26, 0x03CF); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000021 */
+-outb(0x0A, 0x03CE); usleep(10);
+-outb(0x21, 0x03CF); usleep(10);
+-outb(0x0F, 0x03C4); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
++OUTB(0x21, 0x03CF); usleep(10);
++OUTB(0x0F, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000001 */
+-outb(0x0F, 0x03C4); usleep(10);
+-outb(0x01, 0x03C5); usleep(10);
+-outb(0x0F, 0x03C4); usleep(10);
++OUTB(0x0F, 0x03C4); usleep(10);
++OUTB(0x01, 0x03C5); usleep(10);
++OUTB(0x0F, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000001 */
+-outb(0x0A, 0x03CE); usleep(10);
+-outb(0x21, 0x03CF); usleep(10);
+-outb(0x09, 0x03CE); usleep(10);
+-outb(0x26, 0x03CF); usleep(10);
+-outb(0x09, 0x03CE); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
++OUTB(0x21, 0x03CF); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
++OUTB(0x26, 0x03CF); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outb(0xBF, 0x03CE); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTB(0xBF, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000000 */
+-outb(0xA3, 0x03CE); usleep(10);
++OUTB(0xA3, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 0000000C */
+-outw(0xBF, 0x03CE); usleep(10);
+-outw(0x0CA3, 0x03CE); usleep(10);
+-outb(0x09, 0x03CE); usleep(10);
++OUTW(0xBF, 0x03CE); usleep(10);
++OUTW(0x0CA3, 0x03CE); usleep(10);
++OUTB(0x09, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000026 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outb(0x0A, 0x03CE); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTB(0x0A, 0x03CE); usleep(10);
+ inb(0x03CF); usleep(10); /* -> 00000021 */
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00000021 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000000F9 */
+-outw(0x2609, 0x03CE); usleep(10);
+-outw(0x210A, 0x03CE); usleep(10);
+-outb(0x08, 0x03C4); usleep(10);
++OUTW(0x2609, 0x03CE); usleep(10);
++OUTW(0x210A, 0x03CE); usleep(10);
++OUTB(0x08, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 00002621 */
+-outb(0x09, 0x03C4); usleep(10);
++OUTB(0x09, 0x03C4); usleep(10);
+ inb(0x03C5); usleep(10); /* -> 000026F9 */
+ }
+
+@@ -434,3 +469,7 @@
+ }
+ spic_dis();
+ }
++
++
++
++
diff --git a/graphics/picturebook/files/patch-ah b/graphics/picturebook/files/patch-ah
new file mode 100644
index 000000000000..1db391a81f53
--- /dev/null
+++ b/graphics/picturebook/files/patch-ah
@@ -0,0 +1,89 @@
+diff -c command.c picturebook.fbsd/command.c
+*** command.c Wed Aug 2 08:15:04 2000
+--- picturebook.fbsd/command.c Mon Jan 1 06:16:22 2001
+***************
+*** 112,118 ****
+
+ avi_start(fd);
+
+! printf("capturing %3.1f seconds to %s\n", captime, fname);
+
+ mchip_set_framerate(framerate);
+
+--- 112,118 ----
+
+ avi_start(fd);
+
+! fprintf(stderr, "capturing %3.1f seconds to %s\n", captime, fname);
+
+ mchip_set_framerate(framerate);
+
+***************
+*** 123,133 ****
+ double t1 = timer_end();
+ n = mchip_cont_compression_read(buf, sizeof(buf));
+ avi_add(fd, buf, n);
+! printf("."); fflush(stdout);
+ frame_delay(framerate, t1);
+ }
+ avi_end(fd, mchip_hsize(), mchip_vsize(), i/timer_end());
+! printf("\ncaptured %d frames\n", i);
+ close(fd);
+ }
+
+--- 123,133 ----
+ double t1 = timer_end();
+ n = mchip_cont_compression_read(buf, sizeof(buf));
+ avi_add(fd, buf, n);
+! fprintf(stderr, "."); fflush(stdout);
+ frame_delay(framerate, t1);
+ }
+ avi_end(fd, mchip_hsize(), mchip_vsize(), i/timer_end());
+! fprintf(stderr, "\ncaptured %d frames\n", i);
+ close(fd);
+ }
+
+***************
+*** 146,152 ****
+ f = find_next_file("snap.%d.jpg");
+ write_file(f, img, n);
+ display_image(f);
+! printf("captured to %s\n", f);
+ while (spic_capture_pressed()) sdelay(1);
+ } else {
+ char *f;
+--- 146,152 ----
+ f = find_next_file("snap.%d.jpg");
+ write_file(f, img, n);
+ display_image(f);
+! fprintf(stderr, "captured to %s\n", f);
+ while (spic_capture_pressed()) sdelay(1);
+ } else {
+ char *f;
+***************
+*** 171,182 ****
+ timer_start();
+ }
+ frames++;
+! printf("."); fflush(stdout);
+ } while (spic_capture_pressed());
+ avi_end(fd, mchip_hsize(), mchip_vsize(),
+ frames/timer_end());
+ close(fd);
+! printf("\ncaptured %d frames to %s\n", frames, f);
+ display_image(NULL);
+ }
+ }
+--- 171,182 ----
+ timer_start();
+ }
+ frames++;
+! fprintf(stderr, "."); fflush(stdout);
+ } while (spic_capture_pressed());
+ avi_end(fd, mchip_hsize(), mchip_vsize(),
+ frames/timer_end());
+ close(fd);
+! fprintf(stderr, "\ncaptured %d frames to %s\n", frames, f);
+ display_image(NULL);
+ }
+ }
diff --git a/graphics/picturebook/files/patch-ai b/graphics/picturebook/files/patch-ai
new file mode 100644
index 000000000000..02b64cc0ea0e
--- /dev/null
+++ b/graphics/picturebook/files/patch-ai
@@ -0,0 +1,20 @@
+diff -c mchip.c picturebook.fbsd/mchip.c
+*** mchip.c Wed Aug 2 08:15:04 2000
+--- picturebook.fbsd/mchip.c Mon Jan 1 06:18:37 2001
+***************
+*** 377,383 ****
+
+ delay1(MCHIP_HIC_CMD);
+
+! printf("continuous compressed capture started\n");
+ }
+
+ /* read one compressed frame from the framebuffer */
+--- 377,383 ----
+
+ delay1(MCHIP_HIC_CMD);
+
+! fprintf(stderr, "continuous compressed capture started\n");
+ }
+
+ /* read one compressed frame from the framebuffer */
diff --git a/graphics/picturebook/pkg-comment b/graphics/picturebook/pkg-comment
new file mode 100644
index 000000000000..09f141a49374
--- /dev/null
+++ b/graphics/picturebook/pkg-comment
@@ -0,0 +1 @@
+SONY VAIO camera capture utility
diff --git a/graphics/picturebook/pkg-descr b/graphics/picturebook/pkg-descr
new file mode 100644
index 000000000000..a3f4ca72c417
--- /dev/null
+++ b/graphics/picturebook/pkg-descr
@@ -0,0 +1,2 @@
+Picturebook is an experimental utility for capturing from SONY VAIO camera.
+WWW: http://samba.org/picturebook/
diff --git a/graphics/picturebook/pkg-plist b/graphics/picturebook/pkg-plist
new file mode 100644
index 000000000000..66dd861c6011
--- /dev/null
+++ b/graphics/picturebook/pkg-plist
@@ -0,0 +1,4 @@
+bin/capture
+share/doc/picturebook/README
+share/doc/picturebook/README.FreeBSD
+@dirrm share/doc/picturebook