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-rw-r--r--cad/gplcver/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/gplcver/Makefile b/cad/gplcver/Makefile
index 47074407390f..21ba94b9ed3b 100644
--- a/cad/gplcver/Makefile
+++ b/cad/gplcver/Makefile
@@ -12,7 +12,7 @@ CATEGORIES= cad
MASTER_SITES= http://www.pragmatic-c.com/gpl-cver/downloads/
DISTNAME= ${PORTNAME}-${PORTVERSION:R}${PORTVERSION:E}.src
-MAINTAINER= ijliao@csie.nctu.edu.tw
+MAINTAINER= ijliao@FreeBSD.org
COMMENT= A Verilog HDL simulator
USE_BZIP2= yes