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-rw-r--r--cad/iverilog/Makefile1
1 files changed, 0 insertions, 1 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile
index bd24f7c26a6a..15f62974d9b9 100644
--- a/cad/iverilog/Makefile
+++ b/cad/iverilog/Makefile
@@ -20,7 +20,6 @@ COMMENT= A Verilog simulation and synthesis tool
GNU_CONFIGURE= yes
USE_BISON= build
USE_GMAKE= yes
-USE_GNOME= gnometarget
CONFIGURE_ARGS= --disable-suffix