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-rw-r--r--cad/p5-Verilog-Perl/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/cad/p5-Verilog-Perl/Makefile b/cad/p5-Verilog-Perl/Makefile
index e7af5c796ed9..208fc175b8d6 100644
--- a/cad/p5-Verilog-Perl/Makefile
+++ b/cad/p5-Verilog-Perl/Makefile
@@ -6,6 +6,7 @@ PKGNAMEPREFIX= p5-
MAINTAINER= otacilio.neto@bsd.com.br
COMMENT= Building point for Verilog support in the Perl language
+WWW= https://www.veripool.org/wiki/verilog-perl
LICENSE= ART20 LGPL3
LICENSE_COMB= dual