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* - Fix the checks to avoid using `sys/dir.h' and thus undeprecateAlexey Dokuchaev2019-06-193-5/+43
| | | | | | | - Define LICENSE (GPLv2) and install supplied documentation files Notes: svn path=/head/; revision=504533
* Mark as deprecated a bunch of abandonware using sys/dir.hBaptiste Daroussin2019-06-121-0/+3
| | | | | | | | | | sys/dir.h is going to be phased out soon, so mark as deprecated non maintained abandonware using it. PR: 21519 Notes: svn path=/head/; revision=504003
* Update WWW: SF redirects to https://sourceforge.net/projects/<PROJECT_NAME>/Sunpoet Po-Chuan Hsieh2017-01-201-1/+1
| | | | Notes: svn path=/head/; revision=431996
* Remove indefinite articles and trailing periods from COMMENT, plusJimmy Olgeni2014-06-091-1/+1
| | | | | | | | | | minor COMMENT typos and surrounding whitespace fixes. Categories A-C. CR: D196 Approved by: portmgr (bapt) Notes: svn path=/head/; revision=357139
* - USE_(BZIP2|XZ) -> USES=tar:(bzip2|xz)Olli Hauer2014-06-011-2/+1
| | | | Notes: svn path=/head/; revision=356131
* Support stagingEmanuel Haupt2014-02-271-6/+4
| | | | Notes: svn path=/head/; revision=346330
* Add NO_STAGE all over the place in preparation for the staging support (cat: ↵Baptiste Daroussin2013-09-201-6/+2
| | | | | | | cad) Notes: svn path=/head/; revision=327711
* Point to the new homeBaptiste Daroussin2011-06-162-2/+2
| | | | | | | Make it fetchable again Notes: svn path=/head/; revision=275669
* - Get Rid MD5 supportMartin Wilke2011-03-201-1/+0
| | | | Notes: svn path=/head/; revision=271346
* - Reassign to portsThomas Abthorpe2008-10-271-1/+1
| | | | Notes: svn path=/head/; revision=222134
* - change maintainer address on ports I maintainThomas Abthorpe2007-08-231-1/+1
| | | | | | | Approved by: clsung (mentor) Notes: svn path=/head/; revision=198164
* 'actually' pass maintainershipYing-Chieh Liao2007-07-211-1/+1
| | | | Notes: svn path=/head/; revision=195965
* upgrade to 2.12.aYing-Chieh Liao2007-07-212-4/+4
| | | | | | | | | | pass maintainership to submitter PR: 114768 Submitted by: Thomas Abthorpe <thomas@goodking.ca> Notes: svn path=/head/; revision=195964
* - maintainer is a committerCheng-Lung Sung2006-08-031-1/+1
| | | | Notes: svn path=/head/; revision=169529
* Fix build on sparcTilman Keskinoz2006-01-206-4/+54
| | | | Notes: svn path=/head/; revision=153990
* BROKEN on sparc64: Does not compileKris Kennaway2006-01-191-1/+7
| | | | Notes: svn path=/head/; revision=153911
* Fix maintainership (set to submitter)Edwin Groothuis2006-01-041-1/+1
| | | | Notes: svn path=/head/; revision=152705
* [NEW PORT] cad/gplcver: A Verilog HDL simulatorEdwin Groothuis2005-12-293-0/+49
GPL Cver is a full 1995 P1364 Verilog standard HDL simulator. It also implements some of the 2001 P1364 standard features including all three PLI interfaces (tf_, acc_ and vpi_) as defined in the 2001 Language Reference Manual (LRM). Verilog is the name for both a language for describing electronic hardware called a hardware description language (HDL) and the name of the program that simulates HDL circuit descriptions to verify that described circuits will function correctly when the are constructed. Verilog is used only for describing digital logic circuits. Other HDLs such as Spice are used for describing analog circuits. There is an IEEE standard named P1364 that standardizes the Verilog HDL and the behavior of Verilog simulators. Verilog is officially defined in the IEEE P1364 Language Reference Manual (LRM) that can be purchased from IEEE. There are many good books for learning that teach the Verilog HDL and/or that teach digital circuit design using Verilog. WWW: http://www.pragmatic-c.com/gpl-cver/ PR: ports/80968 Submitted by: Ying-Chieh Liao <ijliao@csie.nctu.edu.tw> Notes: svn path=/head/; revision=152326
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