| Commit message (Collapse) | Author | Age | Files | Lines |
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* Add a patch from Markus Strobl <markus.strobl@gmx.at> to fix WRMSR
ioctl. That was broken before.
Notes:
svn path=/head/; revision=206160
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After unfreeze I'll change the shebang line patching code to use
sed instead of ruby. For now this solution will work since these files
already contains correct paths to ruby anyway.
PR: ports/112496
Submitted by: Victor Snezhko<snezhko@indorsoft.ru>
Approved by: portmgr (linimon)
Notes:
svn path=/head/; revision=202627
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* Chase CURRENT scheduler code update
* Fix building on 6-STABLE/amd64 [1] [2]
- Remove reference to unexsistent web page [3]
- Use new devcpu-data port for microcode updates.
PR: ports/114098 [1], ports/114103 [2]
Reported by: Simun Mikecin <numisemis@yahoo.com> [1],
Larry Rosenman <ler@lerctr.org> [2],
mnag [3]
Notes:
svn path=/head/; revision=195922
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modules.
Hat: portmgr
Notes:
svn path=/head/; revision=194441
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- Change mirror.
Changelog:
* Add CRITICAL microcode update from Intel for Core 2 Duo, Quad, Extreme.
Update is recommended (also check for your bios updates).
Notes:
svn path=/head/; revision=191455
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Submitted by: netchild
Notes:
svn path=/head/; revision=183961
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- Add rcNG startup script that allows update cpucodes on startup
- Add utility to extract cpucodes from Award BIOS update images
- Add additional amd microcode upodate extracted from update images,
provided by pav@
Thanks to netchild@ and pav@ for suggestions and information regarding
BIOS updates.
Notes:
svn path=/head/; revision=183891
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Changes:
- Accuire sched lock when calling the is_sched_bound function.
Reported by: netchild@
Notes:
svn path=/head/; revision=179553
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default dir
- Rebuild cross-reference on uninstall
Reported by: Alexander Leidinger <Alexander@Leidinger.net>
Notes:
svn path=/head/; revision=179446
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This kernel module provides access to i386/amd64 CPUs MSR (Model Specific
Register) registers and cpuid info through /dev/cpu%d devices, where %d
corresponds to cpu number.
It can be used with x86info to retrive information available from MSR registers.
Additionally, this module can be used to update/replace microcode of cpus.
PR: ports/ports/102454
Submitted by: stas
Notes:
svn path=/head/; revision=179230
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