From 2983be6402754cf2961965041848ae25730caeca Mon Sep 17 00:00:00 2001 From: Yuri Victorovich Date: Sun, 12 Sep 2021 16:28:37 -0700 Subject: cad/opentimer: New port: High-performance timing analysis tool for VLSI systems --- cad/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'cad/Makefile') diff --git a/cad/Makefile b/cad/Makefile index dcc804239173..6bd9f9e8d8d6 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -88,6 +88,7 @@ SUBDIR += openroad SUBDIR += openscad SUBDIR += openscad-devel + SUBDIR += opentimer SUBDIR += openvsp SUBDIR += oregano SUBDIR += p5-GDS2 -- cgit v1.2.3