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<title>src-test/sys/powerpc/aim/swtch.S, branch main</title>
<subtitle>FreeBSD source tree</subtitle>
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<updated>2010-07-13T05:32:19Z</updated>
<entry>
<title>MFppc64:</title>
<updated>2010-07-13T05:32:19Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2010-07-13T05:32:19Z</published>
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<id>urn:sha1:c3e289e1ce8c9af8d14e9f727632e22b3bf901f9</id>
<content type='text'>
Kernel sources for 64-bit PowerPC, along with build-system changes to keep
32-bit kernels compiling (build system changes for 64-bit kernels are
coming later). Existing 32-bit PowerPC kernel configurations must be
updated after this change to specify their architecture.
</content>
</entry>
<entry>
<title>Unbreak cpu_switch(). The register allocator in my brain is clearly</title>
<updated>2009-10-31T20:59:13Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2009-10-31T20:59:13Z</published>
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<id>urn:sha1:156ef7611e8c2644383091b0b166e2123ad4ee98</id>
<content type='text'>
broken. Also, Altivec context switching worked before only by accident,
but should work now by design.
</content>
</entry>
<entry>
<title>Remove an unnecessary sync that crept in the last commit.</title>
<updated>2009-10-31T18:04:34Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2009-10-31T18:04:34Z</published>
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<id>urn:sha1:011db0bc81cc1712ef7ec32cb4ee5942ac76b4f2</id>
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</content>
</entry>
<entry>
<title>Loop on blocked threads when using ULE scheduler, removing an</title>
<updated>2009-10-31T17:55:48Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2009-10-31T17:55:48Z</published>
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<id>urn:sha1:ad26477892ecdcc9a4a226fa2e6ebb6b2fe28002</id>
<content type='text'>
XXX MP comment.
</content>
</entry>
<entry>
<title>Correct another typo. Actually save the condition register instead</title>
<updated>2009-10-11T16:44:58Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2009-10-11T16:44:58Z</published>
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<id>urn:sha1:a8211b27b9e66fce2ecaa46b9c3e4c9e5f1b6af1</id>
<content type='text'>
of overwriting r12 by mistake.
</content>
</entry>
<entry>
<title>Perform a dummy stwcx. when we switch contexts. The context</title>
<updated>2009-04-04T22:23:03Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2009-04-04T22:23:03Z</published>
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<id>urn:sha1:e9b3f3045d25487fb1536538e1d25e6abb9cbedf</id>
<content type='text'>
being switched out may hold a reservation. The stwcx. will
clear the reservation. This is architecturally recommended.

The scenario this addresses is as follows:
1. Thread 1 performs a lwarx and as such holds a reservation.
2. Thread 1 gets switched out (before doing the matching
   stwcx.) and thread 2 is switched in.
3. Thread 2 performs a stwcx. to the same reservation granule.
   This will succeed because the processor has the reservation
   even though thread 2 didn't do the lwarx.

Note that on some processors the address given the stwcx. is
not checked. On these processors the mere condition of having
a reservation would cause the stwcx. to succeed, irrespective
of whether the addresses are the same. The dummy stwcx. is
especially important for those processors.
</content>
</entry>
<entry>
<title>Add Altivec support for supported CPUs. This is derived from the FPU support</title>
<updated>2009-02-20T17:48:40Z</updated>
<author>
<name>Nathan Whitehorn</name>
<email>nwhitehorn@FreeBSD.org</email>
</author>
<published>2009-02-20T17:48:40Z</published>
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<id>urn:sha1:1ac37bcb7740a1a29ff6cb1c8108db1833ba4c1f</id>
<content type='text'>
code, and also reducing the size of trapcode to fit inside a 32 byte handler
slot.

Reviewed by:	grehan
MFC after:	2 weeks
</content>
</entry>
<entry>
<title>Set pcpup-&gt;pc_curthread and pcpup-&gt;pc_curpcb before calling</title>
<updated>2008-09-16T17:03:52Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2008-09-16T17:03:52Z</published>
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<id>urn:sha1:5e3943bf9318e66c3bae4bd74e4f183b8f516e5f</id>
<content type='text'>
pmap_activate. While pmap_activate doesn't need either, we
do need a valid curthread if we enable KTR_PMAP.
</content>
</entry>
<entry>
<title>MFp4: SMP support</title>
<updated>2008-04-27T22:33:43Z</updated>
<author>
<name>Marcel Moolenaar</name>
<email>marcel@FreeBSD.org</email>
</author>
<published>2008-04-27T22:33:43Z</published>
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<id>urn:sha1:12640815f815936a684029de569522738d5b22da</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Unify and generalize PowerPC headers, adjust AIM code accordingly.</title>
<updated>2008-03-02T17:05:57Z</updated>
<author>
<name>Rafal Jaworowski</name>
<email>raj@FreeBSD.org</email>
</author>
<published>2008-03-02T17:05:57Z</published>
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<id>urn:sha1:786e4a1b042b76a64c68aa7f1652bd0c11c3b68b</id>
<content type='text'>
Rework of this area is a pre-requirement for importing e500 support (and
other PowerPC core variations in the future). Mainly the following
headers are refactored so that we can cover for low-level differences between
various machines within PowerPC architecture:

  &lt;machine/pcpu.h&gt;
  &lt;machine/pcb.h&gt;
  &lt;machine/kdb.h&gt;
  &lt;machine/hid.h&gt;
  &lt;machine/frame.h&gt;

Areas which use the above are adjusted and cleaned up.

Credits for this rework go to marcel@

Approved by:	cognet (mentor)
MFp4:		e500
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