src-test/sys/sparc64, branch main

Remove sparc64 kernel support

2020-02-03T17:35:11Z

Remove all sparc64 specific files Remove all sparc64 ifdefs Removee indireeect sparc64 ifdefs

Reimplement stack capture of running threads on i386 and amd64.

2020-01-31T15:43:33Z

After r355784 the td_oncpu field is no longer synchronized by the thread lock, so the stack capture interrupt cannot be delievered precisely. Fix this using a loop which drops the thread lock and restarts if the wrong thread was sampled from the stack capture interrupt handler. Change the implementation to use a regular interrupt instead of an NMI. Now that we drop the thread lock, there is no advantage to the latter. Simplify the KPIs. Remove stack_save_td_running() and add a return value to stack_save_td(). On platforms that do not support stack capture of running threads, stack_save_td() returns EOPNOTSUPP. If the target thread is running in user mode, stack_save_td() returns EBUSY. Reviewed by: kib Reported by: mjg, pho Tested by: pho Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D23355

sparc64: Busy the TSB page before freeing it in pmap_release().

2020-01-23T17:18:58Z

This is now required by vm_page_free(). PR: 243534 Reported and tested by: Michael Reim

Apply r355819 to sparc64 - fix assertion failure after r355784

2020-01-23T14:11:02Z

From r355819: Repeat the spinlock_enter/exit pattern from amd64 on other architectures to fix an assert violation introduced in r355784. Without this spinlock_exit() may see owepreempt and switch before reducing the spinlock count. amd64 had been optimized to do a single critical enter/exit regardless of the number of spinlocks which avoided the problem and this optimization had not been applied elsewhere. This is completely untested - I have no obsolete Sparc hardware - but someone did try testing recent changes on sparc64 (PR 243534). PR: 243534

Add KERNEL_PANICKED macro for use in place of direct panicstr tests

2020-01-12T06:07:54Z

sc(4) md bits: stop setting sc->kbd entirely

2019-12-30T02:07:55Z

The machdep parts no longer need to touch keyboard parts after r356043; sc->kbd will be 0-initialized and this works as expected.

[PowerPC] Implement Secure-PLT jump table processing for ppc32.

2019-12-24T15:56:24Z

Due to clang and LLD's tendency to use a PLT for builtins, and as they don't have full support for EABI, we sometimes have to deal with a PLT in .ko files in a clang-built kernel. As such, augment the in-kernel linker to support jump table processing. As there is no particular reason to support lazy binding in kernel modules, only implement Secure-PLT immediate binding. As part of these changes, add elf_cpu_parse_dynamic() to the MD API of the in-kernel linker (except on platforms that use raw object files.) The new function will allow MD code to act on MD tags in _DYNAMIC. Use this new function in the PowerPC MD code to ensure BSS-PLT modules using PLT will be rejected during insertion, and to poison the runtime resolver to ensure we get a clear panic reason if a call is made to the resolver. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22608

Introduce the concept of busdma tag templates. A template can be allocated

2019-12-24T14:48:46Z

off the stack, initialized to default values, and then filled in with driver-specific values, all without having to worry about the numerous other fields in the tag. The resulting template is then passed into busdma and the normal opaque tag object created. See the man page for details on how to initialize a template. Templates do not support tag filters. Filters have been broken for many years, and only existed for an ancient make/model of hardware that had a quirky DMA engine. Instead of breaking the ABI/API and changing the arugment signature of bus_dma_tag_create() to remove the filter arguments, templates allow us to ignore them, and also significantly reduce the complexity of creating and managing tags. Reviewed by: imp, kib Differential Revision: https://reviews.freebsd.org/D22906

sc: fix arm/mips/sparc64 MD bits

2019-12-23T21:41:04Z

r356043 missed a couple of references in machdep parts... arguably, these lines could probably be dropped as the softc is likely still zero'd at this point. Pointy hat: kevans

bitset: rename confusing macro NAND to ANDNOT

2019-12-13T09:32:16Z

s/BIT_NAND/BIT_ANDNOT/, and for CPU and DOMAINSET too. The actual implementation is "and not" (or "but not"), i.e. A but not B. Fortunately this does appear to be what all existing callers want. Don't supply a NAND (not (A and B)) operation at this time. Discussed with: jeff Reviewed by: cem Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D22791