diff options
author | Emmanuel Vadot <manu@FreeBSD.org> | 2019-11-28 19:05:03 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2019-11-28 19:05:03 +0000 |
commit | c3f1cfc76c9a579767282ac81d2be1cfb20aea92 (patch) | |
tree | 2ceec207f54ea88f7e65cbfc01d27ccf39cb9693 /Bindings/timer/allwinner,sun5i-a13-hstimer.txt | |
parent | 01e5ca170569c10889ed1bb2efcf4d19eae1353c (diff) |
Notes
Diffstat (limited to 'Bindings/timer/allwinner,sun5i-a13-hstimer.txt')
-rw-r--r-- | Bindings/timer/allwinner,sun5i-a13-hstimer.txt | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/Bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Bindings/timer/allwinner,sun5i-a13-hstimer.txt deleted file mode 100644 index 2c5c1be783601..0000000000000 --- a/Bindings/timer/allwinner,sun5i-a13-hstimer.txt +++ /dev/null @@ -1,26 +0,0 @@ -Allwinner SoCs High Speed Timer Controller - -Required properties: - -- compatible : should be "allwinner,sun5i-a13-hstimer" or - "allwinner,sun7i-a20-hstimer" -- reg : Specifies base physical address and size of the registers. -- interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i - one) -- clocks: phandle to the source clock (usually the AHB clock) - -Optional properties: -- resets: phandle to a reset controller asserting the timer - -Example: - -timer@1c60000 { - compatible = "allwinner,sun7i-a20-hstimer"; - reg = <0x01c60000 0x1000>; - interrupts = <0 51 1>, - <0 52 1>, - <0 53 1>, - <0 54 1>; - clocks = <&ahb1_gates 19>; - resets = <&ahb1rst 19>; -}; |