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| author | Dimitry Andric <dim@FreeBSD.org> | 2020-09-09 18:11:04 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-09-09 18:11:04 +0000 |
| commit | 9fc62ba649126f546c7d6bd09ab44d147b3d8ff6 (patch) | |
| tree | c146c78a6ca1e353d2eb80e9ccd0c744631fb696 /contrib/llvm-project | |
| parent | 69112cca60cb63495de2550f90162eb1b095a157 (diff) | |
| download | src-test-9fc62ba649126f546c7d6bd09ab44d147b3d8ff6.tar.gz src-test-9fc62ba649126f546c7d6bd09ab44d147b3d8ff6.zip | |
Merge commit e6bb4c8e7 from llvm git (by Craig Topper):
[X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.
SSE4_1 and SSE4_2 due imply SSSE3. So I guess I got confused when
switching the code to being table based in D83273.
Fixes PR47464
This should fix builds with -march=amdfam10 emitting SSSE3 instructions
such as pshufb, which lead to programs crashing with SIGILL on such
processors.
Reported by: avg
MFC after: 6 weeks
X-MFC-With: r364284
Notes
Notes:
svn path=/head/; revision=365507
Diffstat (limited to 'contrib/llvm-project')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Support/X86TargetParser.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/Support/X86TargetParser.cpp b/contrib/llvm-project/llvm/lib/Support/X86TargetParser.cpp index c629f872df121..4c2d4efbfca8d 100644 --- a/contrib/llvm-project/llvm/lib/Support/X86TargetParser.cpp +++ b/contrib/llvm-project/llvm/lib/Support/X86TargetParser.cpp @@ -522,7 +522,7 @@ static constexpr FeatureBitset ImpliedFeaturesAVX5124FMAPS = {}; static constexpr FeatureBitset ImpliedFeaturesAVX5124VNNIW = {}; // SSE4_A->FMA4->XOP chain. -static constexpr FeatureBitset ImpliedFeaturesSSE4_A = FeatureSSSE3; +static constexpr FeatureBitset ImpliedFeaturesSSE4_A = FeatureSSE3; static constexpr FeatureBitset ImpliedFeaturesFMA4 = FeatureAVX | FeatureSSE4_A; static constexpr FeatureBitset ImpliedFeaturesXOP = FeatureFMA4; |