diff options
author | Emmanuel Vadot <manu@FreeBSD.org> | 2017-10-21 15:18:20 +0000 |
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committer | Emmanuel Vadot <manu@FreeBSD.org> | 2017-10-21 15:18:20 +0000 |
commit | d5464ff11700ac44568e6816e00d1d1427cc46ae (patch) | |
tree | 1c388ab705b506c8d0e3f16710bfaa2cbc623262 /include/dt-bindings/clock/r8a7794-cpg-mssr.h | |
parent | f3f213a6f94d330b77b3910f4c66b62aeec50645 (diff) |
Notes
Diffstat (limited to 'include/dt-bindings/clock/r8a7794-cpg-mssr.h')
-rw-r--r-- | include/dt-bindings/clock/r8a7794-cpg-mssr.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a7794-cpg-mssr.h b/include/dt-bindings/clock/r8a7794-cpg-mssr.h new file mode 100644 index 0000000000000..9d720311ae3a2 --- /dev/null +++ b/include/dt-bindings/clock/r8a7794-cpg-mssr.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a7794 CPG Core Clocks */ +#define R8A7794_CLK_Z2 0 +#define R8A7794_CLK_ZG 1 +#define R8A7794_CLK_ZTR 2 +#define R8A7794_CLK_ZTRD2 3 +#define R8A7794_CLK_ZT 4 +#define R8A7794_CLK_ZX 5 +#define R8A7794_CLK_ZS 6 +#define R8A7794_CLK_HP 7 +#define R8A7794_CLK_I 8 +#define R8A7794_CLK_B 9 +#define R8A7794_CLK_LB 10 +#define R8A7794_CLK_P 11 +#define R8A7794_CLK_CL 12 +#define R8A7794_CLK_CP 13 +#define R8A7794_CLK_M2 14 +#define R8A7794_CLK_ADSP 15 +#define R8A7794_CLK_ZB3 16 +#define R8A7794_CLK_ZB3D2 17 +#define R8A7794_CLK_DDR 18 +#define R8A7794_CLK_SDH 19 +#define R8A7794_CLK_SD0 20 +#define R8A7794_CLK_SD2 21 +#define R8A7794_CLK_SD3 22 +#define R8A7794_CLK_MMC0 23 +#define R8A7794_CLK_MP 24 +#define R8A7794_CLK_QSPI 25 +#define R8A7794_CLK_CPEX 26 +#define R8A7794_CLK_RCAN 27 +#define R8A7794_CLK_R 28 +#define R8A7794_CLK_OSC 29 + +#endif /* __DT_BINDINGS_CLOCK_R8A7794_CPG_MSSR_H__ */ |