diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
| commit | 01095a5d43bbfde13731688ddcf6048ebb8b7721 (patch) | |
| tree | 4def12e759965de927d963ac65840d663ef9d1ea /include/llvm/CodeGen/MIRYamlMapping.h | |
| parent | f0f4822ed4b66e3579e92a89f368f8fb860e218e (diff) | |
Diffstat (limited to 'include/llvm/CodeGen/MIRYamlMapping.h')
| -rw-r--r-- | include/llvm/CodeGen/MIRYamlMapping.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/MIRYamlMapping.h b/include/llvm/CodeGen/MIRYamlMapping.h index 14d3744741c5c..7f9c448333362 100644 --- a/include/llvm/CodeGen/MIRYamlMapping.h +++ b/include/llvm/CodeGen/MIRYamlMapping.h @@ -7,9 +7,6 @@ // //===----------------------------------------------------------------------===// // -// The MIR serialization library is currently a work in progress. It can't -// serialize machine functions at this time. -// // This file implements the mapping between various MIR data structures and // their corresponding YAML representation. // @@ -385,6 +382,8 @@ struct MachineFunction { unsigned Alignment = 0; bool ExposesReturnsTwice = false; bool HasInlineAsm = false; + // MachineFunctionProperties + bool AllVRegsAllocated = false; // Register information bool IsSSA = false; bool TracksRegLiveness = false; @@ -408,6 +407,7 @@ template <> struct MappingTraits<MachineFunction> { YamlIO.mapOptional("alignment", MF.Alignment); YamlIO.mapOptional("exposesReturnsTwice", MF.ExposesReturnsTwice); YamlIO.mapOptional("hasInlineAsm", MF.HasInlineAsm); + YamlIO.mapOptional("allVRegsAllocated", MF.AllVRegsAllocated); YamlIO.mapOptional("isSSA", MF.IsSSA); YamlIO.mapOptional("tracksRegLiveness", MF.TracksRegLiveness); YamlIO.mapOptional("tracksSubRegLiveness", MF.TracksSubRegLiveness); |