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authorDimitry Andric <dim@FreeBSD.org>2018-06-27 19:14:09 +0000
committerDimitry Andric <dim@FreeBSD.org>2018-06-27 19:14:09 +0000
commiteb1edd4d5902fdc561fd68fa70400fbd11127998 (patch)
tree0b10ccde4b5d3acf243966db54f4f3afef10cf93 /include/llvm/CodeGen/TargetInstrInfo.h
parent2ed8710148a921286717212737771dd31c518fb7 (diff)
Notes
Diffstat (limited to 'include/llvm/CodeGen/TargetInstrInfo.h')
-rw-r--r--include/llvm/CodeGen/TargetInstrInfo.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/TargetInstrInfo.h b/include/llvm/CodeGen/TargetInstrInfo.h
index 6b5404be35d36..57dee3bb44b3a 100644
--- a/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/include/llvm/CodeGen/TargetInstrInfo.h
@@ -421,7 +421,8 @@ public:
/// Build the equivalent inputs of a REG_SEQUENCE for the given \p MI
/// and \p DefIdx.
/// \p [out] InputRegs of the equivalent REG_SEQUENCE. Each element of
- /// the list is modeled as <Reg:SubReg, SubIdx>.
+ /// the list is modeled as <Reg:SubReg, SubIdx>. Operands with the undef
+ /// flag are not added to this list.
/// E.g., REG_SEQUENCE %1:sub1, sub0, %2, sub1 would produce
/// two elements:
/// - %1:sub1, sub0
@@ -446,7 +447,8 @@ public:
/// - %1:sub1, sub0
///
/// \returns true if it is possible to build such an input sequence
- /// with the pair \p MI, \p DefIdx. False otherwise.
+ /// with the pair \p MI, \p DefIdx and the operand has no undef flag set.
+ /// False otherwise.
///
/// \pre MI.isExtractSubreg() or MI.isExtractSubregLike().
///
@@ -465,7 +467,8 @@ public:
/// - InsertedReg: %1:sub1, sub3
///
/// \returns true if it is possible to build such an input sequence
- /// with the pair \p MI, \p DefIdx. False otherwise.
+ /// with the pair \p MI, \p DefIdx and the operand has no undef flag set.
+ /// False otherwise.
///
/// \pre MI.isInsertSubreg() or MI.isInsertSubregLike().
///