diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-26 19:45:00 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-26 19:45:00 +0000 |
commit | 12f3ca4cdb95b193af905a00e722a4dcb40b3de3 (patch) | |
tree | ae1a7fcfc24a8d4b23206c57121c3f361d4b7f84 /include/llvm/CodeGen | |
parent | d99dafe2e4a385dd2a6c76da6d8258deb100657b (diff) |
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r-- | include/llvm/CodeGen/DIE.h | 13 | ||||
-rw-r--r-- | include/llvm/CodeGen/GlobalISel/InstructionSelector.h | 34 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineOperand.h | 6 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 11 |
4 files changed, 56 insertions, 8 deletions
diff --git a/include/llvm/CodeGen/DIE.h b/include/llvm/CodeGen/DIE.h index 95c4b4248bbd0..a40147336fe2c 100644 --- a/include/llvm/CodeGen/DIE.h +++ b/include/llvm/CodeGen/DIE.h @@ -793,6 +793,9 @@ class DIEUnit { uint32_t Length; /// The length in bytes of all of the DIEs in this unit. const uint16_t Version; /// The Dwarf version number for this unit. const uint8_t AddrSize; /// The size in bytes of an address for this unit. +protected: + ~DIEUnit() = default; + public: DIEUnit(uint16_t Version, uint8_t AddrSize, dwarf::Tag UnitTag); DIEUnit(const DIEUnit &RHS) = delete; @@ -808,6 +811,10 @@ public: this->Section = Section; } + virtual const MCSymbol *getCrossSectionRelativeBaseAddress() const { + return nullptr; + } + /// Return the section that this DIEUnit will be emitted into. /// /// \returns Section pointer which can be NULL. @@ -822,7 +829,11 @@ public: const DIE &getUnitDie() const { return Die; } }; - +struct BasicDIEUnit final : DIEUnit { + BasicDIEUnit(uint16_t Version, uint8_t AddrSize, dwarf::Tag UnitTag) + : DIEUnit(Version, AddrSize, UnitTag) {} +}; + //===--------------------------------------------------------------------===// /// DIELoc - Represents an expression location. // diff --git a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h index 911e8756070b2..899563acc330b 100644 --- a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h +++ b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h @@ -18,20 +18,52 @@ #include "llvm/ADT/Optional.h" #include <cstdint> +#include <bitset> +#include <functional> namespace llvm { class MachineInstr; +class MachineInstrBuilder; +class MachineFunction; class MachineOperand; class MachineRegisterInfo; class RegisterBankInfo; class TargetInstrInfo; class TargetRegisterInfo; +/// Container class for CodeGen predicate results. +/// This is convenient because std::bitset does not have a constructor +/// with an initializer list of set bits. +/// +/// Each InstructionSelector subclass should define a PredicateBitset class with: +/// const unsigned MAX_SUBTARGET_PREDICATES = 192; +/// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>; +/// and updating the constant to suit the target. Tablegen provides a suitable +/// definition for the predicates in use in <Target>GenGlobalISel.inc when +/// GET_GLOBALISEL_PREDICATE_BITSET is defined. +template <std::size_t MaxPredicates> +class PredicateBitsetImpl : public std::bitset<MaxPredicates> { +public: + // Cannot inherit constructors because it's not supported by VC++.. + PredicateBitsetImpl() = default; + + PredicateBitsetImpl(const std::bitset<MaxPredicates> &B) + : std::bitset<MaxPredicates>(B) {} + + PredicateBitsetImpl(std::initializer_list<unsigned> Init) { + for (auto I : Init) + std::bitset<MaxPredicates>::set(I); + } +}; + /// Provides the logic to select generic machine instructions. class InstructionSelector { public: virtual ~InstructionSelector() {} + /// This is executed before selecting a function. + virtual void beginFunction(const MachineFunction &MF) {} + /// Select the (possibly generic) instruction \p I to only use target-specific /// opcodes. It is OK to insert multiple instructions, but they cannot be /// generic pre-isel instructions. @@ -46,6 +78,8 @@ public: virtual bool select(MachineInstr &I) const = 0; protected: + typedef std::function<void(MachineInstrBuilder &)> ComplexRendererFn; + InstructionSelector(); /// Mutate the newly-selected instruction \p I to constrain its (possibly diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index 81b43126adeba..e163540882968 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -65,7 +65,6 @@ public: MO_CFIIndex, ///< MCCFIInstruction index. MO_IntrinsicID, ///< Intrinsic ID for ISel MO_Predicate, ///< Generic predicate for ISel - MO_Placeholder, ///< Placeholder for GlobalISel ComplexPattern result. }; private: @@ -768,11 +767,6 @@ public: return Op; } - static MachineOperand CreatePlaceholder() { - MachineOperand Op(MachineOperand::MO_Placeholder); - return Op; - } - friend class MachineInstr; friend class MachineRegisterInfo; private: diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 6f0509543e7d8..4bb658898fb55 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -654,6 +654,15 @@ public: return getNode(ISD::BUILD_VECTOR, DL, VT, Ops); } + /// Return an ISD::BUILD_VECTOR node. The number of elements in VT, + /// which must be a vector type, must match the number of operands in Ops. + /// The operands must have the same type as (or, for integers, a type wider + /// than) VT's element type. + SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDUse> Ops) { + // VerifySDNode (via InsertNode) checks BUILD_VECTOR later. + return getNode(ISD::BUILD_VECTOR, DL, VT, Ops); + } + /// Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all /// elements. VT must be a vector type. Op's type must be the same as (or, /// for integers, a type wider than) VT's element type. @@ -968,7 +977,7 @@ public: bool IsExpanding = false); SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, - MachineMemOperand *MMO, bool IsTruncating = false, + MachineMemOperand *MMO, bool IsTruncating = false, bool IsCompressing = false); SDValue getMaskedGather(SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef<SDValue> Ops, MachineMemOperand *MMO); |