vendor/llvm/llvm-trunk-r239412

1 files changed, 12 insertions, 4 deletions

diff --git a/include/llvm/MC/MCInstrDesc.h b/include/llvm/MC/MCInstrDesc.h
index de3a1959e05c9..3209a2ce04083 100644
--- a/include/llvm/MC/MCInstrDesc.h
+++ b/include/llvm/MC/MCInstrDesc.h
@@ -125,7 +125,8 @@ enum Flag {
   ExtraDefRegAllocReq,
   RegSequence,
   ExtractSubreg,
-  InsertSubreg
+  InsertSubreg,
+  Convergent
 };
 }
 
@@ -138,10 +139,10 @@ class MCInstrDesc {
 public:
   unsigned short Opcode;        // The opcode number
   unsigned short NumOperands;   // Num of args (may be more if variable_ops)
-  unsigned short NumDefs;       // Num of args that are definitions
+  unsigned char NumDefs;        // Num of args that are definitions
+  unsigned char Size;           // Number of bytes in encoding.
   unsigned short SchedClass;    // enum identifying instr sched class
-  unsigned short Size;          // Number of bytes in encoding.
-  unsigned Flags;               // Flags identifying machine instr class
+  uint64_t Flags;               // Flags identifying machine instr class
   uint64_t TSFlags;             // Target Specific Flag values
   const uint16_t *ImplicitUses; // Registers implicitly read by this instr
   const uint16_t *ImplicitDefs; // Registers implicitly defined by this instr
@@ -331,6 +332,13 @@ public:
   /// override accordingly.
   bool isInsertSubregLike() const { return Flags & (1 << MCID::InsertSubreg); }
 
+
+  /// \brief Return true if this instruction is convergent.
+  ///
+  /// Convergent instructions may only be moved to locations that are
+  /// control-equivalent to their original positions.
+  bool isConvergent() const { return Flags & (1 << MCID::Convergent); }
+
   //===--------------------------------------------------------------------===//
   // Side Effect Analysis
   //===--------------------------------------------------------------------===//