diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
commit | 01095a5d43bbfde13731688ddcf6048ebb8b7721 (patch) | |
tree | 4def12e759965de927d963ac65840d663ef9d1ea /include/llvm/MC/MCSchedule.h | |
parent | f0f4822ed4b66e3579e92a89f368f8fb860e218e (diff) |
Diffstat (limited to 'include/llvm/MC/MCSchedule.h')
-rw-r--r-- | include/llvm/MC/MCSchedule.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/llvm/MC/MCSchedule.h b/include/llvm/MC/MCSchedule.h index d7f9b69a9a2cc..37728797f626a 100644 --- a/include/llvm/MC/MCSchedule.h +++ b/include/llvm/MC/MCSchedule.h @@ -165,9 +165,6 @@ struct MCSchedModel { static const unsigned DefaultLoopMicroOpBufferSize = 0; // LoadLatency is the expected latency of load instructions. - // - // If MinLatency >= 0, this may be overriden for individual load opcodes by - // InstrItinerary OperandCycles. unsigned LoadLatency; static const unsigned DefaultLoadLatency = 4; @@ -175,7 +172,6 @@ struct MCSchedModel { // See TargetInstrInfo::isHighLatencyDef(). // By default, this is set to an arbitrarily high number of cycles // likely to have some impact on scheduling heuristics. - // If MinLatency >= 0, this may be overriden by InstrItinData OperandCycles. unsigned HighLatency; static const unsigned DefaultHighLatency = 10; |