diff options
author | Roman Divacky <rdivacky@FreeBSD.org> | 2009-12-01 11:07:05 +0000 |
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committer | Roman Divacky <rdivacky@FreeBSD.org> | 2009-12-01 11:07:05 +0000 |
commit | 06f9d4012fb8acea3e9861d5722b5965dbb724d9 (patch) | |
tree | ffe0478472eaa0686f11cb02c6df7d257b8719b0 /include/llvm/Target/TargetInstrInfo.h | |
parent | 76e2e0ebfdd3d91b07a75822865ea3e9121a99ce (diff) |
Notes
Diffstat (limited to 'include/llvm/Target/TargetInstrInfo.h')
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 43fd54e183a99..1ba6b2f299924 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -514,6 +514,13 @@ public: return false; } + /// isPredicable - Return true if the specified instruction can be predicated. + /// By default, this returns true for every instruction with a + /// PredicateOperand. + virtual bool isPredicable(MachineInstr *MI) const { + return MI->getDesc().isPredicable(); + } + /// isSafeToMoveRegClassDefs - Return true if it's safe to move a machine /// instruction that defines the specified register class. virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const { @@ -536,13 +543,6 @@ public: /// length. virtual unsigned getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const; - - /// TailDuplicationLimit - Returns the limit on the number of instructions - /// in basic block MBB beyond which it will not be tail-duplicated. - virtual unsigned TailDuplicationLimit(const MachineBasicBlock &MBB, - unsigned DefaultLimit) const { - return DefaultLimit; - } }; /// TargetInstrInfoImpl - This is the default implementation of |