diff options
author | Roman Divacky <rdivacky@FreeBSD.org> | 2009-10-23 14:19:52 +0000 |
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committer | Roman Divacky <rdivacky@FreeBSD.org> | 2009-10-23 14:19:52 +0000 |
commit | 4a142eb28942073eb27a112b5ca1cca3f01beb9c (patch) | |
tree | 22cc59e4b240d84c3a5a60531119c4eca914a256 /include/llvm/Target | |
parent | 5cd822fa9bbb9622241e3bf4d7674ed49ccde5b9 (diff) |
Notes
Diffstat (limited to 'include/llvm/Target')
-rw-r--r-- | include/llvm/Target/TargetIntrinsicInfo.h | 34 | ||||
-rw-r--r-- | include/llvm/Target/TargetMachine.h | 7 | ||||
-rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 15 | ||||
-rw-r--r-- | include/llvm/Target/TargetRegistry.h | 11 | ||||
-rw-r--r-- | include/llvm/Target/TargetSubtarget.h | 17 |
5 files changed, 42 insertions, 42 deletions
diff --git a/include/llvm/Target/TargetIntrinsicInfo.h b/include/llvm/Target/TargetIntrinsicInfo.h index c14275f52a4ce..d70aa7e9fdf7b 100644 --- a/include/llvm/Target/TargetIntrinsicInfo.h +++ b/include/llvm/Target/TargetIntrinsicInfo.h @@ -25,35 +25,21 @@ class Type; /// TargetIntrinsicInfo - Interface to description of machine instruction set /// class TargetIntrinsicInfo { - - const char **Intrinsics; // Raw array to allow static init'n - unsigned NumIntrinsics; // Number of entries in the desc array - - TargetIntrinsicInfo(const TargetIntrinsicInfo &); // DO NOT IMPLEMENT - void operator=(const TargetIntrinsicInfo &); // DO NOT IMPLEMENT + TargetIntrinsicInfo(const TargetIntrinsicInfo &); // DO NOT IMPLEMENT + void operator=(const TargetIntrinsicInfo &); // DO NOT IMPLEMENT public: - TargetIntrinsicInfo(const char **desc, unsigned num); + TargetIntrinsicInfo(); virtual ~TargetIntrinsicInfo(); - unsigned getNumIntrinsics() const { return NumIntrinsics; } - - virtual Function *getDeclaration(Module *M, const char *BuiltinName) const { - return 0; - } - - // Returns the Function declaration for intrinsic BuiltinName. If the - // intrinsic can be overloaded, uses Tys to return the correct function. - virtual Function *getDeclaration(Module *M, const char *BuiltinName, - const Type **Tys, unsigned numTys) const { - return 0; - } + /// Return the name of a target intrinsic, e.g. "llvm.bfin.ssync". + virtual const char *getName(unsigned IntrID) const =0; - // Returns true if the Builtin can be overloaded. - virtual bool isOverloaded(Module *M, const char *BuiltinName) const { - return false; - } + /// Look up target intrinsic by name. Return intrinsic ID or 0 for unknown + /// names. + virtual unsigned lookupName(const char *Name, unsigned Len) const =0; - virtual unsigned getIntrinsicID(Function *F) const { return 0; } + /// Return the target intrinsic ID of a function, or 0. + virtual unsigned getIntrinsicID(Function *F) const; }; } // End llvm namespace diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 92b648cbb0a94..11046359dbbef 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -74,9 +74,10 @@ namespace FileModel { // Code generation optimization level. namespace CodeGenOpt { enum Level { - Default, - None, - Aggressive + None, // -O0 + Less, // -O1 + Default, // -O2, -Os + Aggressive // -O3 }; } diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index e90fc6cccc3d4..b7e8af972f49e 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -641,24 +641,17 @@ public: virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF) const { } - /// saveScavengerRegister - Save the register so it can be used by the - /// register scavenger. Return true if the register was saved, false - /// otherwise. If this function does not save the register, the scavenger + /// saveScavengerRegister - Spill the register so it can be used by the + /// register scavenger. Return true if the register was spilled, false + /// otherwise. If this function does not spill the register, the scavenger /// will instead spill it to the emergency spill slot. /// virtual bool saveScavengerRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, + MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const {return false;} - /// restoreScavengerRegister - Restore a register saved by - /// saveScavengerRegister(). - /// - virtual void restoreScavengerRegister(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - const TargetRegisterClass *RC, - unsigned Reg) const {} - /// eliminateFrameIndex - This method must be overriden to eliminate abstract /// frame indices from instructions which may use them. The instruction /// referenced by the iterator contains an MO_FrameIndex operand which must be diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h index 8042d2363677b..395526fa39422 100644 --- a/include/llvm/Target/TargetRegistry.h +++ b/include/llvm/Target/TargetRegistry.h @@ -387,6 +387,15 @@ namespace llvm { T.MCDisassemblerCtorFn = Fn; } + /// RegisterMCInstPrinter - Register a MCInstPrinter implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an MCInstPrinter for the target. static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn) { if (!T.MCInstPrinterCtorFn) @@ -395,7 +404,7 @@ namespace llvm { /// RegisterCodeEmitter - Register a MCCodeEmitter implementation for the /// given target. - /// + /// /// Clients are responsible for ensuring that registration doesn't occur /// while another thread is attempting to access the registry. Typically /// this is done by initializing all targets at program startup. diff --git a/include/llvm/Target/TargetSubtarget.h b/include/llvm/Target/TargetSubtarget.h index ac094f6644195..fd107e074cba4 100644 --- a/include/llvm/Target/TargetSubtarget.h +++ b/include/llvm/Target/TargetSubtarget.h @@ -14,6 +14,8 @@ #ifndef LLVM_TARGET_TARGETSUBTARGET_H #define LLVM_TARGET_TARGETSUBTARGET_H +#include "llvm/Target/TargetMachine.h" + namespace llvm { class SDep; @@ -31,6 +33,10 @@ class TargetSubtarget { protected: // Can only create subclasses... TargetSubtarget(); public: + // AntiDepBreakMode - Type of anti-dependence breaking that should + // be performed before post-RA scheduling. + typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBreakMode; + virtual ~TargetSubtarget(); /// getSpecialAddressLatency - For targets where it is beneficial to @@ -39,9 +45,14 @@ public: /// should be attempted. virtual unsigned getSpecialAddressLatency() const { return 0; } - // enablePostRAScheduler - Return true to enable - // post-register-allocation scheduling. - virtual bool enablePostRAScheduler() const { return false; } + // enablePostRAScheduler - If the target can benefit from post-regalloc + // scheduling and the specified optimization level meets the requirement + // return true to enable post-register-allocation scheduling. + virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, + AntiDepBreakMode& mode) const { + mode = ANTIDEP_NONE; + return false; + } // adjustSchedDependency - Perform target specific adjustments to // the latency of a schedule dependency. |