diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2010-10-30 23:02:32 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2010-10-30 23:02:32 +0000 |
| commit | b3cded65e92ba4d9b5e5a33fb95c4d551bda9c1b (patch) | |
| tree | 69d40fbef2c0c4ee32fe97b7a28b510f2e3c2dbc /ld/testsuite | |
| parent | 7a815afd9b5121ee0f65dc1e1de1c0de6de97679 (diff) | |
Notes
Diffstat (limited to 'ld/testsuite')
657 files changed, 22310 insertions, 11600 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 521747d7622df..7cb33ce748391 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,380 +1,591 @@ -2006-07-12 Richard Sandiford <richard@codesourcery.com> +2007-07-02 Nathan Sidwell <nathan@codesourcery.com> - * ld-m68k/merge-ok-1c.d: New test. - * ld-m68k/m68k.exp: Run it. + * ld-scripts/alignof.exp: Skip on non-elf -2006-07-04 Daniel Jacobowitz <dan@codesourcery.com> +2007-06-29 Joseph Myers <joseph@codesourcery.com> - Backport: - 2006-05-19 Alan Modra <amodra@bigpond.net.au> - * ld-scripts/empty-orphan.d: Update again. + * ld-powerpc/attr-gnu-4-0.s, ld-powerpc/attr-gnu-4-00.d, + ld-powerpc/attr-gnu-4-01.d, ld-powerpc/attr-gnu-4-02.d, + ld-powerpc/attr-gnu-4-1.s, ld-powerpc/attr-gnu-4-10.d, + ld-powerpc/attr-gnu-4-11.d, ld-powerpc/attr-gnu-4-12.d, + ld-powerpc/attr-gnu-4-13.d, ld-powerpc/attr-gnu-4-2.s, + ld-powerpc/attr-gnu-4-20.d, ld-powerpc/attr-gnu-4-21.d, + ld-powerpc/attr-gnu-4-22.d, ld-powerpc/attr-gnu-4-3.s, + ld-powerpc/attr-gnu-4-31.d: New. + * ld-powerpc/powerpc.exp: Run these new tests. - * ld-scripts/empty-orphan.t: Discard .reginfo. - * ld-scripts/empty-orphan.d: Update. +2007-06-29 Joseph Myers <joseph@codesourcery.com> -2006-06-12 Daniel Jacobowitz <dan@codesourcery.com> + * ld-mips-elf/attr-gnu-4-0.s, ld-mips-elf/attr-gnu-4-00.d, + ld-mips-elf/attr-gnu-4-01.d, ld-mips-elf/attr-gnu-4-02.d, + ld-mips-elf/attr-gnu-4-03.d, ld-mips-elf/attr-gnu-4-1.s, + ld-mips-elf/attr-gnu-4-10.d, ld-mips-elf/attr-gnu-4-11.d, + ld-mips-elf/attr-gnu-4-12.d, ld-mips-elf/attr-gnu-4-13.d, + ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-2.s, + ld-mips-elf/attr-gnu-4-20.d, ld-mips-elf/attr-gnu-4-21.d, + ld-mips-elf/attr-gnu-4-22.d, ld-mips-elf/attr-gnu-4-23.d, + ld-mips-elf/attr-gnu-4-3.s, ld-mips-elf/attr-gnu-4-30.d, + ld-mips-elf/attr-gnu-4-31.d, ld-mips-elf/attr-gnu-4-32.d, + ld-mips-elf/attr-gnu-4-33.d, ld-mips-elf/attr-gnu-4-4.s, + ld-mips-elf/attr-gnu-4-41.d: New. + * ld-mips-elf/mips-elf.exp: Run these new tests. - Backport: - 2006-04-29 H.J. Lu <hongjiu.lu@intel.com> - * ld-elfvers/vers.exp: Xfail vers7a, vers7, vers23a, vers23b, - vers23c, vers23d, vers23, vers25a, vers25b1, vers25b2, vers27a, - vers27b, vers27c1, vers27c2, vers27d4 and vers27d5 if PIC is - required. +2007-06-29 Paul Brook <paul@codesourcery.com> -2006-06-11 Richard Sandiford <richard@codesourcery.com> + * ld-arm/arm-elf.exp (armelftests): Add callweak. + * ld-arm/callweak.d: New test. + * ld-arm/callweak.s: New test. - * ld-mips-elf/stub-dynsym-1.s, - * ld-mips-elf/stub-dynsym-1.ld, - * ld-mips-elf/stub-dynsym-1-7fff.d, - * ld-mips-elf/stub-dynsym-1-8000.d, - * ld-mips-elf/stub-dynsym-1-fff0.d, - * ld-mips-elf/stub-dynsym-1-10000.d, - * ld-mips-elf/stub-dynsym-1-2fe80.d: New test. - * ld-mips-elf/mips-elf.exp: Run it. +2007-06-28 H.J. Lu <hongjiu.lu@intel.com> -2006-06-01 Daniel Jacobowitz <dan@codesourcery.com> + PR ld/4701 + * ld-elf/noload-2.d: New. - Backport: - 2006-05-23 H.J. Lu <hongjiu.lu@intel.com> - PR ld/2655 - PR ld/2657 - * ld-elf/eh1.d: New file. - * ld-elf/eh1.s: Likewise. - * ld-elf/eh1a.s: Likewise. - * ld-elf/eh2.d: Likewise. - * ld-elf/eh2a.s: Likewise. - * ld-elf/eh3.d: Likewise. - * ld-elf/eh3.s: Likewise. - * ld-elf/eh3a.s: Likewise. +2007-06-29 H.J. Lu <hjl@gnu.org> -2006-05-22 Nick Clifton <nickc@redhat.com> + * ld-scripts/assert.t: Discard .reginfo sections. - * ld-elf/start.s (start): Add this symbol for SH targets. - (main): Add this symbol for HPPA targets. +2007-06-26 Joseph Myers <joseph@codesourcery.com> -2006-05-17 Daniel Jacobowitz <dan@codesourcery.com> + * ld-arm/attr-merge.s, ld-arm/attr-merge.attr: New. + * ld-arm/arm-elf.exp (armelftests): Add new test. - Backport: - 2006-05-02 H.J. Lu <hongjiu.lu@intel.com> - * ld-cdtest/cdtest-foo.cc (Foo::Foo): Add const to char *. - * ld-cdtest/cdtest-foo.h (Foo::Foo): Likewise. - * ld-srec/sr3.cc (Foo::Foo): Likewise. +2007-06-25 Richard Sandiford <richard@codesourcery.com> -2006-05-17 Thiemo Seufer <ths@mips.com> + * ld-mips-elf/mips16-local-stubs-1.s, + * ld-mips-elf/mips16-local-stubs-1.d: New tests. + * ld-mips-elf/mips-elf.exp: Run them. - * ld-elfweak/size2.d, ld-elfweak/size2a.s, ld-elfweak/size2b.s: - Add __start as entry symbol. +2007-06-19 H.J. Lu <hongjiu.lu@intel.com> -2006-05-16 Thiemo Seufer <ths@mips.com> + PR ld/4590 + * ld-ia64/merge1.d: New. + * ld-ia64/merge1.s: Likewise. + * ld-ia64/merge2.d: Likewise. + * ld-ia64/merge2.s: Likewise. + * ld-ia64/merge3.d: Likewise. + * ld-ia64/merge3.s: Likewise. + * ld-ia64/merge4.d: Likewise. + * ld-ia64/merge4.s: Likewise. + * ld-ia64/merge5.d: Likewise. + * ld-ia64/merge5.s: Likewise. - * ld-elf/orphan.ld: Add placement for MIPS .reginfo section. +2007-06-18 Andreas Schwab <schwab@suse.de> -2006-05-10 Thiemo Seufer <ths@debian.org> + * ld-scripts/cross3.t: Add .opd section. - * ld-elf/sec64k.exp: Extend for MIPS ELF. +2007-06-18 Nathan Sidwell <nathan@codesourcery.com> -2006-05-10 Alan Modra <amodra@bigpond.net.au> + * ld-scripts/alignof.s: New. + * ld-scripts/alignof.t: New + * ld-scripts/alignof.exp: New. - * ld-powerpc/tlsexetoc.r: Update for correction to tls optimization. - * ld-powerpc/tlsexetoc.g: Likewise. +2007-06-14 Alan Modra <alan@grove.modra.org> -2006-05-02 Paul Brook <paul@codesourcery.com> + * ld-spu/ovl.d: Update. + * ld-spu/ovl2.d: Update. - * ld-arm/arm-elf.exp: Add thumb-rel32. - * ld-arm/thumb-rel32.d: New test. - * ld-arm/thumb-rel32.s: New test. +2007-05-24 Nathan Sidwell <nathan@codesourcery.com> -2006-04-05 Richard Sandiford <richard@codesourcery.com> + * ld-scripts/assert.t: Add additional cases. + * ld-scripts/extern.t, ld-scripts/extern.s, + ld-scripts/extern.exp: New. - * ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd, - * ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd, - * ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s, - * ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s, - * ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests. - * ld-sparc/sparc.exp: Run them. +2007-05-22 Paul Brook <paul@codesourcery.com> -2006-04-05 Ben Elliston <bje@au.ibm.com> + * ld-arm/arm-pic-veneer.d: Update expected output. + * ld-arm/arm-call.d: Ditto. - * lib/ld-lib.exp: Comment cleanups. +2007-05-22 Paul Brook <paul@codesourcery.com> -2006-03-27 Richard Sandiford <richard@codesourcery.com> + * ld-arm-mixed-lib.d: Update expected output. + * ld-arm/arm-app.d: Ditto. + * ld-arm/mixed-app.d: Ditto. + * ld-arm/arm-lib-plt32.d: Ditto. + * ld-arm/arm-app-abs32.d: Ditto. + * ld-arm/mixed-app-v5.d: Ditto. + * ld-arm/armthumb-lib.d: Ditto. + * ld-arm/arm-lib.d: Ditto. - * ld-mips-elf/tls-hidden3a.s, ld-mips-elf/tls-hidden3b.s, - * ld-mips-elf/tls-hidden3.d, ld-mips-elf/tls-hidden3.got, - * ld-mips-elf/tls-hidden3.ld, ld-mips-elf/tls-hidden3.r, - * ld-mips-elf/tls-hidden4a.s, ld-mips-elf/tls-hidden4b.s, - * ld-mips-elf/tls-hidden4.got, ld-mips-elf/tls-hidden4.r: New tests. - * ld-mips-elf/mips-elf.exp: Run them. +2007-05-21 Richard Sandiford <richard@codesourcery.com> -2006-03-25 Richard Sandiford <richard@codesourcery.com> + * ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s, + * ld-arm/emit-relocs1-vxworks.d: New tests. + * ld-arm/arm-elf.exp: Run them. + * ld-arm/vxworks1.dd: Expect proper branch targets. - * ld-m68k/merge-error-1a.s, ld-m68k/merge-error-1b.s, - * ld-m68k/merge-error-1a.d, ld-m68k/merge-error-1b.d, - * ld-m68k/merge-error-1c.d, ld-m68k/merge-error-1d.d, - * ld-m68k/merge-error-1e.d, ld-m68k/merge-ok-1a.d, - * ld-m68k/merge-ok-1b.d: New tests. - * ld-m68k/m68k.exp: Run them. +2007-05-18 Joseph Myers <joseph@codesourcery.com> -2006-03-22 Richard Sandiford <richard@codesourcery.com> + * ld-elf/group.ld: Discard .reginfo. - * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, - * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, - * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, - * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, - * ld-mips/vxworks2-static.sd: New tests. - * ld-mips/mips-elf.exp: Run them. +2007-05-18 Paul Brook <paul@codesourcery.com> -2006-03-17 Alexandre Oliva <aoliva@redhat.com> + * ld-arm/arm-call.d: Update expected output. - * ld-powerpc/tls32.s: Verify that +32768 @plt addend is - discarded. +2007-05-17 Paul Brook <paul@codesourcery.com> -2006-03-14 Richard Sandiford <richard@codesourcery.com> + * ld-elf/multibss1.s: Use %nobits instead of @nobits. - * ld-mips/emit-relocs-1a.s, ld-mips/emit-relocs-1b.s, - * ld-mips/emit-relocs-1.ld, ld-mips/emit-relocs-1.d: New test. - * ld-mips/mips-elf.exp: Run it. +2007-05-17 Nathan Sidwell <nathan@codesourcery.com> -2006-03-07 Richard Sandiford <richard@codesourcery.com> + * ld-m68k/merge-error-1a.d: Mismatch is an error. + * ld-m68k/merge-error-1b.d: Likewise. + * ld-m68k/merge-error-1c.d: Likewise. + * ld-m68k/merge-error-1d.d: Likewise. + * ld-m68k/merge-error-1e.d: Likewise. - * ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd, - * ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd, - * ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s, - * ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd, - * ld-arm/vxworks2-static.sd: New tests. - * ld-arm/arm-elf.exp: Run them. +2007-05-15 H.J. Lu <hongjiu.lu@intel.com> -2006-03-06 Nathan Sidwell <nathan@codesourcery.com> + PR ld/4504 + * ld-elf/data1.c: New file. + * ld-elf/data1.h: Likewise. + * ld-elf/dynbss1.c: Likewise. + * ld-elf/pass.out: Likewise. - * ld-m68k: New tests. + * ld-elf/shared.exp (build_tests): Add "Build libdata1.so". + (run_tests): Add "Run with libdata1.so". -2006-03-03 Richard Sandiford <richard@codesourcery.com> +2007-05-15 Richard Sandiford <richard@codesourcery.com> - * ld-i386/vxworks1-static.d, ld-i386/vxworks2.s, - * ld-i386/vxworks2.sd, ld-i386/vxworks2-static.sd: New tests. - * ld-i386/i386.exp: Run them. - * ld-powerpc/vxworks1-static.d, ld-powerpc/vxworks2.s, - * ld-powerpc/vxworks2.sd, ld-powerpc/vxworks2-static.sd: New tests. - * ld-powerpc/powerpc.exp: Run them. + * ld-arm/vxworks1.ld: Swap .bss and .data. + * ld-arm/vxworks1-lib.rd: Update accordingly. + * ld-arm/vxworks1-lib.td: New test. + * ld-arm/arm-elf.exp: Run it. -2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-i386/vxworks1.ld: Swap .bss and .data. + * ld-i386/vxworks1-lib.rd: Update accordingly. + * ld-i386/vxworks1-lib.td: New test. + * ld-i386/i386.exp: Run it. - * ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000. - * ld-powerpc/vxworks1.dd: Update accordingly. - * ld-powerpc/vxworks1-lib.nd: Likewise. - * ld-powerpc/vxworks1-lib.rd: Likewise. - * ld-powerpc/vxworks1.rd: Likewise. + * ld-mips-elf/vxworks1.ld: Swap .bss and .data. + * ld-mips-elf/vxworks1-lib.rd: Update accordingly. + * ld-mips-elf/vxworks1.rd: Likewise. -2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-powerpc/vxworks1.ld: Swap .bss and .data. + * ld-powerpc/vxworks1-lib.rd: Update accordingly. + * ld-powerpc/vxworks1-lib.td: New test. + * ld-powerpc/powerpc.exp: Run it. - * ld-i386/vxworks1.ld (.data): New section. - * ld-i386/vxworks1-lib.s: Add a pointer to a local symbol. - * ld-i386/vxworks1-lib.rd: Test for the associated reloc. - * ld-powerpc/vxworks1.ld (.data): New section. - * ld-powerpc/vxworks1-lib.s: Add a pointer to a local symbol. - * ld-powerpc/vxworks1-lib.rd: Test for the associated reloc. + * ld-sh/vxworks1.ld: Swap .bss and .data. + * ld-sh/vxworks1-lib.rd: Update accordingly. + * ld-sh/vxworks1-lib.td: New test. + * ld-sh/sh-vxworks.exp: Run it. -2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-sparc/vxworks1.ld: Swap .bss and .data. + * ld-sparc/vxworks1-lib.rd: Update accordingly. + * ld-sparc/vxworks1-lib.td: New test. + * ld-sparc/sparc.exp: Run it. - * ld-i386/ld-i386/vxworks1-lib.nd: New test. - * ld-i386/i386.exp: Run it. - * ld-powerpc/ld-powerpc/vxworks1-lib.nd: New test. - * ld-powerpc/powerc.exp: Run it. +2007-05-15 Richard Sandiford <richard@codesourcery.com> -2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-mips-elf/vxworks1-lib.rd: Expect the GOT relocation to be + against symbol 0. - * ld-i386/vxworks1.ld: Use bigger alignments. Make sure .bss isn't - placed as an orphan. - * ld-i386/vxworks1-lib.dd, ld-i386/vxworks1.dd, - * ld-i386/vxworks1.rd: Update accordingly. - * ld-i386/vxworks1-lib.rd: Likewise. Remove symbol indexes. +2007-05-15 Mark Shinwell <shinwell@codesourcery.com> -2006-03-02 Richard Sandiford <richard@codesourcery.com> + * ld-arm/arm-elf.exp: Add jump19 testcase. + * ld-arm/jump19.d: New. + * ld-arm/jump19.s: New. - * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, - * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, - * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, - * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. - * ld-powerpc/powerpc.exp: Run it. +2007-05-14 Richard Sandiford <richard@codesourcery.com> -2006-02-28 Richard Sandiford <richard@codesourcery.com> + * ld-sh/vxworks1.dd: Remove hexadecimal prefixes from constant pool + contents. Consistently use "!" as the comment character. + Consistently use _PROCEDURE_LINKAGE_TABLE_ in the first PLT entry. + * ld-sh/vxworks1-le.dd: Likewise. + * ld-sh/vxworks1-lib.dd: Likewise. + * ld-sh/vxworks1-lib-le.dd: Likewise. + * ld-sh/vxworks3.dd: Likewise. + * ld-sh/vxworks3-le.dd: Likewise. - * ld-i386/vxworks1-lib.s, ld-i386/vxworks1-lib.dd, - * ld-i386/vxworks1-lib.rd, ld-i386/vxworks1.s, ld-i386/vxworks1.dd, - * ld-i386/vxworks1.rd, ld-i386/vxworks1.ld: New test. - * ld-i386/i386.exp: Run it. +2007-05-14 Andreas Schwab <schwab@suse.de> -2006-02-28 Richard Sandiford <richard@codesourcery.com> + * ld-elf/dl2a.list: New file. + * ld-elf/shared.exp: Add test using --dynamic-list=dl2a.list. - * ld-i386/emit-relocs.s, ld-i386/emit-relocs.d: New test. - * ld-i386/i386.exp: Run it. +2007-05-10 Richard Sandiford <richard@codesourcery.com> + + * ld-arm/vxworks1-lib.dd: Expect "push" instead of stmdb and + "pop" instead of ldmia. Don't require specific symbolic addresses + for in-text addresses. Expect data to be rendered as .words rather + than disassembled. + * ld-arm/vxworks1.dd: Likewise. -2006-02-23 H.J. Lu <hongjiu.lu@intel.com> +2007-05-10 Richard Sandiford <richard@codesourcery.com> - * ld-pie/weakundef-data.c: Fix the typo. + * ld-elf/multibss1.d, ld-elf/multibss1.s: New test. -2006-02-22 H.J. Lu <hongjiu.lu@intel.com> +2007-04-27 Nathan Sidwell <nathan@codesourcery.com> - * ld-pie/pie.c: New file. + * ld-m68k/plt1-isac.d: New. + * ld-m68k/m68k.exp: Add it. - * ld-pie/pie.exp: Check if compiler supports -pie. +2007-04-26 H.J. Lu <hongjiu.lu@intel.com> -2006-02-20 H.J. Lu <hongjiu.lu@intel.com> + PR binutils/4430 + * ld-i386/tlsbin.dd: Updated. + * ld-i386/tlsbindesc.dd: Likewise + * ld-i386/tlsdesc.dd: Likewise + * ld-i386/tlsgdesc.dd: Likewise + * ld-i386/tlsnopic.dd: Likewise + * ld-i386/tlspic.dd: Likewise + * ld-x86-64/tlsbin.dd: Likewise + * ld-x86-64/tlsbindesc.dd: Likewise + * ld-x86-64/tlsdesc.dd: Likewise + * ld-x86-64/tlsgdesc.dd: Likewise + * ld-x86-64/tlspic.dd: Likewise - PR ld/2218 - * ld-pie/pie.exp: Add the weak undefined data test. +2007-04-24 Alan Modra <amodra@bigpond.net.au> - * ld-pie/weakundef-data.c: New file. + * ld-linkonce/x.s: Use .gcc_except_table instead of .eh_frame + to test that entry for deleted function is zeroed. Add a + somewhat closer to normal .eh_frame to test that fde for + deleted function is removed. + * ld-linkonce/y.s: Likewise. + * ld-linkonce/zeroeh.ld: Place .gcc_except_table too. + * ld-linkonce/zeroehl32.d: Update. -2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> - Anil Paranjape <anilp1@kpitcummins.com> - Shilin Shakti <shilins@kpitcummins.com> +2007-04-21 Richard Earnshaw <rearnsha@arm.com> - * ld-xc16x: New directory. - * ld-xc16x/absrel.d: New file. - * ld-xc16x/absrel.s: New file. - * ld-xc16x/offset.d: New file. - * ld-xc16x/offset.s: New file. - * ld-xc16x/pcreloc.d: New file. - * ld-xc16x/pcreloc.s: New file. - * ld-xc16x/xc16x.exp: New file. + * ld-arm/arm-app-abs32.d: Convert to unified syntax. + * ld-arm/arm-app.d: Likewise. + * ld-arm/arm-lib-plt32.d: Likewise. + * ld-arm/arm-lib.d: Likewise. + * ld-arm/arm-static-app.d: Likewise. + * ld-arm/armthumb-lib.d: Likewise. + * ld-arm/mixed-app-v5.d: Likewise. + * ld-arm/mixed-app.d: Likewise. + * ld-arm/mixed-lib.d: Likewise. -2006-02-07 Paul Brook <paul@codesourcery.com> +2007-04-18 Alan Modra <amodra@bigpond.net.au> - * ld-arm/arm-elf.exp: Add thumb-entry test. - * ld-arm/thumb-entry.d: New test. - * ld-arm/thumb-entry.s: New test. + * ld-spu/ovl.lnk: Use OVERLAY keyword. -2006-02-04 Richard Sandiford <richard@codesourcery.com> +2007-04-17 Paul Brook <paul@codesourcery.com> - * ld-mips-elf/tls-hidden2a.s, ld-mips-elf/tls-hidden2b.s, - * ld/testsuite/ld-mips-elf/tls-hidden2.d, - * ld/testsuite/ld-mips-elf/tls-hidden2-got.d: New test. + * ld-arm/preempt-app.s: New test. + * ld-arm/preempt-app.sym: New. + * ld-arm/arm-elf.exp: Add preempt-app. + +2007-04-12 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/vxworks1-lib.td: New test. * ld-mips-elf/mips-elf.exp: Run it. -2006-02-04 Richard Sandiford <richard@codesourcery.com> - - * ld-mips-elf/rel32-n32.d: Adjust for changes in linker behaviour. - * ld-mips-elf/rel32-o32.d: Likewise. - * ld-mips-elf/rel64.d: Likewise. - * ld-mips-elf/tls-multi-got-1.got: Likewise. - * ld-mips-elf/tls-multi-got-1.r: Likewise. - * ld-mips-elf/tlsdyn-o32-1.d: Likewise. - * ld-mips-elf/tlsdyn-o32-1.got: Likewise. - * ld-mips-elf/tlsdyn-o32-2.d: Likewise. - * ld-mips-elf/tlsdyn-o32-2.got: Likewise. - * ld-mips-elf/tlsdyn-o32-3.d: Likewise. - * ld-mips-elf/tlsdyn-o32-3.got: Likewise. - * ld-mips-elf/tlsdyn-o32.d: Likewise. - * ld-mips-elf/tlsdyn-o32.got: Likewise. - * ld-mips-elf/tlslib-o32-hidden.got: Likewise. - * ld-mips-elf/tlslib-o32-ver.got: Likewise. - * ld-mips-elf/tlslib-o32.got: Likewise. - -2006-02-02 H.J. Lu <hongjiu.lu@intel.com> - - * ld-i386/tlsbin.rd: Undo the last change. - * ld-i386/tlsbindesc.rd: Likewise. - * ld-i386/tlsdesc.rd: Likewise. - * ld-i386/tlsnopic.rd: Likewise. - * ld-i386/tlspic.rd: Likewise. - * ld-powerpc/tlsexe.r: Likewise. - * ld-powerpc/tlsexe32.r: Likewise. - * ld-powerpc/tlsexetoc.r: Likewise. - * ld-powerpc/tlsso.r: Likewise. - * ld-powerpc/tlsso32.r: Likewise. - * ld-powerpc/tlstocso.r: Likewise. - * ld-s390/tlsbin.rd: Likewise. - * ld-s390/tlsbin_64.rd: Likewise. - * ld-s390/tlspic.rd: Likewise. - * ld-s390/tlspic_64.rd: Likewise. - * ld-sh/tlsbin-2.d: Likewise. - * ld-sh/tlspic-2.d: Likewise. - * ld-x86-64/tlsbin.rd: Likewise. - * ld-x86-64/tlsbindesc.rd: Likewise. - * ld-x86-64/tlsdesc.rd: Likewise. - * ld-x86-64/tlspic.rd: Likewise. - -2006-02-02 H.J. Lu <hongjiu.lu@intel.com> - - * ld-i386/tlsbin.rd: Update for changed segment map. - * ld-i386/tlsbindesc.rd: Likewise. - * ld-i386/tlsdesc.rd: Likewise. - * ld-i386/tlsnopic.rd: Likewise. - * ld-i386/tlspic.rd: Likewise. - * ld-powerpc/tlsexe.r: Likewise. - * ld-powerpc/tlsexe32.r: Likewise. - * ld-powerpc/tlsexetoc.r: Likewise. - * ld-powerpc/tlsso.r: Likewise. - * ld-powerpc/tlsso32.r: Likewise. - * ld-powerpc/tlstocso.r: Likewise. - * ld-s390/tlsbin.rd: Likewise. - * ld-s390/tlsbin_64.rd: Likewise. - * ld-s390/tlspic.rd: Likewise. - * ld-s390/tlspic_64.rd: Likewise. - * ld-sh/tlsbin-2.d: Likewise. - * ld-sh/tlspic-2.d: Likewise. - * ld-x86-64/tlsbin.rd: Likewise. - * ld-x86-64/tlsbindesc.rd: Likewise. - * ld-x86-64/tlsdesc.rd: Likewise. - * ld-x86-64/tlspic.rd: Likewise. - -2006-01-31 Eric Botcazou <ebotcazou@libertysurf.fr> - - * ld-sparc/sparc.exp: Do not run 64-bit tests on Solaris 2.5.1 - and Solaris 2.6. - -2006-01-27 H.J. Lu <hongjiu.lu@intel.com> - - PR ld/2218 - * ld-pie/pie.exp: New file. - * ld-pie/weakundef.c: Likewise. - * ld-pie/weakundef.out: Likewise. - - * lib/ld-lib.exp (run_ld_link_exec_tests): Fix nesting. Support - building PIE and shared library. - -2006-01-18 Alexandre Oliva <aoliva@redhat.com> - - Introduce TLS descriptors for i386 and x86_64. - * ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*. - Add new tests. - * ld-i386/pcrel16.d: Add -melf_i386. - * ld-i386/pcrel8.d: Likewise. - * ld-i386/tlsbindesc.dd: New. - * ld-i386/tlsbindesc.rd: New. - * ld-i386/tlsbindesc.s: New. - * ld-i386/tlsbindesc.sd: New. - * ld-i386/tlsbindesc.td: New. - * ld-i386/tlsdesc.dd: New. - * ld-i386/tlsdesc.rd: New. - * ld-i386/tlsdesc.s: New. - * ld-i386/tlsdesc.sd: New. - * ld-i386/tlsdesc.td: New. - * ld-i386/tlsgdesc.dd: New. - * ld-i386/tlsgdesc.rd: New. - * ld-i386/tlsgdesc.s: New. - * ld-x86-64/x86-64.exp: Run new tests. - * ld-x86-64/tlsbindesc.dd: New. - * ld-x86-64/tlsbindesc.rd: New. - * ld-x86-64/tlsbindesc.s: New. - * ld-x86-64/tlsbindesc.sd: New. - * ld-x86-64/tlsbindesc.td: New. - * ld-x86-64/tlsdesc.dd: New. - * ld-x86-64/tlsdesc.pd: New. - * ld-x86-64/tlsdesc.rd: New. - * ld-x86-64/tlsdesc.s: New. - * ld-x86-64/tlsdesc.sd: New. - * ld-x86-64/tlsdesc.td: New. - * ld-x86-64/tlsgdesc.dd: New. - * ld-x86-64/tlsgdesc.rd: New. - * ld-x86-64/tlsgdesc.s: New. - -2006-01-03 Hans-Peter Nilsson <hp@bitrange.com> - - * ld-mmix/sec-1.d: Adjust for section order changes. - -For older changes see ChangeLog-2005 +2007-04-05 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/4304 + * ld-i386/i386.exp: Run "warn1". + + * ld-i386/warn1.d: New file. + * ld-i386/warn1.s: Likewise. + +2007-04-05 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/combreloc.d: Remove #target: i?86-*-*. + * ld-i386/reloc.d: Likewise. + +2007-04-05 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/ovl2.d: Update. + +2007-04-02 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/4090 + * ld-elf/expr1.d: New file. + * ld-elf/expr1.s: Likewise. + * ld-elf/expr1.t: Likewise. + +2007-03-29 Richard Sandiford <richard@codesourcery.com> + + * ld-libs/lib-1.s, ld-libs/lib-2.s, ld-libs/lib-2.d, + * ld-libs/libs.exp: New files. + +2007-03-28 Richard Sandiford <richard@codesourcery.com> + + * ld-vxworks/rpath-1.s, ld-vxworks/rpath-1.d, + * ld-vxworks/vxworks.exp: New files. + +2007-03-27 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/note-1.s: Increase .foo size. + +2007-03-27 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/spu.exp (embed_test): New. + * ld-spu/ear.s: New. + * ld-spu/ear.d: New. + * ld-spu/embed.rd: New. + * ld-spu/ovl2.s: New. + * ld-spu/ovl2.d: New. + +2007-03-24 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/overlay.d: -u symbols we want to see in the output. + +2007-03-23 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/ovl.s (f4_a2): Tail call. + * ld-spu/ovl.d: Add --emit-relocs to ld options, -r to objdump. + Update expected results. + +2007-03-23 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * ld-sh/ld-r-1.d: Update. + * ld-sh/shared-1.d: Likewise. + +2007-03-23 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/elf.exp: Add "--local-store 0:0" to LDFLAGS for spu. + +2007-03-22 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/4210 + * ld-pe/image_size.d: New file. + * ld-pe/image_size.s: Likewise. + * ld-pe/image_size.t: Likewise. + + * ld-pe/pe.exp: Run image_size. + +2007-03-22 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/4007 + * ld-elf/note-1.d: New file. + * ld-elf/note-1.s: Likewise. + * ld-elf/note-1.t: Likewise. + * ld-i386/alloc.d: Likewise. + * ld-i386/alloc.s: Likewise. + * ld-i386/alloc.t: Likewise. + + * ld-i386/i386.exp: Run "alloc". + +2007-03-20 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp (ld-arm/arm-elf.exp): Add arm-pic-veneer. + * ld-arm/arm-pic-veneer.d: New test. + * ld-arm/arm-pic-veneer.s: New test. + +2007-03-08 Richard Sandiford <richard@codesourcery.com> + + * ld-elf/extract-symbol-1.ld (data): Explicitly set the start address + to 0. + +2007-03-07 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/extract-symbol-1sec.d: xfail hppa. + * ld-elf/extract-symbol-1sym.d: xfail hppa. + +2007-03-07 H.J. Lu <hongjiu.lu@intel.com> + + PR 3958 + * ld-elf/linkonce1.d: New. + * ld-elf/linkonce1a.s: New. + * ld-elf/linkonce1b.s: New. + * ld-elf/linkonce2.d: New. + * ld-i386/pcrel16abs.d: New. + * ld-i386/pcrel16abs.s: New. + * ld-i386/i386.exp: Run it. + +2007-03-06 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/4144 + * ld-elf/nobits-1.d: New file. + * ld-elf/nobits-1.s: Likewise. + * ld-elf/nobits-1.t: Likewise. + +2007-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-elf/binutils.exp: Revert last change. + +2007-03-01 Richard Sandiford <richard@codesourcery.com> + + * ld-elf/extract-symbol-1sym.d, ld-elf/extract-symbol-1sec.d, + * ld-elf/extract-symbol-1.s, ld-elf/extract-symbol-1.ld: New tests. + * ld-elf/binutils.exp: Run them. + +2007-02-28 Nick Clifton <nickc@redhat.com> + + PR ld/3796 + * ld-arm/arm-elf.exp (armelftests): Move "Thumb-2 BL" test into... + (armeabitests): ... here, a new array for EABI specific tests. + (armelftests): Add extra command line options for VFP11 fix tests + and thumb shared library test. + +2007-02-22 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp (armelftests): Add gc-unwind.h. + * ld-arm/gc-unwind.s: New file. + * ld-arm/gc-unwind.d: New file. + +2007-02-14 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3953 + * ld-elf/beginwarn.c: New file. + * ld-elf/warn.out: Likewise. + + * ld-elf/shared.exp (build_tests): Add "Build warn libbar.so". + (run_tests): Add "Run warn with versioned libfoo.so". + + * lib/ld-lib.exp (default_ld_relocate): Make exec_output global + and remove target first. + (default_ld_link): Likewise. + (default_ld_simple_link): Likewise. + (run_ld_link_exec_tests): Take an optional linker warning and + check it. + (default_ld_link): Check pruned linker output. + +2007-02-13 H.J. Lu <hongjiu.lu@intel.com> + + * ld-scripts/default-script1.d: Expect extra symbols. + * ld-scripts/default-script2.d: Likewise. + * ld-scripts/default-script3.d: Likewise. + * ld-scripts/default-script4.d: Likewise. + +2007-02-13 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/relbrlt.d: Update. + * ld-powerpc/tlsexe.r: Update. + * ld-powerpc/tlsexetoc.r: Update. + * ld-powerpc/tlsso.r: Update. + * ld-powerpc/tlstocso.r: Update. + +2007-02-12 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/relbrlt.d: Update. + +2007-02-06 Nick Clifton <nickc@redhat.com> + + PR ld/3805 + * ld-elf/sec64k.exp: Expect the relocatable version of this test + to fail for the m32r because it creates both .rel and .rela + sections. + +2007-02-05 Dave Brolley <brolley@redhat.com> + + * ld-undefined/undefined.exp: XFAIL the undefined test + * ld-mep: New, with content. + +2007-02-05 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/pcrel16.d: Undo the last change. + * ld-x86-64/pcrel16.d: Likewise. + +2007-02-02 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/pcrel16.d: Updated. + * ld-x86-64/pcrel16.d: Likewise. + +2007-02-01 Alan Modra <amodra@bigpond.net.au> + + * ld-scripts/default-script.exp: Add "--local-store 0:0" to + LDFLAGS for spu. + +2007-01-29 Julian Brown <julian@codesourcery.com> + + * ld-arm/arm-elf.exp: Add VFP11 tests. + * ld-arm/vfp11-fix-none.s: New file. + * ld-arm/vfp11-fix-none.d: Expected disassembly of above. + * ld-arm/vfp11-fix-scalar.s: New file. + * ld-arm/vfp11-fix-scalar.d: Expected disassembly of above. + * ld-arm/vfp11-fix-vector.s: New file. + * ld-arm/vfp11-fix-vector.d: Expected disassembly of above. + +2007-01-23 Nathan Sidwell <nathan@codesourcery.com> + + * ld-elf/header.d: Reduce page size, restrict to linux & vxworks + * ld-elf/header.s: Adjust. + * ld-elf/header.t: Reduce initial offset. + +2007-01-23 Andreas Schwab <schwab@suse.de> + + * lib/ld-lib.exp (run_dump_test): Don't prematurely remove + assembler output. + +2007-01-19 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/dl6.c: New file. + * ld-elf/dl6a.out: Likewise. + * ld-elf/dl6amain.c: Likewise. + * ld-elf/dl6b.out: Likewise. + * ld-elf/dl6bmain.c: Likewise. + * ld-elf/dl6cmain.c: Likewise. + * ld-elf/dl6dmain.c: Likewise. + + * ld-elf/shared.exp: Add new tests for -Bsymbolic, + -Bsymbolic-functions, --dynamic-list-data and + --dynamic-list-cpp-new. + +2007-01-19 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/maxpage3.t: New file. + * ld-elf/maxpage3a.d: Likewise. + * ld-elf/maxpage3b.d: Likewise. + * ld-elf/maxpage3c.d: Likewise. + +2007-01-19 H.J. Lu <hongjiu.lu@intel.com> + + * ld-scripts/default-script.exp: New file. + * ld-scripts/default-script.s: Likewise. + * ld-scripts/default-script.t: Likewise. + * ld-scripts/default-script1.d: Likewise. + * ld-scripts/default-script2.d: Likewise. + * ld-scripts/default-script3.d: Likewise. + * ld-scripts/default-script4.d: Likewise. + +2007-01-18 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/1283 + * lib/ld-lib.exp (run_dump_test): Remove output file first. + +2007-01-17 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/header.d: Adjust for .text section with 16byte + alignment. + +2007-01-16 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/dl1main.c (main): Fix a typo. + +2007-01-16 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3831 + * ld-elf/del.cc: New. + * ld-elf/dl5.cc: Likewise. + * ld-elf/dl5.out: Likewise. + * ld-elf/new.cc: Likewise. + + * ld-elf/shared.exp: Add tests for --dynamic-list-data and + --dynamic-list-cpp-new. + +2007-01-12 Hans-Peter Nilsson <hp@axis.com> + + * ld-elf/header.d: Allow arbitrary lines between "Program Header" + and "Sections". Only run on *-*-linux*. + +2007-01-11 Nathan Sidwell <nathan@codesourcery.com> + + * ld-elf/header.d: New. + * ld-elf/header.t: New. + * ld-elf/header.s: New. + +2007-01-08 Kai Tietz <kai.tietz@onevision.com> + + * ld-fastcall/fastcall.exp: Renamed target x86_64-*-mingw64 to + x86_64-*-mingw*. + * ld-pe/pe.exp: Ditto. + * ld-scripts/align.exp: Ditto. + * ld-scripts/defined.exp: Ditto. + * ld-scripts/provide.exp: Ditto. + * ld-scripts/weak.exp: Ditto. + +2007-01-06 Nathan Sidwell <nathan@codesourcery.com> + + * ld-scripts/expr.exp: New. + * ld-scripts/expr1.s: New. + * ld-scripts/expr1.d: New. + * ld-scripts/expr1.t: New. + +For older changes see ChangeLog-2006 Local Variables: mode: change-log diff --git a/ld/testsuite/ChangeLog-2006 b/ld/testsuite/ChangeLog-2006 new file mode 100644 index 0000000000000..2ff0c39945a39 --- /dev/null +++ b/ld/testsuite/ChangeLog-2006 @@ -0,0 +1,1285 @@ +2006-12-29 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/wrap.exp: New file. + * ld-elf/wrap1.c: Likewise. + * ld-elf/wrap1.out: Likewise. + * ld-elf/wrap1a.c: Likewise. + * ld-elf/wrap1b.c: Likewise. + +2006-12-18 Pedro Alves <pedro_alves@portugalmail.pt> + + * ld-pe/direct.exp: New file. + * ld-pe/direct_client.c: Likewise. + * ld-pe/direct_dll.c: Likewise. + +2006-12-13 Dave Brolley <brolley@redhat.com> + + * lib/ld-lib.exp (big_or_little_endian): Accept -meb and + -mel for big and little endian respectively. + +2006-12-12 Ina Pandit <inap@kpitcummins.com> + + * ld-scripts/overlay-size-map.d: Update. + +2006-12-07 H.J. Lu <hjl@gnu.org> + + PR ld/3666 + * ld-elf/group3a.d: New file. + * ld-elf/group3a.s: Likewise. + * ld-elf/group3b.d: Likewise. + * ld-elf/group3b.s: Likewise. + +2006-12-05 Alan Modra <amodra@bigpond.net.au> + + * ld-alpha/tlspic.rd: Update for unused section removal. + * ld-frv/fdpic-shared-6.d: Likewise. + * ld-frv/tls-dynamic-1.d: Update for symbol changes. + * ld-frv/tls-dynamic-2.d: Likewise. + * ld-frv/tls-dynamic-3.d: Likewise. + * ld-frv/tls-initial-shared-2.d: Likewise. + * ld-frv/tls-pie-1.d: Likewise. + * ld-frv/tls-pie-3.d: Likewise. + * ld-frv/tls-relax-dynamic-1.d: Likewise. + * ld-frv/tls-relax-dynamic-2.d: Likewise. + * ld-frv/tls-relax-dynamic-3.d: Likewise. + * ld-frv/tls-relax-initial-shared-2.d: Likewise. + * ld-frv/tls-relax-pie-1.d: Likewise. + * ld-frv/tls-relax-pie-3.d: Likewise. + * ld-frv/tls-relax-shared-1.d: Likewise. + * ld-frv/tls-relax-shared-2.d: Likewise. + * ld-frv/tls-relax-shared-3.d: Likewise. + * ld-frv/tls-relax-static-3.d: Likewise. + * ld-frv/tls-shared-1.d: Likewise. + * ld-frv/tls-shared-2.d: Likewise. + * ld-frv/tls-shared-3.d: Likewise. + * ld-frv/tls-static-1.d: Likewise. + * ld-frv/tls-static-3.d: Likewise. + +2006-12-05 Jakub Jelinek <jakub@redhat.com> + Alan Modra <amodra@bigpond.net.au> + + * ld-elfvsb/sh1.c (overriddenvar, shlib_overriddencall2, + shared_data): If !SHARED, move to... + * ld-elfvsb/sh2.c: ... here. + * ld-elfvsb/elfvsb.exp: Add -DSHARED to compiler options when + building with $picflag. + +2006-12-04 Jan Beulich <jbeulich@novell.com> + + * ld-elf/eh-frame-hdr.d: New. + * ld-elf/eh-frame-hdr.s: New. + * ld-ia64/tlsbin.dd, ld-ia64/tlsbin.sd: Don't depend on exact linkage + table layout. + +2006-11-23 Thiemo Seufer <ths@mips.com> + + * ld-elf/warn2.d: Match regex also for the second segment. + +2006-11-22 Daniel Jacobowitz <dan@codesourcery.com> + + * ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update + for $d support. + +2006-11-21 Jakub Jelinek <jakub@redhat.com> + + * ld-elf/eh5.d: New test. + * ld-elf/eh5.s: New file. + * ld-elf/eh5a.s: New file. + * ld-elf/eh5b.s: New file. + +2006-11-13 Daniel Jacobowitz <dan@codesourcery.com> + + * ld-arm/arm-dyn.ld, ld-arm/arm-lib.ld: Remove .stack. + * ld-arm/armthumb-lib.d, ld-arm/mixed-app.d, ld-arm/mixed-lib.d: + Allow smaller section gap. + * ld-arm/armthumb-lib.sym, ld-arm/mixed-lib.sym: Reorder. Remove + _stack. + * ld-arm/mixed-app.sym: Remove _stack. + * ld-arm/tls-app.d: Update start address. + +2006-11-08 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/group.ld: Handle .rodata.brlt for powerpc64. + +2006-11-07 Vladimir Prus <vladimir@codesourcery.com> + + * testsuite/ld-elf/symbol2w.s: Use "%" instead of "@" to avoid + breakage on ARM. + +2006-11-06 Vladimir Prus <vladimir@codesourcery.com> + + * testsuite/ld-elf/symbol1ref.s: Use ".dc.a" instead + of ".long". + +2006-11-06 Vladimir Prus <vladimir@codesourcery.com> + + * testsuite/ld-elf/warn2.d: New. + * testsuite/ld-elf/symbol2w.s: New. + * testsuite/ld-elf/symbol2ref.s: New. + +2006-11-05 Hans-Peter Nilsson <hp@axis.com> + + * ld-cris/ldsym1.d: Adjust for semi-recent ld changes. + +2006-11-02 Daniel Jacobowitz <dan@codesourcery.com> + + * ld-discard/zero-rel.d, ld-discard/zero-rel.s: New files. + +2006-11-01 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/mips16-intermix-1.s, ld-mips-elf/mips16-intermix-2.s, + ld-mips-elf/mips16-intermix.d: New testcase. + * ld-mips-elf/mips-elf.exp (mips16_intermix_test): Run new testcases. + +2006-10-29 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * ld-sh/sh64/abi32.xd, ld-sh/sh64/abi64.xd, ld-sh/sh64/cmpct1.xd, + * ld-sh/sh64/crange1.rd, ld-sh/sh64/crange2.rd, + * ld-sh/sh64/crange3-cmpct.rd, ld-sh/sh64/crange3-media.rd, + * ld-sh/sh64/crange3.rd, ld-sh/sh64/mix1.xd, ld-sh/sh64/mix2.xd, + * ld-sh/sh64/shdl32.xd, ld-sh/sh64/shdl64.xd: Update for removal + of empty sections. + +2006-10-25 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/ovl.d: New file. + * ld-spu/ovl.lnk: New file. + * ld-spu/ovl.s: New file. + * ld-spu/spu.exp: New file. + * ld-elf/sec64k.exp: Tweak ld options for SPU. + * ld-scripts/empty-orphan.exp: Likewise. + * ld-scripts/phdrs.exp: Likewise. + * ld-scripts/phdrs2.exp: Likewise. + +2006-10-24 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/plt1.s: New. + * ld-powerpc/plt1.d: New. + * ld-powerpc/relbrlt.s: New. + * ld-powerpc/relbrlt.d: New. + * ld-powerpc/powerpc.exp: Run them. + +2006-10-21 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * ld-sh/sh64/abi32.xd, ld-sh/sh64/abi64.xd, ld-sh/sh64/cmpct1.xd, + * ld-sh/sh64/crange1.rd, ld-sh/sh64/crange2.rd, + * ld-sh/sh64/crange3-cmpct.rd, ld-sh/sh64/crange3-media.rd, + * ld-sh/sh64/crange3.rd, ld-sh/sh64/crangerel1.rd, + * ld-sh/sh64/crangerel2.rd, ld-sh/sh64/mix1.xd, + * ld-sh/sh64/mix2.xd, ld-sh/sh64/rel32.xd, ld-sh/sh64/rel64.xd, + * ld-sh/sh64/reldl32.rd, ld-sh/sh64/reldl64.rd, + * ld-sh/sh64/shdl32.xd, ld-sh/sh64/shdl64.xd: Update. + +2006-10-20 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * ld-sh/tlsbin-1.d: Update. + * ld-sh/tlspic-1.d: Likewise. + * ld-sh/tlstpoff-1.d: Likewise. + +2006-10-20 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/multi-got-1.d: Remove trailing R_MIPS_NONE entries. + * ld-mips-elf/tls-multi-got-1.got: Likewise. + * ld-mips-elf/tls-multi-got-1.r: Likewise. + +2006-10-20 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/multi-got-1.d: Do not expect a particular address + for DT_HASH. + * ld-mips-elf/rel32-o32.d: Bump addresses by 0x20 to account for + the extra program header. + * ld-mips-elf/rel32-n32.d: Likewise. + * ld-mips-elf/tlslib-o32.got: Likewise. + * ld-mips-elf/tlslib-o32-hidden.got: Likewise. + * ld-mips-elf/tlslib-o32-ver.got: Likewise. + * ld-mips-elf/tls-multi-got-1.got: Likewise. + * ld-mips-elf/tls-multi-got-1.r: Likewise. + * ld-mips-elf/rel64.d: Bump addresses by 0x30 to account for the + extra program header. + * ld-mips-elf/tlsdyn-o32.d: Reduce the GOT offset by 32 to account + for the extra program header, and thus the shorter gap between the + text and data segments. + * ld-mips-elf/tlsdyn-o32-1.d: Likewise. + * ld-mips-elf/tlsdyn-o32-2.d: Likewise. + * ld-mips-elf/tlsdyn-o32-3.d: Likewise. + * ld-mips-elf/tlsdyn-o32.got: Bump GOT text addresses by 0x20 + to account for the extra program header. + * ld-mips-elf/tlsdyn-o32-1.got: Likewise. + * ld-mips-elf/tlsdyn-o32-2.got: Likewise. + * ld-mips-elf/tlsdyn-o32-3.got: Likewise. + +2006-10-20 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/rel32-o32.d: Bump the section number of .text by 1 + to account for the fact that .rel.dyn is now before .text in the + section table. + * ld-mips-elf/rel32-n32.d: Likewise. + * ld-mips-elf/rel64.d: Likewise. + +2006-10-19 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/tlslib-o32-hidden.got: Sort relocations against the + same symbol in order of increasing r_offset. + * ld-mips-elf/tls-multi-got-1.got: Likewise. + * ld-mips-elf/tls-hidden3.r: Likewise. + * ld-mips-elf/tls-hidden4.r: Likewise. + +2006-10-19 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/multi-got-1.d: Remove DT_DEBUG tag. Do not require + a specific file offset for .dynamic. Reduce DT_HASH by 8 to account + for removed tag. + * ld-mips-elf/tls-multi-got-1.r: Likewise. Also reduce DT_REL by 8. + Reduce PLTGOT and symbol values by 16 to account for the removed tag. + * ld-mips-elf/textrel-1.d: Remove DT_DEBUG tag. + * ld-mips-elf/rel32-n32.d: Reduce addresses by 16 to account for + removed DT_DEBUG tag. + * ld-mips-elf/rel64.d: Likewise. + * ld-mips-elf/tls-multi-got-1.got: Likewise. + * ld-mips-elf/tlslib-o32-hidden.got: Likewise. + +2006-10-18 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3290 + * ld-elf/dummy.c: New file. + * ld-elf/dwarf.exp: Likewise. + * ld-elf/dwarf1.c: Likewise. + * ld-elf/dwarf1.h: Likewise. + * ld-elf/dwarf1.out: Likewise. + * ld-elf/dwarf1main.c: Likewise. + +2006-10-18 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/dl4.c: New file. + * ld-elf/dl4.list: Likewise. + * ld-elf/dl4a.out: Likewise. + * ld-elf/dl4b.out: Likewise. + * ld-elf/dl4main.c: Likewise. + * ld-elf/dl4xxx.c: Likewise. + * ld-elf/dl4xxx.list: Likewise. + + * ld-elf/shared.exp (build_tests): Add libdl4a.so and + libdl4b.so. + (run_tests): Likewise. + +2006-10-18 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/reloc-1-n64.d: Match 16-character VMAs on LP64 hosts. + +2006-10-18 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/rel32-n32.d: Bump addresses by 0x20 to account for + the fact that .reginfo is now placed before .text. Change the + section number of .text accordingly. + +2006-10-18 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/elf-rel-got-n32.d: Adjust page gap from 0x100000 + to 0x10000. Move .reginfo before .text and bump .text addresses + by 0x10 to make room. Move data segment down by 0x10 bytes to + account for new size of text segment. + * ld-mips-elf/elf-rel-xgot-n32.d: Likewise. + * ld-mips-elf/elf-rel-got-n64-linux.d: Adjust page gap from + 0x100000 to 0x10000. + * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. + +2006-10-17 Mark Shinwell <shinwell@codesourcery.com> + + * ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl, + thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests. + * ld-arm/thumb1-bl.d: New. + * ld-arm/thumb1-bl.s: New. + * ld-arm/thumb2-bl-as-thumb1-bad.d: New. + * ld-arm/thumb2-bl-as-thumb1-bad.s: New. + * ld-arm/thumb2-bl-bad.d: New. + * ld-arm/thumb2-bl-bad.s: New. + * ld-arm/thumb2-bl.d: New. + * ld-arm/thumb2-bl.s: New. + +2006-10-17 Alan Modra <amodra@bigpond.net.au> + + * ld-arm/mixed-app.sym, ld-cris/ldsym1.d, ld-cris/libdso-12.d, + * ld-cris/v32-ba-1.d, ld-elf/orphan.d, ld-elf/orphan2.d, + * ld-i386/tlsbin.rd, ld-i386/tlsbindesc.rd, ld-i386/tlsdesc.rd, + * ld-i386/tlsdesc.sd, ld-i386/tlsgdesc.rd, ld-i386/tlsnopic.rd, + * ld-i386/tlspic.rd, ld-ia64/tlspic.rd, ld-mips-elf/eh-frame1-n32.d, + * ld-mips-elf/eh-frame1-n64.d, ld-mips-elf/eh-frame2-n32.d, + * ld-mips-elf/eh-frame2-n64.d, ld-mips-elf/mips-elf.exp, + * ld-mips-elf/rel32-n32.d, ld-mips-elf/rel32-o32.d, + * ld-mips-elf/rel64.d, ld-mips-elf/tls-multi-got-1.got, + * ld-mips-elf/tls-multi-got-1.r, ld-mips-elf/tlsdyn-o32-1.d, + * ld-mips-elf/tlsdyn-o32-1.got, ld-mips-elf/tlsdyn-o32-2.d, + * ld-mips-elf/tlsdyn-o32-2.got, ld-mips-elf/tlsdyn-o32-3.d, + * ld-mips-elf/tlsdyn-o32-3.got, ld-mips-elf/tlsdyn-o32.d, + * ld-mips-elf/tlsdyn-o32.got, ld-mips-elf/tlslib-o32-hidden.got, + * ld-mips-elf/tlslib-o32-ver.got, ld-mips-elf/tlslib-o32.got, + * ld-mmix/bpo-10.d, ld-powerpc/tlsso.g, ld-powerpc/tlsso.r, + * ld-powerpc/tlsso32.d, ld-powerpc/tlsso32.g, ld-powerpc/tlsso32.r, + * ld-powerpc/tlstocso.g, ld-powerpc/tlstocso.r, ld-s390/tlspic.rd, + * ld-s390/tlspic_64.rd, ld-scripts/empty-address-1.d, + * ld-scripts/empty-address-3c.d, ld-scripts/empty-orphan.t, + * ld-sh/shared-1.d, ld-sh/tlspic-2.d, ld-sparc/tlssunbin32.rd, + * ld-sparc/tlssunbin64.rd, ld-sparc/tlssunpic32.rd, + * ld-sparc/tlssunpic64.rd, ld-x86-64/tlsdesc.pd, ld-x86-64/tlsdesc.rd, + * ld-x86-64/tlspic.rd: Update for section sym changes. + +2006-10-16 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/branch-misc-1.d: Set the start address to 0x20000000. + * ld-mips-elf/jalbal.d: Likewise 0x200000a0. + * ld-mips-elf/jaloverflow-2.d: Likewise 0x20000000. + * ld-mips-elf/reloc-3-n32.d: Likewise. + * ld-mips-elf/reloc-3.d: Likewise. + * ld-mips-elf/textrel-1.d: Don't require a specific file offset for + .dynamic. + +2006-10-03 Jakub Jelinek <jakub@redhat.com> + + * ld-elf/eh4.d: New test. + * ld-elf/eh4.s: New file. + * ld-elf/eh4a.s: New file. + +2006-10-02 Vladimir Prus <vladimir@codesourcery.com> + + * ld-arm/use-thumb-lib.sym: Robustify, by ignoring symbols we're + not interested in and bucket number. + +2006-10-02 Kai Tietz <Kai.Tietz@onevision.com> + + * ld-fastcall/fastcall.exp: Add x86_64-pc-mingw64 as valid target. + * ld-pe/pe.exp: Likewise. + * lib/ld-lib.exp ( is_pecoff_format): Accept x86_64-pc-mingw64. + +2006-09-29 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * ld-sh/tlspic-2.d: Update. + +2006-09-26 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3223 + PR ld/3267 + * ld-scripts/empty-address-1.d: New file. + * ld-scripts/empty-address-1.s: Likewise. + * ld-scripts/empty-address-1.t: Likewise. + * ld-scripts/empty-address-2.s: Likewise. + * ld-scripts/empty-address-2a.d: Likewise. + * ld-scripts/empty-address-2a.t: Likewise. + * ld-scripts/empty-address-2b.d: Likewise. + * ld-scripts/empty-address-2b.t: Likewise. + * ld-scripts/empty-address-3.s: Likewise. + * ld-scripts/empty-address-3a.d: Likewise. + * ld-scripts/empty-address-3a.t: Likewise. + * ld-scripts/empty-address-3b.d: Likewise. + * ld-scripts/empty-address-3b.t: Likewise. + * ld-scripts/empty-address-3c.d: Likewise. + * ld-scripts/empty-address-3c.t: Likewise. + * ld-scripts/empty-address.exp: Likewise. + +2006-09-21 Andreas Schwab <schwab@suse.de> + + * ld-m68k/plt1-68020.d: Fix patterns to match also for 64-bit + hosts. + +2006-09-20 Kai Tietz <Kai.Tietz@onevision.com> + + * bootstrap/bootstrap.exp: Fix x86_64-mingw32 target test. + * ld-fastcall/fastcall.exp: Likewise. + * ld-scripts/align.exp: Likewise. + * ld-scripts/align2a.d: Likewise. + * ld-scripts/defined.exp: Likewise. + * ld-scripts/provide.exp: Likewise. + * ld-scripts/script.exp: Likewise. + * ld-scripts/weak.exp: Likewise. + * lib/ld-lib.exp: Detect target as pecoff file format. + +2006-09-18 Thiemo Seufer <ths@networkno.de> + Maciej W. Rozycki <macro@mips.com> + + * ld-mips-elf/mips-elf.exp: Add test for R_MIPS16_GPREL relocations. + * ld-mips-elf/reloc-3-n32.d, ld-mips-elf/reloc-3.d: New files. + +2006-09-18 Thiemo Seufer <ths@networkno.de> + + * ld-elfcomm/elfcomm.exp: Enable the alignment test for + mips*-*-*. + +2006-09-17 Mei Ligang <ligang@sunnorth.com.cn> + + * ld-elf/merge.d: Add special case for Score target. + * ld-elfcomm/elfcomm.exp: Likewise. + * ld-srec/srec.exp: Likewise. + +2006-09-15 H.J. Lu <hongjiu.lu@intel.com> + + * ld-scripts/overlay-size.t: Discard .reginfo sections. + +2006-09-15 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/hash.d: Don't run for mips targets. + +2006-09-15 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/loadaddr.s: Pad sections to 16 bytes. + * ld-elf/loadaddr1.d: Updated. + * ld-elf/loadaddr2.d: Likewise. + * ld-elf/loadaddr3a.d: Likewise. + * ld-elf/loadaddr3b.d: Likewise. + +2006-09-12 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3197 + * ld-elf/hash.d: New test. + +2006-09-04 Vladimir Prus <vladimir@codesourcery.com> + + * ld-arm/use-thumb-lib.sym: Use regexps instead of + absolute addresses, for robustness. + +2006-09-07 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/dl1.c: New file. + * ld-elf/dl1.list: Likewise. + * ld-elf/dl1.out: Likewise. + * ld-elf/dl1main.c: Likewise. + * ld-elf/dl2.c: Likewise. + * ld-elf/dl2.list: Likewise. + * ld-elf/dl2a.out: Likewise. + * ld-elf/dl2b.out: Likewise. + * ld-elf/dl2main.c: Likewise. + * ld-elf/dl2xxx.c: Likewise. + * ld-elf/dl2xxx.list: Likewise. + * ld-elf/dl3.cc: Likewise. + * ld-elf/dl3.list: Likewise. + * ld-elf/dl3a.out: Likewise. + * ld-elf/dl3b.out: Likewise. + * ld-elf/dl3header.h: Likewise. + * ld-elf/dl3main.cc: Likewise. + + * ld-elf/shared.exp: Updated. + + * lib/ld-lib.exp (run_ld_link_exec_tests): Take an optional + argument for source language. Use CC/CXX for link, depending + on source language. + (run_cc_link_tests): Likewise. + +2006-08-29 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/loadaddr3a.d: Adjust target test. + * ld-elf/loadaddr3b.d: Likewise. + +2006-08-29 Nathan Sidwell <nathan@codesourcery.com> + + * ld-elf/loadaddr3.t: New. + * ld-elf/loadaddr3a.d: New. + * ld-elf/loadaddr3b.d: New. + +2006-08-23 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/plt1.s: New. + * ld-powerpc/plt1.d: New. + * ld-powerpc/powerpc.exp: Run it. + +2006-08-23 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3052 + * ld-elf/loadaddr1.t: Add "AT (ADDR(.data))". + * ld-elf/loadaddr2.t: Likewise. + +2006-08-23 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3103 + * ld-elf/overlay.d: New file. + * ld-elf/overlay.s: Likewise. + * ld-elf/overlay.t: Likewise. + +2006-08-18 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp (armelftests): Add armthumb-lib.so. Add + -use-blx to mixed-lib.so + * ld-arm/armthumb-lib.d: New file. + * ld-arm/armthumb-lib.sym: New file. + +2006-08-18 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3052 + * ld-elf/loadaddr.s: New file. + * ld-elf/loadaddr1.d: Likewise. + * ld-elf/loadaddr1.t: Likewise. + * ld-elf/loadaddr2.d: Likewise. + * ld-elf/loadaddr2.t: Likewise. + +2006-08-17 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/tlsexe.d: Update for lazy link stub change. + * ld-powerpc/tlsexe.r: Likewise. + * ld-powerpc/tlsexetoc.d: Likewise. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.d: Likewise. + * ld-powerpc/tlstocso.d: Likewise. + +2006-08-16 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3015 + * ld-elf/binutils.exp: Add tests for "-z relro". + +2006-08-16 Alan Modra <amodra@bigpond.net.au> + + * ld-scripts/overlay-size-map.d: Update. + +2006-08-11 Thiemo Seufer <ths@mips.com> + + * ld-elfcomm/elfcomm.exp (dump_common1): Extend regexp to match also + MIPS small commons. + +2006-08-08 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/3009 + * ld-scripts/sort.t: New file. + * ld-scripts/sort_b_a-1.d: Likewise. + * ld-scripts/sort_b_a-1.s: Likewise. + * ld-scripts/sort_b_n-1.d: Likewise. + * ld-scripts/sort_b_n-1.s: Likewise. + +2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt> + + * ld-pe/pe.exp: Enable tests on arm-wince-pe. + * ld-pe/secrel.d: Adjust test to work on arm-wince-pe too. + +2006-08-04 Richard Sandiford <richard@codesourcery.com> + + * ld-sh/rd-sh.exp: Treat vxworks1-static.d specially. + * ld-sh/sh-vxworks.exp: New file. + * ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to + sh-*-vxworks. + * ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd, + * ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd, + * ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s, + * ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd, + * ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s, + * ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s, + * ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd, + * ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd, + * ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s, + * ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s, + * ld-sh/reloc1.s, ld-sh/reloc1.d: New tests. + +2006-08-01 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/noload-1.d: New. + * ld-elf/noload-1.s: Likewise. + * ld-elf/noload-1.t: Likewise. + +2006-07-29 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/hash1.s, ld-mips-elf/hash1a.d, + * ld-mips-elf/hash1b.d, ld-mips-elf/hash1c.d: New tests. + * ld-mips-elf/mips-elf.exp: Run them. + +2006-07-25 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/mips16-call-global-2.s, + ld-mips-elf/mips16-call-global-3.s, ld-mips-elf/mips16-call-global.d: + Improve test robustness. + +2006-07-21 Nick Clifton <nickc@redhat.com> + + * ld-sh/arch/arch.exp (test_arch): Set the endian flag to suit the + multilib being tested. + +2006-07-20 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/mips16-call-global-1.s, + ld-mips-elf/mips16-call-global-2.s, + ld-mips-elf/mips16-call-global-3.s, ld-mips-elf/mips16-call-global.d: + Test linking of external mips16 jumps. + * ld-mips-elf/mips-elf.exp: Run new test. + +2006-07-19 Thiemo Seufer <ths@mips.com> + + * ld-selective/selective.exp: Fix selective testcases for MIPS. + +2006-07-13 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/tlslib-o32-ver.got, ld-mips-elf/tlslib-o32.got: + Update TLS testcases. + +2006-07-12 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/2884 + * ld-elf/begin.c: New file. + * ld-elf/end.c: Likewise. + * ld-elf/endhidden.c: Likewise. + * ld-elf/endprotected.c: Likewise. + * ld-elf/foo.c: Likewise. + * ld-elf/foo.map: Likewise. + * ld-elf/hidden.out: Likewise. + * ld-elf/main.c: Likewise. + * ld-elf/normal.out: Likewise. + * ld-elf/shared.exp: Likewise. + + * lib/ld-lib.exp (run_cc_link_tests): New. + +2006-07-12 Richard Sandiford <richard@codesourcery.com> + + * ld-m68k/merge-ok-1c.d: New test. + * ld-m68k/m68k.exp: Run it. + +2006-07-11 Hans-Peter Nilsson <hp@axis.com> + + * ld-cris/libdso-2.d: Adjust for recent hash-related changes. + +2006-07-10 Jakub Jelinek <jakub@redhat.com> + + * ld-powerpc/tlsso32.r: Adjust. + * ld-powerpc/tlsso32.d: Adjust. + * ld-powerpc/tlsso32.g: Adjust. + * ld-powerpc/tlsso.r: Adjust. + * ld-powerpc/tlsso.g: Adjust. + * ld-powerpc/tlstocso.g: Adjust. + +2006-07-05 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/multi-got-1.d, ld-mips-elf/tls-multi-got-1.got, + ld-mips-elf/tls-multi-got-1.r: Update multigot testcases. + +2006-06-30 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/tlsbindesc.dd: Updated to expect xchg %ax,%ax instead + of 2 nops. + * ld-i386/tlsdesc.dd: Likewise. + * ld-i386/tlsgdesc.dd: Likewise. + * ld-x86-64/tlsbindesc.dd: Likewise. + * ld-x86-64/tlsdesc.dd: Likewise. + * ld-x86-64/tlsdesc.pd: Likewise. + * ld-x86-64/tlsgdesc.dd: Likewise. + +2006-06-29 Jakub Jelinek <jakub@redhat.com> + + PR ld/2513 + * ld-i386/tlsbin.dd: Fix expected output. + +2006-06-21 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/tls_common.exp: Match 32-bit output. + +2006-06-20 Jakub Jelinek <jakub@redhat.com> + + * ld-elf/tls_common.exp: New test. + * ld-elf/tls_common.s: New file. + +2006-06-20 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/eh1.d: Update for fewer program headers. + * ld-elf/eh2.d: Likewise. + * ld-elf/eh3.d: Likewise. + +2006-06-19 Vladimir Prus <vladimir@codesourcery.com> + + * ld-arm/arm-elf.exp: New test. + * ld-arm/use-thumb-lib.s: New file. + * ld-arm/use-thumb-lib.sym: New file. + +2006-06-15 Mark Shinwell <shinwell@codesourcery.com> + + * ld-arm/group-relocs-alu-bad.d: New test. + * ld-arm/group-relocs-alu-bad.s: New test. + * ld-arm/group-relocs.d: New test. + * ld-arm/group-relocs-ldc-bad.d: New test. + * ld-arm/group-relocs-ldc-bad.s: New test. + * ld-arm/group-relocs-ldr-bad.d: New test. + * ld-arm/group-relocs-ldr-bad.s: New test. + * ld-arm/group-relocs-ldrs-bad.d: New test. + * ld-arm/group-relocs-ldrs-bad.s: New test. + * ld-arm/group-relocs.s: New test. + * ld-arm/arm-elf.exp: Wire in new tests. + +2006-06-14 Richard Sandiford <richard@codesourcery.com> + + * ld-m68k/plt1.s, ld-m68k/plt1-empty.s, ld-m68k/plt1.ld: New files. + * ld-m68k/plt1-68020.d, ld-m68k/plt1-cpu32.d: Likewise. + * ld-m68k/plt1-isab.d: Likewise. + * ld-m68k/m68k.exp: Run new PLT tests. + +2006-06-12 Thiemo Seufer <ths@mips.com> + + * ld-mips-elf/multi-got-no-shared.d: Adjust for recent change of + ELF_MAXPAGESIZE. + +2006-06-11 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/stub-dynsym-1.s, + * ld-mips-elf/stub-dynsym-1.ld, + * ld-mips-elf/stub-dynsym-1-7fff.d, + * ld-mips-elf/stub-dynsym-1-8000.d, + * ld-mips-elf/stub-dynsym-1-fff0.d, + * ld-mips-elf/stub-dynsym-1-10000.d, + * ld-mips-elf/stub-dynsym-1-2fe80.d: New test. + * ld-mips-elf/mips-elf.exp: Run it. + +2006-06-06 Alan Modra <amodra@bigpond.net.au> + + * ld-elfvers/vers.exp (objdump_versionstuff): Allow versions in + any order. + * ld-elfvers/vers1.ver: Update. + * ld-elfvers/vers2.ver: Update. + * ld-elfvers/vers4a.ver: Update. + * ld-elfvers/vers7a.ver: Update. + * ld-elfvers/vers8.ver: Update. + * ld-elfvers/vers9.ver: Update. + * ld-elfvers/vers15.ver: Update. + * ld-elfvers/vers16a.ver: Update. + * ld-elfvers/vers17.ver: Update. + * ld-elfvers/vers18.ver: Update. + * ld-elfvers/vers20.ver: Update. + * ld-elfvers/vers20a.ver: Update. + * ld-elfvers/vers21.ver: Update. + * ld-elfvers/vers22a.ver: Update. + * ld-elfvers/vers22b.ver: Update. + * ld-elfvers/vers23a.ver: Update. + * ld-elfvers/vers23b.ver: Update. + * ld-elfvers/vers23c.ver: Update. + * ld-elfvers/vers25a.ver: Update. + * ld-elfvers/vers26a.ver: Update. + * ld-elfvers/vers27a.ver: Update. + * ld-elfvers/vers27d.ver: Update. + * ld-elfvers/vers28b.ver: Update. + * ld-elfvers/vers29.ver: Update. + * ld-elfvers/vers30.ver: Update. + * ld-elfvers/vers31.ver: Update. + +2006-06-05 Alan Modra <amodra@bigpond.net.au> + + * ld-elf/sec64k.exp: Add "main" symbol. Use dc.a for addresses. + Cater for different address sizes. Match end of line when + comparing symbols. + * ld-elf/start.s: Use dc.a for addresses. + +2006-06-02 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/tlsexe.r: Update for removal of some section syms. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.r: Likewise. + * ld-powerpc/tlstocso.r: Likewise. + * ld-s390/tlsbin_64.rd: Likewise. + * ld-s390/tlspic_64.rd: Likewise. + +2006-06-02 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/2723 + * ld-alpha/tlsbin.rd: Update for removal of some section syms. + * ld-alpha/tlsbinr.rd: Likewise. + * ld-alpha/tlspic.rd: Likewise. + * ld-cris/hiddef1.d: Likewise. + * ld-cris/libdso-2.d: Likewise. + * ld-elf/sec64k.exp: Likewise. + * ld-i386/tlsbin.rd: Likewise. + * ld-i386/tlsbindesc.rd: Likewise. + * ld-i386/tlsdesc.rd: Likewise. + * ld-i386/tlsgdesc.rd: Likewise. + * ld-i386/tlsnopic.rd: Likewise. + * ld-i386/tlspic.rd: Likewise. + * ld-ia64/tlsbin.rd: Likewise. + * ld-ia64/tlspic.rd: Likewise. + * ld-mmix/bpo-1.d: Likewise. + * ld-mmix/bpo-10.d: Likewise. + * ld-mmix/bpo-11.d: Likewise. + * ld-mmix/bpo-14.d: Likewise. + * ld-mmix/bpo-16.d: Likewise. + * ld-mmix/bpo-17.d: Likewise. + * ld-mmix/bpo-18.d: Likewise. + * ld-mmix/bpo-19.d: Likewise. + * ld-mmix/bpo-2.d: Likewise. + * ld-mmix/bpo-22.d: Likewise. + * ld-mmix/bpo-3.d: Likewise. + * ld-mmix/bpo-4.d: Likewise. + * ld-mmix/bpo-5.d: Likewise. + * ld-mmix/bpo-6.d: Likewise. + * ld-mmix/bpo-9.d: Likewise. + * ld-mmix/bspec1.d: Likewise. + * ld-mmix/bspec2.d: Likewise. + * ld-mmix/greg-1.d: Likewise. + * ld-mmix/greg-19.d: Likewise. + * ld-mmix/greg-2.d: Likewise. + * ld-mmix/greg-3.d: Likewise. + * ld-mmix/greg-4.d: Likewise. + * ld-mmix/greg-5.d: Likewise. + * ld-mmix/greg-5s.d: Likewise. + * ld-mmix/greg-6.d: Likewise. + * ld-mmix/greg-7.d: Likewise. + * ld-mmix/loc1.d: Likewise. + * ld-mmix/loc2.d: Likewise. + * ld-mmix/loc3.d: Likewise. + * ld-mmix/loc4.d: Likewise. + * ld-mmix/loc6.d: Likewise. + * ld-mmix/local1.d: Likewise. + * ld-mmix/local3.d: Likewise. + * ld-mmix/local5.d: Likewise. + * ld-mmix/local7.d: Likewise. + * ld-mmix/locdo-1.d: Likewise. + * ld-mmix/loct-1.d: Likewise. + * ld-mmix/locto-1.d: Likewise. + * ld-mmix/start-1.d: Likewise. + * ld-mmix/undef-3.d: Likewise. + * ld-powerpc/tlsexe32.r: Likewise. + * ld-powerpc/tlsso32.r: Likewise. + * ld-s390/tlsbin.rd: Likewise. + * ld-s390/tlspic.rd: Likewise. + * ld-sparc/tlssunbin32.rd: Likewise. + * ld-sparc/tlssunbin64.rd: Likewise. + * ld-sparc/tlssunnopic32.rd: Likewise. + * ld-sparc/tlssunnopic64.rd: Likewise. + * ld-sparc/tlssunpic32.rd: Likewise. + * ld-sparc/tlssunpic64.rd: Likewise. + * ld-x86-64/tlsbin.rd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsdesc.rd: Likewise. + * ld-x86-64/tlsgdesc.rd: Likewise. + * ld-x86-64/tlspic.rd: Likewise. + +2006-05-31 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/binutils.exp: Make it Linux only. + (strip_test): Renamed to binutils_test. Check for unsupported + options. + Add more tests. + + * ld-elf/commonpage1.d: Make it Linux only. + * ld-elf/maxpage1.d: Likewise. + + * ld-elf/maxpage1.s: Add main, start and __start. + + * ld-elf/maxpage2.d: New file. + * ld-elf/tbss1.s: Likewise. + * ld-elf/tbss2.s: Likewise. + * ld-elf/tdata1.s: Likewise. + * ld-elf/tdata2.s: Likewise. + +2006-05-30 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/binutils.exp: New file. + * ld-elf/commonpage1.d: Likewise. + * ld-elf/maxpage1.d: Likewise. + * ld-elf/maxpage1.s: Likewise. + +2006-05-25 H.J. Lu <hongjiu.lu@intel.com> + + * ld-x86-64/tlsbin.dd: Updated for 2MB maximum page size. + * ld-x86-64/tlsbin.rd: Likewise. + * ld-x86-64/tlsbin.sd: Likewise. + * ld-x86-64/tlsbin.td: Likewise. + * ld-x86-64/tlsbindesc.dd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsbindesc.sd: Likewise. + * ld-x86-64/tlsbindesc.td: Likewise. + * ld-x86-64/tlsdesc.dd: Likewise. + * ld-x86-64/tlsdesc.pd: Likewise. + * ld-x86-64/tlsdesc.rd: Likewise. + * ld-x86-64/tlsdesc.sd: Likewise. + * ld-x86-64/tlsdesc.td: Likewise. + * ld-x86-64/tlsgdesc.dd: Likewise. + * ld-x86-64/tlspic.dd: Likewise. + * ld-x86-64/tlspic.rd: Likewise. + * ld-x86-64/tlspic.sd: Likewise. + * ld-x86-64/tlspic.td: Likewise. + +2006-05-24 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-app-abs32.d: Update expected output. + * ld-arm/arm-app.d: Ditto. + * ld-arm/arm-lib-plt32.d: Ditto. + * ld-arm/arm-lib.d: Ditto. + * ld-arm/mixed-app-v5.d: Ditto. + * ld-arm/mixed-app.d: Ditto. + * ld-arm/mixed-lib.d: Ditto. + +2006-05-23 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/2655 + PR ld/2657 + * ld-elf/eh1.d: New file. + * ld-elf/eh1.s: Likewise. + * ld-elf/eh1a.s: Likewise. + * ld-elf/eh2.d: Likewise. + * ld-elf/eh2a.s: Likewise. + * ld-elf/eh3.d: Likewise. + * ld-elf/eh3.s: Likewise. + * ld-elf/eh3a.s: Likewise. + +2006-05-22 Daniel Jacobowitz <dan@codesourcery.com> + + * ld-mips-elf/textrel-1.d: Relax some patterns. + +2006-05-22 Nick Clifton <nickc@redhat.com> + + * ld-elf/start.s (start): Add this symbol for SH targets. + (main): Add this symbol for HPPA targets. + +2006-05-19 Alan Modra <amodra@bigpond.net.au> + + * ld-scripts/empty-orphan.d: Update again. + + * ld-scripts/empty-orphan.t: Discard .reginfo. + * ld-scripts/empty-orphan.d: Update. + +2006-05-17 Thiemo Seufer <ths@mips.com> + + * ld-elfweak/size2.d, ld-elfweak/size2a.s, ld-elfweak/size2b.s: + Add __start as entry symbol. + +2006-05-16 Thiemo Seufer <ths@mips.com> + + * ld-elf/orphan.ld: Add placement for MIPS .reginfo section. + +2006-05-15 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-be8.d: New test. + * ld-arm/arm-be8.s: New test. + * ld-arm/arm-elf.exp: Add arm-be8. + +2006-05-14 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elf/stab.d: Skip ia64-*-*. + +2006-05-11 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp: Add arm-movwt. + * ld-arm/arm-movwt.d: New test. + * ld-arm/arm-movwt.s: New test. + * ld-arm/arm.ld: Add .far. + +2006-05-11 Mike Bland <mbland@google.com> + + * ld-elf/stab.d: New. + +2006-05-10 Thiemo Seufer <ths@debian.org> + + * ld-elf/sec64k.exp: Extend for MIPS ELF. + +2006-05-05 Alan Modra <amodra@bigpond.net.au> + + * ld-powerpc/tlsexetoc.r: Update for correction to tls optimization. + * ld-powerpc/tlsexetoc.g: Likewise. + +2006-05-02 H.J. Lu <hongjiu.lu@intel.com> + + * ld-cdtest/cdtest-foo.cc (Foo::Foo): Add const to char *. + * ld-cdtest/cdtest-foo.h (Foo::Foo): Likewise. + * ld-srec/sr3.cc (Foo::Foo): Likewise. + +2006-05-02 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp: Add thumb-rel32. + * ld-arm/thumb-rel32.d: New test. + * ld-arm/thumb-rel32.s: New test. + +2006-04-29 H.J. Lu <hongjiu.lu@intel.com> + + * ld-elfvers/vers.exp: Xfail vers7a, vers7, vers23a, vers23b, + vers23c, vers23d, vers23, vers25a, vers25b1, vers25b2, vers27a, + vers27b, vers27c1, vers27c2, vers27d4 and vers27d5 if PIC is + required. + +2006-04-25 H.J. Lu <hongjiu.lu@intel.com> + + * ld-alpha/tlsbin.rd: Updated for readelf change. + * ld-alpha/tlsbinr.rd: Likewise. + * ld-alpha/tlspic.rd: Likewise. + +2006-04-05 Richard Sandiford <richard@codesourcery.com> + + * ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd, + * ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd, + * ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s, + * ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s, + * ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests. + * ld-sparc/sparc.exp: Run them. + +2006-04-05 Ben Elliston <bje@au.ibm.com> + + * lib/ld-lib.exp: Comment cleanups. + +2006-03-27 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/tls-hidden3a.s, ld-mips-elf/tls-hidden3b.s, + * ld-mips-elf/tls-hidden3.d, ld-mips-elf/tls-hidden3.got, + * ld-mips-elf/tls-hidden3.ld, ld-mips-elf/tls-hidden3.r, + * ld-mips-elf/tls-hidden4a.s, ld-mips-elf/tls-hidden4b.s, + * ld-mips-elf/tls-hidden4.got, ld-mips-elf/tls-hidden4.r: New tests. + * ld-mips-elf/mips-elf.exp: Run them. + +2006-03-25 Richard Sandiford <richard@codesourcery.com> + + * ld-m68k/merge-error-1a.s, ld-m68k/merge-error-1b.s, + * ld-m68k/merge-error-1a.d, ld-m68k/merge-error-1b.d, + * ld-m68k/merge-error-1c.d, ld-m68k/merge-error-1d.d, + * ld-m68k/merge-error-1e.d, ld-m68k/merge-ok-1a.d, + * ld-m68k/merge-ok-1b.d: New tests. + * ld-m68k/m68k.exp: Run them. + +2006-03-22 Richard Sandiford <richard@codesourcery.com> + + * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, + * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, + * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, + * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, + * ld-mips/vxworks2-static.sd: New tests. + * ld-mips/mips-elf.exp: Run them. + +2006-03-17 Alexandre Oliva <aoliva@redhat.com> + + * ld-powerpc/tls32.s: Verify that +32768 @plt addend is + discarded. + +2006-03-14 Richard Sandiford <richard@codesourcery.com> + + * ld-mips/emit-relocs-1a.s, ld-mips/emit-relocs-1b.s, + * ld-mips/emit-relocs-1.ld, ld-mips/emit-relocs-1.d: New test. + * ld-mips/mips-elf.exp: Run it. + +2006-03-07 Richard Sandiford <richard@codesourcery.com> + + * ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd, + * ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd, + * ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s, + * ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd, + * ld-arm/vxworks2-static.sd: New tests. + * ld-arm/arm-elf.exp: Run them. + +2006-03-06 Nathan Sidwell <nathan@codesourcery.com> + + * ld-m68k: New tests. + +2006-03-03 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/vxworks1-static.d, ld-i386/vxworks2.s, + * ld-i386/vxworks2.sd, ld-i386/vxworks2-static.sd: New tests. + * ld-i386/i386.exp: Run them. + * ld-powerpc/vxworks1-static.d, ld-powerpc/vxworks2.s, + * ld-powerpc/vxworks2.sd, ld-powerpc/vxworks2-static.sd: New tests. + * ld-powerpc/powerpc.exp: Run them. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-powerpc/vxworks1.ld: Use a page alignment of 0x10000. + * ld-powerpc/vxworks1.dd: Update accordingly. + * ld-powerpc/vxworks1-lib.nd: Likewise. + * ld-powerpc/vxworks1-lib.rd: Likewise. + * ld-powerpc/vxworks1.rd: Likewise. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/vxworks1.ld (.data): New section. + * ld-i386/vxworks1-lib.s: Add a pointer to a local symbol. + * ld-i386/vxworks1-lib.rd: Test for the associated reloc. + * ld-powerpc/vxworks1.ld (.data): New section. + * ld-powerpc/vxworks1-lib.s: Add a pointer to a local symbol. + * ld-powerpc/vxworks1-lib.rd: Test for the associated reloc. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/ld-i386/vxworks1-lib.nd: New test. + * ld-i386/i386.exp: Run it. + * ld-powerpc/ld-powerpc/vxworks1-lib.nd: New test. + * ld-powerpc/powerc.exp: Run it. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/vxworks1.ld: Use bigger alignments. Make sure .bss isn't + placed as an orphan. + * ld-i386/vxworks1-lib.dd, ld-i386/vxworks1.dd, + * ld-i386/vxworks1.rd: Update accordingly. + * ld-i386/vxworks1-lib.rd: Likewise. Remove symbol indexes. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * ld-powerpc/vxworks1-lib.s, ld-powerpc/vxworks1-lib.dd, + * ld-powerpc/vxworks1-lib.rd, ld-powerpc/vxworks1.s, + * ld-powerpc/vxworks1.dd, ld-powerpc/vxworks1.rd, + * ld-powerpc/vxworks1.ld, ld-powerpc/vxworks1.sd: New test. + * ld-powerpc/powerpc.exp: Run it. + +2006-02-28 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/vxworks1-lib.s, ld-i386/vxworks1-lib.dd, + * ld-i386/vxworks1-lib.rd, ld-i386/vxworks1.s, ld-i386/vxworks1.dd, + * ld-i386/vxworks1.rd, ld-i386/vxworks1.ld: New test. + * ld-i386/i386.exp: Run it. + +2006-02-28 Richard Sandiford <richard@codesourcery.com> + + * ld-i386/emit-relocs.s, ld-i386/emit-relocs.d: New test. + * ld-i386/i386.exp: Run it. + +2006-02-23 H.J. Lu <hongjiu.lu@intel.com> + + * ld-pie/weakundef-data.c: Fix the typo. + +2006-02-22 H.J. Lu <hongjiu.lu@intel.com> + + * ld-pie/pie.c: New file. + + * ld-pie/pie.exp: Check if compiler supports -pie. + +2006-02-20 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/2218 + * ld-pie/pie.exp: Add the weak undefined data test. + + * ld-pie/weakundef-data.c: New file. + +2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> + Anil Paranjape <anilp1@kpitcummins.com> + Shilin Shakti <shilins@kpitcummins.com> + + * ld-xc16x: New directory. + * ld-xc16x/absrel.d: New file. + * ld-xc16x/absrel.s: New file. + * ld-xc16x/offset.d: New file. + * ld-xc16x/offset.s: New file. + * ld-xc16x/pcreloc.d: New file. + * ld-xc16x/pcreloc.s: New file. + * ld-xc16x/xc16x.exp: New file. + +2006-02-07 Paul Brook <paul@codesourcery.com> + + * ld-arm/arm-elf.exp: Add thumb-entry test. + * ld-arm/thumb-entry.d: New test. + * ld-arm/thumb-entry.s: New test. + +2006-02-04 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/tls-hidden2a.s, ld-mips-elf/tls-hidden2b.s, + * ld/testsuite/ld-mips-elf/tls-hidden2.d, + * ld/testsuite/ld-mips-elf/tls-hidden2-got.d: New test. + * ld-mips-elf/mips-elf.exp: Run it. + +2006-02-04 Richard Sandiford <richard@codesourcery.com> + + * ld-mips-elf/rel32-n32.d: Adjust for changes in linker behaviour. + * ld-mips-elf/rel32-o32.d: Likewise. + * ld-mips-elf/rel64.d: Likewise. + * ld-mips-elf/tls-multi-got-1.got: Likewise. + * ld-mips-elf/tls-multi-got-1.r: Likewise. + * ld-mips-elf/tlsdyn-o32-1.d: Likewise. + * ld-mips-elf/tlsdyn-o32-1.got: Likewise. + * ld-mips-elf/tlsdyn-o32-2.d: Likewise. + * ld-mips-elf/tlsdyn-o32-2.got: Likewise. + * ld-mips-elf/tlsdyn-o32-3.d: Likewise. + * ld-mips-elf/tlsdyn-o32-3.got: Likewise. + * ld-mips-elf/tlsdyn-o32.d: Likewise. + * ld-mips-elf/tlsdyn-o32.got: Likewise. + * ld-mips-elf/tlslib-o32-hidden.got: Likewise. + * ld-mips-elf/tlslib-o32-ver.got: Likewise. + * ld-mips-elf/tlslib-o32.got: Likewise. + +2006-02-02 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/tlsbin.rd: Undo the last change. + * ld-i386/tlsbindesc.rd: Likewise. + * ld-i386/tlsdesc.rd: Likewise. + * ld-i386/tlsnopic.rd: Likewise. + * ld-i386/tlspic.rd: Likewise. + * ld-powerpc/tlsexe.r: Likewise. + * ld-powerpc/tlsexe32.r: Likewise. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.r: Likewise. + * ld-powerpc/tlsso32.r: Likewise. + * ld-powerpc/tlstocso.r: Likewise. + * ld-s390/tlsbin.rd: Likewise. + * ld-s390/tlsbin_64.rd: Likewise. + * ld-s390/tlspic.rd: Likewise. + * ld-s390/tlspic_64.rd: Likewise. + * ld-sh/tlsbin-2.d: Likewise. + * ld-sh/tlspic-2.d: Likewise. + * ld-x86-64/tlsbin.rd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsdesc.rd: Likewise. + * ld-x86-64/tlspic.rd: Likewise. + +2006-02-02 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/tlsbin.rd: Update for changed segment map. + * ld-i386/tlsbindesc.rd: Likewise. + * ld-i386/tlsdesc.rd: Likewise. + * ld-i386/tlsnopic.rd: Likewise. + * ld-i386/tlspic.rd: Likewise. + * ld-powerpc/tlsexe.r: Likewise. + * ld-powerpc/tlsexe32.r: Likewise. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.r: Likewise. + * ld-powerpc/tlsso32.r: Likewise. + * ld-powerpc/tlstocso.r: Likewise. + * ld-s390/tlsbin.rd: Likewise. + * ld-s390/tlsbin_64.rd: Likewise. + * ld-s390/tlspic.rd: Likewise. + * ld-s390/tlspic_64.rd: Likewise. + * ld-sh/tlsbin-2.d: Likewise. + * ld-sh/tlspic-2.d: Likewise. + * ld-x86-64/tlsbin.rd: Likewise. + * ld-x86-64/tlsbindesc.rd: Likewise. + * ld-x86-64/tlsdesc.rd: Likewise. + * ld-x86-64/tlspic.rd: Likewise. + +2006-01-31 Eric Botcazou <ebotcazou@libertysurf.fr> + + * ld-sparc/sparc.exp: Do not run 64-bit tests on Solaris 2.5.1 + and Solaris 2.6. + +2006-01-27 H.J. Lu <hongjiu.lu@intel.com> + + PR ld/2218 + * ld-pie/pie.exp: New file. + * ld-pie/weakundef.c: Likewise. + * ld-pie/weakundef.out: Likewise. + + * lib/ld-lib.exp (run_ld_link_exec_tests): Fix nesting. Support + building PIE and shared library. + +2006-01-18 Alexandre Oliva <aoliva@redhat.com> + + Introduce TLS descriptors for i386 and x86_64. + * ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*. + Add new tests. + * ld-i386/pcrel16.d: Add -melf_i386. + * ld-i386/pcrel8.d: Likewise. + * ld-i386/tlsbindesc.dd: New. + * ld-i386/tlsbindesc.rd: New. + * ld-i386/tlsbindesc.s: New. + * ld-i386/tlsbindesc.sd: New. + * ld-i386/tlsbindesc.td: New. + * ld-i386/tlsdesc.dd: New. + * ld-i386/tlsdesc.rd: New. + * ld-i386/tlsdesc.s: New. + * ld-i386/tlsdesc.sd: New. + * ld-i386/tlsdesc.td: New. + * ld-i386/tlsgdesc.dd: New. + * ld-i386/tlsgdesc.rd: New. + * ld-i386/tlsgdesc.s: New. + * ld-x86-64/x86-64.exp: Run new tests. + * ld-x86-64/tlsbindesc.dd: New. + * ld-x86-64/tlsbindesc.rd: New. + * ld-x86-64/tlsbindesc.s: New. + * ld-x86-64/tlsbindesc.sd: New. + * ld-x86-64/tlsbindesc.td: New. + * ld-x86-64/tlsdesc.dd: New. + * ld-x86-64/tlsdesc.pd: New. + * ld-x86-64/tlsdesc.rd: New. + * ld-x86-64/tlsdesc.s: New. + * ld-x86-64/tlsdesc.sd: New. + * ld-x86-64/tlsdesc.td: New. + * ld-x86-64/tlsgdesc.dd: New. + * ld-x86-64/tlsgdesc.rd: New. + * ld-x86-64/tlsgdesc.s: New. + +2006-01-03 Hans-Peter Nilsson <hp@bitrange.com> + + * ld-mmix/sec-1.d: Adjust for section order changes. + +For older changes see ChangeLog-2005 + +Local Variables: +mode: change-log +left-margin: 8 +fill-column: 74 +version-control: never +End: diff --git a/ld/testsuite/ld-alpha/tlsbin.rd b/ld/testsuite/ld-alpha/tlsbin.rd index 8a5a78ab397ef..e92e55f387782 100644 --- a/ld/testsuite/ld-alpha/tlsbin.rd +++ b/ld/testsuite/ld-alpha/tlsbin.rd @@ -80,9 +80,6 @@ Symbol table '.symtab' contains [0-9]+ entries: [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +11 [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +12 [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +13 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +14 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +15 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +16 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl1 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl2 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl3 @@ -121,7 +118,7 @@ Symbol table '.symtab' contains [0-9]+ entries: [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +10 bg7 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL HIDDEN +9 sh5 [0-9 ]+: [0-9a-f]+ +0 NOTYPE +GLOBAL DEFAULT +ABS __bss_start -[0-9 ]+: [0-9a-f]+ +136 FUNC +GLOBAL DEFAULT +7 fn2 +[0-9 ]+: [0-9a-f]+ +136 FUNC +GLOBAL DEFAULT +\[<other>: 88\] +7 fn2 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +9 sg2 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +UND sG1 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL HIDDEN +9 sh1 diff --git a/ld/testsuite/ld-alpha/tlsbinr.rd b/ld/testsuite/ld-alpha/tlsbinr.rd index 8497075ac895d..4938a142d90f8 100644 --- a/ld/testsuite/ld-alpha/tlsbinr.rd +++ b/ld/testsuite/ld-alpha/tlsbinr.rd @@ -75,9 +75,6 @@ Symbol table '.symtab' contains [0-9]+ entries: [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +11 [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +12 [0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +13 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +14 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +15 -[0-9 ]+: [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +16 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl1 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl2 [0-9 ]+: [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +9 sl3 @@ -116,7 +113,7 @@ Symbol table '.symtab' contains [0-9]+ entries: [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +10 bg7 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL HIDDEN +9 sh5 [0-9 ]+: [0-9a-f]+ +0 NOTYPE +GLOBAL DEFAULT +ABS __bss_start -[0-9 ]+: [0-9a-f]+ +136 FUNC +GLOBAL DEFAULT +7 fn2 +[0-9 ]+: [0-9a-f]+ +136 FUNC +GLOBAL DEFAULT +\[<other>: 88\] +7 fn2 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +9 sg2 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +UND sG1 [0-9 ]+: [0-9a-f]+ +0 TLS +GLOBAL HIDDEN +9 sh1 diff --git a/ld/testsuite/ld-alpha/tlspic.rd b/ld/testsuite/ld-alpha/tlspic.rd index 04b2e0fe951e6..bed345bc71e7e 100644 --- a/ld/testsuite/ld-alpha/tlspic.rd +++ b/ld/testsuite/ld-alpha/tlspic.rd @@ -57,17 +57,13 @@ Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries: Symbol table '.dynsym' contains [0-9]+ entries: Num: Value Size Type Bind Vis Ndx Name .* [0-9a-f]+ 0 NOTYPE LOCAL DEFAULT UND -.* [0-9a-f]+ 0 SECTION LOCAL DEFAULT 6 -.* [0-9a-f]+ 0 SECTION LOCAL DEFAULT 7 -.* [0-9a-f]+ 0 SECTION LOCAL DEFAULT 8 -.* [0-9a-f]+ 0 SECTION LOCAL DEFAULT 9 .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg8 .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg3 .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg4 .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg5 .* [0-9a-f]+ 0 NOTYPE GLOBAL DEFAULT UND __tls_get_addr .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg1 -.* [0-9a-f]+ 172 FUNC GLOBAL DEFAULT 6 fn1 +.* [0-9a-f]+ 172 FUNC GLOBAL DEFAULT \[<other>: 88\] 6 fn1 .* [0-9a-f]+ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg2 .* [0-9a-f]+ 0 TLS GLOBAL DEFAULT 8 sg6 @@ -90,9 +86,6 @@ Symbol table '.symtab' contains [0-9]+ entries: .* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +10 .* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +11 .* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +12 -.* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +13 -.* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +14 -.* [0-9a-f]+ +0 SECTION LOCAL +DEFAULT +15 .* [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +8 sl1 .* [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +8 sl2 .* [0-9a-f]+ +0 TLS +LOCAL +DEFAULT +8 sl3 @@ -126,7 +119,7 @@ Symbol table '.symtab' contains [0-9]+ entries: .* [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +8 sg5 .* [0-9a-f]+ +0 NOTYPE +GLOBAL DEFAULT +UND __tls_get_addr .* [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +8 sg1 -.* [0-9a-f]+ +172 FUNC +GLOBAL DEFAULT +6 fn1 +.* [0-9a-f]+ +172 FUNC +GLOBAL DEFAULT +\[<other>: 88\] +6 fn1 .* [0-9a-f]+ +0 NOTYPE +GLOBAL DEFAULT +ABS __bss_start .* [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +8 sg2 .* [0-9a-f]+ +0 TLS +GLOBAL DEFAULT +8 sg6 diff --git a/ld/testsuite/ld-arm/arm-app-abs32.d b/ld/testsuite/ld-arm/arm-app-abs32.d index 9a4da22b33f78..ce684d44e5060 100644 --- a/ld/testsuite/ld-arm/arm-app-abs32.d +++ b/ld/testsuite/ld-arm/arm-app-abs32.d @@ -7,7 +7,7 @@ start address .* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} - .*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e92dd800 push {fp, ip, lr, pc} + .*: e59f0004 ldr r0, \[pc, #4\] ; .* <_start\+0x14> + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: .* .* diff --git a/ld/testsuite/ld-arm/arm-app.d b/ld/testsuite/ld-arm/arm-app.d index 207961ea0fa31..3ed76f06e9bfe 100644 --- a/ld/testsuite/ld-arm/arm-app.d +++ b/ld/testsuite/ld-arm/arm-app.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,16 +19,16 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff4 bl .* <_start-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func2>: diff --git a/ld/testsuite/ld-arm/arm-be8.d b/ld/testsuite/ld-arm/arm-be8.d new file mode 100644 index 0000000000000..43ce9b016e1c6 --- /dev/null +++ b/ld/testsuite/ld-arm/arm-be8.d @@ -0,0 +1,8 @@ + +.*: file format.* + +Contents of section .text: + 8000 0000a0e3 1eff2fe1 c0467047 fff7fcff .* + 8010 12345678 .* +# Ignore .ARM.attributes section +#... diff --git a/ld/testsuite/ld-arm/arm-be8.s b/ld/testsuite/ld-arm/arm-be8.s new file mode 100644 index 0000000000000..871b6911535bf --- /dev/null +++ b/ld/testsuite/ld-arm/arm-be8.s @@ -0,0 +1,14 @@ +.arch armv6 +.text +arm: +mov r0, #0 +$m: +bx lr +.thumb +.thumb_func +thumb: +nop +bx lr +bl thumb +data: +.word 0x12345678 diff --git a/ld/testsuite/ld-arm/arm-call.d b/ld/testsuite/ld-arm/arm-call.d index fd4cd1358cc8e..34c31d9a396a4 100644 --- a/ld/testsuite/ld-arm/arm-call.d +++ b/ld/testsuite/ld-arm/arm-call.d @@ -11,9 +11,9 @@ Disassembly of section .text: 8010: fa00000a blx 8040 <t1> 8014: fb000009 blx 8042 <t2> 8018: ea00000f b 805c <__t1_from_arm> - 801c: ea000011 b 8068 <__t2_from_arm> + 801c: ea000010 b 8064 <__t2_from_arm> 8020: 1b00000d blne 805c <__t1_from_arm> - 8024: 1b00000f blne 8068 <__t2_from_arm> + 8024: 1b00000e blne 8064 <__t2_from_arm> 8028: 1b000003 blne 803c <arm> 802c: eb000002 bl 803c <arm> 8030: faffffff blx 8034 <thumblocal> @@ -48,11 +48,9 @@ Disassembly of section .text: 8058: f7ff efd2 blx 8000 <_start> 0000805c <__t1_from_arm>: - 805c: e59fc000 ldr ip, \[pc, #0\] ; 8064 <__t1_from_arm\+0x8> - 8060: e12fff1c bx ip - 8064: 00008041 andeq r8, r0, r1, asr #32 - -00008068 <__t2_from_arm>: - 8068: e59fc000 ldr ip, \[pc, #0\] ; 8070 <__t2_from_arm\+0x8> - 806c: e12fff1c bx ip - 8070: 00008043 andeq r8, r0, r3, asr #32 + 805c: e51ff004 ldr pc, \[pc, #-4\] ; 8060 <__t1_from_arm\+0x4> + 8060: 00008041 .word 0x00008041 + +00008064 <__t2_from_arm>: + 8064: e51ff004 ldr pc, \[pc, #-4\] ; 8068 <__t2_from_arm\+0x4> + 8068: 00008043 .word 0x00008043 diff --git a/ld/testsuite/ld-arm/arm-dyn.ld b/ld/testsuite/ld-arm/arm-dyn.ld index 96bc10c0c4c5a..4f2e0de39e0ca 100644 --- a/ld/testsuite/ld-arm/arm-dyn.ld +++ b/ld/testsuite/ld-arm/arm-dyn.ld @@ -187,11 +187,6 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - .stack 0x80000 : - { - _stack = .; - *(.stack) - } .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 1a9fc00aeb8c0..a83c1eedf0b47 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -21,7 +21,7 @@ if {[istarget "arm-*-vxworks"]} { {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "" {vxworks1-lib.s} {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} - {readelf --symbols vxworks1-lib.nd}} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} "libvxworks1.so"} {"VxWorks executable test 1 (dynamic)" \ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" @@ -41,6 +41,7 @@ if {[istarget "arm-*-vxworks"]} { } run_ld_link_tests $armvxworkstests run_dump_test "vxworks1-static" + run_dump_test "emit-relocs1-vxworks" } # Exclude non-ARM-ELF targets. @@ -59,6 +60,12 @@ if { ![is_elf_format] || ![istarget "arm*-*-*"] } { # readelf: Apply readelf options on result. Compare with regex (last arg). set armelftests { + {"Group relocations" "-Ttext 0x8000 --section-start zero=0x0 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" {group-relocs.s} + {{objdump -Dr group-relocs.d}} + "group-relocs"} + {"Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x401000" "" {thumb1-bl.s} + {{objdump -dr thumb1-bl.d}} + "thumb1-bl"} {"Simple non-PIC shared library" "-shared" "" {arm-lib.s} {{objdump -fdw arm-lib.d} {objdump -Rw arm-lib.r}} "arm-lib.so"} @@ -74,7 +81,11 @@ set armelftests { {"Non-pcrel function reference" "tmpdir/arm-lib.so" "" {arm-app-abs32.s} {{objdump -fdw arm-app-abs32.d} {objdump -Rw arm-app-abs32.r}} "arm-app-abs32"} - {"Mixed ARM/Thumb shared library" "-shared -T arm-lib.ld" "" + {"Thumb shared library with ARM entry points" "-shared -T arm-lib.ld" "-mthumb-interwork" + {mixed-lib.s} + {{objdump -fdw armthumb-lib.d} {readelf -Ds armthumb-lib.sym}} + "armthumb-lib.so"} + {"Mixed ARM/Thumb shared library" "-shared -T arm-lib.ld -use-blx" "" {mixed-lib.s} {{objdump -fdw mixed-lib.d} {objdump -Rw mixed-lib.r} {readelf -Ds mixed-lib.sym}} @@ -122,6 +133,67 @@ set armelftests { {"thumb-rel32" "-static -T arm.ld" "" {thumb-rel32.s} {{objdump -s thumb-rel32.d}} "thumb-rel32"} + {"MOVW/MOVT" "-static -T arm.ld" "" {arm-movwt.s} + {{objdump -dw arm-movwt.d}} + "arm-movwt"} + {"BE8 Mapping Symbols" "-static -T arm.ld -EB --be8" "-EB" {arm-be8.s} + {{objdump -s arm-be8.d}} + "arm-be8"} + {"Using Thumb lib by another lib" "-shared tmpdir/mixed-lib.so" "" {use-thumb-lib.s} + {{readelf -Ds use-thumb-lib.sym}} + "use-thumb-lib.so"} + {"VFP11 denorm erratum fix, scalar operation" + "-EL --vfp11-denorm-fix=scalar -Ttext=0x8000" "-EL -mfpu=vfpxd" {vfp11-fix-scalar.s} + {{objdump -dr vfp11-fix-scalar.d}} + "vfp11-fix-scalar"} + {"VFP11 denorm erratum fix, vector operation" + "-EB --vfp11-denorm-fix=vector -Ttext=0x8000" "-EB -mfpu=vfpxd" {vfp11-fix-vector.s} + {{objdump -dr vfp11-fix-vector.d}} + "vfp11-fix-vector"} + {"VFP11 denorm erratum fix, embedded code-like data" + "-EL --vfp11-denorm-fix=scalar -Ttext=0x8000" "-EL -mfpu=vfpxd" {vfp11-fix-none.s} + {{objdump -dr vfp11-fix-none.d}} + "vfp11-fix-none"} + {"Unwinding and -gc-sections" "-gc-sections" "" {gc-unwind.s} + {{objdump -sj.data gc-unwind.d}} + "gc-unwind"} + {"arm-pic-veneer" "-static -T arm.ld --pic-veneer" "" {arm-pic-veneer.s} + {{objdump -d arm-pic-veneer.d}} + "arm-pic-veneer"} + {"Preempt Thumb symbol" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx" "" + {preempt-app.s} + {{readelf -Ds preempt-app.sym}} + "preempt-app"} + {"jump19" "-static -T arm.ld" "" {jump19.s} + {{objdump -dr jump19.d}} + "jump19"} + {"EABI attribute merging" "-r" "" {attr-merge.s attr-merge.s} + {{readelf -A attr-merge.attr}} + "attr-merge"} + {"callweak" "-static -T arm.ld" "" {callweak.s} + {{objdump -dr callweak.d}} + "callweak"} } run_ld_link_tests $armelftests +run_dump_test "group-relocs-alu-bad" +run_dump_test "group-relocs-ldr-bad" +run_dump_test "group-relocs-ldrs-bad" +run_dump_test "group-relocs-ldc-bad" +run_dump_test "thumb2-bl-as-thumb1-bad" +run_dump_test "thumb2-bl-bad" +run_dump_test "emit-relocs1" + +# Exclude non-ARM-EABI targets. + +if { ![istarget "arm*-*-*eabi"] } { + return +} + +set armeabitests { + {"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x1001000" "" {thumb2-bl.s} + {{objdump -dr thumb2-bl.d}} + "thumb2-bl"} +} + +run_ld_link_tests $armeabitests diff --git a/ld/testsuite/ld-arm/arm-lib-plt32.d b/ld/testsuite/ld-arm/arm-lib-plt32.d index 58206f43796cf..d1b7944f643cb 100644 --- a/ld/testsuite/ld-arm/arm-lib-plt32.d +++ b/ld/testsuite/ld-arm/arm-lib-plt32.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff9 bl .* <lib_func1-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <lib_func2>: diff --git a/ld/testsuite/ld-arm/arm-lib.d b/ld/testsuite/ld-arm/arm-lib.d index e3257c9551496..9d25bbbfa78f8 100644 --- a/ld/testsuite/ld-arm/arm-lib.d +++ b/ld/testsuite/ld-arm/arm-lib.d @@ -7,7 +7,7 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff9 bl .* <lib_func1-0xc> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <lib_func2>: diff --git a/ld/testsuite/ld-arm/arm-lib.ld b/ld/testsuite/ld-arm/arm-lib.ld index 0415d20d8a676..2d2850e3da10b 100644 --- a/ld/testsuite/ld-arm/arm-lib.ld +++ b/ld/testsuite/ld-arm/arm-lib.ld @@ -180,11 +180,6 @@ SECTIONS .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - .stack 0x80000 : - { - _stack = .; - *(.stack) - } .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } /DISCARD/ : { *(.note.GNU-stack) } } diff --git a/ld/testsuite/ld-arm/arm-movwt.d b/ld/testsuite/ld-arm/arm-movwt.d new file mode 100644 index 0000000000000..bf551648d6d85 --- /dev/null +++ b/ld/testsuite/ld-arm/arm-movwt.d @@ -0,0 +1,39 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <[^>]*>: + 8000: e3000000 movw r0, #0 ; 0x0 + 8004: e3411234 movt r1, #4660 ; 0x1234 + 8008: e3082000 movw r2, #32768 ; 0x8000 + 800c: e3413233 movt r3, #4659 ; 0x1233 + 8010: e3004011 movw r4, #17 ; 0x11 + 8014: e3415234 movt r5, #4660 ; 0x1234 + 8018: e3086011 movw r6, #32785 ; 0x8011 + 801c: e3417233 movt r7, #4659 ; 0x1233 + +00008020 <[^>]*>: + 8020: f240 0700 movw r7, #0 ; 0x0 + 8024: f2c1 2634 movt r6, #4660 ; 0x1234 + 8028: f248 0500 movw r5, #32768 ; 0x8000 + 802c: f2c1 2433 movt r4, #4659 ; 0x1233 + 8030: f240 0311 movw r3, #17 ; 0x11 + 8034: f2c1 2234 movt r2, #4660 ; 0x1234 + 8038: f248 0111 movw r1, #32785 ; 0x8011 + 803c: f2c1 2033 movt r0, #4659 ; 0x1233 + +Disassembly of section .far: + +12340000 <[^>]*>: +12340000: e3080000 movw r0, #32768 ; 0x8000 +12340004: e34e0dcc movt r0, #60876 ; 0xedcc +12340008: e3080021 movw r0, #32801 ; 0x8021 +1234000c: e34e0dcc movt r0, #60876 ; 0xedcc + +12340010 <[^>]*>: +12340010: f248 0000 movw r0, #32768 ; 0x8000 +12340014: f6ce 50cc movt r0, #60876 ; 0xedcc +12340018: f248 0021 movw r0, #32801 ; 0x8021 +1234001c: f6ce 50cc movt r0, #60876 ; 0xedcc + diff --git a/ld/testsuite/ld-arm/arm-movwt.s b/ld/testsuite/ld-arm/arm-movwt.s new file mode 100644 index 0000000000000..ba8b1c5c2f34f --- /dev/null +++ b/ld/testsuite/ld-arm/arm-movwt.s @@ -0,0 +1,44 @@ + .text + .arch armv6t2 + .syntax unified + .global _start + .type _start, %function +_start: +base1: +arm1: + movw r0, #:lower16:arm2 + movt r1, #:upper16:arm2 + movw r2, #:lower16:(arm2 - arm1) + movt r3, #:upper16:(arm2 - arm1) + movw r4, #:lower16:thumb2 + movt r5, #:upper16:thumb2 + movw r6, #:lower16:(thumb2 - arm1) + movt r7, #:upper16:(thumb2 - arm1) + .thumb + .type thumb1, %function + .thumb_func +thumb1: + movw r7, #:lower16:arm2 + movt r6, #:upper16:arm2 + movw r5, #:lower16:(arm2 - arm1) + movt r4, #:upper16:(arm2 - arm1) + movw r3, #:lower16:thumb2 + movt r2, #:upper16:thumb2 + movw r1, #:lower16:(thumb2 - arm1) + movt r0, #:upper16:(thumb2 - arm1) + + .section .far, "ax", %progbits + .arm +arm2: + movw r0, #:lower16:(arm1 - arm2) + movt r0, #:upper16:(arm1 - arm2) + movw r0, #:lower16:(thumb1 - arm2) + movt r0, #:upper16:(thumb1 - arm2) + .thumb + .type thumb2, %function + .thumb_func +thumb2: + movw r0, #:lower16:(arm1 - arm2) + movt r0, #:upper16:(arm1 - arm2) + movw r0, #:lower16:(thumb1 - arm2) + movt r0, #:upper16:(thumb1 - arm2) diff --git a/ld/testsuite/ld-arm/arm-pic-veneer.d b/ld/testsuite/ld-arm/arm-pic-veneer.d new file mode 100644 index 0000000000000..97eeb52f153d4 --- /dev/null +++ b/ld/testsuite/ld-arm/arm-pic-veneer.d @@ -0,0 +1,17 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: ea000000 b 8008 <__foo_from_arm> + +00008004 <foo>: + 8004: 46c0 nop \(mov r8, r8\) + 8006: 4770 bx lr + +00008008 <__foo_from_arm>: + 8008: e59fc004 ldr ip, \[pc, #4\] ; 8014 <__foo_from_arm\+0xc> + 800c: e08cc00f add ip, ip, pc + 8010: e12fff1c bx ip + 8014: fffffff1 .word 0xfffffff1 diff --git a/ld/testsuite/ld-arm/arm-pic-veneer.s b/ld/testsuite/ld-arm/arm-pic-veneer.s new file mode 100644 index 0000000000000..9e09ed6333771 --- /dev/null +++ b/ld/testsuite/ld-arm/arm-pic-veneer.s @@ -0,0 +1,14 @@ +.text +.arm +.global _start +.type _start, %function +_start: +b foo + +.thumb +.global foo +.type foo, %function +foo: +nop +bx lr + diff --git a/ld/testsuite/ld-arm/arm-static-app.d b/ld/testsuite/ld-arm/arm-static-app.d index 9a3309d6136b2..f18f3c6ceafa2 100644 --- a/ld/testsuite/ld-arm/arm-static-app.d +++ b/ld/testsuite/ld-arm/arm-static-app.d @@ -8,16 +8,16 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000001 bl .* <app_func2> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .* <app_func2>: diff --git a/ld/testsuite/ld-arm/arm.ld b/ld/testsuite/ld-arm/arm.ld index 4ef7d824ec223..c9e01e65a8228 100644 --- a/ld/testsuite/ld-arm/arm.ld +++ b/ld/testsuite/ld-arm/arm.ld @@ -14,5 +14,7 @@ SECTIONS } =0 . = 0x9000; .got : { *(.got) *(.got.plt)} + . = 0x12340000; + .far : { *(.far) } .ARM.attribues 0 : { *(.ARM.atttributes) } } diff --git a/ld/testsuite/ld-arm/armthumb-lib.d b/ld/testsuite/ld-arm/armthumb-lib.d new file mode 100644 index 0000000000000..bd45c87fce0c5 --- /dev/null +++ b/ld/testsuite/ld-arm/armthumb-lib.d @@ -0,0 +1,44 @@ + +tmpdir/armthumb-lib.so: file format elf32-(little|big)arm +architecture: arm, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1c> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* ; 0x.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]! +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop \(mov r0,r0\) + .*: e1a00000 nop \(mov r0,r0\) + .*: e1a00000 nop \(mov r0,r0\) + +.* <__real_lib_func2>: + .*: 4770 bx lr + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + .*: 46c0 nop \(mov r8, r8\) + +.* <lib_func2>: + .*: e59fc004 ldr ip, \[pc, #4\] ; .* <lib_func2\+0xc> + .*: e08cc00f add ip, ip, pc + .*: e12fff1c bx ip + .*: ffffffe5 .* diff --git a/ld/testsuite/ld-arm/armthumb-lib.sym b/ld/testsuite/ld-arm/armthumb-lib.sym new file mode 100644 index 0000000000000..d482ccd4ba2ab --- /dev/null +++ b/ld/testsuite/ld-arm/armthumb-lib.sym @@ -0,0 +1,17 @@ + +Symbol table for image: + Num Buc: Value Size Type Bind Vis Ndx Name + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end + .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__ + .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start + .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2 + .. ..: .......0 2 FUNC GLOBAL DEFAULT 6 lib_func2 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end diff --git a/ld/testsuite/ld-arm/attr-merge.attr b/ld/testsuite/ld-arm/attr-merge.attr new file mode 100644 index 0000000000000..341e6d1e412cc --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge.attr @@ -0,0 +1,12 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align8_needed: Yes + Tag_ABI_align8_preserved: Yes, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/ld/testsuite/ld-arm/attr-merge.s b/ld/testsuite/ld-arm/attr-merge.s new file mode 100644 index 0000000000000..b56f6e32d6e36 --- /dev/null +++ b/ld/testsuite/ld-arm/attr-merge.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 4 + .file "attr-merge.s" diff --git a/ld/testsuite/ld-arm/emit-relocs1-vxworks.d b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d new file mode 100644 index 0000000000000..6d84a4c349b8b --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1-vxworks.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_PC24 target\+0xf+8 + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_PC24 target\+0x8 diff --git a/ld/testsuite/ld-arm/emit-relocs1.d b/ld/testsuite/ld-arm/emit-relocs1.d new file mode 100644 index 0000000000000..191cb52c8670e --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_(JUMP|PC)24 target + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_(JUMP|PC)24 target diff --git a/ld/testsuite/ld-arm/emit-relocs1.s b/ld/testsuite/ld-arm/emit-relocs1.s new file mode 100644 index 0000000000000..8971d4dbfabdc --- /dev/null +++ b/ld/testsuite/ld-arm/emit-relocs1.s @@ -0,0 +1,6 @@ + nop + nop + nop + nop + b target + b target+16 diff --git a/ld/testsuite/ld-arm/gc-unwind.d b/ld/testsuite/ld-arm/gc-unwind.d new file mode 100644 index 0000000000000..fbb79115b8f6e --- /dev/null +++ b/ld/testsuite/ld-arm/gc-unwind.d @@ -0,0 +1,5 @@ + +.*: file format.* + +Contents of section .data: + [^ ]* 22222222 .* diff --git a/ld/testsuite/ld-arm/gc-unwind.s b/ld/testsuite/ld-arm/gc-unwind.s new file mode 100644 index 0000000000000..c5326c28651a2 --- /dev/null +++ b/ld/testsuite/ld-arm/gc-unwind.s @@ -0,0 +1,38 @@ +@ Test -gc-sections and unwinding tables. .data.eh should be pulled in +@ via the EH tables, .data.foo should not. +.text +.global _start +.fnstart +_start: +bx lr +.personality my_pr +.handlerdata +.word 0 +.fnend + +.section .data.foo +my_foo: +.word 0x11111111 + +.section .text.foo +.fnstart +foo: +bx lr +.personality my_pr +.handlerdata +.word my_foo +.fnend + +.section .data.eh +my_eh: +.word 0x22222222 + +.section .text.eh +.fnstart +my_pr: +bx lr +.personality my_pr +.handlerdata +.word my_eh +.fnend + diff --git a/ld/testsuite/ld-arm/group-relocs-alu-bad.d b/ld/testsuite/ld-arm/group-relocs-alu-bad.d new file mode 100644 index 0000000000000..0346db1a9732d --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-alu-bad.d @@ -0,0 +1,4 @@ +#name: ALU group relocations failure test +#source: group-relocs-alu-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x9010 +#error: Overflow whilst splitting 0x1010 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-alu-bad.s b/ld/testsuite/ld-arm/group-relocs-alu-bad.s new file mode 100644 index 0000000000000..e644669c3b9fc --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-alu-bad.s @@ -0,0 +1,20 @@ +@ Test intended to fail for ALU group relocations. +@ +@ Beware when editing this file: it is carefully crafted so that +@ a specific PC-relative offset arises. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0:(bar) + +@ We will place the section foo at 0x9004. + + .section foo + +bar: + mov r0, #0 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldc-bad.d b/ld/testsuite/ld-arm/group-relocs-ldc-bad.d new file mode 100644 index 0000000000000..d4bfb2dfbddbf --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldc-bad.d @@ -0,0 +1,4 @@ +#name: LDC group relocations failure test +#source: group-relocs-ldc-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x118400 +#error: Overflow whilst splitting 0x110400 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-ldc-bad.s b/ld/testsuite/ld-arm/group-relocs-ldc-bad.s new file mode 100644 index 0000000000000..611255b063da4 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldc-bad.s @@ -0,0 +1,19 @@ +@ Test intended to fail for LDC group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0_nc:(bar) + ldc 0, c0, [r0, #:pc_g1:(bar + 4)] + +@ We will place the section foo at 0x118400. +@ (The relocations above would be OK if it were at 0x118200, for example.) + + .section foo + +bar: + mov r0, #0 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad.d b/ld/testsuite/ld-arm/group-relocs-ldr-bad.d new file mode 100644 index 0000000000000..04586af34f5e4 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad.d @@ -0,0 +1,4 @@ +#name: LDR group relocations failure test +#source: group-relocs-ldr-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x8001000 +#error: .*Overflow whilst splitting 0x8001000 for group relocation.* diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad.s b/ld/testsuite/ld-arm/group-relocs-ldr-bad.s new file mode 100644 index 0000000000000..6ab4f3c97469b --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad.s @@ -0,0 +1,18 @@ +@ Test intended to fail for LDR group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldr r1, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8001000. + + .section foo + +bar: + mov r0, #0 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d new file mode 100644 index 0000000000000..0520184b3363b --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d @@ -0,0 +1,4 @@ +#name: LDRS group relocations failure test +#source: group-relocs-ldrs-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x8000100 +#error: Overflow whilst splitting 0x8000100 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s new file mode 100644 index 0000000000000..4480d4aa5f02b --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDRS group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldrd r2, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8000100. + + .section foo + +bar: + mov r0, #0 diff --git a/ld/testsuite/ld-arm/group-relocs.d b/ld/testsuite/ld-arm/group-relocs.d new file mode 100644 index 0000000000000..d1fdc7d1b773d --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs.d @@ -0,0 +1,69 @@ + +tmpdir/group-relocs: file format elf32-(little|big)arm + +Disassembly of section .text: + +00008000 <_start>: + 8000: e28f00bc add r0, pc, #188 ; 0xbc + 8004: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8008: e28000ec add r0, r0, #236 ; 0xec + 800c: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 8010: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8014: e28000e4 add r0, r0, #228 ; 0xe4 + 8018: e2800000 add r0, r0, #0 ; 0x0 + 801c: e28f0cee add r0, pc, #60928 ; 0xee00 + 8020: e28000f0 add r0, r0, #240 ; 0xf0 + 8024: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8028: e2800cee add r0, r0, #60928 ; 0xee00 + 802c: e28000f0 add r0, r0, #240 ; 0xf0 + 8030: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8034: e59010c0 ldr r1, \[r0, #192\] + 8038: e28008ff add r0, r0, #16711680 ; 0xff0000 + 803c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8040: e59010b8 ldr r1, \[r0, #184\] + 8044: e5901000 ldr r1, \[r0\] + 8048: e2800cee add r0, r0, #60928 ; 0xee00 + 804c: e59010f0 ldr r1, \[r0, #240\] + 8050: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8054: e2800cee add r0, r0, #60928 ; 0xee00 + 8058: e59010f0 ldr r1, \[r0, #240\] + 805c: e1c026d0 ldrd r2, \[r0, #96\] + 8060: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8064: e1c029d0 ldrd r2, \[r0, #144\] + 8068: e28008ff add r0, r0, #16711680 ; 0xff0000 + 806c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8070: e1c028d8 ldrd r2, \[r0, #136\] + 8074: e1c020d0 ldrd r2, \[r0\] + 8078: e2800cee add r0, r0, #60928 ; 0xee00 + 807c: e1c02fd0 ldrd r2, \[r0, #240\] + 8080: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8084: e2800cee add r0, r0, #60928 ; 0xee00 + 8088: e1c02fd0 ldrd r2, \[r0, #240\] + 808c: ed90000c ldc 0, cr0, \[r0, #48\] + 8090: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8094: ed900018 ldc 0, cr0, \[r0, #96\] + 8098: e28008ff add r0, r0, #16711680 ; 0xff0000 + 809c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 80a0: ed900016 ldc 0, cr0, \[r0, #88\] + 80a4: ed900000 ldc 0, cr0, \[r0\] + 80a8: e2800cee add r0, r0, #60928 ; 0xee00 + 80ac: ed90003c ldc 0, cr0, \[r0, #240\] + 80b0: e28008ff add r0, r0, #16711680 ; 0xff0000 + 80b4: e2800cee add r0, r0, #60928 ; 0xee00 + 80b8: ed90003c ldc 0, cr0, \[r0, #240\] + +000080bc <one_group_needed_alu_pc>: + 80bc: e3a00000 mov r0, #0 ; 0x0 +Disassembly of section zero: + +00000000 <one_group_needed_alu_sb>: + 0: e3a00000 mov r0, #0 ; 0x0 +Disassembly of section alpha: + +0000eef0 <two_groups_needed_alu_pc>: + eef0: e3a00000 mov r0, #0 ; 0x0 +Disassembly of section beta: + +00ffeef0 <three_groups_needed_alu_pc>: + ffeef0: e3a00000 mov r0, #0 ; 0x0 +#... diff --git a/ld/testsuite/ld-arm/group-relocs.s b/ld/testsuite/ld-arm/group-relocs.s new file mode 100644 index 0000000000000..da1a150726810 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs.s @@ -0,0 +1,156 @@ +@ Tests for group relocations. +@ +@ Beware when editing this file: it is carefully crafted so that +@ specific PC- and SB-relative offsets arise. +@ +@ Note that the gas tests have already checked that group relocations are +@ handled in the same way for local and external symbols. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + @ ALU, PC-relative + + @ Instructions start at .text + 0x0 + add r0, r15, #:pc_g0:(one_group_needed_alu_pc) + + @ Instructions start at .text + 0x4 + add r0, r15, #:pc_g0_nc:(two_groups_needed_alu_pc) + add r0, r0, #:pc_g1:(two_groups_needed_alu_pc + 4) + + @ Instructions start at .text + 0xc + add r0, r15, #:pc_g0_nc:(three_groups_needed_alu_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_alu_pc + 4) + add r0, r0, #:pc_g2:(three_groups_needed_alu_pc + 8) + + @ ALU, SB-relative + + add r0, r0, #:sb_g0:(one_group_needed_alu_sb) + + add r0, r15, #:sb_g0_nc:(two_groups_needed_alu_sb) + add r0, r0, #:sb_g1:(two_groups_needed_alu_sb) + + add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb) + add r0, r0, #:sb_g2:(three_groups_needed_alu_sb) + + @ LDR, PC-relative + + @ Instructions start at .text + 0x30 + add r0, r0, #:pc_g0_nc:(two_groups_needed_ldr_pc) + ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)] + + @ Instructions start at .text + 0x38 + add r0, r0, #:pc_g0_nc:(three_groups_needed_ldr_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4) + ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)] + + @ LDR, SB-relative + + ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)] + + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb) + ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)] + + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb) + ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)] + + @ LDRS, PC-relative + + @ Instructions start at .text + 0x5c + ldrd r2, [r0, #:pc_g0:(one_group_needed_ldrs_pc)] + + @ Instructions start at .text + 0x60 + add r0, r0, #:pc_g0_nc:(two_groups_needed_ldrs_pc) + ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)] + + @ Instructions start at .text + 0x68 + add r0, r0, #:pc_g0_nc:(three_groups_needed_ldrs_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4) + ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)] + + @ LDRS, SB-relative + + ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)] + + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb) + ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)] + + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb) + ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)] + + @ LDC, PC-relative + + @ Instructions start at .text + 0x8c + ldc 0, c0, [r0, #:pc_g0:(one_group_needed_ldc_pc)] + + @ Instructions start at .text + 0x90 + add r0, r0, #:pc_g0_nc:(two_groups_needed_ldc_pc) + ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)] + + @ Instructions start at .text + 0x98 + add r0, r0, #:pc_g0_nc:(three_groups_needed_ldc_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4) + ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)] + + @ LDC, SB-relative + + ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)] + + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb) + ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)] + + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb) + ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)] + +@ This point in the file is .text + 0xbc. + +one_group_needed_alu_pc: +one_group_needed_ldrs_pc: +one_group_needed_ldc_pc: + mov r0, #0 + +@ We will place the section zero at 0x0. + + .section zero + +one_group_needed_alu_sb: +one_group_needed_ldr_sb: +one_group_needed_ldrs_sb: +one_group_needed_ldc_sb: + mov r0, #0 + +@ We will place the section alpha at 0xeef0. + + .section alpha + +two_groups_needed_alu_sb: +two_groups_needed_ldr_sb: +two_groups_needed_ldrs_sb: +two_groups_needed_ldc_sb: +two_groups_needed_alu_pc: +two_groups_needed_ldr_pc: +two_groups_needed_ldrs_pc: +two_groups_needed_ldc_pc: + mov r0, #0 + +@ We will place the section beta at 0xffeef0. + + .section beta + +three_groups_needed_alu_sb: +three_groups_needed_ldr_sb: +three_groups_needed_ldrs_sb: +three_groups_needed_ldc_sb: +three_groups_needed_alu_pc: +three_groups_needed_ldr_pc: +three_groups_needed_ldrs_pc: +three_groups_needed_ldc_pc: + mov r0, #0 + diff --git a/ld/testsuite/ld-arm/jump19.d b/ld/testsuite/ld-arm/jump19.d new file mode 100644 index 0000000000000..303477f622b15 --- /dev/null +++ b/ld/testsuite/ld-arm/jump19.d @@ -0,0 +1,12 @@ + +.*jump19: file format elf32-(big|little)arm + +Disassembly of section .text: + +00008000 <_start>: + 8000: 4280 cmp r0, r0 + 8002: f010 8000 beq.w 18006 <bar> + ... + +00018006 <bar>: + 18006: 4770 bx lr diff --git a/ld/testsuite/ld-arm/jump19.s b/ld/testsuite/ld-arm/jump19.s new file mode 100644 index 0000000000000..1e3ddf06670a2 --- /dev/null +++ b/ld/testsuite/ld-arm/jump19.s @@ -0,0 +1,12 @@ +@ Test the Thumb-2 JUMP19 relocation. + + .syntax unified + .thumb + .global _start +_start: + cmp r0, r0 + beq.w bar + .space 65536 + .weak bar +bar: + bx lr diff --git a/ld/testsuite/ld-arm/mixed-app-v5.d b/ld/testsuite/ld-arm/mixed-app-v5.d index 9e8d4dd194bf5..88317d2d75eac 100644 --- a/ld/testsuite/ld-arm/mixed-app-v5.d +++ b/ld/testsuite/ld-arm/mixed-app-v5.d @@ -7,8 +7,8 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! - .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x20> + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x1c> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! .*: .* @@ -22,9 +22,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000004 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) @@ -32,9 +32,9 @@ Disassembly of section .text: .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: ebfffff. bl .* - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-app.d b/ld/testsuite/ld-arm/mixed-app.d index 381222727e692..a3679ddf616f1 100644 --- a/ld/testsuite/ld-arm/mixed-app.d +++ b/ld/testsuite/ld-arm/mixed-app.d @@ -7,12 +7,13 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! - .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x20> + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x2c> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! .*: .* - .*: (46c04778 undefined|477846c0 ldrmib r4, \[r8, -r0, asr #13\]!) + .*: 4778 bx pc + .*: 46c0 nop \(mov r8, r8\) .*: e28fc6.* add ip, pc, #.* ; 0x.* .*: e28cca.* add ip, ip, #.* ; 0x.* .*: e5bcf.* ldr pc, \[ip, #.*\]! @@ -23,9 +24,9 @@ Disassembly of section .text: .* <_start>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} + .*: e92dd800 push {fp, ip, lr, pc} .*: eb000004 bl .* <app_func> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) @@ -33,9 +34,9 @@ Disassembly of section .text: .* <app_func>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} - .*: ebfffff. bl .* - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebffff.. bl .* + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-app.sym b/ld/testsuite/ld-arm/mixed-app.sym index 49c5edf1c5b1d..c63a34382693a 100644 --- a/ld/testsuite/ld-arm/mixed-app.sym +++ b/ld/testsuite/ld-arm/mixed-app.sym @@ -9,7 +9,6 @@ Symbol table for image: .. ..: 0*[^0]*.* 20 FUNC GLOBAL DEFAULT UND lib_func1 .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 11 __data_start - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start .. ..: .......0 0 FUNC GLOBAL DEFAULT 8 app_func2 diff --git a/ld/testsuite/ld-arm/mixed-lib.d b/ld/testsuite/ld-arm/mixed-lib.d index b261c67fae283..d815e51b9a0df 100644 --- a/ld/testsuite/ld-arm/mixed-lib.d +++ b/ld/testsuite/ld-arm/mixed-lib.d @@ -7,8 +7,8 @@ start address 0x.* Disassembly of section .plt: .* <.plt>: - .*: e52de004 str lr, \[sp, #-4\]! - .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1.> + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1c> .*: e08fe00e add lr, pc, lr .*: e5bef008 ldr pc, \[lr, #8\]! .*: .* @@ -19,9 +19,9 @@ Disassembly of section .text: .* <lib_func1>: .*: e1a0c00d mov ip, sp - .*: e92dd800 stmdb sp!, {fp, ip, lr, pc} - .*: ebfffff. bl .* <lib_func1-0x..> - .*: e89d6800 ldmia sp, {fp, sp, lr} + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: e89d6800 ldm sp, {fp, sp, lr} .*: e12fff1e bx lr .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) diff --git a/ld/testsuite/ld-arm/mixed-lib.sym b/ld/testsuite/ld-arm/mixed-lib.sym index 4ccccdb35aff6..677d2ed6514fc 100644 --- a/ld/testsuite/ld-arm/mixed-lib.sym +++ b/ld/testsuite/ld-arm/mixed-lib.sym @@ -2,17 +2,16 @@ Symbol table for image: Num Buc: Value Size Type Bind Vis Ndx Name .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata - .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1 - .. ..: .......1 2 FUNC GLOBAL DEFAULT 6 lib_func2 - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__ - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__ - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack - .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__ - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end - .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2 - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end + .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__ + .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__ - .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start + .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2 + .. ..: .......1 2 FUNC GLOBAL DEFAULT 6 lib_func2 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end diff --git a/ld/testsuite/ld-arm/preempt-app.s b/ld/testsuite/ld-arm/preempt-app.s new file mode 100644 index 0000000000000..f1eccc2b0bb57 --- /dev/null +++ b/ld/testsuite/ld-arm/preempt-app.s @@ -0,0 +1,27 @@ + @ Preempt an ARM shared library function with a Thumb function + @ in the application. + .text + .p2align 4 + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl lib_func1 + ldmia sp, {r11, sp, lr} + bx lr + + .p2align 4 + .globl app_func2 + .type app_func2,%function +app_func2: + bx lr + + .p2align 4 + .globl lib_func1 + .type lib_func1,%function + .thumb_func +lib_func1: + bx lr + + .data + .long data_obj diff --git a/ld/testsuite/ld-arm/preempt-app.sym b/ld/testsuite/ld-arm/preempt-app.sym new file mode 100644 index 0000000000000..d8ebf3b4d8a9f --- /dev/null +++ b/ld/testsuite/ld-arm/preempt-app.sym @@ -0,0 +1,16 @@ + +Symbol table for image: + Num Buc: Value Size Type Bind Vis Ndx Name + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end + .. ..: ........ 4 OBJECT GLOBAL DEFAULT 10 data_obj + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__ + .. ..: .......1 20 FUNC GLOBAL DEFAULT 6 lib_func1 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start + .. ..: .......0 0 FUNC GLOBAL DEFAULT 6 app_func2 + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__ + .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end diff --git a/ld/testsuite/ld-arm/thumb1-bl.d b/ld/testsuite/ld-arm/thumb1-bl.d new file mode 100644 index 0000000000000..09d70959b68ec --- /dev/null +++ b/ld/testsuite/ld-arm/thumb1-bl.d @@ -0,0 +1,11 @@ + +.*thumb1-bl: file format elf32-.*arm + +Disassembly of section .text: + +00001000 <_start>: + 1000: f3ff fffe bl 401000 <bar> +Disassembly of section .foo: + +00401000 <bar>: + 401000: 4770 bx lr diff --git a/ld/testsuite/ld-arm/thumb1-bl.s b/ld/testsuite/ld-arm/thumb1-bl.s new file mode 100644 index 0000000000000..cdecaa484b6e6 --- /dev/null +++ b/ld/testsuite/ld-arm/thumb1-bl.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-1 BL works. + + .arch armv5t + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x401000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d b/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d new file mode 100644 index 0000000000000..749b58f56672f --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d @@ -0,0 +1,4 @@ +#name: Thumb-2-as-Thumb-1 BL failure test +#source: thumb2-bl-as-thumb1-bad.s +#ld: -Ttext 0x1000 --section-start .foo=0x401004 +#error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar' diff --git a/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s b/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s new file mode 100644 index 0000000000000..dae5d43972e24 --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-1 BL with a Thumb-2-only offset fails. + + .arch armv5t + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x401004. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/ld/testsuite/ld-arm/thumb2-bl-bad.d b/ld/testsuite/ld-arm/thumb2-bl-bad.d new file mode 100644 index 0000000000000..0fc6e043e1fed --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl-bad.d @@ -0,0 +1,4 @@ +#name: Thumb-2 BL failure test +#source: thumb2-bl-bad.s +#ld: -Ttext 0x1000 --section-start .foo=0x1001004 +#error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar' diff --git a/ld/testsuite/ld-arm/thumb2-bl-bad.s b/ld/testsuite/ld-arm/thumb2-bl-bad.s new file mode 100644 index 0000000000000..63e3fe7e72711 --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl-bad.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-2 BL with an oversize offset fails. + + .arch armv7 + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x1001004. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/ld/testsuite/ld-arm/thumb2-bl.d b/ld/testsuite/ld-arm/thumb2-bl.d new file mode 100644 index 0000000000000..bdfb9b79b7e64 --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl.d @@ -0,0 +1,11 @@ + +.*thumb2-bl: file format elf32-.*arm + +Disassembly of section .text: + +00001000 <_start>: + 1000: f3ff d7fe bl 1001000 <bar> +Disassembly of section .foo: + +01001000 <bar>: + 1001000: 4770 bx lr diff --git a/ld/testsuite/ld-arm/thumb2-bl.s b/ld/testsuite/ld-arm/thumb2-bl.s new file mode 100644 index 0000000000000..ddb1cd33fcb65 --- /dev/null +++ b/ld/testsuite/ld-arm/thumb2-bl.s @@ -0,0 +1,23 @@ +@ Test to ensure that a Thumb-2 BL works with an offset that is +@ not permissable for Thumb-1. + + .arch armv7 + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x1001000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/ld/testsuite/ld-arm/tls-app.d b/ld/testsuite/ld-arm/tls-app.d index 67e5de4dca5e5..fd3d6380087be 100644 --- a/ld/testsuite/ld-arm/tls-app.d +++ b/ld/testsuite/ld-arm/tls-app.d @@ -2,17 +2,17 @@ .*: file format elf32-.*arm architecture: arm, flags 0x00000112: EXEC_P, HAS_SYMS, D_PAGED -start address 0x00008220 +start address 0x00008204 Disassembly of section .text: -00008220 <foo>: - 8220: e1a00000 nop \(mov r0,r0\) - 8224: e1a00000 nop \(mov r0,r0\) - 8228: e1a0f00e mov pc, lr - 822c: 000080bc streqh r8, \[r0\], -ip - 8230: 000080b4 streqh r8, \[r0\], -r4 - 8234: 000080ac andeq r8, r0, ip, lsr #1 - 8238: 00000004 andeq r0, r0, r4 - 823c: 000080c4 andeq r8, r0, r4, asr #1 - 8240: 00000014 andeq r0, r0, r4, lsl r0 +00008204 <foo>: + 8204: e1a00000 nop \(mov r0,r0\) + 8208: e1a00000 nop \(mov r0,r0\) + 820c: e1a0f00e mov pc, lr + 8210: 000080bc .word 0x000080bc + 8214: 000080b4 .word 0x000080b4 + 8218: 000080ac .word 0x000080ac + 821c: 00000004 .word 0x00000004 + 8220: 000080c4 .word 0x000080c4 + 8224: 00000014 .word 0x00000014 diff --git a/ld/testsuite/ld-arm/tls-lib.d b/ld/testsuite/ld-arm/tls-lib.d index 76dcfd0c94680..774ac91203f7e 100644 --- a/ld/testsuite/ld-arm/tls-lib.d +++ b/ld/testsuite/ld-arm/tls-lib.d @@ -10,6 +10,6 @@ Disassembly of section .text: .*: e1a00000 nop \(mov r0,r0\) .*: e1a00000 nop \(mov r0,r0\) .*: e1a0f00e mov pc, lr - .*: 00008098 muleq r0, r8, r0 - .*: 0000808c andeq r8, r0, ip, lsl #1 - .*: 00000004 andeq r0, r0, r4 + .*: 00008098 .word 0x00008098 + .*: 0000808c .word 0x0000808c + .*: 00000004 .word 0x00000004 diff --git a/ld/testsuite/ld-arm/use-thumb-lib.s b/ld/testsuite/ld-arm/use-thumb-lib.s new file mode 100644 index 0000000000000..07a7f57b77089 --- /dev/null +++ b/ld/testsuite/ld-arm/use-thumb-lib.s @@ -0,0 +1,25 @@ + .cpu arm10tdmi + .fpu softvfp + .eabi_attribute 18, 4 + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 6 + .file "use_thumb_lib.c" + .text + .align 2 + .global foo + .type foo, %function +foo: + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 1, uses_anonymous_args = 0 + mov ip, sp + stmfd sp!, {fp, ip, lr, pc} + sub fp, ip, #4 + bl lib_func2 + ldmfd sp, {fp, sp, pc} + .size foo, .-foo + .ident "GCC: (GNU) 4.1.0 (CodeSourcery ARM 2006q1-7)" diff --git a/ld/testsuite/ld-arm/use-thumb-lib.sym b/ld/testsuite/ld-arm/use-thumb-lib.sym new file mode 100644 index 0000000000000..6f845a17e929a --- /dev/null +++ b/ld/testsuite/ld-arm/use-thumb-lib.sym @@ -0,0 +1,4 @@ +#... + .. ..: 00000000 2 FUNC GLOBAL DEFAULT UND lib_func2 +#pass + diff --git a/ld/testsuite/ld-arm/vfp11-fix-none.d b/ld/testsuite/ld-arm/vfp11-fix-none.d new file mode 100644 index 0000000000000..64a67ae207dae --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-none.d @@ -0,0 +1,9 @@ + +.*: .*file format elf32-(big|little)arm + +Disassembly of section \.text: + +00008000 <_start>: + 8000: ee474a20 \.word 0xee474a20 + 8004: ed927a00 \.word 0xed927a00 + 8008: e12fff1e bx lr diff --git a/ld/testsuite/ld-arm/vfp11-fix-none.s b/ld/testsuite/ld-arm/vfp11-fix-none.s new file mode 100644 index 0000000000000..a016c49411bf6 --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-none.s @@ -0,0 +1,7 @@ + .arm + .text + .globl _start +_start: + .word 0xee474a20 + .word 0xed927a00 + bx lr diff --git a/ld/testsuite/ld-arm/vfp11-fix-scalar.d b/ld/testsuite/ld-arm/vfp11-fix-scalar.d new file mode 100644 index 0000000000000..b7fe136fe076c --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-scalar.d @@ -0,0 +1,15 @@ + +.*: .*file format elf32-(big|little)arm + +Disassembly of section \.text: + +00008000 <_start>: + 8000: 0a000001 beq 800c <__vfp11_veneer_0> + +00008004 <__vfp11_veneer_0_r>: + 8004: ed927a00 flds s14, \[r2\] + 8008: e12fff1e bx lr + +0000800c <__vfp11_veneer_0>: + 800c: 0e474a20 fmacseq s9, s14, s1 + 8010: eafffffb b 8004 <__vfp11_veneer_0_r> diff --git a/ld/testsuite/ld-arm/vfp11-fix-scalar.s b/ld/testsuite/ld-arm/vfp11-fix-scalar.s new file mode 100644 index 0000000000000..4ffb891df8963 --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-scalar.s @@ -0,0 +1,7 @@ + .arm + .text + .globl _start +_start: + fmacseq s9, s14, s1 + flds s14, [r2] + bx lr diff --git a/ld/testsuite/ld-arm/vfp11-fix-vector.d b/ld/testsuite/ld-arm/vfp11-fix-vector.d new file mode 100644 index 0000000000000..3474b8ce30aa7 --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-vector.d @@ -0,0 +1,16 @@ + +.*: .*file format elf32-(big|little)arm + +Disassembly of section \.text: + +00008000 <_start>: + 8000: 0a000002 beq 8010 <__vfp11_veneer_0> + +00008004 <__vfp11_veneer_0_r>: + 8004: e1a02003 mov r2, r3 + 8008: ed927a00 flds s14, \[r2\] + 800c: e12fff1e bx lr + +00008010 <__vfp11_veneer_0>: + 8010: 0e474a20 fmacseq s9, s14, s1 + 8014: eafffffa b 8004 <__vfp11_veneer_0_r> diff --git a/ld/testsuite/ld-arm/vfp11-fix-vector.s b/ld/testsuite/ld-arm/vfp11-fix-vector.s new file mode 100644 index 0000000000000..05b6100bf1957 --- /dev/null +++ b/ld/testsuite/ld-arm/vfp11-fix-vector.s @@ -0,0 +1,8 @@ + .arm + .text + .globl _start +_start: + fmacseq s9, s14, s1 + mov r2,r3 + flds s14, [r2] + bx lr diff --git a/ld/testsuite/ld-arm/vxworks1-lib.dd b/ld/testsuite/ld-arm/vxworks1-lib.dd index e13254d908eea..77bdf728c0e65 100644 --- a/ld/testsuite/ld-arm/vxworks1-lib.dd +++ b/ld/testsuite/ld-arm/vxworks1-lib.dd @@ -4,35 +4,35 @@ Disassembly of section \.plt: 00080800 <_PROCEDURE_LINKAGE_TABLE_>: - 80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8> + 80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <.*> 80804: e79cf009 ldr pc, \[ip, r9\] - 80808: 0000000c andeq r0, r0, ip - 8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14> + 80808: 0000000c .word 0x0000000c + 8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <.*> 80810: e599f008 ldr pc, \[r9, #8\] - 80814: 00000000 andeq r0, r0, r0 - 80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20> + 80814: 00000000 .word 0x00000000 + 80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <.*> 8081c: e79cf009 ldr pc, \[ip, r9\] - 80820: 00000010 andeq r0, r0, r0, lsl r0 - 80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c> + 80820: 00000010 .word 0x00000010 + 80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <.*> 80828: e599f008 ldr pc, \[r9, #8\] - 8082c: 0000000c andeq r0, r0, ip + 8082c: 0000000c .word 0x0000000c Disassembly of section \.text: 00080c00 <foo>: - 80c00: e92dc200 stmdb sp!, {r9, lr, pc} - 80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <\.text\+0x30> + 80c00: e92dc200 push {r9, lr, pc} + 80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <.*> 80c08: e5999000 ldr r9, \[r9\] 80c0c: e5999000 ldr r9, \[r9\] - 80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <\.text\+0x34> + 80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <.*> 80c14: e7991000 ldr r1, \[r9, r0\] 80c18: e2811001 add r1, r1, #1 ; 0x1 80c1c: e7891000 str r1, \[r9, r0\] 80c20: eb000004 bl 80c38 <slocal> - 80c24: ebfffefb bl 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18> - 80c28: ebfffef4 bl 80800 <_PROCEDURE_LINKAGE_TABLE_> - 80c2c: e8bd8200 ldmia sp!, {r9, pc} - 80c30: 00000000 andeq r0, r0, r0 - 80c34: 00000014 andeq r0, r0, r4, lsl r0 + 80c24: ebfffefb bl 80818 <.*> + 80c28: ebfffef4 bl 80800 <.*> + 80c2c: e8bd8200 pop {r9, pc} + 80c30: 00000000 .word 0x00000000 + 80c34: 00000014 .word 0x00000014 00080c38 <slocal>: 80c38: e1a0f00e mov pc, lr diff --git a/ld/testsuite/ld-arm/vxworks1-lib.rd b/ld/testsuite/ld-arm/vxworks1-lib.rd index c4c46f69098fd..226bd0955439a 100644 --- a/ld/testsuite/ld-arm/vxworks1-lib.rd +++ b/ld/testsuite/ld-arm/vxworks1-lib.rd @@ -6,7 +6,7 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: Relocation section '\.rela\.dyn' at offset .* contains 4 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -00081c00 00000017 R_ARM_RELATIVE * 00080c38 +00081800 00000017 R_ARM_RELATIVE * 00080c38 00080c0c .*06 R_ARM_ABS12 00000000 __GOTT_INDEX__ \+ 0 00080c30 .*02 R_ARM_ABS32 00000000 __GOTT_BASE__ \+ 0 -00081414 .*15 R_ARM_GLOB_DAT 00081800 x \+ 0 +00081414 .*15 R_ARM_GLOB_DAT 00081c00 x \+ 0 diff --git a/ld/testsuite/ld-arm/vxworks1-lib.td b/ld/testsuite/ld-arm/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-arm/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-arm/vxworks1.dd b/ld/testsuite/ld-arm/vxworks1.dd index 529e3a564079d..044312295ab37 100644 --- a/ld/testsuite/ld-arm/vxworks1.dd +++ b/ld/testsuite/ld-arm/vxworks1.dd @@ -5,32 +5,32 @@ Disassembly of section \.plt: 00080800 <_PROCEDURE_LINKAGE_TABLE_>: 80800: e52dc008 str ip, \[sp, #-8\]! - 80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc> + 80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <.*> 80808: e59cf008 ldr pc, \[ip, #8\] - 8080c: 00081400 andeq r1, r8, r0, lsl #8 + 8080c: 00081400 .word 0x00081400 8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_ - 80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18> + 80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <.*> 80814: e59cf000 ldr pc, \[ip\] - 80818: 0008140c andeq r1, r8, ip, lsl #8 + 80818: 0008140c .word 0x0008140c 80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc - 8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <_PROCEDURE_LINKAGE_TABLE_\+0x24> - 80820: eafffff6 b 80800 <_PROCEDURE_LINKAGE_TABLE_> - 80824: 00000000 andeq r0, r0, r0 - 80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <_PROCEDURE_LINKAGE_TABLE_\+0x30> + 8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <.*> + 80820: eafffff6 b 80800 <.*> + 80824: 00000000 .word 0x00000000 + 80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <.*> 8082c: e59cf000 ldr pc, \[ip\] - 80830: 00081410 andeq r1, r8, r0, lsl r4 + 80830: 00081410 .word 0x00081410 80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10 - 80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <_PROCEDURE_LINKAGE_TABLE_\+0x3c> - 80838: eafffff0 b 80800 <_PROCEDURE_LINKAGE_TABLE_> - 8083c: 0000000c andeq r0, r0, ip + 80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <.*> + 80838: eafffff0 b 80800 <.*> + 8083c: 0000000c .word 0x0000000c Disassembly of section \.text: 00080c00 <_start>: - 80c00: ebffff08 bl 80428 <_PROCEDURE_LINKAGE_TABLE_-0x3d8> + 80c00: ebffff08 bl 80828 <.*> 80c00: R_ARM_PC24 \.plt\+0x20 - 80c04: eb000000 bl 80c14 <sexternal\+0x8> + 80c04: eb000000 bl 80c0c <sexternal> 80c04: R_ARM_PC24 sexternal\+0xfffffff8 - 80c08: eaffff00 b 80408 <_PROCEDURE_LINKAGE_TABLE_-0x3f8> + 80c08: eaffff00 b 80810 <.*> 80c08: R_ARM_PC24 \.plt\+0x8 00080c0c <sexternal>: diff --git a/ld/testsuite/ld-arm/vxworks1.ld b/ld/testsuite/ld-arm/vxworks1.ld index ec5039d47ed30..65bf65d4e2ed4 100644 --- a/ld/testsuite/ld-arm/vxworks1.ld +++ b/ld/testsuite/ld-arm/vxworks1.ld @@ -23,8 +23,8 @@ SECTIONS .got : { *(.got.plt) *(.got) } . = ALIGN (0x400); - .bss : { *(.bss) *(.dynbss) } + .data : { *(.data) } . = ALIGN (0x400); - .data : { *(.data) } + .bss : { *(.bss) *(.dynbss) } } diff --git a/ld/testsuite/ld-bootstrap/bootstrap.exp b/ld/testsuite/ld-bootstrap/bootstrap.exp index 58cb9696513ec..d5ed9051150c5 100644 --- a/ld/testsuite/ld-bootstrap/bootstrap.exp +++ b/ld/testsuite/ld-bootstrap/bootstrap.exp @@ -1,5 +1,5 @@ # Expect script for LD Bootstrap Tests -# Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2004 +# Copyright 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2004, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -140,7 +140,7 @@ foreach flags {"" "strip" "--static" "--traditional-format" || [istarget "*-*-wince"] || [istarget "*-*-cygwin*"] || [istarget "*-*-winnt*"] - || [istarget "*-*-mingw32*"] + || [istarget "*-*-mingw*"] || [istarget "*-*-interix*"] || [istarget "*-*-beospe*"] || [istarget "*-*-netbsdpe*"]} { diff --git a/ld/testsuite/ld-cris/hiddef1.d b/ld/testsuite/ld-cris/hiddef1.d index de004303ef0d6..b3bd87dfab2ef 100644 --- a/ld/testsuite/ld-cris/hiddef1.d +++ b/ld/testsuite/ld-cris/hiddef1.d @@ -24,5 +24,5 @@ Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 1 entries: #... Symbol table '\.dynsym' contains 6 entries: #... -Symbol table '\.symtab' contains 19 entries: +Symbol table '\.symtab' contains 16 entries: #pass diff --git a/ld/testsuite/ld-cris/ldsym1.d b/ld/testsuite/ld-cris/ldsym1.d index 1a2a61a994bd6..e8dcd325e0e02 100644 --- a/ld/testsuite/ld-cris/ldsym1.d +++ b/ld/testsuite/ld-cris/ldsym1.d @@ -13,7 +13,7 @@ Disassembly of section \.text: -0+ <__start>: +0+ <(___init__start|__start|__Stext)>: 0: 0f05 nop 0+2 <expfn>: diff --git a/ld/testsuite/ld-cris/libdso-12.d b/ld/testsuite/ld-cris/libdso-12.d index 2cb80389c019b..c8a4f62d6086f 100644 --- a/ld/testsuite/ld-cris/libdso-12.d +++ b/ld/testsuite/ld-cris/libdso-12.d @@ -12,40 +12,40 @@ DYNAMIC SYMBOL TABLE: #... -0+252 g DF \.text 0+12 dsofn4 -0+248 g DF \.text 0+2 expfn -0+2310 g DO \.data 0+4 expobj +0+23e g DF \.text 0+12 dsofn4 +0+234 g DF \.text 0+2 expfn +0+22fc g DO \.data 0+4 expobj #... -0+24a g DF \.text 0+8 dsofn3 +0+236 g DF \.text 0+8 dsofn3 #... 0+ D \*UND\* 0+ dsofn #... Contents of section \.rela\.got: - 01d4 0c230000 0a050000 00000000 .* + 01c0 f8220000 0a040000 00000000 .* Contents of section \.rela\.plt: - 01e0 04230000 0b030000 00000000 08230000 .* - 01f0 0b0b0000 00000000 .* + 01cc f0220000 0b020000 00000000 f4220000 .* + 01dc 0b0a0000 00000000 .* Contents of section \.plt: - 01f8 84e20401 7e7a3f7a 04f26ffa bf09b005 .* - 0208 00000000 00000000 00006f0d 0c000000 .* - 0218 6ffabf09 b0053f7e 00000000 bf0ed4ff .* - 0228 ffffb005 6f0d1000 00006ffa bf09b005 .* - 0238 3f7e0c00 0000bf0e baffffff b005 .* + 01e4 84e20401 7e7a3f7a 04f26ffa bf09b005 .* + 01f4 00000000 00000000 00006f0d 0c000000 .* + 0204 6ffabf09 b0053f7e 00000000 bf0ed4ff .* + 0214 ffffb005 6f0d1000 00006ffa bf09b005 .* + 0224 3f7e0c00 0000bf0e baffffff b005 .* Contents of section \.text: - 0246 b005b005 bfbee2ff ffffb005 7f0da620 .* - 0256 00005f0d 1400bfbe b6ffffff b0050000 .* + 0232 b005b005 bfbee2ff ffffb005 7f0da620 .* + 0242 00005f0d 1400bfbe b6ffffff b0050000 .* Contents of section \.dynamic: - 2268 04000000 94000000 05000000 98010000 .* - 2278 06000000 d8000000 0a000000 3a000000 .* - 2288 0b000000 10000000 03000000 f8220000 .* - 2298 02000000 18000000 14000000 07000000 .* - 22a8 17000000 e0010000 07000000 d4010000 .* - 22b8 08000000 0c000000 09000000 0c000000 .* - 22c8 00000000 00000000 00000000 00000000 .* - 22d8 00000000 00000000 00000000 00000000 .* - 22e8 00000000 00000000 00000000 00000000 .* + 2254 04000000 94000000 05000000 84010000 .* + 2264 06000000 d4000000 0a000000 3a000000 .* + 2274 0b000000 10000000 03000000 e4220000 .* + 2284 02000000 18000000 14000000 07000000 .* + 2294 17000000 cc010000 07000000 c0010000 .* + 22a4 08000000 0c000000 09000000 0c000000 .* + 22b4 00000000 00000000 00000000 00000000 .* + 22c4 00000000 00000000 00000000 00000000 .* + 22d4 00000000 00000000 00000000 00000000 .* Contents of section \.got: - 22f8 68220000 00000000 00000000 1e020000 .* - 2308 38020000 00000000 .* + 22e4 54220000 00000000 00000000 0a020000 .* + 22f4 24020000 00000000 .* Contents of section \.data: - 2310 00000000 .* + 22fc 00000000 .* diff --git a/ld/testsuite/ld-cris/libdso-2.d b/ld/testsuite/ld-cris/libdso-2.d index f67c7b071a599..1417745903ea9 100644 --- a/ld/testsuite/ld-cris/libdso-2.d +++ b/ld/testsuite/ld-cris/libdso-2.d @@ -27,16 +27,16 @@ There are 13 section headers.* #... Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 1 entries: #... -00002200 0000000c R_CRIS_RELATIVE 00000158 +00002[12][0-9a-f][048c] 0000000c R_CRIS_RELATIVE 00000150 #... Symbol table '\.dynsym' contains 4 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 7 2: 0+ 0 OBJECT GLOBAL DEFAULT ABS TST1 - 3: 0+15c 0 FUNC GLOBAL DEFAULT 7 export_1@@TST1 + 3: 0+154 0 FUNC GLOBAL DEFAULT 7 export_1@@TST1 -Symbol table '\.symtab' contains 21 entries: +Symbol table '\.symtab' contains 18 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 1 @@ -48,14 +48,11 @@ Symbol table '\.symtab' contains 21 entries: 7: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 7 8: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 8 9: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 9 - 10: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 10 - 11: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 11 - 12: [0-9a-f]+ 0 SECTION LOCAL DEFAULT 12 - 13: 0+216c 0 OBJECT LOCAL HIDDEN ABS _DYNAMIC - 14: 0+2204 0 NOTYPE LOCAL DEFAULT ABS __bss_start - 15: 0+2204 0 NOTYPE LOCAL DEFAULT ABS _edata - 16: 0+21f4 0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ - 17: 0+2220 0 NOTYPE LOCAL DEFAULT ABS _end - 18: 0+158 0 FUNC LOCAL DEFAULT 7 dsofn - 19: 0+ 0 OBJECT GLOBAL DEFAULT ABS TST1 - 20: 0+15c 0 FUNC GLOBAL DEFAULT 7 export_1 + 10: 0+2..[046c] 0 OBJECT LOCAL HIDDEN ABS _DYNAMIC + 11: 0+2..[046c] 0 NOTYPE LOCAL DEFAULT ABS __bss_start + 12: 0+2..[046c] 0 NOTYPE LOCAL DEFAULT ABS _edata + 13: 0+2..[046c] 0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ + 14: 0+2..[046c] 0 NOTYPE LOCAL DEFAULT ABS _end + 15: 0+150 0 FUNC LOCAL DEFAULT 7 dsofn + 16: 0+ 0 OBJECT GLOBAL DEFAULT ABS TST1 + 17: 0+154 0 FUNC GLOBAL DEFAULT 7 export_1 diff --git a/ld/testsuite/ld-cris/v32-ba-1.d b/ld/testsuite/ld-cris/v32-ba-1.d index 24d07512f7fa4..b4ce78d007646 100644 --- a/ld/testsuite/ld-cris/v32-ba-1.d +++ b/ld/testsuite/ld-cris/v32-ba-1.d @@ -10,7 +10,7 @@ Disassembly of section \.text: -0+ <a>: +0+ <(a|__Stext)>: 0: bf0e 0800 0000 ba 8 <b> 6: 5e82 moveq 30,r8 diff --git a/ld/testsuite/ld-discard/zero-rel.d b/ld/testsuite/ld-discard/zero-rel.d new file mode 100644 index 0000000000000..1f73775b5e31d --- /dev/null +++ b/ld/testsuite/ld-discard/zero-rel.d @@ -0,0 +1,8 @@ +#source: zero-rel.s +#ld: -T discard.ld +#objdump: -s -j .debug_info + +.*: file format .*elf.* + +Contents of section .debug_info: + 0000 0+( 0+)? +(\.+) .* diff --git a/ld/testsuite/ld-discard/zero-rel.s b/ld/testsuite/ld-discard/zero-rel.s new file mode 100644 index 0000000000000..f3f0b3cf39ff5 --- /dev/null +++ b/ld/testsuite/ld-discard/zero-rel.s @@ -0,0 +1,11 @@ + .text + .globl _start +_start: + + .section .debug_info + .long .Ltext + .long .Ltext + 2 + + .section .text.exit,"ax" +.Ltext: + .long 0 diff --git a/ld/testsuite/ld-elf/begin.c b/ld/testsuite/ld-elf/begin.c new file mode 100644 index 0000000000000..ccc47d4f87089 --- /dev/null +++ b/ld/testsuite/ld-elf/begin.c @@ -0,0 +1,5 @@ +extern void foo (void); + +static void (*const init_array []) (void) + __attribute__ ((used, section (".init_array"), aligned (sizeof (void *)))) + = { foo }; diff --git a/ld/testsuite/ld-elf/beginwarn.c b/ld/testsuite/ld-elf/beginwarn.c new file mode 100644 index 0000000000000..ebe28191b56f3 --- /dev/null +++ b/ld/testsuite/ld-elf/beginwarn.c @@ -0,0 +1,9 @@ +static const char _evoke_link_warning_foo [] + __attribute__ ((used, section (".gnu.warning.foo"))) + = "function foo is deprecated"; + +extern void foo (void); + +static void (*const init_array []) (void) + __attribute__ ((used, section (".init_array"), aligned (sizeof (void *)))) + = { foo }; diff --git a/ld/testsuite/ld-elf/binutils.exp b/ld/testsuite/ld-elf/binutils.exp new file mode 100644 index 0000000000000..7ced42ca125bb --- /dev/null +++ b/ld/testsuite/ld-elf/binutils.exp @@ -0,0 +1,124 @@ +# Expect script for binutils tests +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# +# Written by H.J. Lu (hongjiu.lu@intel.com) +# + +# Make sure that binutils can correctly handle ld output in ELF. + +# Run on Linux only. +if { ![istarget *-*-linux*] } { + return +} + +if { [istarget *-*-linux*aout*] + || [istarget *-*-linux*oldld*] } { + return +} + +proc binutils_test { prog_name ld_options test } { + global as + global ld + global READELF + global objcopy + global strip + global srcdir + global subdir + global link_output + + eval set prog \$$prog_name + set test_name "$prog_name $ld_options ($test)" + + if { ![ld_assemble $as $srcdir/$subdir/$test.s tmpdir/$test.o ] } { + unresolved "$test_name" + return + } + + if { ![ld_simple_link $ld tmpdir/$test "$ld_options tmpdir/$test.o"] } { + if { [string match "*not supported*" $link_output] + || [string match "*unrecognized option*" $link_output] } { + unsupported "$ld_options is not supported by this target" + } else { + unresolved "$test_name" + } + return + } + + send_log "$READELF -l --wide tmpdir/$test > tmpdir/$test.exp\n" + catch "exec $READELF -l --wide tmpdir/$test > tmpdir/$test.exp" got + if ![string match "" $got] then { + send_log "$got\n" + unresolved "$test_name" + return + } + + send_log "$prog tmpdir/$test\n" + catch "exec $prog tmpdir/$test" got + if ![string match "" $got] then { + send_log "$got\n" + fail "$test_name" + return + } + + send_log "$READELF -l --wide tmpdir/$test > tmpdir/$test.out\n" + catch "exec $READELF -l --wide tmpdir/$test > tmpdir/$test.out" got + if ![string match "" $got] then { + send_log "$got\n" + unresolved "$test_name" + return + } + + if { [catch {exec cmp tmpdir/$test.exp tmpdir/$test.out}] } then { + send_log "tmpdir/$test.exp tmpdir/$test.out differ.\n" + fail "$test_name" + return + } + + pass "$test_name" +} + +binutils_test strip "-z max-page-size=0x200000" maxpage1 +binutils_test strip "-z max-page-size=0x200000 -z common-page-size=0x100000" maxpage1 +binutils_test strip "-z max-page-size=0x100000" maxpage1 +binutils_test strip "-z max-page-size=0x100000 -z common-page-size=0x1000" maxpage1 + +binutils_test strip "" maxpage1 +binutils_test strip "-shared" maxpage1 +binutils_test objcopy "" maxpage1 +binutils_test objcopy "-shared" maxpage1 + +binutils_test strip "-z relro" maxpage1 +binutils_test strip "-z relro -shared" maxpage1 +binutils_test objcopy "-z relro" maxpage1 +binutils_test objcopy "-z relro -shared" maxpage1 + +binutils_test objcopy "" tbss1 +binutils_test objcopy "-shared" tbss1 +binutils_test objcopy "-z max-page-size=0x100000" tbss1 +binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss1 +binutils_test objcopy "" tdata1 +binutils_test objcopy "-shared" tdata1 +binutils_test objcopy "-z max-page-size=0x100000" tdata1 +binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata1 +binutils_test objcopy "" tbss2 +binutils_test objcopy "-shared" tbss2 +binutils_test objcopy "-z max-page-size=0x100000" tbss2 +binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tbss2 +binutils_test objcopy "-z max-page-size=0x100000" tdata2 +binutils_test objcopy "" tdata2 +binutils_test objcopy "-shared" tdata2 +binutils_test objcopy "-z max-page-size=0x100000 -z common-page-size=0x1000" tdata2 diff --git a/ld/testsuite/ld-elf/commonpage1.d b/ld/testsuite/ld-elf/commonpage1.d new file mode 100644 index 0000000000000..76dc0565b3420 --- /dev/null +++ b/ld/testsuite/ld-elf/commonpage1.d @@ -0,0 +1,9 @@ +#source: maxpage1.s +#ld: -z max-page-size=0x200000 -z common-page-size=0x100000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD+.*0x200000 + LOAD+.*0x200000 +#pass diff --git a/ld/testsuite/ld-elf/data1.c b/ld/testsuite/ld-elf/data1.c new file mode 100644 index 0000000000000..c205f822bccd3 --- /dev/null +++ b/ld/testsuite/ld-elf/data1.c @@ -0,0 +1,6 @@ +#include "data1.h" + +char a1[1] __attribute__ ((aligned (ALIGNMENT1))) = { 10 }; +char a2[2] __attribute__ ((aligned (ALIGNMENT2))); +char a3[3] __attribute__ ((aligned (ALIGNMENT3))); +char a4[4] __attribute__ ((aligned (ALIGNMENT4))); diff --git a/ld/testsuite/ld-elf/data1.h b/ld/testsuite/ld-elf/data1.h new file mode 100644 index 0000000000000..529ee4b242056 --- /dev/null +++ b/ld/testsuite/ld-elf/data1.h @@ -0,0 +1,9 @@ +#define ALIGNMENT1 0x800 +#define ALIGNMENT2 0x400 +#define ALIGNMENT3 0x200 +#define ALIGNMENT4 0x100 + +extern char a1[1]; +extern char a2[2]; +extern char a3[3]; +extern char a4[4]; diff --git a/ld/testsuite/ld-elf/del.cc b/ld/testsuite/ld-elf/del.cc new file mode 100644 index 0000000000000..4e2cc60d74a97 --- /dev/null +++ b/ld/testsuite/ld-elf/del.cc @@ -0,0 +1,29 @@ +#include <new> + +extern "C" void free (void *); + +void +operator delete (void *ptr, const std::nothrow_t&) throw () +{ + if (ptr) + free (ptr); +} + +void +operator delete (void *ptr) throw () +{ + if (ptr) + free (ptr); +} + +void +operator delete[] (void *ptr) throw () +{ + ::operator delete (ptr); +} + +void +operator delete[] (void *ptr, const std::nothrow_t&) throw () +{ + ::operator delete (ptr); +} diff --git a/ld/testsuite/ld-elf/dl1.c b/ld/testsuite/ld-elf/dl1.c new file mode 100644 index 0000000000000..09426f32fb7b3 --- /dev/null +++ b/ld/testsuite/ld-elf/dl1.c @@ -0,0 +1,10 @@ +#include <stdio.h> + +extern int bar; + +void +foo (void) +{ + if (bar == -20) + printf ("OK\n"); +} diff --git a/ld/testsuite/ld-elf/dl1.list b/ld/testsuite/ld-elf/dl1.list new file mode 100644 index 0000000000000..9ffada041895c --- /dev/null +++ b/ld/testsuite/ld-elf/dl1.list @@ -0,0 +1,6 @@ +{ + extern "C" + { + bar; + }; +}; diff --git a/ld/testsuite/ld-elf/dl1.out b/ld/testsuite/ld-elf/dl1.out new file mode 100644 index 0000000000000..d86bac9de59ab --- /dev/null +++ b/ld/testsuite/ld-elf/dl1.out @@ -0,0 +1 @@ +OK diff --git a/ld/testsuite/ld-elf/dl1main.c b/ld/testsuite/ld-elf/dl1main.c new file mode 100644 index 0000000000000..f224e12394dd6 --- /dev/null +++ b/ld/testsuite/ld-elf/dl1main.c @@ -0,0 +1,33 @@ +#include <stdio.h> +#include <dlfcn.h> + +int bar = -20; + +int +main (void) +{ + int ret = 0; + void *handle; + void (*fcn) (void); + + handle = dlopen("./tmpdir/libdl1.so", RTLD_GLOBAL|RTLD_LAZY); + if (!handle) + { + printf("dlopen ./tmpdir/libdl1.so: %s\n", dlerror ()); + return 1; + } + + fcn = (void (*)(void)) dlsym(handle, "foo"); + if (!fcn) + { + printf("dlsym foo: %s\n", dlerror ()); + ret += 1; + } + else + { + (*fcn) (); + } + + dlclose (handle); + return ret; +} diff --git a/ld/testsuite/ld-elf/dl2.c b/ld/testsuite/ld-elf/dl2.c new file mode 100644 index 0000000000000..b5cd9275dab49 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2.c @@ -0,0 +1,16 @@ +#include <stdio.h> + +int foo; + +extern void xxx (void); + +void +bar (int x) +{ + if (foo == 1) + printf ("OK1\n"); + else if (foo == 0) + printf ("OK2\n"); + foo = -1; + xxx (); +} diff --git a/ld/testsuite/ld-elf/dl2.list b/ld/testsuite/ld-elf/dl2.list new file mode 100644 index 0000000000000..e985dcfca24c8 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2.list @@ -0,0 +1,3 @@ +{ + foo; +}; diff --git a/ld/testsuite/ld-elf/dl2a.list b/ld/testsuite/ld-elf/dl2a.list new file mode 100644 index 0000000000000..989646e63f1a1 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2a.list @@ -0,0 +1,3 @@ +{ + "foo"; +}; diff --git a/ld/testsuite/ld-elf/dl2a.out b/ld/testsuite/ld-elf/dl2a.out new file mode 100644 index 0000000000000..f3d5b9ffcc0e8 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2a.out @@ -0,0 +1,3 @@ +OK1 +DSO +OK1 diff --git a/ld/testsuite/ld-elf/dl2b.out b/ld/testsuite/ld-elf/dl2b.out new file mode 100644 index 0000000000000..f30cead5244bf --- /dev/null +++ b/ld/testsuite/ld-elf/dl2b.out @@ -0,0 +1,3 @@ +OK1 +MAIN +OK1 diff --git a/ld/testsuite/ld-elf/dl2main.c b/ld/testsuite/ld-elf/dl2main.c new file mode 100644 index 0000000000000..ddf677fd3bcfd --- /dev/null +++ b/ld/testsuite/ld-elf/dl2main.c @@ -0,0 +1,22 @@ +#include <stdio.h> + +extern int foo; +extern void bar (void); + +void +xxx (void) +{ + printf ("MAIN\n"); +} + +int +main (void) +{ + foo = 1; + bar (); + if (foo == -1) + printf ("OK1\n"); + else if (foo == 1) + printf ("OK2\n"); + return 0; +} diff --git a/ld/testsuite/ld-elf/dl2xxx.c b/ld/testsuite/ld-elf/dl2xxx.c new file mode 100644 index 0000000000000..cf3a1d0c66c89 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2xxx.c @@ -0,0 +1,7 @@ +#include <stdio.h> + +void +xxx (void) +{ + printf ("DSO\n"); +} diff --git a/ld/testsuite/ld-elf/dl2xxx.list b/ld/testsuite/ld-elf/dl2xxx.list new file mode 100644 index 0000000000000..9388cda7f52e5 --- /dev/null +++ b/ld/testsuite/ld-elf/dl2xxx.list @@ -0,0 +1,3 @@ +{ + xxx; +}; diff --git a/ld/testsuite/ld-elf/dl3.cc b/ld/testsuite/ld-elf/dl3.cc new file mode 100644 index 0000000000000..558e49f74c2c5 --- /dev/null +++ b/ld/testsuite/ld-elf/dl3.cc @@ -0,0 +1,7 @@ +#include "dl3header.h" + +void +f (void) +{ + throw (A (42)); +} diff --git a/ld/testsuite/ld-elf/dl3.list b/ld/testsuite/ld-elf/dl3.list new file mode 100644 index 0000000000000..0b347ea2dabdf --- /dev/null +++ b/ld/testsuite/ld-elf/dl3.list @@ -0,0 +1,6 @@ +{ + extern "C++" + { + typeinfo*; + }; +}; diff --git a/ld/testsuite/ld-elf/dl3a.out b/ld/testsuite/ld-elf/dl3a.out new file mode 100644 index 0000000000000..d86bac9de59ab --- /dev/null +++ b/ld/testsuite/ld-elf/dl3a.out @@ -0,0 +1 @@ +OK diff --git a/ld/testsuite/ld-elf/dl3b.out b/ld/testsuite/ld-elf/dl3b.out new file mode 100644 index 0000000000000..8a15044107703 --- /dev/null +++ b/ld/testsuite/ld-elf/dl3b.out @@ -0,0 +1 @@ +BAD2 diff --git a/ld/testsuite/ld-elf/dl3header.h b/ld/testsuite/ld-elf/dl3header.h new file mode 100644 index 0000000000000..66f7d4621f242 --- /dev/null +++ b/ld/testsuite/ld-elf/dl3header.h @@ -0,0 +1,5 @@ +struct A +{ + int i; + A (int i): i(i) {} +}; diff --git a/ld/testsuite/ld-elf/dl3main.cc b/ld/testsuite/ld-elf/dl3main.cc new file mode 100644 index 0000000000000..977f9bb02774b --- /dev/null +++ b/ld/testsuite/ld-elf/dl3main.cc @@ -0,0 +1,25 @@ +#include <stdio.h> +#include "dl3header.h" + +extern void f (void); + +int +main (void) +{ + try + { + f(); + } + catch (A a) + { + if (a.i == 42) + printf ("OK\n"); + else + printf ("BAD1\n"); + } + catch (...) + { + printf ("BAD2\n"); + } + return 0; +} diff --git a/ld/testsuite/ld-elf/dl4.c b/ld/testsuite/ld-elf/dl4.c new file mode 100644 index 0000000000000..bf6f070cb7595 --- /dev/null +++ b/ld/testsuite/ld-elf/dl4.c @@ -0,0 +1,24 @@ +#include <stdio.h> + +int foo1; +int foo2; + +extern void xxx1 (void); +extern void xxx2 (void); + +void +bar (int x) +{ + if (foo1 == 1) + printf ("bar OK1\n"); + else if (foo1 == 0) + printf ("bar OK2\n"); + if (foo2 == 1) + printf ("bar OK3\n"); + else if (foo2 == 0) + printf ("bar OK4\n"); + foo1 = -1; + foo2 = -1; + xxx1 (); + xxx2 (); +} diff --git a/ld/testsuite/ld-elf/dl4.list b/ld/testsuite/ld-elf/dl4.list new file mode 100644 index 0000000000000..e932e2352e324 --- /dev/null +++ b/ld/testsuite/ld-elf/dl4.list @@ -0,0 +1,4 @@ +{ + foo1; + foo2; +}; diff --git a/ld/testsuite/ld-elf/dl4a.out b/ld/testsuite/ld-elf/dl4a.out new file mode 100644 index 0000000000000..871c5be830ac9 --- /dev/null +++ b/ld/testsuite/ld-elf/dl4a.out @@ -0,0 +1,6 @@ +bar OK1 +bar OK3 +DSO1 +DSO2 +OK1 +OK3 diff --git a/ld/testsuite/ld-elf/dl4b.out b/ld/testsuite/ld-elf/dl4b.out new file mode 100644 index 0000000000000..b838f5b4b7f23 --- /dev/null +++ b/ld/testsuite/ld-elf/dl4b.out @@ -0,0 +1,6 @@ +bar OK1 +bar OK3 +MAIN1 +MAIN2 +OK1 +OK3 diff --git a/ld/testsuite/ld-elf/dl4main.c b/ld/testsuite/ld-elf/dl4main.c new file mode 100644 index 0000000000000..173450da1a89b --- /dev/null +++ b/ld/testsuite/ld-elf/dl4main.c @@ -0,0 +1,34 @@ +#include <stdio.h> + +extern int foo1; +extern int foo2; +extern void bar (void); + +void +xxx1 (void) +{ + printf ("MAIN1\n"); +} + +void +xxx2 (void) +{ + printf ("MAIN2\n"); +} + +int +main (void) +{ + foo1 = 1; + foo2 = 1; + bar (); + if (foo1 == -1) + printf ("OK1\n"); + else if (foo1 == 1) + printf ("OK2\n"); + if (foo2 == -1) + printf ("OK3\n"); + else if (foo2 == 1) + printf ("OK4\n"); + return 0; +} diff --git a/ld/testsuite/ld-elf/dl4xxx.c b/ld/testsuite/ld-elf/dl4xxx.c new file mode 100644 index 0000000000000..8180eb141292f --- /dev/null +++ b/ld/testsuite/ld-elf/dl4xxx.c @@ -0,0 +1,13 @@ +#include <stdio.h> + +void +xxx1 (void) +{ + printf ("DSO1\n"); +} + +void +xxx2 (void) +{ + printf ("DSO2\n"); +} diff --git a/ld/testsuite/ld-elf/dl4xxx.list b/ld/testsuite/ld-elf/dl4xxx.list new file mode 100644 index 0000000000000..f39ce14d01af9 --- /dev/null +++ b/ld/testsuite/ld-elf/dl4xxx.list @@ -0,0 +1,4 @@ +{ + xxx1; + xxx2; +}; diff --git a/ld/testsuite/ld-elf/dl5.cc b/ld/testsuite/ld-elf/dl5.cc new file mode 100644 index 0000000000000..cc404553f93bf --- /dev/null +++ b/ld/testsuite/ld-elf/dl5.cc @@ -0,0 +1,61 @@ +#include <stdio.h> +#include <stdlib.h> +#include <new> + +int pass = 0; + +void * +operator new (size_t sz, const std::nothrow_t&) throw () +{ + void *p; + pass++; + p = malloc(sz); + return p; +} + +void * +operator new (size_t sz) throw (std::bad_alloc) +{ + void *p; + pass++; + p = malloc(sz); + return p; +} + +void +operator delete (void *ptr) throw () +{ + pass++; + if (ptr) + free (ptr); +} + +class A +{ +public: + A() {} + ~A() { } + int a; + int b; +}; + + +int +main (void) +{ + A *bb = new A[10]; + delete [] bb; + bb = new (std::nothrow) A [10]; + delete [] bb; + + if (pass == 4) + { + printf ("PASS\n"); + return 0; + } + else + { + printf ("FAIL\n"); + return 1; + } +} diff --git a/ld/testsuite/ld-elf/dl5.out b/ld/testsuite/ld-elf/dl5.out new file mode 100644 index 0000000000000..7ef22e9a431ad --- /dev/null +++ b/ld/testsuite/ld-elf/dl5.out @@ -0,0 +1 @@ +PASS diff --git a/ld/testsuite/ld-elf/dl6.c b/ld/testsuite/ld-elf/dl6.c new file mode 100644 index 0000000000000..f655ca6ef335d --- /dev/null +++ b/ld/testsuite/ld-elf/dl6.c @@ -0,0 +1,14 @@ +#include <stdio.h> + +int bar = 10; + +void +foo (void) +{ + if (bar == 10) + printf ("bar is in DSO.\n"); + else if (bar == -20) + printf ("bar is in main.\n"); + else + printf ("FAIL\n"); +} diff --git a/ld/testsuite/ld-elf/dl6a.out b/ld/testsuite/ld-elf/dl6a.out new file mode 100644 index 0000000000000..186e8488e29cd --- /dev/null +++ b/ld/testsuite/ld-elf/dl6a.out @@ -0,0 +1 @@ +bar is in main. diff --git a/ld/testsuite/ld-elf/dl6amain.c b/ld/testsuite/ld-elf/dl6amain.c new file mode 100644 index 0000000000000..9824224661a7f --- /dev/null +++ b/ld/testsuite/ld-elf/dl6amain.c @@ -0,0 +1,33 @@ +#include <stdio.h> +#include <dlfcn.h> + +int bar = -20; + +int +main (void) +{ + int ret = 0; + void *handle; + void (*fcn) (void); + + handle = dlopen("./tmpdir/libdl6a.so", RTLD_GLOBAL|RTLD_LAZY); + if (!handle) + { + printf("dlopen ./tmpdir/libdl6a.so: %s\n", dlerror ()); + return 1; + } + + fcn = (void (*)(void)) dlsym(handle, "foo"); + if (!fcn) + { + printf("dlsym foo: %s\n", dlerror ()); + ret += 1; + } + else + { + (*fcn) (); + } + + dlclose (handle); + return ret; +} diff --git a/ld/testsuite/ld-elf/dl6b.out b/ld/testsuite/ld-elf/dl6b.out new file mode 100644 index 0000000000000..8cc87f50d1376 --- /dev/null +++ b/ld/testsuite/ld-elf/dl6b.out @@ -0,0 +1 @@ +bar is in DSO. diff --git a/ld/testsuite/ld-elf/dl6bmain.c b/ld/testsuite/ld-elf/dl6bmain.c new file mode 100644 index 0000000000000..df9dbcc3fee84 --- /dev/null +++ b/ld/testsuite/ld-elf/dl6bmain.c @@ -0,0 +1,33 @@ +#include <stdio.h> +#include <dlfcn.h> + +int bar = -20; + +int +main (void) +{ + int ret = 0; + void *handle; + void (*fcn) (void); + + handle = dlopen("./tmpdir/libdl6b.so", RTLD_GLOBAL|RTLD_LAZY); + if (!handle) + { + printf("dlopen ./tmpdir/libdl6b.so: %s\n", dlerror ()); + return 1; + } + + fcn = (void (*)(void)) dlsym(handle, "foo"); + if (!fcn) + { + printf("dlsym foo: %s\n", dlerror ()); + ret += 1; + } + else + { + (*fcn) (); + } + + dlclose (handle); + return ret; +} diff --git a/ld/testsuite/ld-elf/dl6cmain.c b/ld/testsuite/ld-elf/dl6cmain.c new file mode 100644 index 0000000000000..f6c285cdf6217 --- /dev/null +++ b/ld/testsuite/ld-elf/dl6cmain.c @@ -0,0 +1,33 @@ +#include <stdio.h> +#include <dlfcn.h> + +int bar = -20; + +int +main (void) +{ + int ret = 0; + void *handle; + void (*fcn) (void); + + handle = dlopen("./tmpdir/libdl6c.so", RTLD_GLOBAL|RTLD_LAZY); + if (!handle) + { + printf("dlopen ./tmpdir/libdl6c.so: %s\n", dlerror ()); + return 1; + } + + fcn = (void (*)(void)) dlsym(handle, "foo"); + if (!fcn) + { + printf("dlsym foo: %s\n", dlerror ()); + ret += 1; + } + else + { + (*fcn) (); + } + + dlclose (handle); + return ret; +} diff --git a/ld/testsuite/ld-elf/dl6dmain.c b/ld/testsuite/ld-elf/dl6dmain.c new file mode 100644 index 0000000000000..2e57eb751e9d6 --- /dev/null +++ b/ld/testsuite/ld-elf/dl6dmain.c @@ -0,0 +1,33 @@ +#include <stdio.h> +#include <dlfcn.h> + +int bar = -20; + +int +main (void) +{ + int ret = 0; + void *handle; + void (*fcn) (void); + + handle = dlopen("./tmpdir/libdl6d.so", RTLD_GLOBAL|RTLD_LAZY); + if (!handle) + { + printf("dlopen ./tmpdir/libdl6d.so: %s\n", dlerror ()); + return 1; + } + + fcn = (void (*)(void)) dlsym(handle, "foo"); + if (!fcn) + { + printf("dlsym foo: %s\n", dlerror ()); + ret += 1; + } + else + { + (*fcn) (); + } + + dlclose (handle); + return ret; +} diff --git a/ld/testsuite/ld-elf/dummy.c b/ld/testsuite/ld-elf/dummy.c new file mode 100644 index 0000000000000..5c0328739c60a --- /dev/null +++ b/ld/testsuite/ld-elf/dummy.c @@ -0,0 +1 @@ +/* An empty file. */ diff --git a/ld/testsuite/ld-elf/dwarf.exp b/ld/testsuite/ld-elf/dwarf.exp new file mode 100644 index 0000000000000..b10e3d256c79a --- /dev/null +++ b/ld/testsuite/ld-elf/dwarf.exp @@ -0,0 +1,111 @@ +# Expect script for various DWARF tests. +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# + +# +# Written by H.J. Lu (hongjiu.lu@intel.com) +# + +# Exclude non-ELF targets. + +if ![is_elf_format] { + return +} + +# The following tests require running the executable generated by ld. +if ![isnative] { + return +} + +# Check if compiler works +if { [which $CC] == 0 } { + return +} + +# Skip if -feliminate-dwarf2-dups isn't supported. +if ![ld_compile "$CC -g -feliminate-dwarf2-dups" $srcdir/$subdir/dummy.c tmpdir/dummy.o] { + return +} + +set build_tests { + {"Build libdwarf1.so" + "-s -shared" "-fPIC -g -feliminate-dwarf2-dups" + {dwarf1.c} {} "libdwarf1.so"} +} + +set run_tests { + {"Run with libdwarf1.so first" + "tmpdir/libdwarf1.so" "" + {dwarf1main.c} "dwarf1a" "dwarf1.out" + "-g -feliminate-dwarf2-dups"} + {"Run with libdwarf1.so last" + "tmpdir/dwarf1main.o tmpdir/libdwarf1.so" "" + {dummy.c} "dwarf1b" "dwarf1.out" + "-g -feliminate-dwarf2-dups"} +} + +run_cc_link_tests $build_tests +run_ld_link_exec_tests [] $run_tests + +proc strip_test {} { + global ld + global strip + global NM + + set test "libdwarf1c.so" + set test_name "Strip -s $test" + set prog $strip + + if ![ld_simple_link $ld tmpdir/$test "-shared tmpdir/dwarf1.o"] { + unresolved "$test_name" + return + } + + send_log "$NM -D tmpdir/$test > tmpdir/$test.exp\n" + catch "exec $NM -D tmpdir/$test > tmpdir/$test.exp" got + if ![string match "" $got] then { + send_log "$got\n" + unresolved "$test_name" + return + } + + send_log "$prog -s tmpdir/$test\n" + catch "exec $prog -s tmpdir/$test" got + if ![string match "" $got] then { + send_log "$got\n" + fail "$test_name" + return + } + + send_log "$NM -D tmpdir/$test > tmpdir/$test.out\n" + catch "exec $NM -D tmpdir/$test > tmpdir/$test.out" got + if ![string match "" $got] then { + send_log "$got\n" + unresolved "$test_name" + return + } + + if { [catch {exec cmp tmpdir/$test.exp tmpdir/$test.out}] } then { + send_log "tmpdir/$test.exp tmpdir/$test.out differ.\n" + fail "$test_name" + return + } + + pass "$test_name" +} + +strip_test diff --git a/ld/testsuite/ld-elf/dwarf1.c b/ld/testsuite/ld-elf/dwarf1.c new file mode 100644 index 0000000000000..2895d4c8a770b --- /dev/null +++ b/ld/testsuite/ld-elf/dwarf1.c @@ -0,0 +1,10 @@ +#include <stdio.h> +#include "dwarf1.h" + +struct foo_s foo; + +void +doprintf (void) +{ + printf ("OK\n"); +} diff --git a/ld/testsuite/ld-elf/dwarf1.h b/ld/testsuite/ld-elf/dwarf1.h new file mode 100644 index 0000000000000..3cd7918c070aa --- /dev/null +++ b/ld/testsuite/ld-elf/dwarf1.h @@ -0,0 +1,6 @@ +struct foo_s +{ + int foo; +}; + +extern void doprintf (void); diff --git a/ld/testsuite/ld-elf/dwarf1.out b/ld/testsuite/ld-elf/dwarf1.out new file mode 100644 index 0000000000000..d86bac9de59ab --- /dev/null +++ b/ld/testsuite/ld-elf/dwarf1.out @@ -0,0 +1 @@ +OK diff --git a/ld/testsuite/ld-elf/dwarf1main.c b/ld/testsuite/ld-elf/dwarf1main.c new file mode 100644 index 0000000000000..90451981d3805 --- /dev/null +++ b/ld/testsuite/ld-elf/dwarf1main.c @@ -0,0 +1,10 @@ +#include "dwarf1.h" + +struct foo_s foo; + +int +main (void) +{ + doprintf (); + return 0; +} diff --git a/ld/testsuite/ld-elf/dynbss1.c b/ld/testsuite/ld-elf/dynbss1.c new file mode 100644 index 0000000000000..eb5f0673998eb --- /dev/null +++ b/ld/testsuite/ld-elf/dynbss1.c @@ -0,0 +1,20 @@ +#include <stdio.h> +#include <stdlib.h> +#include "data1.h" + +int +main (void) +{ + if ((((long) (&a1)) & (ALIGNMENT1 - 1))) + abort (); + if ((((long) (&a2)) & (ALIGNMENT2 - 1))) + abort (); + if ((((long) (&a2)) & (ALIGNMENT3 - 1))) + abort (); + if ((((long) (&a3)) & (ALIGNMENT4 - 1))) + abort (); + + printf ("PASS\n"); + + return(0) ; +} diff --git a/ld/testsuite/ld-elf/eh-frame-hdr.d b/ld/testsuite/ld-elf/eh-frame-hdr.d new file mode 100644 index 0000000000000..b465e5de2d571 --- /dev/null +++ b/ld/testsuite/ld-elf/eh-frame-hdr.d @@ -0,0 +1,17 @@ +#source: eh-frame-hdr.s +#ld: -e _start --eh-frame-hdr +#objdump: -hw +#target: alpha*-*-* +#target: arm*-*-* +#target: i?86-*-* +#target: m68k-*-* +#target: mips*-*-* +#target: powerpc*-*-* +#target: s390*-*-* +#target: sh*-*-* +#xfail: sh*l*-*-* +#target: sparc*-*-* +#target: x86_64-*-* +#... + [0-9] .eh_frame_hdr 0*[12][048c] .* +#pass diff --git a/ld/testsuite/ld-elf/eh-frame-hdr.s b/ld/testsuite/ld-elf/eh-frame-hdr.s new file mode 100644 index 0000000000000..e5d33189eb380 --- /dev/null +++ b/ld/testsuite/ld-elf/eh-frame-hdr.s @@ -0,0 +1,6 @@ + .text + .global _start +_start: + .cfi_startproc + .skip 16 + .cfi_endproc diff --git a/ld/testsuite/ld-elf/eh1.d b/ld/testsuite/ld-elf/eh1.d index 897955b2b6f7c..d7a5b15d32519 100644 --- a/ld/testsuite/ld-elf/eh1.d +++ b/ld/testsuite/ld-elf/eh1.d @@ -22,11 +22,11 @@ The section .eh_frame contains: DW_CFA_nop DW_CFA_nop -00000018 0000001c 0000001c FDE cie=00000000 pc=004000b0..004000b0 - DW_CFA_advance_loc: 0 to 004000b0 +00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_offset: 16 DW_CFA_offset: r6 at cfa-16 - DW_CFA_advance_loc: 0 to 004000b0 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_reg: r6 00000038 ZERO terminator diff --git a/ld/testsuite/ld-elf/eh2.d b/ld/testsuite/ld-elf/eh2.d index 6f4f2c58ed590..c1ef3994fb82b 100644 --- a/ld/testsuite/ld-elf/eh2.d +++ b/ld/testsuite/ld-elf/eh2.d @@ -22,11 +22,11 @@ The section .eh_frame contains: DW_CFA_nop DW_CFA_nop -00000018 0000001c 0000001c FDE cie=00000000 pc=004000b0..004000b0 - DW_CFA_advance_loc: 0 to 004000b0 +00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_offset: 16 DW_CFA_offset: r6 at cfa-16 - DW_CFA_advance_loc: 0 to 004000b0 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_reg: r6 00000038 ZERO terminator diff --git a/ld/testsuite/ld-elf/eh3.d b/ld/testsuite/ld-elf/eh3.d index 492c87784b92f..f1d2a523759f7 100644 --- a/ld/testsuite/ld-elf/eh3.d +++ b/ld/testsuite/ld-elf/eh3.d @@ -22,11 +22,11 @@ The section .eh_frame contains: DW_CFA_nop DW_CFA_nop -00000018 0000001c 0000001c FDE cie=00000000 pc=004000b0..004000b0 - DW_CFA_advance_loc: 0 to 004000b0 +00000018 0000001c 0000001c FDE cie=00000000 pc=00400078..00400078 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_offset: 16 DW_CFA_offset: r6 at cfa-16 - DW_CFA_advance_loc: 0 to 004000b0 + DW_CFA_advance_loc: 0 to 00400078 DW_CFA_def_cfa_reg: r6 00000038 ZERO terminator diff --git a/ld/testsuite/ld-elf/eh4.d b/ld/testsuite/ld-elf/eh4.d new file mode 100644 index 0000000000000..5fdd722bd3875 --- /dev/null +++ b/ld/testsuite/ld-elf/eh4.d @@ -0,0 +1,32 @@ +#source: eh4.s +#source: eh4a.s +#ld: -shared +#readelf: -wf +#target: x86_64-*-* + +The section .eh_frame contains: + +00000000 00000014 00000000 CIE + Version: 1 + Augmentation: "zR" + Code alignment factor: 1 + Data alignment factor: -8 + Return address column: 16 + Augmentation data: 1b + + DW_CFA_def_cfa: r7 ofs 8 + DW_CFA_offset: r16 at cfa-8 + DW_CFA_nop + DW_CFA_nop + +00000018 00000014 0000001c FDE cie=00000000 pc=00000400..00000413 + DW_CFA_set_loc: 00000404 + DW_CFA_def_cfa_offset: 80 + +00000030 00000014 00000034 FDE cie=00000000 pc=00000413..00000426 + DW_CFA_set_loc: 00000417 + DW_CFA_def_cfa_offset: 80 + +00000048 ZERO terminator +#pass + diff --git a/ld/testsuite/ld-elf/eh4.s b/ld/testsuite/ld-elf/eh4.s new file mode 100644 index 0000000000000..2714ad64dc843 --- /dev/null +++ b/ld/testsuite/ld-elf/eh4.s @@ -0,0 +1,92 @@ + .text + .align 512 + .globl foo + .type foo, @function +foo: +.LFB1: + subq $72, %rsp +.LCFI1: + xorl %eax, %eax + movq %rsp, %rdi + call bar@PLT + addq $72, %rsp + ret +.LFE1: + .size foo, .-foo + .globl bar + .type bar, @function +bar: +.LFB2: + subq $72, %rsp +.LCFI2: + xorl %eax, %eax + movq %rsp, %rdi + call bar@PLT + addq $72, %rsp + ret +.LFE2: + .size bar, .-bar + .section .eh_frame,"a",@progbits +.Lframe1: + .long .LECIE1-.LSCIE1 # Length of Common Information Entry +.LSCIE1: + .long 0x0 # CIE Identifier Tag + .byte 0x1 # CIE Version + .ascii "zR\0" # CIE Augmentation + .uleb128 0x1 # CIE Code Alignment Factor + .sleb128 -8 # CIE Data Alignment Factor + .byte 0x10 # CIE RA Column + .uleb128 0x1 # Augmentation size + .byte 0x1b # FDE Encoding (pcrel sdata4) + .byte 0xc # DW_CFA_def_cfa + .uleb128 0x7 + .uleb128 0x8 + .byte 0x90 # DW_CFA_offset, column 0x10 + .uleb128 0x1 + .align 8 +.LECIE1: +.LSFDE1: + .long .LEFDE1-.LASFDE1 # FDE Length +.LASFDE1: + .long .LASFDE1-.Lframe1 # FDE CIE offset + .long .LFB1-. # FDE initial location + .long .LFE1-.LFB1 # FDE address range + .uleb128 0x0 # Augmentation size + .byte 0x1 # DW_CFA_set_loc + .long .LCFI1-. + .byte 0xe # DW_CFA_def_cfa_offset + .uleb128 0x50 + .align 8 +.LEFDE1: +.Lframe2: + .long .LECIE2-.LSCIE2 # Length of Common Information Entry +.LSCIE2: + .long 0x0 # CIE Identifier Tag + .byte 0x1 # CIE Version + .ascii "zR\0" # CIE Augmentation + .uleb128 0x1 # CIE Code Alignment Factor + .sleb128 -8 # CIE Data Alignment Factor + .byte 0x10 # CIE RA Column + .uleb128 0x1 # Augmentation size + .byte 0x1b # FDE Encoding (pcrel sdata4) + .byte 0xc # DW_CFA_def_cfa + .uleb128 0x7 + .uleb128 0x8 + .byte 0x90 # DW_CFA_offset, column 0x10 + .uleb128 0x1 + .align 8 +.LECIE2: +.LSFDE2: + .long .LEFDE2-.LASFDE2 # FDE Length +.LASFDE2: + .long .LASFDE2-.Lframe2 # FDE CIE offset + .long .LFB2-. # FDE initial location + .long .LFE2-.LFB2 # FDE address range + .uleb128 0x0 # Augmentation size + .byte 0x1 # DW_CFA_set_loc + .long .LCFI2-. + .byte 0xe # DW_CFA_def_cfa_offset + .uleb128 0x50 + .align 8 +.LEFDE2: + .section .note.GNU-stack,"",@progbits diff --git a/ld/testsuite/ld-elf/eh4a.s b/ld/testsuite/ld-elf/eh4a.s new file mode 100644 index 0000000000000..c245871ed10d1 --- /dev/null +++ b/ld/testsuite/ld-elf/eh4a.s @@ -0,0 +1,3 @@ + .section .eh_frame,"a",%progbits + .align 8 + .zero 8 diff --git a/ld/testsuite/ld-elf/eh5.d b/ld/testsuite/ld-elf/eh5.d new file mode 100644 index 0000000000000..c12562aa3b32f --- /dev/null +++ b/ld/testsuite/ld-elf/eh5.d @@ -0,0 +1,161 @@ +#source: eh5.s +#source: eh5a.s +#source: eh5b.s +#ld: +#readelf: -wf +#target: x86_64-*-* i?86-*-* + +The section .eh_frame contains: + +00000000 0000001[04] 00000000 CIE + Version: 1 + Augmentation: "zR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 1b + + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#... +0000001[48] 00000014 0000001[8c] FDE cie=00000000 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000000(2c|30) 00000014 00000000 CIE + Version: 1 + Augmentation: "zPR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 03 .. .. .. .. 1b + + DW_CFA_nop + +0000004[48] 00000014 0000001c FDE cie=000000(2c|30) pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000000(5c|60) 00000014 0000006[04] FDE cie=00000000 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +0000007[48] 0000001[8c] 00000000 CIE + Version: 1 + Augmentation: "zPLR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 03 .. .. .. .. 0c 1b + + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#... +0000009[08] 0000001c 0000002[04] FDE cie=0000007[48] pc=.* + Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) + + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000000b[08] 0000001[04] 00000000 CIE + Version: 1 + Augmentation: "zR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 1b + + DW_CFA_def_cfa: r0 ofs 16 +#... +000000(c4|d0) 0000001[04] 0000001[8c] FDE cie=000000b[08] pc=.* + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#... +000000[de]8 00000014 00000000 CIE + Version: 1 + Augmentation: "zPR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 03 .. .. .. .. 1b + + DW_CFA_nop + +00000(0f|10)0 00000014 0000001c FDE cie=000000[de]8 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000001[01]8 0000001[04] 000000(5c|64) FDE cie=000000b[08] pc=.* + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#... +000001(1c|30) 0000001[8c] 00000000 CIE + Version: 1 + Augmentation: "zPLR" + Code alignment factor: 1 + Data alignment factor: .* + Return address column: .* + Augmentation data: 03 .. .. .. .. 0c 1b + + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop +#... +000001(38|50) 0000001c 0000002[04] FDE cie=000001(1c|30) pc=.* + Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) + + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000001(58|70) 00000014 000001(5c|74) FDE cie=00000000 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000001(70|88) 00000014 000001(48|5c) FDE cie=000000(2c|30) pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000001(88|a0) 00000014 000001(8c|a4) FDE cie=00000000 pc=.* + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + +000001(a0|b8) 0000001c 000001(30|44) FDE cie=0000007[48] pc=.* + Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) + + DW_CFA_advance_loc: 4 to .* + DW_CFA_def_cfa: r0 ofs 16 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + diff --git a/ld/testsuite/ld-elf/eh5.s b/ld/testsuite/ld-elf/eh5.s new file mode 100644 index 0000000000000..6af48c2c1adc6 --- /dev/null +++ b/ld/testsuite/ld-elf/eh5.s @@ -0,0 +1,29 @@ + .text + .cfi_startproc simple + .long 0 + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v0 + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .cfi_startproc simple + .long 0 + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v0 + .cfi_lsda 12, 0xdeadbeef + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .globl my_personality_v0 +my_personality_v0: + .long 0 diff --git a/ld/testsuite/ld-elf/eh5a.s b/ld/testsuite/ld-elf/eh5a.s new file mode 100644 index 0000000000000..a74b2cc843270 --- /dev/null +++ b/ld/testsuite/ld-elf/eh5a.s @@ -0,0 +1,27 @@ + .text + .cfi_startproc simple + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v1 + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .cfi_startproc simple + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v1 + .cfi_lsda 12, 0xdeadbeef + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .globl my_personality_v1 +my_personality_v1: + .long 0 diff --git a/ld/testsuite/ld-elf/eh5b.s b/ld/testsuite/ld-elf/eh5b.s new file mode 100644 index 0000000000000..3e5e0108f95db --- /dev/null +++ b/ld/testsuite/ld-elf/eh5b.s @@ -0,0 +1,29 @@ + .text + .cfi_startproc simple + .long 0 + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v0 + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .cfi_startproc simple + .long 0 + .cfi_def_cfa 0, 16 + .long 0 + .cfi_endproc + + .cfi_startproc simple + .cfi_personality 3, my_personality_v0 + .cfi_lsda 12, 0xdeadbeef + .long 0 + .cfi_def_cfa 0, 16 + .cfi_endproc + + .globl _start +_start: + .long 0 diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp index 43c42822bc087..66b5babfb208a 100644 --- a/ld/testsuite/ld-elf/elf.exp +++ b/ld/testsuite/ld-elf/elf.exp @@ -1,5 +1,5 @@ # Expect script for various ELF tests. -# Copyright 2002, 2003 Free Software Foundation, Inc. +# Copyright 2002, 2003, 2005, 2007 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -22,6 +22,10 @@ if ![is_elf_format] { return } +if { [istarget spu*-*-*] } { + set LDFLAGS "$LDFLAGS --local-store 0:0" +} + set test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] foreach t $test_list { # We need to strip the ".d", but can leave the dirname. diff --git a/ld/testsuite/ld-elf/end.c b/ld/testsuite/ld-elf/end.c new file mode 100644 index 0000000000000..f7b681adbbd6c --- /dev/null +++ b/ld/testsuite/ld-elf/end.c @@ -0,0 +1,7 @@ +#include <stdio.h> + +void +foo () +{ + printf ("TEST1\n"); +} diff --git a/ld/testsuite/ld-elf/endhidden.c b/ld/testsuite/ld-elf/endhidden.c new file mode 100644 index 0000000000000..2cab97af18436 --- /dev/null +++ b/ld/testsuite/ld-elf/endhidden.c @@ -0,0 +1,8 @@ +#include <stdio.h> + +__attribute__ ((visibility ("hidden"))) +void +foo () +{ + printf ("TEST1\n"); +} diff --git a/ld/testsuite/ld-elf/endprotected.c b/ld/testsuite/ld-elf/endprotected.c new file mode 100644 index 0000000000000..b6b39ea92ad9b --- /dev/null +++ b/ld/testsuite/ld-elf/endprotected.c @@ -0,0 +1,8 @@ +#include <stdio.h> + +__attribute__ ((visibility ("protected"))) +void +foo () +{ + printf ("TEST1\n"); +} diff --git a/ld/testsuite/ld-elf/expr1.d b/ld/testsuite/ld-elf/expr1.d new file mode 100644 index 0000000000000..7bf5d227e5daf --- /dev/null +++ b/ld/testsuite/ld-elf/expr1.d @@ -0,0 +1,2 @@ +# ld: -T expr1.t +# error: expr1.t:3: nonconstant expression for load base diff --git a/ld/testsuite/ld-elf/expr1.s b/ld/testsuite/ld-elf/expr1.s new file mode 100644 index 0000000000000..998bbc086fa4e --- /dev/null +++ b/ld/testsuite/ld-elf/expr1.s @@ -0,0 +1,4 @@ + .section .bar,"ax","progbits" + .byte 0 + .section .foo,"aw","progbits" + .byte 0 diff --git a/ld/testsuite/ld-elf/expr1.t b/ld/testsuite/ld-elf/expr1.t new file mode 100644 index 0000000000000..9670e255bbddf --- /dev/null +++ b/ld/testsuite/ld-elf/expr1.t @@ -0,0 +1,6 @@ +SECTIONS +{ + .bar : AT ((ADDR(.foo) + 4095) & ~(4095)) { *(.bar) } + .foo : { *(.foo) } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/extract-symbol-1.ld b/ld/testsuite/ld-elf/extract-symbol-1.ld new file mode 100644 index 0000000000000..53e95c6d09d5d --- /dev/null +++ b/ld/testsuite/ld-elf/extract-symbol-1.ld @@ -0,0 +1,18 @@ +ENTRY(_entry) +PHDRS +{ + data PT_LOAD AT (0); +} +SECTIONS +{ + . = 0x10000; + .foo : { *(.foo) } :data + + . = 0x20000; + .bar : { *(.bar) } :data + + /DISCARD/ : { *(*) } + + _entry = 0x30000; + linker_symbol = 0x40000; +} diff --git a/ld/testsuite/ld-elf/extract-symbol-1.s b/ld/testsuite/ld-elf/extract-symbol-1.s new file mode 100644 index 0000000000000..0971500413f9e --- /dev/null +++ b/ld/testsuite/ld-elf/extract-symbol-1.s @@ -0,0 +1,15 @@ + .globl B + .globl C + + .section .foo,"awx",%progbits + .4byte 1,2,3,4 +B: + .4byte 5,6,7 + + .section .bar,"ax",%nobits + .space 0x123 +C: + .space 0x302 + + .globl D + .equ D,0x12345678 diff --git a/ld/testsuite/ld-elf/extract-symbol-1sec.d b/ld/testsuite/ld-elf/extract-symbol-1sec.d new file mode 100644 index 0000000000000..6891abcec262b --- /dev/null +++ b/ld/testsuite/ld-elf/extract-symbol-1sec.d @@ -0,0 +1,13 @@ +#name: --extract-symbol test 1 (sections) +#source: extract-symbol-1.s +#ld: -Textract-symbol-1.ld +#objcopy_linked_file: --extract-symbol +#objdump: --headers +#xfail: "hppa*-*-*" +#... +Sections: + *Idx +Name +Size +VMA +LMA .* + *0 +\.foo +0+ +0+ +0+ .* + *CONTENTS, ALLOC, LOAD, CODE + *1 +\.bar +0+ +0+ +0+ .* + *ALLOC, READONLY, CODE diff --git a/ld/testsuite/ld-elf/extract-symbol-1sym.d b/ld/testsuite/ld-elf/extract-symbol-1sym.d new file mode 100644 index 0000000000000..f372932973292 --- /dev/null +++ b/ld/testsuite/ld-elf/extract-symbol-1sym.d @@ -0,0 +1,11 @@ +#name: --extract-symbol test 1 (symbols) +#source: extract-symbol-1.s +#ld: -Textract-symbol-1.ld +#objcopy_linked_file: --extract-symbol +#nm: -n +#xfail: "hppa*-*-*" +0*00010010 T B +0*00020123 T C +0*00030000 A _entry +0*00040000 A linker_symbol +0*12345678 A D diff --git a/ld/testsuite/ld-elf/foo.c b/ld/testsuite/ld-elf/foo.c new file mode 100644 index 0000000000000..c84baee2e26a3 --- /dev/null +++ b/ld/testsuite/ld-elf/foo.c @@ -0,0 +1,11 @@ +#include <stdio.h> + +void +foo (void) +{ + printf ("TEST2\n"); +} + +static void (*const init_array []) (void) + __attribute__ ((used, section (".init_array"), aligned (sizeof (void *)))) + = { foo }; diff --git a/ld/testsuite/ld-elf/foo.map b/ld/testsuite/ld-elf/foo.map new file mode 100644 index 0000000000000..6b993de752481 --- /dev/null +++ b/ld/testsuite/ld-elf/foo.map @@ -0,0 +1,4 @@ +FOO { + global: foo; + local: *; +}; diff --git a/ld/testsuite/ld-elf/group.ld b/ld/testsuite/ld-elf/group.ld index d6b27d04946ea..58d78dab942a6 100644 --- a/ld/testsuite/ld-elf/group.ld +++ b/ld/testsuite/ld-elf/group.ld @@ -1,5 +1,6 @@ SECTIONS { . = 0x1000; - .text : { *(.text) } + .text : { *(.text) *(.rodata.brlt) } + /DISCARD/ : { *(.reginfo) } } diff --git a/ld/testsuite/ld-elf/group3a.d b/ld/testsuite/ld-elf/group3a.d new file mode 100644 index 0000000000000..83c516134d327 --- /dev/null +++ b/ld/testsuite/ld-elf/group3a.d @@ -0,0 +1,8 @@ +#source: group3a.s +#source: group3b.s +#ld: -T group.ld +#readelf: -s +Symbol table '.symtab' contains .* entries: +#... + .*: 0[0]*1000 0 OBJECT GLOBAL HIDDEN . foo +#... diff --git a/ld/testsuite/ld-elf/group3a.s b/ld/testsuite/ld-elf/group3a.s new file mode 100644 index 0000000000000..5e6a68648cb4b --- /dev/null +++ b/ld/testsuite/ld-elf/group3a.s @@ -0,0 +1,5 @@ + .section .data,"awG",%progbits,foo_group,comdat + .globl foo + .type foo,%object +foo: + .word 0 diff --git a/ld/testsuite/ld-elf/group3b.d b/ld/testsuite/ld-elf/group3b.d new file mode 100644 index 0000000000000..82c18e4b4d901 --- /dev/null +++ b/ld/testsuite/ld-elf/group3b.d @@ -0,0 +1,8 @@ +#source: group3b.s +#source: group3a.s +#ld: -T group.ld +#readelf: -s +Symbol table '.symtab' contains .* entries: +#... + .*: 0[0]*1000 0 OBJECT GLOBAL HIDDEN . foo +#... diff --git a/ld/testsuite/ld-elf/group3b.s b/ld/testsuite/ld-elf/group3b.s new file mode 100644 index 0000000000000..6c101bc526226 --- /dev/null +++ b/ld/testsuite/ld-elf/group3b.s @@ -0,0 +1,6 @@ + .section .data,"awG",%progbits,foo_group,comdat + .hidden foo + .globl foo + .type foo,%object +foo: + .word 0 diff --git a/ld/testsuite/ld-elf/hash.d b/ld/testsuite/ld-elf/hash.d new file mode 100644 index 0000000000000..9c5a8f92096b7 --- /dev/null +++ b/ld/testsuite/ld-elf/hash.d @@ -0,0 +1,9 @@ +#source: start.s +#readelf: -d +#ld: -shared --hash-style=gnu +#target: *-*-linux* +#notarget: mips*-*-* + +#... +[ ]*0x[0-9a-z]+[ ]+\(GNU_HASH\)[ ]+0x[0-9a-z]+ +#... diff --git a/ld/testsuite/ld-elf/header.d b/ld/testsuite/ld-elf/header.d new file mode 100644 index 0000000000000..d4388323ddda5 --- /dev/null +++ b/ld/testsuite/ld-elf/header.d @@ -0,0 +1,5 @@ +# target: *-*-linux* *-*-vxworks +# ld: -T header.t -z max-page-size=0x100 +# objdump: -hpw + +#... diff --git a/ld/testsuite/ld-elf/header.s b/ld/testsuite/ld-elf/header.s new file mode 100644 index 0000000000000..38f22280e8e06 --- /dev/null +++ b/ld/testsuite/ld-elf/header.s @@ -0,0 +1,8 @@ + .text + .globl main +main: + .rept 0x40 - 0x15 + .long 0xfedcba98 + .endr + .data + .long 0x76543210 diff --git a/ld/testsuite/ld-elf/header.t b/ld/testsuite/ld-elf/header.t new file mode 100644 index 0000000000000..c378fbe07e015 --- /dev/null +++ b/ld/testsuite/ld-elf/header.t @@ -0,0 +1,8 @@ +ENTRY(main) + +SECTIONS +{ + . = 0x100 + SIZEOF_HEADERS; + .text : { *(.text) } + .data : { *(.data) } +} diff --git a/ld/testsuite/ld-elf/hidden.out b/ld/testsuite/ld-elf/hidden.out new file mode 100644 index 0000000000000..7ad7cbe39750e --- /dev/null +++ b/ld/testsuite/ld-elf/hidden.out @@ -0,0 +1,3 @@ +TEST2 +TEST1 +MAIN diff --git a/ld/testsuite/ld-elf/linkonce1.d b/ld/testsuite/ld-elf/linkonce1.d new file mode 100644 index 0000000000000..35e1787f18169 --- /dev/null +++ b/ld/testsuite/ld-elf/linkonce1.d @@ -0,0 +1,12 @@ +#source: linkonce1a.s +#source: linkonce1b.s +#ld: -r +#objdump: -r + +.*: file format .* + +RELOCATION RECORDS FOR \[.debug_frame\]: +OFFSET[ ]+TYPE[ ]+VALUE[ ]* +.*(NONE|unused).*\*ABS\* + +#pass diff --git a/ld/testsuite/ld-elf/linkonce1a.s b/ld/testsuite/ld-elf/linkonce1a.s new file mode 100644 index 0000000000000..5c2d8c25a3ab1 --- /dev/null +++ b/ld/testsuite/ld-elf/linkonce1a.s @@ -0,0 +1,3 @@ + .section .gnu.linkonce.d.dummy,"aw" +bar: + .long 0 diff --git a/ld/testsuite/ld-elf/linkonce1b.s b/ld/testsuite/ld-elf/linkonce1b.s new file mode 100644 index 0000000000000..fd45cec540807 --- /dev/null +++ b/ld/testsuite/ld-elf/linkonce1b.s @@ -0,0 +1,17 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .long 0 + + .section .gnu.linkonce.d.dummy,"aw" + .long 0 +foo: + .long 0 + .section .debug_frame,"",%progbits + .long foo diff --git a/ld/testsuite/ld-elf/linkonce2.d b/ld/testsuite/ld-elf/linkonce2.d new file mode 100644 index 0000000000000..33eb14fff0f38 --- /dev/null +++ b/ld/testsuite/ld-elf/linkonce2.d @@ -0,0 +1,12 @@ +#source: linkonce1a.s +#source: linkonce1b.s +#ld: -emit-relocs +#objdump: -r + +.*: file format .* + +RELOCATION RECORDS FOR \[.debug_frame\]: +OFFSET[ ]+TYPE[ ]+VALUE[ ]* +.*(NONE|unused).*\*ABS\* + +#pass diff --git a/ld/testsuite/ld-elf/loadaddr.s b/ld/testsuite/ld-elf/loadaddr.s new file mode 100644 index 0000000000000..0a1416924281a --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr.s @@ -0,0 +1,20 @@ + .text + .globl main + .globl start + .globl _start + .globl __start +main: +start: +_start: +__start: + .byte 0,0,0,0,0,0,0,0 + .byte 0,0,0,0,0,0,0,0 + .section .bar,"ax","progbits" + .byte 0,0,0,0,0,0,0,0 + .byte 0,0,0,0,0,0,0,0 + .section .foo,"aw","progbits" + .byte 0,0,0,0,0,0,0,0 + .byte 0,0,0,0,0,0,0,0 + .data + .byte 0,0,0,0,0,0,0,0 + .byte 0,0,0,0,0,0,0,0 diff --git a/ld/testsuite/ld-elf/loadaddr1.d b/ld/testsuite/ld-elf/loadaddr1.d new file mode 100644 index 0000000000000..31ac0ac0f2874 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr1.d @@ -0,0 +1,10 @@ +#source: loadaddr.s +#ld: -T loadaddr1.t -z max-page-size=0x200000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD +0x000000 0xf*80000000 0xf*80000000 0x100050 0x100050 RWE 0x200000 + LOAD +0x200000 0xf*ff600000 0xf*80101000 0x0*10 0x0*10 R E 0x200000 + LOAD +0x302000 0xf*80102000 0xf*80102000 0x0*10 0x0*10 RW 0x200000 +#pass diff --git a/ld/testsuite/ld-elf/loadaddr1.t b/ld/testsuite/ld-elf/loadaddr1.t new file mode 100644 index 0000000000000..f28c7cbbcd635 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr1.t @@ -0,0 +1,13 @@ +SECTIONS +{ + . = -0x7ff00000; + .text : {*(.text .text.*)} + . = ALIGN(64); + .foo : { *(.foo) } + .bar -0xa00000 : AT ((LOADADDR(.foo) + SIZEOF(.foo) + 4095) & ~(4095)) + { *(.bar) } + . = LOADADDR(.bar) + 4096; + . = ALIGN(8192); + .data : AT (ADDR(.data)) { *(.data) } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/loadaddr2.d b/ld/testsuite/ld-elf/loadaddr2.d new file mode 100644 index 0000000000000..2198b6ceb692b --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr2.d @@ -0,0 +1,10 @@ +#source: loadaddr.s +#ld: -T loadaddr2.t -z max-page-size=0x200000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD +0x000000 0xf*80000000 0xf*80000000 0x100050 0x100050 RWE 0x200000 + LOAD +0x110000 0xf*80110000 0xf*80101000 0x0*10 0x0*10 R E 0x200000 + LOAD +0x302000 0xf*80302000 0xf*80302000 0x0*10 0x0*10 RW 0x200000 +#pass diff --git a/ld/testsuite/ld-elf/loadaddr2.t b/ld/testsuite/ld-elf/loadaddr2.t new file mode 100644 index 0000000000000..fd897e79d60d5 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr2.t @@ -0,0 +1,13 @@ +SECTIONS +{ + . = -0x7ff00000; + .text : {*(.text .text.*)} + . = ALIGN(64); + .foo : { *(.foo) } + .bar -0x7fef0000 : AT ((LOADADDR(.foo) + SIZEOF(.foo) + 4095) & ~(4095)) + { *(.bar) } + . = LOADADDR(.bar) + 0x200000; + . = ALIGN(8192); + .data : AT (ADDR(.data)) { *(.data) } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/loadaddr3.t b/ld/testsuite/ld-elf/loadaddr3.t new file mode 100644 index 0000000000000..789f61eda1e43 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr3.t @@ -0,0 +1,16 @@ + +MEMORY +{ + rom (rx) : ORIGIN = 0x100, LENGTH = 0x100 + ram (rwx) : ORIGIN = 0x200, LENGTH = 0x100 + +} + +SECTIONS +{ + .text : {*(.text .text.*)} >rom + .data : {data_load = LOADADDR (.data); + data_start = ADDR (.data); + *(.data .data.*)} >ram AT>rom + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/loadaddr3a.d b/ld/testsuite/ld-elf/loadaddr3a.d new file mode 100644 index 0000000000000..b2ace667a9298 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr3a.d @@ -0,0 +1,9 @@ +#source: loadaddr.s +#ld: -T loadaddr3.t -z max-page-size=0x200000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD +0x000000 0x0*00000000 0x0*00000000 0x0*0110 0x0*0110 R E 0x.* + LOAD +0x000200 0x0*00000200 0x0*00000110 0x0*0010 0x0*0010 RW 0x.* +#pass diff --git a/ld/testsuite/ld-elf/loadaddr3b.d b/ld/testsuite/ld-elf/loadaddr3b.d new file mode 100644 index 0000000000000..af7e6e4e07ea0 --- /dev/null +++ b/ld/testsuite/ld-elf/loadaddr3b.d @@ -0,0 +1,13 @@ +#source: loadaddr.s +#ld: -T loadaddr3.t -z max-page-size=0x200000 +#objdump: -t +#target: *-*-linux* + +#... +0+0000100 l d .text 0+0000000 .text +0+0000200 l d .data 0+0000000 .data +#... +0+0000110 g \*ABS\* 0+0000000 data_load +#... +0+0000200 g .data 0+0000000 data_start +#pass diff --git a/ld/testsuite/ld-elf/main.c b/ld/testsuite/ld-elf/main.c new file mode 100644 index 0000000000000..24f9dcc86515e --- /dev/null +++ b/ld/testsuite/ld-elf/main.c @@ -0,0 +1,8 @@ +#include <stdio.h> + +int +main (void) +{ + printf ("MAIN\n"); + return 0; +} diff --git a/ld/testsuite/ld-elf/maxpage1.d b/ld/testsuite/ld-elf/maxpage1.d new file mode 100644 index 0000000000000..57acda090a95d --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage1.d @@ -0,0 +1,9 @@ +#source: maxpage1.s +#ld: -z max-page-size=0x200000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD+.*0x200000 + LOAD+.*0x200000 +#pass diff --git a/ld/testsuite/ld-elf/maxpage1.s b/ld/testsuite/ld-elf/maxpage1.s new file mode 100644 index 0000000000000..1a7735a8f2f56 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage1.s @@ -0,0 +1,13 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .long 0 + + .data + .long 0 diff --git a/ld/testsuite/ld-elf/maxpage2.d b/ld/testsuite/ld-elf/maxpage2.d new file mode 100644 index 0000000000000..7fe9379884606 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage2.d @@ -0,0 +1,9 @@ +#source: maxpage1.s +#ld: -z max-page-size=0x100000 +#readelf: -l --wide +#target: *-*-linux* + +#... + LOAD+.*0x100000 + LOAD+.*0x100000 +#pass diff --git a/ld/testsuite/ld-elf/maxpage3.t b/ld/testsuite/ld-elf/maxpage3.t new file mode 100644 index 0000000000000..556dcd533c8a7 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage3.t @@ -0,0 +1,7 @@ +SECTIONS +{ + .text : {*(.text)} + . = ALIGN(CONSTANT (MAXPAGESIZE)); + .data : {*(.data)} + /DISCARD/ : {*(*)} +} diff --git a/ld/testsuite/ld-elf/maxpage3a.d b/ld/testsuite/ld-elf/maxpage3a.d new file mode 100644 index 0000000000000..0e46b6bb3e8c1 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage3a.d @@ -0,0 +1,11 @@ +#source: maxpage1.s +#ld: -z max-page-size=0x10000000 -T maxpage3.t +#readelf: -lS --wide +#target: *-*-linux* + +#... + \[[ 0-9]+\] \.data[ \t]+PROGBITS[ \t]+0*10000000[ \t]+[ \t0-9a-f]+WA?.* +#... + LOAD+.*0x10000000 + LOAD+.*0x10000000 +#pass diff --git a/ld/testsuite/ld-elf/maxpage3b.d b/ld/testsuite/ld-elf/maxpage3b.d new file mode 100644 index 0000000000000..4bee0ec447c63 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage3b.d @@ -0,0 +1,10 @@ +#source: maxpage1.s +#ld: -T maxpage3.t -z max-page-size=0x10000000 +#readelf: -lS --wide +#target: x86_64-*-linux* + +#... + \[[ 0-9]+\] \.data[ \t]+PROGBITS[ \t]+0*200000[ \t]+[ \t0-9a-f]+WA?.* +#... + LOAD+.*0x10000000 +#pass diff --git a/ld/testsuite/ld-elf/maxpage3c.d b/ld/testsuite/ld-elf/maxpage3c.d new file mode 100644 index 0000000000000..cdc3eaffe5410 --- /dev/null +++ b/ld/testsuite/ld-elf/maxpage3c.d @@ -0,0 +1,12 @@ +#source: maxpage1.s +#as: --32 +#ld: -m elf_i386 -z max-page-size=0x10000000 -T maxpage3.t +#readelf: -lS --wide +#target: x86_64-*-linux* + +#... + \[[ 0-9]+\] \.data[ \t]+PROGBITS[ \t]+0*10000000[ \t]+[ \t0-9a-f]+WA?.* +#... + LOAD+.*0x10000000 + LOAD+.*0x10000000 +#pass diff --git a/ld/testsuite/ld-elf/merge.d b/ld/testsuite/ld-elf/merge.d index 12b8458630c3f..bc5a7b2b4bc6d 100644 --- a/ld/testsuite/ld-elf/merge.d +++ b/ld/testsuite/ld-elf/merge.d @@ -2,7 +2,7 @@ #ld: -T merge.ld #objdump: -s #xfail: "arc-*-*" "avr-*-*" "bfin-*-*" "cris*-*-*" "crx-*-*" "d10v-*-*" "d30v-*-*" -#xfail: "dlx-*-*" "fr30-*-*" "frv-*-*" "hppa*-*-*" "h8300-*-*" +#xfail: "dlx-*-*" "fr30-*-*" "frv-*-*" "hppa*-*-*" "h8300-*-*" "score-*-*" #xfail: "i370-*-*" "i860-*-*" "i960-*-*" "ip2k-*-*" "iq2000-*-*" #xfail: "mcore-*-*" "mn102*-*-*" "mips*-*-*" "ms1-*-*" "msp430-*-*" #xfail: "or32-*-*" "pj-*-*" "sparc*-*-*" "vax-*-*" "xstormy16-*-*" "xtensa-*-*" diff --git a/ld/testsuite/ld-elf/multibss1.d b/ld/testsuite/ld-elf/multibss1.d new file mode 100644 index 0000000000000..8074fe3347f12 --- /dev/null +++ b/ld/testsuite/ld-elf/multibss1.d @@ -0,0 +1,9 @@ +#source: multibss1.s +#ld: -e 0 +#readelf: -l --wide +#target: *-*-linux* + +#... + +LOAD +0x[^ ]+ +0x[^ ]+ +0x[^ ]+ +0x[^ ]+ +0x500000 .* +# p_offset p_vaddr p_paddr p_filesz +#pass diff --git a/ld/testsuite/ld-elf/multibss1.s b/ld/testsuite/ld-elf/multibss1.s new file mode 100644 index 0000000000000..94b84f9946211 --- /dev/null +++ b/ld/testsuite/ld-elf/multibss1.s @@ -0,0 +1,11 @@ + .macro makebss + .section .bss_\@,"aw",%nobits + .space 0x10000 + .endm + + .rept 80 + makebss + .endr + + .text + .space 0x10 diff --git a/ld/testsuite/ld-elf/new.cc b/ld/testsuite/ld-elf/new.cc new file mode 100644 index 0000000000000..b4c888247e09b --- /dev/null +++ b/ld/testsuite/ld-elf/new.cc @@ -0,0 +1,48 @@ +#include <new> +#include <exception_defines.h> + +using std::bad_alloc; + +extern "C" void *malloc (std::size_t); +extern "C" void abort (void); + +void * +operator new (std::size_t sz, const std::nothrow_t&) throw() +{ + void *p; + + /* malloc (0) is unpredictable; avoid it. */ + if (sz == 0) + sz = 1; + p = (void *) malloc (sz); + return p; +} + +void * +operator new (std::size_t sz) throw (std::bad_alloc) +{ + void *p; + + /* malloc (0) is unpredictable; avoid it. */ + if (sz == 0) + sz = 1; + p = (void *) malloc (sz); + while (p == 0) + { + ::abort(); + } + + return p; +} + +void* +operator new[] (std::size_t sz) throw (std::bad_alloc) +{ + return ::operator new(sz); +} + +void * +operator new[] (std::size_t sz, const std::nothrow_t& nothrow) throw() +{ + return ::operator new(sz, nothrow); +} diff --git a/ld/testsuite/ld-elf/nobits-1.d b/ld/testsuite/ld-elf/nobits-1.d new file mode 100644 index 0000000000000..9b90b6f76afba --- /dev/null +++ b/ld/testsuite/ld-elf/nobits-1.d @@ -0,0 +1,7 @@ +#ld: -Tnobits-1.t +#readelf: -l --wide + +#... + Section to Segment mapping: + Segment Sections... + 00 .foo .bar diff --git a/ld/testsuite/ld-elf/nobits-1.s b/ld/testsuite/ld-elf/nobits-1.s new file mode 100644 index 0000000000000..8fb1365c7100c --- /dev/null +++ b/ld/testsuite/ld-elf/nobits-1.s @@ -0,0 +1,6 @@ + .globl _entry + .section .foo,"awx",%progbits +_entry: + .byte 0 + .section .bar,"ax",%nobits + .byte 0 diff --git a/ld/testsuite/ld-elf/nobits-1.t b/ld/testsuite/ld-elf/nobits-1.t new file mode 100644 index 0000000000000..200433058b39a --- /dev/null +++ b/ld/testsuite/ld-elf/nobits-1.t @@ -0,0 +1,13 @@ +ENTRY(_entry) +PHDRS +{ + data PT_LOAD; +} +SECTIONS +{ + . = 0x1000000; + .foo : { *(.foo) } :data + . = 0x2000000; + .bar : { *(.bar) } :data + /DISCARD/ : { *(*) } +} diff --git a/ld/testsuite/ld-elf/noload-1.d b/ld/testsuite/ld-elf/noload-1.d new file mode 100644 index 0000000000000..7cae479a07100 --- /dev/null +++ b/ld/testsuite/ld-elf/noload-1.d @@ -0,0 +1,7 @@ +#source: noload-1.s +#ld: -T noload-1.t +#readelf: -S --wide + +#... + \[[ 0-9]+\] TEST[ \t]+NOBITS[ \t0-9a-f]+WA.* +#pass diff --git a/ld/testsuite/ld-elf/noload-1.s b/ld/testsuite/ld-elf/noload-1.s new file mode 100644 index 0000000000000..ad0479e0e47e8 --- /dev/null +++ b/ld/testsuite/ld-elf/noload-1.s @@ -0,0 +1,2 @@ + .section TEST,"aw",%progbits + .byte 0 diff --git a/ld/testsuite/ld-elf/noload-1.t b/ld/testsuite/ld-elf/noload-1.t new file mode 100644 index 0000000000000..1efd06c2e11c4 --- /dev/null +++ b/ld/testsuite/ld-elf/noload-1.t @@ -0,0 +1,8 @@ +SECTIONS +{ + TEST (NOLOAD) : + { + *(TEST) + } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/noload-2.d b/ld/testsuite/ld-elf/noload-2.d new file mode 100644 index 0000000000000..633bf4563830d --- /dev/null +++ b/ld/testsuite/ld-elf/noload-2.d @@ -0,0 +1,8 @@ +#source: noload-1.s +#ld: -T noload-1.t -z max-page-size=0x200000 +#readelf: -Sl --wide +#target: *-*-linux* + +#... + +LOAD +0x200000 +0x0+ +0x0+ +0x0+ +0x0+1 +RW +0x200000 +#pass diff --git a/ld/testsuite/ld-elf/normal.out b/ld/testsuite/ld-elf/normal.out new file mode 100644 index 0000000000000..3b721f0665608 --- /dev/null +++ b/ld/testsuite/ld-elf/normal.out @@ -0,0 +1,3 @@ +TEST1 +TEST1 +MAIN diff --git a/ld/testsuite/ld-elf/note-1.d b/ld/testsuite/ld-elf/note-1.d new file mode 100644 index 0000000000000..a5fc40f2e6970 --- /dev/null +++ b/ld/testsuite/ld-elf/note-1.d @@ -0,0 +1,8 @@ +#ld: -Tnote-1.t +#readelf: -l --wide + +#... + Section to Segment mapping: + Segment Sections... + 00 .foo + 01 .note diff --git a/ld/testsuite/ld-elf/note-1.s b/ld/testsuite/ld-elf/note-1.s new file mode 100644 index 0000000000000..844188bb5c591 --- /dev/null +++ b/ld/testsuite/ld-elf/note-1.s @@ -0,0 +1,6 @@ + .globl _entry + .section .foo,"awx",%progbits +_entry: + .byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + .section .note,"",%note + .byte 0 diff --git a/ld/testsuite/ld-elf/note-1.t b/ld/testsuite/ld-elf/note-1.t new file mode 100644 index 0000000000000..031fe820ead6d --- /dev/null +++ b/ld/testsuite/ld-elf/note-1.t @@ -0,0 +1,14 @@ +ENTRY(_entry) +PHDRS +{ + data PT_LOAD; + note PT_NOTE; +} +SECTIONS +{ + . = 0x1000000; + .foo : { *(.foo) } :data + . = 0x2000000; + .note : { *(.note) } :note + /DISCARD/ : { *(*) } +} diff --git a/ld/testsuite/ld-elf/orphan.d b/ld/testsuite/ld-elf/orphan.d index 04d935c11e5c6..54d10df4cdaa3 100644 --- a/ld/testsuite/ld-elf/orphan.d +++ b/ld/testsuite/ld-elf/orphan.d @@ -4,6 +4,7 @@ #... \[[ 0-9]+\] \.(text|notbad)[ \t]+PROGBITS[ \t0-9a-f]+AX?.* +#... \[[ 0-9]+\] \.(text|notbad)[ \t]+PROGBITS[ \t0-9a-f]+AX?.* \[[ 0-9]+\] \.data[ \t]+PROGBITS[ \t0-9a-f]+WA.* #... diff --git a/ld/testsuite/ld-elf/orphan2.d b/ld/testsuite/ld-elf/orphan2.d index 867a4a9261c8c..a82e721775346 100644 --- a/ld/testsuite/ld-elf/orphan2.d +++ b/ld/testsuite/ld-elf/orphan2.d @@ -4,5 +4,6 @@ #... \[[ 0-9]+\] \.text[ \t]+PROGBITS[ \t0-9a-f]+AX?.* +#... \[[ 0-9]+\] \.modinfo[ \t]+PROGBITS[ \t0-9a-f]+A.* #pass diff --git a/ld/testsuite/ld-elf/overlay.d b/ld/testsuite/ld-elf/overlay.d new file mode 100644 index 0000000000000..00d25d5e2046c --- /dev/null +++ b/ld/testsuite/ld-elf/overlay.d @@ -0,0 +1,12 @@ +# ld: -T overlay.t -u __load_start_text1 -u __load_start_text2 -u __load_stop_text1 -u __load_stop_text2 +#readelf: -s + +#... +[ ]+[0-9]+:[ ]+0*4000[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+ABS __load_start_text1 +#... +[ ]+[0-9]+:[ ]+0*4010[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+ABS __load_start_text2 +#... +[ ]+[0-9]+:[ ]+0*4030[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+ABS __load_stop_text2 +#... +[ ]+[0-9]+:[ ]+0*4010[ ]+0[ ]+NOTYPE[ ]+GLOBAL[ ]+DEFAULT[ ]+ABS __load_stop_text1 +#pass diff --git a/ld/testsuite/ld-elf/overlay.s b/ld/testsuite/ld-elf/overlay.s new file mode 100644 index 0000000000000..f153044e31b66 --- /dev/null +++ b/ld/testsuite/ld-elf/overlay.s @@ -0,0 +1,6 @@ + .section .text1,"ax",%progbits + .space 0x10 + .section .text2,"ax",%progbits + .space 0x20 + .text + .space 0x30 diff --git a/ld/testsuite/ld-elf/overlay.t b/ld/testsuite/ld-elf/overlay.t new file mode 100644 index 0000000000000..bdb33c815cac2 --- /dev/null +++ b/ld/testsuite/ld-elf/overlay.t @@ -0,0 +1,10 @@ +SECTIONS +{ + .text : { *(.text) } + OVERLAY 0x1000 : AT (0x4000) + { + .text1 {*(.text1)} + .text2 {*(.text2)} + } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-elf/pass.out b/ld/testsuite/ld-elf/pass.out new file mode 100644 index 0000000000000..7ef22e9a431ad --- /dev/null +++ b/ld/testsuite/ld-elf/pass.out @@ -0,0 +1 @@ +PASS diff --git a/ld/testsuite/ld-elf/sec64k.exp b/ld/testsuite/ld-elf/sec64k.exp index bd66c1c5701d0..cbf6e4667a127 100644 --- a/ld/testsuite/ld-elf/sec64k.exp +++ b/ld/testsuite/ld-elf/sec64k.exp @@ -1,5 +1,5 @@ # Expect script for tests for >64k sections -# Copyright 2002, 2003 Free Software Foundation, Inc. +# Copyright 2002, 2003, 2006 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -50,12 +50,16 @@ for { set i 0 } { $i < $max_sec / $secs_per_file } { incr i } { } if { $i == 0 } { + puts $ofd " .global start" + puts $ofd "start:" puts $ofd " .global _start" - puts $ofd " .global __start" puts $ofd "_start:" + puts $ofd " .global __start" puts $ofd "__start:" + puts $ofd " .global main" + puts $ofd "main:" puts $ofd " .global foo_0" - puts $ofd "foo_0: .long 0" + puts $ofd "foo_0: .dc.a 0" } # Make sure the used section is not covered by common linker scripts. @@ -65,9 +69,9 @@ for { set i 0 } { $i < $max_sec / $secs_per_file } { incr i } { puts $ofd " .section .foo.\\secn,\"ax\"" puts $ofd " .global foo_\\secn" puts $ofd "foo_\\secn:" - puts $ofd " .long foo_\\secp" + puts $ofd " .dc.a foo_\\secp" puts $ofd "bar_\\secn:" - puts $ofd " .long bar_\\secn" + puts $ofd " .dc.a bar_\\secn" puts $ofd " .endm" puts $ofd " secn = [expr $i * $secs_per_file]" puts $ofd " .rept $secs_per_file" @@ -87,35 +91,41 @@ if [catch { set ofd [open "tmpdir/$test1.d" w] } x] { # The ld-r linked file will contain relocation-sections too, so make it # half the size in order to try and keep the test-time down. -foreach sfile [lrange $sfiles 0 [expr [llength $sfiles] / 2]] { - puts $ofd "#source: $sfile" + +# The m32r target generates both REL and RELA relocs (for historical +# reasons) so the expected number of sections will be much more than +# 68000, which throws this particular test right off. +if {![istarget "m32r-*-*"]} then { + foreach sfile [lrange $sfiles 0 [expr [llength $sfiles] / 2]] { + puts $ofd "#source: $sfile" + } + puts $ofd "#ld: -r" + puts $ofd "#readelf: -W -Ss" + puts $ofd "There are 680.. section headers.*:" + puts $ofd "#..." + puts $ofd " \\\[ 0\\\] .* 682\[0-9\]\[0-9\]\[ \]+0\[ \]+0" + puts $ofd "#..." + puts $ofd " \\\[ \[0-9\]\\\] \.foo\.1\[ \]+PROGBITS\[ \]+.*" + puts $ofd "#..." + puts $ofd " \\\[65279\\\] (.rel\[a\]?)?\\.foo\\.\[0-9\]+ .*" + puts $ofd " \\\[65536\\\] (.rel\[a\]?)?\\.foo\\.\[0-9\]+ .*" + puts $ofd "#..." + puts $ofd " 340..: 0+\[ \]+0\[ \]+SECTION\[ \]+LOCAL\[ \]+DEFAULT\[ \]+68... " + puts $ofd "#..." + puts $ofd " 340..: 0+(2|4|8)\[ \]+0\[ \]+NOTYPE\[ \]+LOCAL\[ \]+DEFAULT\[ \]+\[23\] bar_1$" + puts $ofd "#..." + puts $ofd ".* bar_34000$" + puts $ofd "#..." + # Global symbols are not in "alphanumeric" order, so we just check + # that the first and the last are present in any order (assuming no + # duplicates). + puts $ofd ".* (\[0-9\] foo_1|68... foo_34000)$" + puts $ofd "#..." + puts $ofd ".* (\[0-9\] foo_1|68... foo_34000)$" + puts $ofd "#pass" + close $ofd + run_dump_test "tmpdir/$test1" } -puts $ofd "#ld: -r" -puts $ofd "#readelf: -W -Ss" -puts $ofd "There are 680.. section headers.*:" -puts $ofd "#..." -puts $ofd " \\\[ 0\\\] .* 682\[0-9\]\[0-9\]\[ \]+0\[ \]+0" -puts $ofd "#..." -puts $ofd " \\\[ \[0-9\]\\\] \.foo\.1\[ \]+PROGBITS\[ \]+.*" -puts $ofd "#..." -puts $ofd " \\\[65279\\\] (.rel\[a\]?)?\\.foo\\.\[0-9\]+ .*" -puts $ofd " \\\[65536\\\] (.rel\[a\]?)?\\.foo\\.\[0-9\]+ .*" -puts $ofd "#..." -puts $ofd " 680..: 0+\[ \]+0\[ \]+SECTION\[ \]+LOCAL\[ \]+DEFAULT\[ \]+68... " -puts $ofd "#..." -puts $ofd " 680..: 0+4\[ \]+0\[ \]+NOTYPE\[ \]+LOCAL\[ \]+DEFAULT\[ \]+\[23\] bar_1" -puts $ofd "#..." -puts $ofd ".* bar_34000" -puts $ofd "#..." -# Global symbols are not in "alphanumeric" order, so we just check -# that the first and the last are present in any order (assuming no -# duplicates). -puts $ofd ".* (\[0-9\] foo_1|68... foo_34000)" -puts $ofd "#..." -puts $ofd ".* (\[0-9\] foo_1|68... foo_34000)" -puts $ofd "#pass" -close $ofd -run_dump_test "tmpdir/$test1" if [catch { set ofd [open "tmpdir/$test2.d" w] } x] { perror "$x" @@ -123,7 +133,11 @@ if [catch { set ofd [open "tmpdir/$test2.d" w] } x] { return } foreach sfile $sfiles { puts $ofd "#source: $sfile" } -puts $ofd "#ld:" +if { [istarget spu*-*-*] } { + puts $ofd "#ld: --local-store 0:0" +} else { + puts $ofd "#ld:" +} puts $ofd "#readelf: -W -Ss" puts $ofd "There are 660.. section headers.*:" puts $ofd "#..." @@ -132,18 +146,18 @@ puts $ofd "#..." puts $ofd " \\\[65279\\\] \\.foo\\.\[0-9\]+ .*" puts $ofd " \\\[65536\\\] \\.foo\\.\[0-9\]+ .*" puts $ofd "#..." -puts $ofd " 660..: 0+\[ \]+0\[ \]+SECTION\[ \]+LOCAL\[ \]+DEFAULT\[ \]+662.. " +puts $ofd " 660..: \[0-9a-f\]+\[ \]+0\[ \]+SECTION\[ \]+LOCAL\[ \]+DEFAULT\[ \]+662.. " puts $ofd "#..." -puts $ofd " 660..: \[0-9a-f\]+\[ \]+0\[ \]+NOTYPE\[ \]+LOCAL\[ \]+DEFAULT\[ \]+\[0-9\] bar_1" +puts $ofd " 660..: \[0-9a-f\]+\[ \]+0\[ \]+NOTYPE\[ \]+LOCAL\[ \]+DEFAULT\[ \]+\[0-9\] bar_1$" puts $ofd "#..." -puts $ofd ".* bar_66000" +puts $ofd ".* bar_66000$" puts $ofd "#..." # Global symbols are not in "alphanumeric" order, so we just check # that the first and the last are present in any order (assuming no # duplicates). -puts $ofd ".* (\[0-9\] foo_1|66... foo_66000)" +puts $ofd ".* (\[0-9\] foo_1|66... foo_66000)$" puts $ofd "#..." -puts $ofd ".* (\[0-9\] foo_1|66... foo_66000)" +puts $ofd ".* (\[0-9\] foo_1|66... foo_66000)$" puts $ofd "#pass" close $ofd run_dump_test "tmpdir/$test2" diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp new file mode 100644 index 0000000000000..c8e0a18c4f5c1 --- /dev/null +++ b/ld/testsuite/ld-elf/shared.exp @@ -0,0 +1,283 @@ +# Expect script for various ELF tests. +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# + +# Exclude non-ELF targets. + +if ![is_elf_format] { + return +} + +# The following tests require running the executable generated by ld. +if ![isnative] { + return +} + +# Check if compiler works +if { [which $CC] == 0 } { + return +} + +set build_tests { + {"Build libfoo.so" + "-shared" "-fPIC" + {foo.c} {} "libfoo.so"} + {"Build versioned libfoo.so" + "-shared -Wl,--version-script=foo.map" "-fPIC" + {foo.c} {} "libfoov.so"} + {"Build libbar.so" + "-shared" "-fPIC" + {begin.c end.c} {} "libbar.so"} + {"Build warn libbar.so" + "-shared" "-fPIC" + {beginwarn.c end.c} {} "libbarw.so"} + {"Build hidden libbar.so" + "-shared" "-fPIC" + {begin.c endhidden.c} {} "libbarh.so"} + {"Build protected libbar.so" + "-shared" "-fPIC" + {begin.c endprotected.c} {} "libbarp.so"} + {"Build libbar.so with libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoo.so" "-fPIC" + {end.c} {} "libbarfoo.so"} + {"Build libar.so with versioned libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoov.so" "-fPIC" + {end.c} {} "libbarfoov.so"} + {"Build hidden libbar.so with libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoo.so" "-fPIC" + {endhidden.c} {} "libbarhfoo.so"} + {"Build hidden libar.so with versioned libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoov.so" "-fPIC" + {endhidden.c} {} "libbarhfoov.so"} + {"Build protected libbar.so with libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoo.so" "-fPIC" + {endprotected.c} {} "libbarpfoo.so"} + {"Build protected libbar.so with versioned libfoo.so" + "-shared tmpdir/begin.o tmpdir/libfoov.so" "-fPIC" + {endprotected.c} {} "libbarpfoov.so"} + {"Build libdl1.so" + "-shared" "-fPIC" + {dl1.c} {} "libdl1.so"} + {"Build libdl2a.so with --dynamic-list=dl2.list" + "-shared -Wl,--dynamic-list=dl2.list" "-fPIC" + {dl2.c dl2xxx.c} {} "libdl2a.so"} + {"Build libdl2a.so with --dynamic-list=dl2a.list" + "-shared -Wl,--dynamic-list=dl2a.list" "-fPIC" + {dl2.c dl2xxx.c} {} "libdl2a.so"} + {"Build libdl2a.so with --dynamic-list-data" + "-shared -Wl,--dynamic-list-data" "-fPIC" + {dl2.c dl2xxx.c} {} "libdl2a.so"} + {"Build libdl2b.so with --dynamic-list=dl2.list and dl2xxx.list" + "-shared -Wl,--dynamic-list=dl2.list,--dynamic-list=dl2xxx.list" "-fPIC" + {dl2.c dl2xxx.c} {} "libdl2b.so"} + {"Build libdl2c.so with --dynamic-list-data and dl2xxx.list" + "-shared -Wl,--dynamic-list-data,--dynamic-list=dl2xxx.list" "-fPIC" + {dl2.c dl2xxx.c} {} "libdl2c.so"} + {"Build libdl4a.so with --dynamic-list=dl4.list" + "-shared -Wl,--dynamic-list=dl4.list" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4a.so"} + {"Build libdl4b.so with --dynamic-list-data" + "-shared -Wl,--dynamic-list-data" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4b.so"} + {"Build libdl4c.so with --dynamic-list=dl4.list and dl4xxx.list" + "-shared -Wl,--dynamic-list=dl4.list,--dynamic-list=dl4xxx.list" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4c.so"} + {"Build libdl4d.so with --dynamic-list-data and dl4xxx.list" + "-shared -Wl,--dynamic-list-data,--dynamic-list=dl4xxx.list" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4d.so"} + {"Build libdl4e.so with -Bsymbolic-functions --dynamic-list-cpp-new" + "-shared -Wl,-Bsymbolic-functions,--dynamic-list-cpp-new" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4e.so"} + {"Build libdl4f.so with --dynamic-list-cpp-new -Bsymbolic-functions" + "-shared -Wl,--dynamic-list-cpp-new,-Bsymbolic-functions" "-fPIC" + {dl4.c dl4xxx.c} {} "libdl4f.so"} + {"Build libdl6a.so" + "-shared" "-fPIC" + {dl6.c} {} "libdl6a.so"} + {"Build libdl6b.so with -Bsymbolic --dynamic-list-data" + "-shared -Wl,-Bsymbolic,--dynamic-list-data" "-fPIC" + {dl6.c} {} "libdl6b.so"} + {"Build libdl6c.so with -Bsymbolic" + "-shared -Wl,-Bsymbolic" "-fPIC" + {dl6.c} {} "libdl6c.so"} + {"Build libdl6d.so with --dynamic-list-data -Bsymbolic" + "-shared -Wl,--dynamic-list-data,-Bsymbolic" "-fPIC" + {dl6.c} {} "libdl6d.so"} + {"Build libdata1.so" + "-shared" "-fPIC" + {data1.c} {} "libdata1.so"} +} + +set run_tests { + {"Run normal with libfoo.so" + "tmpdir/begin.o tmpdir/libfoo.so tmpdir/end.o" "" + {main.c} "normal" "normal.out"} + {"Run protected with libfoo.so" + "tmpdir/begin.o tmpdir/libfoo.so tmpdir/endprotected.o" "" + {main.c} "protected" "normal.out"} + {"Run hidden with libfoo.so" + "tmpdir/begin.o tmpdir/libfoo.so tmpdir/endhidden.o" "" + {main.c} "hidden" "hidden.out"} + {"Run normal with versioned libfoo.so" + "tmpdir/begin.o tmpdir/libfoov.so tmpdir/end.o" "" + {main.c} "normalv" "normal.out"} + {"Run warn with versioned libfoo.so" + "tmpdir/beginwarn.o tmpdir/libfoov.so" "" + {main.c} "warn" "warn.out" + "" "" "^.*\\\): warning: function foo is deprecated$"} + {"Run protected with versioned libfoo.so" + "tmpdir/begin.o tmpdir/libfoov.so tmpdir/endprotected.o" "" + {main.c} "protected" "normal.out"} + {"Run hidden with versioned libfoo.so" + "tmpdir/begin.o tmpdir/libfoov.so tmpdir/endhidden.o" "" + {main.c} "hiddenv" "hidden.out"} + {"Run normal libbar.so with libfoo.so" + "tmpdir/libbarfoo.so tmpdir/libfoo.so" "" + {main.c} "normal" "normal.out"} + {"Run protected libbar.so with libfoo.so" + "tmpdir/libbarpfoo.so tmpdir/libfoo.so" "" + {main.c} "protected" "normal.out"} + {"Run hidden libbar.so with libfoo.so" + "tmpdir/libbarhfoo.so tmpdir/libfoo.so" "" + {main.c} "hidden" "hidden.out"} + {"Run normal libbar.so with versioned libfoo.so" + "tmpdir/libbarfoov.so tmpdir/libfoov.so" "" + {main.c} "normal" "normal.out"} + {"Run protected libbar.so with versioned libfoo.so" + "tmpdir/libbarpfoov.so tmpdir/libfoov.so" "" + {main.c} "protected" "normal.out"} + {"Run hidden libbar.so with versioned libfoo.so" + "tmpdir/libbarhfoov.so tmpdir/libfoov.so" "" + {main.c} "hidden" "hidden.out"} + {"Run dl1a with --dynamic-list=dl1.list and dlopen on libdl1.so" + "--dynamic-list=dl1.list -ldl" "" + {dl1main.c} "dl1a" "dl1.out"} + {"Run dl1b with --dynamic-list-data and dlopen on libdl1.so" + "--dynamic-list-data -ldl" "" + {dl1main.c} "dl1b" "dl1.out"} + {"Run with libdl2a.so" + "tmpdir/libdl2a.so" "" + {dl2main.c} "dl2a" "dl2a.out"} + {"Run with libdl2b.so" + "tmpdir/libdl2b.so" "" + {dl2main.c} "dl2b" "dl2b.out"} + {"Run with libdl2c.so" + "tmpdir/libdl2c.so" "" + {dl2main.c} "dl2c" "dl2b.out"} + {"Run with libdl4a.so" + "tmpdir/libdl4a.so" "" + {dl4main.c} "dl4a" "dl4a.out"} + {"Run with libdl4b.so" + "tmpdir/libdl4b.so" "" + {dl4main.c} "dl4b" "dl4a.out"} + {"Run with libdl4c.so" + "tmpdir/libdl4c.so" "" + {dl4main.c} "dl4c" "dl4b.out"} + {"Run with libdl4d.so" + "tmpdir/libdl4d.so" "" + {dl4main.c} "dl4d" "dl4b.out"} + {"Run with libdl4e.so" + "tmpdir/libdl4e.so" "" + {dl4main.c} "dl4e" "dl4a.out"} + {"Run with libdl4f.so" + "tmpdir/libdl4f.so" "" + {dl4main.c} "dl4f" "dl4a.out"} + {"Run dl6a1 with --dynamic-list-data and dlopen on libdl6a.so" + "--dynamic-list-data -ldl" "" + {dl6amain.c} "dl6a1" "dl6a.out"} + {"Run dl6a2 with -Bsymbolic-functions and dlopen on libdl6a.so" + "-Bsymbolic-functions -ldl" "" + {dl6amain.c} "dl6a2" "dl6b.out"} + {"Run dl6a3 with -Bsymbolic and dlopen on libdl6a.so" + "-Bsymbolic -ldl" "" + {dl6amain.c} "dl6a3" "dl6b.out"} + {"Run dl6a4 with -Bsymbolic --dynamic-list-data and dlopen on libdl6a.so" + "-Bsymbolic --dynamic-list-data -ldl" "" + {dl6amain.c} "dl6a4" "dl6a.out"} + {"Run dl6a5 with -Bsymbolic-functions --dynamic-list-cpp-new and dlopen on libdl6a.so" + "-Bsymbolic-functions --dynamic-list-cpp-new -ldl" "" + {dl6amain.c} "dl6a5" "dl6b.out"} + {"Run dl6a6 with --dynamic-list-cpp-new -Bsymbolic-functions and dlopen on libdl6a.so" + "--dynamic-list-cpp-new -Bsymbolic-functions -ldl" "" + {dl6amain.c} "dl6a6" "dl6b.out"} + {"Run dl6a7 with --dynamic-list-data -Bsymbolic and dlopen on libdl6a.so" + "--dynamic-list-data -Bsymbolic -ldl" "" + {dl6amain.c} "dl6a7" "dl6a.out"} + {"Run dl6b1 with --dynamic-list-data and dlopen on libdl6b.so" + "--dynamic-list-data -ldl" "" + {dl6bmain.c} "dl6b1" "dl6a.out"} + {"Run dl6b2 with dlopen on libdl6b.so" + "-ldl" "" + {dl6bmain.c} "dl6b2" "dl6b.out"} + {"Run dl6c1 with --dynamic-list-data and dlopen on libdl6c.so" + "--dynamic-list-data -ldl" "" + {dl6cmain.c} "dl6c1" "dl6b.out"} + {"Run dl6d1 with --dynamic-list-data and dlopen on libdl6d.so" + "--dynamic-list-data -ldl" "" + {dl6dmain.c} "dl6d1" "dl6b.out"} + {"Run with libdata1.so" + "tmpdir/libdata1.so" "" + {dynbss1.c} "dynbss1" "pass.out"} +} + +run_cc_link_tests $build_tests +# NetBSD ELF systems do not currently support the .*_array sections. +run_ld_link_exec_tests [list "*-*-netbsdelf*"] $run_tests + +# Check if compiler works +if { [which $CXX] == 0 } { + return +} + +set build_cxx_tests { + {"Build libdl3a.so with --dynamic-list=dl3.list" + "-shared -Wl,--dynamic-list=dl3.list" "-fPIC" + {dl3.cc} {} "libdl3a.so" "c++"} + {"Build libdl3b.so with -Bsymbolic" + "-shared -Wl,-Bsymbolic" "-fPIC" + {dl3.cc} {} "libdl3b.so" "c++"} + {"Build libdl3a.so with --dynamic-list-cpp-typeinfo" + "-shared -Wl,--dynamic-list-cpp-typeinfo" "-fPIC" + {dl3.cc} {} "libdl3c.so" "c++"} + {"Build libdnew1a.so with --Bsymbolic-functions --dynamic-list-cpp-new" + "-shared -Wl,-Bsymbolic-functions,--dynamic-list-cpp-new" "-fPIC" + {del.cc new.cc} {} "libnew1a.so" "c++"} + {"Build libdnew1b.so with --dynamic-list-data --dynamic-list-cpp-new" + "-shared -Wl,--dynamic-list-data,--dynamic-list-cpp-new" "-fPIC" + {del.cc new.cc} {} "libnew1b.so" "c++"} +} + +set run_cxx_tests { + {"Run with libdl3a.so" + "tmpdir/libdl3a.so" "" + {dl3main.cc} "dl3a" "dl3a.out" "" "c++"} + {"Run with libdl3b.so" + "tmpdir/libdl3b.so" "" + {dl3main.cc} "dl3b" "dl3b.out" "" "c++"} + {"Run with libdl3c.so" + "tmpdir/libdl3c.so" "" + {dl3main.cc} "dl3c" "dl3a.out" "" "c++"} + {"Run with libnew1a.so" + "tmpdir/libnew1a.so" "" + {dl5.cc} "dl5a" "dl5.out" "" "c++"} + {"Run with libnew1b.so" + "tmpdir/libnew1b.so" "" + {dl5.cc} "dl5b" "dl5.out" "" "c++"} +} + +run_cc_link_tests $build_cxx_tests +run_ld_link_exec_tests [] $run_cxx_tests diff --git a/ld/testsuite/ld-elf/stab.d b/ld/testsuite/ld-elf/stab.d new file mode 100644 index 0000000000000..667623817d48d --- /dev/null +++ b/ld/testsuite/ld-elf/stab.d @@ -0,0 +1,11 @@ +#source: start.s +#as: -gstabs +#readelf: -S --wide +#ld: +#notarget: ia64-*-* + +#... + \[[0-9 ][0-9]\] \.stab +PROGBITS +0+ [0-9a-f]+ [0-9a-f]+ [0-9a-f]+ +[1-9]+ +0.* +#... + \[[0-9 ][0-9]\] \.stabstr +STRTAB +0+ [0-9a-f]+ [0-9a-f]+ 00 +0 +0.* +#... diff --git a/ld/testsuite/ld-elf/start.s b/ld/testsuite/ld-elf/start.s index 9cbf231a3abd5..d8655bef05cc7 100644 --- a/ld/testsuite/ld-elf/start.s +++ b/ld/testsuite/ld-elf/start.s @@ -1,10 +1,10 @@ .text + .global start /* Used by SH targets. */ +start: .global _start _start: .global __start __start: - .global start /* Used by SH targets. */ -start: .global main /* Used by HPPA targets. */ main: - .long 0 + .dc.a 0 diff --git a/ld/testsuite/ld-elf/symbol1ref.s b/ld/testsuite/ld-elf/symbol1ref.s index 582e6ba12b797..15725cb1da9f5 100644 --- a/ld/testsuite/ld-elf/symbol1ref.s +++ b/ld/testsuite/ld-elf/symbol1ref.s @@ -1,3 +1,3 @@ .text - .long symbol1 + .dc.a symbol1 diff --git a/ld/testsuite/ld-elf/symbol2ref.s b/ld/testsuite/ld-elf/symbol2ref.s new file mode 100644 index 0000000000000..d2710f9c9a800 --- /dev/null +++ b/ld/testsuite/ld-elf/symbol2ref.s @@ -0,0 +1,3 @@ + .text + .dc.a Foo + diff --git a/ld/testsuite/ld-elf/symbol2w.s b/ld/testsuite/ld-elf/symbol2w.s new file mode 100644 index 0000000000000..794a753c616e8 --- /dev/null +++ b/ld/testsuite/ld-elf/symbol2w.s @@ -0,0 +1,6 @@ + .section .gnu.warning,"a",%progbits + .global Foo + .type Foo, %object + .size Foo, 20 +Foo: + .string "function 'Foo' used" diff --git a/ld/testsuite/ld-elf/tbss1.s b/ld/testsuite/ld-elf/tbss1.s new file mode 100644 index 0000000000000..4f1631f2dc67b --- /dev/null +++ b/ld/testsuite/ld-elf/tbss1.s @@ -0,0 +1,24 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + .globl bss + .section .bss,"aw",%nobits + .p2align 12 + .type bss,%object + .size bss,4096 +bss: + .zero 4096 + .globl tbss + .section .tbss,"awT",%nobits + .p2align 12 + .type tbss,%object + .size tbss,4096 +tbss: + .zero 4096 diff --git a/ld/testsuite/ld-elf/tbss2.s b/ld/testsuite/ld-elf/tbss2.s new file mode 100644 index 0000000000000..b9809258e26c6 --- /dev/null +++ b/ld/testsuite/ld-elf/tbss2.s @@ -0,0 +1,16 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + .globl tbss + .section .tbss,"awT",%nobits + .type tbss,%object + .size tbss,1 +tbss: + .zero 1 diff --git a/ld/testsuite/ld-elf/tdata1.s b/ld/testsuite/ld-elf/tdata1.s new file mode 100644 index 0000000000000..6ea57b661f161 --- /dev/null +++ b/ld/testsuite/ld-elf/tdata1.s @@ -0,0 +1,24 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + .globl data + .section .data,"aw",%progbits + .p2align 4 + .type data,%object + .size data,4096 +data: + .zero 4096 + .globl tdata + .section .tdata,"awT",%progbits + .p2align 4 + .type tdata,%object + .size tdata,4096 +tdata: + .zero 4096 diff --git a/ld/testsuite/ld-elf/tdata2.s b/ld/testsuite/ld-elf/tdata2.s new file mode 100644 index 0000000000000..1da459f961928 --- /dev/null +++ b/ld/testsuite/ld-elf/tdata2.s @@ -0,0 +1,16 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + .globl tdata + .section .tdata,"awT",%progbits + .type tdata,%object + .size tdata,1 +tdata: + .byte 0 diff --git a/ld/testsuite/ld-elf/tls_common.exp b/ld/testsuite/ld-elf/tls_common.exp new file mode 100644 index 0000000000000..512689f167be4 --- /dev/null +++ b/ld/testsuite/ld-elf/tls_common.exp @@ -0,0 +1,70 @@ +# Expect script for .tls_common tests +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# +# Written by Jakub Jelinek (jakub@redhat.com) +# + +# Make sure that binutils can correctly handle ld output in ELF. + +# Run on Linux only. +if { ![istarget *-*-linux*] } { + return +} + +if { [istarget *-*-linux*aout*] + || [istarget *-*-linux*oldld*] } { + return +} + +global as +global ld +global READELF +global srcdir +global subdir +global link_output + +if { ![ld_assemble $as $srcdir/$subdir/tls_common.s tmpdir/tls_common.o ] } { + unresolved "tls_common" + return +} + +if { ![ld_simple_link $ld tmpdir/tls_common1.o "-r tmpdir/tls_common.o"] } { + fail "tls_common" + return +} + +if { ![ld_simple_link $ld tmpdir/tls_common "tmpdir/tls_common1.o"] } { + if { [string match "*not supported*" $link_output] + || [string match "*unrecognized option*" $link_output] } { + unsupported "$ld_options is not supported by this target" + } elseif { [string match "*Warning*alignment*of common symbol*" $link_output] } { + fail "tls_common" + } else { + unresolved "tls_common" + } + return +} + +send_log "$READELF -l --wide tmpdir/tls_common\n" +catch "exec $READELF -l --wide tmpdir/tls_common" readelf_output +if ![regexp ".*TLS.*0x0+ 0x0+4 R .*" $readelf_output] then { + send_log "$readelf_output\n" + fail "tls_common" + return +} + +pass "tls_common" diff --git a/ld/testsuite/ld-elf/tls_common.s b/ld/testsuite/ld-elf/tls_common.s new file mode 100644 index 0000000000000..502d8f3103a7d --- /dev/null +++ b/ld/testsuite/ld-elf/tls_common.s @@ -0,0 +1,11 @@ + .globl main + .globl start + .globl _start + .globl __start + .text +main: +start: +_start: +__start: + .byte 0 + .tls_common foo,4,4 diff --git a/ld/testsuite/ld-elf/warn.out b/ld/testsuite/ld-elf/warn.out new file mode 100644 index 0000000000000..ba836ce87915e --- /dev/null +++ b/ld/testsuite/ld-elf/warn.out @@ -0,0 +1,3 @@ +TEST2 +TEST2 +MAIN diff --git a/ld/testsuite/ld-elf/warn2.d b/ld/testsuite/ld-elf/warn2.d new file mode 100644 index 0000000000000..97d4f590d3f8a --- /dev/null +++ b/ld/testsuite/ld-elf/warn2.d @@ -0,0 +1,15 @@ +#source: start.s +#source: symbol2ref.s +#source: symbol2w.s +#ld: -T group.ld +#warning: ^[^\\n]*\.[obj]+: warning: function 'Foo' used$ +#readelf: -s +#notarget: "sparc64-*-solaris2*" "sparcv9-*-solaris2*" +#xfail: "arc-*-*" "d30v-*-*" "dlx-*-*" "i960-*-*" "or32-*-*" "pj-*-*" + +# Check that warnings are generated for the symbols in .gnu.warning +# construct and that the symbol still appears as expected. + +#... +[ ]+[0-9]+:[ ]+[0-9a-f]+[ ]+20[ ]+OBJECT[ ]+GLOBAL DEFAULT[ ]+[1-2] Foo +#pass diff --git a/ld/testsuite/ld-elf/wrap.exp b/ld/testsuite/ld-elf/wrap.exp new file mode 100644 index 0000000000000..5fd57ea7d6218 --- /dev/null +++ b/ld/testsuite/ld-elf/wrap.exp @@ -0,0 +1,54 @@ +# Expect script for wrap ELF tests. +# Copyright 2006 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# + +# Exclude non-ELF targets. + +if ![is_elf_format] { + return +} + +# The following tests require running the executable generated by ld. +if ![isnative] { + return +} + +# Check if compiler works +if { [which $CC] == 0 } { + return +} + +set build_tests { + {"Build libwrap1a.so" + "-shared" "-fPIC" + {wrap1a.c} {} "libwrap1a.so"} + {"Build libwrap1b.so" + "-shared tmpdir/libwrap1a.so" "-fPIC" + {wrap1b.c} {} "libwrap1b.so"} +} + +set run_tests { + {"Run with libwrap1a.so and libwrap1b.so" + "--wrap par tmpdir/libwrap1a.so tmpdir/libwrap1b.so" "" + {wrap1.c} "wrap1" "wrap1.out"} + {"Run with libwrap1b.so and libwrap1a.so" + "--wrap par tmpdir/libwrap1b.so tmpdir/libwrap1a.so" "" + {wrap1.c} "wrap1" "wrap1.out"} +} + +run_cc_link_tests $build_tests +run_ld_link_exec_tests [] $run_tests diff --git a/ld/testsuite/ld-elf/wrap1.c b/ld/testsuite/ld-elf/wrap1.c new file mode 100644 index 0000000000000..1ff250e2dba97 --- /dev/null +++ b/ld/testsuite/ld-elf/wrap1.c @@ -0,0 +1,8 @@ +extern void par (void); + +int +main (void) +{ + par (); + return 0; +} diff --git a/ld/testsuite/ld-elf/wrap1.out b/ld/testsuite/ld-elf/wrap1.out new file mode 100644 index 0000000000000..7c1938f43b613 --- /dev/null +++ b/ld/testsuite/ld-elf/wrap1.out @@ -0,0 +1,3 @@ +__wrap_par +__real_par +par diff --git a/ld/testsuite/ld-elf/wrap1a.c b/ld/testsuite/ld-elf/wrap1a.c new file mode 100644 index 0000000000000..75c94e00a4489 --- /dev/null +++ b/ld/testsuite/ld-elf/wrap1a.c @@ -0,0 +1,6 @@ +#include <stdio.h> + +void par (void) +{ + printf ("par\n"); +} diff --git a/ld/testsuite/ld-elf/wrap1b.c b/ld/testsuite/ld-elf/wrap1b.c new file mode 100644 index 0000000000000..abd39aa97158b --- /dev/null +++ b/ld/testsuite/ld-elf/wrap1b.c @@ -0,0 +1,16 @@ +#include <stdio.h> + +extern void par (void); + +void __real_par (void) +{ + printf ("__real_par \n"); + par (); +} + +void +__wrap_par (void) +{ + printf ("__wrap_par \n"); + __real_par (); +} diff --git a/ld/testsuite/ld-elfcomm/elfcomm.exp b/ld/testsuite/ld-elfcomm/elfcomm.exp index 5b3db4986b7da..84a68edbae74a 100644 --- a/ld/testsuite/ld-elfcomm/elfcomm.exp +++ b/ld/testsuite/ld-elfcomm/elfcomm.exp @@ -1,5 +1,5 @@ # Expect script for common symbol tests -# Copyright 2003, 2005 Free Software Foundation, Inc. +# Copyright 2003, 2005, 2006 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -38,6 +38,13 @@ if { [which $CC] == 0 } { untested $test1c2 return } +if { [istarget score-*-*] } { + untested $test1w1 + untested $test1w2 + untested $test1c1 + untested $test1c2 + return +} proc dump_common1 { testname } { global exec_output @@ -45,7 +52,7 @@ proc dump_common1 { testname } { send_log "$READELF -s tmpdir/common1.o | grep foo\n" catch "exec $READELF -s tmpdir/common1.o | grep foo" exec_output - if { ![regexp "(\[ \]*)(\[0-9\]+):(\[ \]*)(\[0\]*)80(\[ \]+)4(\[ \]+)OBJECT(\[ \]+)GLOBAL(\[ \]+)DEFAULT(\[ \]+)(PRC\\\[0xff03\\\]|COM)(\[ \]+)_?foo2" $exec_output] + if { ![regexp "(\[ \]*)(\[0-9\]+):(\[ \]*)(\[0\]*)80(\[ \]+)4(\[ \]+)OBJECT(\[ \]+)GLOBAL(\[ \]+)DEFAULT(\[ \]+)(PRC\\\[0xff03\\\]|COM|SCOM)(\[ \]+)_?foo2" $exec_output] || ![regexp "(\[ \]*)(\[0-9\]+):(\[ \]*)(\[0-9\]+)(\[ \]+)21(\[ \]+)OBJECT(\[ \]+)GLOBAL(\[ \]+)DEFAULT(\[ \]+)(\[0-9\]+)(\[ \]+)_?foo1" $exec_output] } { send_log "$exec_output\n" verbose $exec_output @@ -70,17 +77,22 @@ if { [ld_simple_link $ld tmpdir/common1.o "-r tmpdir/common1a.o tmpdir/common1b. return } -if { ![regexp "Warning: alignment (\[0-9\]+) of symbol \`_?foo1\' in tmpdir/common1b.o is smaller than 64 in tmpdir/common1a.o" $link_output] - || ![regexp "Warning: size of symbol \`_?foo1\' changed from 2 in tmpdir/common1a.o to 21 in tmpdir/common1b.o" $link_output] } { - if { [istarget mips*-*-*] } { - # This test fails on MIPS because the backend sets type_change_ok. The - # size change warning is suppressed. - xfail $test1w1 +# This test fails on MIPS because the backend sets type_change_ok. +# The size change warning is suppressed. +if {[istarget mips*-*-*]} { + if { ![regexp "Warning: alignment (\[0-9\]+) of symbol \`_?foo1\' in tmpdir/common1b.o is smaller than 64 in tmpdir/common1a.o" $link_output] } { + fail $test1w1 } else { - fail $test1w1 + pass $test1w1 } } else { pass $test1w1 + if { ![regexp "Warning: alignment (\[0-9\]+) of symbol \`_?foo1\' in tmpdir/common1b.o is smaller than 64 in tmpdir/common1a.o" $link_output] + || ![regexp "Warning: size of symbol \`_?foo1\' changed from 2 in tmpdir/common1a.o to 21 in tmpdir/common1b.o" $link_output] } { + fail $test1w1 + } else { + pass $test1w1 + } } if { [dump_common1 $test1c1] } { diff --git a/ld/testsuite/ld-elfvers/vers.exp b/ld/testsuite/ld-elfvers/vers.exp index 6bb77a7c26745..d8ba1b8819856 100644 --- a/ld/testsuite/ld-elfvers/vers.exp +++ b/ld/testsuite/ld-elfvers/vers.exp @@ -460,44 +460,33 @@ proc objdump_versionstuff { objdump object expectfile } { # It's OK if there are extra lines in the actual output; they # may come from version information in libc. We require that - # every line in EXPECTFILE appear in the output in order. + # every line in EXPECTFILE appear in the output in any order. - set f1 [open $tmpdir/objdump.out r] set f2 [open $expectfile r] while { [gets $f2 l2] != -1 } { if { ![regexp "^#.*$" $l2] } then { - break - } - } - while { [gets $f1 l1] != -1 } { - if { [string match $l2 $l1] } then { - if { [gets $f2 l2] == -1 } then { + set f1 [open $tmpdir/objdump.out r] + while { [gets $f1 l1] != -1 } { + if { [string match $l2 $l1] } then { + break + } + } + close $f1 + + if { ![string match $l2 $l1] } then { + verbose -log "Did not find \"$l2\"" + set f1 [open $tmpdir/objdump.out r] + while { [gets $f1 l1] != -1 } { + verbose -log $l1 + } close $f1 close $f2 - return 1 + return 0 } } } - - # We reached the end of the output without seeing the line we - # expected. This is a test failure. - - close $f1 close $f2 - - # Support empty expected file. - if [string match "" $l2] then { - return 1 - } - - verbose -log "Did not find \"$l2\"" - set f1 [open $tmpdir/objdump.out r] - while { [gets $f1 l1] != -1 } { - verbose -log $l1 - } - - verbose -log "$exec_output" - return 0 + return 1 } else { verbose -log "$exec_output" return 0 diff --git a/ld/testsuite/ld-elfvers/vers1.ver b/ld/testsuite/ld-elfvers/vers1.ver index ace685da1794c..a42b970d49661 100644 --- a/ld/testsuite/ld-elfvers/vers1.ver +++ b/ld/testsuite/ld-elfvers/vers1.ver @@ -1,8 +1,8 @@ Version definitions: -1 0x01 0x0c96425f vers1.so -2 0x00 0x0a7927b1 VERS_1.1 -3 0x00 0x0a7927b2 VERS_1.2 +[1-4] 0x01 0x0c96425f vers1.so +[1-4] 0x00 0x0a7927b1 VERS_1.1 +[1-4] 0x00 0x0a7927b2 VERS_1.2 VERS_1.1 -4 0x00 0x0a7922b0 VERS_2.0 +[1-4] 0x00 0x0a7922b0 VERS_2.0 VERS_1.2 diff --git a/ld/testsuite/ld-elfvers/vers15.ver b/ld/testsuite/ld-elfvers/vers15.ver index f60021e068ec3..3f960fd07e961 100644 --- a/ld/testsuite/ld-elfvers/vers15.ver +++ b/ld/testsuite/ld-elfvers/vers15.ver @@ -1,5 +1,5 @@ Version definitions: -1 0x01 0x07cc9645 vers15 -2 0x00 0x0a7927b2 VERS_1.2 -3 0x00 0x0a7927b1 VERS_1.1 +[1-3] 0x01 0x07cc9645 vers15 +[1-3] 0x00 0x0a7927b1 VERS_1.1 +[1-3] 0x00 0x0a7927b2 VERS_1.2 diff --git a/ld/testsuite/ld-elfvers/vers16a.ver b/ld/testsuite/ld-elfvers/vers16a.ver index 5b6063b1000f0..7b5006784784b 100644 --- a/ld/testsuite/ld-elfvers/vers16a.ver +++ b/ld/testsuite/ld-elfvers/vers16a.ver @@ -1,3 +1,3 @@ Version definitions: -1 0x01 0x064c090f vers16a.so -2 0x00 0x0a7927b1 VERS_1.1 +[1-2] 0x01 0x064c090f vers16a.so +[1-2] 0x00 0x0a7927b1 VERS_1.1 diff --git a/ld/testsuite/ld-elfvers/vers17.ver b/ld/testsuite/ld-elfvers/vers17.ver index 0dad2a6dcca26..b234c9b486d27 100644 --- a/ld/testsuite/ld-elfvers/vers17.ver +++ b/ld/testsuite/ld-elfvers/vers17.ver @@ -1,3 +1,3 @@ Version definitions: -1 0x01 0x0964f95f vers17.so -2 0x00 0x0a7922b0 VERS_2.0 +[1-2] 0x01 0x0964f95f vers17.so +[1-2] 0x00 0x0a7922b0 VERS_2.0 diff --git a/ld/testsuite/ld-elfvers/vers18.ver b/ld/testsuite/ld-elfvers/vers18.ver index c6b14e8f9ab31..c6023de064740 100644 --- a/ld/testsuite/ld-elfvers/vers18.ver +++ b/ld/testsuite/ld-elfvers/vers18.ver @@ -1,7 +1,7 @@ Version definitions: -1 0x01 0x0964e95f vers18.so -2 0x00 0x0a7927b1 VERS_1.1 -3 0x00 0x0a7927b2 VERS_1.2 +[1-4] 0x01 0x0964e95f vers18.so +[1-4] 0x00 0x0a7927b1 VERS_1.1 +[1-4] 0x00 0x0a7927b2 VERS_1.2 VERS_1.1 -4 0x00 0x0a7922b0 VERS_2.0 +[1-4] 0x00 0x0a7922b0 VERS_2.0 VERS_1.2 diff --git a/ld/testsuite/ld-elfvers/vers2.ver b/ld/testsuite/ld-elfvers/vers2.ver index 4ca81eb3a63a5..ea992fff1cf62 100644 --- a/ld/testsuite/ld-elfvers/vers2.ver +++ b/ld/testsuite/ld-elfvers/vers2.ver @@ -1,6 +1,6 @@ Version definitions: -1 0x01 0x0c96525f vers2.so -2 0x00 0x08785b51 VERS_XXX_1.1 +[1-2] 0x01 0x0c96525f vers2.so +[1-2] 0x00 0x08785b51 VERS_XXX_1.1 Version References: required from tmpdir/vers1.so: diff --git a/ld/testsuite/ld-elfvers/vers20.ver b/ld/testsuite/ld-elfvers/vers20.ver index afeb137472baf..133914770f154 100644 --- a/ld/testsuite/ld-elfvers/vers20.ver +++ b/ld/testsuite/ld-elfvers/vers20.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0965695f vers20.so -2 0x00 0x0a7927b1 VERS_1.1 +[1-2] 0x01 0x0965695f vers20.so +[1-2] 0x00 0x0a7927b1 VERS_1.1 diff --git a/ld/testsuite/ld-elfvers/vers20a.ver b/ld/testsuite/ld-elfvers/vers20a.ver index 2592f02394de3..c7e11fbdd677c 100644 --- a/ld/testsuite/ld-elfvers/vers20a.ver +++ b/ld/testsuite/ld-elfvers/vers20a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0652090f vers20a.so -2 0x00 0x0a7927b1 VERS_1.1 +[1-2] 0x01 0x0652090f vers20a.so +[1-2] 0x00 0x0a7927b1 VERS_1.1 diff --git a/ld/testsuite/ld-elfvers/vers21.ver b/ld/testsuite/ld-elfvers/vers21.ver index 3ba24d8017294..76e4a521cfd0a 100644 --- a/ld/testsuite/ld-elfvers/vers21.ver +++ b/ld/testsuite/ld-elfvers/vers21.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0965595f vers21.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x0965595f vers21.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers22a.ver b/ld/testsuite/ld-elfvers/vers22a.ver index bb4d3bf0c9785..b7e1f62d4d421 100644 --- a/ld/testsuite/ld-elfvers/vers22a.ver +++ b/ld/testsuite/ld-elfvers/vers22a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0660090f vers22a.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x0660090f vers22a.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers22b.ver b/ld/testsuite/ld-elfvers/vers22b.ver index b1c834b4f80af..b20f6366c33db 100644 --- a/ld/testsuite/ld-elfvers/vers22b.ver +++ b/ld/testsuite/ld-elfvers/vers22b.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065f990f vers22b.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065f990f vers22b.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers23a.ver b/ld/testsuite/ld-elfvers/vers23a.ver index 9132d2db2e525..3f3e3c0adb3d8 100644 --- a/ld/testsuite/ld-elfvers/vers23a.ver +++ b/ld/testsuite/ld-elfvers/vers23a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065f090f vers23a.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065f090f vers23a.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers23b.ver b/ld/testsuite/ld-elfvers/vers23b.ver index 629d2bc1cf87a..4e3edb3c69f7c 100644 --- a/ld/testsuite/ld-elfvers/vers23b.ver +++ b/ld/testsuite/ld-elfvers/vers23b.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065e990f vers23b.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065e990f vers23b.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers23c.ver b/ld/testsuite/ld-elfvers/vers23c.ver index 73d771659c152..1fc69e8e4f2d1 100644 --- a/ld/testsuite/ld-elfvers/vers23c.ver +++ b/ld/testsuite/ld-elfvers/vers23c.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065ea90f vers23c.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065ea90f vers23c.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers25a.ver b/ld/testsuite/ld-elfvers/vers25a.ver index 81a71603f8179..df3aad0196094 100644 --- a/ld/testsuite/ld-elfvers/vers25a.ver +++ b/ld/testsuite/ld-elfvers/vers25a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065d090f vers25a.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065d090f vers25a.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers26a.ver b/ld/testsuite/ld-elfvers/vers26a.ver index 3e67ef1a337cc..54626580099bd 100644 --- a/ld/testsuite/ld-elfvers/vers26a.ver +++ b/ld/testsuite/ld-elfvers/vers26a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065c090f vers26a.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065c090f vers26a.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers27a.ver b/ld/testsuite/ld-elfvers/vers27a.ver index 06d85e644ef5c..634f1f0a134ed 100644 --- a/ld/testsuite/ld-elfvers/vers27a.ver +++ b/ld/testsuite/ld-elfvers/vers27a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x065b090f vers27a.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x065b090f vers27a.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers27d.ver b/ld/testsuite/ld-elfvers/vers27d.ver index 672c7ad200558..8343f3ae9fcec 100644 --- a/ld/testsuite/ld-elfvers/vers27d.ver +++ b/ld/testsuite/ld-elfvers/vers27d.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x05ac0cff vers27d1.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x05ac0cff vers27d1.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers28b.ver b/ld/testsuite/ld-elfvers/vers28b.ver index ab99615100aeb..b826c539b4bd5 100644 --- a/ld/testsuite/ld-elfvers/vers28b.ver +++ b/ld/testsuite/ld-elfvers/vers28b.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0659990f vers28b.so -2 0x00 0x05aa7610 VERS.0 +[1-2] 0x01 0x0659990f vers28b.so +[1-2] 0x00 0x05aa7610 VERS.0 diff --git a/ld/testsuite/ld-elfvers/vers29.ver b/ld/testsuite/ld-elfvers/vers29.ver index 85c05a852841b..5e73fab0b480c 100644 --- a/ld/testsuite/ld-elfvers/vers29.ver +++ b/ld/testsuite/ld-elfvers/vers29.ver @@ -1,3 +1,3 @@ Version definitions: -1 0x01 0x0965d95f vers29.so -2 0x00 0x0965d95f vers29.so +[1-2] 0x01 0x0965d95f vers29.so +[1-2] 0x00 0x0965d95f vers29.so diff --git a/ld/testsuite/ld-elfvers/vers30.ver b/ld/testsuite/ld-elfvers/vers30.ver index dfcf0dac7006e..e0968b964454f 100644 --- a/ld/testsuite/ld-elfvers/vers30.ver +++ b/ld/testsuite/ld-elfvers/vers30.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x0966695f vers30.so -2 0x00 0x079239b0 VERS_30.0 +[1-2] 0x01 0x0966695f vers30.so +[1-2] 0x00 0x079239b0 VERS_30.0 diff --git a/ld/testsuite/ld-elfvers/vers31.ver b/ld/testsuite/ld-elfvers/vers31.ver index b79a5ab9d499f..c1a0ed495fe35 100644 --- a/ld/testsuite/ld-elfvers/vers31.ver +++ b/ld/testsuite/ld-elfvers/vers31.ver @@ -1,3 +1,3 @@ Version definitions: -1 0x01 0x0966595f vers31.so -2 0x00 0x07923ab0 VERS_31.0 +[1-2] 0x01 0x0966595f vers31.so +[1-2] 0x00 0x07923ab0 VERS_31.0 diff --git a/ld/testsuite/ld-elfvers/vers4a.ver b/ld/testsuite/ld-elfvers/vers4a.ver index 41ee241e2c4f5..1f02b9dc2ae1c 100644 --- a/ld/testsuite/ld-elfvers/vers4a.ver +++ b/ld/testsuite/ld-elfvers/vers4a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x07cc96a1 vers4a -2 0x00 0x0a7922b0 VERS_2.0 +[1-2] 0x01 0x07cc96a1 vers4a +[1-2] 0x00 0x0a7922b0 VERS_2.0 diff --git a/ld/testsuite/ld-elfvers/vers7a.ver b/ld/testsuite/ld-elfvers/vers7a.ver index 7b3bf0a973db8..eeac5c5f3af2a 100644 --- a/ld/testsuite/ld-elfvers/vers7a.ver +++ b/ld/testsuite/ld-elfvers/vers7a.ver @@ -1,4 +1,4 @@ Version definitions: -1 0x01 0x096d595f vers7a.so -2 0x00 0x05aa7921 VERS_1 +[1-2] 0x01 0x096d595f vers7a.so +[1-2] 0x00 0x05aa7921 VERS_1 diff --git a/ld/testsuite/ld-elfvers/vers8.ver b/ld/testsuite/ld-elfvers/vers8.ver index a4b5296ffde25..47996c9baec14 100644 --- a/ld/testsuite/ld-elfvers/vers8.ver +++ b/ld/testsuite/ld-elfvers/vers8.ver @@ -1,8 +1,8 @@ Version definitions: -1 0x01 0x0c96b25f vers8.so -2 0x00 0x0a7927b1 VERS_1.1 -3 0x00 0x0a7927b2 VERS_1.2 +[1-4] 0x01 0x0c96b25f vers8.so +[1-4] 0x00 0x0a7927b1 VERS_1.1 +[1-4] 0x00 0x0a7927b2 VERS_1.2 VERS_1.1 -4 0x00 0x0a7922b0 VERS_2.0 +[1-4] 0x00 0x0a7922b0 VERS_2.0 VERS_1.2 diff --git a/ld/testsuite/ld-elfvers/vers9.ver b/ld/testsuite/ld-elfvers/vers9.ver index cc7369124c8b3..fce267c34d0d0 100644 --- a/ld/testsuite/ld-elfvers/vers9.ver +++ b/ld/testsuite/ld-elfvers/vers9.ver @@ -1,5 +1,5 @@ Version definitions: -1 0x01 0x007cc969 vers9 -2 0x00 0x0a7927b1 VERS_1.1 -3 0x00 0x0a7927b2 VERS_1.2 +[1-3] 0x01 0x007cc969 vers9 +[1-3] 0x00 0x0a7927b1 VERS_1.1 +[1-3] 0x00 0x0a7927b2 VERS_1.2 diff --git a/ld/testsuite/ld-elfvsb/elfvsb.exp b/ld/testsuite/ld-elfvsb/elfvsb.exp index 41834f158bda1..7976b9c5a1d5a 100644 --- a/ld/testsuite/ld-elfvsb/elfvsb.exp +++ b/ld/testsuite/ld-elfvsb/elfvsb.exp @@ -315,8 +315,8 @@ proc visibility_run {visibility} { # Now compile the code using -fpic. - if { ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/sh1.c $tmpdir/sh1p.o] - || ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/sh2.c $tmpdir/sh2p.o] } { + if { ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG -DSHARED $picflag" $srcdir/$subdir/sh1.c $tmpdir/sh1p.o] + || ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG -DSHARED $picflag" $srcdir/$subdir/sh2.c $tmpdir/sh2p.o] } { unresolved "visibility ($visibility)" } else { if { [ string match $visibility "protected" ] @@ -337,7 +337,7 @@ proc visibility_run {visibility} { } # Now do the same tests again, but this time compile main.c PIC. - if ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG $picflag" $srcdir/$subdir/main.c $tmpdir/mainp.o] { + if ![ld_compile "$CC -g $CFLAGS $SHCFLAG $VSBCFLAG -DSHARED $picflag" $srcdir/$subdir/main.c $tmpdir/mainp.o] { unresolved "visibility ($visibility) (PIC main, non PIC so)" unresolved "visibility ($visibility) (PIC main)" } else { @@ -446,7 +446,7 @@ if { ![ld_compile "$CC -g $CFLAGS" $srcdir/$subdir/common.c tmpdir/common.o] } { if { ![ld_compile "$CC -g $CFLAGS" $srcdir/$subdir/test.c tmpdir/test.o] } { unresolved "weak hidden symbol" } else { - if { ![ld_compile "$CC -g $CFLAGS $picflag" $srcdir/$subdir/sh3.c tmpdir/sh3.o] } { + if { ![ld_compile "$CC -g $CFLAGS -DSHARED $picflag" $srcdir/$subdir/sh3.c tmpdir/sh3.o] } { unresolved "weak hidden symbol" } else { if ![ld_simple_link $ld tmpdir/sh3.so "-shared tmpdir/sh3.o"] { diff --git a/ld/testsuite/ld-elfvsb/sh1.c b/ld/testsuite/ld-elfvsb/sh1.c index 8d9fcdbdcb33a..b2754249af70e 100644 --- a/ld/testsuite/ld-elfvsb/sh1.c +++ b/ld/testsuite/ld-elfvsb/sh1.c @@ -13,7 +13,15 @@ extern int mainvar; /* This variable is defined in the shared library, and overridden by the main program. */ #ifndef XCOFF_TEST +#ifdef SHARED +/* SHARED is defined if we are compiling with -fpic/-fPIC. */ int overriddenvar = -1; +#else +/* Without -fpic, newer versions of gcc assume that we are not + compiling for a shared library, and thus that overriddenvar is + local. */ +extern int overriddenvar; +#endif #endif /* This variable is defined in the shared library. */ @@ -76,12 +84,14 @@ shlib_shlibcall2 () return shlib_overriddencall2 (); } +#ifdef SHARED int shlib_overriddencall2 () { return 7; } #endif +#endif /* This function calls a function defined by the main program. */ @@ -385,7 +395,11 @@ shlib_visibility_checkweak () #endif #ifdef PROTECTED_TEST +#ifdef SHARED int shared_data = 100; +#else +extern int shared_data; +#endif int * shared_data_p () diff --git a/ld/testsuite/ld-elfvsb/sh2.c b/ld/testsuite/ld-elfvsb/sh2.c index ef6b2f16f61a7..e9a9687bcce5d 100644 --- a/ld/testsuite/ld-elfvsb/sh2.c +++ b/ld/testsuite/ld-elfvsb/sh2.c @@ -44,3 +44,18 @@ visibility_func_weak () return 2; } #endif + +#ifndef SHARED +# ifndef XCOFF_TEST +int overriddenvar = -1; + +int +shlib_overriddencall2 () +{ + return 7; +} +# endif +# ifdef PROTECTED_TEST +int shared_data = 100; +# endif +#endif diff --git a/ld/testsuite/ld-fastcall/fastcall.exp b/ld/testsuite/ld-fastcall/fastcall.exp index 5f2e87e5914a1..66ad72e93f5d0 100644 --- a/ld/testsuite/ld-fastcall/fastcall.exp +++ b/ld/testsuite/ld-fastcall/fastcall.exp @@ -1,5 +1,5 @@ # Test that the linker can handle fastcall symbols correctly. -# Copyright 2002 Free Software Foundation, Inc. +# Copyright 2002, 2006 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -17,13 +17,14 @@ set testname "ld (fastcall symbols)" -if {![istarget "i*86-*-*"]} { +if {![istarget "i*86-*-*"] && ![istarget "x86_64-*-mingw*"] } { return } if { !([istarget "i*86-*-*pe*"] && ![istarget "i*86-*-opensd*"]) \ && ![istarget "i*86-*-cygwin*"] \ - && ![istarget "i*86-*-mingw32*"] } { + && ![istarget "x86_64-*-mingw*"] \ + && ![istarget "i*86-*-mingw*"] } { return } diff --git a/ld/testsuite/ld-frv/fdpic-shared-6.d b/ld/testsuite/ld-frv/fdpic-shared-6.d index aefa4d292cd70..06a335f9d9902 100644 --- a/ld/testsuite/ld-frv/fdpic-shared-6.d +++ b/ld/testsuite/ld-frv/fdpic-shared-6.d @@ -49,18 +49,18 @@ Disassembly of section \.dat[0-9a-f ]+: Disassembly of section \.got: [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: -[0-9a-f ]+: 00 00 03 98 sdiv\.p gr0,gr24,gr0 +[0-9a-f ]+: 00 00 03 60 .* [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9 -[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 -[0-9a-f ]+: 00 00 03 90 sdiv\.p gr0,gr16,gr0 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 03 58 .* [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF8 -[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 -[0-9a-f ]+: 00 00 03 88 sdiv\.p gr0,gr8,gr0 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 03 50 .* [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF0 -[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 -[0-9a-f ]+: 00 00 03 80 sdiv\.p gr0,gr0,gr0 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 03 48 .* [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF7 -[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+: 00 00 00 00 .* [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: \.\.\. diff --git a/ld/testsuite/ld-frv/tls-dynamic-1.d b/ld/testsuite/ld-frv/tls-dynamic-1.d index a3790c9911031..b95505e8b1969 100644 --- a/ld/testsuite/ld-frv/tls-dynamic-1.d +++ b/ld/testsuite/ld-frv/tls-dynamic-1.d @@ -62,7 +62,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: ff ff f8 20 cop2 -32,cpr63,cpr32,cpr63 [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 diff --git a/ld/testsuite/ld-frv/tls-dynamic-2.d b/ld/testsuite/ld-frv/tls-dynamic-2.d index 647073198e475..07bf332f59aea 100644 --- a/ld/testsuite/ld-frv/tls-dynamic-2.d +++ b/ld/testsuite/ld-frv/tls-dynamic-2.d @@ -155,7 +155,7 @@ Disassembly of section \.text: [0-9a-f ]+: 80 88 00 00 nop Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x60>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: [0-9a-f ]+: 00 01 02 c0 .* [0-9a-f ]+: 00 00 08 21 .* [0-9a-f ]+: 00 01 02 c0 .* diff --git a/ld/testsuite/ld-frv/tls-dynamic-3.d b/ld/testsuite/ld-frv/tls-dynamic-3.d index 35be3a929b900..c9750d27ed16a 100644 --- a/ld/testsuite/ld-frv/tls-dynamic-3.d +++ b/ld/testsuite/ld-frv/tls-dynamic-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-initial-shared-2.d b/ld/testsuite/ld-frv/tls-initial-shared-2.d index e221bec945168..e4ea6a1818337 100644 --- a/ld/testsuite/ld-frv/tls-initial-shared-2.d +++ b/ld/testsuite/ld-frv/tls-initial-shared-2.d @@ -149,7 +149,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 5c ldi @\(gr15,92\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x20)>: [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss [0-9a-f ]+: 00 00 10 11 add\.p sp,gr17,gr0 diff --git a/ld/testsuite/ld-frv/tls-pie-1.d b/ld/testsuite/ld-frv/tls-pie-1.d index 11654fcdcedac..0ced90a5b392c 100644 --- a/ld/testsuite/ld-frv/tls-pie-1.d +++ b/ld/testsuite/ld-frv/tls-pie-1.d @@ -62,7 +62,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: ff ff f8 20 cop2 -32,cpr63,cpr32,cpr63 [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 diff --git a/ld/testsuite/ld-frv/tls-pie-3.d b/ld/testsuite/ld-frv/tls-pie-3.d index 4783ce023775f..4dc3469eb11c8 100644 --- a/ld/testsuite/ld-frv/tls-pie-3.d +++ b/ld/testsuite/ld-frv/tls-pie-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-relax-dynamic-1.d b/ld/testsuite/ld-frv/tls-relax-dynamic-1.d index 7075a288a5c5d..3d7ec36596c05 100644 --- a/ld/testsuite/ld-frv/tls-relax-dynamic-1.d +++ b/ld/testsuite/ld-frv/tls-relax-dynamic-1.d @@ -62,6 +62,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF x diff --git a/ld/testsuite/ld-frv/tls-relax-dynamic-2.d b/ld/testsuite/ld-frv/tls-relax-dynamic-2.d index 84f322cd3660f..59577d31ee53d 100644 --- a/ld/testsuite/ld-frv/tls-relax-dynamic-2.d +++ b/ld/testsuite/ld-frv/tls-relax-dynamic-2.d @@ -124,7 +124,7 @@ Disassembly of section \.text: [0-9a-f ]+: 80 88 00 00 nop Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: 00 00 00 03 add\.p gr0,gr3,gr0 [0-9a-f ]+: R_FRV_TLSOFF x diff --git a/ld/testsuite/ld-frv/tls-relax-dynamic-3.d b/ld/testsuite/ld-frv/tls-relax-dynamic-3.d index 6aa4fc7ea6db1..43cbdc72b0afd 100644 --- a/ld/testsuite/ld-frv/tls-relax-dynamic-3.d +++ b/ld/testsuite/ld-frv/tls-relax-dynamic-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-relax-initial-shared-2.d b/ld/testsuite/ld-frv/tls-relax-initial-shared-2.d index 64ae61f0ddf9f..824cf659543ee 100644 --- a/ld/testsuite/ld-frv/tls-relax-initial-shared-2.d +++ b/ld/testsuite/ld-frv/tls-relax-initial-shared-2.d @@ -138,7 +138,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: 00 00 10 11 add\.p sp,gr17,gr0 [0-9a-f ]+: R_FRV_TLSOFF \.tbss diff --git a/ld/testsuite/ld-frv/tls-relax-pie-1.d b/ld/testsuite/ld-frv/tls-relax-pie-1.d index cc114430dab0f..579047ee61f20 100644 --- a/ld/testsuite/ld-frv/tls-relax-pie-1.d +++ b/ld/testsuite/ld-frv/tls-relax-pie-1.d @@ -62,6 +62,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF x diff --git a/ld/testsuite/ld-frv/tls-relax-pie-3.d b/ld/testsuite/ld-frv/tls-relax-pie-3.d index 4bc52917e12d1..da26ca0c19295 100644 --- a/ld/testsuite/ld-frv/tls-relax-pie-3.d +++ b/ld/testsuite/ld-frv/tls-relax-pie-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-relax-shared-1.d b/ld/testsuite/ld-frv/tls-relax-shared-1.d index 35d5c6775f5e5..ba3b5322101f1 100644 --- a/ld/testsuite/ld-frv/tls-relax-shared-1.d +++ b/ld/testsuite/ld-frv/tls-relax-shared-1.d @@ -62,7 +62,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 18 ldi @\(gr15,24\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 [0-9a-f ]+: R_FRV_TLSOFF \.tbss diff --git a/ld/testsuite/ld-frv/tls-relax-shared-2.d b/ld/testsuite/ld-frv/tls-relax-shared-2.d index e7ac840ff9fc3..c07bb35abb3c8 100644 --- a/ld/testsuite/ld-frv/tls-relax-shared-2.d +++ b/ld/testsuite/ld-frv/tls-relax-shared-2.d @@ -151,7 +151,7 @@ Disassembly of section \.text: [0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\) Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x60>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss [0-9a-f ]+: 00 00 17 f3 \*unknown\* diff --git a/ld/testsuite/ld-frv/tls-relax-shared-3.d b/ld/testsuite/ld-frv/tls-relax-shared-3.d index 48909d51fbe50..b766a005f7a12 100644 --- a/ld/testsuite/ld-frv/tls-relax-shared-3.d +++ b/ld/testsuite/ld-frv/tls-relax-shared-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-relax-static-3.d b/ld/testsuite/ld-frv/tls-relax-static-3.d index f4ce45f91d3c0..ed3c07a00f995 100644 --- a/ld/testsuite/ld-frv/tls-relax-static-3.d +++ b/ld/testsuite/ld-frv/tls-relax-static-3.d @@ -22,5 +22,5 @@ Disassembly of section \.text: 100c0: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -000140c8 <_GLOBAL_OFFSET_TABLE_>: +000140c8 <(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. diff --git a/ld/testsuite/ld-frv/tls-shared-1.d b/ld/testsuite/ld-frv/tls-shared-1.d index 03fe411c92b46..2a29ba571bc47 100644 --- a/ld/testsuite/ld-frv/tls-shared-1.d +++ b/ld/testsuite/ld-frv/tls-shared-1.d @@ -62,7 +62,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 18 ldi @\(gr15,24\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 [0-9a-f ]+: R_FRV_TLSOFF \.tbss diff --git a/ld/testsuite/ld-frv/tls-shared-2.d b/ld/testsuite/ld-frv/tls-shared-2.d index b622ad4853261..bd92cdb951f8d 100644 --- a/ld/testsuite/ld-frv/tls-shared-2.d +++ b/ld/testsuite/ld-frv/tls-shared-2.d @@ -151,7 +151,7 @@ Disassembly of section \.text: [0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\) Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x60>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss [0-9a-f ]+: 00 00 17 f3 \*unknown\* diff --git a/ld/testsuite/ld-frv/tls-shared-3.d b/ld/testsuite/ld-frv/tls-shared-3.d index dc2d69344b91c..c4eed38035b7c 100644 --- a/ld/testsuite/ld-frv/tls-shared-3.d +++ b/ld/testsuite/ld-frv/tls-shared-3.d @@ -22,6 +22,6 @@ Disassembly of section \.text: [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: R_FRV_TLSOFF u diff --git a/ld/testsuite/ld-frv/tls-static-1.d b/ld/testsuite/ld-frv/tls-static-1.d index 0eeb21d6d48c9..d33d8cf99f7a8 100644 --- a/ld/testsuite/ld-frv/tls-static-1.d +++ b/ld/testsuite/ld-frv/tls-static-1.d @@ -62,7 +62,7 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. [0-9a-f ]+: ff ff f8 30 cop2 -32,cpr63,cpr48,cpr63 [0-9a-f ]+: ff ff f8 10 cop2 -32,cpr63,cpr16,cpr63 diff --git a/ld/testsuite/ld-frv/tls-static-3.d b/ld/testsuite/ld-frv/tls-static-3.d index 7a6bea980aa90..e761cc8f856da 100644 --- a/ld/testsuite/ld-frv/tls-static-3.d +++ b/ld/testsuite/ld-frv/tls-static-3.d @@ -22,5 +22,5 @@ Disassembly of section \.text: [0-9a-f ]+: 92 fc 00 00 setlos lo\(0x0\),gr9 Disassembly of section \.got: -[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_)>: \.\.\. diff --git a/ld/testsuite/ld-i386/alloc.d b/ld/testsuite/ld-i386/alloc.d new file mode 100644 index 0000000000000..c2b22f2e00469 --- /dev/null +++ b/ld/testsuite/ld-i386/alloc.d @@ -0,0 +1,4 @@ +#name: Invalid allocated section +#as: --32 +#ld: -melf_i386 -T alloc.t +#error: .*section `.foo' can't be allocated in segment 0.* diff --git a/ld/testsuite/ld-i386/alloc.s b/ld/testsuite/ld-i386/alloc.s new file mode 100644 index 0000000000000..8c4f8fa1961c8 --- /dev/null +++ b/ld/testsuite/ld-i386/alloc.s @@ -0,0 +1,6 @@ + .section .bar,"ax","progbits" + .byte 0 + .section .foo,"aw","progbits" + .byte 0 + .bss + .long 0 diff --git a/ld/testsuite/ld-i386/alloc.t b/ld/testsuite/ld-i386/alloc.t new file mode 100644 index 0000000000000..ea7f48c5b004e --- /dev/null +++ b/ld/testsuite/ld-i386/alloc.t @@ -0,0 +1,13 @@ +OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") +OUTPUT_ARCH(i386) +PHDRS { + text PT_LOAD FLAGS(5); /* R_E */ +} +SECTIONS +{ + . = 0xC0000000 + ((0x100000 + (0x100000 - 1)) & ~(0x100000 - 1)); + .bar : AT(ADDR(.bar) - 0xC0000000) { *(.bar) } :text + .bss : AT(ADDR(.bss) - 0xC0000000) { *(.bss) } + .foo 0 : AT(ADDR(.bss) + SIZEOF(.bss) - 0xC0000000) { *(.foo) } :text + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-i386/combreloc.d b/ld/testsuite/ld-i386/combreloc.d index a6f482d9c2f76..bbe91341b5ab3 100644 --- a/ld/testsuite/ld-i386/combreloc.d +++ b/ld/testsuite/ld-i386/combreloc.d @@ -4,7 +4,6 @@ #as: --32 #ld: -shared -melf_i386 -z combreloc #readelf: -r -#target: i?86-*-* Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 4 entries: Offset Info Type Sym.Value Sym. Name diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp index ad8a6106761e5..989d392f185d7 100644 --- a/ld/testsuite/ld-i386/i386.exp +++ b/ld/testsuite/ld-i386/i386.exp @@ -24,7 +24,7 @@ if {[istarget "i?86-*-vxworks"]} { {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "" {vxworks1-lib.s} {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} - {readelf --symbols vxworks1-lib.nd}} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} "libvxworks1.so"} {"VxWorks executable test 1 (dynamic)" \ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" @@ -113,3 +113,6 @@ run_ld_link_tests $i386tests run_dump_test "abs" run_dump_test "pcrel8" run_dump_test "pcrel16" +run_dump_test "pcrel16abs" +run_dump_test "alloc" +run_dump_test "warn1" diff --git a/ld/testsuite/ld-i386/pcrel16abs.d b/ld/testsuite/ld-i386/pcrel16abs.d new file mode 100644 index 0000000000000..f4bfca561a1cf --- /dev/null +++ b/ld/testsuite/ld-i386/pcrel16abs.d @@ -0,0 +1,12 @@ +#name: PCREL16 absolute reloc +#as: --32 +#ld: -melf_i386 -Ttext 0xfffffff0 +#objdump: -drj.text -m i8086 + +.*: +file format elf32-i386 + +Disassembly of section .text: + +f+0 <_start>: +f+0: e9 0d e0[ ]+jmp[ ]+ffffe000 <SEGMENT_SIZE\+0xfffee000> +#pass diff --git a/ld/testsuite/ld-i386/pcrel16abs.s b/ld/testsuite/ld-i386/pcrel16abs.s new file mode 100644 index 0000000000000..4bf68a7ddc138 --- /dev/null +++ b/ld/testsuite/ld-i386/pcrel16abs.s @@ -0,0 +1,6 @@ +SEGMENT_SIZE = 0x10000 +RVECTOR = 0x00010 +.code16 + .globl _start +_start: + jmp SEGMENT_SIZE-(0x1f00 +0xf0 +RVECTOR) diff --git a/ld/testsuite/ld-i386/reloc.d b/ld/testsuite/ld-i386/reloc.d index 9e8faa419cae5..e559e53f4ed12 100644 --- a/ld/testsuite/ld-i386/reloc.d +++ b/ld/testsuite/ld-i386/reloc.d @@ -4,7 +4,6 @@ #as: --32 #ld: -shared -melf_i386 -z nocombreloc #objdump: -hw -#target: i?86-*-* .*: +file format elf32-i386 #... diff --git a/ld/testsuite/ld-i386/tlsbin.dd b/ld/testsuite/ld-i386/tlsbin.dd index 08a1f3143f58c..0e3ef4d9484b3 100644 --- a/ld/testsuite/ld-i386/tlsbin.dd +++ b/ld/testsuite/ld-i386/tlsbin.dd @@ -32,7 +32,7 @@ Disassembly of section .text: 8049014: 90[ ]+nop * # GD -> IE because variable is not defined in executable 8049015: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - 804901b: 2b 83 f8 ff ff ff[ ]+sub 0xfffffff8\(%ebx\),%eax + 804901b: 2b 83 f8 ff ff ff[ ]+sub -0x8\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG1 8049021: 90[ ]+nop * 8049022: 90[ ]+nop * @@ -41,7 +41,7 @@ Disassembly of section .text: # GD -> IE because variable is not defined in executable where # the variable is referenced through @gottpoff too 8049025: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - 804902b: 2b 83 e8 ff ff ff[ ]+sub 0xffffffe8\(%ebx\),%eax + 804902b: 2b 83 e8 ff ff ff[ ]+sub -0x18\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG2 8049031: 90[ ]+nop * 8049032: 90[ ]+nop * @@ -50,7 +50,7 @@ Disassembly of section .text: # GD -> IE because variable is not defined in executable where # the variable is referenced through @gotntpoff too 8049035: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - 804903b: 2b 83 dc ff ff ff[ ]+sub 0xffffffdc\(%ebx\),%eax + 804903b: 03 83 dc ff ff ff[ ]+add -0x24\(%ebx\),%eax # ->R_386_TLS_TPOFF sG3 8049041: 90[ ]+nop * 8049042: 90[ ]+nop * @@ -59,7 +59,7 @@ Disassembly of section .text: # GD -> IE because variable is not defined in executable where # the variable is referenced through @gottpoff and @gotntpoff too 8049045: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - 804904b: 2b 83 ec ff ff ff[ ]+sub 0xffffffec\(%ebx\),%eax + 804904b: 2b 83 ec ff ff ff[ ]+sub -0x14\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG4 8049051: 90[ ]+nop * 8049052: 90[ ]+nop * @@ -95,11 +95,11 @@ Disassembly of section .text: 804908c: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi 8049090: 90[ ]+nop * 8049091: 90[ ]+nop * - 8049092: 8d 90 20 f0 ff ff[ ]+lea 0xfffff020\(%eax\),%edx + 8049092: 8d 90 20 f0 ff ff[ ]+lea -0xfe0\(%eax\),%edx # sl1 8049098: 90[ ]+nop * 8049099: 90[ ]+nop * - 804909a: 8d 88 24 f0 ff ff[ ]+lea 0xfffff024\(%eax\),%ecx + 804909a: 8d 88 24 f0 ff ff[ ]+lea -0xfdc\(%eax\),%ecx # sl2 80490a0: 90[ ]+nop * 80490a1: 90[ ]+nop * @@ -111,11 +111,11 @@ Disassembly of section .text: 80490ab: 8d 74 26 00[ ]+lea 0x0\(%esi\),%esi 80490af: 90[ ]+nop * 80490b0: 90[ ]+nop * - 80490b1: 8d 90 40 f0 ff ff[ ]+lea 0xfffff040\(%eax\),%edx + 80490b1: 8d 90 40 f0 ff ff[ ]+lea -0xfc0\(%eax\),%edx # sh1 80490b7: 90[ ]+nop * 80490b8: 90[ ]+nop * - 80490b9: 8d 88 44 f0 ff ff[ ]+lea 0xfffff044\(%eax\),%ecx + 80490b9: 8d 88 44 f0 ff ff[ ]+lea -0xfbc\(%eax\),%ecx # sh2 80490bf: 90[ ]+nop * 80490c0: 90[ ]+nop * @@ -125,7 +125,7 @@ Disassembly of section .text: 80490c3: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx 80490ca: 90[ ]+nop * 80490cb: 90[ ]+nop * - 80490cc: 2b 8b e8 ff ff ff[ ]+sub 0xffffffe8\(%ebx\),%ecx + 80490cc: 2b 8b e8 ff ff ff[ ]+sub -0x18\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sG2 80490d2: 90[ ]+nop * 80490d3: 90[ ]+nop * @@ -135,7 +135,7 @@ Disassembly of section .text: 80490d6: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax 80490dc: 90[ ]+nop * 80490dd: 90[ ]+nop * - 80490de: 2b 83 ec ff ff ff[ ]+sub 0xffffffec\(%ebx\),%eax + 80490de: 2b 83 ec ff ff ff[ ]+sub -0x14\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG4 80490e4: 90[ ]+nop * 80490e5: 90[ ]+nop * @@ -145,7 +145,7 @@ Disassembly of section .text: 80490e8: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx 80490ef: 90[ ]+nop * 80490f0: 90[ ]+nop * - 80490f1: 03 8b dc ff ff ff[ ]+add 0xffffffdc\(%ebx\),%ecx + 80490f1: 03 8b dc ff ff ff[ ]+add -0x24\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG3 80490f7: 90[ ]+nop * 80490f8: 90[ ]+nop * @@ -155,7 +155,7 @@ Disassembly of section .text: 80490fb: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax 8049101: 90[ ]+nop * 8049102: 90[ ]+nop * - 8049103: 03 83 f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%eax + 8049103: 03 83 f0 ff ff ff[ ]+add -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF sG4 8049109: 90[ ]+nop * 804910a: 90[ ]+nop * @@ -193,7 +193,7 @@ Disassembly of section .text: 8049145: 90[ ]+nop * # Direct access through %gs # @gotntpoff IE against global var - 8049146: 8b 8b e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%ecx + 8049146: 8b 8b e0 ff ff ff[ ]+mov -0x20\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG5 804914c: 90[ ]+nop * 804914d: 90[ ]+nop * @@ -222,7 +222,7 @@ Disassembly of section .text: 8049170: 90[ ]+nop * 8049171: 90[ ]+nop * 8049172: 90[ ]+nop * - 8049173: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + 8049173: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx 8049176: c9[ ]+leave * 8049177: c3[ ]+ret * @@ -240,7 +240,7 @@ Disassembly of section .text: 804918b: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx 8049192: 90[ ]+nop * 8049193: 90[ ]+nop * - 8049194: 2b 91 f4 ff ff ff[ ]+sub 0xfffffff4\(%ecx\),%edx + 8049194: 2b 91 f4 ff ff ff[ ]+sub -0xc\(%ecx\),%edx # ->R_386_TLS_TPOFF32 sG6 804919a: 90[ ]+nop * 804919b: 90[ ]+nop * @@ -401,7 +401,7 @@ Disassembly of section .text: 804929c: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax 80492a2: 90[ ]+nop * 80492a3: 90[ ]+nop * - 80492a4: 8d 90 04 f0 ff ff[ ]+lea 0xfffff004\(%eax\),%edx + 80492a4: 8d 90 04 f0 ff ff[ ]+lea -0xffc\(%eax\),%edx # sg2 80492aa: 90[ ]+nop * 80492ab: 90[ ]+nop * @@ -451,6 +451,6 @@ Disassembly of section .text: 80492f4: 90[ ]+nop * 80492f5: 90[ ]+nop * 80492f6: 90[ ]+nop * - 80492f7: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + 80492f7: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx 80492fa: c9[ ]+leave * 80492fb: c3[ ]+ret * diff --git a/ld/testsuite/ld-i386/tlsbin.rd b/ld/testsuite/ld-i386/tlsbin.rd index b485626084048..54abd8bdbf6fc 100644 --- a/ld/testsuite/ld-i386/tlsbin.rd +++ b/ld/testsuite/ld-i386/tlsbin.rd @@ -70,7 +70,7 @@ Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries: Offset +Info +Type +Sym.Value Sym. Name [0-9a-f ]+R_386_JUMP_SLOT +[0-9a-f]+ +___tls_get_addr -Symbol table '.dynsym' contains 13 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3 @@ -86,7 +86,7 @@ Symbol table '.dynsym' contains 13 entries: +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG8 +[0-9]+: [0-9a-f]+ +0 FUNC +GLOBAL DEFAULT UND ___tls_get_addr -Symbol table '.symtab' contains 73 entries: +Symbol table '.symtab' contains 70 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -102,9 +102,6 @@ Symbol table '.symtab' contains 73 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +15 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +16 * +[0-9]+: 00000020 +0 TLS +LOCAL DEFAULT +9 sl1 +[0-9]+: 00000024 +0 TLS +LOCAL DEFAULT +9 sl2 +[0-9]+: 00000028 +0 TLS +LOCAL DEFAULT +9 sl3 diff --git a/ld/testsuite/ld-i386/tlsbindesc.dd b/ld/testsuite/ld-i386/tlsbindesc.dd index 071a5b3204277..00e164f3e297a 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.dd +++ b/ld/testsuite/ld-i386/tlsbindesc.dd @@ -31,7 +31,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable - [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov 0xfffffff8\(%ebx\),%eax + [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov -0x8\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG1 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -40,7 +40,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable where # the variable is referenced through @gottpoff too - [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov 0xffffffe8\(%ebx\),%eax + [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov -0x18\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG2 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -49,20 +49,18 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable where # the variable is referenced through @gotntpoff too - [0-9a-f]+: 8b 83 dc ff ff ff[ ]+mov 0xffffffdc\(%ebx\),%eax + [0-9a-f]+: 8b 83 dc ff ff ff[ ]+mov -0x24\(%ebx\),%eax # ->R_386_TLS_TPOFF sG3 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable where # the variable is referenced through @gottpoff and @gotntpoff too - [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%eax + [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -70,8 +68,7 @@ Disassembly of section .text: # GD -> LE with global variable defined in executable [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax # sg1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -79,8 +76,7 @@ Disassembly of section .text: # GD -> LE with local variable defined in executable [0-9a-f]+: 8d 05 20 f0 ff ff[ ]+lea 0xfffff020,%eax # sl1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -88,23 +84,21 @@ Disassembly of section .text: # GD -> LE with hidden variable defined in executable [0-9a-f]+: 8d 05 40 f0 ff ff[ ]+lea 0xfffff040,%eax # sh1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD -> LE [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 90 20 f0 ff ff[ ]+lea 0xfffff020\(%eax\),%edx + [0-9a-f]+: 8d 90 20 f0 ff ff[ ]+lea -0xfe0\(%eax\),%edx # sl1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 88 24 f0 ff ff[ ]+lea 0xfffff024\(%eax\),%ecx + [0-9a-f]+: 8d 88 24 f0 ff ff[ ]+lea -0xfdc\(%eax\),%ecx # sl2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -112,15 +106,14 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # LD -> LE against hidden variables [0-9a-f]+: 8d 05 00 f0 ff ff[ ]+lea 0xfffff000,%eax + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 90 40 f0 ff ff[ ]+lea 0xfffff040\(%eax\),%edx + [0-9a-f]+: 8d 90 40 f0 ff ff[ ]+lea -0xfc0\(%eax\),%edx # sh1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 88 44 f0 ff ff[ ]+lea 0xfffff044\(%eax\),%ecx + [0-9a-f]+: 8d 88 44 f0 ff ff[ ]+lea -0xfbc\(%eax\),%ecx # sh2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -130,7 +123,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b e8 ff ff ff[ ]+sub 0xffffffe8\(%ebx\),%ecx + [0-9a-f]+: 2b 8b e8 ff ff ff[ ]+sub -0x18\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sG2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -140,7 +133,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 ec ff ff ff[ ]+sub 0xffffffec\(%ebx\),%eax + [0-9a-f]+: 2b 83 ec ff ff ff[ ]+sub -0x14\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -150,7 +143,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b dc ff ff ff[ ]+add 0xffffffdc\(%ebx\),%ecx + [0-9a-f]+: 03 8b dc ff ff ff[ ]+add -0x24\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -160,7 +153,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%eax + [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF sG4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -198,7 +191,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # Direct access through %gs # @gotntpoff IE against global var - [0-9a-f]+: 8b 8b e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%ecx + [0-9a-f]+: 8b 8b e0 ff ff ff[ ]+mov -0x20\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -227,7 +220,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + [0-9a-f]+: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx [0-9a-f]+: c9[ ]+leave * [0-9a-f]+: c3[ ]+ret * [0-9a-f]+: 90[ ]+nop * @@ -247,7 +240,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 15 00 00 00 00[ ]+mov %gs:0x0,%edx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 91 f4 ff ff ff[ ]+sub 0xfffffff4\(%ecx\),%edx + [0-9a-f]+: 2b 91 f4 ff ff ff[ ]+sub -0xc\(%ecx\),%edx # ->R_386_TLS_TPOFF32 sG6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -408,7 +401,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 90 04 f0 ff ff[ ]+lea 0xfffff004\(%eax\),%edx + [0-9a-f]+: 8d 90 04 f0 ff ff[ ]+lea -0xffc\(%eax\),%edx # sg2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -458,6 +451,6 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + [0-9a-f]+: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx [0-9a-f]+: c9[ ]+leave * [0-9a-f]+: c3[ ]+ret * diff --git a/ld/testsuite/ld-i386/tlsbindesc.rd b/ld/testsuite/ld-i386/tlsbindesc.rd index 27d0670c99340..65b47a2181b1f 100644 --- a/ld/testsuite/ld-i386/tlsbindesc.rd +++ b/ld/testsuite/ld-i386/tlsbindesc.rd @@ -64,7 +64,7 @@ Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 9 entries: 0+804a0fc 00000825 R_386_TLS_TPOFF32 0+ +sG1 0+804a100 00000b0e R_386_TLS_TPOFF +0+ +sG8 -Symbol table '.dynsym' contains 12 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3 @@ -79,7 +79,7 @@ Symbol table '.dynsym' contains 12 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG8 -Symbol table '.symtab' contains 71 entries: +Symbol table '.symtab' contains 68 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -93,9 +93,6 @@ Symbol table '.symtab' contains 71 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * +[0-9]+: 00000020 +0 TLS +LOCAL DEFAULT +7 sl1 +[0-9]+: 00000024 +0 TLS +LOCAL DEFAULT +7 sl2 +[0-9]+: 00000028 +0 TLS +LOCAL DEFAULT +7 sl3 diff --git a/ld/testsuite/ld-i386/tlsdesc.dd b/ld/testsuite/ld-i386/tlsdesc.dd index 666f790cc2355..bca00901b97ee 100644 --- a/ld/testsuite/ld-i386/tlsdesc.dd +++ b/ld/testsuite/ld-i386/tlsdesc.dd @@ -30,7 +30,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff too - [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov 0xfffffff8\(%ebx\),%eax + [0-9a-f]+: 8b 83 f8 ff ff ff[ ]+mov -0x8\(%ebx\),%eax # ->R_386_TLS_TPOFF sg2 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -38,19 +38,17 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gotntpoff too - [0-9a-f]+: 8b 83 c4 ff ff ff[ ]+mov 0xffffffc4\(%ebx\),%eax + [0-9a-f]+: 8b 83 c4 ff ff ff[ ]+mov -0x3c\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg3 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff and - [0-9a-f]+: 8b 83 d4 ff ff ff[ ]+mov 0xffffffd4\(%ebx\),%eax + [0-9a-f]+: 8b 83 d4 ff ff ff[ ]+mov -0x2c\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -64,7 +62,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gottpoff too - [0-9a-f]+: 8b 83 b0 ff ff ff[ ]+mov 0xffffffb0\(%ebx\),%eax + [0-9a-f]+: 8b 83 b0 ff ff ff[ ]+mov -0x50\(%ebx\),%eax # ->R_386_TLS_TPOFF sl2 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -72,19 +70,17 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gotntpoff - [0-9a-f]+: 8b 83 b4 ff ff ff[ ]+mov 0xffffffb4\(%ebx\),%eax + [0-9a-f]+: 8b 83 b4 ff ff ff[ ]+mov -0x4c\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sl3 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gottpoff and - [0-9a-f]+: 8b 83 bc ff ff ff[ ]+mov 0xffffffbc\(%ebx\),%eax + [0-9a-f]+: 8b 83 bc ff ff ff[ ]+mov -0x44\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sl4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -98,7 +94,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gottpoff too - [0-9a-f]+: 8b 83 fc ff ff ff[ ]+mov 0xfffffffc\(%ebx\),%eax + [0-9a-f]+: 8b 83 fc ff ff ff[ ]+mov -0x4\(%ebx\),%eax # ->R_386_TLS_TPOFF sh2 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -106,19 +102,17 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gotntpoff too - [0-9a-f]+: 8b 83 c8 ff ff ff[ ]+mov 0xffffffc8\(%ebx\),%eax + [0-9a-f]+: 8b 83 c8 ff ff ff[ ]+mov -0x38\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sh3 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gottpoff and @gotntpoff too - [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov 0xffffffe8\(%ebx\),%eax + [0-9a-f]+: 8b 83 e8 ff ff ff[ ]+mov -0x18\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sh4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -132,7 +126,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through - [0-9a-f]+: 8b 83 cc ff ff ff[ ]+mov 0xffffffcc\(%ebx\),%eax + [0-9a-f]+: 8b 83 cc ff ff ff[ ]+mov -0x34\(%ebx\),%eax # ->R_386_TLS_TPOFF sH2 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -140,19 +134,17 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through - [0-9a-f]+: 8b 83 ec ff ff ff[ ]+mov 0xffffffec\(%ebx\),%eax + [0-9a-f]+: 8b 83 ec ff ff ff[ ]+mov -0x14\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sH3 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through - [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%eax + [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov -0x20\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sH4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -197,7 +189,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b f8 ff ff ff[ ]+sub 0xfffffff8\(%ebx\),%ecx + [0-9a-f]+: 2b 8b f8 ff ff ff[ ]+sub -0x8\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sg2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -207,7 +199,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 d0 ff ff ff[ ]+sub 0xffffffd0\(%ebx\),%eax + [0-9a-f]+: 2b 83 d0 ff ff ff[ ]+sub -0x30\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -217,7 +209,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b c4 ff ff ff[ ]+add 0xffffffc4\(%ebx\),%ecx + [0-9a-f]+: 03 8b c4 ff ff ff[ ]+add -0x3c\(%ebx\),%ecx # ->R_386_TLS_TPOFF sg3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -227,7 +219,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 d4 ff ff ff[ ]+add 0xffffffd4\(%ebx\),%eax + [0-9a-f]+: 03 83 d4 ff ff ff[ ]+add -0x2c\(%ebx\),%eax # ->R_386_TLS_TPOFF sg4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -237,7 +229,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b b0 ff ff ff[ ]+sub 0xffffffb0\(%ebx\),%ecx + [0-9a-f]+: 2b 8b b0 ff ff ff[ ]+sub -0x50\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0xdcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -247,7 +239,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 b8 ff ff ff[ ]+sub 0xffffffb8\(%ebx\),%eax + [0-9a-f]+: 2b 83 b8 ff ff ff[ ]+sub -0x48\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xd4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -257,7 +249,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b b4 ff ff ff[ ]+add 0xffffffb4\(%ebx\),%ecx + [0-9a-f]+: 03 8b b4 ff ff ff[ ]+add -0x4c\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x28000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -267,7 +259,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 bc ff ff ff[ ]+add 0xffffffbc\(%ebx\),%eax + [0-9a-f]+: 03 83 bc ff ff ff[ ]+add -0x44\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x2c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -277,7 +269,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b fc ff ff ff[ ]+sub 0xfffffffc\(%ebx\),%ecx + [0-9a-f]+: 2b 8b fc ff ff ff[ ]+sub -0x4\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0xbcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -287,7 +279,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 e4 ff ff ff[ ]+sub 0xffffffe4\(%ebx\),%eax + [0-9a-f]+: 2b 83 e4 ff ff ff[ ]+sub -0x1c\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xb4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -297,7 +289,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b c8 ff ff ff[ ]+add 0xffffffc8\(%ebx\),%ecx + [0-9a-f]+: 03 8b c8 ff ff ff[ ]+add -0x38\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x48000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -307,7 +299,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 e8 ff ff ff[ ]+add 0xffffffe8\(%ebx\),%eax + [0-9a-f]+: 03 83 e8 ff ff ff[ ]+add -0x18\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x4c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -317,7 +309,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b cc ff ff ff[ ]+sub 0xffffffcc\(%ebx\),%ecx + [0-9a-f]+: 2b 8b cc ff ff ff[ ]+sub -0x34\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0x9cffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -327,7 +319,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub 0xffffffdc\(%ebx\),%eax + [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub -0x24\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0x94ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -337,7 +329,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b ec ff ff ff[ ]+add 0xffffffec\(%ebx\),%ecx + [0-9a-f]+: 03 8b ec ff ff ff[ ]+add -0x14\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x68000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -347,7 +339,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 e0 ff ff ff[ ]+add 0xffffffe0\(%ebx\),%eax + [0-9a-f]+: 03 83 e0 ff ff ff[ ]+add -0x20\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x6c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -355,7 +347,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # Direct access through %gs # @gotntpoff IE against global var - [0-9a-f]+: 8b 8b d8 ff ff ff[ ]+mov 0xffffffd8\(%ebx\),%ecx + [0-9a-f]+: 8b 8b d8 ff ff ff[ ]+mov -0x28\(%ebx\),%ecx # ->R_386_TLS_TPOFF sg5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -365,7 +357,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against local var - [0-9a-f]+: 8b 83 c0 ff ff ff[ ]+mov 0xffffffc0\(%ebx\),%eax + [0-9a-f]+: 8b 83 c0 ff ff ff[ ]+mov -0x40\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x30000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -375,7 +367,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against hidden and local var - [0-9a-f]+: 8b 93 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%edx + [0-9a-f]+: 8b 93 f0 ff ff ff[ ]+mov -0x10\(%ebx\),%edx # ->R_386_TLS_TPOFF [0x50000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -385,7 +377,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against hidden but not local var - [0-9a-f]+: 8b 8b f4 ff ff ff[ ]+mov 0xfffffff4\(%ebx\),%ecx + [0-9a-f]+: 8b 8b f4 ff ff ff[ ]+mov -0xc\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x70000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -394,6 +386,6 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + [0-9a-f]+: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx [0-9a-f]+: c9[ ]+leave * [0-9a-f]+: c3[ ]+ret * diff --git a/ld/testsuite/ld-i386/tlsdesc.rd b/ld/testsuite/ld-i386/tlsdesc.rd index 12fd5d4236bdc..aca162cdebaf5 100644 --- a/ld/testsuite/ld-i386/tlsdesc.rd +++ b/ld/testsuite/ld-i386/tlsdesc.rd @@ -49,41 +49,38 @@ Program Headers: Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 20 entries: Offset +Info +Type +Sym.Value +Sym. Name -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+0e R_386_TLS_TPOFF * -[0-9a-f]+ +0+25 R_386_TLS_TPOFF32 -[0-9a-f]+ +0+50e R_386_TLS_TPOFF 0+8 sg3 -[0-9a-f]+ +0+625 R_386_TLS_TPOFF32 0+c sg4 -[0-9a-f]+ +0+60e R_386_TLS_TPOFF 0+c sg4 -[0-9a-f]+ +0+70e R_386_TLS_TPOFF 0+10 sg5 -[0-9a-f]+ +0+b25 R_386_TLS_TPOFF32 0+4 sg2 +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF * +[0-9a-f ]+R_386_TLS_TPOFF32 +[0-9a-f ]+R_386_TLS_TPOFF 0+8 sg3 +[0-9a-f ]+R_386_TLS_TPOFF32 0+c sg4 +[0-9a-f ]+R_386_TLS_TPOFF 0+c sg4 +[0-9a-f ]+R_386_TLS_TPOFF 0+10 sg5 +[0-9a-f ]+R_386_TLS_TPOFF32 0+4 sg2 Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 5 entries: Offset Info Type Sym.Value Sym. Name -[0-9a-f]+ +0+829 R_386_TLS_DESC * 0+ sg1 -[0-9a-f]+ +0+29 R_386_TLS_DESC * -[0-9a-f]+ +0+29 R_386_TLS_DESC * -[0-9a-f]+ +0+29 R_386_TLS_DESC * -[0-9a-f]+ +0+29 R_386_TLS_DESC * +[0-9a-f ]+R_386_TLS_DESC * 0+ sg1 +[0-9a-f ]+R_386_TLS_DESC * +[0-9a-f ]+R_386_TLS_DESC * +[0-9a-f ]+R_386_TLS_DESC * +[0-9a-f ]+R_386_TLS_DESC * -Symbol table '.dynsym' contains 16 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: + Value Size Type + Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +7 sg8 +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +7 sg3 +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +7 sg4 @@ -97,7 +94,7 @@ Symbol table '.dynsym' contains 16 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 54 entries: +Symbol table '.symtab' contains 51 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -111,9 +108,6 @@ Symbol table '.symtab' contains 54 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +7 sl1 +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +7 sl2 +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +7 sl3 diff --git a/ld/testsuite/ld-i386/tlsdesc.sd b/ld/testsuite/ld-i386/tlsdesc.sd index 2af8c2d3df17b..656c40971461e 100644 --- a/ld/testsuite/ld-i386/tlsdesc.sd +++ b/ld/testsuite/ld-i386/tlsdesc.sd @@ -14,7 +14,7 @@ Contents of section \.got: [0-9a-f]+ 6c000000 b4ffffff 4c000000 68000000 .* [0-9a-f]+ 50000000 70000000 00000000 bcffffff .* Contents of section \.got\.plt: - [0-9a-f]+ ec150000 00000000 00000000 00000000 .* + [0-9a-f]+ b0150000 00000000 00000000 00000000 .* [0-9a-f]+ 20000000 00000000 60000000 00000000 .* [0-9a-f]+ 00000000 00000000 00000000 00000000 .* [0-9a-f]+ 40000000 +.* diff --git a/ld/testsuite/ld-i386/tlsgdesc.dd b/ld/testsuite/ld-i386/tlsgdesc.dd index ca4092ea84380..25659de283394 100644 --- a/ld/testsuite/ld-i386/tlsgdesc.dd +++ b/ld/testsuite/ld-i386/tlsgdesc.dd @@ -24,7 +24,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b e0 ff ff ff[ ]+sub 0xffffffe0\(%ebx\),%ecx + [0-9a-f]+: 2b 8b e0 ff ff ff[ ]+sub -0x20\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sG3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -34,14 +34,14 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%ecx + [0-9a-f]+: 03 8b f0 ff ff ff[ ]+add -0x10\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD - [0-9a-f]+: 8d 04 1d f8 ff ff ff[ ]+lea 0xfffffff8\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d f8 ff ff ff[ ]+lea -0x8\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 sG1 [0-9a-f]+: e8 a9 ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -63,7 +63,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8d 04 1d e8 ff ff ff[ ]+lea 0xffffffe8\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d e8 ff ff ff[ ]+lea -0x18\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 sG2 [0-9a-f]+: e8 81 ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -73,13 +73,13 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 e0 ff ff ff[ ]+sub 0xffffffe0\(%ebx\),%eax + [0-9a-f]+: 2b 83 e0 ff ff ff[ ]+sub -0x20\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov 0xffffffe0\(%ebx\),%eax + [0-9a-f]+: 8b 83 e0 ff ff ff[ ]+mov -0x20\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG3 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -87,16 +87,15 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gotntpoff too - [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov 0xfffffff0\(%ebx\),%eax + [0-9a-f]+: 8b 83 f0 ff ff ff[ ]+mov -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF sG4 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add 0xfffffff0\(%ebx\),%eax + [0-9a-f]+: 03 83 f0 ff ff ff[ ]+add -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF sG4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -104,22 +103,21 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gotntpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%eax + [0-9a-f]+: 03 83 e4 ff ff ff[ ]+add -0x1c\(%ebx\),%eax # ->R_386_TLS_TPOFF sG5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 83 e4 ff ff ff[ ]+mov 0xffffffe4\(%ebx\),%eax + [0-9a-f]+: 8b 83 e4 ff ff ff[ ]+mov -0x1c\(%ebx\),%eax # ->R_386_TLS_TPOFF sG5 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff too - [0-9a-f]+: 8b 83 f4 ff ff ff[ ]+mov 0xfffffff4\(%ebx\),%eax + [0-9a-f]+: 8b 83 f4 ff ff ff[ ]+mov -0xc\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG6 [0-9a-f]+: f7 d8[ ]+neg %eax [0-9a-f]+: 90[ ]+nop * @@ -127,7 +125,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 f4 ff ff ff[ ]+sub 0xfffffff4\(%ebx\),%eax + [0-9a-f]+: 2b 83 f4 ff ff ff[ ]+sub -0xc\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sG6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -137,7 +135,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%ecx + [0-9a-f]+: 03 8b e4 ff ff ff[ ]+add -0x1c\(%ebx\),%ecx # ->R_386_TLS_TPOFF sG5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -147,12 +145,12 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b f4 ff ff ff[ ]+sub 0xfffffff4\(%ebx\),%ecx + [0-9a-f]+: 2b 8b f4 ff ff ff[ ]+sub -0xc\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sG6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + [0-9a-f]+: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx [0-9a-f]+: c9[ ]+leave * [0-9a-f]+: c3[ ]+ret * diff --git a/ld/testsuite/ld-i386/tlsgdesc.rd b/ld/testsuite/ld-i386/tlsgdesc.rd index 9253d22cef1db..0c5c42514ef78 100644 --- a/ld/testsuite/ld-i386/tlsgdesc.rd +++ b/ld/testsuite/ld-i386/tlsgdesc.rd @@ -45,25 +45,24 @@ Program Headers: Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 8 entries: Offset +Info +Type +Sym.Value +Sym. Name -[0-9a-f]+ +0+225 R_386_TLS_TPOFF32 0+ sG3 -[0-9a-f]+ +0+30e R_386_TLS_TPOFF 0+ sG5 -[0-9a-f]+ +0+423 R_386_TLS_DTPMOD3 0+ sG2 -[0-9a-f]+ +0+424 R_386_TLS_DTPOFF3 0+ sG2 -[0-9a-f]+ +0+50e R_386_TLS_TPOFF 0+ sG4 -[0-9a-f]+ +0+725 R_386_TLS_TPOFF32 0+ sG6 -[0-9a-f]+ +0+923 R_386_TLS_DTPMOD3 0+ sG1 -[0-9a-f]+ +0+924 R_386_TLS_DTPOFF3 0+ sG1 +[0-9a-f ]+R_386_TLS_TPOFF32 0+ sG3 +[0-9a-f ]+R_386_TLS_TPOFF 0+ sG5 +[0-9a-f ]+R_386_TLS_DTPMOD3 0+ sG2 +[0-9a-f ]+R_386_TLS_DTPOFF3 0+ sG2 +[0-9a-f ]+R_386_TLS_TPOFF 0+ sG4 +[0-9a-f ]+R_386_TLS_TPOFF32 0+ sG6 +[0-9a-f ]+R_386_TLS_DTPMOD3 0+ sG1 +[0-9a-f ]+R_386_TLS_DTPOFF3 0+ sG1 Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 3 entries: Offset Info Type Sym.Value Sym. Name -[0-9a-f]+ 0+c07 R_386_JUMP_SLOT 0+ ___tls_get_addr -[0-9a-f]+ 0+929 R_386_TLS_DESC 0+ sG1 -[0-9a-f]+ 0+429 R_386_TLS_DESC 0+ sG2 +[0-9a-f ]+R_386_JUMP_SLOT 0+ ___tls_get_addr +[0-9a-f ]+R_386_TLS_DESC 0+ sG1 +[0-9a-f ]+R_386_TLS_DESC 0+ sG2 -Symbol table '.dynsym' contains 13 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: + Value Size Type + Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 * +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3 +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG5 +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG2 @@ -76,7 +75,7 @@ Symbol table '.dynsym' contains 13 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND ___tls_get_addr -Symbol table '.symtab' contains 27 entries: +Symbol table '.symtab' contains 24 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -89,9 +88,6 @@ Symbol table '.symtab' contains 27 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3 diff --git a/ld/testsuite/ld-i386/tlsnopic.dd b/ld/testsuite/ld-i386/tlsnopic.dd index ddac1e231e317..a0a8853f2cef0 100644 --- a/ld/testsuite/ld-i386/tlsnopic.dd +++ b/ld/testsuite/ld-i386/tlsnopic.dd @@ -153,7 +153,7 @@ Disassembly of section .text: 10e9: 90[ ]+nop * 10ea: 90[ ]+nop * 10eb: 90[ ]+nop * - 10ec: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + 10ec: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx 10ef: c9[ ]+leave * 10f0: c3[ ]+ret * 10f1: 90[ ]+nop * diff --git a/ld/testsuite/ld-i386/tlsnopic.rd b/ld/testsuite/ld-i386/tlsnopic.rd index d8dcc66357fb0..6ba628b4dac43 100644 --- a/ld/testsuite/ld-i386/tlsnopic.rd +++ b/ld/testsuite/ld-i386/tlsnopic.rd @@ -69,11 +69,9 @@ Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 20 entries: [0-9a-f ]+R_386_TLS_TPOFF 0+ sg2 -Symbol table '.dynsym' contains 12 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +5 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +6 * +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sg3 +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sg4 +[0-9]+: 0+1000 +0 FUNC +GLOBAL DEFAULT +5 fn3 @@ -84,7 +82,7 @@ Symbol table '.dynsym' contains 12 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 33 entries: +Symbol table '.symtab' contains 30 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -96,9 +94,6 @@ Symbol table '.symtab' contains 33 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * +[0-9]+: 0+00 +0 TLS +LOCAL DEFAULT +6 bl1 +[0-9]+: 0+04 +0 TLS +LOCAL DEFAULT +6 bl2 +[0-9]+: 0+08 +0 TLS +LOCAL DEFAULT +6 bl3 diff --git a/ld/testsuite/ld-i386/tlspic.dd b/ld/testsuite/ld-i386/tlspic.dd index 98fcf0114772d..dd436d2f8d4aa 100644 --- a/ld/testsuite/ld-i386/tlspic.dd +++ b/ld/testsuite/ld-i386/tlspic.dd @@ -22,7 +22,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD - [0-9a-f]+: 8d 04 1d d4 ff ff ff[ ]+lea 0xffffffd4\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d d4 ff ff ff[ ]+lea -0x2c\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 sg1 [0-9a-f]+: e8 cf ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -32,7 +32,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 f0 ff ff ff[ ]+sub 0xfffffff0\(%ebx\),%eax + [0-9a-f]+: 2b 83 f0 ff ff ff[ ]+sub -0x10\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -40,7 +40,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gotntpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 b4 ff ff ff[ ]+add 0xffffffb4\(%ebx\),%eax + [0-9a-f]+: 03 83 b4 ff ff ff[ ]+add -0x4c\(%ebx\),%eax # ->R_386_TLS_TPOFF sg3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -48,14 +48,14 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through @gottpoff and [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 c0 ff ff ff[ ]+sub 0xffffffc0\(%ebx\),%eax + [0-9a-f]+: 2b 83 c0 ff ff ff[ ]+sub -0x40\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD against local variable - [0-9a-f]+: 8d 04 1d 88 ff ff ff[ ]+lea 0xffffff88\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d 88 ff ff ff[ ]+lea -0x78\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x20000000] [0-9a-f]+: e8 8f ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -65,7 +65,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gottpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 90 ff ff ff[ ]+sub 0xffffff90\(%ebx\),%eax + [0-9a-f]+: 2b 83 90 ff ff ff[ ]+sub -0x70\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xdcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -73,7 +73,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gotntpoff [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 94 ff ff ff[ ]+add 0xffffff94\(%ebx\),%eax + [0-9a-f]+: 03 83 94 ff ff ff[ ]+add -0x6c\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x28000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -81,14 +81,14 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through @gottpoff and [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 98 ff ff ff[ ]+sub 0xffffff98\(%ebx\),%eax + [0-9a-f]+: 2b 83 98 ff ff ff[ ]+sub -0x68\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xd4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD against hidden and local variable - [0-9a-f]+: 8d 04 1d f4 ff ff ff[ ]+lea 0xfffffff4\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d f4 ff ff ff[ ]+lea -0xc\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x40000000] [0-9a-f]+: e8 4f ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -98,7 +98,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gottpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 fc ff ff ff[ ]+sub 0xfffffffc\(%ebx\),%eax + [0-9a-f]+: 2b 83 fc ff ff ff[ ]+sub -0x4\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xbcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -106,7 +106,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gotntpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 b8 ff ff ff[ ]+add 0xffffffb8\(%ebx\),%eax + [0-9a-f]+: 03 83 b8 ff ff ff[ ]+add -0x48\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x48000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -114,14 +114,14 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through @gottpoff and @gotntpoff too [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub 0xffffffdc\(%ebx\),%eax + [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub -0x24\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xb4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD against hidden but not local variable - [0-9a-f]+: 8d 04 1d ac ff ff ff[ ]+lea 0xffffffac\(,%ebx,1\),%eax + [0-9a-f]+: 8d 04 1d ac ff ff ff[ ]+lea -0x54\(,%ebx,1\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x60000000] [0-9a-f]+: e8 0f ff ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -131,7 +131,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 bc ff ff ff[ ]+sub 0xffffffbc\(%ebx\),%eax + [0-9a-f]+: 2b 83 bc ff ff ff[ ]+sub -0x44\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0x9cffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -139,7 +139,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 03 83 e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%eax + [0-9a-f]+: 03 83 e4 ff ff ff[ ]+add -0x1c\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x68000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -147,14 +147,14 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax - [0-9a-f]+: 2b 83 cc ff ff ff[ ]+sub 0xffffffcc\(%ebx\),%eax + [0-9a-f]+: 2b 83 cc ff ff ff[ ]+sub -0x34\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0x94ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD - [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea 0xffffffa4\(%ebx\),%eax + [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea -0x5c\(%ebx\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x00000000] [0-9a-f]+: e8 d0 fe ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -171,7 +171,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD against hidden and local variables - [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea 0xffffffa4\(%ebx\),%eax + [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea -0x5c\(%ebx\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x00000000] [0-9a-f]+: e8 b1 fe ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -188,7 +188,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD against hidden but not local variables - [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea 0xffffffa4\(%ebx\),%eax + [0-9a-f]+: 8d 83 a4 ff ff ff[ ]+lea -0x5c\(%ebx\),%eax # ->R_386_TLS_DTPMOD32 [0x00000000 0x00000000] [0-9a-f]+: e8 92 fe ff ff[ ]+call [0-9a-f]+ <___tls_get_addr@plt> # ->R_386_JUMP_SLOT ___tls_get_addr @@ -206,7 +206,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b f0 ff ff ff[ ]+sub 0xfffffff0\(%ebx\),%ecx + [0-9a-f]+: 2b 8b f0 ff ff ff[ ]+sub -0x10\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 sg2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -216,7 +216,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 c0 ff ff ff[ ]+sub 0xffffffc0\(%ebx\),%eax + [0-9a-f]+: 2b 83 c0 ff ff ff[ ]+sub -0x40\(%ebx\),%eax # ->R_386_TLS_TPOFF32 sg4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -226,7 +226,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b b4 ff ff ff[ ]+add 0xffffffb4\(%ebx\),%ecx + [0-9a-f]+: 03 8b b4 ff ff ff[ ]+add -0x4c\(%ebx\),%ecx # ->R_386_TLS_TPOFF sg3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -236,7 +236,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 c4 ff ff ff[ ]+add 0xffffffc4\(%ebx\),%eax + [0-9a-f]+: 03 83 c4 ff ff ff[ ]+add -0x3c\(%ebx\),%eax # ->R_386_TLS_TPOFF sg4 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -246,7 +246,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b 90 ff ff ff[ ]+sub 0xffffff90\(%ebx\),%ecx + [0-9a-f]+: 2b 8b 90 ff ff ff[ ]+sub -0x70\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0xdcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -256,7 +256,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 98 ff ff ff[ ]+sub 0xffffff98\(%ebx\),%eax + [0-9a-f]+: 2b 83 98 ff ff ff[ ]+sub -0x68\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xd4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -266,7 +266,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b 94 ff ff ff[ ]+add 0xffffff94\(%ebx\),%ecx + [0-9a-f]+: 03 8b 94 ff ff ff[ ]+add -0x6c\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x28000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -276,7 +276,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 9c ff ff ff[ ]+add 0xffffff9c\(%ebx\),%eax + [0-9a-f]+: 03 83 9c ff ff ff[ ]+add -0x64\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x2c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -286,7 +286,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b fc ff ff ff[ ]+sub 0xfffffffc\(%ebx\),%ecx + [0-9a-f]+: 2b 8b fc ff ff ff[ ]+sub -0x4\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0xbcffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -296,7 +296,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub 0xffffffdc\(%ebx\),%eax + [0-9a-f]+: 2b 83 dc ff ff ff[ ]+sub -0x24\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0xb4ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -306,7 +306,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b b8 ff ff ff[ ]+add 0xffffffb8\(%ebx\),%ecx + [0-9a-f]+: 03 8b b8 ff ff ff[ ]+add -0x48\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x48000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -316,7 +316,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 e0 ff ff ff[ ]+add 0xffffffe0\(%ebx\),%eax + [0-9a-f]+: 03 83 e0 ff ff ff[ ]+add -0x20\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x4c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -326,7 +326,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 8b bc ff ff ff[ ]+sub 0xffffffbc\(%ebx\),%ecx + [0-9a-f]+: 2b 8b bc ff ff ff[ ]+sub -0x44\(%ebx\),%ecx # ->R_386_TLS_TPOFF32 [0x9cffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -336,7 +336,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 2b 83 cc ff ff ff[ ]+sub 0xffffffcc\(%ebx\),%eax + [0-9a-f]+: 2b 83 cc ff ff ff[ ]+sub -0x34\(%ebx\),%eax # ->R_386_TLS_TPOFF32 [0x94ffffff] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -346,7 +346,7 @@ Disassembly of section .text: [0-9a-f]+: 65 8b 0d 00 00 00 00[ ]+mov %gs:0x0,%ecx [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 8b e4 ff ff ff[ ]+add 0xffffffe4\(%ebx\),%ecx + [0-9a-f]+: 03 8b e4 ff ff ff[ ]+add -0x1c\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x68000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -356,7 +356,7 @@ Disassembly of section .text: [0-9a-f]+: 65 a1 00 00 00 00[ ]+mov %gs:0x0,%eax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 03 83 d0 ff ff ff[ ]+add 0xffffffd0\(%ebx\),%eax + [0-9a-f]+: 03 83 d0 ff ff ff[ ]+add -0x30\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x6c000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -364,7 +364,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # Direct access through %gs # @gotntpoff IE against global var - [0-9a-f]+: 8b 8b c8 ff ff ff[ ]+mov 0xffffffc8\(%ebx\),%ecx + [0-9a-f]+: 8b 8b c8 ff ff ff[ ]+mov -0x38\(%ebx\),%ecx # ->R_386_TLS_TPOFF sg5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -374,7 +374,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against local var - [0-9a-f]+: 8b 83 a0 ff ff ff[ ]+mov 0xffffffa0\(%ebx\),%eax + [0-9a-f]+: 8b 83 a0 ff ff ff[ ]+mov -0x60\(%ebx\),%eax # ->R_386_TLS_TPOFF [0x30000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -384,7 +384,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against hidden and local var - [0-9a-f]+: 8b 93 e8 ff ff ff[ ]+mov 0xffffffe8\(%ebx\),%edx + [0-9a-f]+: 8b 93 e8 ff ff ff[ ]+mov -0x18\(%ebx\),%edx # ->R_386_TLS_TPOFF [0x50000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -394,7 +394,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # @gotntpoff IE against hidden but not local var - [0-9a-f]+: 8b 8b ec ff ff ff[ ]+mov 0xffffffec\(%ebx\),%ecx + [0-9a-f]+: 8b 8b ec ff ff ff[ ]+mov -0x14\(%ebx\),%ecx # ->R_386_TLS_TPOFF [0x70000000] [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -403,7 +403,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 8b 5d fc[ ]+mov 0xfffffffc\(%ebp\),%ebx + [0-9a-f]+: 8b 5d fc[ ]+mov -0x4\(%ebp\),%ebx [0-9a-f]+: c9[ ]+leave * [0-9a-f]+: c3[ ]+ret * [0-9a-f]+: 90[ ]+nop * diff --git a/ld/testsuite/ld-i386/tlspic.rd b/ld/testsuite/ld-i386/tlspic.rd index 890a4938efe03..c902cf37dd2ce 100644 --- a/ld/testsuite/ld-i386/tlspic.rd +++ b/ld/testsuite/ld-i386/tlspic.rd @@ -81,12 +81,9 @@ Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries: Offset +Info +Type +Sym.Value +Sym. Name [0-9a-f ]+R_386_JUMP_SLOT 0+ ___tls_get_addr -Symbol table '.dynsym' contains 17 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +8 sg8 +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +8 sg3 +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +8 sg4 @@ -101,7 +98,7 @@ Symbol table '.dynsym' contains 17 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end +[0-9]+: 0+ +0 NOTYPE GLOBAL DEFAULT UND ___tls_get_addr -Symbol table '.symtab' contains 55 entries: +Symbol table '.symtab' contains 52 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -116,9 +113,6 @@ Symbol table '.symtab' contains 55 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +15 * +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +8 sl1 +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +8 sl2 +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +8 sl3 diff --git a/ld/testsuite/ld-i386/vxworks1-lib.rd b/ld/testsuite/ld-i386/vxworks1-lib.rd index ab567b6e72e57..61ff293874c43 100644 --- a/ld/testsuite/ld-i386/vxworks1-lib.rd +++ b/ld/testsuite/ld-i386/vxworks1-lib.rd @@ -6,7 +6,7 @@ Relocation section '\.rel\.plt' at offset .* contains 2 entries: Relocation section '\.rel\.dyn' at offset .* contains 4 entries: Offset Info Type Sym\.Value Sym\. Name -00081c00 00000008 R_386_RELATIVE * +00081800 00000008 R_386_RELATIVE * 00080c03 .*01 R_386_32 00000000 __GOTT_BASE__ 00080c09 .*01 R_386_32 00000000 __GOTT_INDEX__ -00081414 .*06 R_386_GLOB_DAT 00081800 x +00081414 .*06 R_386_GLOB_DAT 00081c00 x diff --git a/ld/testsuite/ld-i386/vxworks1-lib.td b/ld/testsuite/ld-i386/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-i386/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-i386/vxworks1.ld b/ld/testsuite/ld-i386/vxworks1.ld index ff25b39a540a7..ed76f185c2e56 100644 --- a/ld/testsuite/ld-i386/vxworks1.ld +++ b/ld/testsuite/ld-i386/vxworks1.ld @@ -23,8 +23,8 @@ SECTIONS .got : { *(.got.plt) *(.got) } . = ALIGN (0x400); - .bss : { *(.bss) *(.dynbss) } + .data : { *(.data) } . = ALIGN (0x400); - .data : { *(.data) } + .bss : { *(.bss) *(.dynbss) } } diff --git a/ld/testsuite/ld-i386/warn1.d b/ld/testsuite/ld-i386/warn1.d new file mode 100644 index 0000000000000..dd541f25df91c --- /dev/null +++ b/ld/testsuite/ld-i386/warn1.d @@ -0,0 +1,4 @@ +#name: --warn-shared-textrel --fatal-warnings +#as: --32 +#ld: -shared -melf_i386 --warn-shared-textrel --fatal-warnings +#error: .*warning: creating a DT_TEXTREL in a shared object. diff --git a/ld/testsuite/ld-i386/warn1.s b/ld/testsuite/ld-i386/warn1.s new file mode 100644 index 0000000000000..ca3481a48fb4c --- /dev/null +++ b/ld/testsuite/ld-i386/warn1.s @@ -0,0 +1,5 @@ + .text + .globl foo + .type foo, @function +foo: + movl bar, %eax diff --git a/ld/testsuite/ld-ia64/merge1.d b/ld/testsuite/ld-ia64/merge1.d new file mode 100644 index 0000000000000..39882b8674fa2 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge1.d @@ -0,0 +1,10 @@ +#source: merge1.s +#as: -x +#ld: -shared +#objdump: -d + +#... +0+1e0 <.text>: +[ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;; +[ ]*[a-f0-9]+: c0 c0 04 00 48 00 addl r12=24,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; diff --git a/ld/testsuite/ld-ia64/merge1.s b/ld/testsuite/ld-ia64/merge1.s new file mode 100644 index 0000000000000..8998db43c7da8 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge1.s @@ -0,0 +1,12 @@ + .section .rodata.str1.8,"aMS", 1 +.LC1: .string "foo" +.LC2: .string "foo" + .section .data.rel.local,"aw" + .quad .LC2 + .section .rodata,"a" +.LC3: .string "bar" + .balign 8 + .space 0x400000 + .text + addl r12=@ltoffx(.LC1),r1 ;; + addl r12=@ltoffx(.LC3),r1 ;; diff --git a/ld/testsuite/ld-ia64/merge2.d b/ld/testsuite/ld-ia64/merge2.d new file mode 100644 index 0000000000000..dde3d097d1ff9 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge2.d @@ -0,0 +1,10 @@ +#source: merge2.s +#as: -x +#ld: -shared +#objdump: -d + +#... +0+1e0 <.text>: +[ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;; +[ ]*[a-f0-9]+: c0 c0 04 00 48 00 addl r12=24,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; diff --git a/ld/testsuite/ld-ia64/merge2.s b/ld/testsuite/ld-ia64/merge2.s new file mode 100644 index 0000000000000..6c85ac2ee3eb1 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge2.s @@ -0,0 +1,12 @@ + .section .rodata.str1.8,"aMS", 1 +.LC2: .string "foo" +.LC1: .string "foo" + .section .data.rel.local,"aw" + .quad .LC2 + .section .rodata,"a" +.LC3: .string "bar" + .balign 8 + .space 0x400000 + .text + addl r12=@ltoffx(.LC1),r1 ;; + addl r12=@ltoffx(.LC3),r1 ;; diff --git a/ld/testsuite/ld-ia64/merge3.d b/ld/testsuite/ld-ia64/merge3.d new file mode 100644 index 0000000000000..d0163f3245857 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge3.d @@ -0,0 +1,13 @@ +#source: merge3.s +#as: -x +#ld: -shared +#objdump: -d + +#... +0+210 <.text>: +[ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;; +[ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; +[ ]*[a-f0-9]+: 01 60 60 02 00 24 \[MII\] addl r12=24,r1 +[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; diff --git a/ld/testsuite/ld-ia64/merge3.s b/ld/testsuite/ld-ia64/merge3.s new file mode 100644 index 0000000000000..2442701fc8b05 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge3.s @@ -0,0 +1,16 @@ + .section .rodata.str1.8,"aMS", 1 +.LC1: .string "foo" +.LC2: .string "foo" +.LC3: .string "bar" +.LC4: .string "bar" + .section .data.rel.local,"aw" + .quad .LC2 + .quad .LC3 + .section .rodata,"a" +.LC5: .string "mumble" + .balign 8 + .space 0x400000 + .text + addl r12=@ltoffx(.LC1),r1 ;; + addl r12=@ltoffx(.LC4),r1 ;; + addl r12=@ltoffx(.LC5),r1 ;; diff --git a/ld/testsuite/ld-ia64/merge4.d b/ld/testsuite/ld-ia64/merge4.d new file mode 100644 index 0000000000000..0ed5621007d95 --- /dev/null +++ b/ld/testsuite/ld-ia64/merge4.d @@ -0,0 +1,13 @@ +#source: merge4.s +#as: -x +#ld: -shared +#objdump: -d + +#... +0+240 <.text>: +[ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;; +[ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; +[ ]*[a-f0-9]+: 0b 60 c0 02 00 24 \[MMI\] addl r12=48,r1;; +[ ]*[a-f0-9]+: c0 c0 04 00 48 00 addl r12=24,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; diff --git a/ld/testsuite/ld-ia64/merge4.s b/ld/testsuite/ld-ia64/merge4.s new file mode 100644 index 0000000000000..c23b4d0ea165e --- /dev/null +++ b/ld/testsuite/ld-ia64/merge4.s @@ -0,0 +1,21 @@ + .section .rodata.str1.8,"aMS", 1 +.LC1: .string "foo" +.LC2: .string "foo" +.LC3: .string "bar" +.LC4: .string "bar" +.LC5: .string "baz" +.LC6: .string "baz" + .section .data.rel.local,"aw" + .quad .LC2 + .quad .LC4 + .quad .LC5 + .section .rodata,"a" +.LC7: .string "mumble" + .balign 8 + .space 0x400000 + .text + addl r12=@ltoffx(.LC1),r1 ;; + addl r12=@ltoffx(.LC3),r1 ;; + addl r12=@ltoffx(.LC6),r1 ;; + addl r12=@ltoffx(.LC7),r1 ;; + diff --git a/ld/testsuite/ld-ia64/merge5.d b/ld/testsuite/ld-ia64/merge5.d new file mode 100644 index 0000000000000..3adfa55ca137a --- /dev/null +++ b/ld/testsuite/ld-ia64/merge5.d @@ -0,0 +1,16 @@ +#source: merge5.s +#as: -x +#ld: -shared +#objdump: -d + +#... +0+270 <.text>: +[ ]*[a-f0-9]+: 0b 60 80 02 00 24 \[MMI\] addl r12=32,r1;; +[ ]*[a-f0-9]+: c0 40 05 00 48 00 addl r12=40,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; +[ ]*[a-f0-9]+: 0b 60 a0 02 00 24 \[MMI\] addl r12=40,r1;; +[ ]*[a-f0-9]+: c0 c0 05 00 48 00 addl r12=56,r1 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; +[ ]*[a-f0-9]+: 01 60 60 02 00 24 \[MII\] addl r12=24,r1 +[ ]*[a-f0-9]+: 00 00 00 02 00 00 nop.i 0x0 +[ ]*[a-f0-9]+: 00 00 04 00 nop.i 0x0;; diff --git a/ld/testsuite/ld-ia64/merge5.s b/ld/testsuite/ld-ia64/merge5.s new file mode 100644 index 0000000000000..81428c41cc59f --- /dev/null +++ b/ld/testsuite/ld-ia64/merge5.s @@ -0,0 +1,24 @@ + .section .rodata.str1.8,"aMS", 1 +.LC1: .string "foo" +.LC2: .string "foo" +.LC3: .string "bar" +.LC4: .string "bar" +.LC5: .string "bar" +.LC6: .string "bar" +.LC7: .string "baz" +.LC8: .string "baz" + .section .data.rel.local,"aw" + .quad .LC2 + .quad .LC4 + .quad .LC6 + .quad .LC7 + .section .rodata,"a" +.LC9: .string "mumble" + .balign 8 + .space 0x400000 + .text + addl r12=@ltoffx(.LC1),r1 ;; + addl r12=@ltoffx(.LC3),r1 ;; + addl r12=@ltoffx(.LC5),r1 ;; + addl r12=@ltoffx(.LC8),r1 ;; + addl r12=@ltoffx(.LC9),r1 ;; diff --git a/ld/testsuite/ld-ia64/tlsbin.dd b/ld/testsuite/ld-ia64/tlsbin.dd index d58157962b819..1c5bc2fe33fca 100644 --- a/ld/testsuite/ld-ia64/tlsbin.dd +++ b/ld/testsuite/ld-ia64/tlsbin.dd @@ -13,25 +13,25 @@ Disassembly of section .text: 40+1000: 10 10 15 06 80 05[ ]+\[MIB\][ ]+alloc r34=ar.pfs,5,3,0 40+1006: 10 02 00 62 00 00[ ]+mov r33=b0 40+100c: 00 00 00 20[ ]+nop.b 0x0 -40+1010: 0d 70 80 02 00 24[ ]+\[MFI\][ ]+addl r14=32,r1 +40+1010: 0d 70 .0 0. 00 24[ ]+\[MFI\][ ]+addl r14=(24|32|40|48|56|64),r1 40+1016: 00 00 00 02 00 e0[ ]+nop.f 0x0 -40+101c: 81 0a 00 90[ ]+addl r15=40,r1;; +40+101c: .1 0. 00 90[ ]+addl r15=(24|32|40|48|56|64),r1;; 40+1020: 19 18 01 1c 18 10[ ]+\[MMB\][ ]+ld8 r35=\[r14\] 40+1026: 40 02 3c 30 20 00[ ]+ld8 r36=\[r15\] 40+102c: [0-9a-f ]+br.call.sptk.many b0=[0-9a-f]+ <.*>;; -40+1030: 0d 70 c0 02 00 24[ ]+\[MFI\][ ]+addl r14=48,r1 +40+1030: 0d 70 .0 0. 00 24[ ]+\[MFI\][ ]+addl r14=(24|32|40|48|56|64),r1 40+1036: 00 00 00 02 00 e0[ ]+nop.f 0x0 -40+103c: 01 0c 00 90[ ]+addl r15=64,r1;; +40+103c: .1 0. 00 90[ ]+addl r15=(24|32|40|48|56|64),r1;; 40+1040: 19 18 01 1c 18 10[ ]+\[MMB\][ ]+ld8 r35=\[r14\] 40+1046: 40 02 3c 30 20 00[ ]+ld8 r36=\[r15\] 40+104c: [0-9a-f ]+br.call.sptk.many b0=[0-9a-f]+ <.*>;; -40+1050: 0d 70 c0 02 00 24[ ]+\[MFI\][ ]+addl r14=48,r1 +40+1050: 0d 70 .0 0. 00 24[ ]+\[MFI\][ ]+addl r14=(24|32|40|48|56|64),r1 40+1056: 00 00 00 02 00 80[ ]+nop.f 0x0 40+105c: 14 02 00 90[ ]+mov r36=33;; 40+1060: 1d 18 01 1c 18 10[ ]+\[MFB\][ ]+ld8 r35=\[r14\] 40+1066: 00 00 00 02 00 00[ ]+nop.f 0x0 40+106c: [0-9a-f ]+br.call.sptk.many b0=[0-9a-f]+ <.*>;; -40+1070: 0d 70 c0 02 00 24[ ]+\[MFI\][ ]+addl r14=48,r1 +40+1070: 0d 70 .0 0. 00 24[ ]+\[MFI\][ ]+addl r14=(24|32|40|48|56|64),r1 40+1076: 00 00 00 02 00 80[ ]+nop.f 0x0 40+107c: 04 00 00 84[ ]+mov r36=r0;; 40+1080: 1d 18 01 1c 18 10[ ]+\[MFB\][ ]+ld8 r35=\[r14\] @@ -51,11 +51,11 @@ Disassembly of section .text: 40+10cc: 08 00 84 00[ ]+br.ret.sptk.many b0;; 40+10d0 <_start>: -40+10d0: 0b 70 60 02 00 24[ ]+\[MMI\][ ]+addl r14=24,r1;; +40+10d0: 0b 70 .0 0. 00 24[ ]+\[MMI\][ ]+addl r14=(24|32|40|48|56|64),r1;; 40+10d6: e0 00 38 30 20 00[ ]+ld8 r14=\[r14\] 40+10dc: 00 00 04 00[ ]+nop.i 0x0;; 40+10e0: 0b 70 38 1a 00 20[ ]+\[MMI\][ ]+add r14=r14,r13;; -40+10e6: e0 c0 05 00 48 00[ ]+addl r14=56,r1 +40+10e6: e0 .0 0. 00 48 00[ ]+addl r14=(24|32|40|48|56|64),r1 40+10ec: 00 00 04 00[ ]+nop.i 0x0;; 40+10f0: 0b 70 00 1c 18 10[ ]+\[MMI\][ ]+ld8 r14=\[r14\];; 40+10f6: e0 70 34 00 40 00[ ]+add r14=r14,r13 diff --git a/ld/testsuite/ld-ia64/tlsbin.rd b/ld/testsuite/ld-ia64/tlsbin.rd index 1fff20301be95..4834338389756 100644 --- a/ld/testsuite/ld-ia64/tlsbin.rd +++ b/ld/testsuite/ld-ia64/tlsbin.rd @@ -66,7 +66,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 69 entries: +Symbol table '.symtab' contains 66 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -84,9 +84,6 @@ Symbol table '.symtab' contains 69 entries: .* SECTION LOCAL +DEFAULT +13 * .* SECTION LOCAL +DEFAULT +14 * .* SECTION LOCAL +DEFAULT +15 * -.* SECTION LOCAL +DEFAULT +16 * -.* SECTION LOCAL +DEFAULT +17 * -.* SECTION LOCAL +DEFAULT +18 * .* TLS +LOCAL +DEFAULT +11 sl1 .* TLS +LOCAL +DEFAULT +11 sl2 .* TLS +LOCAL +DEFAULT +11 sl3 diff --git a/ld/testsuite/ld-ia64/tlsbin.sd b/ld/testsuite/ld-ia64/tlsbin.sd index 5d8ab6590455d..411eedb6a3726 100644 --- a/ld/testsuite/ld-ia64/tlsbin.sd +++ b/ld/testsuite/ld-ia64/tlsbin.sd @@ -11,5 +11,5 @@ Contents of section .got: (60+)?1318 0+ 0+ 0+ 0+ .* (60+)?1328 0+ 0+ 0+ 0+ .* (60+)?1338 0+ 0+ 0+ 0+ .* - (60+)?1348 01000000 0+ 90000000 0+ .* - (60+)?1358 24000000 0+ .* + (60+)?1348 (00|01|24|90)000000 0+ (00|01|24|90)000000 0+ .* + (60+)?1358 (00|01|24|90)000000 0+ .* diff --git a/ld/testsuite/ld-ia64/tlspic.rd b/ld/testsuite/ld-ia64/tlspic.rd index c1efeb5469749..b3123a8ebe00a 100644 --- a/ld/testsuite/ld-ia64/tlspic.rd +++ b/ld/testsuite/ld-ia64/tlspic.rd @@ -59,11 +59,6 @@ Relocation section '.rela.IA_64.pltoff' at offset 0x[0-9a-f]+ contains 1 entries Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * -.* SECTION LOCAL +DEFAULT +7 * -.* SECTION LOCAL +DEFAULT +8 * -.* SECTION LOCAL +DEFAULT +10 * -.* SECTION LOCAL +DEFAULT +11 * -.* SECTION LOCAL +DEFAULT +14 * .* TLS +GLOBAL DEFAULT +10 sg8 .* TLS +GLOBAL DEFAULT +10 sg3 .* TLS +GLOBAL DEFAULT +10 sg4 @@ -78,7 +73,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 57 entries: +Symbol table '.symtab' contains 54 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -95,9 +90,6 @@ Symbol table '.symtab' contains 57 entries: .* SECTION LOCAL +DEFAULT +12 * .* SECTION LOCAL +DEFAULT +13 * .* SECTION LOCAL +DEFAULT +14 * -.* SECTION LOCAL +DEFAULT +15 * -.* SECTION LOCAL +DEFAULT +16 * -.* SECTION LOCAL +DEFAULT +17 * .* TLS +LOCAL +DEFAULT +10 sl1 .* TLS +LOCAL +DEFAULT +10 sl2 .* TLS +LOCAL +DEFAULT +10 sl3 diff --git a/ld/testsuite/ld-libs/lib-1.s b/ld/testsuite/ld-libs/lib-1.s new file mode 100644 index 0000000000000..7cc5e1d68c24a --- /dev/null +++ b/ld/testsuite/ld-libs/lib-1.s @@ -0,0 +1,2 @@ + .globl foo + .set foo,0x2000 diff --git a/ld/testsuite/ld-libs/lib-2.d b/ld/testsuite/ld-libs/lib-2.d new file mode 100644 index 0000000000000..b055417d5ea29 --- /dev/null +++ b/ld/testsuite/ld-libs/lib-2.d @@ -0,0 +1,4 @@ +#... +0+1000 A bar +0+2000 A foo +#pass diff --git a/ld/testsuite/ld-libs/lib-2.s b/ld/testsuite/ld-libs/lib-2.s new file mode 100644 index 0000000000000..af749d38e0316 --- /dev/null +++ b/ld/testsuite/ld-libs/lib-2.s @@ -0,0 +1,2 @@ + .globl bar + .set bar,0x1000 diff --git a/ld/testsuite/ld-libs/libs.exp b/ld/testsuite/ld-libs/libs.exp new file mode 100644 index 0000000000000..8609d65295897 --- /dev/null +++ b/ld/testsuite/ld-libs/libs.exp @@ -0,0 +1,9 @@ +file mkdir tmpdir/libtmp + +# Check that -l: works. The first "test" just creates an object file +# for the second one. +run_ld_link_tests { + {"-l: test (preparation)" "-r" "" {lib-1.s} {} "libtmp/anobject"} + {"-l: test" "-r -Ltmpdir/libtmp -l:anobject" "" {lib-2.s} + {{nm -C lib-2.d}} "lib-2"} +} diff --git a/ld/testsuite/ld-linkonce/x.s b/ld/testsuite/ld-linkonce/x.s index 6807cfcdeceec..d07f73eefe50e 100644 --- a/ld/testsuite/ld-linkonce/x.s +++ b/ld/testsuite/ld-linkonce/x.s @@ -1,8 +1,7 @@ ;# Main file, x.s, with the program (_start) referring to two ;# linkonce functions fn and fn2. The functions fn and fn2 are ;# supposed to be equivalent of C++ template instantiations; the -;# main file instantiates fn. There's the equivalent of an FDE -;# entry in .eh_frame, referring to fn via a local label. +;# main file instantiates fn. .text .global _start @@ -20,7 +19,29 @@ fn: .Lb: .size fn,.Lb-.La - .section .eh_frame,"aw",@progbits + .section .gcc_except_table,"aw",@progbits .long 2 .long .La .long .Lb-.La + + .section .eh_frame,"aw",@progbits +.Lframe1: + .long .LECIE1-.LSCIE1 +.LSCIE1: + .long 0x0 + .byte 0x1 + .byte 0 + .uleb128 0x1 + .sleb128 -4 + .byte 0 + .p2align 2 +.LECIE1: + +.LSFDE1: + .long .LEFDE1-.LASFDE1 +.LASFDE1: + .long .LASFDE1-.Lframe1 + .long .La + .long .Lb-.La + .p2align 2 +.LEFDE1: diff --git a/ld/testsuite/ld-linkonce/y.s b/ld/testsuite/ld-linkonce/y.s index b8ae3d2964380..c1eb511399888 100644 --- a/ld/testsuite/ld-linkonce/y.s +++ b/ld/testsuite/ld-linkonce/y.s @@ -2,7 +2,7 @@ ;# that this version of fn has different code, as if compiled ;# with different optimization flags than the one in x.s (not ;# important for this test, though). The reference from -;# .eh_frame to the linkonce-excluded fn2 must be zero, or g++ +;# .gcc_except_table to the linkonce-excluded fn2 must be zero, or g++ ;# EH will not work. .section .gnu.linkonce.t.fn2,"ax",@progbits @@ -23,7 +23,7 @@ fn: .Lf: .size fn,.Lf-.Le - .section .eh_frame,"aw",@progbits + .section .gcc_except_table,"aw",@progbits .long 7 .long .Lc .long .Ld-.Lc @@ -31,3 +31,34 @@ fn: .long 0x6066 .long .Le .long .Lf-.Le + + .section .eh_frame,"aw",@progbits +.Lframe1: + .long .LECIE1-.LSCIE1 +.LSCIE1: + .long 0x0 + .byte 0x1 + .byte 0 + .uleb128 0x1 + .sleb128 -4 + .byte 0 + .p2align 2 +.LECIE1: + +.LSFDE1: + .long .LEFDE1-.LASFDE1 +.LASFDE1: + .long .LASFDE1-.Lframe1 + .long .Lc + .long .Ld-.Lc + .p2align 2 +.LEFDE1: + +.LSFDE2: + .long .LEFDE2-.LASFDE2 +.LASFDE2: + .long .LASFDE2-.Lframe1 + .long .Le + .long .Lf-.Le + .p2align 2 +.LEFDE2: diff --git a/ld/testsuite/ld-linkonce/zeroeh.ld b/ld/testsuite/ld-linkonce/zeroeh.ld index 6550c17db9c22..b22eaa12c9c70 100644 --- a/ld/testsuite/ld-linkonce/zeroeh.ld +++ b/ld/testsuite/ld-linkonce/zeroeh.ld @@ -1,4 +1,5 @@ SECTIONS { .text 0xa00 : { *(.text); *(.gnu.linkonce.t.*) } - .eh_frame 0x2000 : { *(.eh_frame) } + .gcc_except_table 0x2000 : { *(.gcc_except_table) } + .eh_frame 0x4000 : { *(.eh_frame) } } diff --git a/ld/testsuite/ld-linkonce/zeroehl32.d b/ld/testsuite/ld-linkonce/zeroehl32.d index b84ebed370553..5b51836588c08 100644 --- a/ld/testsuite/ld-linkonce/zeroehl32.d +++ b/ld/testsuite/ld-linkonce/zeroehl32.d @@ -11,8 +11,11 @@ Contents of section \.text: 0a00 080a0000 100a0000 01000000 02000000 .* 0a10 03000000 .* -Contents of section \.eh_frame: +Contents of section \.gcc_except_table: 2000 02000000 080a0000 08000000 07000000 .* 2010 100a0000 04000000 66600000 00000000 .* 2020 04000000 .* -#pass +Contents of section \.eh_frame: + 4000 0c000000 00000000 0100017c 00000000 .* + 4010 0c000000 14000000 080a0000 08000000 .* + 4020 0c000000 24000000 100a0000 04000000 .* diff --git a/ld/testsuite/ld-m68k/m68k.exp b/ld/testsuite/ld-m68k/m68k.exp index 346aa06408dc8..bf89a607c1232 100644 --- a/ld/testsuite/ld-m68k/m68k.exp +++ b/ld/testsuite/ld-m68k/m68k.exp @@ -54,3 +54,12 @@ run_dump_test "merge-error-1e" run_dump_test "merge-ok-1a" run_dump_test "merge-ok-1b" run_dump_test "merge-ok-1c" + +foreach { id sources } { a { plt1.s } b { plt1-empty.s plt1.s } } { + foreach arch { 68020 cpu32 isab isac } { + run_ld_link_tests [list \ + [list "PLT 1$id ($arch)" "-shared -T plt1.ld" "-m$arch" \ + $sources [list [list objdump -dr plt1-$arch.d]] \ + plt1-${id}-${arch}.so]] + } +} diff --git a/ld/testsuite/ld-m68k/merge-error-1a.d b/ld/testsuite/ld-m68k/merge-error-1a.d index ab3ef6e8306ff..3629f39e55c78 100644 --- a/ld/testsuite/ld-m68k/merge-error-1a.d +++ b/ld/testsuite/ld-m68k/merge-error-1a.d @@ -1,4 +1,4 @@ #source: merge-error-1a.s -mcpu=cpu32 #source: merge-error-1b.s -mcpu=68000 #ld: -r -#warning: .* +#error: ^[^\n]* m68k:68000 [^\n]* incompatible with m68k:cpu32 [^\n]*$ diff --git a/ld/testsuite/ld-m68k/merge-error-1b.d b/ld/testsuite/ld-m68k/merge-error-1b.d index 291d42ff042e0..bedd3d6480d9f 100644 --- a/ld/testsuite/ld-m68k/merge-error-1b.d +++ b/ld/testsuite/ld-m68k/merge-error-1b.d @@ -1,4 +1,4 @@ #source: merge-error-1a.s -mcpu=cpu32 #source: merge-error-1b.s -mcpu=5207 #ld: -r -#warning: .* +#error: ^[^\n]* m68k:isa-aplus:emac [^\n]* incompatible with m68k:cpu32 [^\n]*$ diff --git a/ld/testsuite/ld-m68k/merge-error-1c.d b/ld/testsuite/ld-m68k/merge-error-1c.d index e74528097c3b9..9538e7722c653 100644 --- a/ld/testsuite/ld-m68k/merge-error-1c.d +++ b/ld/testsuite/ld-m68k/merge-error-1c.d @@ -1,4 +1,4 @@ #source: merge-error-1a.s -march=isaaplus #source: merge-error-1b.s -march=isab #ld: -r -#warning: .* +#error: ^[^\n]* m68k:isa-b [^\n]* incompatible with m68k:isa-aplus [^\n]*$ diff --git a/ld/testsuite/ld-m68k/merge-error-1d.d b/ld/testsuite/ld-m68k/merge-error-1d.d index 310bf4326bd0d..4d86771a47544 100644 --- a/ld/testsuite/ld-m68k/merge-error-1d.d +++ b/ld/testsuite/ld-m68k/merge-error-1d.d @@ -1,4 +1,4 @@ #source: merge-error-1a.s -march=isaa -mmac #source: merge-error-1b.s -march=isaa -memac #ld: -r -#warning: .* +#error: ^[^\n]* m68k:isa-a:emac [^\n]* incompatible with m68k:isa-a:mac [^\n]*$ diff --git a/ld/testsuite/ld-m68k/merge-error-1e.d b/ld/testsuite/ld-m68k/merge-error-1e.d index 87a2bf93f3cc1..969f84440fbfd 100644 --- a/ld/testsuite/ld-m68k/merge-error-1e.d +++ b/ld/testsuite/ld-m68k/merge-error-1e.d @@ -1,4 +1,4 @@ #source: merge-error-1a.s -march=isaa -mno-div -mmac #source: merge-error-1b.s -march=isaa -mno-div -memac #ld: -r -#warning: .* +#error: ^[^\n]* m68k:isa-a:emac [^\n]* is incompatible with m68k:isa-a:mac [^\n]*$ diff --git a/ld/testsuite/ld-m68k/plt1-68020.d b/ld/testsuite/ld-m68k/plt1-68020.d new file mode 100644 index 0000000000000..54463b9168ffc --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1-68020.d @@ -0,0 +1,35 @@ + +.*: file format elf32-m68k + +Disassembly of section \.plt: + +00020800 <f.@plt-0x14>: + 20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@- + 20806: fc02 + 20808: 4efb 0171 0000 jmp %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\)@\(0*\) + 2080e: fbfe + 20810: 0000 0000 orib #0,%d0 + +00020814 <f.@plt>: + 20814: 4efb 0171 0000 jmp %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\)@\(0*\) + 2081a: fbf6 + 2081c: 2f3c 0000 0000 movel #0,%sp@- + 20822: 60ff ffff ffdc bral 20800 <f.@plt-0x14> + +00020828 <f.@plt>: + 20828: 4efb 0171 0000 jmp %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\)@\(0*\) + 2082e: fbe6 + 20830: 2f3c 0000 000c movel #12,%sp@- + 20836: 60ff ffff ffc8 bral 20800 <f.@plt-0x14> + +0002083c <f.@plt>: + 2083c: 4efb 0171 0000 jmp %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\)@\(0*\) + 20842: fbd6 + 20844: 2f3c 0000 0018 movel #24,%sp@- + 2084a: 60ff ffff ffb4 bral 20800 <f.@plt-0x14> +Disassembly of section \.text: + +00020c00 <.*>: + 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> + 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> + 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt> diff --git a/ld/testsuite/ld-m68k/plt1-cpu32.d b/ld/testsuite/ld-m68k/plt1-cpu32.d new file mode 100644 index 0000000000000..a4977406e6a29 --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1-cpu32.d @@ -0,0 +1,43 @@ + +.*: file format elf32-m68k + +Disassembly of section \.plt: + +00020800 <f.@plt-0x18>: + 20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@- + 20806: fc02 + 20808: 227b 0170 0000 moveal %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\),%a1 + 2080e: fbfe + 20810: 4ed1 jmp %a1@ + 20812: 0000 0000 orib #0,%d0 + \.\.\. + +00020818 <f.@plt>: + 20818: 227b 0170 0000 moveal %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\),%a1 + 2081e: fbf2 + 20820: 4ed1 jmp %a1@ + 20822: 2f3c 0000 0000 movel #0,%sp@- + 20828: 60ff ffff ffd6 bral 20800 <f.@plt-0x18> + \.\.\. + +00020830 <f.@plt>: + 20830: 227b 0170 0000 moveal %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\),%a1 + 20836: fbde + 20838: 4ed1 jmp %a1@ + 2083a: 2f3c 0000 000c movel #12,%sp@- + 20840: 60ff ffff ffbe bral 20800 <f.@plt-0x18> + \.\.\. + +00020848 <f.@plt>: + 20848: 227b 0170 0000 moveal %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\),%a1 + 2084e: fbca + 20850: 4ed1 jmp %a1@ + 20852: 2f3c 0000 0018 movel #24,%sp@- + 20858: 60ff ffff ffa6 bral 20800 <f.@plt-0x18> + \.\.\. +Disassembly of section \.text: + +00020c00 <.*>: + 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> + 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> + 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt> diff --git a/ld/testsuite/ld-m68k/plt1-empty.s b/ld/testsuite/ld-m68k/plt1-empty.s new file mode 100644 index 0000000000000..a59477db39cdb --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1-empty.s @@ -0,0 +1,3 @@ + .text + .globl foo +foo: diff --git a/ld/testsuite/ld-m68k/plt1-isab.d b/ld/testsuite/ld-m68k/plt1-isab.d new file mode 100644 index 0000000000000..a9aeacbe475cd --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1-isab.d @@ -0,0 +1,44 @@ + +.*: file format elf32-m68k + +Disassembly of section \.plt: + +00020800 <f.@plt-0x18>: +# _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02 + 20800: 203c 0000 fc02 movel #64514,%d0 + 20806: 2f3b 08fa movel %pc@\(20802 <f.@plt-0x16>,%d0:l\),%sp@- +# _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc + 2080a: 203c 0000 fbfc movel #64508,%d0 + 20810: 207b 08fa moveal %pc@\(2080c <f.@plt-0xc>,%d0:l\),%a0 + 20814: 4ed0 jmp %a0@ + 20816: 4e71 nop + +00020818 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 12 == 0x3040c == 0x2081a + 0xfbf2 + 20818: 203c 0000 fbf2 movel #64498,%d0 + 2081e: 207b 08fa moveal %pc@\(2081a <f.@plt\+0x2>,%d0:l\),%a0 + 20822: 4ed0 jmp %a0@ + 20824: 2f3c 0000 0000 movel #0,%sp@- + 2082a: 60ff ffff ffd4 bral 20800 <f.@plt-0x18> + +00020830 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde + 20830: 203c 0000 fbde movel #64478,%d0 + 20836: 207b 08fa moveal %pc@\(20832 <f.@plt\+0x2>,%d0:l\),%a0 + 2083a: 4ed0 jmp %a0@ + 2083c: 2f3c 0000 000c movel #12,%sp@- + 20842: 60ff ffff ffbc bral 20800 <f.@plt-0x18> + +00020848 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca + 20848: 203c 0000 fbca movel #64458,%d0 + 2084e: 207b 08fa moveal %pc@\(2084a <f.@plt\+0x2>,%d0:l\),%a0 + 20852: 4ed0 jmp %a0@ + 20854: 2f3c 0000 0018 movel #24,%sp@- + 2085a: 60ff ffff ffa4 bral 20800 <f.@plt-0x18> +Disassembly of section \.text: + +00020c00 <.*>: + 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> + 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> + 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt> diff --git a/ld/testsuite/ld-m68k/plt1-isac.d b/ld/testsuite/ld-m68k/plt1-isac.d new file mode 100644 index 0000000000000..ae299ce92b3d5 --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1-isac.d @@ -0,0 +1,44 @@ + +.*: file format elf32-m68k + +Disassembly of section \.plt: + +00020800 <f.@plt-0x18>: +# _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02 + 20800: 203c 0000 fc02 movel #64514,%d0 + 20806: 2ebb 08fa movel %pc@\(20802 <f.@plt-0x16>,%d0:l\),%sp@ +# _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc + 2080a: 203c 0000 fbfc movel #64508,%d0 + 20810: 207b 08fa moveal %pc@\(2080c <f.@plt-0xc>,%d0:l\),%a0 + 20814: 4ed0 jmp %a0@ + 20816: 4e71 nop + +00020818 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 12 == 0x3040c == 0x2081a + 0xfbf2 + 20818: 203c 0000 fbf2 movel #64498,%d0 + 2081e: 207b 08fa moveal %pc@\(2081a <f.@plt\+0x2>,%d0:l\),%a0 + 20822: 4ed0 jmp %a0@ + 20824: 2f3c 0000 0000 movel #0,%sp@- + 2082a: 61ff ffff ffd4 bsrl 20800 <f.@plt-0x18> + +00020830 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde + 20830: 203c 0000 fbde movel #64478,%d0 + 20836: 207b 08fa moveal %pc@\(20832 <f.@plt\+0x2>,%d0:l\),%a0 + 2083a: 4ed0 jmp %a0@ + 2083c: 2f3c 0000 000c movel #12,%sp@- + 20842: 61ff ffff ffbc bsrl 20800 <f.@plt-0x18> + +00020848 <f.@plt>: +# _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca + 20848: 203c 0000 fbca movel #64458,%d0 + 2084e: 207b 08fa moveal %pc@\(2084a <f.@plt\+0x2>,%d0:l\),%a0 + 20852: 4ed0 jmp %a0@ + 20854: 2f3c 0000 0018 movel #24,%sp@- + 2085a: 61ff ffff ffa4 bsrl 20800 <f.@plt-0x18> +Disassembly of section \.text: + +00020c00 <.*>: + 20c00: 61ff ffff fc.. bsrl 208.. <f1@plt> + 20c06: 61ff ffff fc.. bsrl 208.. <f2@plt> + 20c0c: 61ff ffff fc.. bsrl 208.. <f3@plt> diff --git a/ld/testsuite/ld-m68k/plt1.ld b/ld/testsuite/ld-m68k/plt1.ld new file mode 100644 index 0000000000000..718e2adfb4295 --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1.ld @@ -0,0 +1,23 @@ +SECTIONS +{ + . = 0x20000; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + + . = ALIGN (0x400); + .rela.plt : { *(.rela.plt) } + + . = ALIGN (0x400); + .plt : { *(.plt) } + + . = ALIGN (0x400); + .text : { *(.text) } + + . = ALIGN (0x10000); + .dynamic : { *(.dynamic) } + + . = ALIGN (0x400); + .got : { *(.got.plt) *(.got) } +} diff --git a/ld/testsuite/ld-m68k/plt1.s b/ld/testsuite/ld-m68k/plt1.s new file mode 100644 index 0000000000000..855fb192add7e --- /dev/null +++ b/ld/testsuite/ld-m68k/plt1.s @@ -0,0 +1,3 @@ + bsr.l f1@PLTPC + bsr.l f2@PLTPC + bsr.l f3@PLTPC diff --git a/ld/testsuite/ld-mep/mep.exp b/ld/testsuite/ld-mep/mep.exp new file mode 100644 index 0000000000000..812e407e2cab1 --- /dev/null +++ b/ld/testsuite/ld-mep/mep.exp @@ -0,0 +1,35 @@ +# Expect script for ld-mep tests +# Copyright 2002 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +# +# Written by DJ Delorie (dj@redhat.com) +# + +# Test MeP linking for special cases. + +if ![istarget mep*-*-*] { + return +} + +set testbsrweak "MeP bsr to undefined weak function" + +if ![ld_assemble $as "$srcdir/$subdir/mep1.s" tmpdir/mep1.o] { + unresolved $testbsrweak +} else { if ![ld_simple_link $ld tmpdir/mep1 "-T$srcdir/$subdir/mep1.ld tmpdir/mep1.o"] { + fail $testbsrweak +} else { + pass $testbsrweak +} } diff --git a/ld/testsuite/ld-mep/mep1.ld b/ld/testsuite/ld-mep/mep1.ld new file mode 100644 index 0000000000000..d0a41043b6274 --- /dev/null +++ b/ld/testsuite/ld-mep/mep1.ld @@ -0,0 +1,8 @@ +SECTIONS +{ + /* This is beyond the normal range of a PCREL24 (bsr) relocation. */ + . = 0x100000; + .text1 : { *(.text1) } + . = 0x900000; + .text2 : { *(.text2) } +} diff --git a/ld/testsuite/ld-mep/mep1.s b/ld/testsuite/ld-mep/mep1.s new file mode 100644 index 0000000000000..ab5414f655e7c --- /dev/null +++ b/ld/testsuite/ld-mep/mep1.s @@ -0,0 +1,13 @@ + .weak bar + + # This will be in low memory. + .section .text1,"ax" + bsr bar + jmp bar + + # This will be in high memory. + .section .text2,"ax" + # This needs special handling + bsr bar + # This shouldn't + jmp bar diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-0.s b/ld/testsuite/ld-mips-elf/attr-gnu-4-0.s new file mode 100644 index 0000000000000..a1437461d0474 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-0.s @@ -0,0 +1 @@ +.gnu_attribute 4,0 diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d new file mode 100644 index 0000000000000..cd9535626dccc --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-00.d @@ -0,0 +1,7 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-0.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d new file mode 100644 index 0000000000000..3e68405e12742 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-1.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-mdouble-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d new file mode 100644 index 0000000000000..0641a85a776dd --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-02.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-2.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-msingle-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d new file mode 100644 index 0000000000000..64f03f564fc0b --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-03.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-3.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Soft float diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-1.s b/ld/testsuite/ld-mips-elf/attr-gnu-4-1.s new file mode 100644 index 0000000000000..e985a56f6b1ad --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-1.s @@ -0,0 +1 @@ +.gnu_attribute 4,1 diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d new file mode 100644 index 0000000000000..d57dd968a08c6 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-10.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-0.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-mdouble-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d new file mode 100644 index 0000000000000..d694508bfab9f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-1.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-mdouble-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d new file mode 100644 index 0000000000000..3ee602577f5d2 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-12.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-2.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses -msingle-float, .* uses -mdouble-float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d new file mode 100644 index 0000000000000..a48c119cbd23f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-13.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-3.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses hard float, .* uses soft float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d new file mode 100644 index 0000000000000..7b15327d9921d --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-14.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-4.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses unknown floating point ABI 4 +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-2.s b/ld/testsuite/ld-mips-elf/attr-gnu-4-2.s new file mode 100644 index 0000000000000..54ebf4ed8ddb8 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-2.s @@ -0,0 +1 @@ +.gnu_attribute 4,2 diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d new file mode 100644 index 0000000000000..7ea84ab69f19f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-20.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-0.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-msingle-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d new file mode 100644 index 0000000000000..3f8486778bfb8 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-21.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-1.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses -msingle-float, .* uses -mdouble-float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d new file mode 100644 index 0000000000000..603e5c19f97a7 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-22.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-2.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Hard float \(-msingle-float\) diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d new file mode 100644 index 0000000000000..c0c14fd9e98c2 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-23.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-3.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses hard float, .* uses soft float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-3.s b/ld/testsuite/ld-mips-elf/attr-gnu-4-3.s new file mode 100644 index 0000000000000..32e5f5d1af4a8 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-3.s @@ -0,0 +1 @@ +.gnu_attribute 4,3 diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d new file mode 100644 index 0000000000000..d123328b7bd46 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-30.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-3.s +#source: attr-gnu-4-0.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Soft float diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d new file mode 100644 index 0000000000000..6a629e719015c --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-31.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-3.s +#source: attr-gnu-4-1.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses hard float, .* uses soft float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d new file mode 100644 index 0000000000000..824d46757e8f8 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-32.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-3.s +#source: attr-gnu-4-2.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses hard float, .* uses soft float +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d new file mode 100644 index 0000000000000..28d9d31d88244 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-33.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-3.s +#source: attr-gnu-4-3.s +#as: -EB -32 +#ld: -r -melf32btsmip +#readelf: -A +#target: mips*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_MIPS_ABI_FP: Soft float diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-4.s b/ld/testsuite/ld-mips-elf/attr-gnu-4-4.s new file mode 100644 index 0000000000000..3ff129ae7a40e --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-4.s @@ -0,0 +1 @@ +.gnu_attribute 4,4 diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d new file mode 100644 index 0000000000000..5fffe75d566fe --- /dev/null +++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-4.s +#source: attr-gnu-4-1.s +#as: -EB -32 +#ld: -r -melf32btsmip +#warning: Warning: .* uses unknown floating point ABI 4 +#target: mips*-*-* diff --git a/ld/testsuite/ld-mips-elf/branch-misc-1.d b/ld/testsuite/ld-mips-elf/branch-misc-1.d index 36bceb7960350..0cd370126af2e 100644 --- a/ld/testsuite/ld-mips-elf/branch-misc-1.d +++ b/ld/testsuite/ld-mips-elf/branch-misc-1.d @@ -1,7 +1,7 @@ #name: MIPS branch-misc-1 #source: ../../../gas/testsuite/gas/mips/branch-misc-1.s #objdump: --prefix-addresses -tdr --show-raw-insn -#ld: -Ttext 0x500000 -e 0x500000 -N +#ld: -Ttext 0x20000000 -e 0x20000000 -N .*: file format elf.*mips.* @@ -11,18 +11,18 @@ Disassembly of section \.text: \.\.\. \.\.\. \.\.\. -0+50003c <[^>]*> 0411fff0 bal 0+500000 <[^>]*> -0+500040 <[^>]*> 00000000 nop -0+500044 <[^>]*> 0411fff3 bal 0+500014 <[^>]*> -0+500048 <[^>]*> 00000000 nop -0+50004c <[^>]*> 0411fff6 bal 0+500028 <[^>]*> -0+500050 <[^>]*> 00000000 nop -0+500054 <[^>]*> 0411000a bal 0+500080 <[^>]*> -0+500058 <[^>]*> 00000000 nop -0+50005c <[^>]*> 0411000d bal 0+500094 <[^>]*> -0+500060 <[^>]*> 00000000 nop -0+500064 <[^>]*> 04110010 bal 0+5000a8 <[^>]*> -0+500068 <[^>]*> 00000000 nop +0*2000003c <[^>]*> 0411fff0 bal 0*20000000 <[^>]*> +0*20000040 <[^>]*> 00000000 nop +0*20000044 <[^>]*> 0411fff3 bal 0*20000014 <[^>]*> +0*20000048 <[^>]*> 00000000 nop +0*2000004c <[^>]*> 0411fff6 bal 0*20000028 <[^>]*> +0*20000050 <[^>]*> 00000000 nop +0*20000054 <[^>]*> 0411000a bal 0*20000080 <[^>]*> +0*20000058 <[^>]*> 00000000 nop +0*2000005c <[^>]*> 0411000d bal 0*20000094 <[^>]*> +0*20000060 <[^>]*> 00000000 nop +0*20000064 <[^>]*> 04110010 bal 0*200000a8 <[^>]*> +0*20000068 <[^>]*> 00000000 nop \.\.\. \.\.\. \.\.\. diff --git a/ld/testsuite/ld-mips-elf/eh-frame1-n32.d b/ld/testsuite/ld-mips-elf/eh-frame1-n32.d index 4e3321951c0fe..cda12b6a3110f 100644 --- a/ld/testsuite/ld-mips-elf/eh-frame1-n32.d +++ b/ld/testsuite/ld-mips-elf/eh-frame1-n32.d @@ -7,19 +7,19 @@ Relocation section '\.rel\.dyn' .*: *Offset .* -00000000 00000000 R_MIPS_NONE * +00000000 [0-9a-f]+ R_MIPS_NONE * # Initial PCs for the FDEs attached to CIE 0xbc -000300dc 00000003 R_MIPS_REL32 * -000300f0 00000003 R_MIPS_REL32 * +000300dc [0-9a-f]+ R_MIPS_REL32 * +000300f0 [0-9a-f]+ R_MIPS_REL32 * # Likewise CIE 0x220 -00030240 00000003 R_MIPS_REL32 * -00030254 00000003 R_MIPS_REL32 * -0003008b 00000503 R_MIPS_REL32 00000000 foo -000300d0 00000503 R_MIPS_REL32 00000000 foo -0003010e 00000503 R_MIPS_REL32 00000000 foo -000301ef 00000503 R_MIPS_REL32 00000000 foo -00030234 00000503 R_MIPS_REL32 00000000 foo -00030272 00000503 R_MIPS_REL32 00000000 foo +00030240 [0-9a-f]+ R_MIPS_REL32 * +00030254 [0-9a-f]+ R_MIPS_REL32 * +0003008b [0-9a-f]+ R_MIPS_REL32 00000000 foo +000300d0 [0-9a-f]+ R_MIPS_REL32 00000000 foo +0003010e [0-9a-f]+ R_MIPS_REL32 00000000 foo +000301ef [0-9a-f]+ R_MIPS_REL32 00000000 foo +00030234 [0-9a-f]+ R_MIPS_REL32 00000000 foo +00030272 [0-9a-f]+ R_MIPS_REL32 00000000 foo #... The section \.eh_frame contains: diff --git a/ld/testsuite/ld-mips-elf/eh-frame1-n64.d b/ld/testsuite/ld-mips-elf/eh-frame1-n64.d index 2b175e051f45e..ccb77e1d67b70 100644 --- a/ld/testsuite/ld-mips-elf/eh-frame1-n64.d +++ b/ld/testsuite/ld-mips-elf/eh-frame1-n64.d @@ -7,39 +7,39 @@ Relocation section '\.rel\.dyn' .*: *Offset .* -000000000000 000000000000 R_MIPS_NONE * +000000000000 [0-9a-f]+ R_MIPS_NONE * *Type2: R_MIPS_NONE * *Type3: R_MIPS_NONE * # Initial PCs for the FDEs attached to CIE 0x120 -000000030148 000000001203 R_MIPS_REL32 * +000000030148 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030168 000000001203 R_MIPS_REL32 * +000000030168 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * # Likewise CIE 0x340 -000000030368 000000001203 R_MIPS_REL32 * +000000030368 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030388 000000001203 R_MIPS_REL32 * +000000030388 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000300cb 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000300cb [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030138 000500001203 R_MIPS_REL32 0000000000000000 foo +000000030138 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030192 000500001203 R_MIPS_REL32 0000000000000000 foo +000000030192 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000302eb 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000302eb [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030358 000500001203 R_MIPS_REL32 0000000000000000 foo +000000030358 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000303b2 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000303b2 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * #... diff --git a/ld/testsuite/ld-mips-elf/eh-frame2-n32.d b/ld/testsuite/ld-mips-elf/eh-frame2-n32.d index 134565862327c..160b7a8fe7251 100644 --- a/ld/testsuite/ld-mips-elf/eh-frame2-n32.d +++ b/ld/testsuite/ld-mips-elf/eh-frame2-n32.d @@ -7,19 +7,19 @@ Relocation section '\.rel\.dyn' .*: *Offset .* -00000000 00000000 R_MIPS_NONE * +00000000 [0-9a-f]+ R_MIPS_NONE * # Initial PCs for the FDEs attached to CIE 0xb8 -000300d8 00000003 R_MIPS_REL32 * -000300ec 00000003 R_MIPS_REL32 * +000300d8 [0-9a-f]+ R_MIPS_REL32 * +000300ec [0-9a-f]+ R_MIPS_REL32 * # Likewise CIE 0x218 -00030238 00000003 R_MIPS_REL32 * -0003024c 00000003 R_MIPS_REL32 * -0003008b 00000503 R_MIPS_REL32 00000000 foo -000300cc 00000503 R_MIPS_REL32 00000000 foo -0003010a 00000503 R_MIPS_REL32 00000000 foo -000301eb 00000503 R_MIPS_REL32 00000000 foo -0003022c 00000503 R_MIPS_REL32 00000000 foo -0003026a 00000503 R_MIPS_REL32 00000000 foo +00030238 [0-9a-f]+ R_MIPS_REL32 * +0003024c [0-9a-f]+ R_MIPS_REL32 * +0003008b [0-9a-f]+ R_MIPS_REL32 00000000 foo +000300cc [0-9a-f]+ R_MIPS_REL32 00000000 foo +0003010a [0-9a-f]+ R_MIPS_REL32 00000000 foo +000301eb [0-9a-f]+ R_MIPS_REL32 00000000 foo +0003022c [0-9a-f]+ R_MIPS_REL32 00000000 foo +0003026a [0-9a-f]+ R_MIPS_REL32 00000000 foo #... The section \.eh_frame contains: diff --git a/ld/testsuite/ld-mips-elf/eh-frame2-n64.d b/ld/testsuite/ld-mips-elf/eh-frame2-n64.d index b817bbc67ef54..9bc490eb9df9f 100644 --- a/ld/testsuite/ld-mips-elf/eh-frame2-n64.d +++ b/ld/testsuite/ld-mips-elf/eh-frame2-n64.d @@ -7,39 +7,39 @@ Relocation section '\.rel\.dyn' .*: *Offset .* -000000000000 000000000000 R_MIPS_NONE * +000000000000 [0-9a-f]+ R_MIPS_NONE * *Type2: R_MIPS_NONE * *Type3: R_MIPS_NONE * # Initial PCs for the FDEs attached to CIE 0x118 -000000030140 000000001203 R_MIPS_REL32 * +000000030140 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030160 000000001203 R_MIPS_REL32 * +000000030160 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * # Likewise CIE 0x330 -000000030358 000000001203 R_MIPS_REL32 * +000000030358 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030378 000000001203 R_MIPS_REL32 * +000000030378 [0-9a-f]+ R_MIPS_REL32 * *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000300cb 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000300cb [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030130 000500001203 R_MIPS_REL32 0000000000000000 foo +000000030130 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -00000003018a 000500001203 R_MIPS_REL32 0000000000000000 foo +00000003018a [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000302e3 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000302e3 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -000000030348 000500001203 R_MIPS_REL32 0000000000000000 foo +000000030348 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * -0000000303a2 000500001203 R_MIPS_REL32 0000000000000000 foo +0000000303a2 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo *Type2: R_MIPS_64 * *Type3: R_MIPS_NONE * #... diff --git a/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d b/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d index 5b3df078626a7..d1619d5688f04 100644 --- a/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d +++ b/ld/testsuite/ld-mips-elf/elf-rel-got-n32.d @@ -6,309 +6,310 @@ .*: +file format elf32-n.*mips.* +Disassembly of section \.reginfo: + +10000098 <\.reginfo>: +10000098: 92020022 .* + \.\.\. +100000ac: 100185a0 .* + Disassembly of section \.text: -100000a0 <fn>: -100000a0: 8f858064 lw a1,-32668\(gp\) -100000a4: 8f858064 lw a1,-32668\(gp\) -100000a8: 24a5000c addiu a1,a1,12 -100000ac: 8f858064 lw a1,-32668\(gp\) -100000b0: 3c010001 lui at,0x1 -100000b4: 3421e240 ori at,at,0xe240 -100000b8: 00a12821 addu a1,a1,at +100000b0 <fn>: +100000b0: 8f858064 lw a1,-32668\(gp\) +100000b4: 8f858064 lw a1,-32668\(gp\) +100000b8: 24a5000c addiu a1,a1,12 100000bc: 8f858064 lw a1,-32668\(gp\) -100000c0: 00b12821 addu a1,a1,s1 -100000c4: 8f858064 lw a1,-32668\(gp\) -100000c8: 24a5000c addiu a1,a1,12 -100000cc: 00b12821 addu a1,a1,s1 -100000d0: 8f858064 lw a1,-32668\(gp\) -100000d4: 3c010001 lui at,0x1 -100000d8: 3421e240 ori at,at,0xe240 -100000dc: 00a12821 addu a1,a1,at -100000e0: 00b12821 addu a1,a1,s1 -100000e4: 8f858018 lw a1,-32744\(gp\) -100000e8: 8ca5050c lw a1,1292\(a1\) -100000ec: 8f858018 lw a1,-32744\(gp\) -100000f0: 8ca50518 lw a1,1304\(a1\) +100000c0: 3c010001 lui at,0x1 +100000c4: 3421e240 ori at,at,0xe240 +100000c8: 00a12821 addu a1,a1,at +100000cc: 8f858064 lw a1,-32668\(gp\) +100000d0: 00b12821 addu a1,a1,s1 +100000d4: 8f858064 lw a1,-32668\(gp\) +100000d8: 24a5000c addiu a1,a1,12 +100000dc: 00b12821 addu a1,a1,s1 +100000e0: 8f858064 lw a1,-32668\(gp\) +100000e4: 3c010001 lui at,0x1 +100000e8: 3421e240 ori at,at,0xe240 +100000ec: 00a12821 addu a1,a1,at +100000f0: 00b12821 addu a1,a1,s1 100000f4: 8f858018 lw a1,-32744\(gp\) -100000f8: 00b12821 addu a1,a1,s1 -100000fc: 8ca5050c lw a1,1292\(a1\) -10000100: 8f858018 lw a1,-32744\(gp\) -10000104: 00b12821 addu a1,a1,s1 -10000108: 8ca50518 lw a1,1304\(a1\) -1000010c: 8f818018 lw at,-32744\(gp\) -10000110: 00250821 addu at,at,a1 -10000114: 8c25052e lw a1,1326\(at\) -10000118: 8f818018 lw at,-32744\(gp\) -1000011c: 00250821 addu at,at,a1 -10000120: ac250544 sw a1,1348\(at\) -10000124: 8f818064 lw at,-32668\(gp\) -10000128: 88250000 lwl a1,0\(at\) -1000012c: 98250003 lwr a1,3\(at\) -10000130: 8f818064 lw at,-32668\(gp\) -10000134: 2421000c addiu at,at,12 +100000f8: 8ca504fc lw a1,1276\(a1\) +100000fc: 8f858018 lw a1,-32744\(gp\) +10000100: 8ca50508 lw a1,1288\(a1\) +10000104: 8f858018 lw a1,-32744\(gp\) +10000108: 00b12821 addu a1,a1,s1 +1000010c: 8ca504fc lw a1,1276\(a1\) +10000110: 8f858018 lw a1,-32744\(gp\) +10000114: 00b12821 addu a1,a1,s1 +10000118: 8ca50508 lw a1,1288\(a1\) +1000011c: 8f818018 lw at,-32744\(gp\) +10000120: 00250821 addu at,at,a1 +10000124: 8c25051e lw a1,1310\(at\) +10000128: 8f818018 lw at,-32744\(gp\) +1000012c: 00250821 addu at,at,a1 +10000130: ac250534 sw a1,1332\(at\) +10000134: 8f818064 lw at,-32668\(gp\) 10000138: 88250000 lwl a1,0\(at\) 1000013c: 98250003 lwr a1,3\(at\) 10000140: 8f818064 lw at,-32668\(gp\) -10000144: 00310821 addu at,at,s1 +10000144: 2421000c addiu at,at,12 10000148: 88250000 lwl a1,0\(at\) 1000014c: 98250003 lwr a1,3\(at\) 10000150: 8f818064 lw at,-32668\(gp\) -10000154: 2421000c addiu at,at,12 -10000158: 00310821 addu at,at,s1 -1000015c: 88250000 lwl a1,0\(at\) -10000160: 98250003 lwr a1,3\(at\) -10000164: 8f818064 lw at,-32668\(gp\) -10000168: 24210022 addiu at,at,34 -1000016c: 00250821 addu at,at,a1 -10000170: 88250000 lwl a1,0\(at\) -10000174: 98250003 lwr a1,3\(at\) -10000178: 8f818064 lw at,-32668\(gp\) -1000017c: 24210038 addiu at,at,56 -10000180: 00250821 addu at,at,a1 -10000184: a8250000 swl a1,0\(at\) -10000188: b8250003 swr a1,3\(at\) -1000018c: 8f85801c lw a1,-32740\(gp\) -10000190: 8f858020 lw a1,-32736\(gp\) -10000194: 8f858024 lw a1,-32732\(gp\) -10000198: 8f85801c lw a1,-32740\(gp\) -1000019c: 00b12821 addu a1,a1,s1 +10000154: 00310821 addu at,at,s1 +10000158: 88250000 lwl a1,0\(at\) +1000015c: 98250003 lwr a1,3\(at\) +10000160: 8f818064 lw at,-32668\(gp\) +10000164: 2421000c addiu at,at,12 +10000168: 00310821 addu at,at,s1 +1000016c: 88250000 lwl a1,0\(at\) +10000170: 98250003 lwr a1,3\(at\) +10000174: 8f818064 lw at,-32668\(gp\) +10000178: 24210022 addiu at,at,34 +1000017c: 00250821 addu at,at,a1 +10000180: 88250000 lwl a1,0\(at\) +10000184: 98250003 lwr a1,3\(at\) +10000188: 8f818064 lw at,-32668\(gp\) +1000018c: 24210038 addiu at,at,56 +10000190: 00250821 addu at,at,a1 +10000194: a8250000 swl a1,0\(at\) +10000198: b8250003 swr a1,3\(at\) +1000019c: 8f85801c lw a1,-32740\(gp\) 100001a0: 8f858020 lw a1,-32736\(gp\) -100001a4: 00b12821 addu a1,a1,s1 -100001a8: 8f858024 lw a1,-32732\(gp\) +100001a4: 8f858024 lw a1,-32732\(gp\) +100001a8: 8f85801c lw a1,-32740\(gp\) 100001ac: 00b12821 addu a1,a1,s1 -100001b0: 8f858018 lw a1,-32744\(gp\) -100001b4: 8ca5050c lw a1,1292\(a1\) -100001b8: 8f858018 lw a1,-32744\(gp\) -100001bc: 8ca50518 lw a1,1304\(a1\) +100001b0: 8f858020 lw a1,-32736\(gp\) +100001b4: 00b12821 addu a1,a1,s1 +100001b8: 8f858024 lw a1,-32732\(gp\) +100001bc: 00b12821 addu a1,a1,s1 100001c0: 8f858018 lw a1,-32744\(gp\) -100001c4: 00b12821 addu a1,a1,s1 -100001c8: 8ca5050c lw a1,1292\(a1\) -100001cc: 8f858018 lw a1,-32744\(gp\) -100001d0: 00b12821 addu a1,a1,s1 -100001d4: 8ca50518 lw a1,1304\(a1\) -100001d8: 8f818018 lw at,-32744\(gp\) -100001dc: 00250821 addu at,at,a1 -100001e0: 8c25052e lw a1,1326\(at\) -100001e4: 8f818018 lw at,-32744\(gp\) -100001e8: 00250821 addu at,at,a1 -100001ec: ac250544 sw a1,1348\(at\) -100001f0: 8f81801c lw at,-32740\(gp\) -100001f4: 88250000 lwl a1,0\(at\) -100001f8: 98250003 lwr a1,3\(at\) -100001fc: 8f818020 lw at,-32736\(gp\) -10000200: 88250000 lwl a1,0\(at\) -10000204: 98250003 lwr a1,3\(at\) -10000208: 8f81801c lw at,-32740\(gp\) -1000020c: 00310821 addu at,at,s1 +100001c4: 8ca504fc lw a1,1276\(a1\) +100001c8: 8f858018 lw a1,-32744\(gp\) +100001cc: 8ca50508 lw a1,1288\(a1\) +100001d0: 8f858018 lw a1,-32744\(gp\) +100001d4: 00b12821 addu a1,a1,s1 +100001d8: 8ca504fc lw a1,1276\(a1\) +100001dc: 8f858018 lw a1,-32744\(gp\) +100001e0: 00b12821 addu a1,a1,s1 +100001e4: 8ca50508 lw a1,1288\(a1\) +100001e8: 8f818018 lw at,-32744\(gp\) +100001ec: 00250821 addu at,at,a1 +100001f0: 8c25051e lw a1,1310\(at\) +100001f4: 8f818018 lw at,-32744\(gp\) +100001f8: 00250821 addu at,at,a1 +100001fc: ac250534 sw a1,1332\(at\) +10000200: 8f81801c lw at,-32740\(gp\) +10000204: 88250000 lwl a1,0\(at\) +10000208: 98250003 lwr a1,3\(at\) +1000020c: 8f818020 lw at,-32736\(gp\) 10000210: 88250000 lwl a1,0\(at\) 10000214: 98250003 lwr a1,3\(at\) -10000218: 8f818020 lw at,-32736\(gp\) +10000218: 8f81801c lw at,-32740\(gp\) 1000021c: 00310821 addu at,at,s1 10000220: 88250000 lwl a1,0\(at\) 10000224: 98250003 lwr a1,3\(at\) -10000228: 8f818028 lw at,-32728\(gp\) -1000022c: 00250821 addu at,at,a1 +10000228: 8f818020 lw at,-32736\(gp\) +1000022c: 00310821 addu at,at,s1 10000230: 88250000 lwl a1,0\(at\) 10000234: 98250003 lwr a1,3\(at\) -10000238: 8f81802c lw at,-32724\(gp\) +10000238: 8f818028 lw at,-32728\(gp\) 1000023c: 00250821 addu at,at,a1 -10000240: a8250000 swl a1,0\(at\) -10000244: b8250003 swr a1,3\(at\) -10000248: 8f85805c lw a1,-32676\(gp\) -1000024c: 8f858030 lw a1,-32720\(gp\) -10000250: 8f99805c lw t9,-32676\(gp\) -10000254: 8f998030 lw t9,-32720\(gp\) -10000258: 8f99805c lw t9,-32676\(gp\) -1000025c: 0320f809 jalr t9 -10000260: 00000000 nop +10000240: 88250000 lwl a1,0\(at\) +10000244: 98250003 lwr a1,3\(at\) +10000248: 8f81802c lw at,-32724\(gp\) +1000024c: 00250821 addu at,at,a1 +10000250: a8250000 swl a1,0\(at\) +10000254: b8250003 swr a1,3\(at\) +10000258: 8f85805c lw a1,-32676\(gp\) +1000025c: 8f858030 lw a1,-32720\(gp\) +10000260: 8f99805c lw t9,-32676\(gp\) 10000264: 8f998030 lw t9,-32720\(gp\) -10000268: 0320f809 jalr t9 -1000026c: 00000000 nop -10000270: 8f858068 lw a1,-32664\(gp\) -10000274: 8f858068 lw a1,-32664\(gp\) -10000278: 24a5000c addiu a1,a1,12 -1000027c: 8f858068 lw a1,-32664\(gp\) -10000280: 3c010001 lui at,0x1 -10000284: 3421e240 ori at,at,0xe240 -10000288: 00a12821 addu a1,a1,at +10000268: 8f99805c lw t9,-32676\(gp\) +1000026c: 0320f809 jalr t9 +10000270: 00000000 nop +10000274: 8f998030 lw t9,-32720\(gp\) +10000278: 0320f809 jalr t9 +1000027c: 00000000 nop +10000280: 8f858068 lw a1,-32664\(gp\) +10000284: 8f858068 lw a1,-32664\(gp\) +10000288: 24a5000c addiu a1,a1,12 1000028c: 8f858068 lw a1,-32664\(gp\) -10000290: 00b12821 addu a1,a1,s1 -10000294: 8f858068 lw a1,-32664\(gp\) -10000298: 24a5000c addiu a1,a1,12 -1000029c: 00b12821 addu a1,a1,s1 -100002a0: 8f858068 lw a1,-32664\(gp\) -100002a4: 3c010001 lui at,0x1 -100002a8: 3421e240 ori at,at,0xe240 -100002ac: 00a12821 addu a1,a1,at -100002b0: 00b12821 addu a1,a1,s1 -100002b4: 8f858018 lw a1,-32744\(gp\) -100002b8: 8ca50584 lw a1,1412\(a1\) -100002bc: 8f858018 lw a1,-32744\(gp\) -100002c0: 8ca50590 lw a1,1424\(a1\) +10000290: 3c010001 lui at,0x1 +10000294: 3421e240 ori at,at,0xe240 +10000298: 00a12821 addu a1,a1,at +1000029c: 8f858068 lw a1,-32664\(gp\) +100002a0: 00b12821 addu a1,a1,s1 +100002a4: 8f858068 lw a1,-32664\(gp\) +100002a8: 24a5000c addiu a1,a1,12 +100002ac: 00b12821 addu a1,a1,s1 +100002b0: 8f858068 lw a1,-32664\(gp\) +100002b4: 3c010001 lui at,0x1 +100002b8: 3421e240 ori at,at,0xe240 +100002bc: 00a12821 addu a1,a1,at +100002c0: 00b12821 addu a1,a1,s1 100002c4: 8f858018 lw a1,-32744\(gp\) -100002c8: 00b12821 addu a1,a1,s1 -100002cc: 8ca50584 lw a1,1412\(a1\) -100002d0: 8f858018 lw a1,-32744\(gp\) -100002d4: 00b12821 addu a1,a1,s1 -100002d8: 8ca50590 lw a1,1424\(a1\) -100002dc: 8f818018 lw at,-32744\(gp\) -100002e0: 00250821 addu at,at,a1 -100002e4: 8c2505a6 lw a1,1446\(at\) -100002e8: 8f818018 lw at,-32744\(gp\) -100002ec: 00250821 addu at,at,a1 -100002f0: ac2505bc sw a1,1468\(at\) -100002f4: 8f818068 lw at,-32664\(gp\) -100002f8: 88250000 lwl a1,0\(at\) -100002fc: 98250003 lwr a1,3\(at\) -10000300: 8f818068 lw at,-32664\(gp\) -10000304: 2421000c addiu at,at,12 +100002c8: 8ca50574 lw a1,1396\(a1\) +100002cc: 8f858018 lw a1,-32744\(gp\) +100002d0: 8ca50580 lw a1,1408\(a1\) +100002d4: 8f858018 lw a1,-32744\(gp\) +100002d8: 00b12821 addu a1,a1,s1 +100002dc: 8ca50574 lw a1,1396\(a1\) +100002e0: 8f858018 lw a1,-32744\(gp\) +100002e4: 00b12821 addu a1,a1,s1 +100002e8: 8ca50580 lw a1,1408\(a1\) +100002ec: 8f818018 lw at,-32744\(gp\) +100002f0: 00250821 addu at,at,a1 +100002f4: 8c250596 lw a1,1430\(at\) +100002f8: 8f818018 lw at,-32744\(gp\) +100002fc: 00250821 addu at,at,a1 +10000300: ac2505ac sw a1,1452\(at\) +10000304: 8f818068 lw at,-32664\(gp\) 10000308: 88250000 lwl a1,0\(at\) 1000030c: 98250003 lwr a1,3\(at\) 10000310: 8f818068 lw at,-32664\(gp\) -10000314: 00310821 addu at,at,s1 +10000314: 2421000c addiu at,at,12 10000318: 88250000 lwl a1,0\(at\) 1000031c: 98250003 lwr a1,3\(at\) 10000320: 8f818068 lw at,-32664\(gp\) -10000324: 2421000c addiu at,at,12 -10000328: 00310821 addu at,at,s1 -1000032c: 88250000 lwl a1,0\(at\) -10000330: 98250003 lwr a1,3\(at\) -10000334: 8f818068 lw at,-32664\(gp\) -10000338: 24210022 addiu at,at,34 -1000033c: 00250821 addu at,at,a1 -10000340: 88250000 lwl a1,0\(at\) -10000344: 98250003 lwr a1,3\(at\) -10000348: 8f818068 lw at,-32664\(gp\) -1000034c: 24210038 addiu at,at,56 -10000350: 00250821 addu at,at,a1 -10000354: a8250000 swl a1,0\(at\) -10000358: b8250003 swr a1,3\(at\) -1000035c: 8f858034 lw a1,-32716\(gp\) -10000360: 8f858038 lw a1,-32712\(gp\) -10000364: 8f85803c lw a1,-32708\(gp\) -10000368: 8f858034 lw a1,-32716\(gp\) -1000036c: 00b12821 addu a1,a1,s1 +10000324: 00310821 addu at,at,s1 +10000328: 88250000 lwl a1,0\(at\) +1000032c: 98250003 lwr a1,3\(at\) +10000330: 8f818068 lw at,-32664\(gp\) +10000334: 2421000c addiu at,at,12 +10000338: 00310821 addu at,at,s1 +1000033c: 88250000 lwl a1,0\(at\) +10000340: 98250003 lwr a1,3\(at\) +10000344: 8f818068 lw at,-32664\(gp\) +10000348: 24210022 addiu at,at,34 +1000034c: 00250821 addu at,at,a1 +10000350: 88250000 lwl a1,0\(at\) +10000354: 98250003 lwr a1,3\(at\) +10000358: 8f818068 lw at,-32664\(gp\) +1000035c: 24210038 addiu at,at,56 +10000360: 00250821 addu at,at,a1 +10000364: a8250000 swl a1,0\(at\) +10000368: b8250003 swr a1,3\(at\) +1000036c: 8f858034 lw a1,-32716\(gp\) 10000370: 8f858038 lw a1,-32712\(gp\) -10000374: 00b12821 addu a1,a1,s1 -10000378: 8f85803c lw a1,-32708\(gp\) +10000374: 8f85803c lw a1,-32708\(gp\) +10000378: 8f858034 lw a1,-32716\(gp\) 1000037c: 00b12821 addu a1,a1,s1 -10000380: 8f858018 lw a1,-32744\(gp\) -10000384: 8ca50584 lw a1,1412\(a1\) -10000388: 8f858018 lw a1,-32744\(gp\) -1000038c: 8ca50590 lw a1,1424\(a1\) +10000380: 8f858038 lw a1,-32712\(gp\) +10000384: 00b12821 addu a1,a1,s1 +10000388: 8f85803c lw a1,-32708\(gp\) +1000038c: 00b12821 addu a1,a1,s1 10000390: 8f858018 lw a1,-32744\(gp\) -10000394: 00b12821 addu a1,a1,s1 -10000398: 8ca50584 lw a1,1412\(a1\) -1000039c: 8f858018 lw a1,-32744\(gp\) -100003a0: 00b12821 addu a1,a1,s1 -100003a4: 8ca50590 lw a1,1424\(a1\) -100003a8: 8f818018 lw at,-32744\(gp\) -100003ac: 00250821 addu at,at,a1 -100003b0: 8c2505a6 lw a1,1446\(at\) -100003b4: 8f818018 lw at,-32744\(gp\) -100003b8: 00250821 addu at,at,a1 -100003bc: ac2505bc sw a1,1468\(at\) -100003c0: 8f818034 lw at,-32716\(gp\) -100003c4: 88250000 lwl a1,0\(at\) -100003c8: 98250003 lwr a1,3\(at\) -100003cc: 8f818038 lw at,-32712\(gp\) -100003d0: 88250000 lwl a1,0\(at\) -100003d4: 98250003 lwr a1,3\(at\) -100003d8: 8f818034 lw at,-32716\(gp\) -100003dc: 00310821 addu at,at,s1 +10000394: 8ca50574 lw a1,1396\(a1\) +10000398: 8f858018 lw a1,-32744\(gp\) +1000039c: 8ca50580 lw a1,1408\(a1\) +100003a0: 8f858018 lw a1,-32744\(gp\) +100003a4: 00b12821 addu a1,a1,s1 +100003a8: 8ca50574 lw a1,1396\(a1\) +100003ac: 8f858018 lw a1,-32744\(gp\) +100003b0: 00b12821 addu a1,a1,s1 +100003b4: 8ca50580 lw a1,1408\(a1\) +100003b8: 8f818018 lw at,-32744\(gp\) +100003bc: 00250821 addu at,at,a1 +100003c0: 8c250596 lw a1,1430\(at\) +100003c4: 8f818018 lw at,-32744\(gp\) +100003c8: 00250821 addu at,at,a1 +100003cc: ac2505ac sw a1,1452\(at\) +100003d0: 8f818034 lw at,-32716\(gp\) +100003d4: 88250000 lwl a1,0\(at\) +100003d8: 98250003 lwr a1,3\(at\) +100003dc: 8f818038 lw at,-32712\(gp\) 100003e0: 88250000 lwl a1,0\(at\) 100003e4: 98250003 lwr a1,3\(at\) -100003e8: 8f818038 lw at,-32712\(gp\) +100003e8: 8f818034 lw at,-32716\(gp\) 100003ec: 00310821 addu at,at,s1 100003f0: 88250000 lwl a1,0\(at\) 100003f4: 98250003 lwr a1,3\(at\) -100003f8: 8f818040 lw at,-32704\(gp\) -100003fc: 00250821 addu at,at,a1 +100003f8: 8f818038 lw at,-32712\(gp\) +100003fc: 00310821 addu at,at,s1 10000400: 88250000 lwl a1,0\(at\) 10000404: 98250003 lwr a1,3\(at\) -10000408: 8f818044 lw at,-32700\(gp\) +10000408: 8f818040 lw at,-32704\(gp\) 1000040c: 00250821 addu at,at,a1 -10000410: a8250000 swl a1,0\(at\) -10000414: b8250003 swr a1,3\(at\) -10000418: 8f858060 lw a1,-32672\(gp\) -1000041c: 8f858048 lw a1,-32696\(gp\) -10000420: 8f998060 lw t9,-32672\(gp\) -10000424: 8f998048 lw t9,-32696\(gp\) -10000428: 8f998060 lw t9,-32672\(gp\) -1000042c: 0320f809 jalr t9 -10000430: 00000000 nop +10000410: 88250000 lwl a1,0\(at\) +10000414: 98250003 lwr a1,3\(at\) +10000418: 8f818044 lw at,-32700\(gp\) +1000041c: 00250821 addu at,at,a1 +10000420: a8250000 swl a1,0\(at\) +10000424: b8250003 swr a1,3\(at\) +10000428: 8f858060 lw a1,-32672\(gp\) +1000042c: 8f858048 lw a1,-32696\(gp\) +10000430: 8f998060 lw t9,-32672\(gp\) 10000434: 8f998048 lw t9,-32696\(gp\) -10000438: 0320f809 jalr t9 -1000043c: 00000000 nop -10000440: 1000ff17 b 100000a0 <fn> -10000444: 8f858064 lw a1,-32668\(gp\) -10000448: 8f858018 lw a1,-32744\(gp\) -1000044c: 10000015 b 100004a4 <fn2> -10000450: 8ca50584 lw a1,1412\(a1\) -10000454: 1000ff12 b 100000a0 <fn> -10000458: 8f85801c lw a1,-32740\(gp\) -1000045c: 8f858038 lw a1,-32712\(gp\) -10000460: 10000010 b 100004a4 <fn2> -10000464: 00000000 nop -10000468: 8f858024 lw a1,-32732\(gp\) -1000046c: 1000ff0c b 100000a0 <fn> -10000470: 00000000 nop -10000474: 8f858018 lw a1,-32744\(gp\) -10000478: 1000000a b 100004a4 <fn2> -1000047c: 8ca50584 lw a1,1412\(a1\) -10000480: 8f858018 lw a1,-32744\(gp\) -10000484: 1000ff06 b 100000a0 <fn> -10000488: 8ca50518 lw a1,1304\(a1\) -1000048c: 8f818018 lw at,-32744\(gp\) -10000490: 00250821 addu at,at,a1 -10000494: 10000003 b 100004a4 <fn2> -10000498: 8c2505a6 lw a1,1446\(at\) +10000438: 8f998060 lw t9,-32672\(gp\) +1000043c: 0320f809 jalr t9 +10000440: 00000000 nop +10000444: 8f998048 lw t9,-32696\(gp\) +10000448: 0320f809 jalr t9 +1000044c: 00000000 nop +10000450: 1000ff17 b 100000b0 <fn> +10000454: 8f858064 lw a1,-32668\(gp\) +10000458: 8f858018 lw a1,-32744\(gp\) +1000045c: 10000015 b 100004b4 <fn2> +10000460: 8ca50574 lw a1,1396\(a1\) +10000464: 1000ff12 b 100000b0 <fn> +10000468: 8f85801c lw a1,-32740\(gp\) +1000046c: 8f858038 lw a1,-32712\(gp\) +10000470: 10000010 b 100004b4 <fn2> +10000474: 00000000 nop +10000478: 8f858024 lw a1,-32732\(gp\) +1000047c: 1000ff0c b 100000b0 <fn> +10000480: 00000000 nop +10000484: 8f858018 lw a1,-32744\(gp\) +10000488: 1000000a b 100004b4 <fn2> +1000048c: 8ca50574 lw a1,1396\(a1\) +10000490: 8f858018 lw a1,-32744\(gp\) +10000494: 1000ff06 b 100000b0 <fn> +10000498: 8ca50508 lw a1,1288\(a1\) +1000049c: 8f818018 lw at,-32744\(gp\) +100004a0: 00250821 addu at,at,a1 +100004a4: 10000003 b 100004b4 <fn2> +100004a8: 8c250596 lw a1,1430\(at\) \.\.\. -100004a4 <fn2>: - \.\.\. -Disassembly of section \.reginfo: - -100004b0 <\.reginfo>: -100004b0: 92020022 .* +100004b4 <fn2>: \.\.\. -100004c4: 101085b0 .* Disassembly of section \.data: -101004d0 <_fdata>: +100104c0 <_fdata>: \.\.\. -1010050c <dg1>: +100104fc <dg1>: \.\.\. -10100548 <sp2>: +10010538 <sp2>: \.\.\. -10100584 <dg2>: +10010574 <dg2>: \.\.\. Disassembly of section \.got: -101005c0 <_GLOBAL_OFFSET_TABLE_>: -101005c0: 00000000 .* -101005c4: 80000000 .* -101005c8: 10100000 .* -101005cc: 1010050c .* -101005d0: 10100518 .* -101005d4: 1011e74c .* -101005d8: 1010052e .* -101005dc: 10100544 .* -101005e0: 100000a0 .* -101005e4: 10100584 .* -101005e8: 10100590 .* -101005ec: 1011e7c4 .* -101005f0: 101005a6 .* -101005f4: 101005bc .* -101005f8: 100004a4 .* -101005fc: 00000000 .* +100105b0 <_GLOBAL_OFFSET_TABLE_>: +100105b0: 00000000 .* +100105b4: 80000000 .* +100105b8: 10010000 .* +100105bc: 100104fc .* +100105c0: 10010508 .* +100105c4: 1002e73c .* +100105c8: 1001051e .* +100105cc: 10010534 .* +100105d0: 100000b0 .* +100105d4: 10010574 .* +100105d8: 10010580 .* +100105dc: 1002e7b4 .* +100105e0: 10010596 .* +100105e4: 100105ac .* +100105e8: 100004b4 .* +100105ec: 00000000 .* \.\.\. -1010060c: 100000a0 .* -10100610: 100004a4 .* -10100614: 1010050c .* -10100618: 10100584 .* +100105fc: 100000b0 .* +10010600: 100004b4 .* +10010604: 100104fc .* +10010608: 10010574 .* #pass diff --git a/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d b/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d index f885d9dc6d42c..94c3097435d65 100644 --- a/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d +++ b/ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d @@ -14,7 +14,7 @@ Disassembly of section \.MIPS\.options: 1200000b8: 92020022 .* \.\.\. 1200000d0: 00000001 .* - 1200000d4: 201085d0 .* + 1200000d4: 200185d0 .* Disassembly of section \.text: 00000001200000e0 <fn>: @@ -279,55 +279,55 @@ Disassembly of section \.text: \.\.\. Disassembly of section \.data: -00000001201004f0 <_fdata>: +00000001200104f0 <_fdata>: \.\.\. -000000012010052c <dg1>: +000000012001052c <dg1>: \.\.\. -0000000120100568 <sp2>: +0000000120010568 <sp2>: \.\.\. -00000001201005a4 <dg2>: +00000001200105a4 <dg2>: \.\.\. Disassembly of section \.got: -00000001201005e0 <_GLOBAL_OFFSET_TABLE_>: +00000001200105e0 <_GLOBAL_OFFSET_TABLE_>: \.\.\. - 1201005ec: 80000000 .* - 1201005f0: 00000001 .* - 1201005f4: 20100000 .* - 1201005f8: 00000001 .* - 1201005fc: 2010052c .* - 120100600: 00000001 .* - 120100604: 20100538 .* - 120100608: 00000001 .* - 12010060c: 2011e76c .* - 120100610: 00000001 .* - 120100614: 2010054e .* - 120100618: 00000001 .* - 12010061c: 20100564 .* - 120100620: 00000001 .* - 120100624: 200000e0 .* - 120100628: 00000001 .* - 12010062c: 201005a4 .* - 120100630: 00000001 .* - 120100634: 201005b0 .* - 120100638: 00000001 .* - 12010063c: 2011e7e4 .* - 120100640: 00000001 .* - 120100644: 201005c6 .* - 120100648: 00000001 .* - 12010064c: 201005dc .* - 120100650: 00000001 .* - 120100654: 200004e4 .* + 1200105ec: 80000000 .* + 1200105f0: 00000001 .* + 1200105f4: 20010000 .* + 1200105f8: 00000001 .* + 1200105fc: 2001052c .* + 120010600: 00000001 .* + 120010604: 20010538 .* + 120010608: 00000001 .* + 12001060c: 2002e76c .* + 120010610: 00000001 .* + 120010614: 2001054e .* + 120010618: 00000001 .* + 12001061c: 20010564 .* + 120010620: 00000001 .* + 120010624: 200000e0 .* + 120010628: 00000001 .* + 12001062c: 200105a4 .* + 120010630: 00000001 .* + 120010634: 200105b0 .* + 120010638: 00000001 .* + 12001063c: 2002e7e4 .* + 120010640: 00000001 .* + 120010644: 200105c6 .* + 120010648: 00000001 .* + 12001064c: 200105dc .* + 120010650: 00000001 .* + 120010654: 200004e4 .* \.\.\. - 120100678: 00000001 .* - 12010067c: 200000e0 .* - 120100680: 00000001 .* - 120100684: 200004e4 .* - 120100688: 00000001 .* - 12010068c: 2010052c .* - 120100690: 00000001 .* - 120100694: 201005a4 .* + 120010678: 00000001 .* + 12001067c: 200000e0 .* + 120010680: 00000001 .* + 120010684: 200004e4 .* + 120010688: 00000001 .* + 12001068c: 2001052c .* + 120010690: 00000001 .* + 120010694: 200105a4 .* #pass diff --git a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d index 0f992f592551e..097ec33ea88ac 100644 --- a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d +++ b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d @@ -6,423 +6,424 @@ .*: +file format elf32-n.*mips.* +Disassembly of section \.reginfo: + +10000098 <\.reginfo>: +10000098: 92020022 .* + \.\.\. +100000ac: 10018790 .* + Disassembly of section \.text: -100000a0 <fn>: -100000a0: 3c050000 lui a1,0x0 -100000a4: 00bc2821 addu a1,a1,gp -100000a8: 8ca58034 lw a1,-32716\(a1\) -100000ac: 3c050000 lui a1,0x0 -100000b0: 00bc2821 addu a1,a1,gp -100000b4: 8ca58034 lw a1,-32716\(a1\) -100000b8: 24a5000c addiu a1,a1,12 +100000b0 <fn>: +100000b0: 3c050000 lui a1,0x0 +100000b4: 00bc2821 addu a1,a1,gp +100000b8: 8ca58034 lw a1,-32716\(a1\) 100000bc: 3c050000 lui a1,0x0 100000c0: 00bc2821 addu a1,a1,gp 100000c4: 8ca58034 lw a1,-32716\(a1\) -100000c8: 3c010001 lui at,0x1 -100000cc: 3421e240 ori at,at,0xe240 -100000d0: 00a12821 addu a1,a1,at -100000d4: 3c050000 lui a1,0x0 -100000d8: 00bc2821 addu a1,a1,gp -100000dc: 8ca58034 lw a1,-32716\(a1\) -100000e0: 00b12821 addu a1,a1,s1 +100000c8: 24a5000c addiu a1,a1,12 +100000cc: 3c050000 lui a1,0x0 +100000d0: 00bc2821 addu a1,a1,gp +100000d4: 8ca58034 lw a1,-32716\(a1\) +100000d8: 3c010001 lui at,0x1 +100000dc: 3421e240 ori at,at,0xe240 +100000e0: 00a12821 addu a1,a1,at 100000e4: 3c050000 lui a1,0x0 100000e8: 00bc2821 addu a1,a1,gp 100000ec: 8ca58034 lw a1,-32716\(a1\) -100000f0: 24a5000c addiu a1,a1,12 -100000f4: 00b12821 addu a1,a1,s1 -100000f8: 3c050000 lui a1,0x0 -100000fc: 00bc2821 addu a1,a1,gp -10000100: 8ca58034 lw a1,-32716\(a1\) -10000104: 3c010001 lui at,0x1 -10000108: 3421e240 ori at,at,0xe240 -1000010c: 00a12821 addu a1,a1,at -10000110: 00b12821 addu a1,a1,s1 -10000114: 3c050000 lui a1,0x0 -10000118: 00bc2821 addu a1,a1,gp -1000011c: 8ca58034 lw a1,-32716\(a1\) -10000120: 8ca50000 lw a1,0\(a1\) +100000f0: 00b12821 addu a1,a1,s1 +100000f4: 3c050000 lui a1,0x0 +100000f8: 00bc2821 addu a1,a1,gp +100000fc: 8ca58034 lw a1,-32716\(a1\) +10000100: 24a5000c addiu a1,a1,12 +10000104: 00b12821 addu a1,a1,s1 +10000108: 3c050000 lui a1,0x0 +1000010c: 00bc2821 addu a1,a1,gp +10000110: 8ca58034 lw a1,-32716\(a1\) +10000114: 3c010001 lui at,0x1 +10000118: 3421e240 ori at,at,0xe240 +1000011c: 00a12821 addu a1,a1,at +10000120: 00b12821 addu a1,a1,s1 10000124: 3c050000 lui a1,0x0 10000128: 00bc2821 addu a1,a1,gp 1000012c: 8ca58034 lw a1,-32716\(a1\) -10000130: 8ca5000c lw a1,12\(a1\) +10000130: 8ca50000 lw a1,0\(a1\) 10000134: 3c050000 lui a1,0x0 10000138: 00bc2821 addu a1,a1,gp 1000013c: 8ca58034 lw a1,-32716\(a1\) -10000140: 00b12821 addu a1,a1,s1 -10000144: 8ca50000 lw a1,0\(a1\) -10000148: 3c050000 lui a1,0x0 -1000014c: 00bc2821 addu a1,a1,gp -10000150: 8ca58034 lw a1,-32716\(a1\) -10000154: 00b12821 addu a1,a1,s1 -10000158: 8ca5000c lw a1,12\(a1\) -1000015c: 3c010000 lui at,0x0 -10000160: 003c0821 addu at,at,gp -10000164: 8c218034 lw at,-32716\(at\) -10000168: 00250821 addu at,at,a1 -1000016c: 8c250022 lw a1,34\(at\) -10000170: 3c010000 lui at,0x0 -10000174: 003c0821 addu at,at,gp -10000178: 8c218034 lw at,-32716\(at\) -1000017c: 00250821 addu at,at,a1 -10000180: ac250038 sw a1,56\(at\) -10000184: 3c010000 lui at,0x0 -10000188: 003c0821 addu at,at,gp -1000018c: 8c218034 lw at,-32716\(at\) -10000190: 88250000 lwl a1,0\(at\) -10000194: 98250003 lwr a1,3\(at\) -10000198: 3c010000 lui at,0x0 -1000019c: 003c0821 addu at,at,gp -100001a0: 8c218034 lw at,-32716\(at\) -100001a4: 2421000c addiu at,at,12 -100001a8: 88250000 lwl a1,0\(at\) -100001ac: 98250003 lwr a1,3\(at\) -100001b0: 3c010000 lui at,0x0 -100001b4: 003c0821 addu at,at,gp -100001b8: 8c218034 lw at,-32716\(at\) -100001bc: 00310821 addu at,at,s1 -100001c0: 88250000 lwl a1,0\(at\) -100001c4: 98250003 lwr a1,3\(at\) -100001c8: 3c010000 lui at,0x0 -100001cc: 003c0821 addu at,at,gp -100001d0: 8c218034 lw at,-32716\(at\) -100001d4: 2421000c addiu at,at,12 -100001d8: 00310821 addu at,at,s1 -100001dc: 88250000 lwl a1,0\(at\) -100001e0: 98250003 lwr a1,3\(at\) -100001e4: 3c010000 lui at,0x0 -100001e8: 003c0821 addu at,at,gp -100001ec: 8c218034 lw at,-32716\(at\) -100001f0: 24210022 addiu at,at,34 -100001f4: 00250821 addu at,at,a1 -100001f8: 88250000 lwl a1,0\(at\) -100001fc: 98250003 lwr a1,3\(at\) -10000200: 3c010000 lui at,0x0 -10000204: 003c0821 addu at,at,gp -10000208: 8c218034 lw at,-32716\(at\) -1000020c: 24210038 addiu at,at,56 -10000210: 00250821 addu at,at,a1 -10000214: a8250000 swl a1,0\(at\) -10000218: b8250003 swr a1,3\(at\) -1000021c: 8f858018 lw a1,-32744\(gp\) -10000220: 24a506fc addiu a1,a1,1788 -10000224: 8f858018 lw a1,-32744\(gp\) -10000228: 24a50708 addiu a1,a1,1800 -1000022c: 8f85801c lw a1,-32740\(gp\) -10000230: 24a5e93c addiu a1,a1,-5828 +10000140: 8ca5000c lw a1,12\(a1\) +10000144: 3c050000 lui a1,0x0 +10000148: 00bc2821 addu a1,a1,gp +1000014c: 8ca58034 lw a1,-32716\(a1\) +10000150: 00b12821 addu a1,a1,s1 +10000154: 8ca50000 lw a1,0\(a1\) +10000158: 3c050000 lui a1,0x0 +1000015c: 00bc2821 addu a1,a1,gp +10000160: 8ca58034 lw a1,-32716\(a1\) +10000164: 00b12821 addu a1,a1,s1 +10000168: 8ca5000c lw a1,12\(a1\) +1000016c: 3c010000 lui at,0x0 +10000170: 003c0821 addu at,at,gp +10000174: 8c218034 lw at,-32716\(at\) +10000178: 00250821 addu at,at,a1 +1000017c: 8c250022 lw a1,34\(at\) +10000180: 3c010000 lui at,0x0 +10000184: 003c0821 addu at,at,gp +10000188: 8c218034 lw at,-32716\(at\) +1000018c: 00250821 addu at,at,a1 +10000190: ac250038 sw a1,56\(at\) +10000194: 3c010000 lui at,0x0 +10000198: 003c0821 addu at,at,gp +1000019c: 8c218034 lw at,-32716\(at\) +100001a0: 88250000 lwl a1,0\(at\) +100001a4: 98250003 lwr a1,3\(at\) +100001a8: 3c010000 lui at,0x0 +100001ac: 003c0821 addu at,at,gp +100001b0: 8c218034 lw at,-32716\(at\) +100001b4: 2421000c addiu at,at,12 +100001b8: 88250000 lwl a1,0\(at\) +100001bc: 98250003 lwr a1,3\(at\) +100001c0: 3c010000 lui at,0x0 +100001c4: 003c0821 addu at,at,gp +100001c8: 8c218034 lw at,-32716\(at\) +100001cc: 00310821 addu at,at,s1 +100001d0: 88250000 lwl a1,0\(at\) +100001d4: 98250003 lwr a1,3\(at\) +100001d8: 3c010000 lui at,0x0 +100001dc: 003c0821 addu at,at,gp +100001e0: 8c218034 lw at,-32716\(at\) +100001e4: 2421000c addiu at,at,12 +100001e8: 00310821 addu at,at,s1 +100001ec: 88250000 lwl a1,0\(at\) +100001f0: 98250003 lwr a1,3\(at\) +100001f4: 3c010000 lui at,0x0 +100001f8: 003c0821 addu at,at,gp +100001fc: 8c218034 lw at,-32716\(at\) +10000200: 24210022 addiu at,at,34 +10000204: 00250821 addu at,at,a1 +10000208: 88250000 lwl a1,0\(at\) +1000020c: 98250003 lwr a1,3\(at\) +10000210: 3c010000 lui at,0x0 +10000214: 003c0821 addu at,at,gp +10000218: 8c218034 lw at,-32716\(at\) +1000021c: 24210038 addiu at,at,56 +10000220: 00250821 addu at,at,a1 +10000224: a8250000 swl a1,0\(at\) +10000228: b8250003 swr a1,3\(at\) +1000022c: 8f858018 lw a1,-32744\(gp\) +10000230: 24a506ec addiu a1,a1,1772 10000234: 8f858018 lw a1,-32744\(gp\) -10000238: 24a506fc addiu a1,a1,1788 -1000023c: 00b12821 addu a1,a1,s1 -10000240: 8f858018 lw a1,-32744\(gp\) -10000244: 24a50708 addiu a1,a1,1800 -10000248: 00b12821 addu a1,a1,s1 -1000024c: 8f85801c lw a1,-32740\(gp\) -10000250: 24a5e93c addiu a1,a1,-5828 -10000254: 00b12821 addu a1,a1,s1 -10000258: 8f858018 lw a1,-32744\(gp\) -1000025c: 8ca506fc lw a1,1788\(a1\) -10000260: 8f858018 lw a1,-32744\(gp\) -10000264: 8ca50708 lw a1,1800\(a1\) +10000238: 24a506f8 addiu a1,a1,1784 +1000023c: 8f85801c lw a1,-32740\(gp\) +10000240: 24a5e92c addiu a1,a1,-5844 +10000244: 8f858018 lw a1,-32744\(gp\) +10000248: 24a506ec addiu a1,a1,1772 +1000024c: 00b12821 addu a1,a1,s1 +10000250: 8f858018 lw a1,-32744\(gp\) +10000254: 24a506f8 addiu a1,a1,1784 +10000258: 00b12821 addu a1,a1,s1 +1000025c: 8f85801c lw a1,-32740\(gp\) +10000260: 24a5e92c addiu a1,a1,-5844 +10000264: 00b12821 addu a1,a1,s1 10000268: 8f858018 lw a1,-32744\(gp\) -1000026c: 00b12821 addu a1,a1,s1 -10000270: 8ca506fc lw a1,1788\(a1\) -10000274: 8f858018 lw a1,-32744\(gp\) -10000278: 00b12821 addu a1,a1,s1 -1000027c: 8ca50708 lw a1,1800\(a1\) -10000280: 8f818018 lw at,-32744\(gp\) -10000284: 00250821 addu at,at,a1 -10000288: 8c25071e lw a1,1822\(at\) -1000028c: 8f818018 lw at,-32744\(gp\) -10000290: 00250821 addu at,at,a1 -10000294: ac250734 sw a1,1844\(at\) -10000298: 8f818018 lw at,-32744\(gp\) -1000029c: 242106fc addiu at,at,1788 -100002a0: 88250000 lwl a1,0\(at\) -100002a4: 98250003 lwr a1,3\(at\) +1000026c: 8ca506ec lw a1,1772\(a1\) +10000270: 8f858018 lw a1,-32744\(gp\) +10000274: 8ca506f8 lw a1,1784\(a1\) +10000278: 8f858018 lw a1,-32744\(gp\) +1000027c: 00b12821 addu a1,a1,s1 +10000280: 8ca506ec lw a1,1772\(a1\) +10000284: 8f858018 lw a1,-32744\(gp\) +10000288: 00b12821 addu a1,a1,s1 +1000028c: 8ca506f8 lw a1,1784\(a1\) +10000290: 8f818018 lw at,-32744\(gp\) +10000294: 00250821 addu at,at,a1 +10000298: 8c25070e lw a1,1806\(at\) +1000029c: 8f818018 lw at,-32744\(gp\) +100002a0: 00250821 addu at,at,a1 +100002a4: ac250724 sw a1,1828\(at\) 100002a8: 8f818018 lw at,-32744\(gp\) -100002ac: 24210708 addiu at,at,1800 +100002ac: 242106ec addiu at,at,1772 100002b0: 88250000 lwl a1,0\(at\) 100002b4: 98250003 lwr a1,3\(at\) 100002b8: 8f818018 lw at,-32744\(gp\) -100002bc: 242106fc addiu at,at,1788 -100002c0: 00310821 addu at,at,s1 -100002c4: 88250000 lwl a1,0\(at\) -100002c8: 98250003 lwr a1,3\(at\) -100002cc: 8f818018 lw at,-32744\(gp\) -100002d0: 24210708 addiu at,at,1800 -100002d4: 00310821 addu at,at,s1 -100002d8: 88250000 lwl a1,0\(at\) -100002dc: 98250003 lwr a1,3\(at\) -100002e0: 8f818018 lw at,-32744\(gp\) -100002e4: 2421071e addiu at,at,1822 -100002e8: 00250821 addu at,at,a1 -100002ec: 88250000 lwl a1,0\(at\) -100002f0: 98250003 lwr a1,3\(at\) -100002f4: 8f818018 lw at,-32744\(gp\) -100002f8: 24210734 addiu at,at,1844 -100002fc: 00250821 addu at,at,a1 -10000300: a8250000 swl a1,0\(at\) -10000304: b8250003 swr a1,3\(at\) -10000308: 3c050000 lui a1,0x0 -1000030c: 00bc2821 addu a1,a1,gp -10000310: 8ca5802c lw a1,-32724\(a1\) -10000314: 8f858020 lw a1,-32736\(gp\) -10000318: 24a500a0 addiu a1,a1,160 -1000031c: 3c190000 lui t9,0x0 -10000320: 033cc821 addu t9,t9,gp -10000324: 8f39802c lw t9,-32724\(t9\) -10000328: 8f998020 lw t9,-32736\(gp\) -1000032c: 273900a0 addiu t9,t9,160 -10000330: 3c190000 lui t9,0x0 -10000334: 033cc821 addu t9,t9,gp -10000338: 8f39802c lw t9,-32724\(t9\) -1000033c: 0320f809 jalr t9 -10000340: 00000000 nop -10000344: 8f998020 lw t9,-32736\(gp\) -10000348: 273900a0 addiu t9,t9,160 +100002bc: 242106f8 addiu at,at,1784 +100002c0: 88250000 lwl a1,0\(at\) +100002c4: 98250003 lwr a1,3\(at\) +100002c8: 8f818018 lw at,-32744\(gp\) +100002cc: 242106ec addiu at,at,1772 +100002d0: 00310821 addu at,at,s1 +100002d4: 88250000 lwl a1,0\(at\) +100002d8: 98250003 lwr a1,3\(at\) +100002dc: 8f818018 lw at,-32744\(gp\) +100002e0: 242106f8 addiu at,at,1784 +100002e4: 00310821 addu at,at,s1 +100002e8: 88250000 lwl a1,0\(at\) +100002ec: 98250003 lwr a1,3\(at\) +100002f0: 8f818018 lw at,-32744\(gp\) +100002f4: 2421070e addiu at,at,1806 +100002f8: 00250821 addu at,at,a1 +100002fc: 88250000 lwl a1,0\(at\) +10000300: 98250003 lwr a1,3\(at\) +10000304: 8f818018 lw at,-32744\(gp\) +10000308: 24210724 addiu at,at,1828 +1000030c: 00250821 addu at,at,a1 +10000310: a8250000 swl a1,0\(at\) +10000314: b8250003 swr a1,3\(at\) +10000318: 3c050000 lui a1,0x0 +1000031c: 00bc2821 addu a1,a1,gp +10000320: 8ca5802c lw a1,-32724\(a1\) +10000324: 8f858020 lw a1,-32736\(gp\) +10000328: 24a500b0 addiu a1,a1,176 +1000032c: 3c190000 lui t9,0x0 +10000330: 033cc821 addu t9,t9,gp +10000334: 8f39802c lw t9,-32724\(t9\) +10000338: 8f998020 lw t9,-32736\(gp\) +1000033c: 273900b0 addiu t9,t9,176 +10000340: 3c190000 lui t9,0x0 +10000344: 033cc821 addu t9,t9,gp +10000348: 8f39802c lw t9,-32724\(t9\) 1000034c: 0320f809 jalr t9 10000350: 00000000 nop -10000354: 3c050000 lui a1,0x0 -10000358: 00bc2821 addu a1,a1,gp -1000035c: 8ca58038 lw a1,-32712\(a1\) -10000360: 3c050000 lui a1,0x0 -10000364: 00bc2821 addu a1,a1,gp -10000368: 8ca58038 lw a1,-32712\(a1\) -1000036c: 24a5000c addiu a1,a1,12 +10000354: 8f998020 lw t9,-32736\(gp\) +10000358: 273900b0 addiu t9,t9,176 +1000035c: 0320f809 jalr t9 +10000360: 00000000 nop +10000364: 3c050000 lui a1,0x0 +10000368: 00bc2821 addu a1,a1,gp +1000036c: 8ca58038 lw a1,-32712\(a1\) 10000370: 3c050000 lui a1,0x0 10000374: 00bc2821 addu a1,a1,gp 10000378: 8ca58038 lw a1,-32712\(a1\) -1000037c: 3c010001 lui at,0x1 -10000380: 3421e240 ori at,at,0xe240 -10000384: 00a12821 addu a1,a1,at -10000388: 3c050000 lui a1,0x0 -1000038c: 00bc2821 addu a1,a1,gp -10000390: 8ca58038 lw a1,-32712\(a1\) -10000394: 00b12821 addu a1,a1,s1 +1000037c: 24a5000c addiu a1,a1,12 +10000380: 3c050000 lui a1,0x0 +10000384: 00bc2821 addu a1,a1,gp +10000388: 8ca58038 lw a1,-32712\(a1\) +1000038c: 3c010001 lui at,0x1 +10000390: 3421e240 ori at,at,0xe240 +10000394: 00a12821 addu a1,a1,at 10000398: 3c050000 lui a1,0x0 1000039c: 00bc2821 addu a1,a1,gp 100003a0: 8ca58038 lw a1,-32712\(a1\) -100003a4: 24a5000c addiu a1,a1,12 -100003a8: 00b12821 addu a1,a1,s1 -100003ac: 3c050000 lui a1,0x0 -100003b0: 00bc2821 addu a1,a1,gp -100003b4: 8ca58038 lw a1,-32712\(a1\) -100003b8: 3c010001 lui at,0x1 -100003bc: 3421e240 ori at,at,0xe240 -100003c0: 00a12821 addu a1,a1,at -100003c4: 00b12821 addu a1,a1,s1 -100003c8: 3c050000 lui a1,0x0 -100003cc: 00bc2821 addu a1,a1,gp -100003d0: 8ca58038 lw a1,-32712\(a1\) -100003d4: 8ca50000 lw a1,0\(a1\) +100003a4: 00b12821 addu a1,a1,s1 +100003a8: 3c050000 lui a1,0x0 +100003ac: 00bc2821 addu a1,a1,gp +100003b0: 8ca58038 lw a1,-32712\(a1\) +100003b4: 24a5000c addiu a1,a1,12 +100003b8: 00b12821 addu a1,a1,s1 +100003bc: 3c050000 lui a1,0x0 +100003c0: 00bc2821 addu a1,a1,gp +100003c4: 8ca58038 lw a1,-32712\(a1\) +100003c8: 3c010001 lui at,0x1 +100003cc: 3421e240 ori at,at,0xe240 +100003d0: 00a12821 addu a1,a1,at +100003d4: 00b12821 addu a1,a1,s1 100003d8: 3c050000 lui a1,0x0 100003dc: 00bc2821 addu a1,a1,gp 100003e0: 8ca58038 lw a1,-32712\(a1\) -100003e4: 8ca5000c lw a1,12\(a1\) +100003e4: 8ca50000 lw a1,0\(a1\) 100003e8: 3c050000 lui a1,0x0 100003ec: 00bc2821 addu a1,a1,gp 100003f0: 8ca58038 lw a1,-32712\(a1\) -100003f4: 00b12821 addu a1,a1,s1 -100003f8: 8ca50000 lw a1,0\(a1\) -100003fc: 3c050000 lui a1,0x0 -10000400: 00bc2821 addu a1,a1,gp -10000404: 8ca58038 lw a1,-32712\(a1\) -10000408: 00b12821 addu a1,a1,s1 -1000040c: 8ca5000c lw a1,12\(a1\) -10000410: 3c010000 lui at,0x0 -10000414: 003c0821 addu at,at,gp -10000418: 8c218038 lw at,-32712\(at\) -1000041c: 00250821 addu at,at,a1 -10000420: 8c250022 lw a1,34\(at\) -10000424: 3c010000 lui at,0x0 -10000428: 003c0821 addu at,at,gp -1000042c: 8c218038 lw at,-32712\(at\) -10000430: 00250821 addu at,at,a1 -10000434: ac250038 sw a1,56\(at\) -10000438: 3c010000 lui at,0x0 -1000043c: 003c0821 addu at,at,gp -10000440: 8c218038 lw at,-32712\(at\) -10000444: 88250000 lwl a1,0\(at\) -10000448: 98250003 lwr a1,3\(at\) -1000044c: 3c010000 lui at,0x0 -10000450: 003c0821 addu at,at,gp -10000454: 8c218038 lw at,-32712\(at\) -10000458: 2421000c addiu at,at,12 -1000045c: 88250000 lwl a1,0\(at\) -10000460: 98250003 lwr a1,3\(at\) -10000464: 3c010000 lui at,0x0 -10000468: 003c0821 addu at,at,gp -1000046c: 8c218038 lw at,-32712\(at\) -10000470: 00310821 addu at,at,s1 -10000474: 88250000 lwl a1,0\(at\) -10000478: 98250003 lwr a1,3\(at\) -1000047c: 3c010000 lui at,0x0 -10000480: 003c0821 addu at,at,gp -10000484: 8c218038 lw at,-32712\(at\) -10000488: 2421000c addiu at,at,12 -1000048c: 00310821 addu at,at,s1 -10000490: 88250000 lwl a1,0\(at\) -10000494: 98250003 lwr a1,3\(at\) -10000498: 3c010000 lui at,0x0 -1000049c: 003c0821 addu at,at,gp -100004a0: 8c218038 lw at,-32712\(at\) -100004a4: 24210022 addiu at,at,34 -100004a8: 00250821 addu at,at,a1 -100004ac: 88250000 lwl a1,0\(at\) -100004b0: 98250003 lwr a1,3\(at\) -100004b4: 3c010000 lui at,0x0 -100004b8: 003c0821 addu at,at,gp -100004bc: 8c218038 lw at,-32712\(at\) -100004c0: 24210038 addiu at,at,56 -100004c4: 00250821 addu at,at,a1 -100004c8: a8250000 swl a1,0\(at\) -100004cc: b8250003 swr a1,3\(at\) -100004d0: 8f858018 lw a1,-32744\(gp\) -100004d4: 24a50774 addiu a1,a1,1908 -100004d8: 8f858018 lw a1,-32744\(gp\) -100004dc: 24a50780 addiu a1,a1,1920 -100004e0: 8f85801c lw a1,-32740\(gp\) -100004e4: 24a5e9b4 addiu a1,a1,-5708 +100003f4: 8ca5000c lw a1,12\(a1\) +100003f8: 3c050000 lui a1,0x0 +100003fc: 00bc2821 addu a1,a1,gp +10000400: 8ca58038 lw a1,-32712\(a1\) +10000404: 00b12821 addu a1,a1,s1 +10000408: 8ca50000 lw a1,0\(a1\) +1000040c: 3c050000 lui a1,0x0 +10000410: 00bc2821 addu a1,a1,gp +10000414: 8ca58038 lw a1,-32712\(a1\) +10000418: 00b12821 addu a1,a1,s1 +1000041c: 8ca5000c lw a1,12\(a1\) +10000420: 3c010000 lui at,0x0 +10000424: 003c0821 addu at,at,gp +10000428: 8c218038 lw at,-32712\(at\) +1000042c: 00250821 addu at,at,a1 +10000430: 8c250022 lw a1,34\(at\) +10000434: 3c010000 lui at,0x0 +10000438: 003c0821 addu at,at,gp +1000043c: 8c218038 lw at,-32712\(at\) +10000440: 00250821 addu at,at,a1 +10000444: ac250038 sw a1,56\(at\) +10000448: 3c010000 lui at,0x0 +1000044c: 003c0821 addu at,at,gp +10000450: 8c218038 lw at,-32712\(at\) +10000454: 88250000 lwl a1,0\(at\) +10000458: 98250003 lwr a1,3\(at\) +1000045c: 3c010000 lui at,0x0 +10000460: 003c0821 addu at,at,gp +10000464: 8c218038 lw at,-32712\(at\) +10000468: 2421000c addiu at,at,12 +1000046c: 88250000 lwl a1,0\(at\) +10000470: 98250003 lwr a1,3\(at\) +10000474: 3c010000 lui at,0x0 +10000478: 003c0821 addu at,at,gp +1000047c: 8c218038 lw at,-32712\(at\) +10000480: 00310821 addu at,at,s1 +10000484: 88250000 lwl a1,0\(at\) +10000488: 98250003 lwr a1,3\(at\) +1000048c: 3c010000 lui at,0x0 +10000490: 003c0821 addu at,at,gp +10000494: 8c218038 lw at,-32712\(at\) +10000498: 2421000c addiu at,at,12 +1000049c: 00310821 addu at,at,s1 +100004a0: 88250000 lwl a1,0\(at\) +100004a4: 98250003 lwr a1,3\(at\) +100004a8: 3c010000 lui at,0x0 +100004ac: 003c0821 addu at,at,gp +100004b0: 8c218038 lw at,-32712\(at\) +100004b4: 24210022 addiu at,at,34 +100004b8: 00250821 addu at,at,a1 +100004bc: 88250000 lwl a1,0\(at\) +100004c0: 98250003 lwr a1,3\(at\) +100004c4: 3c010000 lui at,0x0 +100004c8: 003c0821 addu at,at,gp +100004cc: 8c218038 lw at,-32712\(at\) +100004d0: 24210038 addiu at,at,56 +100004d4: 00250821 addu at,at,a1 +100004d8: a8250000 swl a1,0\(at\) +100004dc: b8250003 swr a1,3\(at\) +100004e0: 8f858018 lw a1,-32744\(gp\) +100004e4: 24a50764 addiu a1,a1,1892 100004e8: 8f858018 lw a1,-32744\(gp\) -100004ec: 24a50774 addiu a1,a1,1908 -100004f0: 00b12821 addu a1,a1,s1 -100004f4: 8f858018 lw a1,-32744\(gp\) -100004f8: 24a50780 addiu a1,a1,1920 -100004fc: 00b12821 addu a1,a1,s1 -10000500: 8f85801c lw a1,-32740\(gp\) -10000504: 24a5e9b4 addiu a1,a1,-5708 -10000508: 00b12821 addu a1,a1,s1 -1000050c: 8f858018 lw a1,-32744\(gp\) -10000510: 8ca50774 lw a1,1908\(a1\) -10000514: 8f858018 lw a1,-32744\(gp\) -10000518: 8ca50780 lw a1,1920\(a1\) +100004ec: 24a50770 addiu a1,a1,1904 +100004f0: 8f85801c lw a1,-32740\(gp\) +100004f4: 24a5e9a4 addiu a1,a1,-5724 +100004f8: 8f858018 lw a1,-32744\(gp\) +100004fc: 24a50764 addiu a1,a1,1892 +10000500: 00b12821 addu a1,a1,s1 +10000504: 8f858018 lw a1,-32744\(gp\) +10000508: 24a50770 addiu a1,a1,1904 +1000050c: 00b12821 addu a1,a1,s1 +10000510: 8f85801c lw a1,-32740\(gp\) +10000514: 24a5e9a4 addiu a1,a1,-5724 +10000518: 00b12821 addu a1,a1,s1 1000051c: 8f858018 lw a1,-32744\(gp\) -10000520: 00b12821 addu a1,a1,s1 -10000524: 8ca50774 lw a1,1908\(a1\) -10000528: 8f858018 lw a1,-32744\(gp\) -1000052c: 00b12821 addu a1,a1,s1 -10000530: 8ca50780 lw a1,1920\(a1\) -10000534: 8f818018 lw at,-32744\(gp\) -10000538: 00250821 addu at,at,a1 -1000053c: 8c250796 lw a1,1942\(at\) -10000540: 8f818018 lw at,-32744\(gp\) -10000544: 00250821 addu at,at,a1 -10000548: ac2507ac sw a1,1964\(at\) -1000054c: 8f818018 lw at,-32744\(gp\) -10000550: 24210774 addiu at,at,1908 -10000554: 88250000 lwl a1,0\(at\) -10000558: 98250003 lwr a1,3\(at\) +10000520: 8ca50764 lw a1,1892\(a1\) +10000524: 8f858018 lw a1,-32744\(gp\) +10000528: 8ca50770 lw a1,1904\(a1\) +1000052c: 8f858018 lw a1,-32744\(gp\) +10000530: 00b12821 addu a1,a1,s1 +10000534: 8ca50764 lw a1,1892\(a1\) +10000538: 8f858018 lw a1,-32744\(gp\) +1000053c: 00b12821 addu a1,a1,s1 +10000540: 8ca50770 lw a1,1904\(a1\) +10000544: 8f818018 lw at,-32744\(gp\) +10000548: 00250821 addu at,at,a1 +1000054c: 8c250786 lw a1,1926\(at\) +10000550: 8f818018 lw at,-32744\(gp\) +10000554: 00250821 addu at,at,a1 +10000558: ac25079c sw a1,1948\(at\) 1000055c: 8f818018 lw at,-32744\(gp\) -10000560: 24210780 addiu at,at,1920 +10000560: 24210764 addiu at,at,1892 10000564: 88250000 lwl a1,0\(at\) 10000568: 98250003 lwr a1,3\(at\) 1000056c: 8f818018 lw at,-32744\(gp\) -10000570: 24210774 addiu at,at,1908 -10000574: 00310821 addu at,at,s1 -10000578: 88250000 lwl a1,0\(at\) -1000057c: 98250003 lwr a1,3\(at\) -10000580: 8f818018 lw at,-32744\(gp\) -10000584: 24210780 addiu at,at,1920 -10000588: 00310821 addu at,at,s1 -1000058c: 88250000 lwl a1,0\(at\) -10000590: 98250003 lwr a1,3\(at\) -10000594: 8f818018 lw at,-32744\(gp\) -10000598: 24210796 addiu at,at,1942 -1000059c: 00250821 addu at,at,a1 -100005a0: 88250000 lwl a1,0\(at\) -100005a4: 98250003 lwr a1,3\(at\) -100005a8: 8f818018 lw at,-32744\(gp\) -100005ac: 242107ac addiu at,at,1964 -100005b0: 00250821 addu at,at,a1 -100005b4: a8250000 swl a1,0\(at\) -100005b8: b8250003 swr a1,3\(at\) -100005bc: 3c050000 lui a1,0x0 -100005c0: 00bc2821 addu a1,a1,gp -100005c4: 8ca58030 lw a1,-32720\(a1\) -100005c8: 8f858020 lw a1,-32736\(gp\) -100005cc: 24a506a0 addiu a1,a1,1696 -100005d0: 3c190000 lui t9,0x0 -100005d4: 033cc821 addu t9,t9,gp -100005d8: 8f398030 lw t9,-32720\(t9\) -100005dc: 8f998020 lw t9,-32736\(gp\) -100005e0: 273906a0 addiu t9,t9,1696 -100005e4: 3c190000 lui t9,0x0 -100005e8: 033cc821 addu t9,t9,gp -100005ec: 8f398030 lw t9,-32720\(t9\) -100005f0: 0320f809 jalr t9 -100005f4: 00000000 nop -100005f8: 8f998020 lw t9,-32736\(gp\) -100005fc: 273906a0 addiu t9,t9,1696 +10000570: 24210770 addiu at,at,1904 +10000574: 88250000 lwl a1,0\(at\) +10000578: 98250003 lwr a1,3\(at\) +1000057c: 8f818018 lw at,-32744\(gp\) +10000580: 24210764 addiu at,at,1892 +10000584: 00310821 addu at,at,s1 +10000588: 88250000 lwl a1,0\(at\) +1000058c: 98250003 lwr a1,3\(at\) +10000590: 8f818018 lw at,-32744\(gp\) +10000594: 24210770 addiu at,at,1904 +10000598: 00310821 addu at,at,s1 +1000059c: 88250000 lwl a1,0\(at\) +100005a0: 98250003 lwr a1,3\(at\) +100005a4: 8f818018 lw at,-32744\(gp\) +100005a8: 24210786 addiu at,at,1926 +100005ac: 00250821 addu at,at,a1 +100005b0: 88250000 lwl a1,0\(at\) +100005b4: 98250003 lwr a1,3\(at\) +100005b8: 8f818018 lw at,-32744\(gp\) +100005bc: 2421079c addiu at,at,1948 +100005c0: 00250821 addu at,at,a1 +100005c4: a8250000 swl a1,0\(at\) +100005c8: b8250003 swr a1,3\(at\) +100005cc: 3c050000 lui a1,0x0 +100005d0: 00bc2821 addu a1,a1,gp +100005d4: 8ca58030 lw a1,-32720\(a1\) +100005d8: 8f858020 lw a1,-32736\(gp\) +100005dc: 24a506b0 addiu a1,a1,1712 +100005e0: 3c190000 lui t9,0x0 +100005e4: 033cc821 addu t9,t9,gp +100005e8: 8f398030 lw t9,-32720\(t9\) +100005ec: 8f998020 lw t9,-32736\(gp\) +100005f0: 273906b0 addiu t9,t9,1712 +100005f4: 3c190000 lui t9,0x0 +100005f8: 033cc821 addu t9,t9,gp +100005fc: 8f398030 lw t9,-32720\(t9\) 10000600: 0320f809 jalr t9 10000604: 00000000 nop -10000608: 3c050000 lui a1,0x0 -1000060c: 00bc2821 addu a1,a1,gp -10000610: 8ca58034 lw a1,-32716\(a1\) -10000614: 1000fea2 b 100000a0 <fn> -10000618: 00000000 nop -1000061c: 3c050000 lui a1,0x0 -10000620: 00bc2821 addu a1,a1,gp -10000624: 8ca58038 lw a1,-32712\(a1\) -10000628: 8ca50000 lw a1,0\(a1\) -1000062c: 1000001c b 100006a0 <fn2> -10000630: 00000000 nop -10000634: 8f858018 lw a1,-32744\(gp\) -10000638: 24a506fc addiu a1,a1,1788 -1000063c: 1000fe98 b 100000a0 <fn> +10000608: 8f998020 lw t9,-32736\(gp\) +1000060c: 273906b0 addiu t9,t9,1712 +10000610: 0320f809 jalr t9 +10000614: 00000000 nop +10000618: 3c050000 lui a1,0x0 +1000061c: 00bc2821 addu a1,a1,gp +10000620: 8ca58034 lw a1,-32716\(a1\) +10000624: 1000fea2 b 100000b0 <fn> +10000628: 00000000 nop +1000062c: 3c050000 lui a1,0x0 +10000630: 00bc2821 addu a1,a1,gp +10000634: 8ca58038 lw a1,-32712\(a1\) +10000638: 8ca50000 lw a1,0\(a1\) +1000063c: 1000001c b 100006b0 <fn2> 10000640: 00000000 nop 10000644: 8f858018 lw a1,-32744\(gp\) -10000648: 24a50780 addiu a1,a1,1920 -1000064c: 10000014 b 100006a0 <fn2> +10000648: 24a506ec addiu a1,a1,1772 +1000064c: 1000fe98 b 100000b0 <fn> 10000650: 00000000 nop -10000654: 8f85801c lw a1,-32740\(gp\) -10000658: 24a5e93c addiu a1,a1,-5828 -1000065c: 1000fe90 b 100000a0 <fn> +10000654: 8f858018 lw a1,-32744\(gp\) +10000658: 24a50770 addiu a1,a1,1904 +1000065c: 10000014 b 100006b0 <fn2> 10000660: 00000000 nop -10000664: 8f858018 lw a1,-32744\(gp\) -10000668: 8ca50774 lw a1,1908\(a1\) -1000066c: 1000000c b 100006a0 <fn2> +10000664: 8f85801c lw a1,-32740\(gp\) +10000668: 24a5e92c addiu a1,a1,-5844 +1000066c: 1000fe90 b 100000b0 <fn> 10000670: 00000000 nop 10000674: 8f858018 lw a1,-32744\(gp\) -10000678: 8ca50708 lw a1,1800\(a1\) -1000067c: 1000fe88 b 100000a0 <fn> +10000678: 8ca50764 lw a1,1892\(a1\) +1000067c: 1000000c b 100006b0 <fn2> 10000680: 00000000 nop -10000684: 8f818018 lw at,-32744\(gp\) -10000688: 00250821 addu at,at,a1 -1000068c: 8c250796 lw a1,1942\(at\) -10000690: 10000003 b 100006a0 <fn2> -10000694: 00000000 nop - \.\.\. -Disassembly of section \.reginfo: - -100006a0 <\.reginfo>: -100006a0: 92020022 .* +10000684: 8f858018 lw a1,-32744\(gp\) +10000688: 8ca506f8 lw a1,1784\(a1\) +1000068c: 1000fe88 b 100000b0 <fn> +10000690: 00000000 nop +10000694: 8f818018 lw at,-32744\(gp\) +10000698: 00250821 addu at,at,a1 +1000069c: 8c250786 lw a1,1926\(at\) +100006a0: 10000003 b 100006b0 <fn2> +100006a4: 00000000 nop \.\.\. -100006b4: 101087a0 .* Disassembly of section \.data: -101006c0 <_fdata>: +100106b0 <_fdata>: \.\.\. -101006fc <dg1>: +100106ec <dg1>: \.\.\. -10100738 <sp2>: +10010728 <sp2>: \.\.\. -10100774 <dg2>: +10010764 <dg2>: \.\.\. Disassembly of section \.got: -101007b0 <_GLOBAL_OFFSET_TABLE_>: -101007b0: 00000000 .* -101007b4: 80000000 .* -101007b8: 10100000 .* -101007bc: 10120000 .* -101007c0: 10000000 .* -101007c4: 00000000 .* -101007c8: 00000000 .* -101007cc: 100000a0 .* -101007d0: 100006a0 .* -101007d4: 101006fc .* -101007d8: 10100774 .* +100107a0 <_GLOBAL_OFFSET_TABLE_>: +100107a0: 00000000 .* +100107a4: 80000000 .* +100107a8: 10010000 .* +100107ac: 10030000 .* +100107b0: 10000000 .* +100107b4: 00000000 .* +100107b8: 00000000 .* +100107bc: 100000b0 .* +100107c0: 100006b0 .* +100107c4: 100106ec .* +100107c8: 10010764 .* #pass diff --git a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d index 60a89a836fc66..8baa1952284bf 100644 --- a/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d +++ b/ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d @@ -14,7 +14,7 @@ Disassembly of section \.MIPS\.options: 1200000b8: 92020022 .* \.\.\. 1200000d0: 00000001 .* - 1200000d4: 201087c0 .* + 1200000d4: 200187c0 .* Disassembly of section \.text: 00000001200000e0 <fn>: @@ -403,35 +403,35 @@ Disassembly of section \.text: \.\.\. Disassembly of section \.data: -00000001201006e0 <_fdata>: +00000001200106e0 <_fdata>: \.\.\. -000000012010071c <dg1>: +000000012001071c <dg1>: \.\.\. -0000000120100758 <sp2>: +0000000120010758 <sp2>: \.\.\. -0000000120100794 <dg2>: +0000000120010794 <dg2>: \.\.\. Disassembly of section \.got: -00000001201007d0 <_GLOBAL_OFFSET_TABLE_>: +00000001200107d0 <_GLOBAL_OFFSET_TABLE_>: \.\.\. - 1201007dc: 80000000 .* - 1201007e0: 00000001 .* - 1201007e4: 20100000 .* - 1201007e8: 00000001 .* - 1201007ec: 20120000 .* - 1201007f0: 00000001 .* - 1201007f4: 20000000 .* + 1200107dc: 80000000 .* + 1200107e0: 00000001 .* + 1200107e4: 20010000 .* + 1200107e8: 00000001 .* + 1200107ec: 20030000 .* + 1200107f0: 00000001 .* + 1200107f4: 20000000 .* \.\.\. - 120100808: 00000001 .* - 12010080c: 200000e0 .* - 120100810: 00000001 .* - 120100814: 200006e0 .* - 120100818: 00000001 .* - 12010081c: 2010071c .* - 120100820: 00000001 .* - 120100824: 20100794 .* + 120010808: 00000001 .* + 12001080c: 200000e0 .* + 120010810: 00000001 .* + 120010814: 200006e0 .* + 120010818: 00000001 .* + 12001081c: 2001071c .* + 120010820: 00000001 .* + 120010824: 20010794 .* #pass diff --git a/ld/testsuite/ld-mips-elf/hash1.s b/ld/testsuite/ld-mips-elf/hash1.s new file mode 100644 index 0000000000000..4e7fe2f0a4941 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/hash1.s @@ -0,0 +1 @@ + nop diff --git a/ld/testsuite/ld-mips-elf/hash1a.d b/ld/testsuite/ld-mips-elf/hash1a.d new file mode 100644 index 0000000000000..f3adaa8d5e7bc --- /dev/null +++ b/ld/testsuite/ld-mips-elf/hash1a.d @@ -0,0 +1,4 @@ +#source: hash1.s +#ld: -shared --hash-style=sysv +#objdump: -dr +#pass diff --git a/ld/testsuite/ld-mips-elf/hash1b.d b/ld/testsuite/ld-mips-elf/hash1b.d new file mode 100644 index 0000000000000..5af9037cfc37d --- /dev/null +++ b/ld/testsuite/ld-mips-elf/hash1b.d @@ -0,0 +1,3 @@ +#source: hash1.s +#ld: -shared --hash-style=both +#error: .gnu.hash is incompatible with the MIPS ABI diff --git a/ld/testsuite/ld-mips-elf/hash1c.d b/ld/testsuite/ld-mips-elf/hash1c.d new file mode 100644 index 0000000000000..09bff3cad962d --- /dev/null +++ b/ld/testsuite/ld-mips-elf/hash1c.d @@ -0,0 +1,3 @@ +#source: hash1.s +#ld: -shared --hash-style=gnu +#error: .gnu.hash is incompatible with the MIPS ABI diff --git a/ld/testsuite/ld-mips-elf/jalbal.d b/ld/testsuite/ld-mips-elf/jalbal.d index bc9a5129ffe04..49cda75c76bb3 100644 --- a/ld/testsuite/ld-mips-elf/jalbal.d +++ b/ld/testsuite/ld-mips-elf/jalbal.d @@ -1,7 +1,7 @@ #name: jal to bal #source: jalbal.s #as: -EB -n32 -march=rm9000 -#ld: -EB -e s1 -Ttext 0x100000a0 +#ld: -EB -e s1 -Ttext 0x200000a0 #objdump: -d .*file format elf.*mips.* @@ -9,16 +9,16 @@ Disassembly of section \.text: .* <s1>: -.* 0c00802a jal .*100200a8 <s3> +.* 0c00802a jal .*200200a8 <s3> .* 00000000 nop -.* 04117fff bal .*100200a8 <s3> +.* 04117fff bal .*200200a8 <s3> .* <s2>: .* \.\.\. .* <s3>: -.* 04118000 bal .*100000ac <s2> +.* 04118000 bal .*200000ac <s2> .* 00000000 nop -.* 0c00002b jal .*100000ac <s2> +.* 0c00002b jal .*200000ac <s2> .* 00000000 nop .* \.\.\. diff --git a/ld/testsuite/ld-mips-elf/jaloverflow-2.d b/ld/testsuite/ld-mips-elf/jaloverflow-2.d index b28b4edb2f444..b40f4281777c5 100644 --- a/ld/testsuite/ld-mips-elf/jaloverflow-2.d +++ b/ld/testsuite/ld-mips-elf/jaloverflow-2.d @@ -1,8 +1,8 @@ #name: JAL overflow 2 #source: jaloverflow-2.s #as: -#ld: -Ttext=0x10000000 -e start +#ld: -Ttext=0x20000000 -e start #objdump: -dr #... -0*10000000: 0c000000.* +0*20000000: 0c000000.* #pass diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp index b5ddaefd58f5f..6e3e1a34418b6 100644 --- a/ld/testsuite/ld-mips-elf/mips-elf.exp +++ b/ld/testsuite/ld-mips-elf/mips-elf.exp @@ -21,7 +21,7 @@ if {[istarget "mips*-*-vxworks"]} { {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "-mips2" {vxworks1-lib.s} {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} - {readelf --symbols vxworks1-lib.nd}} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} "libvxworks1.so"} {"VxWorks executable test 1 (dynamic)" \ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" @@ -107,6 +107,10 @@ if $has_newabi { } run_dump_test "reloc-2" run_dump_test "reloc-merge-lo16" +run_dump_test "reloc-3" +if {$has_newabi} { + run_dump_test "reloc-3-n32" +} if {$has_newabi && $linux_gnu} { run_dump_test "eh-frame1-n32" run_dump_test "eh-frame1-n64" @@ -137,16 +141,19 @@ if $has_newabi { run_dump_test "emit-relocs-1" } +run_dump_test "hash1a" +run_dump_test "hash1b" +run_dump_test "hash1c" + if {[istarget mips*-*-linux*]} { # The number of symbols that are always included in the symbol table - # for these tests. The 5 are: + # for these tests. The 4 are: # # the null symbol entry # the .MIPS.stubs section symbol - # the .text section symbol # _gp # _GLOBAL_OFFSET_TABLE_ - set base_syms 5 + set base_syms 4 foreach dynsym { 7fff 8000 fff0 10000 2fe80 } { run_ld_link_tests \ [list [list \ @@ -243,3 +250,43 @@ if {[istarget mips*-*-linux*]} { run_ld_link_tests $mips_tls_tests } +set mips16_call_global_test { + {"Global calls from mips16" + "" + "-mips32r2" {mips16-call-global-1.s mips16-call-global-2.s mips16-call-global-3.s} + {{objdump -dr mips16-call-global.d}} + "mips16-call-global"} +} + +run_ld_link_tests $mips16_call_global_test + +set mips16_intermix_test { + {"Intermixing mips32 and mips16 functions" + "" + "-mips32r2" {mips16-intermix-1.s mips16-intermix-2.s} + {{objdump -t mips16-intermix.d}} + "mips16-intermix"} +} + +run_ld_link_tests $mips16_intermix_test + +run_dump_test "mips16-local-stubs-1" + +run_dump_test "attr-gnu-4-00" +run_dump_test "attr-gnu-4-01" +run_dump_test "attr-gnu-4-02" +run_dump_test "attr-gnu-4-03" +run_dump_test "attr-gnu-4-10" +run_dump_test "attr-gnu-4-11" +run_dump_test "attr-gnu-4-12" +run_dump_test "attr-gnu-4-13" +run_dump_test "attr-gnu-4-14" +run_dump_test "attr-gnu-4-20" +run_dump_test "attr-gnu-4-21" +run_dump_test "attr-gnu-4-22" +run_dump_test "attr-gnu-4-23" +run_dump_test "attr-gnu-4-30" +run_dump_test "attr-gnu-4-31" +run_dump_test "attr-gnu-4-32" +run_dump_test "attr-gnu-4-33" +run_dump_test "attr-gnu-4-41" diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-1.s b/ld/testsuite/ld-mips-elf/mips16-call-global-1.s new file mode 100644 index 0000000000000..1e60bcc14cccb --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-call-global-1.s @@ -0,0 +1,12 @@ + .set mips16 + + .globl __start + .ent __start +__start: + .frame $sp,24,$31 + save 24,$31 + jal x+8 + jal y+8 + restore 24,$31 + j $31 + .end __start diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-2.s b/ld/testsuite/ld-mips-elf/mips16-call-global-2.s new file mode 100644 index 0000000000000..2843fcd6ecd40 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-call-global-2.s @@ -0,0 +1,8 @@ + .set mips16 + + .globl x + .ent x + .type x,@function +x: + jr $31 + .end x diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global-3.s b/ld/testsuite/ld-mips-elf/mips16-call-global-3.s new file mode 100644 index 0000000000000..5113c5d44a946 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-call-global-3.s @@ -0,0 +1,16 @@ + .set nomips16 + + .globl y + .ent y + .type y,@function +y: + jr $31 + .end y + + .ent z + .type z,@function +z: + jr $31 + .end z + + .space 8 diff --git a/ld/testsuite/ld-mips-elf/mips16-call-global.d b/ld/testsuite/ld-mips-elf/mips16-call-global.d new file mode 100644 index 0000000000000..051ebcdae8b24 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-call-global.d @@ -0,0 +1,39 @@ + +.*: file format elf.*mips + +Disassembly of section .text: + +.*0090 <__start>: +.*0090: 64c3 save 24,ra +.*0092: 1a00 002e jal .*00b8 <x\+0x8> +.*0096: 6500 nop +.*0098: 1e00 0032 jalx .*00c8 <z> +.*009c: 6500 nop +.*009e: 6443 restore 24,ra +.*00a0: e8a0 jrc ra +.*00a2: 6500 nop +.*00a4: 6500 nop +.*00a6: 6500 nop +.*00a8: 6500 nop +.*00aa: 6500 nop +.*00ac: 6500 nop +.*00ae: 6500 nop + +.*00b0 <x>: +.*00b0: e8a0 jrc ra +.*00b2: 6500 nop +.*00b4: 6500 nop +.*00b6: 6500 nop +.*00b8: 6500 nop +.*00ba: 6500 nop +.*00bc: 6500 nop +.*00be: 6500 nop + +.*00c0 <y>: +.*00c0: 03e00008 jr ra +.*00c4: 00000000 nop + +.*00c8 <z>: +.*00c8: 03e00008 jr ra +.*00cc: 00000000 nop + \.\.\. diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix-1.s b/ld/testsuite/ld-mips-elf/mips16-intermix-1.s new file mode 100644 index 0000000000000..c596619c9493e --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-intermix-1.s @@ -0,0 +1,104 @@ + .text + .align 2 + .globl __start + .set nomips16 + .ent __start +__start: + .frame $sp,56,$31 # vars= 0, regs= 3/2, args= 24, gp= 0 + .mask 0x80030000,-24 + .fmask 0x00f00000,-8 + .set noreorder + .set nomacro + + addiu $sp,$sp,-56 + sw $31,32($sp) + sw $17,28($sp) + sw $16,24($sp) + sdc1 $f22,48($sp) + sdc1 $f20,40($sp) + jal m32_l + move $4,$17 + + move $4,$17 + jal m16_l + move $16,$2 + + addu $16,$16,$2 + jal m32_d + mov.d $f12,$f22 + + addu $16,$16,$2 + jal m16_d + mov.d $f12,$f22 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m32_ld + addu $16,$16,$2 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m16_ld + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m32_dl + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m16_dl + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + sdc1 $f22,16($sp) + mov.d $f12,$f22 + jal m32_dlld + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + mov.d $f12,$f22 + sdc1 $f22,16($sp) + jal m16_dlld + addu $16,$16,$2 + + move $4,$17 + jal m32_d_l + addu $16,$16,$2 + + move $4,$17 + jal m16_d_l + mov.d $f20,$f0 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal f32 + add.d $f20,$f20,$f0 + + move $4,$17 + add.d $f20,$f20,$f0 + mfc1 $7,$f22 + jal f16 + mfc1 $6,$f23 + + add.d $f20,$f20,$f0 + lw $31,32($sp) + trunc.w.d $f0,$f20 + lw $17,28($sp) + mfc1 $3,$f0 + addu $2,$3,$16 + lw $16,24($sp) + ldc1 $f22,48($sp) + ldc1 $f20,40($sp) + j $31 + addiu $sp,$sp,56 + + .set macro + .set reorder + .end __start diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix-2.s b/ld/testsuite/ld-mips-elf/mips16-intermix-2.s new file mode 100644 index 0000000000000..472f0c932667a --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-intermix-2.s @@ -0,0 +1,2631 @@ + .text + .align 2 + .globl m32_l + .set nomips16 + .ent m32_l +m32_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + move $2,$4 + + .set macro + .set reorder + .end m32_l + + .align 2 + .globl m16_l + .set mips16 + .ent m16_l +m16_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + j $31 + move $2,$4 + .set macro + .set reorder + + .end m16_l + + .align 2 + .set nomips16 + .ent m32_static_l +m32_static_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + move $2,$4 + + .set macro + .set reorder + .end m32_static_l + + .align 2 + .set mips16 + .ent m16_static_l +m16_static_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + j $31 + move $2,$4 + .set macro + .set reorder + + .end m16_static_l + + .align 2 + .set nomips16 + .ent m32_static1_l +m32_static1_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + move $2,$4 + + .set macro + .set reorder + .end m32_static1_l + + .align 2 + .set mips16 + .ent m16_static1_l +m16_static1_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + j $31 + move $2,$4 + .set macro + .set reorder + + .end m16_static1_l + + .align 2 + .set nomips16 + .ent m32_static32_l +m32_static32_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + move $2,$4 + + .set macro + .set reorder + .end m32_static32_l + + .align 2 + .set mips16 + .ent m16_static32_l +m16_static32_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + j $31 + move $2,$4 + .set macro + .set reorder + + .end m16_static32_l + + .align 2 + .set nomips16 + .ent m32_static16_l +m32_static16_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + move $2,$4 + + .set macro + .set reorder + .end m32_static16_l + + .align 2 + .set mips16 + .ent m16_static16_l +m16_static16_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + j $31 + move $2,$4 + .set macro + .set reorder + + .end m16_static16_l + + .align 2 + .globl m32_d + .set nomips16 + .ent m32_d +m32_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f12,$f12 + j $31 + mfc1 $2,$f12 + + .set macro + .set reorder + .end m32_d + + .align 2 + .globl m16_d + .set mips16 + .ent m16_d +m16_d: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_fixdfsi + restore 24,$31 + j $31 + .end m16_d + # Stub function for m16_d (double) + .set nomips16 + .section .mips16.fn.m16_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_d +__fn_stub_m16_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_d + .previous + + .align 2 + .set nomips16 + .ent m32_static_d +m32_static_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f12,$f12 + j $31 + mfc1 $2,$f12 + + .set macro + .set reorder + .end m32_static_d + + .align 2 + .set mips16 + .ent m16_static_d +m16_static_d: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_fixdfsi + restore 24,$31 + j $31 + .end m16_static_d + # Stub function for m16_static_d (double) + .set nomips16 + .section .mips16.fn.m16_static_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static_d +__fn_stub_m16_static_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static_d + .previous + + .align 2 + .set nomips16 + .ent m32_static1_d +m32_static1_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f12,$f12 + j $31 + mfc1 $2,$f12 + + .set macro + .set reorder + .end m32_static1_d + + .align 2 + .set mips16 + .ent m16_static1_d +m16_static1_d: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_fixdfsi + restore 24,$31 + j $31 + .end m16_static1_d + # Stub function for m16_static1_d (double) + .set nomips16 + .section .mips16.fn.m16_static1_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static1_d +__fn_stub_m16_static1_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static1_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static1_d + .previous + + .align 2 + .set nomips16 + .ent m32_static32_d +m32_static32_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f12,$f12 + j $31 + mfc1 $2,$f12 + + .set macro + .set reorder + .end m32_static32_d + + .align 2 + .set mips16 + .ent m16_static32_d +m16_static32_d: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_fixdfsi + restore 24,$31 + j $31 + .end m16_static32_d + # Stub function for m16_static32_d (double) + .set nomips16 + .section .mips16.fn.m16_static32_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static32_d +__fn_stub_m16_static32_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static32_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static32_d + .previous + + .align 2 + .set nomips16 + .ent m32_static16_d +m32_static16_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f12,$f12 + j $31 + mfc1 $2,$f12 + + .set macro + .set reorder + .end m32_static16_d + + .align 2 + .set mips16 + .ent m16_static16_d +m16_static16_d: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_fixdfsi + restore 24,$31 + j $31 + .end m16_static16_d + # Stub function for m16_static16_d (double) + .set nomips16 + .section .mips16.fn.m16_static16_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static16_d +__fn_stub_m16_static16_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static16_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static16_d + .previous + + .align 2 + .globl m32_ld + .set nomips16 + .ent m32_ld +m32_ld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $7,$f2 + mtc1 $6,$f3 + trunc.w.d $f0,$f2 + mfc1 $24,$f0 + j $31 + addu $2,$24,$4 + + .set macro + .set reorder + .end m32_ld + + .align 2 + .globl m16_ld + .set mips16 + .ent m16_ld +m16_ld: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + move $16,$4 + move $5,$7 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $4,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_ld + + .align 2 + .set nomips16 + .ent m32_static_ld +m32_static_ld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $7,$f2 + mtc1 $6,$f3 + trunc.w.d $f0,$f2 + mfc1 $24,$f0 + j $31 + addu $2,$24,$4 + + .set macro + .set reorder + .end m32_static_ld + + .align 2 + .set mips16 + .ent m16_static_ld +m16_static_ld: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + move $16,$4 + move $5,$7 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $4,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static_ld + + .align 2 + .set nomips16 + .ent m32_static1_ld +m32_static1_ld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $7,$f2 + mtc1 $6,$f3 + trunc.w.d $f0,$f2 + mfc1 $24,$f0 + j $31 + addu $2,$24,$4 + + .set macro + .set reorder + .end m32_static1_ld + + .align 2 + .set mips16 + .ent m16_static1_ld +m16_static1_ld: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + move $16,$4 + move $5,$7 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $4,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static1_ld + + .align 2 + .set nomips16 + .ent m32_static32_ld +m32_static32_ld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $7,$f2 + mtc1 $6,$f3 + trunc.w.d $f0,$f2 + mfc1 $24,$f0 + j $31 + addu $2,$24,$4 + + .set macro + .set reorder + .end m32_static32_ld + + .align 2 + .set mips16 + .ent m16_static32_ld +m16_static32_ld: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + move $16,$4 + move $5,$7 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $4,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static32_ld + + .align 2 + .set nomips16 + .ent m32_static16_ld +m32_static16_ld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $7,$f2 + mtc1 $6,$f3 + trunc.w.d $f0,$f2 + mfc1 $24,$f0 + j $31 + addu $2,$24,$4 + + .set macro + .set reorder + .end m32_static16_ld + + .align 2 + .set mips16 + .ent m16_static16_ld +m16_static16_ld: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + move $16,$4 + move $5,$7 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $4,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static16_ld + + .align 2 + .globl m32_dl + .set nomips16 + .ent m32_dl +m32_dl: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f0,$f12 + mfc1 $24,$f0 + j $31 + addu $2,$24,$6 + + .set macro + .set reorder + .end m32_dl + + .align 2 + .globl m16_dl + .set mips16 + .ent m16_dl +m16_dl: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $16,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_dl + # Stub function for m16_dl (double) + .set nomips16 + .section .mips16.fn.m16_dl,"ax",@progbits + .align 2 + .ent __fn_stub_m16_dl +__fn_stub_m16_dl: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_dl + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_dl + .previous + + .align 2 + .set nomips16 + .ent m32_static_dl +m32_static_dl: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f0,$f12 + mfc1 $24,$f0 + j $31 + addu $2,$24,$6 + + .set macro + .set reorder + .end m32_static_dl + + .align 2 + .set mips16 + .ent m16_static_dl +m16_static_dl: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $16,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static_dl + # Stub function for m16_static_dl (double) + .set nomips16 + .section .mips16.fn.m16_static_dl,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static_dl +__fn_stub_m16_static_dl: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static_dl + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static_dl + .previous + + .align 2 + .set nomips16 + .ent m32_static1_dl +m32_static1_dl: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f0,$f12 + mfc1 $24,$f0 + j $31 + addu $2,$24,$6 + + .set macro + .set reorder + .end m32_static1_dl + + .align 2 + .set mips16 + .ent m16_static1_dl +m16_static1_dl: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $16,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static1_dl + # Stub function for m16_static1_dl (double) + .set nomips16 + .section .mips16.fn.m16_static1_dl,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static1_dl +__fn_stub_m16_static1_dl: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static1_dl + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static1_dl + .previous + + .align 2 + .set nomips16 + .ent m32_static32_dl +m32_static32_dl: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f0,$f12 + mfc1 $24,$f0 + j $31 + addu $2,$24,$6 + + .set macro + .set reorder + .end m32_static32_dl + + .align 2 + .set mips16 + .ent m16_static32_dl +m16_static32_dl: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $16,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static32_dl + # Stub function for m16_static32_dl (double) + .set nomips16 + .section .mips16.fn.m16_static32_dl,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static32_dl +__fn_stub_m16_static32_dl: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static32_dl + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static32_dl + .previous + + .align 2 + .set nomips16 + .ent m32_static16_dl +m32_static16_dl: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f0,$f12 + mfc1 $24,$f0 + j $31 + addu $2,$24,$6 + + .set macro + .set reorder + .end m32_static16_dl + + .align 2 + .set mips16 + .ent m16_static16_dl +m16_static16_dl: + .frame $sp,24,$31 # vars= 0, regs= 2/0, args= 16, gp= 0 + .mask 0x80010000,-4 + .fmask 0x00000000,0 + save 24,$16,$31 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $16,$6 + .set macro + .set reorder + + addu $2,$16 + restore 24,$16,$31 + j $31 + .end m16_static16_dl + # Stub function for m16_static16_dl (double) + .set nomips16 + .section .mips16.fn.m16_static16_dl,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static16_dl +__fn_stub_m16_static16_dl: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static16_dl + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static16_dl + .previous + + .align 2 + .globl m32_dlld + .set nomips16 + .ent m32_dlld +m32_dlld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f1,$f12 + mfc1 $4,$f1 + addu $3,$4,$6 + addu $2,$3,$7 + ldc1 $f0,16($sp) + trunc.w.d $f2,$f0 + mfc1 $24,$f2 + j $31 + addu $2,$2,$24 + + .set macro + .set reorder + .end m32_dlld + + .align 2 + .globl m16_dlld + .set mips16 + .ent m16_dlld +m16_dlld: + .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0 + .mask 0x80030000,-4 + .fmask 0x00000000,0 + save 32,$16,$17,$31 + move $16,$6 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $17,$7 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + addu $16,$2,$16 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + addu $16,$17 + .set macro + .set reorder + + addu $2,$16,$2 + restore 32,$16,$17,$31 + j $31 + .end m16_dlld + # Stub function for m16_dlld (double) + .set nomips16 + .section .mips16.fn.m16_dlld,"ax",@progbits + .align 2 + .ent __fn_stub_m16_dlld +__fn_stub_m16_dlld: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_dlld + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_dlld + .previous + + .align 2 + .set nomips16 + .ent m32_static_dlld +m32_static_dlld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f1,$f12 + mfc1 $4,$f1 + addu $3,$4,$6 + addu $2,$3,$7 + ldc1 $f0,16($sp) + trunc.w.d $f2,$f0 + mfc1 $24,$f2 + j $31 + addu $2,$2,$24 + + .set macro + .set reorder + .end m32_static_dlld + + .align 2 + .set mips16 + .ent m16_static_dlld +m16_static_dlld: + .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0 + .mask 0x80030000,-4 + .fmask 0x00000000,0 + save 32,$16,$17,$31 + move $16,$6 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $17,$7 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + addu $16,$2,$16 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + addu $16,$17 + .set macro + .set reorder + + addu $2,$16,$2 + restore 32,$16,$17,$31 + j $31 + .end m16_static_dlld + # Stub function for m16_static_dlld (double) + .set nomips16 + .section .mips16.fn.m16_static_dlld,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static_dlld +__fn_stub_m16_static_dlld: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static_dlld + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static_dlld + .previous + + .align 2 + .set nomips16 + .ent m32_static1_dlld +m32_static1_dlld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f1,$f12 + mfc1 $4,$f1 + addu $3,$4,$6 + addu $2,$3,$7 + ldc1 $f0,16($sp) + trunc.w.d $f2,$f0 + mfc1 $24,$f2 + j $31 + addu $2,$2,$24 + + .set macro + .set reorder + .end m32_static1_dlld + + .align 2 + .set mips16 + .ent m16_static1_dlld +m16_static1_dlld: + .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0 + .mask 0x80030000,-4 + .fmask 0x00000000,0 + save 32,$16,$17,$31 + move $16,$6 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $17,$7 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + addu $16,$2,$16 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + addu $16,$17 + .set macro + .set reorder + + addu $2,$16,$2 + restore 32,$16,$17,$31 + j $31 + .end m16_static1_dlld + # Stub function for m16_static1_dlld (double) + .set nomips16 + .section .mips16.fn.m16_static1_dlld,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static1_dlld +__fn_stub_m16_static1_dlld: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static1_dlld + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static1_dlld + .previous + + .align 2 + .set nomips16 + .ent m32_static32_dlld +m32_static32_dlld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f1,$f12 + mfc1 $4,$f1 + addu $3,$4,$6 + addu $2,$3,$7 + ldc1 $f0,16($sp) + trunc.w.d $f2,$f0 + mfc1 $24,$f2 + j $31 + addu $2,$2,$24 + + .set macro + .set reorder + .end m32_static32_dlld + + .align 2 + .set mips16 + .ent m16_static32_dlld +m16_static32_dlld: + .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0 + .mask 0x80030000,-4 + .fmask 0x00000000,0 + save 32,$16,$17,$31 + move $16,$6 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $17,$7 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + addu $16,$2,$16 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + addu $16,$17 + .set macro + .set reorder + + addu $2,$16,$2 + restore 32,$16,$17,$31 + j $31 + .end m16_static32_dlld + # Stub function for m16_static32_dlld (double) + .set nomips16 + .section .mips16.fn.m16_static32_dlld,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static32_dlld +__fn_stub_m16_static32_dlld: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static32_dlld + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static32_dlld + .previous + + .align 2 + .set nomips16 + .ent m32_static16_dlld +m32_static16_dlld: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + trunc.w.d $f1,$f12 + mfc1 $4,$f1 + addu $3,$4,$6 + addu $2,$3,$7 + ldc1 $f0,16($sp) + trunc.w.d $f2,$f0 + mfc1 $24,$f2 + j $31 + addu $2,$2,$24 + + .set macro + .set reorder + .end m32_static16_dlld + + .align 2 + .set mips16 + .ent m16_static16_dlld +m16_static16_dlld: + .frame $sp,32,$31 # vars= 0, regs= 3/0, args= 16, gp= 0 + .mask 0x80030000,-4 + .fmask 0x00000000,0 + save 32,$16,$17,$31 + move $16,$6 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + move $17,$7 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + addu $16,$2,$16 + .set noreorder + .set nomacro + #jal __mips16_fixdfsi + addu $16,$17 + .set macro + .set reorder + + addu $2,$16,$2 + restore 32,$16,$17,$31 + j $31 + .end m16_static16_dlld + # Stub function for m16_static16_dlld (double) + .set nomips16 + .section .mips16.fn.m16_static16_dlld,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static16_dlld +__fn_stub_m16_static16_dlld: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static16_dlld + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static16_dlld + .previous + + .align 2 + .globl m32_d_l + .set nomips16 + .ent m32_d_l +m32_d_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $4,$f2 + j $31 + cvt.d.w $f0,$f2 + + .set macro + .set reorder + .end m32_d_l + + .align 2 + .globl m16_d_l + .set mips16 + .ent m16_d_l +m16_d_l: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_floatsidf + #jal __mips16_ret_df + restore 24,$31 + j $31 + .end m16_d_l + + .align 2 + .set nomips16 + .ent m32_static_d_l +m32_static_d_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $4,$f2 + j $31 + cvt.d.w $f0,$f2 + + .set macro + .set reorder + .end m32_static_d_l + + .align 2 + .set mips16 + .ent m16_static_d_l +m16_static_d_l: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_floatsidf + #jal __mips16_ret_df + restore 24,$31 + j $31 + .end m16_static_d_l + + .align 2 + .set nomips16 + .ent m32_static1_d_l +m32_static1_d_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $4,$f2 + j $31 + cvt.d.w $f0,$f2 + + .set macro + .set reorder + .end m32_static1_d_l + + .align 2 + .set mips16 + .ent m16_static1_d_l +m16_static1_d_l: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_floatsidf + #jal __mips16_ret_df + restore 24,$31 + j $31 + .end m16_static1_d_l + + .align 2 + .set nomips16 + .ent m32_static32_d_l +m32_static32_d_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $4,$f2 + j $31 + cvt.d.w $f0,$f2 + + .set macro + .set reorder + .end m32_static32_d_l + + .align 2 + .set mips16 + .ent m16_static32_d_l +m16_static32_d_l: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_floatsidf + #jal __mips16_ret_df + restore 24,$31 + j $31 + .end m16_static32_d_l + + .align 2 + .set nomips16 + .ent m32_static16_d_l +m32_static16_d_l: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + mtc1 $4,$f2 + j $31 + cvt.d.w $f0,$f2 + + .set macro + .set reorder + .end m32_static16_d_l + + .align 2 + .set mips16 + .ent m16_static16_d_l +m16_static16_d_l: + .frame $sp,24,$31 # vars= 0, regs= 1/0, args= 16, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 24,$31 + #jal __mips16_floatsidf + #jal __mips16_ret_df + restore 24,$31 + j $31 + .end m16_static16_d_l + + .align 2 + .globl m32_d_d + .set nomips16 + .ent m32_d_d +m32_d_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + mov.d $f0,$f12 + + .set macro + .set reorder + .end m32_d_d + + .align 2 + .globl m16_d_d + .set mips16 + .ent m16_d_d +m16_d_d: + .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 8,$31 + move $3,$5 + .set noreorder + .set nomacro + #jal __mips16_ret_df + move $2,$4 + .set macro + .set reorder + + restore 8,$31 + j $31 + .end m16_d_d + # Stub function for m16_d_d (double) + .set nomips16 + .section .mips16.fn.m16_d_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_d_d +__fn_stub_m16_d_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_d_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_d_d + .previous + + .align 2 + .set nomips16 + .ent m32_static_d_d +m32_static_d_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + mov.d $f0,$f12 + + .set macro + .set reorder + .end m32_static_d_d + + .align 2 + .set mips16 + .ent m16_static_d_d +m16_static_d_d: + .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 8,$31 + move $3,$5 + .set noreorder + .set nomacro + #jal __mips16_ret_df + move $2,$4 + .set macro + .set reorder + + restore 8,$31 + j $31 + .end m16_static_d_d + # Stub function for m16_static_d_d (double) + .set nomips16 + .section .mips16.fn.m16_static_d_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static_d_d +__fn_stub_m16_static_d_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static_d_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static_d_d + .previous + + .align 2 + .set nomips16 + .ent m32_static1_d_d +m32_static1_d_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + mov.d $f0,$f12 + + .set macro + .set reorder + .end m32_static1_d_d + + .align 2 + .set mips16 + .ent m16_static1_d_d +m16_static1_d_d: + .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 8,$31 + move $3,$5 + .set noreorder + .set nomacro + #jal __mips16_ret_df + move $2,$4 + .set macro + .set reorder + + restore 8,$31 + j $31 + .end m16_static1_d_d + # Stub function for m16_static1_d_d (double) + .set nomips16 + .section .mips16.fn.m16_static1_d_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static1_d_d +__fn_stub_m16_static1_d_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static1_d_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static1_d_d + .previous + + .align 2 + .set nomips16 + .ent m32_static32_d_d +m32_static32_d_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + mov.d $f0,$f12 + + .set macro + .set reorder + .end m32_static32_d_d + + .align 2 + .set mips16 + .ent m16_static32_d_d +m16_static32_d_d: + .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 8,$31 + move $3,$5 + .set noreorder + .set nomacro + #jal __mips16_ret_df + move $2,$4 + .set macro + .set reorder + + restore 8,$31 + j $31 + .end m16_static32_d_d + # Stub function for m16_static32_d_d (double) + .set nomips16 + .section .mips16.fn.m16_static32_d_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static32_d_d +__fn_stub_m16_static32_d_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static32_d_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static32_d_d + .previous + + .align 2 + .set nomips16 + .ent m32_static16_d_d +m32_static16_d_d: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + .set noreorder + .set nomacro + + j $31 + mov.d $f0,$f12 + + .set macro + .set reorder + .end m32_static16_d_d + + .align 2 + .set mips16 + .ent m16_static16_d_d +m16_static16_d_d: + .frame $sp,8,$31 # vars= 0, regs= 1/0, args= 0, gp= 0 + .mask 0x80000000,-4 + .fmask 0x00000000,0 + save 8,$31 + move $3,$5 + .set noreorder + .set nomacro + #jal __mips16_ret_df + move $2,$4 + .set macro + .set reorder + + restore 8,$31 + j $31 + .end m16_static16_d_d + # Stub function for m16_static16_d_d (double) + .set nomips16 + .section .mips16.fn.m16_static16_d_d,"ax",@progbits + .align 2 + .ent __fn_stub_m16_static16_d_d +__fn_stub_m16_static16_d_d: + .set noreorder + mfc1 $4,$f13 + mfc1 $5,$f12 + .set noat + la $1,m16_static16_d_d + jr $1 + .set at + nop + .set reorder + .end __fn_stub_m16_static16_d_d + .previous + + .align 2 + .globl f32 + .set nomips16 + .ent f32 +f32: + .frame $sp,64,$31 # vars= 0, regs= 3/3, args= 24, gp= 0 + .mask 0x80030000,-32 + .fmask 0x03f00000,-8 + .set noreorder + .set nomacro + + addiu $sp,$sp,-64 + sw $17,28($sp) + move $17,$4 + sw $31,32($sp) + sdc1 $f24,56($sp) + sw $16,24($sp) + sdc1 $f22,48($sp) + sdc1 $f20,40($sp) + mtc1 $7,$f22 + jal m32_static1_l + mtc1 $6,$f23 + + move $4,$17 + jal m16_static1_l + move $16,$2 + + addu $16,$16,$2 + jal m32_static1_d + mov.d $f12,$f22 + + addu $16,$16,$2 + jal m16_static1_d + mov.d $f12,$f22 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m32_static1_ld + addu $16,$16,$2 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m16_static1_ld + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m32_static1_dl + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m16_static1_dl + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + sdc1 $f22,16($sp) + mov.d $f12,$f22 + jal m32_static1_dlld + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + mov.d $f12,$f22 + sdc1 $f22,16($sp) + jal m16_static1_dlld + addu $16,$16,$2 + + move $4,$17 + jal m32_static1_d_l + addu $16,$16,$2 + + move $4,$17 + jal m16_static1_d_l + mov.d $f20,$f0 + + add.d $f20,$f20,$f0 + jal m32_static1_d_d + mov.d $f12,$f22 + + add.d $f20,$f20,$f0 + jal m16_static1_d_d + mov.d $f12,$f22 + + move $4,$17 + jal m32_static32_l + add.d $f20,$f20,$f0 + + move $4,$17 + jal m16_static32_l + addu $16,$16,$2 + + addu $16,$16,$2 + jal m32_static32_d + mov.d $f12,$f22 + + addu $16,$16,$2 + jal m16_static32_d + mov.d $f12,$f22 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m32_static32_ld + addu $16,$16,$2 + + move $4,$17 + mfc1 $7,$f22 + mfc1 $6,$f23 + jal m16_static32_ld + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m32_static32_dl + addu $16,$16,$2 + + move $6,$17 + mov.d $f12,$f22 + jal m16_static32_dl + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + sdc1 $f22,16($sp) + mov.d $f12,$f22 + jal m32_static32_dlld + addu $16,$16,$2 + + move $6,$17 + move $7,$17 + mov.d $f12,$f22 + sdc1 $f22,16($sp) + jal m16_static32_dlld + addu $16,$16,$2 + + move $4,$17 + jal m32_static32_d_l + addu $16,$16,$2 + + move $4,$17 + jal m16_static32_d_l + add.d $f20,$f20,$f0 + + add.d $f20,$f20,$f0 + jal m32_static32_d_d + mov.d $f12,$f22 + + mtc1 $16,$f24 + add.d $f20,$f20,$f0 + jal m16_static32_d_d + mov.d $f12,$f22 + + lw $31,32($sp) + lw $17,28($sp) + lw $16,24($sp) + add.d $f20,$f20,$f0 + ldc1 $f22,48($sp) + cvt.d.w $f0,$f24 + ldc1 $f24,56($sp) + add.d $f0,$f0,$f20 + ldc1 $f20,40($sp) + j $31 + addiu $sp,$sp,64 + + .set macro + .set reorder + .end f32 + + # Stub function to call m32_static1_d (double) + .set nomips16 + .section .mips16.call.m32_static1_d,"ax",@progbits + .align 2 + .ent __call_stub_m32_static1_d +__call_stub_m32_static1_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static1_d + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static1_d + .previous + + # Stub function to call m16_static1_d (double) + .set nomips16 + .section .mips16.call.m16_static1_d,"ax",@progbits + .align 2 + .ent __call_stub_m16_static1_d +__call_stub_m16_static1_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static1_d + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static1_d + .previous + + # Stub function to call m32_static1_dl (double) + .set nomips16 + .section .mips16.call.m32_static1_dl,"ax",@progbits + .align 2 + .ent __call_stub_m32_static1_dl +__call_stub_m32_static1_dl: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static1_dl + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static1_dl + .previous + + # Stub function to call m16_static1_dl (double) + .set nomips16 + .section .mips16.call.m16_static1_dl,"ax",@progbits + .align 2 + .ent __call_stub_m16_static1_dl +__call_stub_m16_static1_dl: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static1_dl + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static1_dl + .previous + + # Stub function to call m32_static1_dlld (double) + .set nomips16 + .section .mips16.call.m32_static1_dlld,"ax",@progbits + .align 2 + .ent __call_stub_m32_static1_dlld +__call_stub_m32_static1_dlld: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static1_dlld + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static1_dlld + .previous + + # Stub function to call m16_static1_dlld (double) + .set nomips16 + .section .mips16.call.m16_static1_dlld,"ax",@progbits + .align 2 + .ent __call_stub_m16_static1_dlld +__call_stub_m16_static1_dlld: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static1_dlld + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static1_dlld + .previous + + # Stub function to call double m32_static1_d_l () + .set nomips16 + .section .mips16.call.fp.m32_static1_d_l,"ax",@progbits + .align 2 + .ent __call_stub_fp_m32_static1_d_l +__call_stub_fp_m32_static1_d_l: + .set noreorder + move $18,$31 + jal m32_static1_d_l + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m32_static1_d_l + .previous + + # Stub function to call double m16_static1_d_l () + .set nomips16 + .section .mips16.call.fp.m16_static1_d_l,"ax",@progbits + .align 2 + .ent __call_stub_fp_m16_static1_d_l +__call_stub_fp_m16_static1_d_l: + .set noreorder + move $18,$31 + jal m16_static1_d_l + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m16_static1_d_l + .previous + + # Stub function to call double m32_static1_d_d (double) + .set nomips16 + .section .mips16.call.fp.m32_static1_d_d,"ax",@progbits + .align 2 + .ent __call_stub_fp_m32_static1_d_d +__call_stub_fp_m32_static1_d_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + move $18,$31 + jal m32_static1_d_d + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m32_static1_d_d + .previous + + # Stub function to call double m16_static1_d_d (double) + .set nomips16 + .section .mips16.call.fp.m16_static1_d_d,"ax",@progbits + .align 2 + .ent __call_stub_fp_m16_static1_d_d +__call_stub_fp_m16_static1_d_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + move $18,$31 + jal m16_static1_d_d + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m16_static1_d_d + .previous + + # Stub function to call m32_static16_d (double) + .set nomips16 + .section .mips16.call.m32_static16_d,"ax",@progbits + .align 2 + .ent __call_stub_m32_static16_d +__call_stub_m32_static16_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static16_d + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static16_d + .previous + + # Stub function to call m16_static16_d (double) + .set nomips16 + .section .mips16.call.m16_static16_d,"ax",@progbits + .align 2 + .ent __call_stub_m16_static16_d +__call_stub_m16_static16_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static16_d + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static16_d + .previous + + # Stub function to call m32_static16_dl (double) + .set nomips16 + .section .mips16.call.m32_static16_dl,"ax",@progbits + .align 2 + .ent __call_stub_m32_static16_dl +__call_stub_m32_static16_dl: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static16_dl + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static16_dl + .previous + + # Stub function to call m16_static16_dl (double) + .set nomips16 + .section .mips16.call.m16_static16_dl,"ax",@progbits + .align 2 + .ent __call_stub_m16_static16_dl +__call_stub_m16_static16_dl: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static16_dl + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static16_dl + .previous + + # Stub function to call m32_static16_dlld (double) + .set nomips16 + .section .mips16.call.m32_static16_dlld,"ax",@progbits + .align 2 + .ent __call_stub_m32_static16_dlld +__call_stub_m32_static16_dlld: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m32_static16_dlld + jr $1 + .set at + nop + .set reorder + .end __call_stub_m32_static16_dlld + .previous + + # Stub function to call m16_static16_dlld (double) + .set nomips16 + .section .mips16.call.m16_static16_dlld,"ax",@progbits + .align 2 + .ent __call_stub_m16_static16_dlld +__call_stub_m16_static16_dlld: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + .set noat + la $1,m16_static16_dlld + jr $1 + .set at + nop + .set reorder + .end __call_stub_m16_static16_dlld + .previous + + # Stub function to call double m32_static16_d_l () + .set nomips16 + .section .mips16.call.fp.m32_static16_d_l,"ax",@progbits + .align 2 + .ent __call_stub_fp_m32_static16_d_l +__call_stub_fp_m32_static16_d_l: + .set noreorder + move $18,$31 + jal m32_static16_d_l + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m32_static16_d_l + .previous + + # Stub function to call double m16_static16_d_l () + .set nomips16 + .section .mips16.call.fp.m16_static16_d_l,"ax",@progbits + .align 2 + .ent __call_stub_fp_m16_static16_d_l +__call_stub_fp_m16_static16_d_l: + .set noreorder + move $18,$31 + jal m16_static16_d_l + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m16_static16_d_l + .previous + + # Stub function to call double m32_static16_d_d (double) + .set nomips16 + .section .mips16.call.fp.m32_static16_d_d,"ax",@progbits + .align 2 + .ent __call_stub_fp_m32_static16_d_d +__call_stub_fp_m32_static16_d_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + move $18,$31 + jal m32_static16_d_d + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m32_static16_d_d + .previous + + # Stub function to call double m16_static16_d_d (double) + .set nomips16 + .section .mips16.call.fp.m16_static16_d_d,"ax",@progbits + .align 2 + .ent __call_stub_fp_m16_static16_d_d +__call_stub_fp_m16_static16_d_d: + .set noreorder + mtc1 $4,$f13 + mtc1 $5,$f12 + move $18,$31 + jal m16_static16_d_d + nop + mfc1 $2,$f1 + mfc1 $3,$f0 + j $18 + nop + .set reorder + .end __call_stub_fp_m16_static16_d_d + .previous + + .align 2 + .globl f16 + .set mips16 + .ent f16 +f16: + .frame $sp,104,$31 # vars= 64, regs= 4/0, args= 24, gp= 0 + .mask 0x80070000,-4 + .fmask 0x00000000,0 + save 104,$16,$17,$18,$31 + move $17,$4 + sw $7,116($sp) + .set noreorder + .set nomacro + jal m32_static1_l + sw $6,112($sp) + .set macro + .set reorder + + move $4,$17 + .set noreorder + .set nomacro + jal m16_static1_l + move $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + .set noreorder + .set nomacro + jal m32_static1_d + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + .set noreorder + .set nomacro + jal m16_static1_d + addu $16,$2 + .set macro + .set reorder + + lw $7,116($sp) + lw $6,112($sp) + move $4,$17 + .set noreorder + .set nomacro + jal m32_static1_ld + addu $16,$2 + .set macro + .set reorder + + lw $7,116($sp) + lw $6,112($sp) + move $4,$17 + .set noreorder + .set nomacro + jal m16_static1_ld + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + move $6,$17 + .set noreorder + .set nomacro + jal m32_static1_dl + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + move $6,$17 + .set noreorder + .set nomacro + jal m16_static1_dl + addu $16,$2 + .set macro + .set reorder + + lw $3,116($sp) + lw $6,112($sp) + sw $3,20($sp) + move $5,$3 + sw $6,16($sp) + move $4,$6 + move $7,$17 + move $6,$17 + .set noreorder + .set nomacro + jal m32_static1_dlld + addu $16,$2 + .set macro + .set reorder + + addu $16,$2 + lw $7,112($sp) + lw $2,116($sp) + move $6,$17 + move $5,$2 + sw $7,16($sp) + move $4,$7 + sw $2,20($sp) + .set noreorder + .set nomacro + jal m16_static1_dlld + move $7,$17 + .set macro + .set reorder + + move $4,$17 + .set noreorder + .set nomacro + jal m32_static1_d_l + addu $16,$2 + .set macro + .set reorder + + move $4,$17 + sw $3,28($sp) + .set noreorder + .set nomacro + jal m16_static1_d_l + sw $2,24($sp) + .set macro + .set reorder + + lw $5,28($sp) + lw $4,24($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + sw $3,36($sp) + .set noreorder + .set nomacro + jal m32_static1_d_d + sw $2,32($sp) + .set macro + .set reorder + + lw $5,36($sp) + lw $4,32($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + sw $3,44($sp) + .set noreorder + .set nomacro + jal m16_static1_d_d + sw $2,40($sp) + .set macro + .set reorder + + lw $5,44($sp) + lw $4,40($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + move $4,$17 + sw $3,52($sp) + .set noreorder + .set nomacro + jal m32_static16_l + sw $2,48($sp) + .set macro + .set reorder + + move $4,$17 + .set noreorder + .set nomacro + jal m16_static16_l + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + .set noreorder + .set nomacro + jal m32_static16_d + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + .set noreorder + .set nomacro + jal m16_static16_d + addu $16,$2 + .set macro + .set reorder + + lw $7,116($sp) + lw $6,112($sp) + move $4,$17 + .set noreorder + .set nomacro + jal m32_static16_ld + addu $16,$2 + .set macro + .set reorder + + lw $7,116($sp) + lw $6,112($sp) + move $4,$17 + .set noreorder + .set nomacro + jal m16_static16_ld + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + move $6,$17 + .set noreorder + .set nomacro + jal m32_static16_dl + addu $16,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + move $6,$17 + .set noreorder + .set nomacro + jal m16_static16_dl + addu $16,$2 + .set macro + .set reorder + + lw $4,116($sp) + lw $6,112($sp) + sw $4,20($sp) + sw $6,16($sp) + move $5,$4 + move $7,$17 + move $4,$6 + move $6,$17 + .set noreorder + .set nomacro + jal m32_static16_dlld + addu $16,$2 + .set macro + .set reorder + + addu $16,$2 + lw $3,116($sp) + lw $2,112($sp) + move $6,$17 + move $7,$17 + sw $3,20($sp) + move $5,$3 + sw $2,16($sp) + .set noreorder + .set nomacro + jal m16_static16_dlld + move $4,$2 + .set macro + .set reorder + + move $4,$17 + .set noreorder + .set nomacro + jal m32_static16_d_l + addu $16,$2 + .set macro + .set reorder + + lw $5,52($sp) + lw $4,48($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + move $4,$17 + sw $3,60($sp) + .set noreorder + .set nomacro + jal m16_static16_d_l + sw $2,56($sp) + .set macro + .set reorder + + lw $5,60($sp) + lw $4,56($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + sw $3,68($sp) + .set noreorder + .set nomacro + jal m32_static16_d_d + sw $2,64($sp) + .set macro + .set reorder + + lw $5,68($sp) + lw $4,64($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + lw $5,116($sp) + lw $4,112($sp) + sw $3,76($sp) + .set noreorder + .set nomacro + jal m16_static16_d_d + sw $2,72($sp) + .set macro + .set reorder + + lw $5,76($sp) + lw $4,72($sp) + move $7,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $6,$2 + .set macro + .set reorder + + move $4,$16 + sw $3,84($sp) + .set noreorder + .set nomacro + #jal __mips16_floatsidf + sw $2,80($sp) + .set macro + .set reorder + + lw $7,84($sp) + lw $6,80($sp) + move $5,$3 + .set noreorder + .set nomacro + #jal __mips16_adddf3 + move $4,$2 + .set macro + .set reorder + + #jal __mips16_ret_df + restore 104,$16,$17,$18,$31 + j $31 + .end f16 diff --git a/ld/testsuite/ld-mips-elf/mips16-intermix.d b/ld/testsuite/ld-mips-elf/mips16-intermix.d new file mode 100644 index 0000000000000..5c6ee689ab872 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-intermix.d @@ -0,0 +1,132 @@ + +.*: +file format elf.*mips + +SYMBOL TABLE: +#... +.* l F .text 0+[0-9a-f]+ m32_static_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_l +.* l F .text 0+[0-9a-f]+ m32_static1_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_l +.* l F .text 0+[0-9a-f]+ m32_static32_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_l +.* l F .text 0+[0-9a-f]+ m32_static16_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_l +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_d +.* l F .text 0+[0-9a-f]+ m32_static_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_d +.* l F .text 0+[0-9a-f]+ m32_static1_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_d +.* l F .text 0+[0-9a-f]+ m32_static32_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_d +.* l F .text 0+[0-9a-f]+ m32_static16_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_d +.* l F .text 0+[0-9a-f]+ m32_static_ld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_ld +.* l F .text 0+[0-9a-f]+ m32_static1_ld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_ld +.* l F .text 0+[0-9a-f]+ m32_static32_ld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_ld +.* l F .text 0+[0-9a-f]+ m32_static16_ld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_ld +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_dl +.* l F .text 0+[0-9a-f]+ m32_static_dl +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_dl +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_dl +.* l F .text 0+[0-9a-f]+ m32_static1_dl +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dl +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_dl +.* l F .text 0+[0-9a-f]+ m32_static32_dl +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dl +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_dl +.* l F .text 0+[0-9a-f]+ m32_static16_dl +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dl +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_dl +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_dlld +.* l F .text 0+[0-9a-f]+ m32_static_dlld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_dlld +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_dlld +.* l F .text 0+[0-9a-f]+ m32_static1_dlld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dlld +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_dlld +.* l F .text 0+[0-9a-f]+ m32_static32_dlld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dlld +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_dlld +.* l F .text 0+[0-9a-f]+ m32_static16_dlld +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dlld +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_dlld +.* l F .text 0+[0-9a-f]+ m32_static_d_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_l +.* l F .text 0+[0-9a-f]+ m32_static1_d_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_l +.* l F .text 0+[0-9a-f]+ m32_static32_d_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_l +.* l F .text 0+[0-9a-f]+ m32_static16_d_l +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_l +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_d_d +.* l F .text 0+[0-9a-f]+ m32_static_d_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static_d_d +.* l F .text 0+[0-9a-f]+ m32_static1_d_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static1_d_d +.* l F .text 0+[0-9a-f]+ m32_static32_d_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static32_d_d +.* l F .text 0+[0-9a-f]+ m32_static16_d_d +.* l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_d +.* l F .text 0+[0-9a-f]+ __fn_stub_m16_static16_d_d +#... +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_d +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_d +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_dl +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_dl +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static1_dlld +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static1_dlld +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_d +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_d +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_dl +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_dl +.* l F .text 0+[0-9a-f]+ __call_stub_m32_static16_dlld +.* l F .text 0+[0-9a-f]+ __call_stub_m16_static16_dlld +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d +.* l F .text 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d +#... +.* g F .text 0+[0-9a-f]+ m32_ld +#... +.* g F .text 0+[0-9a-f]+ m32_d_l +.* g F .text 0+[0-9a-f]+ 0xf0 m16_d_d +.* g F .text 0+[0-9a-f]+ 0xf0 m16_d +#... +.* g F .text 0+[0-9a-f]+ 0xf0 f16 +#... +.* g F .text 0+[0-9a-f]+ m32_d +#... +.* g F .text 0+[0-9a-f]+ 0xf0 m16_dl +#... +.* g F .text 0+[0-9a-f]+ f32 +#... +.* g F .text 0+[0-9a-f]+ 0xf0 m16_l +#... +.* g F .text 0+[0-9a-f]+ 0xf0 m16_ld +#... +.* g F .text 0+[0-9a-f]+ 0xf0 m16_dlld +.* g F .text 0+[0-9a-f]+ m32_d_d +#... +.* g F .text 0+[0-9a-f]+ m32_dl +#... +.* g F .text 0+[0-9a-f]+ m32_dlld +#... +.* g F .text 0+[0-9a-f]+ 0xf0 m16_d_l +#... +.* g F .text 0+[0-9a-f]+ m32_l +#pass diff --git a/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.d b/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.d new file mode 100644 index 0000000000000..9990493c1b980 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.d @@ -0,0 +1,114 @@ +#name: MIPS16 interlinking for local functions 1 +#source: mips16-local-stubs-1.s +#as: -mips4 +#ld: -Ttext 0x20000000 -e caller1 +#objdump: -dr +#... +Disassembly of section \.text: + +20000000 <f1>: +20000000: 03e00008 jr ra +20000004: 00000000 nop + +20000008 <g1>: +20000008: 03e00008 jr ra +2000000c: 00000000 nop + +20000010 <h1>: +20000010: e820 jr ra +20000012: 6500 nop + +20000014 <f2>: +20000014: 03e00008 jr ra +20000018: 00000000 nop + +2000001c <g2>: +2000001c: 03e00008 jr ra +20000020: 00000000 nop + +20000024 <h2>: +20000024: e820 jr ra +20000026: 6500 nop + +20000028 <f3>: +20000028: 03e00008 jr ra +2000002c: 00000000 nop + +20000030 <g3>: +20000030: 03e00008 jr ra +20000034: 00000000 nop + +20000038 <h3>: +20000038: e820 jr ra +2000003a: 6500 nop + +2000003c <caller1>: +2000003c: 0c000000 jal 20000000 <f1> +20000040: 00000000 nop +20000044: 0c000005 jal 20000014 <f2> +20000048: 00000000 nop +2000004c: 0c000002 jal 20000008 <g1> +20000050: 00000000 nop +20000054: 0c000007 jal 2000001c <g2> +20000058: 00000000 nop +2000005c: 0c000024 jal 20000090 <stub_for_h1> +20000060: 00000000 nop +20000064: 0c000028 jal 200000a0 <stub_for_h2> +20000068: 00000000 nop + +2000006c <caller2>: +2000006c: 1c00 0030 jalx 200000c0 <stub_for_f1> +20000070: 6500 nop +20000072: 1c00 0038 jalx 200000e0 <stub_for_f2> +20000076: 6500 nop +20000078: 1c00 0034 jalx 200000d0 <stub_for_g1> +2000007c: 6500 nop +2000007e: 1c00 003c jalx 200000f0 <stub_for_g2> +20000082: 6500 nop +20000084: 1800 0004 jal 20000010 <h1> +20000088: 6500 nop +2000008a: 1800 0009 jal 20000024 <h2> +2000008e: 6500 nop + +20000090 <stub_for_h1>: +20000090: 3c012000 lui at,0x2000 +20000094: 24210011 addiu at,at,17 +20000098: 00200008 jr at +2000009c: 00000000 nop + +200000a0 <stub_for_h2>: +200000a0: 3c012000 lui at,0x2000 +200000a4: 24210025 addiu at,at,37 +200000a8: 00200008 jr at +200000ac: 00000000 nop + +# This isn't actually called, but is referenced from the .pdr section. +200000b0 <stub_for_h3>: +200000b0: 3c012000 lui at,0x2000 +200000b4: 24210039 addiu at,at,57 +200000b8: 00200008 jr at +200000bc: 00000000 nop + +200000c0 <stub_for_f1>: +200000c0: 3c012000 lui at,0x2000 +200000c4: 24210000 addiu at,at,0 +200000c8: 00200008 jr at +200000cc: 00000000 nop + +200000d0 <stub_for_g1>: +200000d0: 3c012000 lui at,0x2000 +200000d4: 24210008 addiu at,at,8 +200000d8: 00200008 jr at +200000dc: 00000000 nop + +200000e0 <stub_for_f2>: +200000e0: 3c012000 lui at,0x2000 +200000e4: 24210014 addiu at,at,20 +200000e8: 00200008 jr at +200000ec: 00000000 nop + +200000f0 <stub_for_g2>: +200000f0: 3c012000 lui at,0x2000 +200000f4: 2421001c addiu at,at,28 +200000f8: 00200008 jr at +200000fc: 00000000 nop diff --git a/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.s b/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.s new file mode 100644 index 0000000000000..9904402584276 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/mips16-local-stubs-1.s @@ -0,0 +1,49 @@ + .macro makestub,type,func,section + .text + .set \type + .type \func,@function + .ent \func +\func: + jr $31 + .end \func + + .section \section,"ax",@progbits + .set nomips16 + .type stub_for_\func,@function + .ent stub_for_\func +stub_for_\func: + .set noat + la $1,\func + jr $1 + .set at + .end stub_for_\func + .endm + + .macro makestubs,id + makestub nomips16,f\id,.mips16.call.F\id + makestub nomips16,g\id,.mips16.call.fp.G\id + makestub mips16,h\id,.mips16.fn.H\id + .endm + + .macro makecaller,type,func + .text + .set \type + .globl \func + .type \func,@function + .ent \func +\func: + jal f1 + jal f2 + jal g1 + jal g2 + jal h1 + jal h2 + .end \func + .endm + + makestubs 1 + makestubs 2 + makestubs 3 + + makecaller nomips16,caller1 + makecaller mips16,caller2 diff --git a/ld/testsuite/ld-mips-elf/multi-got-1.d b/ld/testsuite/ld-mips-elf/multi-got-1.d index d04f9c47d3981..db76eea673691 100644 --- a/ld/testsuite/ld-mips-elf/multi-got-1.d +++ b/ld/testsuite/ld-mips-elf/multi-got-1.d @@ -5,14 +5,13 @@ #ld: -melf32btsmip -shared #readelf: -d -r -Dynamic section at offset 0xcc contains 18 entries: +Dynamic section at offset .* contains 17 entries: Tag Type Name/Value - 0x00000004 \(HASH\) 0x184 + 0x00000004 \(HASH\) 0x[0-9a-f]+ 0x00000005 \(STRTAB\) 0x[0-9a-f]+ 0x00000006 \(SYMTAB\) 0x[0-9a-f]+ 0x0000000a \(STRSZ\) [0-9]+ \(bytes\) 0x0000000b \(SYMENT\) 16 \(bytes\) - 0x00000015 \(DEBUG\) 0x0 0x00000003 \(PLTGOT\) 0x[0-9a-f]+ 0x00000011 \(REL\) 0x[0-9a-f]+ 0x00000012 \(RELSZ\) 65544 \(bytes\) @@ -26,8208 +25,8198 @@ Dynamic section at offset 0xcc contains 18 entries: 0x70000013 \(MIPS_GOTSYM\) 0x[0-9a-f]+ 0x00000000 \(NULL\) 0x0 -Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 8203 entries: +Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 8193 entries: Offset Info Type Sym.Value Sym. Name 00000000 00000000 R_MIPS_NONE -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3817 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1864 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_771 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4264 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4210 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1837 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2960 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2867 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6642 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6292 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7488 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4532 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4162 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6315 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3350 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5021 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2575 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4355 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_734 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5436 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5066 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1136 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4121 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7019 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4577 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2733 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7278 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2538 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2530 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7926 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_878 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_674 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_637 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_224 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6687 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6600 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6250 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5335 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4677 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4257 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3462 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3092 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2187 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2100 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1035 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7406 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6522 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6152 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2022 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6645 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6295 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ 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sym_2_1462 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5020 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7000 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5435 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5065 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1135 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_397 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1855 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_291 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_377 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_35 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6844 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6116 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5524 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5174 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4892 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2344 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1903 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1224 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8080 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5442 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5072 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4463 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_510 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3945 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7853 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7816 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5914 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1614 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_585 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_155 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2897 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1775 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8150 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_871 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8113 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_361 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7736 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4551 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4181 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2596 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2568 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_667 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_217 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4743 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5373 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2525 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1073 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7144 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7024 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3607 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_253 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5491 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1191 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4423 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4073 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2983 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1927 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6866 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6678 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4855 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4665 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2366 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2178 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_432 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_321 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_256 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8042 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6635 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6285 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R_MIPS_REL32 [0-9a-f]+ sym_2_4921 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7680 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7366 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3477 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6574 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5970 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2074 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1670 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4624 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2918 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7246 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5938 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5930 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1638 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1630 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4381 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6762 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6392 -^[0-9a-f]+ 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R_MIPS_REL32 [0-9a-f]+ sym_2_1088 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7764 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3863 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_761 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_677 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_227 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2646 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8122 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2994 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2959 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7912 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7556 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4243 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_726 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8192 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6876 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6022 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2376 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6415 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6065 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4998 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4786 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2648 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5801 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1501 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_403 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6731 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6361 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2231 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6776 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2276 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2603 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6931 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2431 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_550 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_515 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sym_2_5860 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1560 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5626 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5256 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2726 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1326 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6830 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5213 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3301 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2330 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7879 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5669 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5299 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3346 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1369 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4811 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2664 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6541 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6171 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3027 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2041 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7505 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6953 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3736 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2727 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2453 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_53 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_10 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1790 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_270 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_809 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_264 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7174 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5111 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4846 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3117 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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sym_2_2180 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_33 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3916 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8013 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5890 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5855 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1590 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1555 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_30 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5692 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1392 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7569 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7472 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2952 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1762 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7786 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7737 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7163 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7126 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_179 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3313 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3252 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_82 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3703 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3019 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7533 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3741 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_533 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_103 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3838 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6703 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6333 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2203 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2855 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5720 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1420 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7373 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_822 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4246 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1819 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5814 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1514 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2942 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1989 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5754 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3111 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1454 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5327 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3211 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1925 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1027 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_565 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_528 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_135 -^[0-9a-f]+ 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sym_2_7335 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3109 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3681 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1847 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6492 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4657 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_668 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_218 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_955 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6479 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2781 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6436 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6086 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5340 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3908 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1040 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6000 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2963 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_603 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5010 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5889 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4262 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1589 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_67 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_22 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_598 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_168 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8059 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2502 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4837 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4394 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4265 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3182 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_918 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_68 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_23 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5385 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1085 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3369 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2642 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_32 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7071 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7034 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6971 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2471 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7192 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2997 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1959 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_973 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_532 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_102 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1772 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_292 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7661 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[0-9a-f]+ sym_2_273 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5812 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6563 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6193 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5797 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2063 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1497 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5919 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5404 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5034 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1619 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1104 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5517 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5167 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1840 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1217 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3513 -^[0-9a-f]+ [0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_95 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_92 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4563 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4193 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7616 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2820 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4305 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2806 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_688 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_238 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2676 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6575 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5492 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4692 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2668 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2075 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1192 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4348 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_924 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7549 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2623 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7044 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4819 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6798 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2298 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7179 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6753 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6383 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2253 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4760 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4525 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4155 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2744 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8139 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6043 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_891 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_776 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4933 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4526 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4156 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4112 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7562 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4568 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4198 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4113 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5642 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5272 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1342 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4569 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4199 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3799 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7282 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5907 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4520 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4150 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2811 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1607 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_9 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4615 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7476 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6770 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2270 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4612 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3692 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3657 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5774 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1474 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8144 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7632 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7316 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7266 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3130 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3532 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1750 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_739 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4724 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_978 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3562 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3133 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1718 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3235 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7782 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5680 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1380 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6973 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5685 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3009 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2473 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1385 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3324 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5138 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5601 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5231 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3714 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1301 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_312 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2777 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1712 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5648 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5278 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1348 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5735 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2841 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1435 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7235 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6325 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5551 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sym_2_5555 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4436 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4086 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1255 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4826 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4666 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3176 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_394 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7703 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6206 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3428 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3340 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3058 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7072 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7035 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3886 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4038 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2911 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7375 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3342 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5162 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1212 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7788 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3015 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8050 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8015 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7422 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3775 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_359 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6126 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7466 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5452 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5082 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1152 -^[0-9a-f]+ [0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5904 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3730 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1604 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_468 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3739 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_884 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8008 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3387 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3380 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3222 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6905 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3385 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2405 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_990 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6446 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6096 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8131 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6010 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_767 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8111 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7557 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8032 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4258 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5852 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3526 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1552 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7479 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5445 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5075 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4867 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1145 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4824 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3523 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_404 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1965 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5794 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[0-9a-f]+ sym_2_6886 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6604 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6254 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2386 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2104 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6216 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_763 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4161 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_728 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8090 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4576 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7489 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4903 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_723 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6649 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6601 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6299 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6251 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4120 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2149 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2101 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6646 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6296 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5522 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5172 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4505 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4135 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2146 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1222 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5841 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1541 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6521 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6151 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2021 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2536 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_251 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7770 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3463 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3093 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3929 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2833 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7444 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5131 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4895 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3205 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1922 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1906 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1776 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5567 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1267 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5475 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3592 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1768 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[0-9a-f]+ sym_2_2068 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3469 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3099 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4964 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3420 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3050 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1911 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4341 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_718 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4753 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7693 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_414 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5670 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5409 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5039 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1370 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1109 -^[0-9a-f]+ [0-9a-f]+ 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sym_2_7339 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6802 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5695 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2302 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1395 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_660 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_625 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_210 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6816 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5613 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5243 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2316 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1313 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_85 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7392 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1722 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_759 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3884 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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sym_2_680 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_230 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7090 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6790 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2290 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7305 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4639 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_17 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5586 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3118 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1286 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3800 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_444 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_409 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6502 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6228 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6132 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2002 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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R_MIPS_REL32 [0-9a-f]+ sym_2_2083 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_645 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7288 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5779 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1479 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6519 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6149 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2019 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7991 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4323 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7370 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7956 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7783 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6104 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3327 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3642 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2692 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7342 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3561 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5024 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1807 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1899 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5848 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3785 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1548 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7638 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3002 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5844 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1544 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_75 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_72 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5439 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5069 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1139 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_675 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_638 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sym_2_447 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6323 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_907 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_483 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7560 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6779 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3918 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2279 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_486 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5866 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3663 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3126 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1566 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_181 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5663 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5293 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1363 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5721 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4744 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1829 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1421 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5405 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5035 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2595 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1105 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_349 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4285 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1914 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5792 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1492 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5448 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5078 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2945 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1148 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_758 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7614 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_995 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_46 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3198 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_931 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7190 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4425 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4075 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1733 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_576 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_146 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4493 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_880 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4815 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7657 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7133 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6622 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6272 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2122 -^[0-9a-f]+ [0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4847 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2167 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4712 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1936 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3155 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8058 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5226 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2678 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6046 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5976 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3685 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1676 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_475 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5181 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1231 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6003 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5637 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5267 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4351 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1337 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8053 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8037 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8018 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6439 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6089 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1978 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5533 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5183 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1233 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4457 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4021 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5964 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1664 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7058 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6913 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6553 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6183 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2413 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2053 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5771 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1471 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7051 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6509 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6139 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2009 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7990 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5579 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4990 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3008 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1279 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8169 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5969 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1669 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5929 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5921 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4011 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2682 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1629 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1621 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8071 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7401 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2907 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1866 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1799 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6107 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4310 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_386 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4778 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7955 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5576 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3568 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1276 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7264 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6855 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5536 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5186 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4396 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3911 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3417 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3047 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2355 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1236 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5926 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5574 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1626 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1274 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7824 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3953 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2012 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6460 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3505 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_801 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3717 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5923 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1623 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7727 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7014 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6598 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2098 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5539 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5189 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4542 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4172 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sym_2_2234 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1503 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4999 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7272 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5478 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4898 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3121 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1178 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_401 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4507 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4137 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2604 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5433 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5063 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2705 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1133 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7622 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7338 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_873 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4585 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3836 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4042 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3289 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3246 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7810 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4439 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4089 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_757 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_710 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4912 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7575 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7357 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1842 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7698 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4635 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7667 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6928 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2428 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3466 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3166 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3096 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3010 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1973 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7708 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6750 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6380 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2250 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7227 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7197 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5808 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1508 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6752 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6382 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4883 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2252 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4455 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2725 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1784 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7210 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1789 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7257 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6628 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6278 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3619 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2665 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2128 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_749 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6864 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2364 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2794 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2557 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8010 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7588 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6301 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5399 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4412 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4062 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1099 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2628 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2620 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5879 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1579 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5870 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1570 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3150 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6797 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2297 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3543 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1984 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7607 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6795 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4414 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4064 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2295 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_465 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5749 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4845 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1449 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6713 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6343 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4804 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3516 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2213 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1707 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7497 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7175 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5014 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2622 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4984 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7861 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7826 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6758 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6388 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2258 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5356 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4406 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4056 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1056 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_269 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6422 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6072 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2759 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3364 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_170 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5427 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5057 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1127 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2714 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3106 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1821 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7545 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7052 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5967 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4726 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1667 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4770 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3147 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5924 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5608 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5238 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5025 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3992 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1624 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1308 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7402 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2518 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6974 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5997 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5966 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2474 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1697 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1666 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5577 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4320 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1277 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_431 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4430 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4080 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5990 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1690 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6810 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5534 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5184 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2310 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1949 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1234 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_549 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_119 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7591 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6467 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5029 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3928 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3207 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_563 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_526 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_133 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_370 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ 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R_MIPS_REL32 [0-9a-f]+ sym_2_4128 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2158 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_348 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3237 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2630 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5717 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4010 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3134 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1417 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_385 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5767 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2904 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1467 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7368 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3696 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3652 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4906 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3829 -^[0-9a-f]+ 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R_MIPS_REL32 [0-9a-f]+ sym_2_6596 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6281 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2131 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2096 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_389 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7328 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6737 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6367 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3874 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2237 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8158 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3826 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1853 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_851 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_760 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7137 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5709 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3980 -^[0-9a-f]+ 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sym_2_5451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5081 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1151 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3771 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3586 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5905 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1605 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7842 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7807 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4452 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2940 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5944 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1644 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4454 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3381 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_352 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2713 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2587 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7744 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_657 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_207 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3221 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_678 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_228 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7420 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6994 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6959 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6697 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4625 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2972 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2494 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2459 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2197 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6718 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6348 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5328 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2218 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1028 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6303 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5364 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3903 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2864 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1064 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6951 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5410 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5040 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4842 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4697 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4411 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4061 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1110 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_310 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_265 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6711 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6341 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2211 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3630 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_835 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_287 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7319 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6756 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6386 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4417 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4067 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2256 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1981 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6699 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5496 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2974 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2199 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1196 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sym_2_3682 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1019 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3268 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6491 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3857 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1809 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3814 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4529 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4159 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3149 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7940 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7903 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7510 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5606 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5236 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3487 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1820 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1306 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_665 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_215 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4656 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4228 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1954 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5832 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5011 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4261 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1532 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6773 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4392 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3444 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3074 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2273 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6850 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5424 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5054 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3104 -^[0-9a-f]+ [0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_793 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2579 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8112 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7156 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4807 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3191 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_497 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7324 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5384 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2534 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1084 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7070 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7033 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2645 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7361 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_196 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7193 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6689 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R_MIPS_REL32 [0-9a-f]+ sym_2_6195 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2065 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7172 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7776 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7585 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3885 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7140 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6161 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2031 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7883 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_254 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6987 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6661 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6018 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2487 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2161 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2929 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7165 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7128 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2609 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3975 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4703 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_437 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5516 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5166 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4514 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4144 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3169 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1216 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3124 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5123 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5559 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1259 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4559 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4189 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4929 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4027 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8114 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4590 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8165 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_652 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_615 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_202 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3386 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7710 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7460 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2901 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6445 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6095 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_687 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_237 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3731 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2585 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sym_2_969 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7553 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7322 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5618 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5248 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1318 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7989 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7793 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6459 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5568 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3018 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1966 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1268 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_392 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7966 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5203 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1727 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6481 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5611 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5241 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1311 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_395 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5696 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5656 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5286 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1396 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1356 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5599 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1299 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7924 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1774 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1726 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7007 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1957 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1880 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5612 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5242 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1312 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_86 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_83 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5793 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2796 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1721 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1493 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7625 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5657 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5287 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1357 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5724 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1424 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4422 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4072 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7195 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7055 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2850 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_967 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_357 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3429 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3059 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_860 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4031 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1815 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_48 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3556 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4467 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3161 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_823 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4927 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7183 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6404 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6054 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3026 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sym_2_1339 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3333 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4557 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4187 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8003 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7411 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3764 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8056 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7275 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2935 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7641 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7457 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4713 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4769 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3571 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4309 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3142 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2788 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8093 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3906 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3793 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3721 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2930 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_477 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7608 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6493 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5741 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1441 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6898 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3376 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2398 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5145 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8002 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3374 -^[0-9a-f]+ [0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4343 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5486 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4101 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3199 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1186 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5806 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4920 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3511 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1506 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3679 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3581 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_936 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_493 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3196 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2792 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1968 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_984 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8107 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1032 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6556 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6186 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2056 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2773 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4254 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2647 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6100 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2950 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2695 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_101 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4919 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3122 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2602 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_536 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_106 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3837 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3254 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5795 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1495 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5865 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1565 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7920 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6247 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_183 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8078 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5722 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1422 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6204 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7243 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4740 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2738 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4502 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4132 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7399 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3629 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_640 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_605 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7951 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7916 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5143 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5107 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7010 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2549 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1867 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2506 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_849 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8070 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7214 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5140 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2965 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_779 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sym_2_5928 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5353 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5104 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4779 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1628 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1053 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_911 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4296 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3640 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1838 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_294 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7474 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3402 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3032 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4628 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_26 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6105 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5575 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1275 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4941 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_473 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_455 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_418 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6513 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6143 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3449 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3079 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2013 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2770 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5141 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4907 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7106 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5922 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1622 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_679 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_229 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6599 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2099 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5538 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5207 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5188 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1238 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_87 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6212 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5737 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1437 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_974 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1708 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_656 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_619 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_206 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2954 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_259 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7134 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4646 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3873 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5800 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1500 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5893 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5858 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1593 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1558 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4828 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4253 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7794 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4508 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4138 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5693 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1963 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1393 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_850 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4897 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4866 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5127 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3318 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_250 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1763 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_512 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3315 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4041 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_661 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_626 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_211 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3358 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_815 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4438 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4088 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2735 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_81 -^[0-9a-f]+ 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sym_2_5751 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2902 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1451 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6572 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2072 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1781 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_670 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_633 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_220 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5416 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5046 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1116 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_266 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5001 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3708 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5457 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5087 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1985 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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R_MIPS_REL32 [0-9a-f]+ sym_2_7905 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4683 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2546 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6916 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2416 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1744 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8062 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8025 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4574 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2779 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4651 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1801 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5703 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1403 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4316 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2831 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2969 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6218 -^[0-9a-f]+ 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sym_2_4331 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2241 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_810 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_4787 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6743 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6373 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2243 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_396 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5916 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_2800 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1616 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_8073 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5596 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1296 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1956 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3743 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3316 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_552 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 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R_MIPS_REL32 [0-9a-f]+ sym_2_4229 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_600 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7902 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_6229 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5831 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1531 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_289 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7888 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7724 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7670 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_3102 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_7397 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5960 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5605 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_5235 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1660 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_1305 -^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_979 -^[0-9a-f]+ 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[0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ +^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+ diff --git a/ld/testsuite/ld-mips-elf/multi-got-no-shared.d b/ld/testsuite/ld-mips-elf/multi-got-no-shared.d index 927b3040be913..bffc48539fd52 100644 --- a/ld/testsuite/ld-mips-elf/multi-got-no-shared.d +++ b/ld/testsuite/ld-mips-elf/multi-got-no-shared.d @@ -8,11 +8,11 @@ .*: +file format.* Disassembly of section \.text: -004000b0 <[^>]*> 3c1c0046 lui gp,0x46 +004000b0 <[^>]*> 3c1c0043 lui gp,0x43 004000b4 <[^>]*> 279c9ff0 addiu gp,gp,-24592 004000b8 <[^>]*> afbc0008 sw gp,8\(sp\) #... -00408d60 <[^>]*> 3c1c0047 lui gp,0x47 +00408d60 <[^>]*> 3c1c0044 lui gp,0x44 00408d64 <[^>]*> 279cb960 addiu gp,gp,-18080 00408d68 <[^>]*> afbc0008 sw gp,8\(sp\) #pass diff --git a/ld/testsuite/ld-mips-elf/rel32-n32.d b/ld/testsuite/ld-mips-elf/rel32-n32.d index c071c0170c36a..aae33b3575e13 100644 --- a/ld/testsuite/ld-mips-elf/rel32-n32.d +++ b/ld/testsuite/ld-mips-elf/rel32-n32.d @@ -1,15 +1,15 @@ #name: MIPS rel32 n32 #source: rel32.s #as: -KPIC -EB -n32 -#readelf: -x 5 -r +#readelf: -x .text -r #ld: -shared -melf32btsmipn32 Relocation section '.rel.dyn' at offset .* contains 2 entries: Offset Info Type Sym.Value Sym. Name -00000000 00000000 R_MIPS_NONE -000002d0 00000003 R_MIPS_REL32 +[0-9a-f ]+R_MIPS_NONE +[0-9a-f ]+R_MIPS_REL32 Hex dump of section '.text': - 0x000002c0 00000000 00000000 00000000 00000000 ................ - 0x000002d0 000002d0 00000000 00000000 00000000 ................ 0x000002e0 00000000 00000000 00000000 00000000 ................ + 0x000002f0 000002f0 00000000 00000000 00000000 ................ + 0x00000300 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/rel32-o32.d b/ld/testsuite/ld-mips-elf/rel32-o32.d index d98bf211598cd..742cdaadb4ead 100644 --- a/ld/testsuite/ld-mips-elf/rel32-o32.d +++ b/ld/testsuite/ld-mips-elf/rel32-o32.d @@ -1,13 +1,13 @@ #name: MIPS rel32 o32 #source: rel32.s #as: -KPIC -EB -32 -#readelf: -x 6 -r +#readelf: -x .text -r #ld: -shared -melf32btsmip Relocation section '.rel.dyn' at offset .* contains 2 entries: Offset Info Type Sym.Value Sym. Name -00000000 00000000 R_MIPS_NONE -000002f0 00000003 R_MIPS_REL32 +[0-9a-f ]+R_MIPS_NONE +[0-9a-f ]+R_MIPS_REL32 Hex dump of section '.text': 0x000002e0 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/rel64.d b/ld/testsuite/ld-mips-elf/rel64.d index 61fbf879a5a67..4279e2820445c 100644 --- a/ld/testsuite/ld-mips-elf/rel64.d +++ b/ld/testsuite/ld-mips-elf/rel64.d @@ -1,19 +1,19 @@ #name: MIPS rel64 n64 #source: rel64.s #as: -KPIC -EB -64 -#readelf: -x 6 -r +#readelf: -x .text -r #ld: -shared -melf64btsmip Relocation section '.rel.dyn' at offset .* contains 2 entries: Offset Info Type Sym. Value Sym. Name -000000000000 000000000000 R_MIPS_NONE - Type2: R_MIPS_NONE - Type3: R_MIPS_NONE -000000000450 000000001203 R_MIPS_REL32 - Type2: R_MIPS_64 - Type3: R_MIPS_NONE +[0-9a-f ]+R_MIPS_NONE + +Type2: R_MIPS_NONE + +Type3: R_MIPS_NONE +[0-9a-f ]+R_MIPS_REL32 + +Type2: R_MIPS_64 + +Type3: R_MIPS_NONE Hex dump of section '.text': - 0x00000440 00000000 00000000 00000000 00000000 ................ - 0x00000450 00000000 00000450 00000000 00000000 ................ - 0x00000460 00000000 00000000 00000000 00000000 ................ + 0x00000450 00000000 00000000 00000000 00000000 ................ + 0x00000460 00000000 00000460 00000000 00000000 ................ + 0x00000470 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/reloc-1-n64.d b/ld/testsuite/ld-mips-elf/reloc-1-n64.d index 2db8fca671674..42d74ea6be204 100644 --- a/ld/testsuite/ld-mips-elf/reloc-1-n64.d +++ b/ld/testsuite/ld-mips-elf/reloc-1-n64.d @@ -8,16 +8,16 @@ Relocation section '\.rela\.text' .* # # Relocations against tstarta # -.* R_MIPS_HI16 .* \.text \+ ffff7ff0 +.* R_MIPS_HI16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff7ff0 +.* R_MIPS_LO16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* \.text \+ ffff8000 +.* R_MIPS_HI16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8000 +.* R_MIPS_LO16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* \.text \+ 0 @@ -41,16 +41,16 @@ Relocation section '\.rela\.text' .* # # Relocations against t32a # -.* R_MIPS_HI16 .* \.text \+ ffff8010 +.* R_MIPS_HI16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8010 +.* R_MIPS_LO16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* \.text \+ ffff8020 +.* R_MIPS_HI16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8020 +.* R_MIPS_LO16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* \.text \+ 20 @@ -74,16 +74,16 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_HI16 .* _start \+ ffff7ff0 +.* R_MIPS_HI16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff7ff0 +.* R_MIPS_LO16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* _start \+ ffff8000 +.* R_MIPS_HI16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff8000 +.* R_MIPS_LO16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* _start \+ 0 @@ -107,16 +107,16 @@ Relocation section '\.rela\.text' .* # # Relocations against tstarta # -.* R_MIPS_GOT16 .* \.text \+ ffff7ff0 +.* R_MIPS_GOT16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff7ff0 +.* R_MIPS_LO16 .* \.text \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GOT16 .* \.text \+ ffff8000 +.* R_MIPS_GOT16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8000 +.* R_MIPS_LO16 .* \.text \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GOT16 .* \.text \+ 0 @@ -140,16 +140,16 @@ Relocation section '\.rela\.text' .* # # Relocations against t32a # -.* R_MIPS_GOT16 .* \.text \+ ffff8010 +.* R_MIPS_GOT16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8010 +.* R_MIPS_LO16 .* \.text \+ f+8010 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GOT16 .* \.text \+ ffff8020 +.* R_MIPS_GOT16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* \.text \+ ffff8020 +.* R_MIPS_LO16 .* \.text \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GOT16 .* \.text \+ 20 @@ -173,7 +173,7 @@ Relocation section '\.rela\.text' .* # # Relocations against sdg # -.* R_MIPS_GPREL16 .* sdg \+ fffffffc +.* R_MIPS_GPREL16 .* sdg \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GPREL16 .* sdg \+ 0 @@ -186,19 +186,19 @@ Relocation section '\.rela\.text' .* # Relocations against sdla. .sdata should be the first piece of gp-relative # data, which the linker script should put _gp - 0x7ff0. # -.* R_MIPS_GPREL16 .* \.sdata \+ ffff801c +.* R_MIPS_GPREL16 .* \.sdata \+ f+801c .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8020 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8020 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8024 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8024 .* R_MIPS_NONE * .* R_MIPS_NONE * # # Relocations against tstarta # -.* R_MIPS_26 .* \.text \+ fffffffc +.* R_MIPS_26 .* \.text \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* \.text \+ 0 @@ -222,7 +222,7 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_26 .* _start \+ fffffffc +.* R_MIPS_26 .* _start \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* _start \+ 0 @@ -300,16 +300,16 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_HI16 .* _start \+ ffff7ff0 +.* R_MIPS_HI16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff7ff0 +.* R_MIPS_LO16 .* _start \+ f+7ff0 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_HI16 .* _start \+ ffff8000 +.* R_MIPS_HI16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_LO16 .* _start \+ ffff8000 +.* R_MIPS_LO16 .* _start \+ f+8000 .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_HI16 .* _start \+ 0 @@ -399,7 +399,7 @@ Relocation section '\.rela\.text' .* # # Relocations against sdg # -.* R_MIPS_GPREL16 .* sdg \+ fffffffc +.* R_MIPS_GPREL16 .* sdg \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_GPREL16 .* sdg \+ 0 @@ -411,13 +411,13 @@ Relocation section '\.rela\.text' .* # # Relocations against sdlb # -.* R_MIPS_GPREL16 .* \.sdata \+ ffff803c +.* R_MIPS_GPREL16 .* \.sdata \+ f+803c .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8040 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8040 .* R_MIPS_NONE * .* R_MIPS_NONE * -.* R_MIPS_GPREL16 .* \.sdata \+ ffff8044 +.* R_MIPS_GPREL16 .* \.sdata \+ f+8044 .* R_MIPS_NONE * .* R_MIPS_NONE * # @@ -447,7 +447,7 @@ Relocation section '\.rela\.text' .* # # Relocations against _start # -.* R_MIPS_26 .* _start \+ fffffffc +.* R_MIPS_26 .* _start \+ f+fffc .* R_MIPS_NONE * .* R_MIPS_NONE * .* R_MIPS_26 .* _start \+ 0 diff --git a/ld/testsuite/ld-mips-elf/reloc-3-n32.d b/ld/testsuite/ld-mips-elf/reloc-3-n32.d new file mode 100644 index 0000000000000..e90180bbd5cdf --- /dev/null +++ b/ld/testsuite/ld-mips-elf/reloc-3-n32.d @@ -0,0 +1,18 @@ +#name: R_MIPS16_GPREL reloc n32 +#source: ../../../gas/testsuite/gas/mips/elf-rel6.s +#as: -march=mips64 -mabi=n32 -EB +#objdump: --prefix-addresses -tdr --show-raw-insn +#ld: -Ttext 0x20000000 -e 0x20000000 -N -melf32btsmipn32 + + +.*: file format elf.*mips.* + +#... + +Disassembly of section \.text: +0*20000000 <[^>]*> f010 8352 lb v0,-32750\(v1\) +0*20000004 <[^>]*> f010 8353 lb v0,-32749\(v1\) +0*20000008 <[^>]*> f252 8346 lb v0,-28090\(v1\) +0*2000000c <[^>]*> 6500 nop +0*2000000e <[^>]*> 6500 nop +#pass diff --git a/ld/testsuite/ld-mips-elf/reloc-3.d b/ld/testsuite/ld-mips-elf/reloc-3.d new file mode 100644 index 0000000000000..1ec51c5f8f321 --- /dev/null +++ b/ld/testsuite/ld-mips-elf/reloc-3.d @@ -0,0 +1,16 @@ +#name: R_MIPS16_GPREL reloc +#source: ../../../gas/testsuite/gas/mips/elf-rel6.s +#objdump: --prefix-addresses -tdr --show-raw-insn +#ld: -Ttext 0x20000000 -e 0x20000000 -N + +.*: file format elf.*mips.* + +#... + +Disassembly of section \.text: +0*20000000 <[^>]*> f010 8352 lb v0,-32750\(v1\) +0*20000004 <[^>]*> f010 8353 lb v0,-32749\(v1\) +0*20000008 <[^>]*> f252 8346 lb v0,-28090\(v1\) +0*2000000c <[^>]*> 6500 nop +0*2000000e <[^>]*> 6500 nop +#pass diff --git a/ld/testsuite/ld-mips-elf/textrel-1.d b/ld/testsuite/ld-mips-elf/textrel-1.d index 7172bb7ea40f8..16bd727f28146 100644 --- a/ld/testsuite/ld-mips-elf/textrel-1.d +++ b/ld/testsuite/ld-mips-elf/textrel-1.d @@ -4,14 +4,13 @@ #ld: -shared -melf32btsmipn32 #readelf: -d -Dynamic section at offset 0xb4 contains 18 entries: +Dynamic section at offset .* contains 17 entries: Tag Type Name/Value 0x00000004 \(HASH\) 0x[0-9a-f]* 0x00000005 \(STRTAB\) 0x[0-9a-f]* 0x00000006 \(SYMTAB\) 0x[0-9a-f]* 0x0000000a \(STRSZ\) [0-9]* \(bytes\) 0x0000000b \(SYMENT\) 16 \(bytes\) - 0x00000015 \(DEBUG\) 0x0 0x00000003 \(PLTGOT\) 0x[0-9a-f]* 0x00000011 \(REL\) 0x[0-9a-f]* 0x00000012 \(RELSZ\) 8 \(bytes\) diff --git a/ld/testsuite/ld-mips-elf/tls-hidden3.r b/ld/testsuite/ld-mips-elf/tls-hidden3.r index 500e7b170728d..c0a23a5a5f304 100644 --- a/ld/testsuite/ld-mips-elf/tls-hidden3.r +++ b/ld/testsuite/ld-mips-elf/tls-hidden3.r @@ -7,7 +7,7 @@ Relocation section '\.rel\.dyn' at offset .* contains 6 entries: # is that there is exactly one entry per GOT TLS slot. # 00090020 0000002f R_MIPS_TLS_TPREL3 -0009002c 0000002f R_MIPS_TLS_TPREL3 00090024 0000002f R_MIPS_TLS_TPREL3 00090028 0000002f R_MIPS_TLS_TPREL3 +0009002c 0000002f R_MIPS_TLS_TPREL3 00090030 .*03 R_MIPS_REL32 00000000 undef diff --git a/ld/testsuite/ld-mips-elf/tls-hidden4.r b/ld/testsuite/ld-mips-elf/tls-hidden4.r index f6809b5280c0c..f4d36b09fa3c9 100644 --- a/ld/testsuite/ld-mips-elf/tls-hidden4.r +++ b/ld/testsuite/ld-mips-elf/tls-hidden4.r @@ -7,13 +7,13 @@ Relocation section '\.rel\.dyn' at offset .* contains .* entries: # important thing is that there is exactly one entry per GOT TLS slot # and that the addresses match those in the .got dump. # -001d00d4 0000002f R_MIPS_TLS_TPREL3 -001d00d8 0000002f R_MIPS_TLS_TPREL3 -001d00d0 0000002f R_MIPS_TLS_TPREL3 -001d00cc 0000002f R_MIPS_TLS_TPREL3 -001c4088 0000002f R_MIPS_TLS_TPREL3 -001c408c 0000002f R_MIPS_TLS_TPREL3 001c4080 0000002f R_MIPS_TLS_TPREL3 001c4084 0000002f R_MIPS_TLS_TPREL3 +001c4088 0000002f R_MIPS_TLS_TPREL3 +001c408c 0000002f R_MIPS_TLS_TPREL3 +001d00cc 0000002f R_MIPS_TLS_TPREL3 +001d00d0 0000002f R_MIPS_TLS_TPREL3 +001d00d4 0000002f R_MIPS_TLS_TPREL3 +001d00d8 0000002f R_MIPS_TLS_TPREL3 .* R_MIPS_REL32 .* #pass diff --git a/ld/testsuite/ld-mips-elf/tls-multi-got-1.got b/ld/testsuite/ld-mips-elf/tls-multi-got-1.got index fb8cc66597642..649baae8d4d45 100644 --- a/ld/testsuite/ld-mips-elf/tls-multi-got-1.got +++ b/ld/testsuite/ld-mips-elf/tls-multi-got-1.got @@ -4,55 +4,33 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -001495d0 R_MIPS_TLS_DTPMOD32 \*ABS\* 0013f948 R_MIPS_TLS_DTPMOD32 \*ABS\* -001495dc R_MIPS_TLS_DTPMOD32 tlsvar_gd -001495e0 R_MIPS_TLS_DTPREL32 tlsvar_gd +001495d0 R_MIPS_TLS_DTPMOD32 \*ABS\* 0013f954 R_MIPS_TLS_DTPMOD32 tlsvar_gd 0013f958 R_MIPS_TLS_DTPREL32 tlsvar_gd -001495d8 R_MIPS_TLS_TPREL32 tlsvar_ie +001495dc R_MIPS_TLS_DTPMOD32 tlsvar_gd +001495e0 R_MIPS_TLS_DTPREL32 tlsvar_gd 0013f950 R_MIPS_TLS_TPREL32 tlsvar_ie -00135fcc R_MIPS_REL32 sym_2_8355 +001495d8 R_MIPS_TLS_TPREL32 tlsvar_ie +00143f7c R_MIPS_REL32 sym_1_9526 #... -00142cec R_MIPS_REL32 sym_1_0945 -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* -00000000 R_MIPS_NONE \*ABS\* +00139bd0 R_MIPS_REL32 sym_2_8654 Contents of section .got: - 122420 00000000 80000000 00000000 00000000 ................ - 122430 00000000 00000000 00000000 00000000 ................ - 122440 00000000 00000000 00000000 00000000 ................ - 122450 00000000 000e0a4c 000d3594 000d3584 ..........5...5. + 122420 00000000 80000000 00000000 00000000 .* + 122430 00000000 00000000 00000000 00000000 .* + 122440 00000000 00000000 00000000 00000000 .* + 122450 00000000 000d8048 000d66a4 000d2054 .* #... - 13f930 00000000 00000000 00000000 00000000 ................ - 13f940 00000000 00000000 00000000 00000000 ................ - 13f950 00000000 00000000 00000000 00000000 ................ - 13f960 80000000 00000000 00000000 00000000 ................ + 13f930 00000000 00000000 00000000 00000000 .* + 13f940 00000000 00000000 00000000 00000000 .* + 13f950 00000000 00000000 00000000 00000000 .* + 13f960 80000000 00000000 00000000 00000000 .* #... - 1495a0 00000000 00000000 00000000 00000000 ................ - 1495b0 00000000 00000000 00000000 00000000 ................ - 1495c0 00000000 00000000 00000000 00000000 ................ - 1495d0 00000000 00000000 00000000 00000000 ................ - 1495e0 00000000 .... + 1495a0 00000000 00000000 00000000 00000000 .* + 1495b0 00000000 00000000 00000000 00000000 .* + 1495c0 00000000 00000000 00000000 00000000 .* + 1495d0 00000000 00000000 00000000 00000000 .* + 1495e0 00000000 .* #pass diff --git a/ld/testsuite/ld-mips-elf/tls-multi-got-1.r b/ld/testsuite/ld-mips-elf/tls-multi-got-1.r index 6b6be78bee764..db441147eccf4 100644 --- a/ld/testsuite/ld-mips-elf/tls-multi-got-1.r +++ b/ld/testsuite/ld-mips-elf/tls-multi-got-1.r @@ -1,61 +1,38 @@ -Dynamic section at offset 0xec contains 19 entries: +Dynamic section at offset .* contains 18 entries: Tag Type Name/Value - 0x00000004 \(HASH\) 0x1ac - 0x00000005 \(STRTAB\) 0x71db8 - 0x00000006 \(SYMTAB\) 0x23ad8 + 0x00000004 \(HASH\) 0x1c4 + 0x00000005 \(STRTAB\).* + 0x00000006 \(SYMTAB\).* 0x0000000a \(STRSZ\) 220091 \(bytes\) 0x0000000b \(SYMENT\) 16 \(bytes\) - 0x00000015 \(DEBUG\) 0x0 0x00000003 \(PLTGOT\) 0x122420 - 0x00000011 \(REL\) 0xa7974 + 0x00000011 \(REL\) 0xa7978 0x00000012 \(RELSZ\) 160072 \(bytes\) 0x00000013 \(RELENT\) 8 \(bytes\) 0x70000001 \(MIPS_RLD_VERSION\) 1 0x70000005 \(MIPS_FLAGS\) NOTPOT 0x70000006 \(MIPS_BASE_ADDRESS\) 0 0x7000000a \(MIPS_LOCAL_GOTNO\) 13 - 0x70000011 \(MIPS_SYMTABNO\) 20014 + 0x70000011 \(MIPS_SYMTABNO\) 20013 0x70000012 \(MIPS_UNREFEXTNO\) 11 - 0x70000013 \(MIPS_GOTSYM\) 0xe + 0x70000013 \(MIPS_GOTSYM\) 0xd 0x0000001e \(FLAGS\) STATIC_TLS 0x00000000 \(NULL\) 0x0 -Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 20031 entries: +Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains 20009 entries: Offset Info Type Sym.Value Sym. Name -00000000 00000000 R_MIPS_NONE -001495d0 00000026 R_MIPS_TLS_DTPMOD -0013f948 00000026 R_MIPS_TLS_DTPMOD -001495dc 00000626 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd -001495e0 00000627 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd -0013f954 00000626 R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd -0013f958 00000627 R_MIPS_TLS_DTPREL 00000000 tlsvar_gd -001495d8 00000c2f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie -0013f950 00000c2f R_MIPS_TLS_TPREL3 00000004 tlsvar_ie -00135fcc 00000e03 R_MIPS_REL32 000e0a4c sym_2_8355 -001424ac 00000f03 R_MIPS_REL32 000d3594 sym_1_4745 +[0-9a-f ]+R_MIPS_NONE +[0-9a-f ]+R_MIPS_TLS_DTPMOD +[0-9a-f ]+R_MIPS_TLS_DTPMOD +[0-9a-f ]+R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd +[0-9a-f ]+R_MIPS_TLS_DTPREL 00000000 tlsvar_gd +[0-9a-f ]+R_MIPS_TLS_DTPMOD 00000000 tlsvar_gd +[0-9a-f ]+R_MIPS_TLS_DTPREL 00000000 tlsvar_gd +[0-9a-f ]+R_MIPS_TLS_TPREL3 00000004 tlsvar_ie +[0-9a-f ]+R_MIPS_TLS_TPREL3 00000004 tlsvar_ie +[0-9a-f ]+R_MIPS_REL32 000d8048 sym_1_9526 +[0-9a-f ]+R_MIPS_REL32 000d66a4 sym_1_7885 #... -001369b0 004e2c03 R_MIPS_REL32 000da930 sym_2_2140 -00142cec 004e2d03 R_MIPS_REL32 000cfa34 sym_1_0945 -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE -00000000 00000000 R_MIPS_NONE +[0-9a-f ]+R_MIPS_REL32 000cf2b4 sym_1_0465 +[0-9a-f ]+R_MIPS_REL32 000e0ef8 sym_2_8654 diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d index 80da24763f4a7..3637049c5e329 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d @@ -5,7 +5,7 @@ Disassembly of section .text: .* <__start>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7b70 addiu gp,gp,31600 + .*: 279c7b80 addiu gp,gp,31616 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) @@ -55,7 +55,7 @@ Disassembly of section .text: .* <other>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7ab0 addiu gp,gp,31408 + .*: 279c7ac0 addiu gp,gp,31424 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got index 8f5084fb51e4f..9b2e722a4d72f 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got @@ -4,16 +4,16 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -10000044 R_MIPS_TLS_DTPMOD32 tlsbin_gd -10000048 R_MIPS_TLS_DTPREL32 tlsbin_gd -10000038 R_MIPS_TLS_DTPMOD32 tlsvar_gd -1000003c R_MIPS_TLS_DTPREL32 tlsvar_gd -10000040 R_MIPS_TLS_TPREL32 tlsvar_ie -1000004c R_MIPS_TLS_TPREL32 tlsbin_ie +10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd +10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd +10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd +1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd +10000050 R_MIPS_TLS_TPREL32 tlsvar_ie +1000005c R_MIPS_TLS_TPREL32 tlsbin_ie Contents of section .got: - 10000010 00000000 80000000 00000000 00000000 ................ - 10000020 00000000 00000000 00000000 0040053c .............@.. - 10000030 00000001 00000000 00000000 00000000 ................ - 10000040 00000000 00000000 00000000 00000000 ................ + 10000020 00000000 80000000 00000000 00000000 ................ + 10000030 00000000 00000000 00000000 0040053c .............@.. + 10000040 00000001 00000000 00000000 00000000 ................ + 10000050 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d index 00965208dc0cc..0c466b695ba3b 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d @@ -5,7 +5,7 @@ Disassembly of section .text: .* <__start>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7b70 addiu gp,gp,31600 + .*: 279c7b80 addiu gp,gp,31616 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) @@ -55,7 +55,7 @@ Disassembly of section .text: .* <other>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7ab0 addiu gp,gp,31408 + .*: 279c7ac0 addiu gp,gp,31424 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got index 9f8b3ba1cf2d7..ba617bbe36789 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got @@ -4,17 +4,17 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd -1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd -1000003c R_MIPS_TLS_DTPMOD32 tlsvar_gd -10000040 R_MIPS_TLS_DTPREL32 tlsvar_gd -10000044 R_MIPS_TLS_TPREL32 tlsvar_ie -10000050 R_MIPS_TLS_TPREL32 tlsbin_ie +10000058 R_MIPS_TLS_DTPMOD32 tlsbin_gd +1000005c R_MIPS_TLS_DTPREL32 tlsbin_gd +1000004c R_MIPS_TLS_DTPMOD32 tlsvar_gd +10000050 R_MIPS_TLS_DTPREL32 tlsvar_gd +10000054 R_MIPS_TLS_TPREL32 tlsvar_ie +10000060 R_MIPS_TLS_TPREL32 tlsbin_ie Contents of section .got: - 10000010 00000000 80000000 00000000 00000000 ................ - 10000020 00000000 00000000 00000000 00000000 ................ - 10000030 0040053c 00000001 00000000 00000000 .@.<............ - 10000040 00000000 00000000 00000000 00000000 ................ - 10000050 00000000 00000000 00000000 00000000 ................ + 10000020 00000000 80000000 00000000 00000000 .* + 10000030 00000000 00000000 00000000 00000000 .* + 10000040 0040053c 00000001 00000000 00000000 .* + 10000050 00000000 00000000 00000000 00000000 .* + 10000060 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d index ae671e8d27764..31f1666f5da81 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d @@ -5,7 +5,7 @@ Disassembly of section .text: .* <other>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7b70 addiu gp,gp,31600 + .*: 279c7b80 addiu gp,gp,31616 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) @@ -51,7 +51,7 @@ Disassembly of section .text: .* <__start>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7ac0 addiu gp,gp,31424 + .*: 279c7ad0 addiu gp,gp,31440 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got index 7342952361652..addfc0fb1e0f5 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got @@ -4,17 +4,17 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd -1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd -1000003c R_MIPS_TLS_DTPMOD32 tlsvar_gd -10000040 R_MIPS_TLS_DTPREL32 tlsvar_gd -10000044 R_MIPS_TLS_TPREL32 tlsvar_ie -10000050 R_MIPS_TLS_TPREL32 tlsbin_ie +10000058 R_MIPS_TLS_DTPMOD32 tlsbin_gd +1000005c R_MIPS_TLS_DTPREL32 tlsbin_gd +1000004c R_MIPS_TLS_DTPMOD32 tlsvar_gd +10000050 R_MIPS_TLS_DTPREL32 tlsvar_gd +10000054 R_MIPS_TLS_TPREL32 tlsvar_ie +10000060 R_MIPS_TLS_TPREL32 tlsbin_ie Contents of section .got: - 10000010 00000000 80000000 00000000 00000000 ................ - 10000020 00000000 00000000 00000000 00000000 ................ - 10000030 004005ec 00000001 00000000 00000000 .@.............. - 10000040 00000000 00000000 00000000 00000000 ................ + 10000020 00000000 80000000 00000000 00000000 ................ + 10000030 00000000 00000000 00000000 00000000 ................ + 10000040 004005ec 00000001 00000000 00000000 .@.............. 10000050 00000000 00000000 00000000 00000000 ................ + 10000060 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32.d index 5fb13a09d5c44..31e9e02af75d4 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32.d +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32.d @@ -5,7 +5,7 @@ Disassembly of section .text: .* <__start>: .*: 3c1c0fc0 lui gp,0xfc0 - .*: 279c7bb0 addiu gp,gp,31664 + .*: 279c7ba0 addiu gp,gp,31648 .*: 0399e021 addu gp,gp,t9 .*: 27bdfff0 addiu sp,sp,-16 .*: afbe0008 sw s8,8\(sp\) diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32.got index 206fd241985d5..100633267a477 100644 --- a/ld/testsuite/ld-mips-elf/tlsdyn-o32.got +++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32.got @@ -4,16 +4,16 @@ tmpdir/tls-dynamic-o32: file format elf32-tradbigmips DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -10000038 R_MIPS_TLS_DTPMOD32 tlsbin_gd -1000003c R_MIPS_TLS_DTPREL32 tlsbin_gd -10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd -1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd -10000044 R_MIPS_TLS_TPREL32 tlsbin_ie -10000040 R_MIPS_TLS_TPREL32 tlsvar_ie +10000048 R_MIPS_TLS_DTPMOD32 tlsbin_gd +1000004c R_MIPS_TLS_DTPREL32 tlsbin_gd +10000058 R_MIPS_TLS_DTPMOD32 tlsvar_gd +1000005c R_MIPS_TLS_DTPREL32 tlsvar_gd +10000054 R_MIPS_TLS_TPREL32 tlsbin_ie +10000050 R_MIPS_TLS_TPREL32 tlsvar_ie Contents of section .got: - 10000010 00000000 80000000 00000000 00000000 ................ - 10000020 00000000 00000000 00000000 004004fc ................ - 10000030 00000001 00000000 00000000 00000000 ................ - 10000040 00000000 00000000 00000000 00000000 ................ + 10000020 00000000 80000000 00000000 00000000 ................ + 10000030 00000000 00000000 00000000 0040051c ................ + 10000040 00000001 00000000 00000000 00000000 ................ + 10000050 00000000 00000000 00000000 00000000 ................ diff --git a/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got b/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got index a897ec462eddc..1507f2c1a887e 100644 --- a/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got +++ b/ld/testsuite/ld-mips-elf/tlslib-o32-hidden.got @@ -4,13 +4,13 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -000403fc R_MIPS_TLS_DTPMOD32 \*ABS\* -000403f4 R_MIPS_TLS_DTPMOD32 \*ABS\* -000403f0 R_MIPS_TLS_TPREL32 \*ABS\* +000403d0 R_MIPS_TLS_TPREL32 \*ABS\* +000403d4 R_MIPS_TLS_DTPMOD32 \*ABS\* +000403dc R_MIPS_TLS_DTPMOD32 \*ABS\* Contents of section .got: - 403d0 00000000 80000000 00000000 00000000 ................ - 403e0 00000000 00000000 00000000 000003a0 ................ - 403f0 00000008 00000000 00000000 00000000 ................ - 40400 ffff8004 .... + 403b0 00000000 80000000 00000000 00000000 ................ + 403c0 00000000 00000000 00000000 00000380 ................ + 403d0 00000008 00000000 00000000 00000000 ................ + 403e0 ffff8004 .... diff --git a/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got b/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got index 94de65320daa5..c0bf509f44694 100644 --- a/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got +++ b/ld/testsuite/ld-mips-elf/tlslib-o32-ver.got @@ -4,14 +4,14 @@ DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -00040574 R_MIPS_TLS_DTPMOD32 \*ABS\* -0004057c R_MIPS_TLS_DTPMOD32 tlsvar_gd -00040580 R_MIPS_TLS_DTPREL32 tlsvar_gd -00040570 R_MIPS_TLS_TPREL32 tlsvar_ie +00040534 R_MIPS_TLS_DTPMOD32 \*ABS\* +0004053c R_MIPS_TLS_DTPMOD32 tlsvar_gd +00040540 R_MIPS_TLS_DTPREL32 tlsvar_gd +00040530 R_MIPS_TLS_TPREL32 tlsvar_ie Contents of section .got: - 40550 00000000 80000000 00000000 00000000 ................ - 40560 00000000 00000000 00000000 00000520 ................ - 40570 00000000 00000000 00000000 00000000 ................ - 40580 00000000 .... + 40510 00000000 80000000 00000000 00000000 ................ + 40520 00000000 00000000 00000000 000004e0 ................ + 40530 00000000 00000000 00000000 00000000 ................ + 40540 00000000 .... diff --git a/ld/testsuite/ld-mips-elf/tlslib-o32.got b/ld/testsuite/ld-mips-elf/tlslib-o32.got index 1831eb26e3408..7307081e3ccee 100644 --- a/ld/testsuite/ld-mips-elf/tlslib-o32.got +++ b/ld/testsuite/ld-mips-elf/tlslib-o32.got @@ -4,14 +4,14 @@ tmpdir/tlslib-o32.so: file format elf32-tradbigmips DYNAMIC RELOCATION RECORDS OFFSET TYPE VALUE 00000000 R_MIPS_NONE \*ABS\* -000404d4 R_MIPS_TLS_DTPMOD32 \*ABS\* -000404dc R_MIPS_TLS_DTPMOD32 tlsvar_gd -000404e0 R_MIPS_TLS_DTPREL32 tlsvar_gd -000404d0 R_MIPS_TLS_TPREL32 tlsvar_ie +00040494 R_MIPS_TLS_DTPMOD32 \*ABS\* +0004049c R_MIPS_TLS_DTPMOD32 tlsvar_gd +000404a0 R_MIPS_TLS_DTPREL32 tlsvar_gd +00040490 R_MIPS_TLS_TPREL32 tlsvar_ie Contents of section .got: - 404b0 00000000 80000000 00000000 00000000 ................ - 404c0 00000000 00000000 00000000 00000480 ................ - 404d0 00000000 00000000 00000000 00000000 ................ - 404e0 00000000 .... + 40470 00000000 80000000 00000000 00000000 ................ + 40480 00000000 00000000 00000000 00000440 ................ + 40490 00000000 00000000 00000000 00000000 ................ + 404a0 00000000 .... diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd index 9a8b35e780287..56bc9a8f04a8d 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd +++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd @@ -4,12 +4,12 @@ Relocation section '\.rela\.dyn' at offset .* contains .* entries: 00080c0c .*05 R_MIPS_HI16 00000000 __GOTT_BASE__ \+ 0 00080c10 .*06 R_MIPS_LO16 00000000 __GOTT_BASE__ \+ 0 00080c14 .*01 R_MIPS_16 00000000 __GOTT_INDEX__ \+ 0 -0008141c .*02 R_MIPS_32 00080c00 \.text \+ 5c -00081c00 00000002 R_MIPS_32 00080c5c -00081c04 00000002 R_MIPS_32 00081c00 -00081c08 .*02 R_MIPS_32 00081c08 dglobal \+ 0 -00081c0c .*02 R_MIPS_32 00000000 dexternal \+ 0 -00081424 .*02 R_MIPS_32 00081800 x \+ 0 +0008141c 00000002 R_MIPS_32 00080c5c +00081800 00000002 R_MIPS_32 00080c5c +00081804 00000002 R_MIPS_32 00081800 +00081808 .*02 R_MIPS_32 00081808 dglobal \+ 0 +0008180c .*02 R_MIPS_32 00000000 dexternal \+ 0 +00081424 .*02 R_MIPS_32 00081c00 x \+ 0 00000000 00000000 R_MIPS_NONE 00000000 #... Relocation section '\.rela\.plt' at offset .* contains 2 entries: diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.td b/ld/testsuite/ld-mips-elf/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-mips-elf/vxworks1.ld b/ld/testsuite/ld-mips-elf/vxworks1.ld index 74e2c2612a95d..8fe3c48e080c9 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1.ld +++ b/ld/testsuite/ld-mips-elf/vxworks1.ld @@ -23,10 +23,10 @@ SECTIONS .got : { *(.got.plt) *(.got) } . = ALIGN (0x400); - .bss : { *(.bss) *(.dynbss) } + .data : { *(.data) } . = ALIGN (0x400); - .data : { *(.data) } + .bss : { *(.bss) *(.dynbss) } /DISCARD/ : { *(.reginfo) } } diff --git a/ld/testsuite/ld-mips-elf/vxworks1.rd b/ld/testsuite/ld-mips-elf/vxworks1.rd index f4793a22e0d5e..f4455f58b93c9 100644 --- a/ld/testsuite/ld-mips-elf/vxworks1.rd +++ b/ld/testsuite/ld-mips-elf/vxworks1.rd @@ -1,7 +1,7 @@ Relocation section '\.rela\.dyn' at offset .* contains 1 entries: Offset Info Type Sym.Value Sym. Name \+ Addend -00081800 .*7e R_MIPS_COPY 00081800 dglobal \+ 0 +00081c00 .*7e R_MIPS_COPY 00081c00 dglobal \+ 0 Relocation section '\.rela\.plt' at offset .* contains 2 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend @@ -16,9 +16,9 @@ Relocation section '\.rela\.text' at offset .* contains 3 entries: Relocation section '\.rela\.data' at offset .* contains 3 entries: Offset Info Type Sym.Value Sym. Name \+ Addend -00081c00 .*02 R_MIPS_32 00081c00 .data \+ 0 -00081c04 .*02 R_MIPS_32 00081800 .bss \+ 0 -00081c08 .*02 R_MIPS_32 00081c04 dexternal \+ 0 +00081800 .*02 R_MIPS_32 00081800 .data \+ 0 +00081804 .*02 R_MIPS_32 00081c00 .bss \+ 0 +00081808 .*02 R_MIPS_32 00081804 dexternal \+ 0 Relocation section '\.rela\.plt\.unloaded' at offset .* contains 8 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend diff --git a/ld/testsuite/ld-mmix/bpo-1.d b/ld/testsuite/ld-mmix/bpo-1.d index 5b07e5f4253d5..97bc33d96913c 100644 --- a/ld/testsuite/ld-mmix/bpo-1.d +++ b/ld/testsuite/ld-mmix/bpo-1.d @@ -11,9 +11,6 @@ SYMBOL TABLE: 0000000000000000 l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 l \.text 0+ x 0+ g \.text 0+ _start #... diff --git a/ld/testsuite/ld-mmix/bpo-10.d b/ld/testsuite/ld-mmix/bpo-10.d index dfd9858176c0c..713d7ad2949fd 100644 --- a/ld/testsuite/ld-mmix/bpo-10.d +++ b/ld/testsuite/ld-mmix/bpo-10.d @@ -12,14 +12,11 @@ SYMBOL TABLE: 0+ l d \.init 0+ (|\.init) 0+7f8 l +d \.MMIX.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ l \.init 0+ _start 2000000000000000 g \*ABS\* 0+ __bss_start 2000000000000000 g \*ABS\* 0+ _edata 2000000000000000 g \*ABS\* 0+ _end -0+4 g \*ABS\* 0+ _start\. +0+4 g \.init 0+ _start\. Contents of section \.init: 0000 e37704a6 .* diff --git a/ld/testsuite/ld-mmix/bpo-11.d b/ld/testsuite/ld-mmix/bpo-11.d index 1adeb1d74c583..5925cff51ee7c 100644 --- a/ld/testsuite/ld-mmix/bpo-11.d +++ b/ld/testsuite/ld-mmix/bpo-11.d @@ -14,9 +14,6 @@ SYMBOL TABLE: 0+ l d \.init 0+ (|\.init) 0+10 l d \.text 0+ (|\.text) 0+7e8 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ l \.init 0+ _start 0+14 g \.text 0+ x 0+10 g \.text 0+ x2 diff --git a/ld/testsuite/ld-mmix/bpo-14.d b/ld/testsuite/ld-mmix/bpo-14.d index e57412c31a454..e19e4a8528d9b 100644 --- a/ld/testsuite/ld-mmix/bpo-14.d +++ b/ld/testsuite/ld-mmix/bpo-14.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ g \.text 0+ _start 0+8 g \.text 0+ areg #... diff --git a/ld/testsuite/ld-mmix/bpo-16.d b/ld/testsuite/ld-mmix/bpo-16.d index a4022e1679b14..d7e372c75f2c9 100644 --- a/ld/testsuite/ld-mmix/bpo-16.d +++ b/ld/testsuite/ld-mmix/bpo-16.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ g \.text 0+ _start 0+c g \.text 0+ areg #... diff --git a/ld/testsuite/ld-mmix/bpo-17.d b/ld/testsuite/ld-mmix/bpo-17.d index 6c8fe34fc94b7..f70b852339d86 100644 --- a/ld/testsuite/ld-mmix/bpo-17.d +++ b/ld/testsuite/ld-mmix/bpo-17.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ g \.text 0+ _start 0+10 g \.text 0+ areg #... diff --git a/ld/testsuite/ld-mmix/bpo-18.d b/ld/testsuite/ld-mmix/bpo-18.d index 96fda3b621bb2..3d1d2f11a9410 100644 --- a/ld/testsuite/ld-mmix/bpo-18.d +++ b/ld/testsuite/ld-mmix/bpo-18.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+100 l d \.text 0+ (|\.text) 4000000000001060 l d \.text\.away 0+ (|\.text\.away) 0+7e0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 4000000000001064 l \.text\.away 0+ x 0+100 g \.text 0+ x 4000000000001060 g \.text\.away 0+ Main diff --git a/ld/testsuite/ld-mmix/bpo-19.d b/ld/testsuite/ld-mmix/bpo-19.d index 870dba2369f56..d8ee554012bd9 100644 --- a/ld/testsuite/ld-mmix/bpo-19.d +++ b/ld/testsuite/ld-mmix/bpo-19.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+100 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) #... 0+ g \.text 0+ _start #... diff --git a/ld/testsuite/ld-mmix/bpo-2.d b/ld/testsuite/ld-mmix/bpo-2.d index 4781175e852bb..7206cab26754e 100644 --- a/ld/testsuite/ld-mmix/bpo-2.d +++ b/ld/testsuite/ld-mmix/bpo-2.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7e8 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 l \.text 0+ x 0+ g \.text 0+ _start 0+fe g \*REG\* 0+ areg diff --git a/ld/testsuite/ld-mmix/bpo-22.d b/ld/testsuite/ld-mmix/bpo-22.d index 15aea8535899b..c6a13145583cb 100644 --- a/ld/testsuite/ld-mmix/bpo-22.d +++ b/ld/testsuite/ld-mmix/bpo-22.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0000000000000000 l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 l \.text 0+ x 0+ g \.text 0+ Main 0+ g \.text 0+ _start diff --git a/ld/testsuite/ld-mmix/bpo-3.d b/ld/testsuite/ld-mmix/bpo-3.d index 00fb7a9b23a32..e1435ef35ebb4 100644 --- a/ld/testsuite/ld-mmix/bpo-3.d +++ b/ld/testsuite/ld-mmix/bpo-3.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 l \.text 0+ x 0+ g \.text 0+ _start #... diff --git a/ld/testsuite/ld-mmix/bpo-4.d b/ld/testsuite/ld-mmix/bpo-4.d index 1e7c9036aa33a..372e7e6acbef5 100644 --- a/ld/testsuite/ld-mmix/bpo-4.d +++ b/ld/testsuite/ld-mmix/bpo-4.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7e0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+8 l \.text 0+ x 0+ g \.text 0+ _start 0+fe g \*REG\* 0+ areg diff --git a/ld/testsuite/ld-mmix/bpo-5.d b/ld/testsuite/ld-mmix/bpo-5.d index 046002815616f..a1a192d616972 100644 --- a/ld/testsuite/ld-mmix/bpo-5.d +++ b/ld/testsuite/ld-mmix/bpo-5.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7e8 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 l \.text 0+ x 0+ g \.text 0+ _start #... diff --git a/ld/testsuite/ld-mmix/bpo-6.d b/ld/testsuite/ld-mmix/bpo-6.d index 39c3a912a41f8..a5978c9350246 100644 --- a/ld/testsuite/ld-mmix/bpo-6.d +++ b/ld/testsuite/ld-mmix/bpo-6.d @@ -11,9 +11,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+100 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) #... 0+ g \.text 0+ _start #... diff --git a/ld/testsuite/ld-mmix/bpo-9.d b/ld/testsuite/ld-mmix/bpo-9.d index f230b195aea52..16d0017696466 100644 --- a/ld/testsuite/ld-mmix/bpo-9.d +++ b/ld/testsuite/ld-mmix/bpo-9.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.init 0+ (|\.init) 0+10 l d \.text 0+ (|\.text) 0+7e8 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ l \.init 0+ _start 0+14 g \.text 0+ x 0+10 g \.text 0+ x2 diff --git a/ld/testsuite/ld-mmix/bspec1.d b/ld/testsuite/ld-mmix/bspec1.d index ce83480f286b8..79d53d42f098d 100644 --- a/ld/testsuite/ld-mmix/bspec1.d +++ b/ld/testsuite/ld-mmix/bspec1.d @@ -17,8 +17,8 @@ Section Headers: \[ 3\] \.shstrtab STRTAB 0+ 0+80 0+33 0+ 0 0 1 \[ 4\] \.symtab SYMTAB 0+ 0+238 - 0+120 0+18 5 6 8 - \[ 5\] \.strtab STRTAB 0+ 0+358 + 0+d8 0+18 5 3 8 + \[ 5\] \.strtab STRTAB 0+ 0+310 0+2d 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) @@ -27,16 +27,13 @@ Key to Flags: There are no relocations in this file\. -Symbol table '\.symtab' contains 12 entries: +Symbol table '\.symtab' contains 9 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+ 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+ 0 FUNC GLOBAL DEFAULT 1 Main - 7: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start + 3: 0+ 0 FUNC GLOBAL DEFAULT 1 Main + 4: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/bspec2.d b/ld/testsuite/ld-mmix/bspec2.d index b5e683b911083..98296e729e7cf 100644 --- a/ld/testsuite/ld-mmix/bspec2.d +++ b/ld/testsuite/ld-mmix/bspec2.d @@ -22,8 +22,8 @@ Section Headers: \[ 4\] \.shstrtab STRTAB 0+ 0+88 0+45 0+ 0 0 1 \[ 5\] \.symtab SYMTAB 0+ 0+290 - 0+150 0+18 6 7 8 - \[ 6\] \.strtab STRTAB 0+ 0+3e0 + 0+108 0+18 6 4 8 + \[ 6\] \.strtab STRTAB 0+ 0+398 0+32 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) @@ -32,18 +32,15 @@ Key to Flags: There are no relocations in this file\. -Symbol table '\.symtab' contains 14 entries: +Symbol table '\.symtab' contains 11 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+ 0 SECTION LOCAL DEFAULT 2 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+ 0 SECTION LOCAL DEFAULT 6 - 7: 0+ 0 FUNC GLOBAL DEFAULT 1 Main - 8: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 - 9: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start + 4: 0+ 0 FUNC GLOBAL DEFAULT 1 Main + 5: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 + 6: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/greg-1.d b/ld/testsuite/ld-mmix/greg-1.d index b5a42ca663be9..d64ce0a684e0c 100644 --- a/ld/testsuite/ld-mmix/greg-1.d +++ b/ld/testsuite/ld-mmix/greg-1.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+c g \.text 0+ _start 0+fe g \*REG\* 0+ areg #... diff --git a/ld/testsuite/ld-mmix/greg-19.d b/ld/testsuite/ld-mmix/greg-19.d index b4a90251c51da..44681617370bc 100644 --- a/ld/testsuite/ld-mmix/greg-19.d +++ b/ld/testsuite/ld-mmix/greg-19.d @@ -9,9 +9,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+ g F \.text 0+ Main 0+ g \.text 0+ _start 0+fe g \*REG\* 0+ areg diff --git a/ld/testsuite/ld-mmix/greg-2.d b/ld/testsuite/ld-mmix/greg-2.d index baf364743bbfc..ab8fbb2a8f3cf 100644 --- a/ld/testsuite/ld-mmix/greg-2.d +++ b/ld/testsuite/ld-mmix/greg-2.d @@ -16,9 +16,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7e0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+fe g \*REG\* 0+ b 0+20 g \.text 0+ _start 0+fc g \*REG\* 0+ areg diff --git a/ld/testsuite/ld-mmix/greg-3.d b/ld/testsuite/ld-mmix/greg-3.d index 0e55087f1814a..25189c22daf46 100644 --- a/ld/testsuite/ld-mmix/greg-3.d +++ b/ld/testsuite/ld-mmix/greg-3.d @@ -16,9 +16,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+10 g \.text 0+ _start 0+fe g \*REG\* 0+ areg #... diff --git a/ld/testsuite/ld-mmix/greg-4.d b/ld/testsuite/ld-mmix/greg-4.d index 67715ed134c4b..8b882c1f6a6ba 100644 --- a/ld/testsuite/ld-mmix/greg-4.d +++ b/ld/testsuite/ld-mmix/greg-4.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+18 g \.text 0+ _start 0+fe g \*REG\* 0+ areg #... diff --git a/ld/testsuite/ld-mmix/greg-5.d b/ld/testsuite/ld-mmix/greg-5.d index 81f4fa5b6d536..67e50d295d9a0 100644 --- a/ld/testsuite/ld-mmix/greg-5.d +++ b/ld/testsuite/ld-mmix/greg-5.d @@ -13,9 +13,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+14 g \.text 0+ _start 0+fe g \*REG\* 0+ areg #... diff --git a/ld/testsuite/ld-mmix/greg-5s.d b/ld/testsuite/ld-mmix/greg-5s.d index 30d3b04de0bde..84f59517bbccc 100644 --- a/ld/testsuite/ld-mmix/greg-5s.d +++ b/ld/testsuite/ld-mmix/greg-5s.d @@ -12,9 +12,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+7f0 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 g \.text 0+ _start 0+fe g \*REG\* 0+ areg #... diff --git a/ld/testsuite/ld-mmix/greg-6.d b/ld/testsuite/ld-mmix/greg-6.d index 2cf163e618131..e4df905a1dbb5 100644 --- a/ld/testsuite/ld-mmix/greg-6.d +++ b/ld/testsuite/ld-mmix/greg-6.d @@ -41,9 +41,6 @@ SYMBOL TABLE: 0+0 l d \.text 0+ (|\.text) 0+100 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+20 l \*REG\* 0+ P 0+21 l \*REG\* 0+ O 0+22 l \*REG\* 0+ N diff --git a/ld/testsuite/ld-mmix/greg-7.d b/ld/testsuite/ld-mmix/greg-7.d index 13d0aa23e91c6..a5d1692e95151 100644 --- a/ld/testsuite/ld-mmix/greg-7.d +++ b/ld/testsuite/ld-mmix/greg-7.d @@ -41,9 +41,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 0+100 l d \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+21 l \*REG\* 0+ P 0+22 l \*REG\* 0+ O 0+23 l \*REG\* 0+ N diff --git a/ld/testsuite/ld-mmix/loc1.d b/ld/testsuite/ld-mmix/loc1.d index 7ecf491531e3e..cac26892d7115 100644 --- a/ld/testsuite/ld-mmix/loc1.d +++ b/ld/testsuite/ld-mmix/loc1.d @@ -8,9 +8,6 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1000 g \.text 0+ loc1 0+1000 g \*ABS\* 0+ __\.MMIX\.start\.\.text 2000000000000000 g \*ABS\* 0+ __bss_start diff --git a/ld/testsuite/ld-mmix/loc2.d b/ld/testsuite/ld-mmix/loc2.d index c4e8cc9a15a2e..7d44c2241a85f 100644 --- a/ld/testsuite/ld-mmix/loc2.d +++ b/ld/testsuite/ld-mmix/loc2.d @@ -9,9 +9,6 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1004 g \.text 0+ _start 0+1000 g \.text 0+ loc1 0+1000 g \*ABS\* 0+ __\.MMIX\.start\.\.text diff --git a/ld/testsuite/ld-mmix/loc3.d b/ld/testsuite/ld-mmix/loc3.d index 7969d00109112..ff0fe8ada2aee 100644 --- a/ld/testsuite/ld-mmix/loc3.d +++ b/ld/testsuite/ld-mmix/loc3.d @@ -9,9 +9,6 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1000 g \.text 0+ _start 0+1004 g \.text 0+ loc1 0+1000 g \*ABS\* 0+ __\.MMIX\.start\.\.text diff --git a/ld/testsuite/ld-mmix/loc4.d b/ld/testsuite/ld-mmix/loc4.d index 15333de542a54..34428a9845878 100644 --- a/ld/testsuite/ld-mmix/loc4.d +++ b/ld/testsuite/ld-mmix/loc4.d @@ -11,9 +11,6 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) 2000000000000000 l d \.data 0+ (|\.data) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 2000000000000000 l \.data 0+ xx 0+1004 g F \.text 0+ Main 2000000000000000 g \*ABS\* 0+ __\.MMIX\.start\.\.data diff --git a/ld/testsuite/ld-mmix/loc6.d b/ld/testsuite/ld-mmix/loc6.d index 030ba6c2d515d..425edaee07605 100644 --- a/ld/testsuite/ld-mmix/loc6.d +++ b/ld/testsuite/ld-mmix/loc6.d @@ -10,9 +10,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 2000000000000200 l d \.data 0+ (|\.data) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 2000000000000200 g \.data 0+ dloc1 2000000000000200 g \*ABS\* 0+ __\.MMIX\.start\.\.data 0+ g \.text 0+ _start diff --git a/ld/testsuite/ld-mmix/local1.d b/ld/testsuite/ld-mmix/local1.d index 3e8ecaa1564ac..fc08da774fd0d 100644 --- a/ld/testsuite/ld-mmix/local1.d +++ b/ld/testsuite/ld-mmix/local1.d @@ -24,26 +24,23 @@ Section Headers: \[ 3\] \.shstrtab STRTAB 0+ 0+90 0+34 0+ 0 0 1 \[ 4\] \.symtab SYMTAB 0+ 0+248 - 0+150 0+18 5 8 8 - \[ 5\] \.strtab STRTAB 0+ 0+398 + 0+108 0+18 5 5 8 + \[ 5\] \.strtab STRTAB 0+ 0+350 0+32 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) -Symbol table '\.symtab' contains 14 entries: +Symbol table '\.symtab' contains 11 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+7e8 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 7: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 8: 0+fc 0 NOTYPE GLOBAL DEFAULT PRC\[0xff00\] ext1 - 9: 0+4 0 NOTYPE GLOBAL DEFAULT 1 _start + 3: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 4: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 5: 0+fc 0 NOTYPE GLOBAL DEFAULT PRC\[0xff00\] ext1 + 6: 0+4 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/local3.d b/ld/testsuite/ld-mmix/local3.d index db545913cc48b..62db6c3424134 100644 --- a/ld/testsuite/ld-mmix/local3.d +++ b/ld/testsuite/ld-mmix/local3.d @@ -22,26 +22,23 @@ Section Headers: \[ 3\] \.shstrtab STRTAB 0+ 0+90 0+34 0+ 0 0 1 \[ 4\] \.symtab SYMTAB 0+ 0+248 - 0+150 0+18 5 8 8 - \[ 5\] \.strtab STRTAB 0+ 0+398 + 0+108 0+18 5 5 8 + \[ 5\] \.strtab STRTAB 0+ 0+350 0+32 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) -Symbol table '\.symtab' contains 14 entries: +Symbol table '\.symtab' contains 11 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+7e8 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 7: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 8: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 - 9: 0+4 0 NOTYPE GLOBAL DEFAULT 1 _start + 3: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 4: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 5: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 + 6: 0+4 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/local5.d b/ld/testsuite/ld-mmix/local5.d index 37dc0f569f69c..955c3fada771b 100644 --- a/ld/testsuite/ld-mmix/local5.d +++ b/ld/testsuite/ld-mmix/local5.d @@ -23,26 +23,23 @@ Section Headers: \[ 3\] \.shstrtab STRTAB 0+ 0+94 0+34 0+ 0 0 1 \[ 4\] \.symtab SYMTAB 0+ 0+248 - 0+150 0+18 5 8 8 - \[ 5\] \.strtab STRTAB 0+ 0+398 + 0+108 0+18 5 5 8 + \[ 5\] \.strtab STRTAB 0+ 0+350 0+32 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) -Symbol table '\.symtab' contains 14 entries: +Symbol table '\.symtab' contains 11 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+7e8 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 7: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 8: 0+fc 0 NOTYPE GLOBAL DEFAULT PRC\[0xff00\] ext1 - 9: 0+8 0 NOTYPE GLOBAL DEFAULT 1 _start + 3: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 4: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 5: 0+fc 0 NOTYPE GLOBAL DEFAULT PRC\[0xff00\] ext1 + 6: 0+8 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/local7.d b/ld/testsuite/ld-mmix/local7.d index 2407fcdfb1965..0109d13800331 100644 --- a/ld/testsuite/ld-mmix/local7.d +++ b/ld/testsuite/ld-mmix/local7.d @@ -24,26 +24,23 @@ Section Headers: \[ 3\] \.shstrtab STRTAB 0+ 0+94 0+34 0+ 0 0 1 \[ 4\] \.symtab SYMTAB 0+ 0+248 - 0+150 0+18 5 8 8 - \[ 5\] \.strtab STRTAB 0+ 0+398 + 0+108 0+18 5 5 8 + \[ 5\] \.strtab STRTAB 0+ 0+350 0+32 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) -Symbol table '\.symtab' contains 14 entries: +Symbol table '\.symtab' contains 11 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 2: 0+7e8 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 SECTION LOCAL DEFAULT 5 - 6: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 7: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym - 8: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 - 9: 0+8 0 NOTYPE GLOBAL DEFAULT 1 _start + 3: 0+fd 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 4: 0+fe 0 NOTYPE LOCAL DEFAULT PRC\[0xff00\] lsym + 5: 0+fc 0 NOTYPE GLOBAL DEFAULT ABS ext1 + 6: 0+8 0 NOTYPE GLOBAL DEFAULT 1 _start #... Hex dump of section '\.text': diff --git a/ld/testsuite/ld-mmix/locdo-1.d b/ld/testsuite/ld-mmix/locdo-1.d index 2e8409fddd449..4a16735067545 100644 --- a/ld/testsuite/ld-mmix/locdo-1.d +++ b/ld/testsuite/ld-mmix/locdo-1.d @@ -8,9 +8,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) 2000000000000008 l d \.data 0+ (|\.data) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 2000000000000008 g \*ABS\* 0+ __\.MMIX\.start\.\.data 2000000000000008 g \.data 0+ od 0+ g \.text 0+ _start diff --git a/ld/testsuite/ld-mmix/loct-1.d b/ld/testsuite/ld-mmix/loct-1.d index 96b6a1451a74a..24f4112de663e 100644 --- a/ld/testsuite/ld-mmix/loct-1.d +++ b/ld/testsuite/ld-mmix/loct-1.d @@ -7,9 +7,6 @@ SYMBOL TABLE: 0+1004 l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1004 l \.text 0+ t 0+100c g \.text 0+ _start 0+1004 g \*ABS\* 0+ __\.MMIX\.start\.\.text diff --git a/ld/testsuite/ld-mmix/locto-1.d b/ld/testsuite/ld-mmix/locto-1.d index 08e665273b32f..5c5c391edacb8 100644 --- a/ld/testsuite/ld-mmix/locto-1.d +++ b/ld/testsuite/ld-mmix/locto-1.d @@ -7,9 +7,6 @@ SYMBOL TABLE: 0+1008 l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1008 g \.text 0+ od 0+1010 g \.text 0+ _start 0+1008 g \*ABS\* 0+ __\.MMIX\.start\.\.text diff --git a/ld/testsuite/ld-mmix/start-1.d b/ld/testsuite/ld-mmix/start-1.d index 13fdbdc48ca86..37c23d6ed4fee 100644 --- a/ld/testsuite/ld-mmix/start-1.d +++ b/ld/testsuite/ld-mmix/start-1.d @@ -6,9 +6,6 @@ SYMBOL TABLE: 0+ l d \.text 0+ (|\.text) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+4 g \.text 0+ _start 2000000000000000 g \*ABS\* 0+ __bss_start 2000000000000000 g \*ABS\* 0+ _edata diff --git a/ld/testsuite/ld-mmix/undef-3.d b/ld/testsuite/ld-mmix/undef-3.d index a17b96877423f..5b3ce98ea7d8f 100644 --- a/ld/testsuite/ld-mmix/undef-3.d +++ b/ld/testsuite/ld-mmix/undef-3.d @@ -14,24 +14,21 @@ Section Headers: \[ 2\] \.shstrtab STRTAB 0+ 0+7c 0+21 0+ 0 0 1 \[ 3\] \.symtab SYMTAB 0+ 0+1e0 - 0+108 0+18 4 5 8 - \[ 4\] \.strtab STRTAB 0+ 0+2e8 + 0+c0 0+18 4 2 8 + \[ 4\] \.strtab STRTAB 0+ 0+2a0 0+2f 0+ 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) O \(extra OS processing required\) o \(OS specific\), p \(processor specific\) -Symbol table '\.symtab' contains 11 entries: +Symbol table '\.symtab' contains 8 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0+ 0 NOTYPE LOCAL DEFAULT UND 1: 0+ 0 SECTION LOCAL DEFAULT 1 - 2: 0+ 0 SECTION LOCAL DEFAULT 2 - 3: 0+ 0 SECTION LOCAL DEFAULT 3 - 4: 0+ 0 SECTION LOCAL DEFAULT 4 - 5: 0+ 0 NOTYPE GLOBAL DEFAULT UND undefd - 6: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start - 7: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __bss_start - 8: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS _edata - 9: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS _end - 10: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start\. + 2: 0+ 0 NOTYPE GLOBAL DEFAULT UND undefd + 3: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start + 4: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS __bss_start + 5: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS _edata + 6: 2000000000000000 0 NOTYPE GLOBAL DEFAULT ABS _end + 7: 0+ 0 NOTYPE GLOBAL DEFAULT 1 _start\. diff --git a/ld/testsuite/ld-pe/direct.exp b/ld/testsuite/ld-pe/direct.exp new file mode 100644 index 0000000000000..bfe8f1e793c2e --- /dev/null +++ b/ld/testsuite/ld-pe/direct.exp @@ -0,0 +1,143 @@ +# Expect script for direct linking from dll tests +# Copyright 2006 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. +# +# Written by Pedro Alves <pedro_alves@portugalmail.pt> +# + +# Note: +# +# This test checks the "direct linking to a dll" functionality. +# +# The test has 7 stages: +# +# 1. compile and link a test dll with ".dll" extension. +# +# 2. compile and link a test dll with ".sl" (i.e. != ".dll") extension. +# +# 3. compile and link a client application linking directly to the ".dll" dll built in 1. +# This should produce no errors. +# +# 4. compile and link a client application linking directly to the ".sl" dll built in 2. +# This should produce no errors. +# +# 5. compile and link a client application linking directly to a symlink into +# the ".dll" dll built in 1. +# This should produce no errors. +# +# 6. compile and link a client application linking directly to a symlink into +# the ".sl" dll built in 1. +# This should produce no errors. +# +# 7. run the produced executables + +# This test can only be run on PE/COFF platforms. +if { ![istarget *-*-cygwin*] + && ![istarget *-*-mingw*] + && ![istarget *-*-pe] } { + return +} + +# No compiler, no test. +if { [which $CC] == 0 } { + untested "Direct linking to dll test" + return +} + +set tmpdir tmpdir + +proc test_direct_link_dll {} { + global CC + global CFLAGS + global srcdir + global subdir + global tmpdir + + # Compile the dll. + if ![ld_compile "$CC $CFLAGS" $srcdir/$subdir/direct_dll.c $tmpdir/direct_dll.o ] { + fail "compiling shared lib" + } elseif ![ld_simple_link "$CC -shared" $tmpdir/direct_dll.dll "$tmpdir/direct_dll.o" ] { + fail "linking shared lib (.dll)" + } elseif ![ld_simple_link "$CC -shared" $tmpdir/direct_dll.sl "$tmpdir/direct_dll.o" ] { + fail "linking shared lib (.sl)" + } else { + # Compile and link the client program. + if ![ld_compile "$CC $CFLAGS" $srcdir/$subdir/direct_client.c $tmpdir/direct_client.o ] { + fail "compiling client" + } else { + # Check linking directly to direct_dll.dll. + set msg "linking client (.dll)" + if [ld_simple_link $CC $tmpdir/direct_client_dll.exe "$tmpdir/direct_client.o $tmpdir/direct_dll.dll" ] { + pass $msg + } else { + fail $msg + } + + # Check linking directly to direct_dll.sl. + set msg "linking client (.sl)" + if [ld_simple_link $CC $tmpdir/direct_client_sl.exe "$tmpdir/direct_client.o $tmpdir/direct_dll.sl" ] { + pass $msg + } else { + fail $msg + } + + # Check dll direct linking through symlink to .dll. + # Create symbolic link. + catch "exec ln -fs direct_dll.dll $tmpdir/libdirect_dll.dll.a" ln_catch + set msg "linking client (symlink -> .dll)" + if [ld_simple_link $CC $tmpdir/direct_client_symlink_dll.exe "$tmpdir/direct_client.o $tmpdir/libdirect_dll.dll.a" ] { + pass $msg + } else { + fail $msg + } + + # Check dll direct linking through symlink to .sl. + # Create symbolic link. + catch "exec ln -fs direct_dll.sl $tmpdir/libdirect_sl.dll.a" ln_catch + set msg "linking client (symlink -> .sl)" + if [ld_simple_link $CC $tmpdir/direct_client_symlink_sl.exe "$tmpdir/direct_client.o $tmpdir/libdirect_sl.dll.a" ] { + pass $msg + } else { + fail $msg + } + } + } +} + +proc directdll_execute {exe msg} { + set expected "" + catch "exec $exe" prog_output + if [string match $expected $prog_output] then { + pass $msg + } else { + verbose $prog_output + fail $msg + } +} + +test_direct_link_dll + +# This is as far as we can go with a cross-compiler +if ![isnative] then { + verbose "Not running natively, so cannot execute binaries" + return +} + +directdll_execute "$tmpdir/direct_client_dll.exe" "running direct linked dll (.dll)" +directdll_execute "$tmpdir/direct_client_sl.exe" "running direct linked dll (.sl)" +directdll_execute "$tmpdir/direct_client_symlink_sl.exe" "running direct linked dll (symlink -> .sl)" +directdll_execute "$tmpdir/direct_client_symlink_dll.exe" "running direct linked dll (symlink -> .dll)" diff --git a/ld/testsuite/ld-pe/direct_client.c b/ld/testsuite/ld-pe/direct_client.c new file mode 100644 index 0000000000000..6264a786e3c07 --- /dev/null +++ b/ld/testsuite/ld-pe/direct_client.c @@ -0,0 +1,8 @@ +__declspec(dllimport) int dll_func (void); + +int +main() +{ + dll_func (); + return 0; +} diff --git a/ld/testsuite/ld-pe/direct_dll.c b/ld/testsuite/ld-pe/direct_dll.c new file mode 100644 index 0000000000000..9863d1a2294aa --- /dev/null +++ b/ld/testsuite/ld-pe/direct_dll.c @@ -0,0 +1,5 @@ +__declspec(dllexport) int +dll_func (void) +{ + return 10; +} diff --git a/ld/testsuite/ld-pe/image_size.d b/ld/testsuite/ld-pe/image_size.d new file mode 100644 index 0000000000000..6d41fccb3ff8b --- /dev/null +++ b/ld/testsuite/ld-pe/image_size.d @@ -0,0 +1,9 @@ +#name: PE-COFF SizeOfImage +#ld: -T image_size.t +#objdump: -p +#target: i*86-*-mingw32 + +.*: file format .* +#... +SizeOfImage 00004000 +#... diff --git a/ld/testsuite/ld-pe/image_size.s b/ld/testsuite/ld-pe/image_size.s new file mode 100644 index 0000000000000..3b56d7f1aa981 --- /dev/null +++ b/ld/testsuite/ld-pe/image_size.s @@ -0,0 +1,8 @@ + .text + .global _start +_start: + .byte 1 + .global data + .data +data: + .byte 2 diff --git a/ld/testsuite/ld-pe/image_size.t b/ld/testsuite/ld-pe/image_size.t new file mode 100644 index 0000000000000..f646eca59218b --- /dev/null +++ b/ld/testsuite/ld-pe/image_size.t @@ -0,0 +1,15 @@ +SECTIONS +{ + . = SIZEOF_HEADERS; + . = ALIGN(__section_alignment__); + .text __image_base__ + ( __section_alignment__ < 0x1000 ? . : __section_alignment__ ) : + { + *(.text) + } + . = . + 0x1000; + .data BLOCK(__section_alignment__) : + { + *(.data) + } + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp index ac38a70603b27..7568f10a41335 100644 --- a/ld/testsuite/ld-pe/pe.exp +++ b/ld/testsuite/ld-pe/pe.exp @@ -1,5 +1,5 @@ # Expect script for export table in executables tests
-# Copyright 2004
+# Copyright 2004, 2006
# Free Software Foundation, Inc.
#
# This file is free software; you can redistribute it and/or modify
@@ -17,9 +17,12 @@ # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
-# This test can only be run on i386 PE/COFF platforms.
-if { ![istarget i*86-*-cygwin*] && ![istarget i*86-*-pe]
- && ![istarget i*86-*-mingw*] } {
+# This test can only be run on PE/COFF platforms that support .secrel32.
+if { ![istarget i*86-*-cygwin*]
+ && ![istarget i*86-*-pe]
+ && ![istarget i*86-*-mingw*]
+ && ![istarget x86_64-*-mingw*]
+ && ![istarget arm-wince-pe] } {
return
}
@@ -29,3 +32,5 @@ set pe_tests { }
run_ld_link_tests $pe_tests
+
+run_dump_test "image_size"
diff --git a/ld/testsuite/ld-pe/secrel.d b/ld/testsuite/ld-pe/secrel.d index 93e083f54af7f..b924f5435a759 100644 --- a/ld/testsuite/ld-pe/secrel.d +++ b/ld/testsuite/ld-pe/secrel.d @@ -1,27 +1,27 @@ -tmpdir/secrel\.x: file format pei-i386
+tmpdir/secrel\.x: +file format pei-.*
Contents of section \.text:
- 401000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
- 401010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
- 401020 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
- 401030 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
- 401040 ........ ........ ........ ........ ................
+ .*1000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ .*1010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ .*1020 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ .*1030 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ .*1040 ........ ........ ........ ........ ................
Contents of section \.data:
- 402000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
- 402010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
- 402020 3e3e3e3e 04000000 110d0000 00111600 >>>>............
- 402030 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
- 402040 3e3e3e3e 04000000 110d0000 00111600 >>>>............
- 402050 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
- 402060 3e3e3e3e 04000000 110d0000 00111600 >>>>............
- 402070 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
- 402080 3e3e3e3e 24000000 112d0000 00113600 >>>>\$....-....6.
- 402090 0000113f 00000011 3c3c3c3c 3c3c3c3c ...\?....<<<<<<<<
+ .*2000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ .*2010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ .*2020 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ .*2030 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ .*2040 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ .*2050 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ .*2060 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ .*2070 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ .*2080 3e3e3e3e 24000000 112d0000 00113600 >>>>\$....-....6.
+ .*2090 0000113f 00000011 3c3c3c3c 3c3c3c3c ...\?....<<<<<<<<
Contents of section \.rdata:
- 403000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
- 403010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
- 403020 3e3e3e3e 00000000 00000000 00000000 >>>>............
+ .*3000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ .*3010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ .*3020 3e3e3e3e 00000000 00000000 00000000 >>>>............
Contents of section \.idata:
- 404000 00000000 00000000 00000000 00000000 ................
- 404010 00000000 ....
+ .*4000 00000000 00000000 00000000 00000000 ................
+ .*4010 00000000 ....
diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-0.s b/ld/testsuite/ld-powerpc/attr-gnu-4-0.s new file mode 100644 index 0000000000000..a1437461d0474 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-0.s @@ -0,0 +1 @@ +.gnu_attribute 4,0 diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-00.d b/ld/testsuite/ld-powerpc/attr-gnu-4-00.d new file mode 100644 index 0000000000000..a4751a1376665 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-00.d @@ -0,0 +1,7 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-0.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-01.d b/ld/testsuite/ld-powerpc/attr-gnu-4-01.d new file mode 100644 index 0000000000000..212e0c46f0cb3 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-01.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-1.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Hard float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-02.d b/ld/testsuite/ld-powerpc/attr-gnu-4-02.d new file mode 100644 index 0000000000000..9bd42b59ba692 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-02.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-0.s +#source: attr-gnu-4-2.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Soft float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-1.s b/ld/testsuite/ld-powerpc/attr-gnu-4-1.s new file mode 100644 index 0000000000000..e985a56f6b1ad --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-1.s @@ -0,0 +1 @@ +.gnu_attribute 4,1 diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-10.d b/ld/testsuite/ld-powerpc/attr-gnu-4-10.d new file mode 100644 index 0000000000000..93297c20f1f4b --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-10.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-0.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Hard float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-11.d b/ld/testsuite/ld-powerpc/attr-gnu-4-11.d new file mode 100644 index 0000000000000..fb2b76e95713b --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-11.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-1.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Hard float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-12.d b/ld/testsuite/ld-powerpc/attr-gnu-4-12.d new file mode 100644 index 0000000000000..b7ffba0ff1553 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-12.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-2.s +#as: -a32 +#ld: -r -melf32ppc +#warning: Warning: .* uses hard float, .* uses soft float +#target: powerpc*-*-* diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-13.d b/ld/testsuite/ld-powerpc/attr-gnu-4-13.d new file mode 100644 index 0000000000000..be1290e6570f8 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-13.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-1.s +#source: attr-gnu-4-3.s +#as: -a32 +#ld: -r -melf32ppc +#warning: Warning: .* uses unknown floating point ABI 3 +#target: powerpc*-*-* diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-2.s b/ld/testsuite/ld-powerpc/attr-gnu-4-2.s new file mode 100644 index 0000000000000..54ebf4ed8ddb8 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-2.s @@ -0,0 +1 @@ +.gnu_attribute 4,2 diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-20.d b/ld/testsuite/ld-powerpc/attr-gnu-4-20.d new file mode 100644 index 0000000000000..3d838938020f2 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-20.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-0.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Soft float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-21.d b/ld/testsuite/ld-powerpc/attr-gnu-4-21.d new file mode 100644 index 0000000000000..b38f24837bef8 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-21.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-1.s +#as: -a32 +#ld: -r -melf32ppc +#warning: Warning: .* uses hard float, .* uses soft float +#target: powerpc*-*-* diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-22.d b/ld/testsuite/ld-powerpc/attr-gnu-4-22.d new file mode 100644 index 0000000000000..f6bd198efdf68 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-22.d @@ -0,0 +1,10 @@ +#source: attr-gnu-4-2.s +#source: attr-gnu-4-2.s +#as: -a32 +#ld: -r -melf32ppc +#readelf: -A +#target: powerpc*-*-* + +Attribute Section: gnu +File Attributes + Tag_GNU_Power_ABI_FP: Soft float diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-3.s b/ld/testsuite/ld-powerpc/attr-gnu-4-3.s new file mode 100644 index 0000000000000..32e5f5d1af4a8 --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-3.s @@ -0,0 +1 @@ +.gnu_attribute 4,3 diff --git a/ld/testsuite/ld-powerpc/attr-gnu-4-31.d b/ld/testsuite/ld-powerpc/attr-gnu-4-31.d new file mode 100644 index 0000000000000..9cf8f4f5930fc --- /dev/null +++ b/ld/testsuite/ld-powerpc/attr-gnu-4-31.d @@ -0,0 +1,6 @@ +#source: attr-gnu-4-3.s +#source: attr-gnu-4-1.s +#as: -a32 +#ld: -r -melf32ppc +#warning: Warning: .* uses unknown floating point ABI 3 +#target: powerpc*-*-* diff --git a/ld/testsuite/ld-powerpc/plt1.d b/ld/testsuite/ld-powerpc/plt1.d new file mode 100644 index 0000000000000..d8d9d8d53ec7f --- /dev/null +++ b/ld/testsuite/ld-powerpc/plt1.d @@ -0,0 +1,20 @@ +#source: plt1.s +#as: -a32 +#objdump: -dr +#target: powerpc*-*-* + +.*: file format elf32-powerpc + +Disassembly of section .text: + +0+ <_start>: + 0: 42 9f 00 05 bcl- 20,4\*cr7\+so,4 .* + 4: 7f c8 02 a6 mflr r30 + 8: 3f de 00 00 addis r30,r30,0 + a: R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x6 + c: 3b de 00 0a addi r30,r30,10 + e: R_PPC_REL16_LO _GLOBAL_OFFSET_TABLE_\+0xa + 10: 48 00 00 01 bl 10 .* + 10: R_PPC_PLTREL24 _exit + 14: 48 00 00 00 b 14 .* + 14: R_PPC_REL24 _start diff --git a/ld/testsuite/ld-powerpc/plt1.s b/ld/testsuite/ld-powerpc/plt1.s new file mode 100644 index 0000000000000..c00c264d1d4aa --- /dev/null +++ b/ld/testsuite/ld-powerpc/plt1.s @@ -0,0 +1,9 @@ + .text + .global _start +_start: + bcl 20,31,1f +1: mflr 30 + addis 30,30,(_GLOBAL_OFFSET_TABLE_-1b)@ha + addi 30,30,(_GLOBAL_OFFSET_TABLE_-1b)@l + bl _exit@plt + b _start diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp index 681bb6e07b9ee..ad224b09a943c 100644 --- a/ld/testsuite/ld-powerpc/powerpc.exp +++ b/ld/testsuite/ld-powerpc/powerpc.exp @@ -1,5 +1,5 @@ # Expect script for ld-powerpc tests -# Copyright 2002, 2003, 2005 Free Software Foundation +# Copyright 2002, 2003, 2005, 2006 Free Software Foundation # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -29,7 +29,7 @@ if {[istarget "*-*-vxworks"]} { {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "-mregnames" {vxworks1-lib.s} {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} - {readelf --symbols vxworks1-lib.nd}} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} "libvxworks1.so"} {"VxWorks executable test 1 (dynamic)" \ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" @@ -143,4 +143,19 @@ run_ld_link_tests $ppcelftests if [ supports_ppc64 ] then { run_ld_link_tests $ppc64elftests + run_dump_test "relbrlt" } + +run_dump_test "plt1" + +run_dump_test "attr-gnu-4-00" +run_dump_test "attr-gnu-4-01" +run_dump_test "attr-gnu-4-02" +run_dump_test "attr-gnu-4-10" +run_dump_test "attr-gnu-4-11" +run_dump_test "attr-gnu-4-12" +run_dump_test "attr-gnu-4-13" +run_dump_test "attr-gnu-4-20" +run_dump_test "attr-gnu-4-21" +run_dump_test "attr-gnu-4-22" +run_dump_test "attr-gnu-4-31" diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d new file mode 100644 index 0000000000000..1bba8aaa9fae6 --- /dev/null +++ b/ld/testsuite/ld-powerpc/relbrlt.d @@ -0,0 +1,50 @@ +#source: relbrlt.s +#as: -a64 +#ld: -melf64ppc --emit-relocs +#objdump: -dr + +.*: file format elf64-powerpc + +Disassembly of section \.text: + +0*100000b0 <_start>: +[0-9a-f ]*: 49 bf 00 31 bl .* +[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e0044 +[0-9a-f ]*: 60 00 00 00 nop +[0-9a-f ]*: 49 bf 00 19 bl .* +[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf0020 +[0-9a-f ]*: 60 00 00 00 nop +[0-9a-f ]*: 49 bf 00 25 bl .* +[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0024 +[0-9a-f ]*: 60 00 00 00 nop +[0-9a-f ]*: 00 00 00 00 \.long 0x0 +[0-9a-f ]*: 4b ff ff e4 b .* <_start> + \.\.\. + +[0-9a-f ]*<.*plt_branch.*>: +[0-9a-f ]*: 3d 82 00 00 addis r12,r2,0 +[0-9a-f ]*: e9 6c 80 00 ld r11,-32768\(r12\) +[0-9a-f ]*: 7d 69 03 a6 mtctr r11 +[0-9a-f ]*: 4e 80 04 20 bctr + +[0-9a-f ]*<.*long_branch.*>: +[0-9a-f ]*: 49 bf 00 14 b .* <far> +[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00f4 + +[0-9a-f ]*<.*plt_branch.*>: +[0-9a-f ]*: 3d 82 00 00 addis r12,r2,0 +[0-9a-f ]*: e9 6c 80 08 ld r11,-32760\(r12\) +[0-9a-f ]*: 7d 69 03 a6 mtctr r11 +[0-9a-f ]*: 4e 80 04 20 bctr + \.\.\. + +0*137e00f4 <far>: +[0-9a-f ]*: 4e 80 00 20 blr + \.\.\. + +[0-9a-f ]*<far2far>: +[0-9a-f ]*: 4e 80 00 20 blr + \.\.\. + +[0-9a-f ]*<huge>: +[0-9a-f ]*: 4e 80 00 20 blr diff --git a/ld/testsuite/ld-powerpc/relbrlt.s b/ld/testsuite/ld-powerpc/relbrlt.s new file mode 100644 index 0000000000000..eed2f3350d44c --- /dev/null +++ b/ld/testsuite/ld-powerpc/relbrlt.s @@ -0,0 +1,34 @@ + .text + .global _start +_start: +1: + bl far + nop + bl far2far + nop + bl huge + nop + .long 0 + b 1b + .space 0x1bf0000 + + .section .text.pad1,"ax" + .space 0x1bf0000 + + .section .text.far,"ax" +far: + blr + + .section .text.pad2,"ax" + .space 0x40ffd8 + + .section .text.far2far,"ax" +far2far: + blr + + .section .text.pad3,"ax" + .space 0x1bf0000 + + .section .text.huge,"ax" +huge: + blr diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d index 546daf3defd8b..26599ac59e554 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.d +++ b/ld/testsuite/ld-powerpc/tlsexe.d @@ -56,21 +56,22 @@ Disassembly of section \.text: .* e9 4d 90 2a lwa r10,-28632\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 90 30 lha r10,-28624\(r9\) -.* 7d 89 02 a6 mfctr r12 -.* 78 0b 1f 24 rldicr r11,r0,3,60 -.* 34 40 80 00 addic\. r2,r0,-32768 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7c 42 fe 76 sradi r2,r2,63 -.* 78 0b 17 64 rldicr r11,r0,2,61 -.* 7c 42 58 38 and r2,r2,r11 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7d 8c 12 14 add r12,r12,r2 -.* 3d 8c 00 01 addis r12,r12,1 -.* e9 6c 01 c4 ld r11,452\(r12\) -.* 39 8c 01 c4 addi r12,r12,452 +.* 60 00 00 00 nop +.* 00 00 00 00 .* +.* 00 01 01 f0 .* +.* 7d 88 02 a6 mflr r12 +.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.* +.* 7d 68 02 a6 mflr r11 +.* e8 4b ff f0 ld r2,-16\(r11\) +.* 7d 88 03 a6 mtlr r12 +.* 7d 82 5a 14 add r12,r2,r11 +.* e9 6c 00 00 ld r11,0\(r12\) .* e8 4c 00 08 ld r2,8\(r12\) .* 7d 69 03 a6 mtctr r11 .* e9 6c 00 10 ld r11,16\(r12\) .* 4e 80 04 20 bctr +.* 60 00 00 00 nop +.* 60 00 00 00 nop +.* 60 00 00 00 nop .* 38 00 00 00 li r0,0 -.* 4b ff ff bc b .* +.* 4b ff ff c4 b .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.r b/ld/testsuite/ld-powerpc/tlsexe.r index 2e4fab64e63a0..4992ab2fd275f 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.r +++ b/ld/testsuite/ld-powerpc/tlsexe.r @@ -16,11 +16,11 @@ Section Headers: +\[ 4\] \.dynstr +.* +\[ 5\] \.rela\.dyn +.* +\[ 6\] \.rela\.plt +.* - +\[ 7\] \.text +PROGBITS .* 0+fc 0+ +AX +0 +0 +4 - +\[ 8\] \.rodata + PROGBITS .* 0+ 0+ +A +0 +0 +8 - +\[ 9\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 - +\[10\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 - +\[11\] \.dynamic +DYNAMIC .* 0+150 10 +WA +4 +0 +8 + +\[ 7\] \.text +PROGBITS .* 0+100 0+ +AX +0 +0 +8 + +\[ 8\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 + +\[ 9\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 + +\[10\] \.dynamic +DYNAMIC .* 0+150 10 +WA +4 +0 +8 + +\[11\] \.branch_lt + PROGBITS .* 0+ 0+ +WA +0 +0 +8 +\[12\] \.got +PROGBITS .* 0+30 08 +WA +0 +0 +8 +\[13\] \.plt +.* +\[14\] \.shstrtab +.* @@ -67,12 +67,12 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* TLS +GLOBAL DEFAULT +UND gd .* FUNC +GLOBAL DEFAULT +UND __tls_get_addr .* TLS +GLOBAL DEFAULT +UND ld -.* TLS +GLOBAL DEFAULT +10 ld2 +.* TLS +GLOBAL DEFAULT +9 ld2 .* NOTYPE +GLOBAL DEFAULT +ABS __bss_start .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '\.symtab' contains 40 entries: +Symbol table '\.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* 0+ +0 NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -88,29 +88,26 @@ Symbol table '\.symtab' contains 40 entries: .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 .* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 -.* SECTION LOCAL +DEFAULT +16 -.* TLS +LOCAL +DEFAULT +9 gd4 -.* TLS +LOCAL +DEFAULT +9 ld4 -.* TLS +LOCAL +DEFAULT +9 ld5 -.* TLS +LOCAL +DEFAULT +9 ld6 -.* TLS +LOCAL +DEFAULT +9 ie4 -.* TLS +LOCAL +DEFAULT +9 le4 -.* TLS +LOCAL +DEFAULT +9 le5 -.* OBJECT +LOCAL +HIDDEN +11 _DYNAMIC +.* TLS +LOCAL +DEFAULT +8 gd4 +.* TLS +LOCAL +DEFAULT +8 ld4 +.* TLS +LOCAL +DEFAULT +8 ld5 +.* TLS +LOCAL +DEFAULT +8 ld6 +.* TLS +LOCAL +DEFAULT +8 ie4 +.* TLS +LOCAL +DEFAULT +8 le4 +.* TLS +LOCAL +DEFAULT +8 le5 +.* OBJECT +LOCAL +HIDDEN +10 _DYNAMIC .* FUNC +LOCAL +DEFAULT +UND \.__tls_get_addr .* GLOBAL DEFAULT +UND gd -.* GLOBAL DEFAULT +10 le0 +.* GLOBAL DEFAULT +9 le0 .* GLOBAL DEFAULT +UND __tls_get_addr -.* GLOBAL DEFAULT +10 ld0 -.* GLOBAL DEFAULT +10 le1 +.* GLOBAL DEFAULT +9 ld0 +.* GLOBAL DEFAULT +9 le1 .* GLOBAL DEFAULT +UND ld .* NOTYPE +GLOBAL DEFAULT +7 _start -.* TLS +GLOBAL DEFAULT +10 ld2 -.* TLS +GLOBAL DEFAULT +10 ld1 +.* TLS +GLOBAL DEFAULT +9 ld2 +.* TLS +GLOBAL DEFAULT +9 ld1 .* NOTYPE +GLOBAL DEFAULT +ABS __bss_start .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -.* TLS +GLOBAL DEFAULT +10 gd0 -.* TLS +GLOBAL DEFAULT +10 ie0 +.* TLS +GLOBAL DEFAULT +9 gd0 +.* TLS +GLOBAL DEFAULT +9 ie0 diff --git a/ld/testsuite/ld-powerpc/tlsexe32.r b/ld/testsuite/ld-powerpc/tlsexe32.r index aff95b7246c6a..ed388ef46d8b7 100644 --- a/ld/testsuite/ld-powerpc/tlsexe32.r +++ b/ld/testsuite/ld-powerpc/tlsexe32.r @@ -70,7 +70,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '\.symtab' contains 40 entries: +Symbol table '\.symtab' contains 37 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -85,9 +85,6 @@ Symbol table '\.symtab' contains 40 entries: .* SECTION LOCAL +DEFAULT +10 .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 -.* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 .* TLS +LOCAL +DEFAULT +8 gd4 .* TLS +LOCAL +DEFAULT +8 ld4 .* TLS +LOCAL +DEFAULT +8 ld5 diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d index 7ec07d2389e74..c1cb190b1cb85 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.d +++ b/ld/testsuite/ld-powerpc/tlsexetoc.d @@ -40,21 +40,22 @@ Disassembly of section \.text: .* 89 4d 90 60 lbz r10,-28576\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 90 68 stb r10,-28568\(r9\) -.* 7d 89 02 a6 mfctr r12 -.* 78 0b 1f 24 rldicr r11,r0,3,60 -.* 34 40 80 00 addic\. r2,r0,-32768 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7c 42 fe 76 sradi r2,r2,63 -.* 78 0b 17 64 rldicr r11,r0,2,61 -.* 7c 42 58 38 and r2,r2,r11 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7d 8c 12 14 add r12,r12,r2 -.* 3d 8c 00 01 addis r12,r12,1 -.* e9 6c 01 ec ld r11,492\(r12\) -.* 39 8c 01 ec addi r12,r12,492 +.* 60 00 00 00 nop +.* 00 00 00 00 .* +.* 00 01 02 18 .* +.* 7d 88 02 a6 mflr r12 +.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.* +.* 7d 68 02 a6 mflr r11 +.* e8 4b ff f0 ld r2,-16\(r11\) +.* 7d 88 03 a6 mtlr r12 +.* 7d 82 5a 14 add r12,r2,r11 +.* e9 6c 00 00 ld r11,0\(r12\) .* e8 4c 00 08 ld r2,8\(r12\) .* 7d 69 03 a6 mtctr r11 .* e9 6c 00 10 ld r11,16\(r12\) .* 4e 80 04 20 bctr +.* 60 00 00 00 nop +.* 60 00 00 00 nop +.* 60 00 00 00 nop .* 38 00 00 00 li r0,0 -.* 4b ff ff bc b .* +.* 4b ff ff c4 b .* diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.r b/ld/testsuite/ld-powerpc/tlsexetoc.r index 98eda7e5a6b2d..d92edd4a25e4b 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.r +++ b/ld/testsuite/ld-powerpc/tlsexetoc.r @@ -16,11 +16,11 @@ Section Headers: +\[ 4\] \.dynstr +.* +\[ 5\] \.rela\.dyn +.* +\[ 6\] \.rela\.plt +.* - +\[ 7\] \.text +PROGBITS .* 0+bc 0+ +AX +0 +0 +4 - +\[ 8\] \.rodata +PROGBITS .* 0+ 0+ +A +0 +0 +8 - +\[ 9\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 - +\[10\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 - +\[11\] \.dynamic +DYNAMIC .* 0+150 10 +WA +4 +0 +8 + +\[ 7\] \.text +PROGBITS .* 0+c0 0+ +AX +0 +0 +8 + +\[ 8\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 + +\[ 9\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 + +\[10\] \.dynamic +DYNAMIC .* 0+150 10 +WA +4 +0 +8 + +\[11\] \.branch_lt +PROGBITS .* 0+ 0+ +WA +0 +0 +8 +\[12\] \.got +PROGBITS .* 0+58 08 +WA +0 +0 +8 +\[13\] \.plt +.* +\[14\] \.shstrtab +.* @@ -71,7 +71,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '\.symtab' contains 41 entries: +Symbol table '\.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -87,30 +87,27 @@ Symbol table '\.symtab' contains 41 entries: .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 .* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 -.* SECTION LOCAL +DEFAULT +16 -.* TLS +LOCAL +DEFAULT +9 gd4 -.* TLS +LOCAL +DEFAULT +9 ld4 -.* TLS +LOCAL +DEFAULT +9 ld5 -.* TLS +LOCAL +DEFAULT +9 ld6 -.* TLS +LOCAL +DEFAULT +9 ie4 -.* TLS +LOCAL +DEFAULT +9 le4 -.* TLS +LOCAL +DEFAULT +9 le5 +.* TLS +LOCAL +DEFAULT +8 gd4 +.* TLS +LOCAL +DEFAULT +8 ld4 +.* TLS +LOCAL +DEFAULT +8 ld5 +.* TLS +LOCAL +DEFAULT +8 ld6 +.* TLS +LOCAL +DEFAULT +8 ie4 +.* TLS +LOCAL +DEFAULT +8 le4 +.* TLS +LOCAL +DEFAULT +8 le5 .* NOTYPE +LOCAL +DEFAULT +12 \.Lie0 -.* OBJECT +LOCAL +HIDDEN +11 _DYNAMIC +.* OBJECT +LOCAL +HIDDEN +10 _DYNAMIC .* FUNC +LOCAL +DEFAULT +UND \.__tls_get_addr .* TLS +GLOBAL DEFAULT +UND gd -.* TLS +GLOBAL DEFAULT +10 le0 +.* TLS +GLOBAL DEFAULT +9 le0 .* FUNC +GLOBAL DEFAULT +UND __tls_get_addr -.* TLS +GLOBAL DEFAULT +10 ld0 -.* TLS +GLOBAL DEFAULT +10 le1 +.* TLS +GLOBAL DEFAULT +9 ld0 +.* TLS +GLOBAL DEFAULT +9 le1 .* TLS +GLOBAL DEFAULT +UND ld .* NOTYPE +GLOBAL DEFAULT +7 _start -.* TLS +GLOBAL DEFAULT +10 ld2 -.* TLS +GLOBAL DEFAULT +10 ld1 +.* TLS +GLOBAL DEFAULT +9 ld2 +.* TLS +GLOBAL DEFAULT +9 ld1 .* NOTYPE +GLOBAL DEFAULT +ABS __bss_start .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -.* TLS +GLOBAL DEFAULT +10 gd0 -.* TLS +GLOBAL DEFAULT +10 ie0 +.* TLS +GLOBAL DEFAULT +9 gd0 +.* TLS +GLOBAL DEFAULT +9 ie0 diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d index dc4ae18256b36..0dbc84909cde4 100644 --- a/ld/testsuite/ld-powerpc/tlsso.d +++ b/ld/testsuite/ld-powerpc/tlsso.d @@ -56,21 +56,22 @@ Disassembly of section \.text: .* e9 4d 00 02 lwa r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* a9 49 00 00 lha r10,0\(r9\) -.* 7d 89 02 a6 mfctr r12 -.* 78 0b 1f 24 rldicr r11,r0,3,60 -.* 34 40 80 00 addic\. r2,r0,-32768 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7c 42 fe 76 sradi r2,r2,63 -.* 78 0b 17 64 rldicr r11,r0,2,61 -.* 7c 42 58 38 and r2,r2,r11 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7d 8c 12 14 add r12,r12,r2 -.* 3d 8c 00 01 addis r12,r12,1 -.* e9 6c 01 f4 ld r11,500\(r12\) -.* 39 8c 01 f4 addi r12,r12,500 +.* 60 00 00 00 nop +.* 00 00 00 00 .* +.* 00 01 02 20 .* +.* 7d 88 02 a6 mflr r12 +.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.* +.* 7d 68 02 a6 mflr r11 +.* e8 4b ff f0 ld r2,-16\(r11\) +.* 7d 88 03 a6 mtlr r12 +.* 7d 82 5a 14 add r12,r2,r11 +.* e9 6c 00 00 ld r11,0\(r12\) .* e8 4c 00 08 ld r2,8\(r12\) .* 7d 69 03 a6 mtctr r11 .* e9 6c 00 10 ld r11,16\(r12\) .* 4e 80 04 20 bctr +.* 60 00 00 00 nop +.* 60 00 00 00 nop +.* 60 00 00 00 nop .* 38 00 00 00 li r0,0 -.* 4b ff ff bc b .* +.* 4b ff ff c4 b .* diff --git a/ld/testsuite/ld-powerpc/tlsso.g b/ld/testsuite/ld-powerpc/tlsso.g index caef9dd503eb2..82ccc8dc9d5f0 100644 --- a/ld/testsuite/ld-powerpc/tlsso.g +++ b/ld/testsuite/ld-powerpc/tlsso.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 000187f0 00000000 00000000 .* +.* 00000000 00018780 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsso.r b/ld/testsuite/ld-powerpc/tlsso.r index 8501c6fe9c4ba..69fff679ac61e 100644 --- a/ld/testsuite/ld-powerpc/tlsso.r +++ b/ld/testsuite/ld-powerpc/tlsso.r @@ -17,8 +17,8 @@ Section Headers: +\[ 6\] \.text .* +\[ 7\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[ 8\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 - +\[ 9\] \.data\.rel\.ro .* - +\[10\] \.dynamic .* + +\[ 9\] \.dynamic .* + +\[10\] \.branch_lt .* +\[11\] \.got .* +\[12\] \.plt .* +\[13\] \.shstrtab .* @@ -49,9 +49,9 @@ Relocation section '\.rela\.dyn' at offset .* contains 16 entries: [0-9a-f ]+R_PPC64_TPREL16 +0+60 le0 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_HA +0+68 le1 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_LO +0+68 le1 \+ 0 -[0-9a-f ]+R_PPC64_TPREL16_DS +0+10668 \.tdata \+ 28 -[0-9a-f ]+R_PPC64_TPREL16_HA +0+10668 \.tdata \+ 30 -[0-9a-f ]+R_PPC64_TPREL16_LO +0+10668 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28 +[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30 [0-9a-f ]+R_PPC64_DTPMOD64 +0+ [0-9a-f ]+R_PPC64_DTPMOD64 +0+ [0-9a-f ]+R_PPC64_DTPREL64 +0+ @@ -72,8 +72,6 @@ Symbol table '\.dynsym' contains .* entries: .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +6 .* SECTION LOCAL +DEFAULT +7 -.* SECTION LOCAL +DEFAULT +8 -.* SECTION LOCAL +DEFAULT +9 .* TLS +GLOBAL DEFAULT +UND gd .* TLS +GLOBAL DEFAULT +8 le0 .* NOTYPE +GLOBAL DEFAULT +UND __tls_get_addr @@ -89,7 +87,7 @@ Symbol table '\.dynsym' contains .* entries: .* TLS +GLOBAL DEFAULT +8 gd0 .* TLS +GLOBAL DEFAULT +8 ie0 -Symbol table '\.symtab' contains 39 entries: +Symbol table '\.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -104,9 +102,6 @@ Symbol table '\.symtab' contains 39 entries: .* SECTION LOCAL +DEFAULT +10 .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 -.* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 .* TLS +LOCAL +DEFAULT +7 gd4 .* TLS +LOCAL +DEFAULT +7 ld4 .* TLS +LOCAL +DEFAULT +7 ld5 diff --git a/ld/testsuite/ld-powerpc/tlsso32.d b/ld/testsuite/ld-powerpc/tlsso32.d index 45432db33e34e..731c568b5fda3 100644 --- a/ld/testsuite/ld-powerpc/tlsso32.d +++ b/ld/testsuite/ld-powerpc/tlsso32.d @@ -42,5 +42,5 @@ Disassembly of section \.got: .* <\.got>: \.\.\. .*: 4e 80 00 21 blrl -.*: 00 01 04 38 .* +.*: 00 01 03 ec .* \.\.\. diff --git a/ld/testsuite/ld-powerpc/tlsso32.g b/ld/testsuite/ld-powerpc/tlsso32.g index 7014419a69109..028e869598a3c 100644 --- a/ld/testsuite/ld-powerpc/tlsso32.g +++ b/ld/testsuite/ld-powerpc/tlsso32.g @@ -9,5 +9,5 @@ Contents of section \.got: .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* -.* 00000000 4e800021 00010438 00000000 .* +.* 00000000 4e800021 000103ec 00000000 .* .* 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsso32.r b/ld/testsuite/ld-powerpc/tlsso32.r index c0c120c635be3..545c462e4d216 100644 --- a/ld/testsuite/ld-powerpc/tlsso32.r +++ b/ld/testsuite/ld-powerpc/tlsso32.r @@ -52,9 +52,9 @@ Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 18 entries: [0-9a-f ]+R_PPC_TPREL16 +0+30 +le0 \+ 0 [0-9a-f ]+R_PPC_TPREL16_HA +0+34 +le1 \+ 0 [0-9a-f ]+R_PPC_TPREL16_LO +0+34 +le1 \+ 0 -[0-9a-f ]+R_PPC_TPREL16 +0+1041c +\.tdata \+ 10430 -[0-9a-f ]+R_PPC_TPREL16_HA +0+1041c +\.tdata \+ 10434 -[0-9a-f ]+R_PPC_TPREL16_LO +0+1041c +\.tdata \+ 10434 +[0-9a-f ]+R_PPC_TPREL16 +0+103d0 +\.tdata \+ 103e4 +[0-9a-f ]+R_PPC_TPREL16_HA +0+103d0 +\.tdata \+ 103e8 +[0-9a-f ]+R_PPC_TPREL16_LO +0+103d0 +\.tdata \+ 103e8 [0-9a-f ]+R_PPC_DTPMOD32 +0+ [0-9a-f ]+R_PPC_DTPREL32 +0+ [0-9a-f ]+R_PPC_DTPMOD32 +0+ @@ -73,7 +73,6 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +6 .* SECTION LOCAL +DEFAULT +7 -.* SECTION LOCAL +DEFAULT +8 .* TLS +GLOBAL DEFAULT +UND gd .* TLS +GLOBAL DEFAULT +8 le0 .* NOTYPE +GLOBAL DEFAULT +UND __tls_get_addr @@ -90,7 +89,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* TLS +GLOBAL DEFAULT +8 gd0 .* TLS +GLOBAL DEFAULT +8 ie0 -Symbol table '\.symtab' contains 39 entries: +Symbol table '\.symtab' contains 36 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -104,9 +103,6 @@ Symbol table '\.symtab' contains 39 entries: .* SECTION LOCAL +DEFAULT +9 .* SECTION LOCAL +DEFAULT +10 .* SECTION LOCAL +DEFAULT +11 -.* SECTION LOCAL +DEFAULT +12 -.* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 .* TLS +LOCAL +DEFAULT +7 gd4 .* TLS +LOCAL +DEFAULT +7 ld4 .* TLS +LOCAL +DEFAULT +7 ld5 diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d index 0534b3bccc5f3..073e85da50d2f 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.d +++ b/ld/testsuite/ld-powerpc/tlstocso.d @@ -40,21 +40,22 @@ Disassembly of section \.text: .* 89 4d 00 00 lbz r10,0\(r13\) .* 3d 2d 00 00 addis r9,r13,0 .* 99 49 00 00 stb r10,0\(r9\) -.* 7d 89 02 a6 mfctr r12 -.* 78 0b 1f 24 rldicr r11,r0,3,60 -.* 34 40 80 00 addic\. r2,r0,-32768 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7c 42 fe 76 sradi r2,r2,63 -.* 78 0b 17 64 rldicr r11,r0,2,61 -.* 7c 42 58 38 and r2,r2,r11 -.* 7d 8b 60 50 subf r12,r11,r12 -.* 7d 8c 12 14 add r12,r12,r2 -.* 3d 8c 00 01 addis r12,r12,1 -.* e9 6c 01 ec ld r11,492\(r12\) -.* 39 8c 01 ec addi r12,r12,492 +.* 60 00 00 00 nop +.* 00 00 00 00 .* +.* 00 01 02 18 .* +.* 7d 88 02 a6 mflr r12 +.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.* +.* 7d 68 02 a6 mflr r11 +.* e8 4b ff f0 ld r2,-16\(r11\) +.* 7d 88 03 a6 mtlr r12 +.* 7d 82 5a 14 add r12,r2,r11 +.* e9 6c 00 00 ld r11,0\(r12\) .* e8 4c 00 08 ld r2,8\(r12\) .* 7d 69 03 a6 mtctr r11 .* e9 6c 00 10 ld r11,16\(r12\) .* 4e 80 04 20 bctr +.* 60 00 00 00 nop +.* 60 00 00 00 nop +.* 60 00 00 00 nop .* 38 00 00 00 li r0,0 -.* 4b ff ff bc b .* +.* 4b ff ff c4 b .* diff --git a/ld/testsuite/ld-powerpc/tlstocso.g b/ld/testsuite/ld-powerpc/tlstocso.g index b5d7d647cc2b0..dbe78976cc56a 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.g +++ b/ld/testsuite/ld-powerpc/tlstocso.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 00018738 00000000 00000000 .* +.* 00000000 000186c8 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlstocso.r b/ld/testsuite/ld-powerpc/tlstocso.r index d63136fa42534..ca59f4ea4bb26 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.r +++ b/ld/testsuite/ld-powerpc/tlstocso.r @@ -17,8 +17,8 @@ Section Headers: +\[ 6\] \.text .* +\[ 7\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[ 8\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 - +\[ 9\] \.data\.rel\.ro .* - +\[10\] \.dynamic .* + +\[ 9\] \.dynamic .* + +\[10\] \.branch_lt .* +\[11\] \.got .* +\[12\] \.plt .* +\[13\] \.shstrtab .* @@ -67,8 +67,6 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +6 .* SECTION LOCAL +DEFAULT +7 -.* SECTION LOCAL +DEFAULT +8 -.* SECTION LOCAL +DEFAULT +9 .* TLS +GLOBAL DEFAULT +UND gd .* TLS +GLOBAL DEFAULT +8 le0 .* NOTYPE +GLOBAL DEFAULT +UND __tls_get_addr @@ -84,7 +82,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries: .* TLS +GLOBAL DEFAULT +8 gd0 .* TLS +GLOBAL DEFAULT +8 ie0 -Symbol table '\.symtab' contains 40 entries: +Symbol table '\.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -99,9 +97,6 @@ Symbol table '\.symtab' contains 40 entries: .* SECTION LOCAL +DEFAULT +10 .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 -.* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 .* TLS +LOCAL +DEFAULT +7 gd4 .* TLS +LOCAL +DEFAULT +7 ld4 .* TLS +LOCAL +DEFAULT +7 ld5 diff --git a/ld/testsuite/ld-powerpc/vxworks1-lib.rd b/ld/testsuite/ld-powerpc/vxworks1-lib.rd index d60e70f70d5a3..40a5d55e64a12 100644 --- a/ld/testsuite/ld-powerpc/vxworks1-lib.rd +++ b/ld/testsuite/ld-powerpc/vxworks1-lib.rd @@ -6,8 +6,8 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: Relocation section '\.rela\.dyn' at offset .* contains 5 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -00090c00 00000016 R_PPC_RELATIVE * 00080c44 +00090800 00000016 R_PPC_RELATIVE * 00080c44 00080c0e .*06 R_PPC_ADDR16_HA 00000000 __GOTT_BASE__ \+ 0 00080c12 .*04 R_PPC_ADDR16_LO 00000000 __GOTT_BASE__ \+ 0 00080c16 .*03 R_PPC_ADDR16 00000000 __GOTT_INDEX__ \+ 0 -00090414 .*14 R_PPC_GLOB_DAT 00090800 x \+ 0 +00090414 .*14 R_PPC_GLOB_DAT 00090c00 x \+ 0 diff --git a/ld/testsuite/ld-powerpc/vxworks1-lib.td b/ld/testsuite/ld-powerpc/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-powerpc/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-powerpc/vxworks1.ld b/ld/testsuite/ld-powerpc/vxworks1.ld index 979d773354880..ce750b00fad88 100644 --- a/ld/testsuite/ld-powerpc/vxworks1.ld +++ b/ld/testsuite/ld-powerpc/vxworks1.ld @@ -23,8 +23,8 @@ SECTIONS .got : { *(.got.plt) *(.got) } . = ALIGN (0x400); - .bss : { *(.bss) } + .data : { *(.data) } . = ALIGN (0x400); - .data : { *(.data) } + .bss : { *(.bss) } } diff --git a/ld/testsuite/ld-s390/tlsbin.rd b/ld/testsuite/ld-s390/tlsbin.rd index 1fa3469c7634a..ce98d4fd7f2c8 100644 --- a/ld/testsuite/ld-s390/tlsbin.rd +++ b/ld/testsuite/ld-s390/tlsbin.rd @@ -76,7 +76,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE GLOBAL DEFAULT ABS _edata .* NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 68 entries: +Symbol table '.symtab' contains 65 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name .* NOTYPE LOCAL DEFAULT UND .* SECTION LOCAL DEFAULT +1 @@ -91,9 +91,6 @@ Symbol table '.symtab' contains 68 entries: .* SECTION LOCAL DEFAULT +10 .* SECTION LOCAL DEFAULT +11 .* SECTION LOCAL DEFAULT +12 -.* SECTION LOCAL DEFAULT +13 -.* SECTION LOCAL DEFAULT +14 -.* SECTION LOCAL DEFAULT +15 .* TLS +LOCAL DEFAULT +9 sl1 .* TLS +LOCAL DEFAULT +9 sl2 .* TLS +LOCAL DEFAULT +9 sl3 diff --git a/ld/testsuite/ld-s390/tlsbin_64.rd b/ld/testsuite/ld-s390/tlsbin_64.rd index 34e96495e4a57..efcb25a5e10d6 100644 --- a/ld/testsuite/ld-s390/tlsbin_64.rd +++ b/ld/testsuite/ld-s390/tlsbin_64.rd @@ -76,7 +76,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 68 entries: +Symbol table '.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND .* SECTION LOCAL +DEFAULT +1 @@ -91,9 +91,6 @@ Symbol table '.symtab' contains 68 entries: .* SECTION LOCAL +DEFAULT +10 .* SECTION LOCAL +DEFAULT +11 .* SECTION LOCAL +DEFAULT +12 -.* SECTION LOCAL +DEFAULT +13 -.* SECTION LOCAL +DEFAULT +14 -.* SECTION LOCAL +DEFAULT +15 .* TLS +LOCAL +DEFAULT +9 sl1 .* TLS +LOCAL +DEFAULT +9 sl2 .* TLS +LOCAL +DEFAULT +9 sl3 diff --git a/ld/testsuite/ld-s390/tlspic.rd b/ld/testsuite/ld-s390/tlspic.rd index c8ddd911acee3..2e7ebde0adb60 100644 --- a/ld/testsuite/ld-s390/tlspic.rd +++ b/ld/testsuite/ld-s390/tlspic.rd @@ -73,7 +73,6 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE LOCAL DEFAULT UND .* SECTION LOCAL DEFAULT +7 .* SECTION LOCAL DEFAULT +8 -.* SECTION LOCAL DEFAULT +9 .* TLS +GLOBAL DEFAULT +8 sg8 .* TLS +GLOBAL DEFAULT +8 sg3 .* TLS +GLOBAL DEFAULT +8 sg4 @@ -88,7 +87,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE GLOBAL DEFAULT ABS _edata .* NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 54 entries: +Symbol table '.symtab' contains 51 entries: +Num: +Value Size Type +Bind +Vis +Ndx Name .* NOTYPE LOCAL DEFAULT UND .* SECTION LOCAL DEFAULT +1 @@ -102,9 +101,6 @@ Symbol table '.symtab' contains 54 entries: .* SECTION LOCAL DEFAULT +9 .* SECTION LOCAL DEFAULT +10 .* SECTION LOCAL DEFAULT +11 -.* SECTION LOCAL DEFAULT +12 -.* SECTION LOCAL DEFAULT +13 -.* SECTION LOCAL DEFAULT +14 .* TLS +LOCAL DEFAULT +8 sl1 .* TLS +LOCAL DEFAULT +8 sl2 .* TLS +LOCAL DEFAULT +8 sl3 diff --git a/ld/testsuite/ld-s390/tlspic_64.rd b/ld/testsuite/ld-s390/tlspic_64.rd index ec6b5a3288f7c..3fef928055658 100644 --- a/ld/testsuite/ld-s390/tlspic_64.rd +++ b/ld/testsuite/ld-s390/tlspic_64.rd @@ -73,7 +73,6 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE LOCAL DEFAULT UND .* SECTION LOCAL DEFAULT +7 .* SECTION LOCAL DEFAULT +8 -.* SECTION LOCAL DEFAULT +9 .* TLS +GLOBAL DEFAULT +8 sg8 .* TLS +GLOBAL DEFAULT +8 sg3 .* TLS +GLOBAL DEFAULT +8 sg4 @@ -88,7 +87,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE GLOBAL DEFAULT ABS _edata .* NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 54 entries: +Symbol table '.symtab' contains .* entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE LOCAL DEFAULT UND .* SECTION LOCAL DEFAULT +1 @@ -102,9 +101,6 @@ Symbol table '.symtab' contains 54 entries: .* SECTION LOCAL DEFAULT +9 .* SECTION LOCAL DEFAULT +10 .* SECTION LOCAL DEFAULT +11 -.* SECTION LOCAL DEFAULT +12 -.* SECTION LOCAL DEFAULT +13 -.* SECTION LOCAL DEFAULT +14 .* TLS +LOCAL DEFAULT +8 sl1 .* TLS +LOCAL DEFAULT +8 sl2 .* TLS +LOCAL DEFAULT +8 sl3 diff --git a/ld/testsuite/ld-scripts/align.exp b/ld/testsuite/ld-scripts/align.exp index 43369d0b21ee5..8c97d3bcc8055 100644 --- a/ld/testsuite/ld-scripts/align.exp +++ b/ld/testsuite/ld-scripts/align.exp @@ -1,6 +1,6 @@ # Test ALIGN in a linker script. # By Nathan Sidwell, CodeSourcery LLC -# Copyright 2004, 2005 +# Copyright 2004, 2005, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -29,13 +29,20 @@ if ![ld_assemble $as $srcdir/$subdir/align.s tmpdir/align.o] { return } -# Doesn't work on PECOFF, appears to be a genuine bug -if [is_pecoff_format] { +# Doesn't work on PECOFF, appears to be a genuine bug. +# mingw on x86_64 targets need to set the image base to 0 to avoid auto image-basing. +global LDFLAGS +set saved_LDFLAGS "$LDFLAGS" +if [istarget "x86_64-*-mingw*"] then { + set LDFLAGS "$LDFLAGS --image-base 0" +} else { + if [is_pecoff_format] { global target_triplet setup_xfail $target_triplet + } } -if ![ld_simple_link $ld tmpdir/align "-T $srcdir/$subdir/align.t tmpdir/align.o"] { +if ![ld_simple_link $ld tmpdir/align "$LDFLAGS -T $srcdir/$subdir/align.t tmpdir/align.o"] { fail $testname } else { pass $testname @@ -50,3 +57,4 @@ if ![is_aout_format] { run_dump_test align2b } run_dump_test align2c +set LDFLAGS "$saved_LDFLAGS" diff --git a/ld/testsuite/ld-scripts/align2a.d b/ld/testsuite/ld-scripts/align2a.d index d45cf0e631ba2..96237dd72f758 100644 --- a/ld/testsuite/ld-scripts/align2a.d +++ b/ld/testsuite/ld-scripts/align2a.d @@ -5,8 +5,8 @@ Sections: Idx +Name +Size +VMA +LMA +File +off +Algn - +0 +\.text +[^ ]* +0+ +0+ .* - +CONTENTS, +ALLOC, +LOAD,.* CODE - +1 +\.data +[^ ]* +0+10 +0+10 .* - +CONTENTS, +ALLOC, +LOAD, +DATA +[ ]+0 +\.text +[^ ]* +0+ +0+ .* +[ ]+CONTENTS, +ALLOC, +LOAD,.* CODE +[ ]+1 +\.data +[^ ]* +0+10 +0+10 .* +[ ]+CONTENTS, +ALLOC, +LOAD, +DATA #pass diff --git a/ld/testsuite/ld-scripts/alignof.exp b/ld/testsuite/ld-scripts/alignof.exp new file mode 100644 index 0000000000000..0955e7c3f9b00 --- /dev/null +++ b/ld/testsuite/ld-scripts/alignof.exp @@ -0,0 +1,63 @@ +# Test ALIGNOF in a linker script. +# By Nathan Sidwell <nathan@codesourcery.com> +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +# Only ELF targets record section alignment. + +if ![is_elf_format] { + return +} + +set testname "ALIGNOF" + +if ![ld_assemble $as $srcdir/$subdir/alignof.s tmpdir/alignof.o] { + unresolved $testname + return +} + +if ![ld_simple_link $ld tmpdir/alignof "-T $srcdir/$subdir/alignof.t tmpdir/alignof.o"] { + fail $testname + return +} + +if ![ld_nm $nm "" tmpdir/alignof] { + unresolved $testname + return +} + +if {![info exists nm_output(alignof_text)] \ + || ![info exists nm_output(alignof_data)]} { + send_log "bad output from nm\n" + verbose "bad output from nm" + fail $testname + return +} + +if {$nm_output(alignof_text) != 64} { + send_log "alignof_text != 64\n" + verbose "alignof_text != 64" + fail $testname + return +} + +if {$nm_output(alignof_data) != 16} { + send_log "alignof_data != 16\n" + verbose "alignof_data != 16" + fail $testname + return +} + +pass $testname diff --git a/ld/testsuite/ld-scripts/alignof.s b/ld/testsuite/ld-scripts/alignof.s new file mode 100644 index 0000000000000..d440d2ee699a8 --- /dev/null +++ b/ld/testsuite/ld-scripts/alignof.s @@ -0,0 +1,9 @@ + + .text + .p2align 6 + .long 0 + + .data + .p2align 4 + .long 0 + diff --git a/ld/testsuite/ld-scripts/alignof.t b/ld/testsuite/ld-scripts/alignof.t new file mode 100644 index 0000000000000..12411121f1678 --- /dev/null +++ b/ld/testsuite/ld-scripts/alignof.t @@ -0,0 +1,15 @@ +SECTIONS { + .text : + { + tmpdir/alignof.o (.text) + } + .data : + { + tmpdir/alignof.o (.data) + LONG (ALIGNOF(.text)) + LONG (ALIGNOF(.data)) + } +} + +alignof_text = ALIGNOF(.text); +alignof_data = ALIGNOF(.data); diff --git a/ld/testsuite/ld-scripts/assert.t b/ld/testsuite/ld-scripts/assert.t index 62aee34ed348c..809ff4c3ff4fc 100644 --- a/ld/testsuite/ld-scripts/assert.t +++ b/ld/testsuite/ld-scripts/assert.t @@ -1,5 +1,10 @@ SECTIONS { - .empty : {} + .empty : { + here = !.; + ASSERT (!., "dot is not zero"); + ASSERT (here, "here is zero"); + } ASSERT (!SIZEOF(.empty), "Empty is not empty") + /DISCARD/ : { *(.reginfo) } } diff --git a/ld/testsuite/ld-scripts/cross3.t b/ld/testsuite/ld-scripts/cross3.t index 5411b9b680485..5e32bb2fca690 100644 --- a/ld/testsuite/ld-scripts/cross3.t +++ b/ld/testsuite/ld-scripts/cross3.t @@ -4,7 +4,7 @@ SECTIONS { .text : { *(.text) } .nocrossrefs : { *(.nocrossrefs) } - .data : { *(.data) } + .data : { *(.data) *(.opd) } .bss : { *(.bss) *(COMMON) } /DISCARD/ : { *(*) } } diff --git a/ld/testsuite/ld-scripts/default-script.exp b/ld/testsuite/ld-scripts/default-script.exp new file mode 100644 index 0000000000000..e496e9c0c7497 --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script.exp @@ -0,0 +1,29 @@ +# Test --default-script/-dT +# Copyright 2007 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +if { [istarget spu*-*-*] } { + set LDFLAGS "$LDFLAGS --local-store 0:0" +} + +set test_list [lsort [glob -nocomplain $srcdir/$subdir/default-script*.d]] +foreach t $test_list { + # We need to strip the ".d", but can leave the dirname. + verbose [file rootname $t] + run_dump_test [file rootname $t] +} + diff --git a/ld/testsuite/ld-scripts/default-script.s b/ld/testsuite/ld-scripts/default-script.s new file mode 100644 index 0000000000000..494fb622af416 --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script.s @@ -0,0 +1,3 @@ + .text +text: + .long 0 diff --git a/ld/testsuite/ld-scripts/default-script.t b/ld/testsuite/ld-scripts/default-script.t new file mode 100644 index 0000000000000..fc70187cd4043 --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script.t @@ -0,0 +1,7 @@ +_START = DEFINED(_START) ? _START : 0x9000000; +SECTIONS +{ + . = _START; + .text : {*(.text)} + /DISCARD/ : {*(*)} +} diff --git a/ld/testsuite/ld-scripts/default-script1.d b/ld/testsuite/ld-scripts/default-script1.d new file mode 100644 index 0000000000000..1a709baaf1922 --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script1.d @@ -0,0 +1,9 @@ +# source: default-script.s +# ld: -defsym _START=0x8000000 -T default-script.t +# nm: -n + +#... +0*8000000 . _START +#... +0*8000000 t text +#pass diff --git a/ld/testsuite/ld-scripts/default-script2.d b/ld/testsuite/ld-scripts/default-script2.d new file mode 100644 index 0000000000000..c29d733da92ed --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script2.d @@ -0,0 +1,9 @@ +# source: default-script.s +# ld: -T default-script.t -defsym _START=0x8000000 +# nm: -n + +#... +0*8000000 . _START +#... +0*9000000 t text +#pass diff --git a/ld/testsuite/ld-scripts/default-script3.d b/ld/testsuite/ld-scripts/default-script3.d new file mode 100644 index 0000000000000..b41dcbf0a3b9c --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script3.d @@ -0,0 +1,9 @@ +# source: default-script.s +# ld: -defsym _START=0x8000000 -dT default-script.t +# nm: -n + +#... +0*8000000 . _START +#... +0*8000000 t text +#pass diff --git a/ld/testsuite/ld-scripts/default-script4.d b/ld/testsuite/ld-scripts/default-script4.d new file mode 100644 index 0000000000000..ec097d633bca6 --- /dev/null +++ b/ld/testsuite/ld-scripts/default-script4.d @@ -0,0 +1,9 @@ +# source: default-script.s +# ld: --default-script default-script.t -defsym _START=0x8000000 +# nm: -n + +#... +0*8000000 . _START +#... +0*8000000 t text +#pass diff --git a/ld/testsuite/ld-scripts/defined.exp b/ld/testsuite/ld-scripts/defined.exp index dff238b1f892c..13e8d5a67a1ff 100644 --- a/ld/testsuite/ld-scripts/defined.exp +++ b/ld/testsuite/ld-scripts/defined.exp @@ -1,6 +1,6 @@ # Test DEFINED in a linker script. # By Ian Lance Taylor, Cygnus Support. -# Copyright 2001, 2003 +# Copyright 2001, 2003. 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -25,7 +25,13 @@ if ![ld_assemble $as $srcdir/$subdir/defined.s tmpdir/def.o] { return } -if ![ld_simple_link $ld tmpdir/def "-T $srcdir/$subdir/defined.t tmpdir/def.o"] { +global LDFLAGS +set saved_LDFLAGS "$LDFLAGS" +if [istarget "x86_64-*-mingw*"] then { + set LDFLAGS "$LDFLAGS --image-base 0" +} + +if ![ld_simple_link $ld tmpdir/def "$LDFLAGS -T $srcdir/$subdir/defined.t tmpdir/def.o"] { fail $testname } else { if ![ld_nm $nm "" tmpdir/def] { @@ -57,3 +63,4 @@ if ![ld_simple_link $ld tmpdir/def "-T $srcdir/$subdir/defined.t tmpdir/def.o"] set prms_id 0 run_dump_test "defined2" run_dump_test "defined3" +set LDFLAGS "$saved_LDFLAGS" diff --git a/ld/testsuite/ld-scripts/empty-address-1.d b/ld/testsuite/ld-scripts/empty-address-1.d new file mode 100644 index 0000000000000..99fac1e58b591 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-1.d @@ -0,0 +1,8 @@ +#ld: -T empty-address-1.t +#nm: -n +#... +0+0 T _start +#... +0+2000000 A __data_end +0+2000000 [ADT] __data_start +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-1.s b/ld/testsuite/ld-scripts/empty-address-1.s new file mode 100644 index 0000000000000..c5cc1a596c8ad --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-1.s @@ -0,0 +1,5 @@ + .text + .global _start +_start: + .long __data_start + .long __data_end diff --git a/ld/testsuite/ld-scripts/empty-address-1.t b/ld/testsuite/ld-scripts/empty-address-1.t new file mode 100644 index 0000000000000..57a8bed277112 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-1.t @@ -0,0 +1,11 @@ +SECTIONS +{ + .text 0x0000000: { *(.text) } + .data 0x2000000: + { + __data_start = . ; + *(.data) + } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address-2.s b/ld/testsuite/ld-scripts/empty-address-2.s new file mode 100644 index 0000000000000..79f58eacc3433 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-2.s @@ -0,0 +1,5 @@ + .text + .global _start +_start: + .long __data_end + .p2align 4 diff --git a/ld/testsuite/ld-scripts/empty-address-2a.d b/ld/testsuite/ld-scripts/empty-address-2a.d new file mode 100644 index 0000000000000..d831d5ffd1abf --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-2a.d @@ -0,0 +1,8 @@ +#source: empty-address-2.s +#ld: -Ttext 0x0000000 -Tdata 0x2000000 -T empty-address-2a.t +#nm: -n +#... +0+0 T _start +#... +0+10 A __data_end +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-2a.t b/ld/testsuite/ld-scripts/empty-address-2a.t new file mode 100644 index 0000000000000..6a40ad8b7c43d --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-2a.t @@ -0,0 +1,7 @@ +SECTIONS +{ + .text : { *(.text) } + .data : { *(.data) } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address-2b.d b/ld/testsuite/ld-scripts/empty-address-2b.d new file mode 100644 index 0000000000000..514fd68e26090 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-2b.d @@ -0,0 +1,8 @@ +#source: empty-address-2.s +#ld: -Ttext 0x0000000 -Tdata 0x2000000 -T empty-address-2b.t +#nm: -n +#... +0+0 T _start +#... +0+10 A __data_end +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-2b.t b/ld/testsuite/ld-scripts/empty-address-2b.t new file mode 100644 index 0000000000000..dcf264f4a28f1 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-2b.t @@ -0,0 +1,11 @@ +SECTIONS +{ + .text 0x0000000: { *(.text) } + .data : + { + PROVIDE (__data_start = .); + *(.data) + } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address-3.s b/ld/testsuite/ld-scripts/empty-address-3.s new file mode 100644 index 0000000000000..6b07dd434d520 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3.s @@ -0,0 +1,5 @@ + .text + .global _start +_start: + .byte 0,0,0,0,0,0,0,0 + .byte 0,0,0,0,0,0,0,0 diff --git a/ld/testsuite/ld-scripts/empty-address-3a.d b/ld/testsuite/ld-scripts/empty-address-3a.d new file mode 100644 index 0000000000000..bb12c801906bc --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3a.d @@ -0,0 +1,8 @@ +#source: empty-address-3.s +#ld: -T empty-address-3a.t +#nm: -n +#... +0+0 T _start +#... +0+10 A __data_end +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-3a.t b/ld/testsuite/ld-scripts/empty-address-3a.t new file mode 100644 index 0000000000000..2807e71f561f3 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3a.t @@ -0,0 +1,10 @@ +SECTIONS +{ + .text 0x00000000: { *(.text) } + .data ALIGN(0x1000) + (. & (0x1000 - 1)): + { + *(.data) + } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address-3b.d b/ld/testsuite/ld-scripts/empty-address-3b.d new file mode 100644 index 0000000000000..b3e2a4b5ec3aa --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3b.d @@ -0,0 +1,8 @@ +#source: empty-address-3.s +#ld: -T empty-address-3b.t +#nm: -n +#... +0+0 T _start +#... +0+10 A __data_end +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-3b.t b/ld/testsuite/ld-scripts/empty-address-3b.t new file mode 100644 index 0000000000000..4f213af519eae --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3b.t @@ -0,0 +1,11 @@ +SECTIONS +{ + .text 0x00000000: { *(.text) } + .data ALIGN(0x1000) + (. & (0x1000 - 1)): + { + PROVIDE (__data_start = .); + *(.data) + } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address-3c.d b/ld/testsuite/ld-scripts/empty-address-3c.d new file mode 100644 index 0000000000000..6001885bc712f --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3c.d @@ -0,0 +1,10 @@ +#source: empty-address-3.s +#ld: -T empty-address-3c.t +#nm: -n +#... +0+0 T _start +#... +0+1010 A __data_end +#... +0+1010 [ADT] __data_start +#pass diff --git a/ld/testsuite/ld-scripts/empty-address-3c.t b/ld/testsuite/ld-scripts/empty-address-3c.t new file mode 100644 index 0000000000000..6de519881fed7 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address-3c.t @@ -0,0 +1,11 @@ +SECTIONS +{ + .text 0x00000000: { *(.text) } + .data ALIGN(0x1000) + (. & (0x1000 - 1)): + { + __data_start = .; + *(.data) + } + __data_end = .; + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/empty-address.exp b/ld/testsuite/ld-scripts/empty-address.exp new file mode 100644 index 0000000000000..556aabae42f29 --- /dev/null +++ b/ld/testsuite/ld-scripts/empty-address.exp @@ -0,0 +1,25 @@ +# Make sure that "dot" is updated for empty sections if their addresses +# are set. +# Copyright 2006 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +run_dump_test empty-address-1 +run_dump_test empty-address-2a +run_dump_test empty-address-2b +run_dump_test empty-address-3a +run_dump_test empty-address-3b +run_dump_test empty-address-3c diff --git a/ld/testsuite/ld-scripts/empty-orphan.exp b/ld/testsuite/ld-scripts/empty-orphan.exp index fa845e03fa455..847e8f4bca6a8 100644 --- a/ld/testsuite/ld-scripts/empty-orphan.exp +++ b/ld/testsuite/ld-scripts/empty-orphan.exp @@ -1,6 +1,6 @@ # Make sure orphan sections do not lead to huge output files. # By David Heine, Tensilica, Inc. -# Copyright 2005 +# Copyright 2005, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -22,6 +22,10 @@ if ![is_elf_format] { return } +if { [istarget spu*-*-*] } { + set LDFLAGS "--local-store 0:0" +} + set testname "empty-orphan" run_dump_test empty-orphan diff --git a/ld/testsuite/ld-scripts/empty-orphan.t b/ld/testsuite/ld-scripts/empty-orphan.t index 0f717a3f3312e..b57e164aa7c7c 100644 --- a/ld/testsuite/ld-scripts/empty-orphan.t +++ b/ld/testsuite/ld-scripts/empty-orphan.t @@ -17,6 +17,6 @@ SECTIONS .text : { *(.text) } > text_mem : text_phdr .data : { *(.data) } > data_mem : data_phdr .bss : { *(.bss) } > data_mem : data_phdr - /DISCARD/ : { *(.reginfo) } + /DISCARD/ : { *(.reginfo) *(.glue*) } /* .orphan_data is an orphan */ } diff --git a/ld/testsuite/ld-scripts/expr.exp b/ld/testsuite/ld-scripts/expr.exp new file mode 100644 index 0000000000000..43ca1c6c89aac --- /dev/null +++ b/ld/testsuite/ld-scripts/expr.exp @@ -0,0 +1,20 @@ +# Test ALIGN in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2006 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +run_dump_test expr1 diff --git a/ld/testsuite/ld-scripts/expr1.d b/ld/testsuite/ld-scripts/expr1.d new file mode 100644 index 0000000000000..d96dfc1e1c1ae --- /dev/null +++ b/ld/testsuite/ld-scripts/expr1.d @@ -0,0 +1,2 @@ +# ld: -T expr1.t +# error: undefined section .* in expression diff --git a/ld/testsuite/ld-scripts/expr1.s b/ld/testsuite/ld-scripts/expr1.s new file mode 100644 index 0000000000000..ec0ce903bb105 --- /dev/null +++ b/ld/testsuite/ld-scripts/expr1.s @@ -0,0 +1,2 @@ + .word 0 + diff --git a/ld/testsuite/ld-scripts/expr1.t b/ld/testsuite/ld-scripts/expr1.t new file mode 100644 index 0000000000000..e0810ba07ed41 --- /dev/null +++ b/ld/testsuite/ld-scripts/expr1.t @@ -0,0 +1,12 @@ +ENTRY(RAM) + +MEMORY +{ + ram (rwx) : ORIGIN = 0, LENGTH = 0x1000000 +} + +SECTIONS +{ +.text : { } >ram +} +RAM = ADDR(ram); diff --git a/ld/testsuite/ld-scripts/extern.exp b/ld/testsuite/ld-scripts/extern.exp new file mode 100644 index 0000000000000..a613a757eee38 --- /dev/null +++ b/ld/testsuite/ld-scripts/extern.exp @@ -0,0 +1,68 @@ +# Test EXTERN in a linker script. +# By Nathan Sidwell, CodeSourcery LLC +# Copyright 2007 +# Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +set testname "EXTERN" + +if ![ld_assemble $as $srcdir/$subdir/extern.s tmpdir/extern.o] { + unresolved $testname + return +} + +if ![ld_simple_link $ld tmpdir/extern "-T $srcdir/$subdir/extern.t tmpdir/extern.o"] { + fail $testname +} + +if ![ld_nm $nm "" tmpdir/extern] { + unresolved $testname + return +} + +if {![info exists nm_output(sym1)] || $nm_output(sym1) != 1} { + send_log "sym1 wrong\n" + verbose "sym1 wrong" + fail $testname + return +} + +if {![info exists nm_output(sym2)] || $nm_output(sym2) != 2} { + send_log "sym1 wrong\n" + verbose "sym1 wrong" + fail $testname + return +} +if {![info exists nm_output(sym3)] || $nm_output(sym3) != 3} { + send_log "sym1 wrong\n" + verbose "sym1 wrong" + fail $testname + return +} +if {![info exists nm_output(sym4)] || $nm_output(sym4) != 4} { + send_log "sym1 wrong\n" + verbose "sym1 wrong" + fail $testname + return +} +if {![info exists nm_output(sym5)] || $nm_output(sym5) != 5} { + send_log "sym1 wrong\n" + verbose "sym1 wrong" + fail $testname + return +} + +pass $testname diff --git a/ld/testsuite/ld-scripts/extern.s b/ld/testsuite/ld-scripts/extern.s new file mode 100644 index 0000000000000..09cc1e1f7cd89 --- /dev/null +++ b/ld/testsuite/ld-scripts/extern.s @@ -0,0 +1 @@ + .text diff --git a/ld/testsuite/ld-scripts/extern.t b/ld/testsuite/ld-scripts/extern.t new file mode 100644 index 0000000000000..b2a012a322c1a --- /dev/null +++ b/ld/testsuite/ld-scripts/extern.t @@ -0,0 +1,14 @@ + +EXTERN(sym1) +EXTERN(sym2, sym3) +EXTERN(sym4 sym5) + +PROVIDE(sym1 = 1); +PROVIDE(sym2 = 2); +PROVIDE(sym3 = 3); +PROVIDE(sym4 = 4); +PROVIDE(sym5 = 5); + +SECTIONS +{ +} diff --git a/ld/testsuite/ld-scripts/overlay-size.t b/ld/testsuite/ld-scripts/overlay-size.t index f7ffbbbd74223..53f857d6966bb 100644 --- a/ld/testsuite/ld-scripts/overlay-size.t +++ b/ld/testsuite/ld-scripts/overlay-size.t @@ -54,4 +54,5 @@ SECTIONS } > DATAMEM AT > LOADMEM . = 0x8000; + /DISCARD/ : { *(.reginfo) } } diff --git a/ld/testsuite/ld-scripts/phdrs.exp b/ld/testsuite/ld-scripts/phdrs.exp index 67af6ad9b6aa5..7dca55505a07e 100644 --- a/ld/testsuite/ld-scripts/phdrs.exp +++ b/ld/testsuite/ld-scripts/phdrs.exp @@ -1,6 +1,6 @@ # Test PHDRS in a linker script. # By Ian Lance Taylor, Cygnus Support. -# Copyright 1999, 2000, 2001, 2002, 2003 +# Copyright 1999, 2000, 2001, 2002, 2003, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -26,6 +26,11 @@ if ![is_elf_format] { set testname "PHDRS" +set ldopt "" +if { [istarget spu*-*-*] } { + set ldopt "--local-store 0:0" +} + if ![ld_assemble $as $srcdir/$subdir/phdrs.s tmpdir/phdrs.o] { unresolved $testname return @@ -40,7 +45,8 @@ if [is_elf64 tmpdir/phdrs.o] { ".*Program Header:.*PHDR *off *0x00*40 *vaddr *0x00*800040 *paddr *0x00*800040.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* flags r--.*LOAD *off *0x00* *vaddr *0x00*800000 *paddr *0x00*800000.*filesz *0x00*\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags r-x.*LOAD *off *0x0\[0-9a-f\]* *vaddr *0x00*80*\[0-9a-f\]* *paddr *0x00*80*\[0-9a-f\]*.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags *rw-.*" } -if ![ld_simple_link $ld tmpdir/phdrs "-T $srcdir/$subdir/phdrs.t tmpdir/phdrs.o"] { +set ldopt "$ldopt -T $srcdir/$subdir/phdrs.t tmpdir/phdrs.o" +if ![ld_simple_link $ld tmpdir/phdrs $ldopt] { fail $testname } else { if {[which $objdump] == 0} { diff --git a/ld/testsuite/ld-scripts/phdrs2.exp b/ld/testsuite/ld-scripts/phdrs2.exp index 5fbc2fa45369d..8c41ffe317997 100644 --- a/ld/testsuite/ld-scripts/phdrs2.exp +++ b/ld/testsuite/ld-scripts/phdrs2.exp @@ -36,6 +36,11 @@ if { [istarget *-*-linux*aout*] \ set testname "PHDRS2" +set ldopt "" +if { [istarget spu*-*-*] } { + set ldopt "--local-store 0:0" +} + if ![ld_assemble $as $srcdir/$subdir/phdrs2.s tmpdir/phdrs2.o] { unresolved $testname return @@ -44,7 +49,8 @@ if ![ld_assemble $as $srcdir/$subdir/phdrs2.s tmpdir/phdrs2.o] { set phdrs_regexp \ ".*Program Header:.*LOAD *off *0x00\[0-9a-f\]* *vaddr *0x00*800000 *paddr *0x00*800000.*filesz *0x0\[0-9a-f\]* *memsz *0x0\[0-9a-f\]*.*LOAD *off *0x00\[0-9a-f\]* *vaddr *0x00*800004 *paddr *0x00*800004.*filesz *0x00*\[0-9a-f\]* *memsz *0x0\[0-9a-f\]* *flags rw.*" -if ![ld_simple_link $ld tmpdir/phdrs2 "-T $srcdir/$subdir/phdrs2.t tmpdir/phdrs2.o"] { +set ldopt "$ldopt -T $srcdir/$subdir/phdrs2.t tmpdir/phdrs2.o" +if ![ld_simple_link $ld tmpdir/phdrs2 $ldopt] { fail $testname } else { if {[which $objdump] == 0} { diff --git a/ld/testsuite/ld-scripts/provide.exp b/ld/testsuite/ld-scripts/provide.exp index 7e2c0e7e01d67..46915978acd98 100644 --- a/ld/testsuite/ld-scripts/provide.exp +++ b/ld/testsuite/ld-scripts/provide.exp @@ -1,6 +1,6 @@ # Test PROVIDE in a linker script. # By Nathan Sidwell, CodeSourcery LLC -# Copyright 2004 +# Copyright 2004, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -29,7 +29,15 @@ if {[istarget "rs6000-*-aix*"] || [is_aout_format]} { return } +global LDFLAGS +set saved_LDFLAGS "$LDFLAGS" +if [istarget "x86_64-*-mingw*"] then { + set LDFLAGS "$LDFLAGS --image-base 0" +} + run_dump_test provide-1 run_dump_test provide-2 setup_xfail *-*-* run_dump_test provide-3 + +set LDFLAGS "$saved_LDFLAGS" diff --git a/ld/testsuite/ld-scripts/script.exp b/ld/testsuite/ld-scripts/script.exp index bf7b1b1dc9168..6bb8c9cee27a8 100644 --- a/ld/testsuite/ld-scripts/script.exp +++ b/ld/testsuite/ld-scripts/script.exp @@ -1,6 +1,6 @@ # Test basic linker script functionality # By Ian Lance Taylor, Cygnus Support -# Copyright 1999, 2000, 2001, 2002, 2004 +# Copyright 1999, 2000, 2001, 2002, 2004, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -95,7 +95,7 @@ proc check_script { } { set flags "" if {[istarget "*-*-pe*"] \ || [istarget "*-*-cygwin*"] \ - || [istarget "*-*-mingw32*"] \ + || [istarget "*-*-mingw*"] \ || [istarget "*-*-winnt*"] \ || [istarget "*-*-nt"] \ || [istarget "*-*-interix*"] } then { @@ -123,5 +123,3 @@ if ![ld_simple_link $ld tmpdir/script "$flags -T $srcdir/$subdir/memory.t tmpdir } else { check_script } - - diff --git a/ld/testsuite/ld-scripts/sort.t b/ld/testsuite/ld-scripts/sort.t new file mode 100644 index 0000000000000..c53481f2f3de4 --- /dev/null +++ b/ld/testsuite/ld-scripts/sort.t @@ -0,0 +1,5 @@ +SECTIONS +{ + .text : {*(.text .text.*)} + /DISCARD/ : { *(.*) } +} diff --git a/ld/testsuite/ld-scripts/sort_b_a-1.d b/ld/testsuite/ld-scripts/sort_b_a-1.d new file mode 100644 index 0000000000000..eaa917de570ab --- /dev/null +++ b/ld/testsuite/ld-scripts/sort_b_a-1.d @@ -0,0 +1,9 @@ +#source: sort_b_a-1.s +#ld: -T sort.t --sort-section alignment +#name: --sort-section alignment +#nm: -n + +0[0-9a-f]* t text3 +0[0-9a-f]* t text1 +0[0-9a-f]* t text +0[0-9a-f]* t text2 diff --git a/ld/testsuite/ld-scripts/sort_b_a-1.s b/ld/testsuite/ld-scripts/sort_b_a-1.s new file mode 100644 index 0000000000000..87d3613f885e4 --- /dev/null +++ b/ld/testsuite/ld-scripts/sort_b_a-1.s @@ -0,0 +1,16 @@ + .section .text.2 + .p2align 3 +text2: + .long 0 + .section .text.3 + .p2align 6 +text3: + .long 0 + .section .text.1 + .p2align 5 +text1: + .long 0 + .text +text: + .p2align 4 + .long 0 diff --git a/ld/testsuite/ld-scripts/sort_b_n-1.d b/ld/testsuite/ld-scripts/sort_b_n-1.d new file mode 100644 index 0000000000000..42bdcf91aa290 --- /dev/null +++ b/ld/testsuite/ld-scripts/sort_b_n-1.d @@ -0,0 +1,9 @@ +#source: sort_b_n-1.s +#ld: -T sort.t --sort-section name +#name: --sort-section name +#nm: -n + +0[0-9a-f]* t text +0[0-9a-f]* t text1 +0[0-9a-f]* t text2 +0[0-9a-f]* t text3 diff --git a/ld/testsuite/ld-scripts/sort_b_n-1.s b/ld/testsuite/ld-scripts/sort_b_n-1.s new file mode 100644 index 0000000000000..5a49170d46b97 --- /dev/null +++ b/ld/testsuite/ld-scripts/sort_b_n-1.s @@ -0,0 +1,12 @@ + .section .text.2 +text2: + .long 0 + .section .text.3 +text3: + .long 0 + .section .text.1 +text1: + .long 0 + .text +text: + .long 0 diff --git a/ld/testsuite/ld-scripts/weak.exp b/ld/testsuite/ld-scripts/weak.exp index 925c812c7e01d..c70bbf2627c2e 100644 --- a/ld/testsuite/ld-scripts/weak.exp +++ b/ld/testsuite/ld-scripts/weak.exp @@ -1,6 +1,6 @@ # Test weak symbols. # By Ian Lance Taylor, Cygnus Solutions. -# Copyright 1999, 2000, 2002, 2004 +# Copyright 1999, 2000, 2002, 2004, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -29,6 +29,7 @@ if {! [is_elf_format] && ! [is_pecoff_format]} { # Weak symbols are broken for non-i386 PE targets. if {! [istarget i?86-*-*]} { setup_xfail *-*-pe* + setup_xfail x86_64-*-mingw* } # hppa64 and or32 are incredibly broken @@ -41,6 +42,12 @@ if {! [ld_assemble $as $srcdir/$subdir/weak1.s tmpdir/weak1.o] return } +global LDFLAGS +set saved_LDFLAGS "$LDFLAGS" +if [istarget "x86_64-*-mingw*"] then { + set LDFLAGS "$LDFLAGS --image-base 0" +} + set weak_regexp_big \ ".*Contents of section .text:.*1000 00001008 0000200c 12121212 34343434.*Contents of section .data:.*2000 00001008 0000200c 56565656 78787878.*" @@ -52,6 +59,7 @@ if {! [ld_simple_link $ld tmpdir/weak "$flags -T $srcdir/$subdir/weak.t tmpdir/w } else { if {[which $objdump] == 0} then { unresolved $testname + set LDFLAGS "$saved_LDFLAGS" return } @@ -67,3 +75,5 @@ if {! [ld_simple_link $ld tmpdir/weak "$flags -T $srcdir/$subdir/weak.t tmpdir/w fail $testname } } + +set LDFLAGS "$saved_LDFLAGS" diff --git a/ld/testsuite/ld-selective/selective.exp b/ld/testsuite/ld-selective/selective.exp index fcc2f39b06925..175aac2721225 100644 --- a/ld/testsuite/ld-selective/selective.exp +++ b/ld/testsuite/ld-selective/selective.exp @@ -41,8 +41,8 @@ if {[istarget "alpha*-*-*"] || [istarget "ia64-*-*"]} { # FIXME: Instead of table, read settings from each source-file. set seltests { {selective1 C 1.c {} {} {dropme1 dropme2} {}} - {selective2 C 2.c {} {} {foo} {mips*-*}} - {selective3 C 2.c {-u foo} {foo} {{foo 0}} {mips*-*}} + {selective2 C 2.c {} {} {foo} {}} + {selective3 C 2.c {-u foo} {foo} {{foo 0}} {}} {selective4 C++ 3.cc {} {start a A::foo() B::foo()} {A::bar()} {mips*-*}} {selective5 C++ 4.cc {} {start a A::bar()} {A::foo() B::foo()} {mips*-*}} {selective6 C++ 5.cc {} {start a A::bar()} @@ -53,6 +53,13 @@ set cflags "-w -O -ffunction-sections -fdata-sections" set cxxflags "-fvtable-gc -fno-exceptions -fno-rtti" set ldflags "--gc-sections -Bstatic" +if [istarget mips*-*] { + # MIPS16 doesn't support PIC code. + set cflags "-mno-abicalls $cflags" + # MIPS ELF uses __start by default, we override it. + set ldflags "-e _start $ldflags" +} + if [istarget sh64*-*-elf] { # This is what gcc passes to ld by default, plus switch to the # "usual" ELF _start (shelf32 normally uses just `start' for COFF diff --git a/ld/testsuite/ld-sh/arch/arch.exp b/ld/testsuite/ld-sh/arch/arch.exp index 7195f56866a9f..d938d988af9c3 100644 --- a/ld/testsuite/ld-sh/arch/arch.exp +++ b/ld/testsuite/ld-sh/arch/arch.exp @@ -76,9 +76,11 @@ proc test_arch { file1 file2 arch resultfile } { set name2 [file tail $file2] set rootname2 [file rootname $name2] + set flags [big_or_little_endian] + # This must use -r to prevent LD trying to relocate the (unrealistic) file - send_log "$LD -r -o ${rootname1}_${rootname2}.o $file1 $file2\n" - catch "exec $LD -r -o ${rootname1}_${rootname2}.o $file1 $file2" ld_output + send_log "$LD $flags -r -o ${rootname1}_${rootname2}.o $file1 $file2\n" + catch "exec $LD $flags -r -o ${rootname1}_${rootname2}.o $file1 $file2" ld_output send_log $ld_output if {[string equal $ld_output ""] == 1} then { diff --git a/ld/testsuite/ld-sh/ld-r-1.d b/ld/testsuite/ld-sh/ld-r-1.d index 7bcd479c2f556..1c629b3dbfd6b 100644 --- a/ld/testsuite/ld-sh/ld-r-1.d +++ b/ld/testsuite/ld-sh/ld-r-1.d @@ -17,7 +17,8 @@ Relocation section '\.rela\.text' at offset 0x[0-9a-f]+ contains 1 entries: 00000008 00000101 R_SH_DIR32 +00000000 +\.text +\+ 0 Hex dump of section '\.text': - 0x00000000 0000000c 00090009 00090009 .* +.* + 0x00000000 09000900 09000900 0c000000 .* Hex dump of section '\.rela\.text': - 0x00000000 00000000 00000101 00000008 .* + 0x00000000 08000000 01010000 00000000 .* diff --git a/ld/testsuite/ld-sh/rd-sh.exp b/ld/testsuite/ld-sh/rd-sh.exp index 926251baab322..993247c51f7d8 100644 --- a/ld/testsuite/ld-sh/rd-sh.exp +++ b/ld/testsuite/ld-sh/rd-sh.exp @@ -48,7 +48,11 @@ set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] foreach shtest $rd_test_list { # We need to strip the ".d", but can leave the dirname. verbose [file rootname $shtest] - run_dump_test [file rootname $shtest] + # vxworks-static.d relies on files created by sh-vxworks.exp. + # We run it there instead of here. + if { [file tail $shtest] != "vxworks1-static.d" } { + run_dump_test [file rootname $shtest] + } if [string match $srcdir/$subdir/*-dso.d $shtest] { # Copy the output of the DSO-createing test to .so file. # Notice that a DSO-creating test must preceed the tests diff --git a/ld/testsuite/ld-sh/reloc1.d b/ld/testsuite/ld-sh/reloc1.d new file mode 100644 index 0000000000000..b56cd7db8cdf7 --- /dev/null +++ b/ld/testsuite/ld-sh/reloc1.d @@ -0,0 +1,10 @@ +#source: reloc1.s +#as: -big +#ld: -shared -EB --defsym foo=0x9000 +#objdump: -sj.data +#target: sh*-*-elf sh-*-vxworks + +.*: file format elf32-sh.* + +Contents of section \.data: + .* 9123 .* diff --git a/ld/testsuite/ld-sh/reloc1.s b/ld/testsuite/ld-sh/reloc1.s new file mode 100644 index 0000000000000..e57903491f992 --- /dev/null +++ b/ld/testsuite/ld-sh/reloc1.s @@ -0,0 +1,2 @@ + .data + .word foo + 0x123 diff --git a/ld/testsuite/ld-sh/sh-vxworks.exp b/ld/testsuite/ld-sh/sh-vxworks.exp new file mode 100644 index 0000000000000..42c75e88c5fd2 --- /dev/null +++ b/ld/testsuite/ld-sh/sh-vxworks.exp @@ -0,0 +1,42 @@ +if { ![istarget "sh-*-vxworks"] } { + return +} + +set endians { "--big" "-EB" "" "--little" "-EL" "-le" } + +foreach { gas_option ld_option suffix } $endians { + set vxworkstests { + {"VxWorks shared library test 1" "-shared -Tvxworks1.ld $ld_option" + "$gas_option" {vxworks1-lib.s} + {{readelf --relocs vxworks1-lib.rd} + {objdump -dr vxworks1-lib$suffix.dd} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} + "libvxworks1.so"} + {"VxWorks executable test 1 (dynamic)" \ + "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic $ld_option" + "$gas_option" {vxworks1.s} + {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1$suffix.dd}} + "vxworks1"} + {"VxWorks executable test 2 (dynamic)" \ + "-Tvxworks1.ld -q --force-dynamic $ld_option" + "$gas_option" {vxworks2.s} + {{readelf --segments vxworks2.sd}} + "vxworks2"} + {"VxWorks executable test 2 (static)" + "-Tvxworks1.ld $ld_option" + "$gas_option" {vxworks2.s} + {{readelf --segments vxworks2-static.sd}} + "vxworks2"} + {"VxWorks shared library test 3" "-shared -Tvxworks1.ld $ld_option" + "$gas_option" {vxworks3-lib.s} + {{objdump -dr vxworks3-lib$suffix.dd}} + "libvxworks3.so"} + {"VxWorks executable test 3 (dynamic)" \ + "tmpdir/libvxworks3.so -Tvxworks1.ld -q --force-dynamic $ld_option" + "$gas_option" {vxworks3.s} + {{objdump -d vxworks3$suffix.dd}} + "vxworks3"} + } + run_ld_link_tests [subst $vxworkstests] +} +run_dump_test "vxworks1-static" diff --git a/ld/testsuite/ld-sh/sh.exp b/ld/testsuite/ld-sh/sh.exp index 5d3d5d4de77b5..5fb6762d05d6c 100644 --- a/ld/testsuite/ld-sh/sh.exp +++ b/ld/testsuite/ld-sh/sh.exp @@ -62,8 +62,10 @@ if ![ld_assemble $as "-relax $srcdir/$subdir/sh1.s" tmpdir/sh1.o] { set testsrec "SH relaxing to S-records" -if [istarget sh*-linux-*] { - # This target needs the explicit entry address. +if { [istarget sh*-linux-*] || [istarget sh-*-vxworks] } { + # On these "non-embedded" targets, the default ELF and srec start + # addresses will be SIZEOF_HEADERS bytes apart. Ensure consistency + # by feeding the ELF start address to the srec link line. catch "exec $objdump -x tmpdir/sh1 | grep start\\ address | sed s/start\\ address//" entry_addr set srec_relax_arg "-Ttext $entry_addr -relax --oformat srec tmpdir/sh1.o" } else { diff --git a/ld/testsuite/ld-sh/sh64/abi32.xd b/ld/testsuite/ld-sh/sh64/abi32.xd index 03f1b01cca03c..94b1014b8d9dc 100644 --- a/ld/testsuite/ld-sh/sh64/abi32.xd +++ b/ld/testsuite/ld-sh/sh64/abi32.xd @@ -25,24 +25,21 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) 0+10e8 l d \.data 0+ (|\.data) 0+80000 l d \.stack 0+ (|\.stack) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+10f4 l \.data 0+ foobar 0+10fc l \.data 0+ foobar2 0+1060 l \.text 0+ 0x04 plugh 0+10f8 g \.data 0+ foobar 0+10e8 g \.data 0+ baz -0+10e8 g \*ABS\* 0+ ___dtors +0+10e8 g .* 0+ ___dtors 0+105c g \.text 0+ 0x04 xyzzy 0+1100 g \*ABS\* 0+ __bss_start -0+10e8 g \*ABS\* 0+ ___ctors_end +0+10e8 g .* 0+ ___ctors_end 0+10f0 g \.data 0+ baz2 -0+10e8 g \*ABS\* 0+ ___ctors +0+10e8 g .* 0+ ___ctors 0+1000 g \.text 0+ 0x04 foo 0+1100 g \*ABS\* 0+ _edata 0+1100 g \*ABS\* 0+ _end 0+1010 g \.text 0+ 0x04 start 0+100c g \.text 0+ 0x04 bar 0+80000 g \.stack 0+ _stack -0+10e8 g \*ABS\* 0+ ___dtors_end +0+10e8 g .* 0+ ___dtors_end diff --git a/ld/testsuite/ld-sh/sh64/abi64.xd b/ld/testsuite/ld-sh/sh64/abi64.xd index fdfafb09a2230..9af5b4719a417 100644 --- a/ld/testsuite/ld-sh/sh64/abi64.xd +++ b/ld/testsuite/ld-sh/sh64/abi64.xd @@ -24,24 +24,21 @@ SYMBOL TABLE: 0000000000001000 l d \.text 0000000000000000 (|\.text) 0000000000001130 l d \.data 0000000000000000 (|\.data) 0000000000080000 l d \.stack 0000000000000000 (|\.stack) -0000000000000000 l d \*ABS\* 0000000000000000 (|\.shstrtab) -0000000000000000 l d \*ABS\* 0000000000000000 (|\.symtab) -0000000000000000 l d \*ABS\* 0000000000000000 (|\.strtab) 000000000000113c l \.data 0000000000000000 foobar 0000000000001144 l \.data 0000000000000000 foobar2 00000000000010a8 l \.text 0000000000000000 0x04 plugh 0000000000001140 g \.data 0000000000000000 foobar 0000000000001130 g \.data 0000000000000000 baz -0000000000001130 g \*ABS\* 0000000000000000 ___dtors +0000000000001130 g .* 0000000000000000 ___dtors 00000000000010a4 g \.text 0000000000000000 0x04 xyzzy 0000000000001148 g \*ABS\* 0000000000000000 __bss_start -0000000000001130 g \*ABS\* 0000000000000000 ___ctors_end +0000000000001130 g .* 0000000000000000 ___ctors_end 0000000000001138 g \.data 0000000000000000 baz2 -0000000000001130 g \*ABS\* 0000000000000000 ___ctors +0000000000001130 g .* 0000000000000000 ___ctors 0000000000001000 g \.text 0000000000000000 0x04 foo 0000000000001148 g \*ABS\* 0000000000000000 _edata 0000000000001148 g \*ABS\* 0000000000000000 _end 0000000000001018 g \.text 0000000000000000 0x04 start 0000000000001014 g \.text 0000000000000000 0x04 bar 0000000000080000 g \.stack 0000000000000000 _stack -0000000000001130 g \*ABS\* 0000000000000000 ___dtors_end +0000000000001130 g .* 0000000000000000 ___dtors_end diff --git a/ld/testsuite/ld-sh/sh64/cmpct1.xd b/ld/testsuite/ld-sh/sh64/cmpct1.xd index e1beb14f74398..41f898ed74c52 100644 --- a/ld/testsuite/ld-sh/sh64/cmpct1.xd +++ b/ld/testsuite/ld-sh/sh64/cmpct1.xd @@ -23,17 +23,14 @@ SYMBOL TABLE: 0+1000 l d \.text 0+ (|\.text) 0+1008 l d \.rodata 0+ (|\.rodata) 0+80000 l d \.stack 0+ (|\.stack) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1004 l \.text 0+ next 0+100c l \.rodata 0+ here -0+1098 g \*ABS\* 0+ ___dtors +0+1098 g .* 0+ ___dtors 0+1098 g \*ABS\* 0+ __bss_start -0+1098 g \*ABS\* 0+ ___ctors_end -0+1098 g \*ABS\* 0+ ___ctors +0+1098 g .* 0+ ___ctors_end +0+1098 g .* 0+ ___ctors 0+1098 g \*ABS\* 0+ _edata 0+1098 g \*ABS\* 0+ _end 0+1000 g \.text 0+ start 0+80000 g \.stack 0+ _stack -0+1098 g \*ABS\* 0+ ___dtors_end +0+1098 g .* 0+ ___dtors_end diff --git a/ld/testsuite/ld-sh/sh64/crange1.rd b/ld/testsuite/ld-sh/sh64/crange1.rd index 52b7bd195c168..aa080dce50b24 100644 --- a/ld/testsuite/ld-sh/sh64/crange1.rd +++ b/ld/testsuite/ld-sh/sh64/crange1.rd @@ -24,20 +24,17 @@ Symbol table '\.symtab' contains [0-9]+ entries: .*: 00001004 0 SECTION LOCAL DEFAULT 2 .*: 00080000 0 SECTION LOCAL DEFAULT 3 .*: 00000000 0 SECTION LOCAL DEFAULT 4 -.*: 00000000 0 SECTION LOCAL DEFAULT 5 -.*: 00000000 0 SECTION LOCAL DEFAULT 6 -.*: 00000000 0 SECTION LOCAL DEFAULT 7 -.*: 00001004 0 NOTYPE LOCAL DEFAULT 2 start2 -.*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS ___dtors +.*: 00001004 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 +.*: 000010a0 0 NOTYPE GLOBAL DEFAULT .* ___dtors .*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS __bss_start -.*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS ___ctors_end +.*: 000010a0 0 NOTYPE GLOBAL DEFAULT .* ___ctors_end .*: 00001004 0 NOTYPE GLOBAL DEFAULT 2 diversion2 -.*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS ___ctors +.*: 000010a0 0 NOTYPE GLOBAL DEFAULT .* ___ctors .*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS _edata .*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS _end -.*: 00001000 0 NOTYPE GLOBAL DEFAULT 1 start +.*: 00001000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start .*: 00080000 0 NOTYPE GLOBAL DEFAULT 3 _stack -.*: 000010a0 0 NOTYPE GLOBAL DEFAULT ABS ___dtors_end +.*: 000010a0 0 NOTYPE GLOBAL DEFAULT .* ___dtors_end Hex dump of section '\.init': 0x00001000 6ff0fff0 .* diff --git a/ld/testsuite/ld-sh/sh64/crange2.rd b/ld/testsuite/ld-sh/sh64/crange2.rd index dac8f9b1f56d2..96902766ef289 100644 --- a/ld/testsuite/ld-sh/sh64/crange2.rd +++ b/ld/testsuite/ld-sh/sh64/crange2.rd @@ -24,24 +24,21 @@ Symbol table '\.symtab' contains [0-9]+ entries: .*: 00001004 0 SECTION LOCAL DEFAULT 2 .*: 00080000 0 SECTION LOCAL DEFAULT 3 .*: 00000000 0 SECTION LOCAL DEFAULT 4 -.*: 00000000 0 SECTION LOCAL DEFAULT 5 -.*: 00000000 0 SECTION LOCAL DEFAULT 6 -.*: 00000000 0 SECTION LOCAL DEFAULT 7 -.*: 00001004 0 NOTYPE LOCAL DEFAULT 2 start2 -.*: 0000101c 0 NOTYPE LOCAL DEFAULT 2 sec1 -.*: 0000102c 0 NOTYPE LOCAL DEFAULT 2 sec2 +.*: 00001004 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 +.*: 0000101c 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 sec1 +.*: 0000102c 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 sec2 .*: 00001040 0 NOTYPE LOCAL DEFAULT 2 sec3 .*: 00001048 0 NOTYPE LOCAL DEFAULT 2 sec4 -.*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS ___dtors +.*: 000010e0 0 NOTYPE GLOBAL DEFAULT .* ___dtors .*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS __bss_start -.*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS ___ctors_end +.*: 000010e0 0 NOTYPE GLOBAL DEFAULT .* ___ctors_end .*: 00001004 0 NOTYPE GLOBAL DEFAULT 2 diversion2 -.*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS ___ctors +.*: 000010e0 0 NOTYPE GLOBAL DEFAULT .* ___ctors .*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS _edata .*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS _end -.*: 00001000 0 NOTYPE GLOBAL DEFAULT 1 start +.*: 00001000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start .*: 00080000 0 NOTYPE GLOBAL DEFAULT 3 _stack -.*: 000010e0 0 NOTYPE GLOBAL DEFAULT ABS ___dtors_end +.*: 000010e0 0 NOTYPE GLOBAL DEFAULT .* ___dtors_end Hex dump of section '\.text': 0x00001004 6ff0fff0 6ff0fff0 6ff0fff0 0000002a .* diff --git a/ld/testsuite/ld-sh/sh64/crange3-cmpct.rd b/ld/testsuite/ld-sh/sh64/crange3-cmpct.rd index 674a91333254f..4d9197bdb1ab9 100644 --- a/ld/testsuite/ld-sh/sh64/crange3-cmpct.rd +++ b/ld/testsuite/ld-sh/sh64/crange3-cmpct.rd @@ -41,23 +41,20 @@ Symbol table '\.symtab' contains [0-9]+ entries: .*: 00001004 0 SECTION LOCAL DEFAULT 2 .*: 00080000 0 SECTION LOCAL DEFAULT 3 .*: 00000000 0 SECTION LOCAL DEFAULT 4 -.*: 00000000 0 SECTION LOCAL DEFAULT 5 -.*: 00000000 0 SECTION LOCAL DEFAULT 6 -.*: 00000000 0 SECTION LOCAL DEFAULT 7 .*: 00001004 0 NOTYPE LOCAL DEFAULT 2 sec4 -.*: 000010a4 0 NOTYPE LOCAL DEFAULT 2 start2 +.*: 000010a4 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 .*: 000010bc 0 NOTYPE LOCAL DEFAULT 2 sec3 -.*: 000010c4 0 NOTYPE GLOBAL DEFAULT 2 diversion -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors +.*: 000010c4 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 2 diversion +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS __bss_start -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors_end .*: 000010a4 0 NOTYPE GLOBAL DEFAULT 2 diversion2 -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _edata .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _end -.*: 00001000 0 NOTYPE GLOBAL DEFAULT 1 start +.*: 00001000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start .*: 00080000 0 NOTYPE GLOBAL DEFAULT 3 _stack -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors_end Hex dump of section '\.text': 0x00001004 6ff0fff0 6ff0fff0 6ff0fff0 6ff0fff0 .* diff --git a/ld/testsuite/ld-sh/sh64/crange3-media.rd b/ld/testsuite/ld-sh/sh64/crange3-media.rd index c5f2be446709b..f1ba8e057b128 100644 --- a/ld/testsuite/ld-sh/sh64/crange3-media.rd +++ b/ld/testsuite/ld-sh/sh64/crange3-media.rd @@ -41,23 +41,20 @@ Symbol table '\.symtab' contains [0-9]+ entries: .*: 00001004 0 SECTION LOCAL DEFAULT 2 .*: 00080000 0 SECTION LOCAL DEFAULT 3 .*: 00000000 0 SECTION LOCAL DEFAULT 4 -.*: 00000000 0 SECTION LOCAL DEFAULT 5 -.*: 00000000 0 SECTION LOCAL DEFAULT 6 -.*: 00000000 0 SECTION LOCAL DEFAULT 7 .*: 00001004 0 NOTYPE LOCAL DEFAULT 2 sec4 -.*: 000010a4 0 NOTYPE LOCAL DEFAULT 2 start2 +.*: 000010a4 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 .*: 000010bc 0 NOTYPE LOCAL DEFAULT 2 sec3 -.*: 000010c4 0 NOTYPE GLOBAL DEFAULT 2 diversion -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors +.*: 000010c4 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 2 diversion +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS __bss_start -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors_end .*: 000010a4 0 NOTYPE GLOBAL DEFAULT 2 diversion2 -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _edata .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _end -.*: 00001000 0 NOTYPE GLOBAL DEFAULT 1 start +.*: 00001000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start .*: 00080000 0 NOTYPE GLOBAL DEFAULT 3 _stack -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors_end Hex dump of section '\.text': 0x00001004 6ff0fff0 6ff0fff0 6ff0fff0 6ff0fff0 .* diff --git a/ld/testsuite/ld-sh/sh64/crange3.rd b/ld/testsuite/ld-sh/sh64/crange3.rd index 034125429ce4d..7426dabe9a538 100644 --- a/ld/testsuite/ld-sh/sh64/crange3.rd +++ b/ld/testsuite/ld-sh/sh64/crange3.rd @@ -22,23 +22,20 @@ Symbol table '\.symtab' contains [0-9]+ entries: .*: 00001004 0 SECTION LOCAL DEFAULT 2 .*: 00080000 0 SECTION LOCAL DEFAULT 3 .*: 00000000 0 SECTION LOCAL DEFAULT 4 -.*: 00000000 0 SECTION LOCAL DEFAULT 5 -.*: 00000000 0 SECTION LOCAL DEFAULT 6 -.*: 00000000 0 SECTION LOCAL DEFAULT 7 .*: 00001004 0 NOTYPE LOCAL DEFAULT 2 sec4 -.*: 000010a4 0 NOTYPE LOCAL DEFAULT 2 start2 +.*: 000010a4 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 .*: 000010bc 0 NOTYPE LOCAL DEFAULT 2 sec3 -.*: 000010c4 0 NOTYPE GLOBAL DEFAULT 2 diversion -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors +.*: 000010c4 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 2 diversion +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS __bss_start -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors_end .*: 000010a4 0 NOTYPE GLOBAL DEFAULT 2 diversion2 -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___ctors +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___ctors .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _edata .*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS _end -.*: 00001000 0 NOTYPE GLOBAL DEFAULT 1 start +.*: 00001000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start .*: 00080000 0 NOTYPE GLOBAL DEFAULT 3 _stack -.*: 00001160 0 NOTYPE GLOBAL DEFAULT ABS ___dtors_end +.*: 00001160 0 NOTYPE GLOBAL DEFAULT .* ___dtors_end Hex dump of section '\.text': 0x00001004 6ff0fff0 6ff0fff0 6ff0fff0 6ff0fff0 .* diff --git a/ld/testsuite/ld-sh/sh64/crangerel1.rd b/ld/testsuite/ld-sh/sh64/crangerel1.rd index e9d096e2d9ef2..005918e4f6458 100644 --- a/ld/testsuite/ld-sh/sh64/crangerel1.rd +++ b/ld/testsuite/ld-sh/sh64/crangerel1.rd @@ -11,8 +11,8 @@ Section Headers: \[ 6\] \.cranges PROGBITS 00000000 000050 00001e 00 W 0 0 1 \[ 7\] \.rela\.cranges RELA 00000000 000274 000024 0c 9 6 4 \[ 8\] \.shstrtab STRTAB 00000000 00006e 00004d 00 0 0 1 - \[ 9\] \.symtab SYMTAB 00000000 000298 0000d0 10 10 12 4 - \[10\] \.strtab STRTAB 00000000 000368 000013 00 0 0 1 + \[ 9\] \.symtab SYMTAB 00000000 000298 000090 10 10 8 4 + \[10\] \.strtab STRTAB 00000000 000328 000013 00 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) @@ -24,7 +24,7 @@ Relocation section '\.rela\.cranges' at offset 0x[0-9a-f]+ contains 3 entries: 0*0000000a 0+0201 R_SH_DIR32 +00000000 +\.text\.mixed +\+ 0 0*00000014 0+0201 R_SH_DIR32 +00000000 +\.text\.mixed +\+ 0 -Symbol table '\.symtab' contains 13 entries: +Symbol table '\.symtab' contains 9 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 SECTION LOCAL DEFAULT 1 @@ -33,12 +33,8 @@ Symbol table '\.symtab' contains 13 entries: 4: 00000000 0 SECTION LOCAL DEFAULT 4 5: 00000000 0 SECTION LOCAL DEFAULT 5 6: 00000000 0 SECTION LOCAL DEFAULT 6 - 7: 00000000 0 SECTION LOCAL DEFAULT 7 - 8: 00000000 0 SECTION LOCAL DEFAULT 8 - 9: 00000000 0 SECTION LOCAL DEFAULT 9 - 10: 00000000 0 SECTION LOCAL DEFAULT 10 - 11: 00000000 0 NOTYPE LOCAL DEFAULT 2 start2 - 12: 00000000 0 NOTYPE GLOBAL DEFAULT 2 diversion2 + 7: 00000000 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 + 8: 00000000 0 NOTYPE GLOBAL DEFAULT 2 diversion2 Hex dump of section '\.text\.mixed': 0x00000000 6ff0fff0 6ff0fff0 6ff0fff0 0000002a .* diff --git a/ld/testsuite/ld-sh/sh64/crangerel2.rd b/ld/testsuite/ld-sh/sh64/crangerel2.rd index a5f1827dab080..f9c55d5494d4c 100644 --- a/ld/testsuite/ld-sh/sh64/crangerel2.rd +++ b/ld/testsuite/ld-sh/sh64/crangerel2.rd @@ -11,8 +11,8 @@ Section Headers: \[ 6\] \.cranges PROGBITS 00000000 000094 000046 00 W 0 0 1 \[ 7\] \.rela\.cranges RELA 00000000 0002e0 000054 0c 9 6 4 \[ 8\] \.shstrtab STRTAB 00000000 0000da 00004d 00 0 0 1 - \[ 9\] \.symtab SYMTAB 00000000 000334 000110 10 10 16 4 - \[10\] \.strtab STRTAB 00000000 000444 000027 00 0 0 1 + \[ 9\] \.symtab SYMTAB 00000000 000334 0000d0 10 10 12 4 + \[10\] \.strtab STRTAB 00000000 000404 000027 00 0 0 1 Key to Flags: W \(write\), A \(alloc\), X \(execute\), M \(merge\), S \(strings\) I \(info\), L \(link order\), G \(group\), x \(unknown\) @@ -28,7 +28,7 @@ Relocation section '\.rela\.cranges' at offset 0x[0-9a-f]+ contains 7 entries: 0*00000032 +0+0201 R_SH_DIR32 +00000000 +\.text\.mixed +\+ 0 0*0000003c +0+0201 R_SH_DIR32 +00000000 +\.text\.mixed +\+ 0 -Symbol table '\.symtab' contains 17 entries: +Symbol table '\.symtab' contains 13 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 SECTION LOCAL DEFAULT 1 @@ -37,16 +37,12 @@ Symbol table '\.symtab' contains 17 entries: 4: 00000000 0 SECTION LOCAL DEFAULT 4 5: 00000000 0 SECTION LOCAL DEFAULT 5 6: 00000000 0 SECTION LOCAL DEFAULT 6 - 7: 00000000 0 SECTION LOCAL DEFAULT 7 - 8: 00000000 0 SECTION LOCAL DEFAULT 8 - 9: 00000000 0 SECTION LOCAL DEFAULT 9 - 10: 00000000 0 SECTION LOCAL DEFAULT 10 - 11: 00000000 0 NOTYPE LOCAL DEFAULT 2 start2 - 12: 00000018 0 NOTYPE LOCAL DEFAULT 2 sec1 - 13: 00000028 0 NOTYPE LOCAL DEFAULT 2 sec2 - 14: 0000003c 0 NOTYPE LOCAL DEFAULT 2 sec3 - 15: 00000044 0 NOTYPE LOCAL DEFAULT 2 sec4 - 16: 00000000 0 NOTYPE GLOBAL DEFAULT 2 diversion2 + 7: 00000000 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 start2 + 8: 00000018 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 sec1 + 9: 00000028 0 NOTYPE LOCAL DEFAULT \[<other>: 4\] 2 sec2 + 10: 0000003c 0 NOTYPE LOCAL DEFAULT 2 sec3 + 11: 00000044 0 NOTYPE LOCAL DEFAULT 2 sec4 + 12: 00000000 0 NOTYPE GLOBAL DEFAULT 2 diversion2 Hex dump of section '\.text\.mixed': 0x00000000 6ff0fff0 6ff0fff0 6ff0fff0 0000002a .* diff --git a/ld/testsuite/ld-sh/sh64/mix1.xd b/ld/testsuite/ld-sh/sh64/mix1.xd index ae82c45c6535f..de72ce0ef96bc 100644 --- a/ld/testsuite/ld-sh/sh64/mix1.xd +++ b/ld/testsuite/ld-sh/sh64/mix1.xd @@ -27,19 +27,16 @@ SYMBOL TABLE: 0+10c8 l d \.data 0+ (|\.data) 0+80000 l d \.stack 0+ (|\.stack) 0+ l d \.cranges 0+ (|\.cranges) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1008 l \.text 0+ forw 0+1004 l \.text 0+ start2 0+1030 l \.text 0+ 0x04 mediacode2 0+1018 l \.text 0+ 0x04 mediacode -0+10c8 g \*ABS\* 0+ ___dtors +0+10c8 g .* 0+ ___dtors 0+10d8 g \*ABS\* 0+ __bss_start -0+10c8 g \*ABS\* 0+ ___ctors_end -0+10c8 g \*ABS\* 0+ ___ctors +0+10c8 g .* 0+ ___ctors_end +0+10c8 g .* 0+ ___ctors 0+10d8 g \*ABS\* 0+ _edata 0+10d8 g \*ABS\* 0+ _end 0+1000 g \.text 0+ start 0+80000 g \.stack 0+ _stack -0+10c8 g \*ABS\* 0+ ___dtors_end +0+10c8 g .* 0+ ___dtors_end diff --git a/ld/testsuite/ld-sh/sh64/mix2.xd b/ld/testsuite/ld-sh/sh64/mix2.xd index a7df4efc39ce2..5c72763c07d8f 100644 --- a/ld/testsuite/ld-sh/sh64/mix2.xd +++ b/ld/testsuite/ld-sh/sh64/mix2.xd @@ -31,9 +31,6 @@ SYMBOL TABLE: 0+10c8 l d \.data 0+ (|\.data) 0+80000 l d \.stack 0+ (|\.stack) 0+ l d \.cranges 0+ (|\.cranges) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1020 l \.text 0+ locallabel 0+1040 g \.rodata 0+ compactlabel4 0+101c g \.text 0+ 0x04 medialabel2 @@ -42,14 +39,14 @@ SYMBOL TABLE: 0+1024 g \.text 0+ compactlabel2 0+1028 g \.text 0+ compactlabel3 0+1010 g \.text 0+ 0x04 medialabel1 -0+10c8 g \*ABS\* 0+ ___dtors +0+10c8 g .* 0+ ___dtors 0+10cc g \.data 0+ medialabel4 0+10d8 g \*ABS\* 0+ __bss_start -0+10c8 g \*ABS\* 0+ ___ctors_end +0+10c8 g .* 0+ ___ctors_end 0+10d4 g \.data 0+ compactlabel5 -0+10c8 g \*ABS\* 0+ ___ctors +0+10c8 g .* 0+ ___ctors 0+10d8 g \*ABS\* 0+ _edata 0+10d8 g \*ABS\* 0+ _end 0+1000 g \.text 0+ 0x04 start 0+80000 g \.stack 0+ _stack -0+10c8 g \*ABS\* 0+ ___dtors_end +0+10c8 g .* 0+ ___dtors_end diff --git a/ld/testsuite/ld-sh/sh64/rel32.xd b/ld/testsuite/ld-sh/sh64/rel32.xd index d49b21f6a1231..65c00ac83e451 100644 --- a/ld/testsuite/ld-sh/sh64/rel32.xd +++ b/ld/testsuite/ld-sh/sh64/rel32.xd @@ -17,14 +17,9 @@ Idx Name Size VMA LMA File off Algn CONTENTS, ALLOC, LOAD, DATA SYMBOL TABLE: 0+ l d \.text 0+ (|.text) -0+ l d \*ABS\* 0+ (|.rela.text) 0+ l d \.data 0+ (|.data) -0+ l d \*ABS\* 0+ (|.rela.data) 0+ l d \.bss 0+ (|.bss) 0+ l d \.stack 0+ (|.stack) -0+ l d \*ABS\* 0+ (|.shstrtab) -0+ l d \*ABS\* 0+ (|.symtab) -0+ l d \*ABS\* 0+ (|.strtab) 0+ \*UND\* 0+ unresolved5 0+c g \.text 0+ 0x04 file1text2 0+24 g \.text 0+ 0x04 file2text1 diff --git a/ld/testsuite/ld-sh/sh64/rel64.xd b/ld/testsuite/ld-sh/sh64/rel64.xd index 86791c949827f..986e0138304b2 100644 --- a/ld/testsuite/ld-sh/sh64/rel64.xd +++ b/ld/testsuite/ld-sh/sh64/rel64.xd @@ -17,14 +17,9 @@ Idx Name Size VMA LMA File off Algn CONTENTS, ALLOC, LOAD, DATA SYMBOL TABLE: 0+ l d \.text 0+ (|.text) -0+ l d \*ABS\* 0+ (|.rela.text) 0+ l d \.data 0+ (|.data) -0+ l d \*ABS\* 0+ (|.rela.data) 0+ l d \.bss 0+ (|.bss) 0+ l d \.stack 0+ (|.stack) -0+ l d \*ABS\* 0+ (|.shstrtab) -0+ l d \*ABS\* 0+ (|.symtab) -0+ l d \*ABS\* 0+ (|.strtab) 0+ \*UND\* 0+ unresolved5 0+c g \.text 0+ 0x04 file1text2 0+24 g \.text 0+ 0x04 file2text1 diff --git a/ld/testsuite/ld-sh/sh64/reldl32.rd b/ld/testsuite/ld-sh/sh64/reldl32.rd index 59c657e3d9a68..d242c5c6a027e 100644 --- a/ld/testsuite/ld-sh/sh64/reldl32.rd +++ b/ld/testsuite/ld-sh/sh64/reldl32.rd @@ -1,311 +1,306 @@ Relocation section '\.rela\.text' at offset 0x[0-9a-f]+ contains 26 entries: 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R_SH_IMM_LOW16 +00000124 +file2data2 +\+ 0 -00000070 0+28f6 R_SH_IMM_LOW16 +00000010 +file1text3 +\+ 0 -00000074 0+86f6 R_SH_IMM_LOW16 +00000014 +file1data4 +\+ 0 -00000078 0+51f6 R_SH_IMM_LOW16 +00000000 +unresolved1 +\+ 0 -0000007c 0+69f6 R_SH_IMM_LOW16 +00000000 +unresolved3 +\+ 0 -00000080 0+8af6 R_SH_IMM_LOW16 +00000000 +unresolved8 +\+ 0 -00000084 0+37f6 R_SH_IMM_LOW16 +00000000 +unresolved9 +\+ 0 -00000088 0+62f6 R_SH_IMM_LOW16 +00000000 +file1text1 +\+ 0 -0000008c 0+50f6 R_SH_IMM_LOW16 +00000000 +file1data2 +\+ 0 -00000090 0+2df6 R_SH_IMM_LOW16 +00000000 +file1data3 +\+ 0 +00000008 0+5bf6 R_SH_IMM_LOW16 +00000004 +file1text1 +\+ 0 +0000000c 0+2df6 R_SH_IMM_LOW16 +0000000c +file1data2 +\+ 0 +00000010 0+30f6 R_SH_IMM_LOW16 +00000070 +file2text3 +\+ 0 +00000014 0+0ff6 R_SH_IMM_LOW16 +0000012c +file2data4 +\+ 0 +00000018 0+4cf6 R_SH_IMM_LOW16 +00000000 +unresolved1 +\+ 0 +0000001c 0+51f6 R_SH_IMM_LOW16 +00000000 +unresolved6 +\+ 0 +00000020 0+5df6 R_SH_IMM_LOW16 +00000000 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section '\.rela\.text' at offset 0x[0-9a-f]+ contains 28 entries: .* -0+8 0+60000000f6 R_SH_IMM_LOW16[ ]+0+4 +file1text1[ ]+\+ 0 -0+c 0+32000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 0 -0+10 0+35000000f6 R_SH_IMM_LOW16[ ]+0+78 +file2text3[ ]+\+ 0 -0+14 0+14000000f6 R_SH_IMM_LOW16[ ]+0+12c +file2data4[ ]+\+ 0 -0+18 0+51000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 -0+1c 0+56000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved6[ ]+\+ 0 -0+20 0+62000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 0 -0+24 0+62000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 18 -0+28 0+26000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text5[ ]+\+ 8 -0+2c 0+32000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 30 -0+30 0+32000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 0 -0+44 0+47000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved7[ ]+\+ 0 -0+48 0+2c000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 -0+34 0+3a000000fc R_SH_IMM_HI16[ ]+0+ +file2data4[ ]+\+ 10 -0+38 0+3a000000fa R_SH_IMM_MEDHI16[ ]+0+ +file2data4[ ]+\+ 10 -0+3c 0+3a000000f8 R_SH_IMM_MEDLOW16[ ]+0+ +file2data4[ ]+\+ 10 -0+40 0+3a000000f6 R_SH_IMM_LOW16[ ]+0+ +file2data4[ ]+\+ 10 -0+70 0+0d000000f6 R_SH_IMM_LOW16[ ]+0+6c +file2text1[ ]+\+ 0 -0+74 0+29000000f6 R_SH_IMM_LOW16[ ]+0+124 +file2data2[ ]+\+ 0 -0+78 0+28000000f6 R_SH_IMM_LOW16[ ]+0+10 +file1text3[ ]+\+ 0 -0+7c 0+86000000f6 R_SH_IMM_LOW16[ ]+0+14 +file1data4[ ]+\+ 0 -0+80 0+51000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 -0+84 0+69000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved3[ ]+\+ 0 -0+88 0+8a000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved8[ ]+\+ 0 -0+8c 0+37000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved9[ ]+\+ 0 -0+90 0+62000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 0 -0+94 0+50000000f6 R_SH_IMM_LOW16[ ]+0+ +file1data2[ ]+\+ 0 -0+98 0+2d000000f6 R_SH_IMM_LOW16[ ]+0+ +file1data3[ ]+\+ 0 +0+8 0+5b000000f6 R_SH_IMM_LOW16[ ]+0+4 +file1text1[ ]+\+ 0 +0+c 0+2d000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 0 +0+10 0+30000000f6 R_SH_IMM_LOW16[ ]+0+78 +file2text3[ ]+\+ 0 +0+14 0+0f000000f6 R_SH_IMM_LOW16[ ]+0+12c +file2data4[ ]+\+ 0 +0+18 0+4c000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 +0+1c 0+51000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved6[ ]+\+ 0 +0+20 0+5d000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 0 +0+24 0+5d000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 18 +0+28 0+21000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text5[ ]+\+ 8 +0+2c 0+2d000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 30 +0+30 0+2d000000f6 R_SH_IMM_LOW16[ ]+0+c +file1data2[ ]+\+ 0 +0+44 0+42000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved7[ ]+\+ 0 +0+48 0+27000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 +0+34 0+35000000fc R_SH_IMM_HI16[ ]+0+ +file2data4[ ]+\+ 10 +0+38 0+35000000fa R_SH_IMM_MEDHI16[ ]+0+ +file2data4[ ]+\+ 10 +0+3c 0+35000000f8 R_SH_IMM_MEDLOW16[ ]+0+ +file2data4[ ]+\+ 10 +0+40 0+35000000f6 R_SH_IMM_LOW16[ ]+0+ +file2data4[ ]+\+ 10 +0+70 0+08000000f6 R_SH_IMM_LOW16[ ]+0+6c +file2text1[ ]+\+ 0 +0+74 0+24000000f6 R_SH_IMM_LOW16[ ]+0+124 +file2data2[ ]+\+ 0 +0+78 0+23000000f6 R_SH_IMM_LOW16[ ]+0+10 +file1text3[ ]+\+ 0 +0+7c 0+81000000f6 R_SH_IMM_LOW16[ ]+0+14 +file1data4[ ]+\+ 0 +0+80 0+4c000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved1[ ]+\+ 0 +0+84 0+64000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved3[ ]+\+ 0 +0+88 0+85000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved8[ ]+\+ 0 +0+8c 0+32000000f6 R_SH_IMM_LOW16[ ]+0+ +unresolved9[ ]+\+ 0 +0+90 0+5d000000f6 R_SH_IMM_LOW16[ ]+0+ +file1text1[ ]+\+ 0 +0+94 0+4b000000f6 R_SH_IMM_LOW16[ ]+0+ +file1data2[ ]+\+ 0 +0+98 0+28000000f6 R_SH_IMM_LOW16[ ]+0+ +file1data3[ ]+\+ 0 Relocation section '\.rela\.data' at offset 0x[0-9a-f]+ contains 134 entries: .* -0+8 0+1000000001 R_SH_DIR32[ ]+0+4 +file1data1[ ]+\+ 0 -0+c 0+c00000001 R_SH_DIR32[ ]+0+c +file1text2[ ]+\+ 0 -0+10 0+7d00000001 R_SH_DIR32[ ]+0+128 +file2data3[ ]+\+ 0 -0+14 0+6c00000001 R_SH_DIR32[ ]+0+7c +file2text4[ ]+\+ 0 -0+18 0+7900000001 R_SH_DIR32[ ]+0+ +unresolved2[ ]+\+ 0 -0+1c 0+0a00000001 R_SH_DIR32[ ]+0+ +unresolved5[ ]+\+ 0 -0+20 0+7100000001 R_SH_DIR32[ ]+0+ +unresolved6[ ]+\+ 0 -0+24 0+0b00000001 R_SH_DIR32[ ]+0+ +unresolved9[ ]+\+ 0 -0+28 0+7f00000001 R_SH_DIR32[ ]+0+ +a1[ ]+\+ 0 -0+2c 0+7500000001 R_SH_DIR32[ ]+0+ +a23[ ]+\+ 0 -0+30 0+5900000001 R_SH_DIR32[ ]+0+44 +b123[ ]+\+ 0 -0+34 0+6f00000001 R_SH_DIR32[ ]+0+a4 +c3[ ]+\+ 0 -0+38 0+4100000001 R_SH_DIR32[ ]+0+b0 +c13[ ]+\+ 0 -0+3c 0+2b00000001 R_SH_DIR32[ ]+0+ +a2[ ]+\+ 0 -0+40 0+5300000001 R_SH_DIR32[ ]+0+ +a3[ ]+\+ 0 -0+44 0+2a00000001 R_SH_DIR32[ ]+0+ +a4[ ]+\+ 0 -0+48 0+6e00000001 R_SH_DIR32[ ]+0+ +a12[ ]+\+ 0 -0+4c 0+1a00000001 R_SH_DIR32[ ]+0+ +a13[ ]+\+ 0 -0+50 0+7b00000001 R_SH_DIR32[ ]+0+ +a23[ ]+\+ 0 -0+54 0+6700000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 -0+58 0+4200000001 R_SH_DIR32[ ]+0+ +b1[ ]+\+ 0 -0+5c 0+7600000001 R_SH_DIR32[ ]+0+ +b2[ ]+\+ 0 -0+60 0+3400000001 R_SH_DIR32[ ]+0+ +a3[ ]+\+ 0 -0+64 0+8400000001 R_SH_DIR32[ ]+0+ +a13[ ]+\+ 0 -0+68 0+3300000001 R_SH_DIR32[ ]+0+ +b3[ ]+\+ 0 -0+6c 0+6d00000001 R_SH_DIR32[ ]+0+ +b4[ ]+\+ 0 -0+70 0+5700000001 R_SH_DIR32[ ]+0+ +b12[ ]+\+ 0 -0+74 0+2e00000001 R_SH_DIR32[ ]+0+ +b13[ ]+\+ 0 -0+78 0+4300000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 -0+7c 0+6a00000001 R_SH_DIR32[ ]+0+24 +b3[ ]+\+ 0 -0+80 0+4000000001 R_SH_DIR32[ ]+0+30 +b13[ ]+\+ 0 -0+84 0+7400000001 R_SH_DIR32[ ]+0+34 +b23[ ]+\+ 0 -0+88 0+8200000001 R_SH_DIR32[ ]+0+ +b23[ ]+\+ 0 -0+8c 0+1100000001 R_SH_DIR32[ ]+0+ +b123[ ]+\+ 0 -0+90 0+8800000001 R_SH_DIR32[ ]+0+ +c1[ ]+\+ 0 -0+94 0+3100000001 R_SH_DIR32[ ]+0+ +c2[ ]+\+ 0 -0+98 0+6800000001 R_SH_DIR32[ ]+0+ +c3[ ]+\+ 0 -0+9c 0+3e00000001 R_SH_DIR32[ ]+0+b4 +c23[ ]+\+ 0 -0+a0 0+8300000001 R_SH_DIR32[ ]+0+b8 +c123[ ]+\+ 0 -0+a4 0+1300000001 R_SH_DIR32[ ]+0+ +c4[ ]+\+ 0 -0+a8 0+2500000001 R_SH_DIR32[ ]+0+ +c12[ ]+\+ 0 -0+ac 0+3600000001 R_SH_DIR32[ ]+0+ +c13[ ]+\+ 0 -0+b0 0+3b00000001 R_SH_DIR32[ ]+0+ +c23[ ]+\+ 0 -0+b4 0+3f00000001 R_SH_DIR32[ ]+0+ +c123[ ]+\+ 0 -0+b8 0+4d00000001 R_SH_DIR32[ ]+0+ +oa1[ ]+\+ 0 -0+bc 0+1900000001 R_SH_DIR32[ ]+0+ +ob1[ ]+\+ 0 -0+c0 0+4900000001 R_SH_DIR32[ ]+0+d8 +ob123[ ]+\+ 0 -0+c4 0+5e00000001 R_SH_DIR32[ ]+0+ +oc1[ ]+\+ 0 -0+c8 0+7e00000001 R_SH_DIR32[ ]+0+ +oa2[ ]+\+ 0 -0+cc 0+6600000001 R_SH_DIR32[ ]+0+c0 +ob2[ ]+\+ 0 -0+d0 0+7700000001 R_SH_DIR32[ ]+0+4c +oc2[ ]+\+ 0 -0+d4 0+4e00000001 R_SH_DIR32[ ]+0+ +oa12[ ]+\+ 0 -0+d8 0+2000000001 R_SH_DIR32[ ]+0+ +oa12[ ]+\+ 0 -0+dc 0+6500000001 R_SH_DIR32[ ]+0+ +ob12[ ]+\+ 0 -0+e0 0+4f00000001 R_SH_DIR32[ ]+0+cc +ob12[ ]+\+ 0 -0+e4 0+5f00000001 R_SH_DIR32[ ]+0+ +oc12[ ]+\+ 0 -0+e8 0+1700000001 R_SH_DIR32[ ]+0+58 +oc12[ ]+\+ 0 -0+ec 0+4400000001 R_SH_DIR32[ ]+0+ +oa23[ ]+\+ 0 -0+f0 0+4a00000001 R_SH_DIR32[ ]+0+ +oa13[ ]+\+ 0 -0+f4 0+0f00000001 R_SH_DIR32[ ]+0+64 +oc123[ ]+\+ 0 -0+f8 0+5a00000001 R_SH_DIR32[ ]+0+ +ob13[ ]+\+ 0 -0+fc 0+6100000001 R_SH_DIR32[ ]+0+ +oc13[ ]+\+ 0 -0+100 0+8700000001 R_SH_DIR32[ ]+0+d4 +ob23[ ]+\+ 0 -0+104 0+3000000001 R_SH_DIR32[ ]+0+60 +oc23[ ]+\+ 0 -0+108 0+5c00000001 R_SH_DIR32[ ]+0+ +oa123[ ]+\+ 0 -0+10c 0+5500000001 R_SH_DIR32[ ]+0+ +oa123[ ]+\+ 0 -0+110 0+6b00000001 R_SH_DIR32[ ]+0+ +ob123[ ]+\+ 0 -0+114 0+3800000001 R_SH_DIR32[ ]+0+ +oc123[ ]+\+ 0 -0+120 0+8100000001 R_SH_DIR32[ ]+0+11c +file2data1[ ]+\+ 0 -0+124 0+6300000001 R_SH_DIR32[ ]+0+74 +file2text2[ ]+\+ 0 -0+128 0+8500000001 R_SH_DIR32[ ]+0+10 +file1data3[ ]+\+ 0 -0+12c 0+7c00000001 R_SH_DIR32[ ]+0+14 +file1text4[ ]+\+ 0 -0+130 0+7900000001 R_SH_DIR32[ ]+0+ +unresolved2[ ]+\+ 0 -0+134 0+8000000001 R_SH_DIR32[ ]+0+ +unresolved4[ ]+\+ 0 -0+138 0+4d00000001 R_SH_DIR32[ ]+0+ +oa1[ ]+\+ 0 -0+13c 0+1c00000001 R_SH_DIR32[ ]+0+ +oa2[ ]+\+ 0 -0+140 0+7200000001 R_SH_DIR32[ ]+0+ +oa3[ ]+\+ 0 -0+144 0+2100000001 R_SH_DIR32[ ]+0+ +oa13[ ]+\+ 0 -0+148 0+1e00000001 R_SH_DIR32[ ]+0+5c +oc13[ ]+\+ 0 -0+14c 0+1500000001 R_SH_DIR32[ ]+0+ +oa4[ ]+\+ 0 -0+150 0+2000000001 R_SH_DIR32[ ]+0+ +oa12[ ]+\+ 0 -0+154 0+4a00000001 R_SH_DIR32[ ]+0+ +oa13[ ]+\+ 0 -0+158 0+3d00000001 R_SH_DIR32[ ]+0+ +oa23[ ]+\+ 0 -0+15c 0+4400000001 R_SH_DIR32[ ]+0+ +oa23[ ]+\+ 0 -0+160 0+5c00000001 R_SH_DIR32[ ]+0+ +oa123[ ]+\+ 0 -0+164 0+1b00000001 R_SH_DIR32[ ]+0+50 +oc3[ ]+\+ 0 -0+168 0+5500000001 R_SH_DIR32[ ]+0+ +oa123[ ]+\+ 0 -0+16c 0+1900000001 R_SH_DIR32[ ]+0+ +ob1[ ]+\+ 0 -0+170 0+2700000001 R_SH_DIR32[ ]+0+ +ob2[ ]+\+ 0 -0+174 0+6400000001 R_SH_DIR32[ ]+0+ +ob3[ ]+\+ 0 -0+178 0+1800000001 R_SH_DIR32[ ]+0+ +ob4[ ]+\+ 0 -0+17c 0+8900000001 R_SH_DIR32[ ]+0+ +oa3[ ]+\+ 0 -0+180 0+3000000001 R_SH_DIR32[ ]+0+60 +oc23[ ]+\+ 0 -0+184 0+0f00000001 R_SH_DIR32[ ]+0+64 +oc123[ ]+\+ 0 -0+188 0+6500000001 R_SH_DIR32[ ]+0+ +ob12[ ]+\+ 0 -0+18c 0+5a00000001 R_SH_DIR32[ ]+0+ +ob13[ ]+\+ 0 -0+190 0+5200000001 R_SH_DIR32[ ]+0+d0 +ob13[ ]+\+ 0 -0+194 0+8700000001 R_SH_DIR32[ ]+0+d4 +ob23[ ]+\+ 0 -0+198 0+5d00000001 R_SH_DIR32[ ]+0+ +ob23[ ]+\+ 0 -0+19c 0+6b00000001 R_SH_DIR32[ ]+0+ +ob123[ ]+\+ 0 -0+1a0 0+5e00000001 R_SH_DIR32[ ]+0+ +oc1[ ]+\+ 0 -0+1a4 0+1600000001 R_SH_DIR32[ ]+0+c4 +ob3[ ]+\+ 0 -0+1a8 0+4900000001 R_SH_DIR32[ ]+0+d8 +ob123[ ]+\+ 0 -0+1ac 0+0e00000001 R_SH_DIR32[ ]+0+ +oc2[ ]+\+ 0 -0+1b0 0+3c00000001 R_SH_DIR32[ ]+0+ +oc3[ ]+\+ 0 -0+1b4 0+5800000001 R_SH_DIR32[ ]+0+ +oc4[ ]+\+ 0 -0+1b8 0+5f00000001 R_SH_DIR32[ ]+0+ +oc12[ ]+\+ 0 -0+1bc 0+6100000001 R_SH_DIR32[ ]+0+ +oc13[ ]+\+ 0 -0+1c0 0+2f00000001 R_SH_DIR32[ ]+0+ +oc23[ ]+\+ 0 -0+1c4 0+3800000001 R_SH_DIR32[ ]+0+ +oc123[ ]+\+ 0 -0+1c8 0+7f00000001 R_SH_DIR32[ ]+0+ +a1[ ]+\+ 0 -0+1cc 0+1f00000001 R_SH_DIR32[ ]+0+a0 +c2[ ]+\+ 0 -0+1d0 0+7400000001 R_SH_DIR32[ ]+0+34 +b23[ ]+\+ 0 -0+1d4 0+4200000001 R_SH_DIR32[ ]+0+ +b1[ ]+\+ 0 -0+1d8 0+8800000001 R_SH_DIR32[ ]+0+ +c1[ ]+\+ 0 -0+1dc 0+6e00000001 R_SH_DIR32[ ]+0+ +a12[ ]+\+ 0 -0+1e0 0+5b00000001 R_SH_DIR32[ ]+0+ +a2[ ]+\+ 0 -0+1e4 0+1200000001 R_SH_DIR32[ ]+0+20 +b2[ ]+\+ 0 -0+1e8 0+5700000001 R_SH_DIR32[ ]+0+ +b12[ ]+\+ 0 -0+1ec 0+2500000001 R_SH_DIR32[ ]+0+ +c12[ ]+\+ 0 -0+1f0 0+5900000001 R_SH_DIR32[ ]+0+44 +b123[ ]+\+ 0 -0+1f4 0+8300000001 R_SH_DIR32[ ]+0+b8 +c123[ ]+\+ 0 -0+1f8 0+1a00000001 R_SH_DIR32[ ]+0+ +a13[ ]+\+ 0 -0+1fc 0+2e00000001 R_SH_DIR32[ ]+0+ +b13[ ]+\+ 0 -0+200 0+3e00000001 R_SH_DIR32[ ]+0+b4 +c23[ ]+\+ 0 -0+204 0+4300000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 -0+208 0+3600000001 R_SH_DIR32[ ]+0+ +c13[ ]+\+ 0 -0+20c 0+6700000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 -0+210 0+7300000001 R_SH_DIR32[ ]+0+ac +c12[ ]+\+ 0 -0+214 0+7500000001 R_SH_DIR32[ ]+0+ +a23[ ]+\+ 0 -0+218 0+1100000001 R_SH_DIR32[ ]+0+ +b123[ ]+\+ 0 -0+21c 0+4500000001 R_SH_DIR32[ ]+0+ +a12[ ]+\+ 0 -0+220 0+7800000001 R_SH_DIR32[ ]+0+2c +b12[ ]+\+ 0 -0+224 0+3f00000001 R_SH_DIR32[ ]+0+ +c123[ ]+\+ 0 +0+8 0+0b00000001 R_SH_DIR32[ ]+0+4 +file1data1[ ]+\+ 0 +0+c 0+700000001 R_SH_DIR32[ ]+0+c +file1text2[ ]+\+ 0 +0+10 0+7800000001 R_SH_DIR32[ ]+0+128 +file2data3[ ]+\+ 0 +0+14 0+6700000001 R_SH_DIR32[ ]+0+7c +file2text4[ ]+\+ 0 +0+18 0+7400000001 R_SH_DIR32[ ]+0+ +unresolved2[ ]+\+ 0 +0+1c 0+0500000001 R_SH_DIR32[ ]+0+ +unresolved5[ ]+\+ 0 +0+20 0+6c00000001 R_SH_DIR32[ ]+0+ +unresolved6[ ]+\+ 0 +0+24 0+0600000001 R_SH_DIR32[ ]+0+ +unresolved9[ ]+\+ 0 +0+28 0+7a00000001 R_SH_DIR32[ ]+0+ +a1[ ]+\+ 0 +0+2c 0+7000000001 R_SH_DIR32[ ]+0+ +a23[ ]+\+ 0 +0+30 0+5400000001 R_SH_DIR32[ ]+0+44 +b123[ ]+\+ 0 +0+34 0+6a00000001 R_SH_DIR32[ ]+0+a4 +c3[ ]+\+ 0 +0+38 0+3c00000001 R_SH_DIR32[ ]+0+b0 +c13[ ]+\+ 0 +0+3c 0+2600000001 R_SH_DIR32[ ]+0+ +a2[ ]+\+ 0 +0+40 0+4e00000001 R_SH_DIR32[ ]+0+ +a3[ ]+\+ 0 +0+44 0+2500000001 R_SH_DIR32[ ]+0+ +a4[ ]+\+ 0 +0+48 0+6900000001 R_SH_DIR32[ ]+0+ +a12[ ]+\+ 0 +0+4c 0+1500000001 R_SH_DIR32[ ]+0+ +a13[ ]+\+ 0 +0+50 0+7600000001 R_SH_DIR32[ ]+0+ +a23[ ]+\+ 0 +0+54 0+6200000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 +0+58 0+3d00000001 R_SH_DIR32[ ]+0+ +b1[ ]+\+ 0 +0+5c 0+7100000001 R_SH_DIR32[ ]+0+ +b2[ ]+\+ 0 +0+60 0+2f00000001 R_SH_DIR32[ ]+0+ +a3[ ]+\+ 0 +0+64 0+7f00000001 R_SH_DIR32[ ]+0+ +a13[ ]+\+ 0 +0+68 0+2e00000001 R_SH_DIR32[ ]+0+ +b3[ ]+\+ 0 +0+6c 0+6800000001 R_SH_DIR32[ ]+0+ +b4[ ]+\+ 0 +0+70 0+5200000001 R_SH_DIR32[ ]+0+ +b12[ ]+\+ 0 +0+74 0+2900000001 R_SH_DIR32[ ]+0+ +b13[ ]+\+ 0 +0+78 0+3e00000001 R_SH_DIR32[ ]+0+ +a123[ ]+\+ 0 +0+7c 0+6500000001 R_SH_DIR32[ ]+0+24 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\[<other>: 4\] 1 oc1 + 108: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND unresolved6 + 109: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND oa3 + 110: 00000000000000ac 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 c12 + 111: 0000000000000034 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 b23 + 112: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND a23 + 113: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND b2 + 114: 000000000000004c 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 oc2 + 115: 000000000000002c 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 b12 + 116: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND unresolved2 + 117: 0000000000000000 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 start + 118: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND a23 + 119: 0000000000000014 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 file1text4 + 120: 0000000000000128 0 NOTYPE GLOBAL DEFAULT 3 file2data3 + 121: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND oa2 + 122: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND a1 + 123: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND unresolved4 + 124: 000000000000011c 0 NOTYPE GLOBAL DEFAULT 3 file2data1 + 125: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND b23 + 126: 00000000000000b8 0 NOTYPE GLOBAL DEFAULT \[<other>: 4\] 1 c123 + 127: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND a13 + 128: 0000000000000010 0 NOTYPE GLOBAL DEFAULT 3 file1data3 + 129: 0000000000000014 0 NOTYPE GLOBAL DEFAULT 3 file1data4 + 130: 00000000000000d4 0 NOTYPE GLOBAL DEFAULT \[<other>: 4] 1 ob23 + 131: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND c1 + 132: 0000000000000000 0 NOTYPE GLOBAL DEFAULT UND oa3 + 133: 0000000000000000 0 <processor specific>: 13 GLOBAL DEFAULT UND unresolved8 Hex dump of section '\.text': 0x00000000 6ff0fff0 6ff0fff0 cc0000a0 cc000140 .* diff --git a/ld/testsuite/ld-sh/sh64/shdl32.xd b/ld/testsuite/ld-sh/sh64/shdl32.xd index c0b1f3479caa3..56773e3cfb5f7 100644 --- a/ld/testsuite/ld-sh/sh64/shdl32.xd +++ b/ld/testsuite/ld-sh/sh64/shdl32.xd @@ -27,9 +27,6 @@ SYMBOL TABLE: 0+1204 l d \.rodata 0+ (|\.rodata) 0+13c8 l d \.data 0+ (|\.data) 0+80000 l d \.stack 0+ (|\.stack) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1150 l \.text 0+ 0x04 part2 0+13f8 g \.data 0+ dfoo_otherboth2 0+1178 g \.text 0+ 0x04 bar_otherwithout @@ -76,7 +73,7 @@ SYMBOL TABLE: 0+14e0 g \.data 0+ dbar_mixboth2 0+14ec g \.data 0+ dbaz 0+1524 g \.data 0+ dbaz_mix -0+13c8 g \*ABS\* 0+ ___dtors +0+13c8 g .* 0+ ___dtors 0+141c g \.data 0+ dfoo_mixboth2 0+119c g \.text 0+ 0x04 bazboth 0+13f0 g \.data 0+ dfoo_other @@ -92,13 +89,13 @@ SYMBOL TABLE: 0+14f4 g \.data 0+ dbazboth 0+1038 g \.text 0+ 0x04 foo_otherwithout 0+1190 g \.text 0+ 0x04 bar_mixwithout2 -0+13c8 g \*ABS\* 0+ ___ctors_end +0+13c8 g .* 0+ ___ctors_end 0+1064 g \.text 0+ 0x04 foo_mixwithout 0+116c g \.text 0+ 0x04 bar_other 0+13d0 g \.data 0+ dfooboth 0+1034 g \.text 0+ 0x04 foo_otherboth2 0+1400 g \.data 0+ dfoo_mix -0+13c8 g \*ABS\* 0+ ___ctors +0+13c8 g .* 0+ ___ctors 0+14d4 g \.data 0+ dbar_mix 0+100c g \.text 0+ 0x04 fooboth 0+1170 g \.text 0+ 0x04 bar_otherboth @@ -121,6 +118,6 @@ SYMBOL TABLE: 0+1160 g \.text 0+ 0x04 barboth 0+14b8 g \.data 0+ dbarboth 0+1188 g \.text 0+ 0x04 bar_mixboth2 -0+13c8 g \*ABS\* 0+ ___dtors_end +0+13c8 g .* 0+ ___dtors_end 0+151c g \.data 0+ dbaz_otherboth2 0+1500 g \.data 0+ dbazboth2 diff --git a/ld/testsuite/ld-sh/sh64/shdl64.xd b/ld/testsuite/ld-sh/sh64/shdl64.xd index 8a7b2364fcc62..142ca968cd049 100644 --- a/ld/testsuite/ld-sh/sh64/shdl64.xd +++ b/ld/testsuite/ld-sh/sh64/shdl64.xd @@ -27,9 +27,6 @@ SYMBOL TABLE: 0+1204 l d \.rodata 0+ (|\.rodata) 0+13c8 l d \.data 0+ (|\.data) 0+80000 l d \.stack 0+ (|\.stack) -0+ l d \*ABS\* 0+ (|\.shstrtab) -0+ l d \*ABS\* 0+ (|\.symtab) -0+ l d \*ABS\* 0+ (|\.strtab) 0+1150 l \.text 0+ 0x04 part2 0+13f8 g \.data 0+ dfoo_otherboth2 0+1178 g \.text 0+ 0x04 bar_otherwithout @@ -76,7 +73,7 @@ SYMBOL TABLE: 0+14e0 g \.data 0+ dbar_mixboth2 0+14ec g \.data 0+ dbaz 0+1524 g \.data 0+ dbaz_mix -0+13c8 g \*ABS\* 0+ ___dtors +0+13c8 g .* 0+ ___dtors 0+141c g \.data 0+ dfoo_mixboth2 0+119c g \.text 0+ 0x04 bazboth 0+13f0 g \.data 0+ dfoo_other @@ -92,13 +89,13 @@ SYMBOL TABLE: 0+14f4 g \.data 0+ dbazboth 0+1038 g \.text 0+ 0x04 foo_otherwithout 0+1190 g \.text 0+ 0x04 bar_mixwithout2 -0+13c8 g \*ABS\* 0+ ___ctors_end +0+13c8 g .* 0+ ___ctors_end 0+1064 g \.text 0+ 0x04 foo_mixwithout 0+116c g \.text 0+ 0x04 bar_other 0+13d0 g \.data 0+ dfooboth 0+1034 g \.text 0+ 0x04 foo_otherboth2 0+1400 g \.data 0+ dfoo_mix -0+13c8 g \*ABS\* 0+ ___ctors +0+13c8 g .* 0+ ___ctors 0+14d4 g \.data 0+ dbar_mix 0+100c g \.text 0+ 0x04 fooboth 0+1170 g \.text 0+ 0x04 bar_otherboth @@ -121,6 +118,6 @@ SYMBOL TABLE: 0+1160 g \.text 0+ 0x04 barboth 0+14b8 g \.data 0+ dbarboth 0+1188 g \.text 0+ 0x04 bar_mixboth2 -0+13c8 g \*ABS\* 0+ ___dtors_end +0+13c8 g .* 0+ ___dtors_end 0+151c g \.data 0+ dbaz_otherboth2 0+1500 g \.data 0+ dbazboth2 diff --git a/ld/testsuite/ld-sh/shared-1.d b/ld/testsuite/ld-sh/shared-1.d index fbc4d6e0539da..940195ddc1401 100644 --- a/ld/testsuite/ld-sh/shared-1.d +++ b/ld/testsuite/ld-sh/shared-1.d @@ -13,10 +13,11 @@ Relocation section '\.rela\.text' at offset 0x[0-9a-f]+ contains 1 entries: .* -000001b0 000000a5 R_SH_RELATIVE +000001b4 +0000019c +[0-9a-f]+ R_SH_RELATIVE +000001a0 Hex dump of section '\.rela\.text': - 0x0000019c 000001b4 000000a5 000001b0 .* + 0x00000188 9c010000 a5000000 a0010000 .* Hex dump of section '\.text': - 0x000001a8 000001b4 00090009 00090009 .* +.* + 0x00000194 09000900 09000900 a0010000 .* diff --git a/ld/testsuite/ld-sh/tlsbin-1.d b/ld/testsuite/ld-sh/tlsbin-1.d index e3f48341b7050..9f5a086385ebe 100644 --- a/ld/testsuite/ld-sh/tlsbin-1.d +++ b/ld/testsuite/ld-sh/tlsbin-1.d @@ -14,14 +14,14 @@ Disassembly of section \.text: 401002: e6 2f mov\.l r14,@-r15 401004: 22 4f sts\.l pr,@-r15 401006: 5f c7 mova 401184 <fn2\+0x184>,r0 - 401008: 5e dc mov\.l 401184 <fn2\+0x184>,r12 ! 0x[0-9a-f]+ + 401008: 5e dc mov\.l 401184 <fn2\+0x184>,r12 ! [0-9a-f]+ 40100a: 0c 3c add r0,r12 40100c: f3 6e mov r15,r14 40100e: 09 00 nop 401010: 09 00 nop 401012: 09 00 nop 401014: 09 00 nop - 401016: 04 d0 mov\.l 401028 <fn2\+0x28>,r0 ! 0x1c .* + 401016: 04 d0 mov\.l 401028 <fn2\+0x28>,r0 ! 1c .* 401018: 12 04 stc gbr,r4 40101a: ce 00 mov\.l @\(r0,r12\),r0 40101c: 4c 30 add r4,r0 @@ -38,7 +38,7 @@ Disassembly of section \.text: 401032: 09 00 nop 401034: 09 00 nop 401036: 09 00 nop - 401038: 03 d0 mov\.l 401048 <fn2\+0x48>,r0 ! 0x14 .* + 401038: 03 d0 mov\.l 401048 <fn2\+0x48>,r0 ! 14 .* 40103a: 12 04 stc gbr,r4 40103c: ce 00 mov\.l @\(r0,r12\),r0 40103e: 4c 30 add r4,r0 @@ -54,7 +54,7 @@ Disassembly of section \.text: 401052: 09 00 nop 401054: 09 00 nop 401056: 09 00 nop - 401058: 03 d4 mov\.l 401068 <fn2\+0x68>,r4 ! 0x8 .* + 401058: 03 d4 mov\.l 401068 <fn2\+0x68>,r4 ! 8 .* 40105a: 12 00 stc gbr,r0 40105c: 4c 30 add r4,r0 40105e: 09 00 nop @@ -70,7 +70,7 @@ Disassembly of section \.text: 401072: 09 00 nop 401074: 09 00 nop 401076: 09 00 nop - 401078: 03 d4 mov\.l 401088 <fn2\+0x88>,r4 ! 0x10 .* + 401078: 03 d4 mov\.l 401088 <fn2\+0x88>,r4 ! 10 .* 40107a: 12 00 stc gbr,r0 40107c: 4c 30 add r4,r0 40107e: 09 00 nop @@ -86,7 +86,7 @@ Disassembly of section \.text: 401092: 09 00 nop 401094: 09 00 nop 401096: 09 00 nop - 401098: 03 d4 mov\.l 4010a8 <fn2\+0xa8>,r4 ! 0x18 .* + 401098: 03 d4 mov\.l 4010a8 <fn2\+0xa8>,r4 ! 18 .* 40109a: 12 00 stc gbr,r0 40109c: 4c 30 add r4,r0 40109e: 09 00 nop @@ -116,11 +116,11 @@ Disassembly of section \.text: 4010ce: [0-9a-f]+ [0-9a-f]+ .*[ ]*.* 4010d0: 09 00 nop 4010d2: 09 00 nop - 4010d4: 2c d1 mov\.l 401188 <fn2\+0x188>,r1 ! 0x10 .* + 4010d4: 2c d1 mov\.l 401188 <fn2\+0x188>,r1 ! 10 .* 4010d6: 0c 31 add r0,r1 4010d8: 09 00 nop 4010da: 09 00 nop - 4010dc: 2b d2 mov\.l 40118c <fn2\+0x18c>,r2 ! 0x14 .* + 4010dc: 2b d2 mov\.l 40118c <fn2\+0x18c>,r2 ! 14 .* 4010de: 0c 32 add r0,r2 4010e0: 09 00 nop 4010e2: 09 00 nop @@ -140,17 +140,17 @@ Disassembly of section \.text: 4010fe: [0-9a-f]+ [0-9a-f]+ .*[ ]*.* 401100: 09 00 nop 401102: 09 00 nop - 401104: 22 d1 mov\.l 401190 <fn2\+0x190>,r1 ! 0x18 .* + 401104: 22 d1 mov\.l 401190 <fn2\+0x190>,r1 ! 18 .* 401106: 0c 31 add r0,r1 401108: 09 00 nop 40110a: 09 00 nop - 40110c: 21 d2 mov\.l 401194 <fn2\+0x194>,r2 ! 0x1c .* + 40110c: 21 d2 mov\.l 401194 <fn2\+0x194>,r2 ! 1c .* 40110e: 0c 32 add r0,r2 401110: 09 00 nop 401112: 09 00 nop 401114: 09 00 nop 401116: 09 00 nop - 401118: 02 d0 mov\.l 401124 <fn2\+0x124>,r0 ! 0x14 .* + 401118: 02 d0 mov\.l 401124 <fn2\+0x124>,r0 ! 14 .* 40111a: 12 01 stc gbr,r1 40111c: ce 00 mov\.l @\(r0,r12\),r0 40111e: 03 a0 bra 401128 <fn2\+0x128> @@ -162,7 +162,7 @@ Disassembly of section \.text: 40112a: 09 00 nop 40112c: 09 00 nop 40112e: 09 00 nop - 401130: 02 d0 mov\.l 40113c <fn2\+0x13c>,r0 ! 0x18 .* + 401130: 02 d0 mov\.l 40113c <fn2\+0x13c>,r0 ! 18 .* 401132: 12 01 stc gbr,r1 401134: ce 00 mov\.l @\(r0,r12\),r0 401136: 03 a0 bra 401140 <fn2\+0x140> @@ -174,7 +174,7 @@ Disassembly of section \.text: 401142: 09 00 nop 401144: 09 00 nop 401146: 09 00 nop - 401148: 02 d0 mov\.l 401154 <fn2\+0x154>,r0 ! 0x8 .* + 401148: 02 d0 mov\.l 401154 <fn2\+0x154>,r0 ! 8 .* 40114a: 12 01 stc gbr,r1 40114c: 09 00 nop 40114e: 03 a0 bra 401158 <fn2\+0x158> @@ -186,7 +186,7 @@ Disassembly of section \.text: 40115a: 09 00 nop 40115c: 09 00 nop 40115e: 09 00 nop - 401160: 02 d0 mov\.l 40116c <fn2\+0x16c>,r0 ! 0x18 .* + 401160: 02 d0 mov\.l 40116c <fn2\+0x16c>,r0 ! 18 .* 401162: 12 01 stc gbr,r1 401164: 09 00 nop 401166: 03 a0 bra 401170 <fn2\+0x170> @@ -220,13 +220,13 @@ Disassembly of section \.text: 402002: e6 2f mov\.l r14,@-r15 402004: f3 6e mov r15,r14 402006: 27 c7 mova 4020a4 <_start\+0xa4>,r0 - 402008: 26 dc mov\.l 4020a4 <_start\+0xa4>,r12 ! 0x[0-9a-f]+ + 402008: 26 dc mov\.l 4020a4 <_start\+0xa4>,r12 ! [0-9a-f]+ 40200a: 0c 3c add r0,r12 40200c: 09 00 nop 40200e: 09 00 nop 402010: 09 00 nop 402012: 09 00 nop - 402014: 02 d0 mov\.l 402020 <_start\+0x20>,r0 ! 0x10 .* + 402014: 02 d0 mov\.l 402020 <_start\+0x20>,r0 ! 10 .* 402016: 12 01 stc gbr,r1 402018: ce 00 mov\.l @\(r0,r12\),r0 40201a: 03 a0 bra 402024 <_start\+0x24> @@ -238,7 +238,7 @@ Disassembly of section \.text: 402026: 09 00 nop 402028: 09 00 nop 40202a: 09 00 nop - 40202c: 02 d0 mov\.l 402038 <_start\+0x38>,r0 ! 0x20 .* + 40202c: 02 d0 mov\.l 402038 <_start\+0x38>,r0 ! 20 .* 40202e: 12 01 stc gbr,r1 402030: 09 00 nop 402032: 03 a0 bra 40203c <_start\+0x3c> @@ -250,7 +250,7 @@ Disassembly of section \.text: 40203e: 09 00 nop 402040: 09 00 nop 402042: 09 00 nop - 402044: 02 d0 mov\.l 402050 <_start\+0x50>,r0 ! 0x2c + 402044: 02 d0 mov\.l 402050 <_start\+0x50>,r0 ! 2c 402046: 12 01 stc gbr,r1 402048: 09 00 nop 40204a: 03 a0 bra 402054 <_start\+0x54> @@ -262,7 +262,7 @@ Disassembly of section \.text: 402056: 09 00 nop 402058: 09 00 nop 40205a: 09 00 nop - 40205c: 02 d0 mov\.l 402068 <_start\+0x68>,r0 ! 0x1c .* + 40205c: 02 d0 mov\.l 402068 <_start\+0x68>,r0 ! 1c .* 40205e: 12 01 stc gbr,r1 402060: 09 00 nop 402062: 03 a0 bra 40206c <_start\+0x6c> @@ -275,21 +275,21 @@ Disassembly of section \.text: 402070: 09 00 nop 402072: 09 00 nop 402074: 12 01 stc gbr,r1 - 402076: 0c d0 mov\.l 4020a8 <_start\+0xa8>,r0 ! 0x8 .* + 402076: 0c d0 mov\.l 4020a8 <_start\+0xa8>,r0 ! 8 .* 402078: 1c 30 add r1,r0 40207a: 09 00 nop 40207c: 09 00 nop 40207e: 09 00 nop 402080: 09 00 nop 402082: 12 01 stc gbr,r1 - 402084: 09 d0 mov\.l 4020ac <_start\+0xac>,r0 ! 0x28 + 402084: 09 d0 mov\.l 4020ac <_start\+0xac>,r0 ! 28 402086: 1c 30 add r1,r0 402088: 09 00 nop 40208a: 09 00 nop 40208c: 09 00 nop 40208e: 09 00 nop 402090: 12 01 stc gbr,r1 - 402092: 07 d0 mov\.l 4020b0 <_start\+0xb0>,r0 ! 0x18 .* + 402092: 07 d0 mov\.l 4020b0 <_start\+0xb0>,r0 ! 18 .* 402094: 1c 30 add r1,r0 402096: 09 00 nop 402098: 09 00 nop diff --git a/ld/testsuite/ld-sh/tlspic-1.d b/ld/testsuite/ld-sh/tlspic-1.d index 5310cd0fe30bd..6638eda59556c 100644 --- a/ld/testsuite/ld-sh/tlspic-1.d +++ b/ld/testsuite/ld-sh/tlspic-1.d @@ -14,16 +14,16 @@ Disassembly of section \.text: [0-9a-f]+: e6 2f mov\.l r14,@-r15 [0-9a-f]+: 22 4f sts\.l pr,@-r15 [0-9a-f]+: 83 c7 mova [0-9a-f]+ <fn1\+0x214>,r0 - [0-9a-f]+: 82 dc mov\.l [0-9a-f]+ <fn1\+0x214>,r12 ! 0x[0-9a-f]+ + [0-9a-f]+: 82 dc mov\.l [0-9a-f]+ <fn1\+0x214>,r12 ! [0-9a-f]+ [0-9a-f]+: 0c 3c add r0,r12 [0-9a-f]+: f3 6e mov r15,r14 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 04 d4 mov\.l [0-9a-f]+ <fn1\+0x28>,r4 ! 0x30 + [0-9a-f]+: 04 d4 mov\.l [0-9a-f]+ <fn1\+0x28>,r4 ! 30 [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0x2c>,r0 - [0-9a-f]+: 04 d1 mov\.l [0-9a-f]+ <fn1\+0x2c>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 04 d1 mov\.l [0-9a-f]+ <fn1\+0x2c>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -38,7 +38,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x48>,r0 ! 0x38 + [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x48>,r0 ! 38 [0-9a-f]+: 12 04 stc gbr,r4 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 4c 30 add r4,r0 @@ -54,9 +54,9 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x68>,r4 ! 0x10 .* + [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x68>,r4 ! 10 .* [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0x6c>,r0 - [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x6c>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x6c>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -70,7 +70,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x88>,r0 ! 0x18 .* + [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x88>,r0 ! 18 .* [0-9a-f]+: 12 04 stc gbr,r4 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 4c 30 add r4,r0 @@ -86,9 +86,9 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0xa8>,r4 ! 0x3c + [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0xa8>,r4 ! 3c [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0xac>,r0 - [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0xac>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0xac>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -102,7 +102,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0xc8>,r0 ! 0x44 + [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0xc8>,r0 ! 44 [0-9a-f]+: 12 04 stc gbr,r4 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 4c 30 add r4,r0 @@ -118,9 +118,9 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0xe8>,r4 ! 0x24 + [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0xe8>,r4 ! 24 [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0xec>,r0 - [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0xec>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0xec>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -134,7 +134,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x108>,r0 ! 0x2c + [0-9a-f]+: 03 d0 mov\.l [0-9a-f]+ <fn1\+0x108>,r0 ! 2c [0-9a-f]+: 12 04 stc gbr,r4 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 4c 30 add r4,r0 @@ -150,9 +150,9 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x128>,r4 ! 0x1c .* + [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x128>,r4 ! 1c .* [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0x12c>,r0 - [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x12c>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x12c>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -164,11 +164,11 @@ Disassembly of section \.text: [0-9a-f]+: [0-9a-f]+ [0-9a-f]+ .*[ ]*.* [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 38 d1 mov\.l [0-9a-f]+ <fn1\+0x218>,r1 ! 0x8 .* + [0-9a-f]+: 38 d1 mov\.l [0-9a-f]+ <fn1\+0x218>,r1 ! 8 .* [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 37 d2 mov\.l [0-9a-f]+ <fn1\+0x21c>,r2 ! 0xc .* + [0-9a-f]+: 37 d2 mov\.l [0-9a-f]+ <fn1\+0x21c>,r2 ! c .* [0-9a-f]+: 0c 32 add r0,r2 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop @@ -188,19 +188,19 @@ Disassembly of section \.text: [0-9a-f]+: [0-9a-f]+ [0-9a-f]+ .*[ ]*.* [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 2e d1 mov\.l [0-9a-f]+ <fn1\+0x220>,r1 ! 0x10 .* + [0-9a-f]+: 2e d1 mov\.l [0-9a-f]+ <fn1\+0x220>,r1 ! 10 .* [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 2d d2 mov\.l [0-9a-f]+ <fn1\+0x224>,r2 ! 0x14 .* + [0-9a-f]+: 2d d2 mov\.l [0-9a-f]+ <fn1\+0x224>,r2 ! 14 .* [0-9a-f]+: 0c 32 add r0,r2 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x188>,r4 ! 0x1c .* + [0-9a-f]+: 03 d4 mov\.l [0-9a-f]+ <fn1\+0x188>,r4 ! 1c .* [0-9a-f]+: 04 c7 mova [0-9a-f]+ <fn1\+0x18c>,r0 - [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x18c>,r1 ! 0x[0-9a-f]+ + [0-9a-f]+: 03 d1 mov\.l [0-9a-f]+ <fn1\+0x18c>,r1 ! [0-9a-f]+ [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 0b 41 jsr @r1 [0-9a-f]+: cc 34 add r12,r4 @@ -212,17 +212,17 @@ Disassembly of section \.text: [0-9a-f]+: [0-9a-f]+ [0-9a-f]+ .*[ ]*.* [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 24 d1 mov\.l [0-9a-f]+ <fn1\+0x228>,r1 ! 0x18 .* + [0-9a-f]+: 24 d1 mov\.l [0-9a-f]+ <fn1\+0x228>,r1 ! 18 .* [0-9a-f]+: 0c 31 add r0,r1 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 23 d2 mov\.l [0-9a-f]+ <fn1\+0x22c>,r2 ! 0x1c .* + [0-9a-f]+: 23 d2 mov\.l [0-9a-f]+ <fn1\+0x22c>,r2 ! 1c .* [0-9a-f]+: 0c 32 add r0,r2 [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1b4>,r0 ! 0x38 + [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1b4>,r0 ! 38 [0-9a-f]+: 12 01 stc gbr,r1 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 03 a0 bra [0-9a-f]+ <fn1\+0x1b8> @@ -234,7 +234,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1cc>,r0 ! 0x18 .* + [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1cc>,r0 ! 18 .* [0-9a-f]+: 12 01 stc gbr,r1 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 03 a0 bra [0-9a-f]+ <fn1\+0x1d0> @@ -246,7 +246,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1e4>,r0 ! 0x44 + [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1e4>,r0 ! 44 [0-9a-f]+: 12 01 stc gbr,r1 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 03 a0 bra [0-9a-f]+ <fn1\+0x1e8> @@ -258,7 +258,7 @@ Disassembly of section \.text: [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop [0-9a-f]+: 09 00 nop - [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1fc>,r0 ! 0x2c + [0-9a-f]+: 02 d0 mov\.l [0-9a-f]+ <fn1\+0x1fc>,r0 ! 2c [0-9a-f]+: 12 01 stc gbr,r1 [0-9a-f]+: ce 00 mov\.l @\(r0,r12\),r0 [0-9a-f]+: 03 a0 bra [0-9a-f]+ <fn1\+0x200> diff --git a/ld/testsuite/ld-sh/tlspic-2.d b/ld/testsuite/ld-sh/tlspic-2.d index 70d65dac41ef9..942fb2de808d8 100644 --- a/ld/testsuite/ld-sh/tlspic-2.d +++ b/ld/testsuite/ld-sh/tlspic-2.d @@ -68,9 +68,6 @@ Relocation section '\.rela\.plt' at offset 0x[0-9a-f]+ contains 1 entries: Symbol table '\.dynsym' contains [0-9]+ entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT UND * -.* SECTION LOCAL DEFAULT +7 * -.* SECTION LOCAL DEFAULT +8 * -.* SECTION LOCAL DEFAULT +9 * .* NOTYPE GLOBAL DEFAULT UND __tls_get_addr .* TLS +GLOBAL DEFAULT +8 sg1 #... diff --git a/ld/testsuite/ld-sh/tlstpoff-1.d b/ld/testsuite/ld-sh/tlstpoff-1.d index 25de25be92dcc..a678596b8e202 100644 --- a/ld/testsuite/ld-sh/tlstpoff-1.d +++ b/ld/testsuite/ld-sh/tlstpoff-1.d @@ -12,9 +12,9 @@ Disassembly of section \.text: [0-9a-f]+ <foo>: [0-9a-f]+: c6 2f mov.l r12,@-r15 [0-9a-f]+: 07 c7 mova [0-9a-f]+ <foo\+0x20>,r0 - [0-9a-f]+: 06 dc mov.l [0-9a-f]+ <foo\+0x20>,r12 ! 0x[0-9a-f]+ + [0-9a-f]+: 06 dc mov.l [0-9a-f]+ <foo\+0x20>,r12 ! [0-9a-f]+ [0-9a-f]+: 0c 3c add r0,r12 - [0-9a-f]+: 02 d0 mov.l [0-9a-f]+ <foo\+0x14>,r0 ! 0xc + [0-9a-f]+: 02 d0 mov.l [0-9a-f]+ <foo\+0x14>,r0 ! c [0-9a-f]+: 12 01 stc gbr,r1 [0-9a-f]+: 09 00 nop [0-9a-f]+: 03 a0 bra [0-9a-f]+ <foo\+0x18> diff --git a/ld/testsuite/ld-sh/vxworks1-le.dd b/ld/testsuite/ld-sh/vxworks1-le.dd new file mode 100644 index 0000000000000..03c817c190f78 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-le.dd @@ -0,0 +1,73 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: 01 d1 mov\.l 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>,r1 ! 81408 + 80802: 12 61 mov\.l @r1,r1 + 80804: 2b 41 jmp @r1 + 80806: 09 00 nop + 80808: 08 14 .* + 80808: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0x8 + 8080a: 08 00 .* + +0008080c <_sglobal@plt>: + 8080c: 01 d0 mov\.l 80814 <_sglobal@plt\+0x8>,r0 ! 8140c + 8080e: 02 60 mov\.l @r0,r0 + 80810: 2b 40 jmp @r0 + 80812: 09 00 nop + 80814: 0c 14 .* + 80814: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0xc + 80816: 08 00 .* + 80818: 01 d0 mov\.l 80820 <_sglobal@plt\+0x14>,r0 ! 0 + 8081a: f1 af bra 80800 <_PROCEDURE_LINKAGE_TABLE_> + 8081c: 09 00 nop + 8081e: 09 00 nop + 80820: 00 00 .* + \.\.\. + +00080824 <_foo@plt>: + 80824: 01 d0 mov\.l 8082c <_foo@plt\+0x8>,r0 ! 81410 + 80826: 02 60 mov\.l @r0,r0 + 80828: 2b 40 jmp @r0 + 8082a: 09 00 nop + 8082c: 10 14 .* + 8082c: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0x10 + 8082e: 08 00 .* + 80830: 01 d0 mov\.l 80838 <_foo@plt\+0x14>,r0 ! c + 80832: e5 af bra 80800 <_PROCEDURE_LINKAGE_TABLE_> + 80834: 09 00 nop + 80836: 09 00 nop + 80838: 0c 00 .* + \.\.\. +Disassembly of section \.text: + +00080c00 <__start>: + 80c00: 22 4f sts\.l pr,@-r15 + 80c02: 06 d0 mov\.l 80c1c <__start\+0x1c>,r0 ! 80824 <_foo@plt> + 80c04: 0b 40 jsr @r0 + 80c06: 09 00 nop + 80c08: 05 d0 mov\.l 80c20 <__start\+0x20>,r0 ! 8080c <_sglobal@plt> + 80c0a: 0b 40 jsr @r0 + 80c0c: 09 00 nop + 80c0e: 05 d0 mov\.l 80c24 <__start\+0x24>,r0 ! 80c28 <_sexternal> + 80c10: 0b 40 jsr @r0 + 80c12: 09 00 nop + 80c14: 26 4f lds\.l @r15\+,pr + 80c16: 0b 00 rts + 80c18: 09 00 nop + 80c1a: 09 00 nop + 80c1c: 24 08 .* + 80c1c: R_SH_DIR32 \.plt\+0x24 + 80c1e: 08 00 .* + 80c20: 0c 08 .* + 80c20: R_SH_DIR32 \.plt\+0xc + 80c22: 08 00 .* + 80c24: 28 0c .* + 80c24: R_SH_DIR32 _sexternal + 80c26: 08 00 .* + +00080c28 <_sexternal>: + 80c28: 0b 00 rts + 80c2a: 09 00 nop diff --git a/ld/testsuite/ld-sh/vxworks1-lib-le.dd b/ld/testsuite/ld-sh/vxworks1-lib-le.dd new file mode 100644 index 0000000000000..6511c164cf902 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib-le.dd @@ -0,0 +1,76 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: 01 d0 mov\.l 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>,r0 ! c + 80802: ce 00 mov\.l @\(r0,r12\),r0 + 80804: 2b 40 jmp @r0 + 80806: 09 00 nop + 80808: 0c 00 .* + 8080a: 00 00 .* + 8080c: 01 d0 mov\.l 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>,r0 ! 0 + 8080e: c2 51 mov\.l @\(8,r12\),r1 + 80810: 2b 41 jmp @r1 + 80812: 09 00 nop + 80814: 00 00 .* + \.\.\. + +00080818 <_sexternal@plt>: + 80818: 01 d0 mov\.l 80820 <_sexternal@plt\+0x8>,r0 ! 10 + 8081a: ce 00 mov\.l @\(r0,r12\),r0 + 8081c: 2b 40 jmp @r0 + 8081e: 09 00 nop + 80820: 10 00 .* + 80822: 00 00 .* + 80824: 01 d0 mov\.l 8082c <_sexternal@plt\+0x14>,r0 ! c + 80826: c2 51 mov\.l @\(8,r12\),r1 + 80828: 2b 41 jmp @r1 + 8082a: 09 00 nop + 8082c: 0c 00 .* + \.\.\. +Disassembly of section \.text: + +00080c00 <_foo>: + 80c00: c6 2f mov\.l r12,@-r15 + 80c02: 22 4f sts\.l pr,@-r15 + 80c04: 0a dc mov\.l 80c30 <_foo\+0x30>,r12 ! 0 + 80c06: c2 6c mov\.l @r12,r12 + 80c08: 0a d0 mov\.l 80c34 <_foo\+0x34>,r0 ! 0 + 80c0a: ce 0c mov\.l @\(r0,r12\),r12 + 80c0c: 0a d0 mov\.l 80c38 <_foo\+0x38>,r0 ! 14 + 80c0e: ce 01 mov\.l @\(r0,r12\),r1 + 80c10: 12 62 mov\.l @r1,r2 + 80c12: 01 72 add #1,r2 + 80c14: 22 21 mov\.l r2,@r1 + 80c16: 09 d0 mov\.l 80c3c <_foo\+0x3c>,r0 ! 2c + 80c18: 03 00 bsrf r0 + 80c1a: 09 00 nop + 80c1c: 08 d0 mov\.l 80c40 <_foo\+0x40>,r0 ! fffffbde + 80c1e: 03 00 bsrf r0 + 80c20: 09 00 nop + 80c22: 08 d0 mov\.l 80c44 <_foo\+0x44>,r0 ! fffffbf0 + 80c24: 03 00 bsrf r0 + 80c26: 09 00 nop + 80c28: 26 4f lds\.l @r15\+,pr + 80c2a: 0b 00 rts + 80c2c: f6 6c mov\.l @r15\+,r12 + 80c2e: 09 00 nop + ... + 80c38: 14 00 .* + 80c3a: 00 00 .* + 80c3c: 2c 00 .* + 80c3e: 00 00 .* + 80c40: de fb .* + 80c42: ff ff .* + 80c44: f0 fb .* + 80c46: ff ff .* + +00080c48 <_slocal>: + 80c48: 0b 00 rts + 80c4a: 09 00 nop + +00080c4c <_sglobal>: + 80c4c: 0b 00 rts + 80c4e: 09 00 nop diff --git a/ld/testsuite/ld-sh/vxworks1-lib.dd b/ld/testsuite/ld-sh/vxworks1-lib.dd new file mode 100644 index 0000000000000..e20f334771735 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib.dd @@ -0,0 +1,76 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: d0 01 mov\.l 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>,r0 ! c + 80802: 00 ce mov\.l @\(r0,r12\),r0 + 80804: 40 2b jmp @r0 + 80806: 00 09 nop + 80808: 00 00 .* + 8080a: 00 0c .* + 8080c: d0 01 mov\.l 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>,r0 ! 0 + 8080e: 51 c2 mov\.l @\(8,r12\),r1 + 80810: 41 2b jmp @r1 + 80812: 00 09 nop + 80814: 00 00 .* + \.\.\. + +00080818 <_sexternal@plt>: + 80818: d0 01 mov\.l 80820 <_sexternal@plt\+0x8>,r0 ! 10 + 8081a: 00 ce mov\.l @\(r0,r12\),r0 + 8081c: 40 2b jmp @r0 + 8081e: 00 09 nop + 80820: 00 00 .* + 80822: 00 10 .* + 80824: d0 01 mov\.l 8082c <_sexternal@plt\+0x14>,r0 ! c + 80826: 51 c2 mov\.l @\(8,r12\),r1 + 80828: 41 2b jmp @r1 + 8082a: 00 09 nop + 8082c: 00 00 .* + 8082e: 00 0c .* +Disassembly of section \.text: + +00080c00 <_foo>: + 80c00: 2f c6 mov\.l r12,@-r15 + 80c02: 4f 22 sts\.l pr,@-r15 + 80c04: dc 0a mov\.l 80c30 <_foo\+0x30>,r12 ! 0 + 80c06: 6c c2 mov\.l @r12,r12 + 80c08: d0 0a mov\.l 80c34 <_foo\+0x34>,r0 ! 0 + 80c0a: 0c ce mov\.l @\(r0,r12\),r12 + 80c0c: d0 0a mov\.l 80c38 <_foo\+0x38>,r0 ! 14 + 80c0e: 01 ce mov\.l @\(r0,r12\),r1 + 80c10: 62 12 mov\.l @r1,r2 + 80c12: 72 01 add #1,r2 + 80c14: 21 22 mov\.l r2,@r1 + 80c16: d0 09 mov\.l 80c3c <_foo\+0x3c>,r0 ! 2c + 80c18: 00 03 bsrf r0 + 80c1a: 00 09 nop + 80c1c: d0 08 mov\.l 80c40 <_foo\+0x40>,r0 ! fffffbde + 80c1e: 00 03 bsrf r0 + 80c20: 00 09 nop + 80c22: d0 08 mov\.l 80c44 <_foo\+0x44>,r0 ! fffffbf0 + 80c24: 00 03 bsrf r0 + 80c26: 00 09 nop + 80c28: 4f 26 lds\.l @r15\+,pr + 80c2a: 00 0b rts + 80c2c: 6c f6 mov\.l @r15\+,r12 + 80c2e: 00 09 nop + ... + 80c38: 00 00 .* + 80c3a: 00 14 .* + 80c3c: 00 00 .* + 80c3e: 00 2c .* + 80c40: ff ff .* + 80c42: fb de .* + 80c44: ff ff .* + 80c46: fb f0 .* + +00080c48 <_slocal>: + 80c48: 00 0b rts + 80c4a: 00 09 nop + +00080c4c <_sglobal>: + 80c4c: 00 0b rts + 80c4e: 00 09 nop diff --git a/ld/testsuite/ld-sh/vxworks1-lib.nd b/ld/testsuite/ld-sh/vxworks1-lib.nd new file mode 100644 index 0000000000000..edf3db3994059 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib.nd @@ -0,0 +1,9 @@ +#... +Symbol table '\.dynsym' .*: +#... +.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +#... +Symbol table '\.symtab' .*: +#... +.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +#pass diff --git a/ld/testsuite/ld-sh/vxworks1-lib.rd b/ld/testsuite/ld-sh/vxworks1-lib.rd new file mode 100644 index 0000000000000..d9c56a0112f9a --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib.rd @@ -0,0 +1,12 @@ + +Relocation section '\.rela\.plt' at offset .* contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +0008140c .*a4 R_SH_JMP_SLOT 00080c4c _sglobal \+ 0 +00081410 .*a4 R_SH_JMP_SLOT 00000000 _sexternal \+ 0 + +Relocation section '\.rela\.dyn' at offset .* contains 4 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +00081800 000000a5 R_SH_RELATIVE * 00080c48 +00080c30 .*01 R_SH_DIR32 00000000 ___GOTT_BASE__ \+ 0 +00080c34 .*01 R_SH_DIR32 00000000 ___GOTT_INDEX__ \+ 0 +00081414 .*a3 R_SH_GLOB_DAT 00081c00 x \+ 0 diff --git a/ld/testsuite/ld-sh/vxworks1-lib.s b/ld/testsuite/ld-sh/vxworks1-lib.s new file mode 100644 index 0000000000000..ff215645d6bc4 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib.s @@ -0,0 +1,61 @@ + .text + .globl _foo + .type _foo, %function +_foo: + mov.l r12,@-r15 + sts.l pr,@-r15 + mov.l 1f,r12 + mov.l @r12,r12 + mov.l 2f,r0 + mov.l @(r0,r12),r12 + + mov.l 3f,r0 + mov.l @(r0,r12),r1 + mov.l @r1,r2 + add #1,r2 + mov.l r2,@r1 + + mov.l 4f,r0 + bsrf r0 + nop +.Lb4: + + mov.l 5f,r0 + bsrf r0 + nop +.Lb5: + + mov.l 6f,r0 + bsrf r0 + nop +.Lb6: + + lds.l @r15+,pr + rts + mov.l @r15+,r12 + .align 2 +1: .long ___GOTT_BASE__ +2: .long ___GOTT_INDEX__ +3: .long x@GOT +4: .long _slocal - .Lb4 +5: .long _sglobal@PLT - (.Lb5 - .) +6: .long _sexternal@PLT - (.Lb6 - .) + .size _foo, .-_foo + + .type _slocal, %function +_slocal: + rts + nop + .size _slocal, .-_slocal + + .globl _sglobal + .type _sglobal, %function +_sglobal: + rts + nop + .size _sglobal, .-_sglobal + + .data + .4byte _slocal + + .comm x,4,4 diff --git a/ld/testsuite/ld-sh/vxworks1-lib.td b/ld/testsuite/ld-sh/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-sh/vxworks1-static.d b/ld/testsuite/ld-sh/vxworks1-static.d new file mode 100644 index 0000000000000..dffc45b2ea151 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1-static.d @@ -0,0 +1,4 @@ +#name: VxWorks executable test 1 (static) +#source: vxworks1.s +#ld: tmpdir/libvxworks1.so -Tvxworks1.ld -EL +#error: Dynamic sections created in non-dynamic link diff --git a/ld/testsuite/ld-sh/vxworks1.dd b/ld/testsuite/ld-sh/vxworks1.dd new file mode 100644 index 0000000000000..4bb3b47bd634f --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1.dd @@ -0,0 +1,73 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: d1 01 mov\.l 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>,r1 ! 81408 + 80802: 61 12 mov\.l @r1,r1 + 80804: 41 2b jmp @r1 + 80806: 00 09 nop + 80808: 00 08 .* + 80808: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0x8 + 8080a: 14 08 .* + +0008080c <_sglobal@plt>: + 8080c: d0 01 mov\.l 80814 <_sglobal@plt\+0x8>,r0 ! 8140c + 8080e: 60 02 mov\.l @r0,r0 + 80810: 40 2b jmp @r0 + 80812: 00 09 nop + 80814: 00 08 .* + 80814: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0xc + 80816: 14 0c .* + 80818: d0 01 mov\.l 80820 <_sglobal@plt\+0x14>,r0 ! 0 + 8081a: af f1 bra 80800 <_PROCEDURE_LINKAGE_TABLE_> + 8081c: 00 09 nop + 8081e: 00 09 nop + 80820: 00 00 .* + \.\.\. + +00080824 <_foo@plt>: + 80824: d0 01 mov\.l 8082c <_foo@plt\+0x8>,r0 ! 81410 + 80826: 60 02 mov\.l @r0,r0 + 80828: 40 2b jmp @r0 + 8082a: 00 09 nop + 8082c: 00 08 .* + 8082c: R_SH_DIR32 _GLOBAL_OFFSET_TABLE_\+0x10 + 8082e: 14 10 .* + 80830: d0 01 mov\.l 80838 <_foo@plt\+0x14>,r0 ! c + 80832: af e5 bra 80800 <_PROCEDURE_LINKAGE_TABLE_> + 80834: 00 09 nop + 80836: 00 09 nop + 80838: 00 00 .* + 8083a: 00 0c .* +Disassembly of section \.text: + +00080c00 <__start>: + 80c00: 4f 22 sts\.l pr,@-r15 + 80c02: d0 06 mov\.l 80c1c <__start\+0x1c>,r0 ! 80824 <_foo@plt> + 80c04: 40 0b jsr @r0 + 80c06: 00 09 nop + 80c08: d0 05 mov\.l 80c20 <__start\+0x20>,r0 ! 8080c <_sglobal@plt> + 80c0a: 40 0b jsr @r0 + 80c0c: 00 09 nop + 80c0e: d0 05 mov\.l 80c24 <__start\+0x24>,r0 ! 80c28 <_sexternal> + 80c10: 40 0b jsr @r0 + 80c12: 00 09 nop + 80c14: 4f 26 lds\.l @r15\+,pr + 80c16: 00 0b rts + 80c18: 00 09 nop + 80c1a: 00 09 nop + 80c1c: 00 08 .* + 80c1c: R_SH_DIR32 \.plt\+0x24 + 80c1e: 08 24 .* + 80c20: 00 08 .* + 80c20: R_SH_DIR32 \.plt\+0xc + 80c22: 08 0c .* + 80c24: 00 08 .* + 80c24: R_SH_DIR32 _sexternal + 80c26: 0c 28 .* + +00080c28 <_sexternal>: + 80c28: 00 0b rts + 80c2a: 00 09 nop diff --git a/ld/testsuite/ld-sh/vxworks1.ld b/ld/testsuite/ld-sh/vxworks1.ld new file mode 100644 index 0000000000000..65bf65d4e2ed4 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1.ld @@ -0,0 +1,30 @@ +SECTIONS +{ + . = 0x80000; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + + . = ALIGN (0x400); + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + + . = ALIGN (0x400); + .plt : { *(.plt) } + + . = ALIGN (0x400); + .text : { *(.text) } + + . = ALIGN (0x1000); + .dynamic : { *(.dynamic) } + + . = ALIGN (0x400); + .got : { *(.got.plt) *(.got) } + + . = ALIGN (0x400); + .data : { *(.data) } + + . = ALIGN (0x400); + .bss : { *(.bss) *(.dynbss) } +} diff --git a/ld/testsuite/ld-sh/vxworks1.rd b/ld/testsuite/ld-sh/vxworks1.rd new file mode 100644 index 0000000000000..ee50c74f689a6 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1.rd @@ -0,0 +1,19 @@ + +Relocation section '\.rela\.plt' at offset .* contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +0008140c .*a4 R_SH_JMP_SLOT 0008080c _sglobal \+ 0 +00081410 .*a4 R_SH_JMP_SLOT 00080824 _foo \+ 0 + +Relocation section '\.rela\.text' at offset .* contains 3 entries: + Offset Info Type Sym.Value Sym. Name \+ Addend +00080c1c .*01 R_SH_DIR32 00080800 \.plt \+ 24 +00080c20 .*01 R_SH_DIR32 00080800 \.plt \+ c +00080c24 .*01 R_SH_DIR32 00080c28 _sexternal \+ 0 + +Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +00080808 .*01 R_SH_DIR32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 8 +00080814 .*01 R_SH_DIR32 00081400 _GLOBAL_OFFSET_TABLE_ \+ c +0008140c .*01 R_SH_DIR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 +0008082c .*01 R_SH_DIR32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10 +00081410 .*01 R_SH_DIR32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 diff --git a/ld/testsuite/ld-sh/vxworks1.s b/ld/testsuite/ld-sh/vxworks1.s new file mode 100644 index 0000000000000..3ae237348d6da --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks1.s @@ -0,0 +1,32 @@ + .text + .globl __start + .type __start, %function +__start: + sts.l pr,@-r15 + mov.l 1f,r0 + jsr @r0 + nop + + mov.l 2f,r0 + jsr @r0 + nop + + mov.l 3f,r0 + jsr @r0 + nop + + lds.l @r15+,pr + rts + nop + .align 2 +1: .long _foo +2: .long _sglobal +3: .long _sexternal + .size __start, .-__start + + .globl _sexternal + .type _sexternal, %function +_sexternal: + rts + nop + .size _sexternal, .-_sexternal diff --git a/ld/testsuite/ld-sh/vxworks2-static.sd b/ld/testsuite/ld-sh/vxworks2-static.sd new file mode 100644 index 0000000000000..912755bc472d1 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks2-static.sd @@ -0,0 +1,9 @@ +#... +Elf file type is EXEC \(Executable file\) +Entry point 0x80000 +#... +Program Headers: + Type .* + LOAD .* 0x00080000 0x00080000 .* R E 0x1000 + +#... diff --git a/ld/testsuite/ld-sh/vxworks2.s b/ld/testsuite/ld-sh/vxworks2.s new file mode 100644 index 0000000000000..f680a58a3add7 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks2.s @@ -0,0 +1,6 @@ + .globl __start + .type __start, %function +__start: + rts + nop + .end __start diff --git a/ld/testsuite/ld-sh/vxworks2.sd b/ld/testsuite/ld-sh/vxworks2.sd new file mode 100644 index 0000000000000..5ff87d3bef81d --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks2.sd @@ -0,0 +1,13 @@ +#... +Elf file type is EXEC \(Executable file\) +Entry point 0x80400 +#... +Program Headers: + Type .* + PHDR .* +#... + LOAD .* 0x00080000 0x00080000 .* R E 0x1000 + LOAD .* 0x00081000 0x00081000 .* RW 0x1000 + DYNAMIC .* + +#... diff --git a/ld/testsuite/ld-sh/vxworks3-le.dd b/ld/testsuite/ld-sh/vxworks3-le.dd new file mode 100644 index 0000000000000..6a0fc2dc1db74 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3-le.dd @@ -0,0 +1,34 @@ + +.*: file format .* + +Disassembly of section \.plt: + +#... +.*: 01 d0 mov\.l .*,r0 ! 0 +.*: f1 af bra .* <_PROCEDURE_LINKAGE_TABLE_> +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! 7ec +.*: 05 a8 bra .* <_PROCEDURE_LINKAGE_TABLE_> +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! 7f8 +.*: f2 af bra .* +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! fe4 +.*: 06 a8 bra .* +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! ff0 +.*: f2 af bra .* +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! 17dc +.*: 06 a8 bra .* +.*: 09 00 nop +#... +.*: 01 d0 mov\.l .*,r0 ! 17e8 +.*: f2 af bra .* +.*: 09 00 nop +#pass diff --git a/ld/testsuite/ld-sh/vxworks3-lib-le.dd b/ld/testsuite/ld-sh/vxworks3-lib-le.dd new file mode 100644 index 0000000000000..011d20cd80c55 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3-lib-le.dd @@ -0,0 +1,12 @@ + +.*: file format .* + +Disassembly of section \.text: + +.* <foo0>: +.*: 0b 00 rts +.*: 09 00 nop +#... +.* <foo510>: +.*: 0b 00 rts +.*: 09 00 nop diff --git a/ld/testsuite/ld-sh/vxworks3-lib.dd b/ld/testsuite/ld-sh/vxworks3-lib.dd new file mode 100644 index 0000000000000..555be000be746 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3-lib.dd @@ -0,0 +1,12 @@ + +.*: file format .* + +Disassembly of section \.text: + +.* <foo0>: +.*: 00 0b rts +.*: 00 09 nop +#... +.* <foo510>: +.*: 00 0b rts +.*: 00 09 nop diff --git a/ld/testsuite/ld-sh/vxworks3-lib.s b/ld/testsuite/ld-sh/vxworks3-lib.s new file mode 100644 index 0000000000000..6e10331653497 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3-lib.s @@ -0,0 +1,12 @@ + .macro entry + .globl foo\@ + .size foo\@,4 + .type foo\@,@function +foo\@: + rts + nop + .endm + + .rept 511 + entry + .endr diff --git a/ld/testsuite/ld-sh/vxworks3.dd b/ld/testsuite/ld-sh/vxworks3.dd new file mode 100644 index 0000000000000..f0593b683d102 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3.dd @@ -0,0 +1,34 @@ + +.*: file format .* + +Disassembly of section \.plt: + +#... +.*: d0 01 mov\.l .*,r0 ! 0 +.*: af f1 bra .* <_PROCEDURE_LINKAGE_TABLE_> +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! 7ec +.*: a8 05 bra .* <_PROCEDURE_LINKAGE_TABLE_> +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! 7f8 +.*: af f2 bra .* +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! fe4 +.*: a8 06 bra .* +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! ff0 +.*: af f2 bra .* +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! 17dc +.*: a8 06 bra .* +.*: 00 09 nop +#... +.*: d0 01 mov\.l .*,r0 ! 17e8 +.*: af f2 bra .* +.*: 00 09 nop +#pass diff --git a/ld/testsuite/ld-sh/vxworks3.s b/ld/testsuite/ld-sh/vxworks3.s new file mode 100644 index 0000000000000..86d631099d7e3 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks3.s @@ -0,0 +1,7 @@ + .macro entry + .long foo\@ + .endm + + .rept 511 + entry + .endr diff --git a/ld/testsuite/ld-sh/vxworks4.d b/ld/testsuite/ld-sh/vxworks4.d new file mode 100644 index 0000000000000..c5721dd16f647 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks4.d @@ -0,0 +1,11 @@ +#source: vxworks4a.s +#source: vxworks4b.s +#ld: -shared -Tvxworks1.ld +#target: sh-*-vxworks +#readelf: --relocs + +Relocation section '\.rela\.dyn' at offset .* contains 3 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +00081810 000000a5 R_SH_RELATIVE 0008181c +00081814 .*01 R_SH_DIR32 00000000 global \+ 1234 +00081818 .*02 R_SH_REL32 00000000 global \+ 1234 diff --git a/ld/testsuite/ld-sh/vxworks4a.s b/ld/testsuite/ld-sh/vxworks4a.s new file mode 100644 index 0000000000000..27855673097a3 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks4a.s @@ -0,0 +1,2 @@ + .data + .fill 0x10 diff --git a/ld/testsuite/ld-sh/vxworks4b.s b/ld/testsuite/ld-sh/vxworks4b.s new file mode 100644 index 0000000000000..6c0228ad26188 --- /dev/null +++ b/ld/testsuite/ld-sh/vxworks4b.s @@ -0,0 +1,4 @@ + .data + .long . + 0xc + .long global + 0x1234 + .long global + 0x1234 - . diff --git a/ld/testsuite/ld-sparc/sparc.exp b/ld/testsuite/ld-sparc/sparc.exp index 6e7e95cc563e4..aaf37a7bf0dd9 100644 --- a/ld/testsuite/ld-sparc/sparc.exp +++ b/ld/testsuite/ld-sparc/sparc.exp @@ -24,7 +24,7 @@ if {[istarget "sparc-*-vxworks"]} { {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "-KPIC" {vxworks1-lib.s} {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} - {readelf --symbols vxworks1-lib.nd}} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} "libvxworks1.so"} {"VxWorks executable test 1 (dynamic)" \ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" diff --git a/ld/testsuite/ld-sparc/tlssunbin32.rd b/ld/testsuite/ld-sparc/tlssunbin32.rd index 4869131c9d249..cf502c04b4405 100644 --- a/ld/testsuite/ld-sparc/tlssunbin32.rd +++ b/ld/testsuite/ld-sparc/tlssunbin32.rd @@ -58,7 +58,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 67 entries: +Symbol table '.symtab' contains 64 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -71,9 +71,6 @@ Symbol table '.symtab' contains 67 entries: .* SECTION LOCAL +DEFAULT +8 * .* SECTION LOCAL +DEFAULT +9 * .* SECTION LOCAL +DEFAULT +10 * -.* SECTION LOCAL +DEFAULT +11 * -.* SECTION LOCAL +DEFAULT +12 * -.* SECTION LOCAL +DEFAULT +13 * .* TLS +LOCAL +DEFAULT +7 sl1 .* TLS +LOCAL +DEFAULT +7 sl2 .* TLS +LOCAL +DEFAULT +7 sl3 @@ -91,7 +88,7 @@ Symbol table '.symtab' contains 67 entries: .* TLS +LOCAL +DEFAULT +8 bl7 .* TLS +LOCAL +DEFAULT +8 bl8 .* OBJECT +LOCAL +HIDDEN +9 _DYNAMIC -.* OBJECT +LOCAL +HIDDEN +ABS _PROCEDURE_LINKAGE_TABLE_ +.* OBJECT +LOCAL +HIDDEN +10 _PROCEDURE_LINKAGE_TABLE_ .* OBJECT +LOCAL +HIDDEN +10 _GLOBAL_OFFSET_TABLE_ .* TLS +GLOBAL DEFAULT +7 sg8 .* TLS +GLOBAL DEFAULT +8 bg8 diff --git a/ld/testsuite/ld-sparc/tlssunbin64.rd b/ld/testsuite/ld-sparc/tlssunbin64.rd index 4ce130b7250c4..6a42c90cd2f22 100644 --- a/ld/testsuite/ld-sparc/tlssunbin64.rd +++ b/ld/testsuite/ld-sparc/tlssunbin64.rd @@ -58,7 +58,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 67 entries: +Symbol table '.symtab' contains 64 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -71,9 +71,6 @@ Symbol table '.symtab' contains 67 entries: .* SECTION LOCAL +DEFAULT +8 * .* SECTION LOCAL +DEFAULT +9 * .* SECTION LOCAL +DEFAULT +10 * -.* SECTION LOCAL +DEFAULT +11 * -.* SECTION LOCAL +DEFAULT +12 * -.* SECTION LOCAL +DEFAULT +13 * .* TLS +LOCAL +DEFAULT +7 sl1 .* TLS +LOCAL +DEFAULT +7 sl2 .* TLS +LOCAL +DEFAULT +7 sl3 @@ -91,7 +88,7 @@ Symbol table '.symtab' contains 67 entries: .* TLS +LOCAL +DEFAULT +8 bl7 .* TLS +LOCAL +DEFAULT +8 bl8 .* OBJECT +LOCAL +HIDDEN +9 _DYNAMIC -.* OBJECT +LOCAL +HIDDEN +ABS _PROCEDURE_LINKAGE_TABLE_ +.* OBJECT +LOCAL +HIDDEN +10 _PROCEDURE_LINKAGE_TABLE_ .* OBJECT +LOCAL +HIDDEN +10 _GLOBAL_OFFSET_TABLE_ .* TLS +GLOBAL DEFAULT +7 sg8 .* TLS +GLOBAL DEFAULT +8 bg8 diff --git a/ld/testsuite/ld-sparc/tlssunnopic32.rd b/ld/testsuite/ld-sparc/tlssunnopic32.rd index 19fbf559ea24b..95727ccb01285 100644 --- a/ld/testsuite/ld-sparc/tlssunnopic32.rd +++ b/ld/testsuite/ld-sparc/tlssunnopic32.rd @@ -62,7 +62,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 30 entries: +Symbol table '.symtab' contains 27 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -73,9 +73,6 @@ Symbol table '.symtab' contains 30 entries: .* SECTION LOCAL +DEFAULT +6 * .* SECTION LOCAL +DEFAULT +7 * .* SECTION LOCAL +DEFAULT +8 * -.* SECTION LOCAL +DEFAULT +9 * -.* SECTION LOCAL +DEFAULT +10 * -.* SECTION LOCAL +DEFAULT +11 * .* TLS +LOCAL +DEFAULT +6 bl1 .* TLS +LOCAL +DEFAULT +6 bl2 .* TLS +LOCAL +DEFAULT +6 bl3 diff --git a/ld/testsuite/ld-sparc/tlssunnopic64.rd b/ld/testsuite/ld-sparc/tlssunnopic64.rd index ce375efe1356d..a113bdcc6e06c 100644 --- a/ld/testsuite/ld-sparc/tlssunnopic64.rd +++ b/ld/testsuite/ld-sparc/tlssunnopic64.rd @@ -64,7 +64,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 30 entries: +Symbol table '.symtab' contains 27 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -75,9 +75,6 @@ Symbol table '.symtab' contains 30 entries: .* SECTION LOCAL +DEFAULT +6 * .* SECTION LOCAL +DEFAULT +7 * .* SECTION LOCAL +DEFAULT +8 * -.* SECTION LOCAL +DEFAULT +9 * -.* SECTION LOCAL +DEFAULT +10 * -.* SECTION LOCAL +DEFAULT +11 * .* TLS +LOCAL +DEFAULT +6 bl1 .* TLS +LOCAL +DEFAULT +6 bl2 .* TLS +LOCAL +DEFAULT +6 bl3 diff --git a/ld/testsuite/ld-sparc/tlssunpic32.rd b/ld/testsuite/ld-sparc/tlssunpic32.rd index 818d859e73841..0f99170367cc0 100644 --- a/ld/testsuite/ld-sparc/tlssunpic32.rd +++ b/ld/testsuite/ld-sparc/tlssunpic32.rd @@ -64,7 +64,6 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +6 * .* SECTION LOCAL +DEFAULT +7 * -.* SECTION LOCAL +DEFAULT +8 * .* SECTION LOCAL +DEFAULT +10 * .* TLS +GLOBAL DEFAULT +7 sg8 .* TLS +GLOBAL DEFAULT +7 sg3 @@ -80,7 +79,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 55 entries: +Symbol table '.symtab' contains 52 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -94,9 +93,6 @@ Symbol table '.symtab' contains 55 entries: .* SECTION LOCAL +DEFAULT +9 * .* SECTION LOCAL +DEFAULT +10 * .* SECTION LOCAL +DEFAULT +11 * -.* SECTION LOCAL +DEFAULT +12 * -.* SECTION LOCAL +DEFAULT +13 * -.* SECTION LOCAL +DEFAULT +14 * .* TLS +LOCAL +DEFAULT +7 sl1 .* TLS +LOCAL +DEFAULT +7 sl2 .* TLS +LOCAL +DEFAULT +7 sl3 diff --git a/ld/testsuite/ld-sparc/tlssunpic64.rd b/ld/testsuite/ld-sparc/tlssunpic64.rd index 0033426c4f221..0a94292be8d2d 100644 --- a/ld/testsuite/ld-sparc/tlssunpic64.rd +++ b/ld/testsuite/ld-sparc/tlssunpic64.rd @@ -64,7 +64,6 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +6 * .* SECTION LOCAL +DEFAULT +7 * -.* SECTION LOCAL +DEFAULT +8 * .* SECTION LOCAL +DEFAULT +10 * .* TLS +GLOBAL DEFAULT +7 sg8 .* TLS +GLOBAL DEFAULT +7 sg3 @@ -80,7 +79,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE +GLOBAL DEFAULT +ABS _edata .* NOTYPE +GLOBAL DEFAULT +ABS _end -Symbol table '.symtab' contains 55 entries: +Symbol table '.symtab' contains 52 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE +LOCAL +DEFAULT +UND * .* SECTION LOCAL +DEFAULT +1 * @@ -94,9 +93,6 @@ Symbol table '.symtab' contains 55 entries: .* SECTION LOCAL +DEFAULT +9 * .* SECTION LOCAL +DEFAULT +10 * .* SECTION LOCAL +DEFAULT +11 * -.* SECTION LOCAL +DEFAULT +12 * -.* SECTION LOCAL +DEFAULT +13 * -.* SECTION LOCAL +DEFAULT +14 * .* TLS +LOCAL +DEFAULT +7 sl1 .* TLS +LOCAL +DEFAULT +7 sl2 .* TLS +LOCAL +DEFAULT +7 sl3 diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.rd b/ld/testsuite/ld-sparc/vxworks1-lib.rd index 1390e78ab365e..3604528639d10 100644 --- a/ld/testsuite/ld-sparc/vxworks1-lib.rd +++ b/ld/testsuite/ld-sparc/vxworks1-lib.rd @@ -5,8 +5,8 @@ Relocation section '\.rela\.plt' at offset .* contains 1 entries: Relocation section '\.rela\.dyn' at offset .* contains 5 entries: Offset Info Type Sym\.Value Sym\. Name \+ Addend -00090c00 00000016 R_SPARC_RELATIVE 00080c44 +00090800 00000016 R_SPARC_RELATIVE 00080c44 00080c04 .*09 R_SPARC_HI22 00000000 __GOTT_BASE__ \+ 0 00080c08 .*0c R_SPARC_LO10 00000000 __GOTT_BASE__ \+ 0 00080c0c .*0c R_SPARC_LO10 00000000 __GOTT_INDEX__ \+ 0 -00090410 .*14 R_SPARC_GLOB_DAT 00090800 x \+ 0 +00090410 .*14 R_SPARC_GLOB_DAT 00090c00 x \+ 0 diff --git a/ld/testsuite/ld-sparc/vxworks1-lib.td b/ld/testsuite/ld-sparc/vxworks1-lib.td new file mode 100644 index 0000000000000..9f223e38da16c --- /dev/null +++ b/ld/testsuite/ld-sparc/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/ld/testsuite/ld-sparc/vxworks1.ld b/ld/testsuite/ld-sparc/vxworks1.ld index 979d773354880..ce750b00fad88 100644 --- a/ld/testsuite/ld-sparc/vxworks1.ld +++ b/ld/testsuite/ld-sparc/vxworks1.ld @@ -23,8 +23,8 @@ SECTIONS .got : { *(.got.plt) *(.got) } . = ALIGN (0x400); - .bss : { *(.bss) } + .data : { *(.data) } . = ALIGN (0x400); - .data : { *(.data) } + .bss : { *(.bss) } } diff --git a/ld/testsuite/ld-spu/ear.d b/ld/testsuite/ld-spu/ear.d new file mode 100644 index 0000000000000..df5546fb60fba --- /dev/null +++ b/ld/testsuite/ld-spu/ear.d @@ -0,0 +1,30 @@ +#as: +#objdump: -Dr +#name: ear + +.*: +file format .* + +Disassembly of section \.text: + +0+00 <_start>: + 0: 32 00 00 00 br 0 + 0: SPU_REL16 _start + +Disassembly of section \.data: + +0+00 <_EAR_main>: + \.\.\. + +0+20 <_EAR_foo>: + \.\.\. +Disassembly of section \.toe: + +0+00 <_EAR_>: + \.\.\. + +0+10 <_EAR_bar>: + \.\.\. +Disassembly of section \.data\.blah: + +0+00 <_EAR_blah>: + \.\.\. diff --git a/ld/testsuite/ld-spu/ear.s b/ld/testsuite/ld-spu/ear.s new file mode 100644 index 0000000000000..ba0be05c6505e --- /dev/null +++ b/ld/testsuite/ld-spu/ear.s @@ -0,0 +1,25 @@ + .text + .global _start +_start: + br _start + +#test old-style toe _EAR_ syms + .section .toe,"a",@nobits +_EAR_: + .space 16 +_EAR_bar: + .space 16 + +#test new-style _EAR_ syms + .data +_EAR_main: + .space 16 + +#new ones don't need to be 16 bytes apart + .space 16 +_EAR_foo: + .space 16 + + .section .data.blah,"aw",@progbits +_EAR_blah: + .space 16 diff --git a/ld/testsuite/ld-spu/embed.rd b/ld/testsuite/ld-spu/embed.rd new file mode 100644 index 0000000000000..0ac34da8ce063 --- /dev/null +++ b/ld/testsuite/ld-spu/embed.rd @@ -0,0 +1,16 @@ + +Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000184 00000601 R_PPC_ADDR32 00000000 main \+ 0 +000001a4 00000901 R_PPC_ADDR32 00000000 foo \+ 0 +000001b4 00000701 R_PPC_ADDR32 00000000 blah \+ 0 + +Relocation section '\.rela\.data' at .* contains 2 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 +00000008 00000401 R_PPC_ADDR32 00000000 \.data\.spetoe \+ 0 + +Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries: + Offset Info Type Sym\. Value Symbol's Name \+ Addend +00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0 +00000014 00000a01 R_PPC_ADDR32 00000000 bar \+ 0 diff --git a/ld/testsuite/ld-spu/ovl.d b/ld/testsuite/ld-spu/ovl.d new file mode 100644 index 0000000000000..5f126fcc0c72f --- /dev/null +++ b/ld/testsuite/ld-spu/ovl.d @@ -0,0 +1,136 @@ +#source: ovl.s +#ld: -N -T ovl.lnk --emit-relocs +#objdump: -D -r + +.*elf32-spu + +Disassembly of section \.text: + +00000100 <_start>: + 100: 1c f8 00 81 ai \$1,\$1,-32 + 104: 48 20 00 00 xor \$0,\$0,\$0 + 108: 24 00 00 80 stqd \$0,0\(\$1\) + 10c: 24 00 40 80 stqd \$0,16\(\$1\) + 110: 33 00 04 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130 + 110: SPU_REL16 f1_a1 + 114: 33 00 04 80 brsl \$0,138 <00000000\.ovl_call\.f2_a1> # 138 + 114: SPU_REL16 f2_a1 + 118: 33 00 07 00 brsl \$0,150 <00000000\.ovl_call\.f1_a2> # 150 + 118: SPU_REL16 f1_a2 + 11c: 42 00 ac 09 ila \$9,344 # 158 + 11c: SPU_ADDR18 f2_a2 + 120: 35 20 04 80 bisl \$0,\$9 + 124: 1c 08 00 81 ai \$1,\$1,32 # 20 + 128: 32 7f fb 00 br 100 <_start> # 100 + 128: SPU_REL16 _start + +0000012c <f0>: + 12c: 35 00 00 00 bi \$0 +00000130 <00000000\.ovl_call\.f1_a1>: + 130: 42 02 00 4f ila \$79,1024 # 400 + 134: 32 00 02 80 br 148 .* +00000138 <00000000\.ovl_call\.f2_a1>: + 138: 42 02 02 4f ila \$79,1028 # 404 + 13c: 32 00 01 80 br 148 .* +00000140 <00000000\.ovl_call\.f4_a1>: + 140: 42 02 08 4f ila \$79,1040 # 410 + 144: 40 20 00 00 nop \$0 + 148: 42 00 00 ce ila \$78,1 + 14c: 32 00 0a 80 br 1a0 <__ovly_load> # 1a0 +00000150 <00000000\.ovl_call\.f1_a2>: + 150: 42 02 00 4f ila \$79,1024 # 400 + 154: 32 00 02 80 br 168 .* +00000158 <00000000\.ovl_call\.f2_a2>: + 158: 42 02 12 4f ila \$79,1060 # 424 + 15c: 32 00 01 80 br 168 .* +00000160 <00000000\.ovl_call\.14:8>: + 160: 42 02 1a 4f ila \$79,1076 # 434 + 164: 40 20 00 00 nop \$0 + 168: 42 00 01 4e ila \$78,2 + 16c: 32 00 06 80 br 1a0 <__ovly_load> # 1a0 +#... +[0-9a-f]+ <__ovly_return>: +[0-9a-f ]+: 3f e1 00 4e shlqbyi \$78,\$0,4 +[0-9a-f ]+: 3f e2 00 4f shlqbyi \$79,\$0,8 +[0-9a-f ]+: 25 00 27 ce biz \$78,\$79 + +[0-9a-f]+ <__ovly_load>: +#... +[0-9a-f]+ <_ovly_debug_event>: +#... +Disassembly of section \.ov_a1: + +00000400 <f1_a1>: + 400: 32 00 01 80 br 40c <f3_a1> # 40c + 400: SPU_REL16 f3_a1 + +00000404 <f2_a1>: + 404: 42 00 a0 03 ila \$3,320 # 140 + 404: SPU_ADDR18 f4_a1 + 408: 35 00 00 00 bi \$0 + +0000040c <f3_a1>: + 40c: 35 00 00 00 bi \$0 + +00000410 <f4_a1>: + 410: 35 00 00 00 bi \$0 + \.\.\. +Disassembly of section \.ov_a2: + +00000400 <f1_a2>: + 400: 24 00 40 80 stqd \$0,16\(\$1\) + 404: 24 ff 80 81 stqd \$1,-32\(\$1\) + 408: 1c f8 00 81 ai \$1,\$1,-32 + 40c: 33 7f a4 00 brsl \$0,12c <f0> # 12c + 40c: SPU_REL16 f0 + 410: 33 7f a4 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130 + 410: SPU_REL16 f1_a1 + 414: 33 00 03 80 brsl \$0,430 <f3_a2> # 430 + 414: SPU_REL16 f3_a2 + 418: 34 00 c0 80 lqd \$0,48\(\$1\) # 30 + 41c: 1c 08 00 81 ai \$1,\$1,32 # 20 + 420: 35 00 00 00 bi \$0 + +00000424 <f2_a2>: + 424: 41 00 00 03 ilhu \$3,0 + 424: SPU_ADDR16_HI f4_a2 + 428: 60 80 b0 03 iohl \$3,352 # 160 + 428: SPU_ADDR16_LO f4_a2 + 42c: 35 00 00 00 bi \$0 + +00000430 <f3_a2>: + 430: 35 00 00 00 bi \$0 + +00000434 <f4_a2>: + 434: 32 7f ff 80 br 430 <f3_a2> # 430 + 434: SPU_REL16 f3_a2 + \.\.\. +Disassembly of section .data: + +00000440 <_ovly_table>: + 440: 00 00 04 00 .* + 444: 00 00 00 20 .* + 448: 00 00 02 f0 .* + 44c: 00 00 00 01 .* + 450: 00 00 04 00 .* + 454: 00 00 00 40 .* + 458: 00 00 03 10 .* + 45c: 00 00 00 01 .* + +00000460 <_ovly_buf_table>: + 460: 00 00 00 00 .* +Disassembly of section \.toe: + +00000470 <_EAR_>: + \.\.\. +Disassembly of section \.note\.spu_name: + +.* <\.note\.spu_name>: +.*: 00 00 00 08 .* +.*: 00 00 00 0c .* +.*: 00 00 00 01 .* +.*: 53 50 55 4e .* +.*: 41 4d 45 00 .* +.*: 74 6d 70 64 .* +.*: 69 72 2f 64 .* +.*: 75 6d 70 00 .* diff --git a/ld/testsuite/ld-spu/ovl.lnk b/ld/testsuite/ld-spu/ovl.lnk new file mode 100644 index 0000000000000..408ed1ebd67c9 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl.lnk @@ -0,0 +1,14 @@ +SECTIONS +{ + . = SIZEOF_HEADERS; + .text : { *(.text) *(.stub) } + + OVERLAY 0x400 : + { + .ov_a1 { *(.ov_a1) } + .ov_a2 { *(.ov_a2) } + } + + .data : { *(.data) *(.ovtab) } + .bss : { *(.bss) } +} diff --git a/ld/testsuite/ld-spu/ovl.s b/ld/testsuite/ld-spu/ovl.s new file mode 100644 index 0000000000000..2ca380a65fef6 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl.s @@ -0,0 +1,82 @@ + .text + .p2align 2 + .globl _start +_start: + ai sp,sp,-32 + xor lr,lr,lr + stqd lr,0(sp) + stqd lr,16(sp) + brsl lr,f1_a1 + brsl lr,f2_a1 + brsl lr,f1_a2 + ila 9,f2_a2 + bisl lr,9 + ai sp,sp,32 + br _start + + .type f0,@function +f0: + bi lr + .size f0,.-f0 + + .section .ov_a1,"ax",@progbits + .p2align 2 + .global f1_a1 + .type f1_a1,@function +f1_a1: + br f3_a1 + .size f1_a1,.-f1_a1 + + .global f2_a1 + .type f2_a1,@function +f2_a1: + ila 3,f4_a1 + bi lr + .size f2_a1,.-f2_a1 + + .global f3_a1 + .type f3_a1,@function +f3_a1: + bi lr + .size f3_a1,.-f3_a1 + + .global f4_a1 + .type f4_a1,@function +f4_a1: + bi lr + .size f4_a1,.-f4_a1 + + + .section .ov_a2,"ax",@progbits + .p2align 2 + .global f1_a2 + .type f1_a2,@function +f1_a2: + stqd lr,16(sp) + stqd sp,-32(sp) + ai sp,sp,-32 + brsl lr,f0 + brsl lr,f1_a1 + brsl lr,f3_a2 + lqd lr,48(sp) + ai sp,sp,32 + bi lr + .size f1_a2,.-f1_a2 + + .global f2_a2 + .type f2_a2,@function +f2_a2: + ilhu 3,f4_a2@h + iohl 3,f4_a2@l + bi lr + .size f2_a2,.-f2_a2 + + .type f3_a2,@function +f3_a2: + bi lr + .size f3_a2,.-f3_a2 + + .type f4_a2,@function +f4_a2: + br f3_a2 + .size f4_a2,.-f4_a2 diff --git a/ld/testsuite/ld-spu/ovl2.d b/ld/testsuite/ld-spu/ovl2.d new file mode 100644 index 0000000000000..52b362d9c2ad2 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl2.d @@ -0,0 +1,81 @@ +#source: ovl2.s +#ld: -N -T ovl.lnk --emit-relocs +#objdump: -D -r + +.*elf32-spu + +Disassembly of section \.text: + +00000100 <_start>: + 100: 33 00 06 00 brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130 + 100: SPU_REL16 f1_a1 + 104: 33 00 03 80 brsl \$0,120 <00000000\.ovl_call\.10:4> # 120 + 104: SPU_REL16 setjmp + 108: 32 7f ff 00 br 100 <_start> # 100 + 108: SPU_REL16 _start + +0000010c <setjmp>: + 10c: 35 00 00 00 bi \$0 + +00000110 <longjmp>: + 110: 35 00 00 00 bi \$0 + ... + +00000120 <00000000\.ovl_call.10:4>: + 120: 42 00 86 4f ila \$79,268 # 10c + 124: 40 20 00 00 nop \$0 + 128: 42 00 00 4e ila \$78,0 + 12c: 32 00 0a 80 br 180 <__ovly_load> # 180 + +00000130 <00000000\.ovl_call.f1_a1>: + 130: 42 02 00 4f ila \$79,1024 # 400 + 134: 40 20 00 00 nop \$0 + 138: 42 00 00 ce ila \$78,1 + 13c: 32 00 08 80 br 180 <__ovly_load> # 180 + +00000140 <_SPUEAR_f1_a2>: + 140: 42 02 00 4f ila \$79,1024 # 400 + 144: 40 20 00 00 nop \$0 + 148: 42 00 01 4e ila \$78,2 + 14c: 32 00 06 80 br 180 <__ovly_load> # 180 +#... +Disassembly of section \.ov_a1: + +00000400 <f1_a1>: + 400: 35 00 00 00 bi \$0 + \.\.\. +Disassembly of section \.ov_a2: + +00000400 <f1_a2>: + 400: 32 7f a2 00 br 110 <longjmp> # 110 + 400: SPU_REL16 longjmp + \.\.\. +Disassembly of section \.data: + +00000410 <_ovly_table>: + 410: 00 00 04 00 .* + 414: 00 00 00 10 .* + 418: 00 00 02 d0 .* + 41c: 00 00 00 01 .* + 420: 00 00 04 00 .* + 424: 00 00 00 10 .* + 428: 00 00 02 e0 .* + 42c: 00 00 00 01 .* + +00000430 <_ovly_buf_table>: + 430: 00 00 00 00 .* +Disassembly of section \.toe: + +00000440 <_EAR_>: + \.\.\. +Disassembly of section \.note\.spu_name: + +.* <\.note\.spu_name>: +.*: 00 00 00 08 .* +.*: 00 00 00 0c .* +.*: 00 00 00 01 .* +.*: 53 50 55 4e .* +.*: 41 4d 45 00 .* +.*: 74 6d 70 64 .* +.*: 69 72 2f 64 .* +.*: 75 6d 70 00 .* diff --git a/ld/testsuite/ld-spu/ovl2.s b/ld/testsuite/ld-spu/ovl2.s new file mode 100644 index 0000000000000..a3443f51ee969 --- /dev/null +++ b/ld/testsuite/ld-spu/ovl2.s @@ -0,0 +1,35 @@ + .text + .p2align 2 + .global _start +_start: + brsl lr,f1_a1 + brsl lr,setjmp + br _start + + .type setjmp,@function +setjmp: + bi lr + .size setjmp,.-setjmp + + .type longjmp,@function +longjmp: + bi lr + .size longjmp,.-longjmp + + .section .ov_a1,"ax",@progbits + .p2align 2 + .global f1_a1 + .type f1_a1,@function +f1_a1: + bi lr + .size f1_a1,.-f1_a1 + + .section .ov_a2,"ax",@progbits + .p2align 2 + .type f1_a2,@function +f1_a2: + br longjmp + .size f1_a2,.-f1_a2 + +_SPUEAR_f1_a2 = f1_a2 + .global _SPUEAR_f1_a2 diff --git a/ld/testsuite/ld-spu/spu.exp b/ld/testsuite/ld-spu/spu.exp new file mode 100644 index 0000000000000..cb6f0dd639864 --- /dev/null +++ b/ld/testsuite/ld-spu/spu.exp @@ -0,0 +1,91 @@ +# Expect script for ld-spu tests +# Copyright (C) 2006 Free Software Foundation +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software Foundation, +# 51 Franklin Street - Fifth Floor, Boston, MA 02111-1307, USA. +# + +if { ![istarget "spu-*-*"] } { + return +} + +proc embed_test { } { + global subdir srcdir + global AS ASFLAGS LD LDFLAGS READELF READELFFLAGS + + set cmd "$AS $ASFLAGS -o tmpdir/ear.o $srcdir/$subdir/ear.s" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear assembly" + return + } + + set cmd "$LD $LDFLAGS -o tmpdir/ear tmpdir/ear.o" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear link" + return + } + + set cmd "sh $srcdir/../../binutils/embedspu.sh -m32 ear tmpdir/ear tmpdir/embed.o" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + if { [regexp "unknown pseudo-op: `.reloc'" $comp_output] } { + untested "ear embedspu" + return + } + fail "ear embedspu" + return + } + + set cmd "$READELF $READELFFLAGS -r --wide tmpdir/embed.o > tmpdir/embed.out" + send_log "$cmd\n" + set cmdret [catch "exec $cmd" comp_output] + set comp_output [prune_warnings $comp_output] + if { $cmdret != 0 || $comp_output != ""} then { + send_log "$comp_output\n" + verbose "$comp_output" 3 + fail "ear embed readelf" + return + } + + if { [regexp_diff "tmpdir/embed.out" $srcdir/$subdir/embed.rd] } then { + fail "ear embed output" + return + } + + pass "ear embed" +} + +set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/*.d]] +foreach sputest $rd_test_list { + verbose [file rootname $sputest] + run_dump_test [file rootname $sputest] +} + +if { [isbuild "powerpc*-*-linux*"] } { + embed_test +} diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp index 74e76e6a97c76..d98b926d09bd4 100644 --- a/ld/testsuite/ld-srec/srec.exp +++ b/ld/testsuite/ld-srec/srec.exp @@ -1,6 +1,6 @@ # Test linking directly to S-records. # By Ian Lance Taylor, Cygnus Support. -# Copyright 1999, 2000, 2001, 2002, 2003 +# Copyright 1999, 2000, 2001, 2002, 2003, 2006 # Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify @@ -391,6 +391,7 @@ setup_xfail "ia64-*-*" # emulation tries to write pe-specific information to the PE headers # in the output bfd, but it's not a PE bfd (it's an srec bfd) setup_xfail "*-*-cygwin*" "*-*-mingw*" "*-*-pe*" "*-*-winnt*" +setup_xfail "score-*-*" run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o" @@ -422,5 +423,6 @@ setup_xfail "alpha*-*-netbsd*" setup_xfail "hppa*-*-*" setup_xfail "ia64-*-*" setup_xfail "*-*-cygwin*" "*-*-mingw*" "*-*-pe*" "*-*-winnt*" +setup_xfail "score-*-*" run_srec_test $test2 "tmpdir/sr3.o" diff --git a/ld/testsuite/ld-undefined/undefined.exp b/ld/testsuite/ld-undefined/undefined.exp index 07fca0571f871..4fe2696734a8c 100644 --- a/ld/testsuite/ld-undefined/undefined.exp +++ b/ld/testsuite/ld-undefined/undefined.exp @@ -119,6 +119,7 @@ set ml "undefined.c:9: undefined reference to `*this_function_is_not_defined'" # hence the xfails below. setup_xfail mcore-*-elf +setup_xfail mep-*-* setup_xfail mips-sgi-irix6* setup_xfail "sh64-*-*" diff --git a/ld/testsuite/ld-vxworks/rpath-1.d b/ld/testsuite/ld-vxworks/rpath-1.d new file mode 100644 index 0000000000000..df67a03ac420c --- /dev/null +++ b/ld/testsuite/ld-vxworks/rpath-1.d @@ -0,0 +1,6 @@ +# source: rpath-1.s +# ld: --entry foo --rpath /dir1 --rpath /dir2 --rpath net:/dir4 --rpath /dir2 --rpath /dir1 --rpath /dir3 --force-dynamic -q +# readelf: -d +#... + 0x0+f \(RPATH\).*Library rpath: \[/dir1;/dir2;net:/dir4;/dir3\] +#pass diff --git a/ld/testsuite/ld-vxworks/rpath-1.s b/ld/testsuite/ld-vxworks/rpath-1.s new file mode 100644 index 0000000000000..6218588e1d77d --- /dev/null +++ b/ld/testsuite/ld-vxworks/rpath-1.s @@ -0,0 +1,2 @@ + .global foo +foo: diff --git a/ld/testsuite/ld-vxworks/vxworks.exp b/ld/testsuite/ld-vxworks/vxworks.exp new file mode 100644 index 0000000000000..e33e7613e17c1 --- /dev/null +++ b/ld/testsuite/ld-vxworks/vxworks.exp @@ -0,0 +1,24 @@ +# Expect script for VxWorks tests +# Copyright 2007 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +if { [istarget *-*-vxworks*] } { + foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.d]] { + if { [runtest_file_p $runtests $test] } { + run_dump_test [file rootname $test] + } + } +} diff --git a/ld/testsuite/ld-x86-64/tlsbin.dd b/ld/testsuite/ld-x86-64/tlsbin.dd index 58bb553870029..1ea00d0da16a9 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.dd +++ b/ld/testsuite/ld-x86-64/tlsbin.dd @@ -24,7 +24,7 @@ Disassembly of section .text: # GD -> IE because variable is not defined in executable 401004: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 40100b: 00 00 * - 40100d: 48 03 05 d4 03 10 00[ ]+add 1049556\(%rip\),%rax +# 5013e8 <.*> + 40100d: 48 03 05 d4 03 20 00[ ]+add 0x2003d4\(%rip\),%rax +# 6013e8 <.*> # -> R_X86_64_TPOFF64 sG1 401014: 90[ ]+nop * 401015: 90[ ]+nop * @@ -34,7 +34,7 @@ Disassembly of section .text: # the variable is referenced through IE too 401018: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 40101f: 00 00 * - 401021: 48 03 05 b0 03 10 00[ ]+add 1049520\(%rip\),%rax +# 5013d8 <.*> + 401021: 48 03 05 b0 03 20 00[ ]+add 0x2003b0\(%rip\),%rax +# 6013d8 <.*> # -> R_X86_64_TPOFF64 sG2 401028: 90[ ]+nop * 401029: 90[ ]+nop * @@ -43,7 +43,7 @@ Disassembly of section .text: # GD -> LE with global variable defined in executable 40102c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 401033: 00 00 * - 401035: 48 8d 80 60 ff ff ff[ ]+lea 0xf+60\(%rax\),%rax + 401035: 48 8d 80 60 ff ff ff[ ]+lea -0xa0\(%rax\),%rax # sg1 40103c: 90[ ]+nop * 40103d: 90[ ]+nop * @@ -52,7 +52,7 @@ Disassembly of section .text: # GD -> LE with local variable defined in executable 401040: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 401047: 00 00 * - 401049: 48 8d 80 80 ff ff ff[ ]+lea 0xf+80\(%rax\),%rax + 401049: 48 8d 80 80 ff ff ff[ ]+lea -0x80\(%rax\),%rax # sl1 401050: 90[ ]+nop * 401051: 90[ ]+nop * @@ -61,7 +61,7 @@ Disassembly of section .text: # GD -> LE with hidden variable defined in executable 401054: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax 40105b: 00 00 * - 40105d: 48 8d 80 a0 ff ff ff[ ]+lea 0xf+a0\(%rax\),%rax + 40105d: 48 8d 80 a0 ff ff ff[ ]+lea -0x60\(%rax\),%rax # sh1 401064: 90[ ]+nop * 401065: 90[ ]+nop * @@ -72,11 +72,11 @@ Disassembly of section .text: 40106f: 25 00 00 00 00 * 401074: 90[ ]+nop * 401075: 90[ ]+nop * - 401076: 48 8d 90 81 ff ff ff[ ]+lea 0xf+81\(%rax\),%rdx + 401076: 48 8d 90 81 ff ff ff[ ]+lea -0x7f\(%rax\),%rdx # sl1+1 40107d: 90[ ]+nop * 40107e: 90[ ]+nop * - 40107f: 4c 8d 88 86 ff ff ff[ ]+lea 0xf+86\(%rax\),%r9 + 40107f: 4c 8d 88 86 ff ff ff[ ]+lea -0x7a\(%rax\),%r9 # sl2+2 401086: 90[ ]+nop * 401087: 90[ ]+nop * @@ -87,11 +87,11 @@ Disassembly of section .text: 401091: 25 00 00 00 00 * 401096: 90[ ]+nop * 401097: 90[ ]+nop * - 401098: 48 8d 90 a0 ff ff ff[ ]+lea 0xf+a0\(%rax\),%rdx + 401098: 48 8d 90 a0 ff ff ff[ ]+lea -0x60\(%rax\),%rdx # sh1 40109f: 90[ ]+nop * 4010a0: 90[ ]+nop * - 4010a1: 48 8d 88 a7 ff ff ff[ ]+lea 0xf+a7\(%rax\),%rcx + 4010a1: 48 8d 88 a7 ff ff ff[ ]+lea -0x59\(%rax\),%rcx # sh2+3 4010a8: 90[ ]+nop * 4010a9: 90[ ]+nop * @@ -102,7 +102,7 @@ Disassembly of section .text: 4010b3: 00 00 * 4010b5: 90[ ]+nop * 4010b6: 90[ ]+nop * - 4010b7: 4c 03 0d 1a 03 10 00[ ]+add 1049370\(%rip\),%r9 +# 5013d8 <.*> + 4010b7: 4c 03 0d 1a 03 20 00[ ]+add 0x20031a\(%rip\),%r9 +# 6013d8 <.*> # -> R_X86_64_TPOFF64 sG2 4010be: 90[ ]+nop * 4010bf: 90[ ]+nop * @@ -113,7 +113,7 @@ Disassembly of section .text: 4010c9: 00 00 * 4010cb: 90[ ]+nop * 4010cc: 90[ ]+nop * - 4010cd: 4d 8d 92 60 ff ff ff[ ]+lea 0xf+60\(%r10\),%r10 + 4010cd: 4d 8d 92 60 ff ff ff[ ]+lea -0xa0\(%r10\),%r10 # sg1 4010d4: 90[ ]+nop * 4010d5: 90[ ]+nop * @@ -124,7 +124,7 @@ Disassembly of section .text: 4010df: 00 00 * 4010e1: 90[ ]+nop * 4010e2: 90[ ]+nop * - 4010e3: 48 8d 80 80 ff ff ff[ ]+lea 0xf+80\(%rax\),%rax + 4010e3: 48 8d 80 80 ff ff ff[ ]+lea -0x80\(%rax\),%rax # sl1 4010ea: 90[ ]+nop * 4010eb: 90[ ]+nop * @@ -135,7 +135,7 @@ Disassembly of section .text: 4010f5: 00 00 * 4010f7: 90[ ]+nop * 4010f8: 90[ ]+nop * - 4010f9: 48 8d 89 a0 ff ff ff[ ]+lea 0xf+a0\(%rcx\),%rcx + 4010f9: 48 8d 89 a0 ff ff ff[ ]+lea -0x60\(%rcx\),%rcx # sh1 401100: 90[ ]+nop * 401101: 90[ ]+nop * @@ -143,7 +143,7 @@ Disassembly of section .text: 401103: 90[ ]+nop * # Direct access through %fs # IE against global var - 401104: 48 8b 0d c5 02 10 00[ ]+mov 1049285\(%rip\),%rcx +# 5013d0 <.*> + 401104: 48 8b 0d c5 02 20 00[ ]+mov 0x2002c5\(%rip\),%rcx +# 6013d0 <.*> # -> R_X86_64_TPOFF64 sG5 40110b: 90[ ]+nop * 40110c: 90[ ]+nop * @@ -186,7 +186,7 @@ Disassembly of section .text: 401147: 00 00 * 401149: 90[ ]+nop * 40114a: 90[ ]+nop * - 40114b: 4c 03 1d 8e 02 10 00[ ]+add 1049230\(%rip\),%r11 +# 5013e0 <.*> + 40114b: 4c 03 1d 8e 02 20 00[ ]+add 0x20028e\(%rip\),%r11 +# 6013e0 <.*> # -> R_X86_64_TPOFF64 sG6 401152: 90[ ]+nop * 401153: 90[ ]+nop * @@ -197,7 +197,7 @@ Disassembly of section .text: 40115d: 00 00 * 40115f: 90[ ]+nop * 401160: 90[ ]+nop * - 401161: 48 8d 92 d4 ff ff ff[ ]+lea 0xf+d4\(%rdx\),%rdx + 401161: 48 8d 92 d4 ff ff ff[ ]+lea -0x2c\(%rdx\),%rdx # bg6 401168: 90[ ]+nop * 401169: 90[ ]+nop * @@ -229,7 +229,7 @@ Disassembly of section .text: 40119a: 00 00 * 40119c: 90[ ]+nop * 40119d: 90[ ]+nop * - 40119e: 48 8d 92 b4 ff ff ff[ ]+lea 0xf+b4\(%rdx\),%rdx + 40119e: 48 8d 92 b4 ff ff ff[ ]+lea -0x4c\(%rdx\),%rdx # sh6 4011a5: 90[ ]+nop * 4011a6: 90[ ]+nop * @@ -250,7 +250,7 @@ Disassembly of section .text: 4011c1: 00 00 * 4011c3: 90[ ]+nop * 4011c4: 90[ ]+nop * - 4011c5: 48 8d 90 64 ff ff ff[ ]+lea 0xf+64\(%rax\),%rdx + 4011c5: 48 8d 90 64 ff ff ff[ ]+lea -0x9c\(%rax\),%rdx # sg2 4011cc: 90[ ]+nop * 4011cd: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlsbin.rd b/ld/testsuite/ld-x86-64/tlsbin.rd index dc3ef22b389bc..915208a28a0cf 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.rd +++ b/ld/testsuite/ld-x86-64/tlsbin.rd @@ -18,11 +18,11 @@ Section Headers: \[ 6\] .rela.plt +.* \[ 7\] .plt +.* \[ 8\] .text +PROGBITS +0+401000 0+1000 0+22a 00 +AX +0 +0 +4096 - \[ 9\] .tdata +PROGBITS +0+50122a 0+122a 0+60 00 WAT +0 +0 +1 - \[10\] .tbss +NOBITS +0+50128a 0+128a 0+40 00 WAT +0 +0 +1 - \[11\] .dynamic +DYNAMIC +0+501290 0+1290 0+140 10 +WA +4 +0 +8 - \[12\] .got +PROGBITS +0+5013d0 0+13d0 0+20 08 +WA +0 +0 +8 - \[13\] .got.plt +PROGBITS +0+5013f0 0+13f0 0+20 08 +WA +0 +0 +8 + \[ 9\] .tdata +PROGBITS +0+60122a 0+122a 0+60 00 WAT +0 +0 +1 + \[10\] .tbss +NOBITS +0+60128a 0+128a 0+40 00 WAT +0 +0 +1 + \[11\] .dynamic +DYNAMIC +0+601290 0+1290 0+140 10 +WA +4 +0 +8 + \[12\] .got +PROGBITS +0+6013d0 0+13d0 0+20 08 +WA +0 +0 +8 + \[13\] .got.plt +PROGBITS +0+6013f0 0+13f0 0+20 08 +WA +0 +0 +8 \[14\] .shstrtab +.* \[15\] .symtab +.* \[16\] .strtab +.* @@ -40,10 +40,10 @@ Program Headers: PHDR.* INTERP.* .*Requesting program interpreter.* - LOAD +0x0+ 0x0+400000 0x0+400000 0x0+122a 0x0+122a R E 0x100000 - LOAD +0x0+122a 0x0+50122a 0x0+50122a 0x0+1e6 0x0+1e6 RW 0x100000 - DYNAMIC +0x0+1290 0x0+501290 0x0+501290 0x0+140 0x0+140 RW 0x8 - TLS +0x0+122a 0x0+50122a 0x0+50122a 0x0+60 0x0+a0 R +0x1 + LOAD +0x0+ 0x0+400000 0x0+400000 0x0+122a 0x0+122a R E 0x200000 + LOAD +0x0+122a 0x0+60122a 0x0+60122a 0x0+1e6 0x0+1e6 RW 0x200000 + DYNAMIC +0x0+1290 0x0+601290 0x0+601290 0x0+140 0x0+140 RW 0x8 + TLS +0x0+122a 0x0+60122a 0x0+60122a 0x0+60 0x0+a0 R +0x1 Section to Segment mapping: Segment Sections... @@ -77,7 +77,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE GLOBAL DEFAULT ABS _edata .* NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 69 entries: +Symbol table '.symtab' contains 66 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE LOCAL DEFAULT UND * .* SECTION LOCAL DEFAULT +1 * @@ -93,9 +93,6 @@ Symbol table '.symtab' contains 69 entries: .* SECTION LOCAL DEFAULT +11 * .* SECTION LOCAL DEFAULT +12 * .* SECTION LOCAL DEFAULT +13 * -.* SECTION LOCAL DEFAULT +14 * -.* SECTION LOCAL DEFAULT +15 * -.* SECTION LOCAL DEFAULT +16 * .* TLS +LOCAL DEFAULT +9 sl1 .* TLS +LOCAL DEFAULT +9 sl2 .* TLS +LOCAL DEFAULT +9 sl3 diff --git a/ld/testsuite/ld-x86-64/tlsbin.sd b/ld/testsuite/ld-x86-64/tlsbin.sd index 8095b5967088e..7fbc5654d1f7a 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.sd +++ b/ld/testsuite/ld-x86-64/tlsbin.sd @@ -8,5 +8,5 @@ .*: +file format elf64-x86-64 Contents of section .got: - 5013d0 00000000 00000000 00000000 00000000 .* - 5013e0 00000000 00000000 00000000 00000000 .* + 6013d0 00000000 00000000 00000000 00000000 .* + 6013e0 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbin.td b/ld/testsuite/ld-x86-64/tlsbin.td index e0d75981f3fc9..b3851dece6e67 100644 --- a/ld/testsuite/ld-x86-64/tlsbin.td +++ b/ld/testsuite/ld-x86-64/tlsbin.td @@ -8,9 +8,9 @@ .*: +file format elf64-x86-64 Contents of section .tdata: - 50122a 11000000 12000000 13000000 14000000 .* - 50123a 15000000 16000000 17000000 18000000 .* - 50124a 41000000 42000000 43000000 44000000 .* - 50125a 45000000 46000000 47000000 48000000 .* - 50126a 01010000 02010000 03010000 04010000 .* - 50127a 05010000 06010000 07010000 08010000 .* + 60122a 11000000 12000000 13000000 14000000 .* + 60123a 15000000 16000000 17000000 18000000 .* + 60124a 41000000 42000000 43000000 44000000 .* + 60125a 45000000 46000000 47000000 48000000 .* + 60126a 01010000 02010000 03010000 04010000 .* + 60127a 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.dd b/ld/testsuite/ld-x86-64/tlsbindesc.dd index c41efecf29397..4cfba5e2466b8 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.dd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.dd @@ -22,20 +22,18 @@ Disassembly of section .text: [0-9a-f]+: 55[ ]+push %rbp [0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp # GD -> IE because variable is not defined in executable - [0-9a-f]+: 48 8b 05 65 03 10 00[ ]+mov 1049445\(%rip\),%rax +# 501370 <.*> + [0-9a-f]+: 48 8b 05 65 03 20 00[ ]+mov 0x200365\(%rip\),%rax +# 601370 <.*> # -> R_X86_64_TPOFF64 sG1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is not defined in executable where # the variable is referenced through IE too - [0-9a-f]+: 48 8b 05 48 03 10 00[ ]+mov 1049416\(%rip\),%rax +# 501360 <.*> + [0-9a-f]+: 48 8b 05 48 03 20 00[ ]+mov 0x200348\(%rip\),%rax +# 601360 <.*> # -> R_X86_64_TPOFF64 sG2 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -43,8 +41,7 @@ Disassembly of section .text: # GD -> LE with global variable defined in executable [0-9a-f]+: 48 c7 c0 60 ff ff ff[ ]+mov \$0xf+60,%rax # sg1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -52,8 +49,7 @@ Disassembly of section .text: # GD -> LE with local variable defined in executable [0-9a-f]+: 48 c7 c0 80 ff ff ff[ ]+mov \$0xf+80,%rax # sl1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -61,34 +57,32 @@ Disassembly of section .text: # GD -> LE with hidden variable defined in executable [0-9a-f]+: 48 c7 c0 a0 ff ff ff[ ]+mov \$0xf+a0,%rax # sh1 - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD -> LE [0-9a-f]+: 48 c7 c0 60 ff ff ff[ ]+mov \$0xf+60,%rax + [0-9a-f]+: 66 90[ ]+xchg %ax,%ax [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 90 81 ff ff ff[ ]+lea 0xf+81\(%rax\),%rdx + [0-9a-f]+: 48 8d 90 81 ff ff ff[ ]+lea -0x7f\(%rax\),%rdx # sl1+1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4c 8d 88 86 ff ff ff[ ]+lea 0xf+86\(%rax\),%r9 + [0-9a-f]+: 4c 8d 88 86 ff ff ff[ ]+lea -0x7a\(%rax\),%r9 # sl2+2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * # LD -> LE against hidden variables - [0-9a-f]+: 48 8d 90 a0 ff ff ff[ ]+lea 0xf+a0\(%rax\),%rdx + [0-9a-f]+: 48 8d 90 a0 ff ff ff[ ]+lea -0x60\(%rax\),%rdx # sh1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 88 a7 ff ff ff[ ]+lea 0xf+a7\(%rax\),%rcx + [0-9a-f]+: 48 8d 88 a7 ff ff ff[ ]+lea -0x59\(%rax\),%rcx # sh2+3 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -99,7 +93,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4c 03 0d d6 02 10 00[ ]+add 1049302\(%rip\),%r9 +# 501360 <.*> + [0-9a-f]+: 4c 03 0d d6 02 20 00[ ]+add 0x2002d6\(%rip\),%r9 +# 601360 <.*> # -> R_X86_64_TPOFF64 sG2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -110,7 +104,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4d 8d 92 60 ff ff ff[ ]+lea 0xf+60\(%r10\),%r10 + [0-9a-f]+: 4d 8d 92 60 ff ff ff[ ]+lea -0xa0\(%r10\),%r10 # sg1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -121,7 +115,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 80 80 ff ff ff[ ]+lea 0xf+80\(%rax\),%rax + [0-9a-f]+: 48 8d 80 80 ff ff ff[ ]+lea -0x80\(%rax\),%rax # sl1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -132,7 +126,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 89 a0 ff ff ff[ ]+lea 0xf+a0\(%rcx\),%rcx + [0-9a-f]+: 48 8d 89 a0 ff ff ff[ ]+lea -0x60\(%rcx\),%rcx # sh1 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -140,7 +134,7 @@ Disassembly of section .text: [0-9a-f]+: 90[ ]+nop * # Direct access through %fs # IE against global var - [0-9a-f]+: 48 8b 0d 81 02 10 00[ ]+mov 1049217\(%rip\),%rcx +# 501358 <.*> + [0-9a-f]+: 48 8b 0d 81 02 20 00[ ]+mov 0x200281\(%rip\),%rcx +# 601358 <.*> # -> R_X86_64_TPOFF64 sG5 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -183,7 +177,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 4c 03 1d 4a 02 10 00[ ]+add 1049162\(%rip\),%r11 +# 501368 <.*> + [0-9a-f]+: 4c 03 1d 4a 02 20 00[ ]+add 0x20024a\(%rip\),%r11 +# 601368 <.*> # -> R_X86_64_TPOFF64 sG6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -194,7 +188,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 92 d4 ff ff ff[ ]+lea 0xf+d4\(%rdx\),%rdx + [0-9a-f]+: 48 8d 92 d4 ff ff ff[ ]+lea -0x2c\(%rdx\),%rdx # bg6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -226,7 +220,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 92 b4 ff ff ff[ ]+lea 0xf+b4\(%rdx\),%rdx + [0-9a-f]+: 48 8d 92 b4 ff ff ff[ ]+lea -0x4c\(%rdx\),%rdx # sh6 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * @@ -247,7 +241,7 @@ Disassembly of section .text: [0-9a-f]+: 00 00 * [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * - [0-9a-f]+: 48 8d 90 64 ff ff ff[ ]+lea 0xf+64\(%rax\),%rdx + [0-9a-f]+: 48 8d 90 64 ff ff ff[ ]+lea -0x9c\(%rax\),%rdx # sg2 [0-9a-f]+: 90[ ]+nop * [0-9a-f]+: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.rd b/ld/testsuite/ld-x86-64/tlsbindesc.rd index 787002d189950..ae2e80f6f027f 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.rd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.rd @@ -16,11 +16,11 @@ Section Headers: \[ 4\] .dynstr +.* \[ 5\] .rela.dyn +.* \[ 6\] .text +PROGBITS +0+401000 0+1000 0+1f6 00 +AX +0 +0 +4096 - \[ 7\] .tdata +PROGBITS +0+5011f6 0+11f6 0+60 00 WAT +0 +0 +1 - \[ 8\] .tbss +NOBITS +0+501256 0+1256 0+40 00 WAT +0 +0 +1 - \[ 9\] .dynamic +DYNAMIC +0+501258 0+1258 0+100 10 +WA +4 +0 +8 - \[10\] .got +PROGBITS +0+501358 0+1358 0+20 08 +WA +0 +0 +8 - \[11\] .got.plt +PROGBITS +0+501378 0+1378 0+18 08 +WA +0 +0 +8 + \[ 7\] .tdata +PROGBITS +0+6011f6 0+11f6 0+60 00 WAT +0 +0 +1 + \[ 8\] .tbss +NOBITS +0+601256 0+1256 0+40 00 WAT +0 +0 +1 + \[ 9\] .dynamic +DYNAMIC +0+601258 0+1258 0+100 10 +WA +4 +0 +8 + \[10\] .got +PROGBITS +0+601358 0+1358 0+20 08 +WA +0 +0 +8 + \[11\] .got.plt +PROGBITS +0+601378 0+1378 0+18 08 +WA +0 +0 +8 \[12\] .shstrtab +.* \[13\] .symtab +.* \[14\] .strtab +.* @@ -38,10 +38,10 @@ Program Headers: PHDR.* INTERP.* .*Requesting program interpreter.* - LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11f6 0x0+11f6 R E 0x100000 - LOAD +0x0+11f6 0x0+5011f6 0x0+5011f6 0x0+19a 0x0+19a RW 0x100000 - DYNAMIC +0x0+1258 0x0+501258 0x0+501258 0x0+100 0x0+100 RW 0x8 - TLS +0x0+11f6 0x0+5011f6 0x0+5011f6 0x0+60 0x0+a0 R +0x1 + LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11f6 0x0+11f6 R E 0x200000 + LOAD +0x0+11f6 0x0+6011f6 0x0+6011f6 0x0+19a 0x0+19a RW 0x200000 + DYNAMIC +0x0+1258 0x0+601258 0x0+601258 0x0+100 0x0+100 RW 0x8 + TLS +0x0+11f6 0x0+6011f6 0x0+6011f6 0x0+60 0x0+a0 R +0x1 Section to Segment mapping: Segment Sections... @@ -54,10 +54,10 @@ Program Headers: Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend -0+501358 0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 -0+501360 0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 -0+501368 0+400000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 -0+501370 0+500000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 +0+601358 0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0 +0+601360 0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0 +0+601368 0+400000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0 +0+601370 0+500000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0 Symbol table '.dynsym' contains 8 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name @@ -70,7 +70,7 @@ Symbol table '.dynsym' contains 8 entries: +[0-9]+: 0+[0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata +[0-9]+: 0+[0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 67 entries: +Symbol table '.symtab' contains 64 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -84,9 +84,6 @@ Symbol table '.symtab' contains 67 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +7 sl1 +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +7 sl2 +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +7 sl3 @@ -104,8 +101,8 @@ Symbol table '.symtab' contains 67 entries: +[0-9]+: 0+98 +0 TLS +LOCAL DEFAULT +8 bl7 +[0-9]+: 0+9c +0 TLS +LOCAL DEFAULT +8 bl8 +[0-9]+: 0+0 +0 TLS +LOCAL HIDDEN +7 _TLS_MODULE_BASE_ - +[0-9]+: 0+501258 +0 OBJECT LOCAL HIDDEN 9 _DYNAMIC - +[0-9]+: 0+501378 +0 OBJECT LOCAL HIDDEN 11 _GLOBAL_OFFSET_TABLE_ + +[0-9]+: 0+601258 +0 OBJECT LOCAL HIDDEN 9 _DYNAMIC + +[0-9]+: 0+601378 +0 OBJECT LOCAL HIDDEN 11 _GLOBAL_OFFSET_TABLE_ +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +7 sg8 +[0-9]+: 0+7c +0 TLS +GLOBAL DEFAULT +8 bg8 +[0-9]+: 0+74 +0 TLS +GLOBAL DEFAULT +8 bg6 diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.sd b/ld/testsuite/ld-x86-64/tlsbindesc.sd index fd0519fb92990..f622bc4730049 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.sd +++ b/ld/testsuite/ld-x86-64/tlsbindesc.sd @@ -8,5 +8,5 @@ .*: +file format elf64-x86-64 Contents of section .got: - 501358 00000000 00000000 00000000 00000000 .* - 501368 00000000 00000000 00000000 00000000 .* + 601358 00000000 00000000 00000000 00000000 .* + 601368 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.td b/ld/testsuite/ld-x86-64/tlsbindesc.td index 226e52e628027..b2a3ebec1ada6 100644 --- a/ld/testsuite/ld-x86-64/tlsbindesc.td +++ b/ld/testsuite/ld-x86-64/tlsbindesc.td @@ -8,9 +8,9 @@ .*: +file format elf64-x86-64 Contents of section .tdata: - 5011f6 11000000 12000000 13000000 14000000 .* - 501206 15000000 16000000 17000000 18000000 .* - 501216 41000000 42000000 43000000 44000000 .* - 501226 45000000 46000000 47000000 48000000 .* - 501236 01010000 02010000 03010000 04010000 .* - 501246 05010000 06010000 07010000 08010000 .* + 6011f6 11000000 12000000 13000000 14000000 .* + 601206 15000000 16000000 17000000 18000000 .* + 601216 41000000 42000000 43000000 44000000 .* + 601226 45000000 46000000 47000000 48000000 .* + 601236 01010000 02010000 03010000 04010000 .* + 601246 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.dd b/ld/testsuite/ld-x86-64/tlsdesc.dd index 656e2411c66eb..9b0ae6109157b 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.dd +++ b/ld/testsuite/ld-x86-64/tlsdesc.dd @@ -17,7 +17,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD - +[0-9a-f]+: 48 8d 05 89 03 10 00[ ]+lea 1049481\(%rip\),%rax +# 101398 <.*> + +[0-9a-f]+: 48 8d 05 89 03 20 00[ ]+lea 0x200389\(%rip\),%rax +# 201398 <.*> # -> R_X86_64_TLSDESC sg1 +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -25,16 +25,15 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE because variable is referenced through IE too - +[0-9a-f]+: 48 8b 05 1c 03 10 00[ ]+mov 1049372\(%rip\),%rax +# 101338 <.*> + +[0-9a-f]+: 48 8b 05 1c 03 20 00[ ]+mov 0x20031c\(%rip\),%rax +# 201338 <.*> # -> R_X86_64_TPOFF64 sg2 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD against local variable - +[0-9a-f]+: 48 8d 05 3f 03 10 00[ ]+lea 1049407\(%rip\),%rax +# 101368 <.*> + +[0-9a-f]+: 48 8d 05 3f 03 20 00[ ]+lea 0x20033f\(%rip\),%rax +# 201368 <.*> # -> R_X86_64_TLSDESC [0 0x2000000000000000] +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -42,16 +41,15 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE against local variable referenced through IE too - +[0-9a-f]+: 48 8b 05 d2 02 10 00[ ]+mov 1049298\(%rip\),%rax +# 101308 <.*> + +[0-9a-f]+: 48 8b 05 d2 02 20 00[ ]+mov 0x2002d2\(%rip\),%rax +# 201308 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x24 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD against hidden and local variable - +[0-9a-f]+: 48 8d 05 65 03 10 00[ ]+lea 1049445\(%rip\),%rax +# 1013a8 <.*> + +[0-9a-f]+: 48 8d 05 65 03 20 00[ ]+lea 0x200365\(%rip\),%rax +# 2013a8 <.*> # -> R_X86_64_TLSDESC [0 0x4000000000000000] +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -59,16 +57,15 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden and local variable referenced through IE too - +[0-9a-f]+: 48 8b 05 f0 02 10 00[ ]+mov 1049328\(%rip\),%rax +# 101340 <.*> + +[0-9a-f]+: 48 8b 05 f0 02 20 00[ ]+mov 0x2002f0\(%rip\),%rax +# 201340 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x44 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD against hidden but not local variable - +[0-9a-f]+: 48 8d 05 1b 03 10 00[ ]+lea 1049371\(%rip\),%rax +# 101378 <.*> + +[0-9a-f]+: 48 8d 05 1b 03 20 00[ ]+lea 0x20031b\(%rip\),%rax +# 201378 <.*> # -> R_X86_64_TLSDESC [0 0x6000000000000000] +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -76,16 +73,15 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE against hidden but not local variable referenced through IE too - +[0-9a-f]+: 48 8b 05 ae 02 10 00[ ]+mov 1049262\(%rip\),%rax +# 101318 <.*> + +[0-9a-f]+: 48 8b 05 ae 02 20 00[ ]+mov 0x2002ae\(%rip\),%rax +# 201318 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x64 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # LD - +[0-9a-f]+: 48 8d 05 11 03 10 00[ ]+lea 1049361\(%rip\),%rax +# 101388 <.*> + +[0-9a-f]+: 48 8d 05 11 03 20 00[ ]+lea 0x200311\(%rip\),%rax +# 201388 <.*> # -> R_X86_64_TLSDESC [0 0x000000000000000] +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -119,7 +115,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 71 02 10 00[ ]+add 1049201\(%rip\),%rcx +# 101338 <.*> + +[0-9a-f]+: 48 03 0d 71 02 20 00[ ]+add 0x200271\(%rip\),%rcx +# 201338 <.*> # -> R_X86_64_TPOFF64 sg2 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -130,7 +126,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 4c 03 35 2b 02 10 00[ ]+add 1049131\(%rip\),%r14 +# 101308 <.*> + +[0-9a-f]+: 4c 03 35 2b 02 20 00[ ]+add 0x20022b\(%rip\),%r14 +# 201308 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x24 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -141,7 +137,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 4d 02 10 00[ ]+add 1049165\(%rip\),%rcx +# 101340 <.*> + +[0-9a-f]+: 48 03 0d 4d 02 20 00[ ]+add 0x20024d\(%rip\),%rcx +# 201340 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x44 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -152,7 +148,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 0f 02 10 00[ ]+add 1049103\(%rip\),%rcx +# 101318 <.*> + +[0-9a-f]+: 48 03 0d 0f 02 20 00[ ]+add 0x20020f\(%rip\),%rcx +# 201318 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x64 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -160,7 +156,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * # Direct access through %fs # IE against global var - +[0-9a-f]+: 48 8b 0d 0c 02 10 00[ ]+mov 1049100\(%rip\),%rcx +# 101320 <.*> + +[0-9a-f]+: 48 8b 0d 0c 02 20 00[ ]+mov 0x20020c\(%rip\),%rcx +# 201320 <.*> # -> R_X86_64_TPOFF64 sg5 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -170,7 +166,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # IE against local var - +[0-9a-f]+: 4c 8b 15 eb 01 10 00[ ]+mov 1049067\(%rip\),%r10 +# 101310 <.*> + +[0-9a-f]+: 4c 8b 15 eb 01 20 00[ ]+mov 0x2001eb\(%rip\),%r10 +# 201310 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x30 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -180,7 +176,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # IE against hidden and local var - +[0-9a-f]+: 48 8b 15 f2 01 10 00[ ]+mov 1049074\(%rip\),%rdx +# 101328 <.*> + +[0-9a-f]+: 48 8b 15 f2 01 20 00[ ]+mov 0x2001f2\(%rip\),%rdx +# 201328 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x50 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -190,7 +186,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # IE against hidden but not local var - +[0-9a-f]+: 48 8b 0d e9 01 10 00[ ]+mov 1049065\(%rip\),%rcx +# 101330 <.*> + +[0-9a-f]+: 48 8b 0d e9 01 20 00[ ]+mov 0x2001e9\(%rip\),%rcx +# 201330 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x70 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlsdesc.pd b/ld/testsuite/ld-x86-64/tlsdesc.pd index aea1bab46ba8d..bf3bc2f7be8bc 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.pd +++ b/ld/testsuite/ld-x86-64/tlsdesc.pd @@ -9,18 +9,12 @@ Disassembly of section .plt: -0000000000000470 <.*@plt-0x10>: - 470: ff 35 e2 0e 10 00 pushq 1052386\(%rip\) # 101358 <_GLOBAL_OFFSET_TABLE_\+0x8> - 476: ff 25 e4 0e 10 00 jmpq \*1052388\(%rip\) # 101360 <_GLOBAL_OFFSET_TABLE_\+0x10> - 47c: 90 nop * - 47d: 90 nop * - 47e: 90 nop * - 47f: 90 nop * -0000000000000480 <.*@plt>: - 480: ff 35 d2 0e 10 00 pushq 1052370\(%rip\) # 101358 <_GLOBAL_OFFSET_TABLE_\+0x8> - 486: ff 25 bc 0e 10 00 jmpq \*1052348\(%rip\) # 101348 <_DYNAMIC\+0x190> - 48c: 90 nop * - 48d: 90 nop * - 48e: 90 nop * - 48f: 90 nop * +[0-9a-f]+ <.*@plt-0x10>: + [0-9a-f]+: ff 35 .. .. 20 00 pushq .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8> + [0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10> + [0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\) +[0-9a-f]+ <.*@plt>: + [0-9a-f]+: ff 35 .. .. 20 00 pushq .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8> + [0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201348 <_DYNAMIC\+0x190> + [0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\) diff --git a/ld/testsuite/ld-x86-64/tlsdesc.rd b/ld/testsuite/ld-x86-64/tlsdesc.rd index e7e21ed1d75d2..20aa075d0b907 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.rd +++ b/ld/testsuite/ld-x86-64/tlsdesc.rd @@ -15,13 +15,13 @@ Section Headers: \[ 3\] .dynstr +.* \[ 4\] .rela.dyn +.* \[ 5\] .rela.plt +.* - \[ 6\] .plt +PROGBITS +0+470 0+470 0+20 10 +AX +0 +0 +4 + \[ 6\] .plt +PROGBITS +0+450 0+450 0+20 10 +AX +0 +0 +4 \[ 7\] .text +PROGBITS +0+1000 0+1000 0+154 00 +AX +0 +0 4096 - \[ 8\] .tdata +PROGBITS +0+101154 0+1154 0+60 00 WAT +0 +0 +1 - \[ 9\] .tbss +NOBITS +0+1011b4 0+11b4 0+20 00 WAT +0 +0 +1 - \[10\] .dynamic +DYNAMIC +0+1011b8 0+11b8 0+150 10 +WA +3 +0 +8 - \[11\] .got +PROGBITS +0+101308 0+1308 0+48 08 +WA +0 +0 +8 - \[12\] .got.plt +PROGBITS +0+101350 0+1350 0+68 08 +WA +0 +0 +8 + \[ 8\] .tdata +PROGBITS +0+201154 0+1154 0+60 00 WAT +0 +0 +1 + \[ 9\] .tbss +NOBITS +0+2011b4 0+11b4 0+20 00 WAT +0 +0 +1 + \[10\] .dynamic +DYNAMIC +0+2011b8 0+11b8 0+150 10 +WA +3 +0 +8 + \[11\] .got +PROGBITS +0+201308 0+1308 0+48 08 +WA +0 +0 +8 + \[12\] .got.plt +PROGBITS +0+201350 0+1350 0+68 08 +WA +0 +0 +8 \[13\] .shstrtab +.* \[14\] .symtab +.* \[15\] .strtab +.* @@ -36,10 +36,10 @@ There are 4 program headers, starting at offset [0-9]+ Program Headers: Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align - LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x100000 - LOAD +0x0+1154 0x0+101154 0x0+101154 0x0+264 0x0+264 RW +0x100000 - DYNAMIC +0x0+11b8 0x0+1011b8 0x0+1011b8 0x0+150 0x0+150 RW +0x8 - TLS +0x0+1154 0x0+101154 0x0+101154 0x0+60 0x0+80 R +0x1 + LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x200000 + LOAD +0x0+1154 0x0+201154 0x0+201154 0x0+264 0x0+264 RW +0x200000 + DYNAMIC +0x0+11b8 0x0+2011b8 0x0+2011b8 0x0+150 0x0+150 RW +0x8 + TLS +0x0+1154 0x0+201154 0x0+201154 0x0+60 0x0+80 R +0x1 Section to Segment mapping: Segment Sections... @@ -59,8 +59,8 @@ Dynamic section at offset 0x[0-9a-f]+ contains 16 entries: 0x[0-9a-f]+ +\(PLTRELSZ\).* 0x[0-9a-f]+ +\(PLTREL\).* 0x[0-9a-f]+ +\(JMPREL\).* - 0x[0-9a-f]+ +\(TLSDESC_PLT\) +0x480 - 0x[0-9a-f]+ +\(TLSDESC_GOT\) +0x101348 + 0x[0-9a-f]+ +\(TLSDESC_PLT\) +0x460 + 0x[0-9a-f]+ +\(TLSDESC_GOT\) +0x201348 0x[0-9a-f]+ +\(RELA\).* 0x[0-9a-f]+ +\(RELASZ\).* 0x[0-9a-f]+ +\(RELAENT\).* @@ -69,29 +69,28 @@ Dynamic section at offset 0x[0-9a-f]+ contains 16 entries: Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries: +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend -0+101308 0+12 R_X86_64_TPOFF64 +0+24 -0+101310 0+12 R_X86_64_TPOFF64 +0+30 -0+101318 0+12 R_X86_64_TPOFF64 +0+64 -0+101328 0+12 R_X86_64_TPOFF64 +0+50 -0+101330 0+12 R_X86_64_TPOFF64 +0+70 -0+101340 0+12 R_X86_64_TPOFF64 +0+44 -0+101320 0+700000012 R_X86_64_TPOFF64 +0+10 sg5 \+ 0 -0+101338 0+b00000012 R_X86_64_TPOFF64 +0+4 sg2 \+ 0 +0+201308 [0-9a-f]+ R_X86_64_TPOFF64 +0+24 +0+201310 [0-9a-f]+ R_X86_64_TPOFF64 +0+30 +0+201318 [0-9a-f]+ R_X86_64_TPOFF64 +0+64 +0+201328 [0-9a-f]+ R_X86_64_TPOFF64 +0+50 +0+201330 [0-9a-f]+ R_X86_64_TPOFF64 +0+70 +0+201340 [0-9a-f]+ R_X86_64_TPOFF64 +0+44 +0+201320 [0-9a-f]+ R_X86_64_TPOFF64 +0+10 sg5 \+ 0 +0+201338 [0-9a-f]+ R_X86_64_TPOFF64 +0+4 sg2 \+ 0 Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 5 entries: +Offset +Info +Type +Symbol's Value Symbol's Name \+ Addend -0+101398 0+800000024 R_X86_64_TLSDESC +0+ sg1 \+ 0 -0+101368 0+24 R_X86_64_TLSDESC +0+20 -0+1013a8 0+24 R_X86_64_TLSDESC +0+40 -0+101378 0+24 R_X86_64_TLSDESC +0+60 -0+101388 0+24 R_X86_64_TLSDESC +0+ +0+201398 [0-9a-f]+ R_X86_64_TLSDESC +0+ sg1 \+ 0 +0+201368 [0-9a-f]+ R_X86_64_TLSDESC +0+20 +0+2013a8 [0-9a-f]+ R_X86_64_TLSDESC +0+40 +0+201378 [0-9a-f]+ R_X86_64_TLSDESC +0+60 +0+201388 [0-9a-f]+ R_X86_64_TLSDESC +0+ -Symbol table '.dynsym' contains 16 entries: +Symbol table '.dynsym' contains [0-9]+ entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +7 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +8 sg8 +[0-9]+: 0+8 +0 TLS +GLOBAL DEFAULT +8 sg3 +[0-9]+: 0+c +0 TLS +GLOBAL DEFAULT +8 sg4 @@ -105,7 +104,7 @@ Symbol table '.dynsym' contains 16 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 55 entries: +Symbol table '.symtab' contains 52 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -120,9 +119,6 @@ Symbol table '.symtab' contains 55 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +14 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +15 * +[0-9]+: 0+20 +0 TLS +LOCAL DEFAULT +8 sl1 +[0-9]+: 0+24 +0 TLS +LOCAL DEFAULT +8 sl2 +[0-9]+: 0+28 +0 TLS +LOCAL DEFAULT +8 sl3 @@ -133,7 +129,7 @@ Symbol table '.symtab' contains 55 entries: +[0-9]+: 0+3c +0 TLS +LOCAL DEFAULT +8 sl8 +[0-9]+: 0+60 +0 TLS +LOCAL HIDDEN +9 sH1 +[0-9]+: 0+ +0 TLS +LOCAL HIDDEN +8 _TLS_MODULE_BASE_ - +[0-9]+: 0+1011b8 +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC + +[0-9]+: 0+2011b8 +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC +[0-9]+: 0+48 +0 TLS +LOCAL HIDDEN +8 sh3 +[0-9]+: 0+64 +0 TLS +LOCAL HIDDEN +9 sH2 +[0-9]+: 0+78 +0 TLS +LOCAL HIDDEN +9 sH7 @@ -147,7 +143,7 @@ Symbol table '.symtab' contains 55 entries: +[0-9]+: 0+74 +0 TLS +LOCAL HIDDEN +9 sH6 +[0-9]+: 0+7c +0 TLS +LOCAL HIDDEN +9 sH8 +[0-9]+: 0+40 +0 TLS +LOCAL HIDDEN +8 sh1 - +[0-9]+: 0+101350 +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ + +[0-9]+: 0+201350 +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ +[0-9]+: 0+44 +0 TLS +LOCAL HIDDEN +8 sh2 +[0-9]+: 0+54 +0 TLS +LOCAL HIDDEN +8 sh6 +[0-9]+: 0+1c +0 TLS +GLOBAL DEFAULT +8 sg8 diff --git a/ld/testsuite/ld-x86-64/tlsdesc.sd b/ld/testsuite/ld-x86-64/tlsdesc.sd index 8eb5d9cd5728d..7eb474a9d7926 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.sd +++ b/ld/testsuite/ld-x86-64/tlsdesc.sd @@ -8,16 +8,16 @@ .*: +file format elf64-x86-64 Contents of section \.got: - 101308 00000000 00000000 00000000 00000000 .* - 101318 00000000 00000000 00000000 00000000 .* - 101328 00000000 00000000 00000000 00000000 .* - 101338 00000000 00000000 00000000 00000000 .* - 101348 00000000 00000000 .* + 201308 00000000 00000000 00000000 00000000 .* + 201318 00000000 00000000 00000000 00000000 .* + 201328 00000000 00000000 00000000 00000000 .* + 201338 00000000 00000000 00000000 00000000 .* + 201348 00000000 00000000 .* Contents of section \.got\.plt: - 101350 b8111000 00000000 00000000 00000000 .* - 101360 00000000 00000000 00000000 00000000 .* - 101370 00000000 00000000 00000000 00000000 .* - 101380 00000000 00000000 00000000 00000000 .* - 101390 00000000 00000000 00000000 00000000 .* - 1013a0 00000000 00000000 00000000 00000000 .* - 1013b0 00000000 00000000 .* + 201350 b8112000 00000000 00000000 00000000 .* + 201360 00000000 00000000 00000000 00000000 .* + 201370 00000000 00000000 00000000 00000000 .* + 201380 00000000 00000000 00000000 00000000 .* + 201390 00000000 00000000 00000000 00000000 .* + 2013a0 00000000 00000000 00000000 00000000 .* + 2013b0 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlsdesc.td b/ld/testsuite/ld-x86-64/tlsdesc.td index dd79816c4aa23..6b8098c80f552 100644 --- a/ld/testsuite/ld-x86-64/tlsdesc.td +++ b/ld/testsuite/ld-x86-64/tlsdesc.td @@ -8,9 +8,9 @@ .*: +file format elf64-x86-64 Contents of section .tdata: - 101154 11000000 12000000 13000000 14000000 .* - 101164 15000000 16000000 17000000 18000000 .* - 101174 41000000 42000000 43000000 44000000 .* - 101184 45000000 46000000 47000000 48000000 .* - 101194 01010000 02010000 03010000 04010000 .* - 1011a4 05010000 06010000 07010000 08010000 .* + 201154 11000000 12000000 13000000 14000000 .* + 201164 15000000 16000000 17000000 18000000 .* + 201174 41000000 42000000 43000000 44000000 .* + 201184 45000000 46000000 47000000 48000000 .* + 201194 01010000 02010000 03010000 04010000 .* + 2011a4 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.dd b/ld/testsuite/ld-x86-64/tlsgdesc.dd index b0e7c05844045..fab88e7bdfcbc 100644 --- a/ld/testsuite/ld-x86-64/tlsgdesc.dd +++ b/ld/testsuite/ld-x86-64/tlsgdesc.dd @@ -20,7 +20,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 5e 02 10 00[ ]+add 1049182\(%rip\),%rcx +# 100660 <.*> + +[0-9a-f]+: 48 03 0d 5e 02 20 00[ ]+add 0x20025e\(%rip\),%rcx +# 200660 <.*> # -> R_X86_64_TPOFF64 sG3 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -31,14 +31,14 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 68 02 10 00[ ]+add 1049192\(%rip\),%rcx +# 100680 <.*> + +[0-9a-f]+: 48 03 0d 68 02 20 00[ ]+add 0x200268\(%rip\),%rcx +# 200680 <.*> # -> R_X86_64_TPOFF64 sG4 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD, gd first - +[0-9a-f]+: 66 48 8d 3d 6c 02 10[ ]+lea 1049196\(%rip\),%rdi +# 100690 <.*> + +[0-9a-f]+: 66 48 8d 3d 6c 02 20[ ]+lea 0x20026c\(%rip\),%rdi +# 200690 <.*> +[0-9a-f]+: 00 * # -> R_X86_64_DTPMOD64 sG1 +[0-9a-f]+: 66 66 48 e8 9c ff ff[ ]+callq [0-9a-f]+ <.*> @@ -48,7 +48,7 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8d 05 a1 02 10 00[ ]+lea 1049249\(%rip\),%rax +# 1006d8 <.*> + +[0-9a-f]+: 48 8d 05 a1 02 20 00[ ]+lea 0x2002a1\(%rip\),%rax +# 2006d8 <.*> # -> R_X86_64_TLSDESC sG1 +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * @@ -56,14 +56,14 @@ Disassembly of section .text: +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD, desc first - +[0-9a-f]+: 48 8d 05 84 02 10 00[ ]+lea 1049220\(%rip\),%rax +# 1006c8 <.*> + +[0-9a-f]+: 48 8d 05 84 02 20 00[ ]+lea 0x200284\(%rip\),%rax +# 2006c8 <.*> # -> R_X86_64_TLSDESC sG2 +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 66 48 8d 3d 1e 02 10[ ]+lea 1049118\(%rip\),%rdi +# 100670 <.*> + +[0-9a-f]+: 66 48 8d 3d 1e 02 20[ ]+lea 0x20021e\(%rip\),%rdi +# 200670 <.*> +[0-9a-f]+: 00 * # -> R_X86_64_DTPMOD64 sG2 +[0-9a-f]+: 66 66 48 e8 6e ff ff[ ]+callq [0-9a-f]+ <.*> @@ -76,32 +76,30 @@ Disassembly of section .text: # GD -> IE, gd first, after IE use +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 f2 01 10 00[ ]+add 1049074\(%rip\),%rax +# 100660 <.*> + +[0-9a-f]+: 48 03 05 f2 01 20 00[ ]+add 0x2001f2\(%rip\),%rax +# 200660 <.*> # -> R_X86_64_TPOFF64 sG3 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8b 05 e7 01 10 00[ ]+mov 1049063\(%rip\),%rax +# 100660 <.*> + +[0-9a-f]+: 48 8b 05 e7 01 20 00[ ]+mov 0x2001e7\(%rip\),%rax +# 200660 <.*> # -> R_X86_64_TPOFF64 sG3 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE, desc first, after IE use - +[0-9a-f]+: 48 8b 05 fa 01 10 00[ ]+mov 1049082\(%rip\),%rax +# 100680 <.*> + +[0-9a-f]+: 48 8b 05 fa 01 20 00[ ]+mov 0x2001fa\(%rip\),%rax +# 200680 <.*> # -> R_X86_64_TPOFF64 sG4 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 e4 01 10 00[ ]+add 1049060\(%rip\),%rax +# 100680 <.*> + +[0-9a-f]+: 48 03 05 e4 01 20 00[ ]+add 0x2001e4\(%rip\),%rax +# 200680 <.*> # -> R_X86_64_TPOFF64 sG4 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -110,32 +108,30 @@ Disassembly of section .text: # GD -> IE, gd first, before IE use +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 b8 01 10 00[ ]+add 1049016\(%rip\),%rax +# 100668 <.*> + +[0-9a-f]+: 48 03 05 b8 01 20 00[ ]+add 0x2001b8\(%rip\),%rax +# 200668 <.*> # -> R_X86_64_TPOFF64 sG5 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 8b 05 ad 01 10 00[ ]+mov 1049005\(%rip\),%rax +# 100668 <.*> + +[0-9a-f]+: 48 8b 05 ad 01 20 00[ ]+mov 0x2001ad\(%rip\),%rax +# 200668 <.*> # -> R_X86_64_TPOFF64 sG5 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * # GD -> IE, desc first, before IE use - +[0-9a-f]+: 48 8b 05 c0 01 10 00[ ]+mov 1049024\(%rip\),%rax +# 100688 <.*> + +[0-9a-f]+: 48 8b 05 c0 01 20 00[ ]+mov 0x2001c0\(%rip\),%rax +# 200688 <.*> # -> R_X86_64_TPOFF64 sG6 - +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +[0-9a-f]+: 00 00 * - +[0-9a-f]+: 48 03 05 aa 01 10 00[ ]+add 1049002\(%rip\),%rax +# 100688 <.*> + +[0-9a-f]+: 48 03 05 aa 01 20 00[ ]+add 0x2001aa\(%rip\),%rax +# 200688 <.*> # -> R_X86_64_TPOFF64 sG6 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -146,7 +142,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 74 01 10 00[ ]+add 1048948\(%rip\),%rcx +# 100668 <.*> + +[0-9a-f]+: 48 03 0d 74 01 20 00[ ]+add 0x200174\(%rip\),%rcx +# 200668 <.*> # -> R_X86_64_TPOFF64 sG5 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * @@ -157,7 +153,7 @@ Disassembly of section .text: +[0-9a-f]+: 00 00 * +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * - +[0-9a-f]+: 48 03 0d 7e 01 10 00[ ]+add 1048958\(%rip\),%rcx +# 100688 <.*> + +[0-9a-f]+: 48 03 0d 7e 01 20 00[ ]+add 0x20017e\(%rip\),%rcx +# 200688 <.*> # -> R_X86_64_TPOFF64 sG6 +[0-9a-f]+: 90[ ]+nop * +[0-9a-f]+: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.rd b/ld/testsuite/ld-x86-64/tlsgdesc.rd index 2f7621b001d60..c965c956d5b46 100644 --- a/ld/testsuite/ld-x86-64/tlsgdesc.rd +++ b/ld/testsuite/ld-x86-64/tlsgdesc.rd @@ -76,7 +76,7 @@ Symbol table '.dynsym' contains 13 entries: +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _edata +[0-9]+: [0-9a-f]+ +0 NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 27 entries: +Symbol table '.symtab' contains 24 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name +[0-9]+: 0+ +0 NOTYPE LOCAL DEFAULT UND * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +1 * @@ -89,9 +89,6 @@ Symbol table '.symtab' contains 27 entries: +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +8 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +9 * +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +10 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +11 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +12 * - +[0-9]+: [0-9a-f]+ +0 SECTION LOCAL DEFAULT +13 * +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _DYNAMIC +[0-9]+: [0-9a-f]+ +0 OBJECT LOCAL HIDDEN ABS _GLOBAL_OFFSET_TABLE_ +[0-9]+: 0+ +0 TLS +GLOBAL DEFAULT UND sG3 diff --git a/ld/testsuite/ld-x86-64/tlspic.dd b/ld/testsuite/ld-x86-64/tlspic.dd index 28d8418edaf35..230d188bad5fc 100644 --- a/ld/testsuite/ld-x86-64/tlspic.dd +++ b/ld/testsuite/ld-x86-64/tlspic.dd @@ -17,7 +17,7 @@ Disassembly of section .text: +1006: 90[ ]+nop * +1007: 90[ ]+nop * # GD - +1008: 66 48 8d 3d 80 03 10[ ]+lea 1049472\(%rip\),%rdi +# 101390 <.*> + +1008: 66 48 8d 3d 80 03 20[ ]+lea 0x200380\(%rip\),%rdi +# 201390 <.*> +100f: 00 * # -> R_X86_64_DTPMOD64 sg1 +1010: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*> @@ -30,14 +30,14 @@ Disassembly of section .text: # GD -> IE because variable is referenced through IE too +101c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +1023: 00 00 * - +1025: 48 03 05 84 03 10 00[ ]+add 1049476\(%rip\),%rax +# 1013b0 <.*> + +1025: 48 03 05 84 03 20 00[ ]+add 0x200384\(%rip\),%rax +# 2013b0 <.*> # -> R_X86_64_TPOFF64 sg2 +102c: 90[ ]+nop * +102d: 90[ ]+nop * +102e: 90[ ]+nop * +102f: 90[ ]+nop * # GD against local variable - +1030: 66 48 8d 3d 08 03 10[ ]+lea 1049352\(%rip\),%rdi +# 101340 <.*> + +1030: 66 48 8d 3d 08 03 20[ ]+lea 0x200308\(%rip\),%rdi +# 201340 <.*> +1037: 00 * # -> R_X86_64_DTPMOD64 [0 0x2000000000000000] +1038: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*> @@ -50,14 +50,14 @@ Disassembly of section .text: # GD -> IE against local variable referenced through IE too +1044: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +104b: 00 00 * - +104d: 48 03 05 fc 02 10 00[ ]+add 1049340\(%rip\),%rax +# 101350 <.*> + +104d: 48 03 05 fc 02 20 00[ ]+add 0x2002fc\(%rip\),%rax +# 201350 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x24 +1054: 90[ ]+nop * +1055: 90[ ]+nop * +1056: 90[ ]+nop * +1057: 90[ ]+nop * # GD against hidden and local variable - +1058: 66 48 8d 3d 58 03 10[ ]+lea 1049432\(%rip\),%rdi +# 1013b8 <.*> + +1058: 66 48 8d 3d 58 03 20[ ]+lea 0x200358\(%rip\),%rdi +# 2013b8 <.*> +105f: 00 * # -> R_X86_64_DTPMOD64 [0 0x4000000000000000] +1060: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*> @@ -70,14 +70,14 @@ Disassembly of section .text: # GD -> IE against hidden and local variable referenced through IE too +106c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +1073: 00 00 * - +1075: 48 03 05 4c 03 10 00[ ]+add 1049420\(%rip\),%rax +# 1013c8 <.*> + +1075: 48 03 05 4c 03 20 00[ ]+add 0x20034c\(%rip\),%rax +# 2013c8 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x44 +107c: 90[ ]+nop * +107d: 90[ ]+nop * +107e: 90[ ]+nop * +107f: 90[ ]+nop * # GD against hidden but not local variable - +1080: 66 48 8d 3d e8 02 10[ ]+lea 1049320\(%rip\),%rdi +# 101370 <.*> + +1080: 66 48 8d 3d e8 02 20[ ]+lea 0x2002e8\(%rip\),%rdi +# 201370 <.*> +1087: 00 * # -> R_X86_64_DTPMOD64 [0 0x6000000000000000] +1088: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*> @@ -90,14 +90,14 @@ Disassembly of section .text: # GD -> IE against hidden but not local variable referenced through IE too +1094: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax +109b: 00 00 * - +109d: 48 03 05 dc 02 10 00[ ]+add 1049308\(%rip\),%rax +# 101380 <.*> + +109d: 48 03 05 dc 02 20 00[ ]+add 0x2002dc\(%rip\),%rax +# 201380 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x64 +10a4: 90[ ]+nop * +10a5: 90[ ]+nop * +10a6: 90[ ]+nop * +10a7: 90[ ]+nop * # LD - +10a8: 48 8d 3d b1 02 10 00[ ]+lea 1049265\(%rip\),%rdi +# 101360 <.*> + +10a8: 48 8d 3d b1 02 20 00[ ]+lea 0x2002b1\(%rip\),%rdi +# 201360 <.*> # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +10af: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> # -> R_X86_64_JUMP_SLOT __tls_get_addr @@ -112,7 +112,7 @@ Disassembly of section .text: +10c8: 90[ ]+nop * +10c9: 90[ ]+nop * # LD against hidden and local variables - +10ca: 48 8d 3d 8f 02 10 00[ ]+lea 1049231\(%rip\),%rdi +# 101360 <.*> + +10ca: 48 8d 3d 8f 02 20 00[ ]+lea 0x20028f\(%rip\),%rdi +# 201360 <.*> # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +10d1: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> # -> R_X86_64_JUMP_SLOT __tls_get_addr @@ -127,7 +127,7 @@ Disassembly of section .text: +10ea: 90[ ]+nop * +10eb: 90[ ]+nop * # LD against hidden but not local variables - +10ec: 48 8d 3d 6d 02 10 00[ ]+lea 1049197\(%rip\),%rdi +# 101360 <.*> + +10ec: 48 8d 3d 6d 02 20 00[ ]+lea 0x20026d\(%rip\),%rdi +# 201360 <.*> # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +10f3: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> # -> R_X86_64_JUMP_SLOT __tls_get_addr @@ -144,7 +144,7 @@ Disassembly of section .text: +1113: 00 00 * +1115: 90[ ]+nop * +1116: 90[ ]+nop * - +1117: 48 03 0d 92 02 10 00[ ]+add 1049234\(%rip\),%rcx +# 1013b0 <.*> + +1117: 48 03 0d 92 02 20 00[ ]+add 0x200292\(%rip\),%rcx +# 2013b0 <.*> # -> R_X86_64_TPOFF64 sg2 +111e: 90[ ]+nop * +111f: 90[ ]+nop * @@ -155,7 +155,7 @@ Disassembly of section .text: +1129: 00 00 * +112b: 90[ ]+nop * +112c: 90[ ]+nop * - +112d: 4c 03 35 1c 02 10 00[ ]+add 1049116\(%rip\),%r14 +# 101350 <.*> + +112d: 4c 03 35 1c 02 20 00[ ]+add 0x20021c\(%rip\),%r14 +# 201350 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x24 +1134: 90[ ]+nop * +1135: 90[ ]+nop * @@ -166,7 +166,7 @@ Disassembly of section .text: +113f: 00 00 * +1141: 90[ ]+nop * +1142: 90[ ]+nop * - +1143: 48 03 0d 7e 02 10 00[ ]+add 1049214\(%rip\),%rcx +# 1013c8 <.*> + +1143: 48 03 0d 7e 02 20 00[ ]+add 0x20027e\(%rip\),%rcx +# 2013c8 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x44 +114a: 90[ ]+nop * +114b: 90[ ]+nop * @@ -177,7 +177,7 @@ Disassembly of section .text: +1155: 00 00 * +1157: 90[ ]+nop * +1158: 90[ ]+nop * - +1159: 48 03 0d 20 02 10 00[ ]+add 1049120\(%rip\),%rcx +# 101380 <.*> + +1159: 48 03 0d 20 02 20 00[ ]+add 0x200220\(%rip\),%rcx +# 201380 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x64 +1160: 90[ ]+nop * +1161: 90[ ]+nop * @@ -185,7 +185,7 @@ Disassembly of section .text: +1163: 90[ ]+nop * # Direct access through %fs # IE against global var - +1164: 48 8b 0d 1d 02 10 00[ ]+mov 1049117\(%rip\),%rcx +# 101388 <.*> + +1164: 48 8b 0d 1d 02 20 00[ ]+mov 0x20021d\(%rip\),%rcx +# 201388 <.*> # -> R_X86_64_TPOFF64 sg5 +116b: 90[ ]+nop * +116c: 90[ ]+nop * @@ -195,7 +195,7 @@ Disassembly of section .text: +1173: 90[ ]+nop * +1174: 90[ ]+nop * # IE against local var - +1175: 4c 8b 15 dc 01 10 00[ ]+mov 1049052\(%rip\),%r10 +# 101358 <.*> + +1175: 4c 8b 15 dc 01 20 00[ ]+mov 0x2001dc\(%rip\),%r10 +# 201358 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x30 +117c: 90[ ]+nop * +117d: 90[ ]+nop * @@ -205,7 +205,7 @@ Disassembly of section .text: +1184: 90[ ]+nop * +1185: 90[ ]+nop * # IE against hidden and local var - +1186: 48 8b 15 13 02 10 00[ ]+mov 1049107\(%rip\),%rdx +# 1013a0 <.*> + +1186: 48 8b 15 13 02 20 00[ ]+mov 0x200213\(%rip\),%rdx +# 2013a0 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x50 +118d: 90[ ]+nop * +118e: 90[ ]+nop * @@ -215,7 +215,7 @@ Disassembly of section .text: +1195: 90[ ]+nop * +1196: 90[ ]+nop * # IE against hidden but not local var - +1197: 48 8b 0d 0a 02 10 00[ ]+mov 1049098\(%rip\),%rcx +# 1013a8 <.*> + +1197: 48 8b 0d 0a 02 20 00[ ]+mov 0x20020a\(%rip\),%rcx +# 2013a8 <.*> # -> R_X86_64_TPOFF64 *ABS*+0x70 +119e: 90[ ]+nop * +119f: 90[ ]+nop * diff --git a/ld/testsuite/ld-x86-64/tlspic.rd b/ld/testsuite/ld-x86-64/tlspic.rd index 286fbf2cd868d..492cf6f85f9cf 100644 --- a/ld/testsuite/ld-x86-64/tlspic.rd +++ b/ld/testsuite/ld-x86-64/tlspic.rd @@ -17,11 +17,11 @@ Section Headers: \[ 5\] .rela.plt +.* \[ 6\] .plt +.* \[ 7\] .text +PROGBITS +0+1000 0+1000 0+1ac 00 +AX +0 +0 4096 - \[ 8\] .tdata +PROGBITS +0+1011ac 0+11ac 0+60 00 WAT +0 +0 +1 - \[ 9\] .tbss +NOBITS +0+10120c 0+120c 0+20 00 WAT +0 +0 +1 - \[10\] .dynamic +DYNAMIC +0+101210 0+1210 0+130 10 +WA +3 +0 +8 - \[11\] .got +PROGBITS +0+101340 0+1340 0+90 08 +WA +0 +0 +8 - \[12\] .got.plt +PROGBITS +0+1013d0 0+13d0 0+20 08 +WA +0 +0 +8 + \[ 8\] .tdata +PROGBITS +0+2011ac 0+11ac 0+60 00 WAT +0 +0 +1 + \[ 9\] .tbss +NOBITS +0+20120c 0+120c 0+20 00 WAT +0 +0 +1 + \[10\] .dynamic +DYNAMIC +0+201210 0+1210 0+130 10 +WA +3 +0 +8 + \[11\] .got +PROGBITS +0+201340 0+1340 0+90 08 +WA +0 +0 +8 + \[12\] .got.plt +PROGBITS +0+2013d0 0+13d0 0+20 08 +WA +0 +0 +8 \[13\] .shstrtab +.* \[14\] .symtab +.* \[15\] .strtab +.* @@ -36,10 +36,10 @@ There are 4 program headers, starting at offset [0-9]+ Program Headers: Type +Offset +VirtAddr +PhysAddr +FileSiz +MemSiz +Flg Align - LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x100000 - LOAD +0x0+11ac 0x0+1011ac 0x0+1011ac 0x0+244 0x0+244 RW +0x100000 - DYNAMIC +0x0+1210 0x0+101210 0x0+101210 0x0+130 0x0+130 RW +0x8 - TLS +0x0+11ac 0x0+1011ac 0x0+1011ac 0x0+60 0x0+80 R +0x1 + LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x200000 + LOAD +0x0+11ac 0x0+2011ac 0x0+2011ac 0x0+244 0x0+244 RW +0x200000 + DYNAMIC +0x0+1210 0x0+201210 0x0+201210 0x0+130 0x0+130 RW +0x8 + TLS +0x0+11ac 0x0+2011ac 0x0+2011ac 0x0+60 0x0+80 R +0x1 Section to Segment mapping: Segment Sections... @@ -74,7 +74,6 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE LOCAL DEFAULT UND * .* SECTION LOCAL DEFAULT +7 * .* SECTION LOCAL DEFAULT +8 * -.* SECTION LOCAL DEFAULT +9 * .* TLS +GLOBAL DEFAULT +8 sg8 .* TLS +GLOBAL DEFAULT +8 sg3 .* TLS +GLOBAL DEFAULT +8 sg4 @@ -89,7 +88,7 @@ Symbol table '.dynsym' contains [0-9]+ entries: .* NOTYPE GLOBAL DEFAULT ABS _edata .* NOTYPE GLOBAL DEFAULT ABS _end -Symbol table '.symtab' contains 55 entries: +Symbol table '.symtab' contains 52 entries: +Num: +Value +Size Type +Bind +Vis +Ndx Name .* NOTYPE LOCAL DEFAULT UND * .* SECTION LOCAL DEFAULT +1 * @@ -104,9 +103,6 @@ Symbol table '.symtab' contains 55 entries: .* SECTION LOCAL DEFAULT +10 * .* SECTION LOCAL DEFAULT +11 * .* SECTION LOCAL DEFAULT +12 * -.* SECTION LOCAL DEFAULT +13 * -.* SECTION LOCAL DEFAULT +14 * -.* SECTION LOCAL DEFAULT +15 * .* TLS +LOCAL DEFAULT +8 sl1 .* TLS +LOCAL DEFAULT +8 sl2 .* TLS +LOCAL DEFAULT +8 sl3 diff --git a/ld/testsuite/ld-x86-64/tlspic.sd b/ld/testsuite/ld-x86-64/tlspic.sd index 831f0e5f82a61..666c7749c3093 100644 --- a/ld/testsuite/ld-x86-64/tlspic.sd +++ b/ld/testsuite/ld-x86-64/tlspic.sd @@ -8,12 +8,12 @@ .*: +file format elf64-x86-64 Contents of section .got: - 101340 00000000 00000000 20000000 00000000 .* - 101350 00000000 00000000 00000000 00000000 .* - 101360 00000000 00000000 00000000 00000000 .* - 101370 00000000 00000000 60000000 00000000 .* - 101380 00000000 00000000 00000000 00000000 .* - 101390 00000000 00000000 00000000 00000000 .* - 1013a0 00000000 00000000 00000000 00000000 .* - 1013b0 00000000 00000000 00000000 00000000 .* - 1013c0 40000000 00000000 00000000 00000000 .* + 201340 00000000 00000000 20000000 00000000 .* + 201350 00000000 00000000 00000000 00000000 .* + 201360 00000000 00000000 00000000 00000000 .* + 201370 00000000 00000000 60000000 00000000 .* + 201380 00000000 00000000 00000000 00000000 .* + 201390 00000000 00000000 00000000 00000000 .* + 2013a0 00000000 00000000 00000000 00000000 .* + 2013b0 00000000 00000000 00000000 00000000 .* + 2013c0 40000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-x86-64/tlspic.td b/ld/testsuite/ld-x86-64/tlspic.td index d3df20c93450c..67eb4f2a27426 100644 --- a/ld/testsuite/ld-x86-64/tlspic.td +++ b/ld/testsuite/ld-x86-64/tlspic.td @@ -8,9 +8,9 @@ .*: +file format elf64-x86-64 Contents of section .tdata: - 1011ac 11000000 12000000 13000000 14000000 .* - 1011bc 15000000 16000000 17000000 18000000 .* - 1011cc 41000000 42000000 43000000 44000000 .* - 1011dc 45000000 46000000 47000000 48000000 .* - 1011ec 01010000 02010000 03010000 04010000 .* - 1011fc 05010000 06010000 07010000 08010000 .* + 2011ac 11000000 12000000 13000000 14000000 .* + 2011bc 15000000 16000000 17000000 18000000 .* + 2011cc 41000000 42000000 43000000 44000000 .* + 2011dc 45000000 46000000 47000000 48000000 .* + 2011ec 01010000 02010000 03010000 04010000 .* + 2011fc 05010000 06010000 07010000 08010000 .* diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp index a0e734eb6c073..acfe0df838f09 100644 --- a/ld/testsuite/lib/ld-lib.exp +++ b/ld/testsuite/lib/ld-lib.exp @@ -1,6 +1,6 @@ # Support routines for LD testsuite. # Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, -# 2004, 2005, 2006 Free Software Foundation, Inc. +# 2004, 2005, 2006, 2007 Free Software Foundation, Inc. # # This file is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -39,12 +39,15 @@ proc default_ld_version { ld } { proc default_ld_relocate { ld target objects } { global HOSTING_EMU global host_triplet + global exec_output if { [which $ld] == 0 } then { perror "$ld does not exist" return 0 } + catch "exec rm -f $target" exec_output + verbose -log "$ld $HOSTING_EMU -o $target -r $objects" catch "exec $ld $HOSTING_EMU -o $target -r $objects" exec_output @@ -90,11 +93,11 @@ proc big_or_little_endian {} { foreach x $tmp_flags { case $x in { - {*big*endian eb EB -eb -EB -mb} { + {*big*endian eb EB -eb -EB -mb -meb} { set flags " -EB" return $flags } - {*little*endian el EL -el -EL -ml} { + {*little*endian el EL -el -EL -ml -mel} { set flags " -EL" return $flags } @@ -115,6 +118,7 @@ proc default_ld_link { ld target objects } { global LIBS global host_triplet global link_output + global exec_output set objs "$HOSTING_CRT0 $objects" set libs "$LIBS $HOSTING_LIBS" @@ -129,14 +133,17 @@ proc default_ld_link { ld target objects } { } else { set flags "" } + + catch "exec rm -f $target" exec_output + verbose -log "$ld $HOSTING_EMU $flags -o $target $objs $libs" catch "exec $ld $HOSTING_EMU $flags -o $target $objs $libs" link_output set exec_output [prune_warnings $link_output] - if [string match "" $link_output] then { + if [string match "" $exec_output] then { return 1 } else { - verbose -log "$link_output" + verbose -log "$exec_output" return 0 } } @@ -147,6 +154,7 @@ proc default_ld_simple_link { ld target objects } { global host_triplet global link_output global gcc_ld_flag + global exec_output if { [which $ld] == 0 } then { perror "$ld does not exist" @@ -172,6 +180,8 @@ proc default_ld_simple_link { ld target objects } { set flags "$gcc_ld_flag $flags" } + catch "exec rm -f $target" exec_output + verbose -log "$ld $flags -o $target $objects" catch "exec $ld $flags -o $target $objects" link_output @@ -434,7 +444,7 @@ proc is_aout_format {} { # True if the object format is known to be PE COFF. # proc is_pecoff_format {} { - if { ![istarget *-*-mingw32*] \ + if { ![istarget *-*-mingw*] \ && ![istarget *-*-cygwin*] \ && ![istarget *-*-pe*] } { return 0 @@ -783,6 +793,7 @@ proc run_dump_test { name } { set sourcefile [lindex $sourcefiles $i] set objfile "tmpdir/dump$i.o" + catch "exec rm -f $objfile" exec_output lappend objfiles $objfile set cmd "$AS $ASFLAGS $opts(as) $asflags($sourcefile) -o $objfile $sourcefile" @@ -814,6 +825,7 @@ proc run_dump_test { name } { # Perhaps link the file(s). if { $run_ld } { set objfile "tmpdir/dump" + catch "exec rm -f $objfile" exec_output # Add -L$srcdir/$subdir so that the linker command can use # linker scripts in the source directory. @@ -840,6 +852,7 @@ proc run_dump_test { name } { if { $cmdret == 0 && $run_objcopy } { set infile $objfile set objfile "tmpdir/dump1" + catch "exec rm -f $objfile" exec_output # Note that we don't use OBJCOPYFLAGS here; any flags must be # explicitly specified. @@ -1246,14 +1259,16 @@ if ![string length [info proc prune_warnings]] { # targets_to_xfail is a list of target triplets to be xfailed. # ldtests contains test-items with 3 items followed by 1 lists, 2 items -# and one optional item: +# and 3 optional items: # 0:name # 1:ld options # 2:assembler options -# 3:filenames of assembler files +# 3:filenames of source files # 4:name of output file # 5:expected output # 6:compiler flags (optional) +# 7:language (optional) +# 8:linker warning (optional) proc run_ld_link_exec_tests { targets_to_xfail ldtests } { global ld @@ -1262,8 +1277,10 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { global subdir global env global CC + global CXX global CFLAGS global errcnt + global exec_output foreach testitem $ldtests { foreach target $targets_to_xfail { @@ -1276,6 +1293,8 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { set binfile tmpdir/[lindex $testitem 4] set expfile [lindex $testitem 5] set cflags [lindex $testitem 6] + set lang [lindex $testitem 7] + set warning [lindex $testitem 8] set objfiles {} set failed 0 @@ -1297,7 +1316,13 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { ld_compile "$CC -c $CFLAGS $cflags" $srcdir/$subdir/$src_file $objfile # We have to use $CC to build PIE and shared library. - if { [ string match "-shared" $ld_options ] \ + if { [ string match "c" $lang ] } { + set link_proc ld_simple_link + set link_cmd $CC + } elseif { [ string match "c++" $lang ] } { + set link_proc ld_simple_link + set link_cmd $CXX + } elseif { [ string match "-shared" $ld_options ] \ || [ string match "-pie" $ld_options ] } { set link_proc ld_simple_link set link_cmd $CC @@ -1310,6 +1335,19 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { set failed 1 } else { set failed 0 + } + + # Check if exec_output is expected. + if { $warning != "" } then { + verbose -log "returned with: <$exec_output>, expected: <$warning>" + if { [regexp $warning $exec_output] } then { + set failed 0 + } else { + set failed 1 + } + } + + if { $failed == 0 } { send_log "Running: $binfile > $binfile.out\n" verbose "Running: $binfile > $binfile.out" catch "exec $binfile > $binfile.out" exec_output @@ -1341,3 +1379,136 @@ proc run_ld_link_exec_tests { targets_to_xfail ldtests } { } } } + +# List contains test-items with 3 items followed by 2 lists, one item and +# one optional item: +# 0:name +# 1:link options +# 2:compile options +# 3:filenames of source files +# 4:action and options. +# 5:name of output file +# 6:language (optional) +# +# Actions: +# objdump: Apply objdump options on result. Compare with regex (last arg). +# nm: Apply nm options on result. Compare with regex (last arg). +# readelf: Apply readelf options on result. Compare with regex (last arg). +# +proc run_cc_link_tests { ldtests } { + global nm + global objdump + global READELF + global srcdir + global subdir + global env + global CC + global CXX + global CFLAGS + + foreach testitem $ldtests { + set testname [lindex $testitem 0] + set ldflags [lindex $testitem 1] + set cflags [lindex $testitem 2] + set src_files [lindex $testitem 3] + set actions [lindex $testitem 4] + set binfile tmpdir/[lindex $testitem 5] + set lang [lindex $testitem 6] + set objfiles {} + set is_unresolved 0 + set failed 0 + + # Compile each file in the test. + foreach src_file $src_files { + set objfile "tmpdir/[file rootname $src_file].o" + lappend objfiles $objfile + + # We ignore warnings since some compilers may generate + # incorrect section attributes and the assembler will warn + # them. + ld_compile "$CC -c $CFLAGS $cflags" $srcdir/$subdir/$src_file $objfile + } + + # Clear error and warning counts. + reset_vars + + if { [ string match "c++" $lang ] } { + set cc_cmd $CXX + } else { + set cc_cmd $CC + } + + if ![ld_simple_link $cc_cmd $binfile "-L$srcdir/$subdir $ldflags $objfiles"] { + fail $testname + } else { + set failed 0 + foreach actionlist $actions { + set action [lindex $actionlist 0] + set progopts [lindex $actionlist 1] + + # There are actions where we run regexp_diff on the + # output, and there are other actions (presumably). + # Handling of the former look the same. + set dump_prog "" + switch -- $action { + objdump + { set dump_prog $objdump } + nm + { set dump_prog $nm } + readelf + { set dump_prog $READELF } + default + { + perror "Unrecognized action $action" + set is_unresolved 1 + break + } + } + + if { $dump_prog != "" } { + set dumpfile [lindex $actionlist 2] + set binary $dump_prog + + # Ensure consistent sorting of symbols + if {[info exists env(LC_ALL)]} { + set old_lc_all $env(LC_ALL) + } + set env(LC_ALL) "C" + set cmd "$binary $progopts $binfile > dump.out" + send_log "$cmd\n" + catch "exec $cmd" comp_output + if {[info exists old_lc_all]} { + set env(LC_ALL) $old_lc_all + } else { + unset env(LC_ALL) + } + set comp_output [prune_warnings $comp_output] + + if ![string match "" $comp_output] then { + send_log "$comp_output\n" + set failed 1 + break + } + + if { [regexp_diff "dump.out" "$srcdir/$subdir/$dumpfile"] } then { + verbose "output is [file_contents "dump.out"]" 2 + set failed 1 + break + } + } + } + + if { $failed != 0 } { + fail $testname + } else { if { $is_unresolved == 0 } { + pass $testname + } } + } + + # Catch action errors. + if { $is_unresolved != 0 } { + unresolved $testname + continue + } + } +} |