diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-07-19 07:02:30 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-07-19 07:02:30 +0000 |
commit | de51d671486b6ac9a2ad9ee5fcfdb1a23cc59238 (patch) | |
tree | 17ff629bd1f00b82d8dbb66a022e2f59e218c3c2 /lib/Basic/Targets.cpp | |
parent | 8746d127c04f5bbaf6c6e88cef8606ca5a6a54e9 (diff) |
Notes
Diffstat (limited to 'lib/Basic/Targets.cpp')
-rw-r--r-- | lib/Basic/Targets.cpp | 45 |
1 files changed, 36 insertions, 9 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 50b4fc34ad3a3..5d75aa5a75288 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -571,8 +571,6 @@ protected: public: OpenBSDTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : OSTargetInfo<Target>(Triple, Opts) { - this->TLSSupported = false; - switch (Triple.getArch()) { case llvm::Triple::x86: case llvm::Triple::x86_64: @@ -3401,6 +3399,7 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "bmi", true); setFeatureEnabledImpl(Features, "f16c", true); setFeatureEnabledImpl(Features, "xsaveopt", true); + setFeatureEnabledImpl(Features, "movbe", true); LLVM_FALLTHROUGH; case CK_BTVER1: setFeatureEnabledImpl(Features, "ssse3", true); @@ -4900,7 +4899,7 @@ public: case CC_Swift: case CC_X86VectorCall: case CC_IntelOclBicc: - case CC_X86_64Win64: + case CC_Win64: case CC_PreserveMost: case CC_PreserveAll: case CC_X86RegCall: @@ -6251,7 +6250,8 @@ class AArch64TargetInfo : public TargetInfo { enum FPUModeEnum { FPUMode, - NeonMode + NeonMode = (1 << 0), + SveMode = (1 << 1) }; unsigned FPU; @@ -6290,6 +6290,9 @@ public: LongDoubleWidth = LongDoubleAlign = SuitableAlign = 128; LongDoubleFormat = &llvm::APFloat::IEEEquad(); + // Make __builtin_ms_va_list available. + HasBuiltinMSVaList = true; + // {} in inline assembly are neon specifiers, not assembly variant // specifiers. NoAsmVariants = true; @@ -6385,12 +6388,15 @@ public: Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM", Opts.ShortEnums ? "1" : "4"); - if (FPU == NeonMode) { + if (FPU & NeonMode) { Builder.defineMacro("__ARM_NEON", "1"); // 64-bit NEON supports half, single and double precision operations. Builder.defineMacro("__ARM_NEON_FP", "0xE"); } + if (FPU & SveMode) + Builder.defineMacro("__ARM_FEATURE_SVE", "1"); + if (CRC) Builder.defineMacro("__ARM_FEATURE_CRC32", "1"); @@ -6426,7 +6432,8 @@ public: return Feature == "aarch64" || Feature == "arm64" || Feature == "arm" || - (Feature == "neon" && FPU == NeonMode); + (Feature == "neon" && (FPU & NeonMode)) || + (Feature == "sve" && (FPU & SveMode)); } bool handleTargetFeatures(std::vector<std::string> &Features, @@ -6440,7 +6447,9 @@ public: for (const auto &Feature : Features) { if (Feature == "+neon") - FPU = NeonMode; + FPU |= NeonMode; + if (Feature == "+sve") + FPU |= SveMode; if (Feature == "+crc") CRC = 1; if (Feature == "+crypto") @@ -6467,6 +6476,7 @@ public: case CC_PreserveMost: case CC_PreserveAll: case CC_OpenCLKernel: + case CC_Win64: return CCCR_OK; default: return CCCR_Warning; @@ -6644,13 +6654,26 @@ public: MicrosoftARM64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : WindowsTargetInfo<AArch64leTargetInfo>(Triple, Opts), Triple(Triple) { + + // This is an LLP64 platform. + // int:4, long:4, long long:8, long double:8. WCharType = UnsignedShort; + IntWidth = IntAlign = 32; + LongWidth = LongAlign = 32; + DoubleAlign = LongLongAlign = 64; + LongDoubleWidth = LongDoubleAlign = 64; + LongDoubleFormat = &llvm::APFloat::IEEEdouble(); + IntMaxType = SignedLongLong; + Int64Type = SignedLongLong; SizeType = UnsignedLongLong; + PtrDiffType = SignedLongLong; + IntPtrType = SignedLongLong; + TheCXXABI.set(TargetCXXABI::Microsoft); } void setDataLayout() override { - resetDataLayout("e-m:w-i64:64-i128:128-n32:64-S128"); + resetDataLayout("e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128"); } void getVisualStudioDefines(const LangOptions &Opts, @@ -7470,7 +7493,7 @@ public: if (HasVector) Builder.defineMacro("__VX__"); if (Opts.ZVector) - Builder.defineMacro("__VEC__", "10301"); + Builder.defineMacro("__VEC__", "10302"); } ArrayRef<Builtin::Info> getTargetBuiltins() const override { return llvm::makeArrayRef(BuiltinInfo, @@ -7497,6 +7520,7 @@ public: .Cases("arch9", "z196", 9) .Cases("arch10", "zEC12", 10) .Cases("arch11", "z13", 11) + .Cases("arch12", "z14", 12) .Default(-1); } bool setCPU(const std::string &Name) override { @@ -7513,6 +7537,8 @@ public: Features["transactional-execution"] = true; if (ISARevision >= 11) Features["vector"] = true; + if (ISARevision >= 12) + Features["vector-enhancements-1"] = true; return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); } @@ -7542,6 +7568,7 @@ public: .Case("arch9", ISARevision >= 9) .Case("arch10", ISARevision >= 10) .Case("arch11", ISARevision >= 11) + .Case("arch12", ISARevision >= 12) .Case("htm", HasTransactionalExecution) .Case("vx", HasVector) .Default(false); |