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authorEd Schouten <ed@FreeBSD.org>2009-06-22 08:08:12 +0000
committerEd Schouten <ed@FreeBSD.org>2009-06-22 08:08:12 +0000
commitb2f21fb044b6b5c52cff6227f9f79ca4ed42b18f (patch)
tree86c1bc482baa6c81fc70b8d715153bfa93377186 /lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
parent600c6fa13de5c407dc36dbb0ab73807868741ae0 (diff)
Notes
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 93750d6b98c4e..48ebd0ff0d4fd 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -5317,8 +5317,12 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
if ((OpFlag & 7) == 2 /*REGDEF*/
|| (OpFlag & 7) == 6 /* EARLYCLOBBER REGDEF */) {
// Add (OpFlag&0xffff)>>3 registers to MatchedRegs.
- assert(!OpInfo.isIndirect &&
- "Don't know how to handle tied indirect register inputs yet!");
+ if (OpInfo.isIndirect) {
+ cerr << "llvm: error: "
+ "Don't know how to handle tied indirect "
+ "register inputs yet!\n";
+ exit(1);
+ }
RegsForValue MatchedRegs;
MatchedRegs.TLI = &TLI;
MatchedRegs.ValueVTs.push_back(InOperandVal.getValueType());