diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-06-21 13:59:01 +0000 | 
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-06-21 13:59:01 +0000 | 
| commit | 3a0822f094b578157263e04114075ad7df81db41 (patch) | |
| tree | bc48361fe2cd1ca5f93ac01b38b183774468fc79 /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 85d8b2bbe386bcfe669575d05b61482d7be07e5d (diff) | |
Notes
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 | 
1 files changed, 2 insertions, 2 deletions
| diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 46ff326ba630c..50e2292b8b6e5 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -142,7 +142,7 @@ namespace {      bool MergeReturnIntoLDM(MachineBasicBlock &MBB);    };    char ARMLoadStoreOpt::ID = 0; -} +} // namespace  static bool definesCPSR(const MachineInstr *MI) {    for (const auto &MO : MI->operands()) { @@ -1859,7 +1859,7 @@ namespace {      bool RescheduleLoadStoreInstrs(MachineBasicBlock *MBB);    };    char ARMPreAllocLoadStoreOpt::ID = 0; -} +} // namespace  bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {    TD = Fn.getTarget().getDataLayout(); | 
