diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-05-27 18:44:32 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-05-27 18:44:32 +0000 |
| commit | 5a5ac124e1efaf208671f01c46edb15f29ed2a0b (patch) | |
| tree | a6140557876943cdd800ee997c9317283394b22c /lib/Target/ARM/Thumb1InstrInfo.cpp | |
| parent | f03b5bed27d0d2eafd68562ce14f8b5e3f1f0801 (diff) | |
Diffstat (limited to 'lib/Target/ARM/Thumb1InstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/Thumb1InstrInfo.cpp | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp index 8ea912e270393..028119c264b3b 100644 --- a/lib/Target/ARM/Thumb1InstrInfo.cpp +++ b/lib/Target/ARM/Thumb1InstrInfo.cpp @@ -22,16 +22,15 @@ using namespace llvm; Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI) - : ARMBaseInstrInfo(STI), RI(STI) { -} + : ARMBaseInstrInfo(STI), RI() {} /// getNoopForMachoTarget - Return the noop instruction to use for a noop. void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const { NopInst.setOpcode(ARM::tMOVr); - NopInst.addOperand(MCOperand::CreateReg(ARM::R8)); - NopInst.addOperand(MCOperand::CreateReg(ARM::R8)); - NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); - NopInst.addOperand(MCOperand::CreateReg(0)); + NopInst.addOperand(MCOperand::createReg(ARM::R8)); + NopInst.addOperand(MCOperand::createReg(ARM::R8)); + NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); + NopInst.addOperand(MCOperand::createReg(0)); } unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const { @@ -44,7 +43,7 @@ void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB, bool KillSrc) const { // Need to check the arch. MachineFunction &MF = *MBB.getParent(); - const ARMSubtarget &st = MF.getTarget().getSubtarget<ARMSubtarget>(); + const ARMSubtarget &st = MF.getSubtarget<ARMSubtarget>(); assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && "Thumb1 can only copy GPR registers"); |