diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
commit | cfca06d7963fa0909f90483b42a6d7d194d01e08 (patch) | |
tree | 209fb2a2d68f8f277793fc8df46c753d31bc853b /llvm/lib/Target/Mips/MipsInstrInfo.cpp | |
parent | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (diff) |
Notes
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.cpp | 58 |
1 files changed, 56 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp index 25bbe5990827b..0c6080258a3a2 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp @@ -23,6 +23,7 @@ #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/TargetOpcodes.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" +#include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/DebugLoc.h" #include "llvm/MC/MCInstrDesc.h" #include "llvm/Target/TargetMachine.h" @@ -66,10 +67,10 @@ MipsInstrInfo::GetMemOperand(MachineBasicBlock &MBB, int FI, MachineMemOperand::Flags Flags) const { MachineFunction &MF = *MBB.getParent(); MachineFrameInfo &MFI = MF.getFrameInfo(); - unsigned Align = MFI.getObjectAlignment(FI); return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), - Flags, MFI.getObjectSize(FI), Align); + Flags, MFI.getObjectSize(FI), + MFI.getObjectAlign(FI)); } //===----------------------------------------------------------------------===// @@ -841,3 +842,56 @@ MipsInstrInfo::getSerializableDirectMachineOperandTargetFlags() const { }; return makeArrayRef(Flags); } + +Optional<ParamLoadedValue> +MipsInstrInfo::describeLoadedValue(const MachineInstr &MI, Register Reg) const { + DIExpression *Expr = + DIExpression::get(MI.getMF()->getFunction().getContext(), {}); + + // TODO: Special MIPS instructions that need to be described separately. + if (auto RegImm = isAddImmediate(MI, Reg)) { + Register SrcReg = RegImm->Reg; + int64_t Offset = RegImm->Imm; + // When SrcReg is $zero, treat loaded value as immediate only. + // Ex. $a2 = ADDiu $zero, 10 + if (SrcReg == Mips::ZERO || SrcReg == Mips::ZERO_64) { + return ParamLoadedValue(MI.getOperand(2), Expr); + } + Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset, Offset); + return ParamLoadedValue(MachineOperand::CreateReg(SrcReg, false), Expr); + } else if (auto DestSrc = isCopyInstr(MI)) { + const MachineFunction *MF = MI.getMF(); + const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); + Register DestReg = DestSrc->Destination->getReg(); + // TODO: Handle cases where the Reg is sub- or super-register of the + // DestReg. + if (TRI->isSuperRegister(Reg, DestReg) || TRI->isSubRegister(Reg, DestReg)) + return None; + } + + return TargetInstrInfo::describeLoadedValue(MI, Reg); +} + +Optional<RegImmPair> MipsInstrInfo::isAddImmediate(const MachineInstr &MI, + Register Reg) const { + // TODO: Handle cases where Reg is a super- or sub-register of the + // destination register. + const MachineOperand &Op0 = MI.getOperand(0); + if (!Op0.isReg() || Reg != Op0.getReg()) + return None; + + switch (MI.getOpcode()) { + case Mips::ADDiu: + case Mips::DADDiu: { + const MachineOperand &Dop = MI.getOperand(0); + const MachineOperand &Sop1 = MI.getOperand(1); + const MachineOperand &Sop2 = MI.getOperand(2); + // Value is sum of register and immediate. Immediate value could be + // global string address which is not supported. + if (Dop.isReg() && Sop1.isReg() && Sop2.isImm()) + return RegImmPair{Sop1.getReg(), Sop2.getImm()}; + // TODO: Handle case where Sop1 is a frame-index. + } + } + return None; +}
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