diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
| commit | cfca06d7963fa0909f90483b42a6d7d194d01e08 (patch) | |
| tree | 209fb2a2d68f8f277793fc8df46c753d31bc853b /llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp | |
| parent | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp b/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp index 17e1196eea590..4b809e0c8553b 100644 --- a/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp +++ b/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp @@ -78,9 +78,9 @@ protected: Register OutReg = MI.getOperand(0).getReg(); Register InReg = MI.getOperand(1).getReg(); DebugLoc DL = MI.getDebugLoc(); - unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3; + Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3; unsigned Opc1, Opc2; - const unsigned OrigRegs[] = {OutReg, InReg, GPR3}; + const Register OrigRegs[] = {OutReg, InReg, GPR3}; switch (MI.getOpcode()) { default: |