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authorDimitry Andric <dim@FreeBSD.org>2019-12-20 21:55:13 +0000
committerDimitry Andric <dim@FreeBSD.org>2019-12-20 21:55:13 +0000
commitb96995b67f15110f39c41149543e19c8189abdaf (patch)
tree1971f6467f0c9a77b68ee72bcba9b89bbea52f08 /llvm/lib/Target/RISCV
parentfa0a39b7ea7d26d220d018044055197a5284f2b5 (diff)
Diffstat (limited to 'llvm/lib/Target/RISCV')
-rw-r--r--llvm/lib/Target/RISCV/RISCVRegisterInfo.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.h b/llvm/lib/Target/RISCV/RISCVRegisterInfo.h
index 4f339475508fd..56a50fe6ddc0c 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.h
@@ -52,6 +52,12 @@ struct RISCVRegisterInfo : public RISCVGenRegisterInfo {
bool trackLivenessAfterRegAlloc(const MachineFunction &) const override {
return true;
}
+
+ const TargetRegisterClass *
+ getPointerRegClass(const MachineFunction &MF,
+ unsigned Kind = 0) const override {
+ return &RISCV::GPRRegClass;
+ }
};
}