diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
| commit | cfca06d7963fa0909f90483b42a6d7d194d01e08 (patch) | |
| tree | 209fb2a2d68f8f277793fc8df46c753d31bc853b /llvm/lib/Target/X86/X86FixupBWInsts.cpp | |
| parent | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/X86/X86FixupBWInsts.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86FixupBWInsts.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp index f8c4a2adb8514..78de041329e20 100644 --- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp +++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp @@ -350,7 +350,7 @@ MachineInstr *FixupBWInstPass::tryReplaceExtend(unsigned New32BitOpcode, return nullptr; // Don't interfere with formation of CBW instructions which should be a - // shorter encoding than even the MOVSX32rr8. It's also immunte to partial + // shorter encoding than even the MOVSX32rr8. It's also immune to partial // merge issues on Intel CPUs. if (MI->getOpcode() == X86::MOVSX16rr8 && MI->getOperand(0).getReg() == X86::AX && |