diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-02-14 21:24:03 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-02-14 21:24:03 +0000 |
| commit | d75c7debad4509ece98792074e64b8a650a27bdb (patch) | |
| tree | f8d77975739b43bf7ffef0612579168cb9ec9474 /llvm/lib/Target/X86 | |
| parent | 9c2f6c4bb805c7ac08c8925c96e429fcc322725e (diff) | |
Notes
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86MCInstLower.cpp | 19 |
3 files changed, 27 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp index dffda5217675b..2284cd7a70b85 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp @@ -85,13 +85,13 @@ cl::opt<unsigned> X86AlignBranchBoundary( cl::opt<X86AlignBranchKind, true, cl::parser<std::string>> X86AlignBranch( "x86-align-branch", - cl::desc("Specify types of branches to align (plus separated list of " - "types). The branches's types are combination of jcc, fused, " - "jmp, call, ret, indirect."), - cl::value_desc("jcc indicates conditional jumps, fused indicates fused " - "conditional jumps, jmp indicates unconditional jumps, call " - "indicates direct and indirect calls, ret indicates rets, " - "indirect indicates indirect jumps."), + cl::desc( + "Specify types of branches to align. The branches's types are " + "combination of jcc, fused, jmp, call, ret, indirect. jcc indicates " + "conditional jumps, fused indicates fused conditional jumps, jmp " + "indicates unconditional jumps, call indicates direct and indirect " + "calls, ret indicates rets, indirect indicates indirect jumps."), + cl::value_desc("(plus separated list of types)"), cl::location(X86AlignBranchKindLoc)); cl::opt<bool> X86AlignBranchWithin32BBoundaries( diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 0f152968ddfdf..cbdd7135de438 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21056,7 +21056,7 @@ X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor, // Divide by pow2. SDValue SRA = - DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i64)); + DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i8)); // If we're dividing by a positive value, we're done. Otherwise, we must // negate the result. diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp index 2fc9a2af01d76..7f49c6e861d4b 100644 --- a/llvm/lib/Target/X86/X86MCInstLower.cpp +++ b/llvm/lib/Target/X86/X86MCInstLower.cpp @@ -2002,6 +2002,25 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { break; } + case X86::ENDBR32: + case X86::ENDBR64: { + // CurrentPatchableFunctionEntrySym can be CurrentFnBegin only for + // -fpatchable-function-entry=N,0. The entry MBB is guaranteed to be + // non-empty. If MI is the initial ENDBR, place the + // __patchable_function_entries label after ENDBR. + if (CurrentPatchableFunctionEntrySym && + CurrentPatchableFunctionEntrySym == CurrentFnBegin && + MI == &MF->front().front()) { + MCInst Inst; + MCInstLowering.Lower(MI, Inst); + EmitAndCountInstruction(Inst); + CurrentPatchableFunctionEntrySym = createTempSymbol("patch"); + OutStreamer->EmitLabel(CurrentPatchableFunctionEntrySym); + return; + } + break; + } + case X86::TAILJMPr: case X86::TAILJMPm: case X86::TAILJMPd: |