5 files changed, 9 insertions, 9 deletions

diff --git a/sys/dev/firewire/firewire.c b/sys/dev/firewire/firewire.c
index 72341887f46ab..f691c9dd433f6 100644
--- a/sys/dev/firewire/firewire.c
+++ b/sys/dev/firewire/firewire.c
@@ -1584,7 +1584,7 @@ fw_explore_node(struct fw_device *dfwdev)
 		 * speed map value.
 		 * 1394a-2000 compliant devices only use
 		 * the Bus Info Block link spd value, so
-		 * ignore the speed map alltogether. SWB
+		 * ignore the speed map altogether. SWB
 		 */
 		if (binfo->link_spd == FWSPD_S100 /* 0 */) {
 			device_printf(fc->bdev, "%s: "
diff --git a/sys/dev/firewire/fwdev.c b/sys/dev/firewire/fwdev.c
index cebd28ad876a7..fbaa9bb1f4397 100644
--- a/sys/dev/firewire/fwdev.c
+++ b/sys/dev/firewire/fwdev.c
@@ -349,7 +349,7 @@ readloop:
 		}
 	}
 	if (ir->stproc == NULL) {
-		/* no data avaliable */
+		/* no data available */
 		if (slept == 0) {
 			slept = 1;
 			ir->flag |= FWXFERQ_WAKEUP;
diff --git a/sys/dev/firewire/fwohci.c b/sys/dev/firewire/fwohci.c
index 70134af686e6b..ac7fa5290f799 100644
--- a/sys/dev/firewire/fwohci.c
+++ b/sys/dev/firewire/fwohci.c
@@ -511,7 +511,7 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev)
 		OWRITE(sc, OHCI_ITCTLCLR(i), OHCI_CNTL_DMA_RUN);
 	}
 
-	/* FLUSH FIFO and reset Transmitter/Reciever */
+	/* FLUSH FIFO and reset Transmitter/Receiver */
 	OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET);
 	if (firewire_debug)
 		device_printf(dev, "resetting OHCI...");
@@ -692,7 +692,7 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
 	sc->fc.config_rom[0] |= fw_crc16(&sc->fc.config_rom[1], 5*4);
 #endif
 
-/* SID recieve buffer must align 2^11 */
+/* SID receive buffer must align 2^11 */
 #define	OHCI_SIDSIZE	(1 << 11)
 	sc->sid_buf = fwdma_malloc(&sc->fc, OHCI_SIDSIZE, OHCI_SIDSIZE,
 	    &sc->sid_dma, BUS_DMA_WAITOK | BUS_DMA_COHERENT);
@@ -929,7 +929,7 @@ txloop:
 			OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | hdr_len);
  	FWOHCI_DMA_WRITE(db->db.desc.addr, 0);
  	FWOHCI_DMA_WRITE(db->db.desc.res, 0);
-/* Specify bound timer of asy. responce */
+/* Specify bound timer of asy. response */
 	if (&sc->atrs == dbch) {
  		FWOHCI_DMA_WRITE(db->db.desc.res,
 			 (OREAD(sc, OHCI_CYCLETIMER) >> 12) + (1 << 13));
@@ -1748,7 +1748,7 @@ fwohci_stop(struct fwohci_softc *sc, device_t dev)
 			| OHCI_INT_DMA_ARRQ | OHCI_INT_DMA_ARRS
 			| OHCI_INT_PHY_BUS_R);
 
-/* FLUSH FIFO and reset Transmitter/Reciever */
+/* FLUSH FIFO and reset Transmitter/Receiver */
 	OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET);
 #endif
 
@@ -2208,7 +2208,7 @@ fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
 				ir->bnpacket, BUS_DMASYNC_POSTREAD);
 		} else {
 			/* XXX */
-			printf("fwohci_rbuf_update: this shouldn't happend\n");
+			printf("fwohci_rbuf_update: this shouldn't happened\n");
 		}
 
 		STAILQ_REMOVE_HEAD(&ir->stdma, link);
diff --git a/sys/dev/firewire/if_fwip.c b/sys/dev/firewire/if_fwip.c
index 0617a9c1cc076..0a958b2b2c0d6 100644
--- a/sys/dev/firewire/if_fwip.c
+++ b/sys/dev/firewire/if_fwip.c
@@ -739,7 +739,7 @@ fwip_stream_input(struct fw_xferq *xferq)
 		/*
 		 * We must have a GASP header - leave the
 		 * encapsulation sanity checks to the generic
-		 * code. Remeber that we also have the firewire async
+		 * code. Remember that we also have the firewire async
 		 * stream header even though that isn't accounted for
 		 * in mode.stream.len.
 		 */
diff --git a/sys/dev/firewire/sbp_targ.c b/sys/dev/firewire/sbp_targ.c
index bd7e924f40d1c..27e98432fcd41 100644
--- a/sys/dev/firewire/sbp_targ.c
+++ b/sys/dev/firewire/sbp_targ.c
@@ -1031,7 +1031,7 @@ sbp_targ_pt_done(struct fw_xfer *xfer)
 	}
 	orbi->refcount++;
 /*
- * Set endianess here so we don't have 
+ * Set endianness here so we don't have 
  * to deal with is later
  */
 	for (i = 0, pt = orbi->page_table; i < orbi->orb4.data_size; i++, pt++) {