diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2016-07-23 20:41:05 +0000 |
commit | 01095a5d43bbfde13731688ddcf6048ebb8b7721 (patch) | |
tree | 4def12e759965de927d963ac65840d663ef9d1ea /test/CodeGen/AMDGPU/predicate-dp4.ll | |
parent | f0f4822ed4b66e3579e92a89f368f8fb860e218e (diff) |
Notes
Diffstat (limited to 'test/CodeGen/AMDGPU/predicate-dp4.ll')
-rw-r--r-- | test/CodeGen/AMDGPU/predicate-dp4.ll | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/test/CodeGen/AMDGPU/predicate-dp4.ll b/test/CodeGen/AMDGPU/predicate-dp4.ll index 6bc187594359b..7ac2bb7b0c7f3 100644 --- a/test/CodeGen/AMDGPU/predicate-dp4.ll +++ b/test/CodeGen/AMDGPU/predicate-dp4.ll @@ -3,7 +3,7 @@ ; CHECK-LABEL: {{^}}main: ; CHECK: PRED_SETE_INT * Pred, ; CHECK: DOT4 T{{[0-9]+}}.X, T0.X, T0.X, Pred_sel_one -define void @main(<4 x float> inreg) #0 { +define amdgpu_ps void @main(<4 x float> inreg) { main_body: %1 = extractelement <4 x float> %0, i32 0 %2 = bitcast float %1 to i32 @@ -11,17 +11,16 @@ main_body: br i1 %3, label %IF, label %ENDIF IF: ; preds = %main_body - %4 = call float @llvm.AMDGPU.dp4(<4 x float> %0, <4 x float> %0) + %4 = call float @llvm.r600.dot4(<4 x float> %0, <4 x float> %0) br label %ENDIF ENDIF: ; preds = %IF, %main_body %5 = phi float [%4, %IF], [0.000000e+00, %main_body] %6 = insertelement <4 x float> undef, float %5, i32 0 - call void @llvm.R600.store.swizzle(<4 x float> %6, i32 0, i32 0) + call void @llvm.r600.store.swizzle(<4 x float> %6, i32 0, i32 0) ret void } -declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1 -declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) +declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #1 +declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) attributes #1 = { readnone } -attributes #0 = { "ShaderType"="0" } |