vendor/llvm/llvm-r72732

194 files changed, 10974 insertions, 0 deletions

diff --git a/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
new file mode 100644
index 0000000000000..caa9a981fc6a2
--- /dev/null
+++ b/test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+
+%struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
+@ld = external global %struct.layer_data*               ; <%struct.layer_data**> [#uses=1]
+
+define void @main() {
+entry:
+        br i1 false, label %bb169.i, label %cond_true11
+
+bb169.i:                ; preds = %entry
+        ret void
+
+cond_true11:            ; preds = %entry
+        %tmp.i32 = load %struct.layer_data** @ld                ; <%struct.layer_data*> [#uses=2]
+        %tmp3.i35 = getelementptr %struct.layer_data* %tmp.i32, i32 0, i32 1, i32 2048; <i8*> [#uses=2]
+        %tmp.i36 = getelementptr %struct.layer_data* %tmp.i32, i32 0, i32 2          ; <i8**> [#uses=1]
+        store i8* %tmp3.i35, i8** %tmp.i36
+        store i8* %tmp3.i35, i8** null
+        ret void
+}
diff --git a/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
new file mode 100644
index 0000000000000..3661c4c06d69e
--- /dev/null
+++ b/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
@@ -0,0 +1,103 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
+
+@quant_coef = external global [6 x [4 x [4 x i32]]]		; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@dequant_coef = external global [6 x [4 x [4 x i32]]]		; <[6 x [4 x [4 x i32]]]*> [#uses=1]
+@A = external global [4 x [4 x i32]]		; <[4 x [4 x i32]]*> [#uses=1]
+
+define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) {
+entry:
+	%predicted_block = alloca [4 x [4 x i32]], align 4		; <[4 x [4 x i32]]*> [#uses=1]
+	br label %cond_next489
+
+cond_next489:		; preds = %cond_false, %bb471
+	%j.7.in = load i8* null		; <i8> [#uses=1]
+	%i.8.in = load i8* null		; <i8> [#uses=1]
+	%i.8 = zext i8 %i.8.in to i32		; <i32> [#uses=4]
+	%j.7 = zext i8 %j.7.in to i32		; <i32> [#uses=4]
+	%tmp495 = getelementptr [4 x [4 x i32]]* %predicted_block, i32 0, i32 %i.8, i32 %j.7		; <i32*> [#uses=2]
+	%tmp496 = load i32* %tmp495		; <i32> [#uses=2]
+	%tmp502 = load i32* null		; <i32> [#uses=1]
+	%tmp542 = getelementptr [6 x [4 x [4 x i32]]]* @quant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7		; <i32*> [#uses=1]
+	%tmp543 = load i32* %tmp542		; <i32> [#uses=1]
+	%tmp548 = ashr i32 0, 0		; <i32> [#uses=3]
+	%tmp561 = sub i32 0, %tmp496		; <i32> [#uses=3]
+	%abscond563 = icmp sgt i32 %tmp561, -1		; <i1> [#uses=1]
+	%abs564 = select i1 %abscond563, i32 %tmp561, i32 0		; <i32> [#uses=1]
+	%tmp572 = mul i32 %abs564, %tmp543		; <i32> [#uses=1]
+	%tmp574 = add i32 %tmp572, 0		; <i32> [#uses=1]
+	%tmp576 = ashr i32 %tmp574, 0		; <i32> [#uses=7]
+	%tmp579 = icmp eq i32 %tmp548, %tmp576		; <i1> [#uses=1]
+	br i1 %tmp579, label %bb712, label %cond_next589
+
+cond_next589:		; preds = %cond_next489
+	%tmp605 = getelementptr [6 x [4 x [4 x i32]]]* @dequant_coef, i32 0, i32 0, i32 %i.8, i32 %j.7		; <i32*> [#uses=1]
+	%tmp606 = load i32* %tmp605		; <i32> [#uses=1]
+	%tmp612 = load i32* null		; <i32> [#uses=1]
+	%tmp629 = load i32* null		; <i32> [#uses=1]
+	%tmp629a = sitofp i32 %tmp629 to double		; <double> [#uses=1]
+	%tmp631 = mul double %tmp629a, 0.000000e+00		; <double> [#uses=1]
+	%tmp632 = add double 0.000000e+00, %tmp631		; <double> [#uses=1]
+	%tmp642 = call fastcc i32 @sign( i32 %tmp576, i32 %tmp561 )		; <i32> [#uses=1]
+	%tmp650 = mul i32 %tmp606, %tmp642		; <i32> [#uses=1]
+	%tmp656 = mul i32 %tmp650, %tmp612		; <i32> [#uses=1]
+	%tmp658 = shl i32 %tmp656, 0		; <i32> [#uses=1]
+	%tmp659 = ashr i32 %tmp658, 6		; <i32> [#uses=1]
+	%tmp660 = sub i32 0, %tmp659		; <i32> [#uses=1]
+	%tmp666 = sub i32 %tmp660, %tmp496		; <i32> [#uses=1]
+	%tmp667 = sitofp i32 %tmp666 to double		; <double> [#uses=2]
+	call void @levrun_linfo_inter( i32 %tmp576, i32 0, i32* null, i32* null )
+	%tmp671 = mul double %tmp667, %tmp667		; <double> [#uses=1]
+	%tmp675 = add double %tmp671, 0.000000e+00		; <double> [#uses=1]
+	%tmp678 = fcmp oeq double %tmp632, %tmp675		; <i1> [#uses=1]
+	br i1 %tmp678, label %cond_true679, label %cond_false693
+
+cond_true679:		; preds = %cond_next589
+	%abscond681 = icmp sgt i32 %tmp548, -1		; <i1> [#uses=1]
+	%abs682 = select i1 %abscond681, i32 %tmp548, i32 0		; <i32> [#uses=1]
+	%abscond684 = icmp sgt i32 %tmp576, -1		; <i1> [#uses=1]
+	%abs685 = select i1 %abscond684, i32 %tmp576, i32 0		; <i32> [#uses=1]
+	%tmp686 = icmp slt i32 %abs682, %abs685		; <i1> [#uses=1]
+	br i1 %tmp686, label %cond_next702, label %cond_false689
+
+cond_false689:		; preds = %cond_true679
+	%tmp739 = icmp eq i32 %tmp576, 0		; <i1> [#uses=1]
+	br i1 %tmp579, label %bb737, label %cond_false708
+
+cond_false693:		; preds = %cond_next589
+	ret i32 0
+
+cond_next702:		; preds = %cond_true679
+	ret i32 0
+
+cond_false708:		; preds = %cond_false689
+	ret i32 0
+
+bb712:		; preds = %cond_next489
+	ret i32 0
+
+bb737:		; preds = %cond_false689
+	br i1 %tmp739, label %cond_next791, label %cond_true740
+
+cond_true740:		; preds = %bb737
+	%tmp761 = call fastcc i32 @sign( i32 %tmp576, i32 0 )		; <i32> [#uses=1]
+	%tmp780 = load i32* null		; <i32> [#uses=1]
+	%tmp785 = getelementptr [4 x [4 x i32]]* @A, i32 0, i32 %i.8, i32 %j.7		; <i32*> [#uses=1]
+	%tmp786 = load i32* %tmp785		; <i32> [#uses=1]
+	%tmp781 = mul i32 %tmp780, %tmp761		; <i32> [#uses=1]
+	%tmp787 = mul i32 %tmp781, %tmp786		; <i32> [#uses=1]
+	%tmp789 = shl i32 %tmp787, 0		; <i32> [#uses=1]
+	%tmp790 = ashr i32 %tmp789, 6		; <i32> [#uses=1]
+	br label %cond_next791
+
+cond_next791:		; preds = %cond_true740, %bb737
+	%ilev.1 = phi i32 [ %tmp790, %cond_true740 ], [ 0, %bb737 ]		; <i32> [#uses=1]
+	%tmp796 = load i32* %tmp495		; <i32> [#uses=1]
+	%tmp798 = add i32 %tmp796, %ilev.1		; <i32> [#uses=1]
+	%tmp812 = mul i32 0, %tmp502		; <i32> [#uses=0]
+	%tmp818 = call fastcc i32 @sign( i32 0, i32 %tmp798 )		; <i32> [#uses=0]
+	unreachable
+}
+
+declare i32 @sign(i32, i32)
+
+declare void @levrun_linfo_inter(i32, i32, i32*, i32*)
diff --git a/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll
new file mode 100644
index 0000000000000..19c156d47f433
--- /dev/null
+++ b/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
+
+%struct.rtx_def = type { i8 }
+@str = external global [7 x i8]
+
+define void @f1() {
+	%D = alloca %struct.rtx_def, align 1
+	%tmp1 = bitcast %struct.rtx_def* %D to i32*
+	%tmp7 = load i32* %tmp1
+	%tmp14 = lshr i32 %tmp7, 1
+	%tmp1415 = and i32 %tmp14, 1
+	call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
+	ret void
+}
+
+declare void @printf(i32, ...)
diff --git a/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll
new file mode 100644
index 0000000000000..ee52cf0f4e7b1
--- /dev/null
+++ b/test/CodeGen/ARM/2007-02-02-JoinIntervalsCrash.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin
+
+	%struct.color_sample = type { i32 }
+	%struct.ref = type { %struct.color_sample, i16, i16 }
+
+define void @zcvrs() {
+	br i1 false, label %bb22, label %UnifiedReturnBlock
+
+bb22:
+	br i1 false, label %bb64, label %UnifiedReturnBlock
+
+bb64:
+	%tmp67 = urem i32 0, 0
+	%tmp69 = icmp slt i32 %tmp67, 10
+	%iftmp.13.0 = select i1 %tmp69, i8 48, i8 55
+	%tmp75 = add i8 %iftmp.13.0, 0
+	store i8 %tmp75, i8* null
+	%tmp81 = udiv i32 0, 0
+	%tmp83 = icmp eq i32 %tmp81, 0
+	br i1 %tmp83, label %bb85, label %bb64
+
+bb85:
+	ret void
+
+UnifiedReturnBlock:
+	ret void
+}
diff --git a/test/CodeGen/ARM/2007-03-06-AddR7.ll b/test/CodeGen/ARM/2007-03-06-AddR7.ll
new file mode 100644
index 0000000000000..ad3e195a0dd79
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-06-AddR7.ll
@@ -0,0 +1,117 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \
+; RUN:   -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4}
+
+	%struct.__fooAllocator = type opaque
+	%struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** }
+	%struct.__fooZ = type opaque
+	%struct.__fooU = type opaque
+	%struct.__fooString = type opaque
+	%struct.__fooV = type opaque
+	%struct.fooXBase = type { i32, [4 x i8] }
+	%struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* }
+	%struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] }
+	%struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* }
+	%struct.aa_ivar = type { i8*, i8*, i32 }
+	%struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] }
+	%struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* }
+	%struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] }
+	%struct.aa_object = type { %struct.aa_class* }
+	%struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] }
+	%struct.aa_ss = type opaque
+@__kfooYTypeID = external global i32		; <i32*> [#uses=3]
+@__fooYClass = external constant %struct.fooXClass		; <%struct.fooXClass*> [#uses=1]
+@__fooXClassTableSize = external global i32		; <i32*> [#uses=1]
+@__fooXAaClassTable = external global i32*		; <i32**> [#uses=1]
+@s.10319 = external global %struct.aa_ss*		; <%struct.aa_ss**> [#uses=2]
+@str15 = external constant [24 x i8]		; <[24 x i8]*> [#uses=1]
+
+
+define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext  {
+entry:
+	%args = alloca i8*, align 4		; <i8**> [#uses=5]
+	%args4 = bitcast i8** %args to i8*		; <i8*> [#uses=2]
+	call void @llvm.va_start( i8* %args4 )
+	%tmp6 = load i32* @__kfooYTypeID		; <i32> [#uses=1]
+	icmp eq i32 %tmp6, 0		; <i1>:0 [#uses=1]
+	br i1 %0, label %cond_true, label %cond_next
+
+cond_true:		; preds = %entry
+	%tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass )		; <i32> [#uses=1]
+	store i32 %tmp7, i32* @__kfooYTypeID
+	br label %cond_next
+
+cond_next:		; preds = %cond_true, %entry
+	%tmp8 = load i32* @__kfooYTypeID		; <i32> [#uses=2]
+	%tmp15 = load i32* @__fooXClassTableSize		; <i32> [#uses=1]
+	icmp ugt i32 %tmp15, %tmp8		; <i1>:1 [#uses=1]
+	br i1 %1, label %cond_next18, label %cond_true58
+
+cond_next18:		; preds = %cond_next
+	%tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0		; <i32*> [#uses=1]
+	%tmp22 = load i32* %tmp21		; <i32> [#uses=2]
+	%tmp29 = load i32** @__fooXAaClassTable		; <i32*> [#uses=1]
+	%tmp31 = getelementptr i32* %tmp29, i32 %tmp8		; <i32*> [#uses=1]
+	%tmp32 = load i32* %tmp31		; <i32> [#uses=1]
+	icmp eq i32 %tmp22, %tmp32		; <i1>:2 [#uses=1]
+	%.not = xor i1 %2, true		; <i1> [#uses=1]
+	icmp ugt i32 %tmp22, 4095		; <i1>:3 [#uses=1]
+	%bothcond = and i1 %.not, %3		; <i1> [#uses=1]
+	br i1 %bothcond, label %cond_true58, label %bb48
+
+bb48:		; preds = %cond_next18
+	%tmp78 = call i32 @strlen( i8* %componentDesc )		; <i32> [#uses=4]
+	%tmp92 = alloca i32, i32 %tmp78		; <i32*> [#uses=2]
+	icmp sgt i32 %tmp78, 0		; <i1>:4 [#uses=1]
+	br i1 %4, label %cond_true111, label %bb114
+
+cond_true58:		; preds = %cond_next18, %cond_next
+	%tmp59 = load %struct.aa_ss** @s.10319		; <%struct.aa_ss*> [#uses=2]
+	icmp eq %struct.aa_ss* %tmp59, null		; <i1>:5 [#uses=1]
+	%tmp6869 = bitcast %struct.__fooY* %calendar to i8*		; <i8*> [#uses=2]
+	br i1 %5, label %cond_true60, label %cond_next64
+
+cond_true60:		; preds = %cond_true58
+	%tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) )		; <%struct.aa_ss*> [#uses=2]
+	store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319
+	%tmp66137 = volatile load i8** %args		; <i8*> [#uses=1]
+	%tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext 		; <i8> [#uses=1]
+	ret i8 %tmp73138
+
+cond_next64:		; preds = %cond_true58
+	%tmp66 = volatile load i8** %args		; <i8*> [#uses=1]
+	%tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext 		; <i8> [#uses=1]
+	ret i8 %tmp73
+
+cond_true111:		; preds = %cond_true111, %bb48
+	%idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ]		; <i32> [#uses=2]
+	%tmp95 = volatile load i8** %args		; <i8*> [#uses=2]
+	%tmp97 = getelementptr i8* %tmp95, i32 4		; <i8*> [#uses=1]
+	volatile store i8* %tmp97, i8** %args
+	%tmp9899 = bitcast i8* %tmp95 to i32*		; <i32*> [#uses=1]
+	%tmp100 = load i32* %tmp9899		; <i32> [#uses=1]
+	%tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0		; <i32*> [#uses=1]
+	store i32 %tmp100, i32* %tmp104
+	%indvar.next = add i32 %idx.2132.0, 1		; <i32> [#uses=2]
+	icmp eq i32 %indvar.next, %tmp78		; <i1>:6 [#uses=1]
+	br i1 %6, label %bb114, label %cond_true111
+
+bb114:		; preds = %cond_true111, %bb48
+	call void @llvm.va_end( i8* %args4 )
+	%tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext 		; <i8> [#uses=1]
+	ret i8 %tmp122
+}
+
+declare i32 @_fooXRegisterClass(%struct.fooXClass*)
+
+declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext 
+
+declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...)
+
+declare %struct.aa_ss* @sel_registerName(i8*)
+
+declare void @llvm.va_start(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
new file mode 100644
index 0000000000000..7317e62e31824
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
+	br label %bb
+
+bb:		; preds = %bb, %0
+	%p_addr.0 = getelementptr i8* %p, i32 0		; <i8*> [#uses=1]
+	%tmp2 = load i8* %p_addr.0		; <i8> [#uses=2]
+	%tmp4.rec = add i32 0, 1		; <i32> [#uses=1]
+	%tmp4 = getelementptr i8* %p, i32 %tmp4.rec		; <i8*> [#uses=1]
+	%tmp56 = zext i8 %tmp2 to i32		; <i32> [#uses=1]
+	%tmp7 = and i32 %tmp56, 127		; <i32> [#uses=1]
+	%tmp9 = shl i32 %tmp7, 0		; <i32> [#uses=1]
+	%tmp11 = or i32 %tmp9, 0		; <i32> [#uses=1]
+	icmp slt i8 %tmp2, 0		; <i1>:1 [#uses=1]
+	br i1 %1, label %bb, label %cond_next28
+
+cond_next28:		; preds = %bb
+	store i32 %tmp11, i32* %val
+	ret i8* %tmp4
+}
diff --git a/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
new file mode 100644
index 0000000000000..1b917f0ac2b2b
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-13-InstrSched.ll
@@ -0,0 +1,48 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN:   -mattr=+v6 -ifcvt-limit=0 -stats |& grep asm-printer | grep 35
+
+define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+newFuncRoot:
+	br label %bb74
+
+bb78.exitStub:		; preds = %bb74
+	store i32 %d2.1, i32* %d2.1.out
+	store i32 %d3.1, i32* %d3.1.out
+	store i32 %d0.1, i32* %d0.1.out
+	store i32 %d1.1, i32* %d1.1.out
+	ret void
+
+bb74:		; preds = %bb26, %newFuncRoot
+	%fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ]		; <i32> [#uses=3]
+	%fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ]		; <i32*> [#uses=1]
+	%d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ]		; <i32> [#uses=2]
+	%d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ]		; <i32> [#uses=2]
+	%d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ]		; <i32> [#uses=2]
+	%d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ]		; <i32> [#uses=2]
+	%fm.1 = load i32* %fm.1.in		; <i32> [#uses=4]
+	icmp eq i32 %fp.1.rec, %tmp8		; <i1>:0 [#uses=1]
+	br i1 %0, label %bb78.exitStub, label %bb26
+
+bb26:		; preds = %bb74
+	%tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec		; <i32**> [#uses=1]
+	%tmp30 = load i32** %tmp28		; <i32*> [#uses=4]
+	%tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph		; <i32*> [#uses=1]
+	%tmp34 = load i32* %tmp33		; <i32> [#uses=1]
+	%tmp38 = getelementptr i32* %tmp30, i32 %tmp36224		; <i32*> [#uses=1]
+	%tmp39 = load i32* %tmp38		; <i32> [#uses=1]
+	%tmp42 = mul i32 %tmp34, %fm.1		; <i32> [#uses=1]
+	%tmp44 = add i32 %tmp42, %d0.1		; <i32> [#uses=1]
+	%tmp48 = getelementptr i32* %tmp30, i32 %tmp46223		; <i32*> [#uses=1]
+	%tmp49 = load i32* %tmp48		; <i32> [#uses=1]
+	%tmp52 = mul i32 %tmp39, %fm.1		; <i32> [#uses=1]
+	%tmp54 = add i32 %tmp52, %d1.1		; <i32> [#uses=1]
+	%tmp58 = getelementptr i32* %tmp30, i32 %tmp56222		; <i32*> [#uses=1]
+	%tmp59 = load i32* %tmp58		; <i32> [#uses=1]
+	%tmp62 = mul i32 %tmp49, %fm.1		; <i32> [#uses=1]
+	%tmp64 = add i32 %tmp62, %d2.1		; <i32> [#uses=1]
+	%tmp67 = mul i32 %tmp59, %fm.1		; <i32> [#uses=1]
+	%tmp69 = add i32 %tmp67, %d3.1		; <i32> [#uses=1]
+	%tmp71.rec = add i32 %fp.1.rec, 1		; <i32> [#uses=2]
+	%tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec		; <i32*> [#uses=1]
+	br label %bb74
+}
diff --git a/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
new file mode 100644
index 0000000000000..32daf839f0fc9
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
@@ -0,0 +1,96 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; PR1257
+
+	%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+	%struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+	%struct.c_arg_info = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i8 }
+	%struct.c_language_function = type { %struct.stmt_tree_s }
+	%struct.c_switch = type opaque
+	%struct.eh_status = type opaque
+	%struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+	%struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+	%struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+	%struct.ht_identifier = type { i8*, i32, i32 }
+	%struct.initial_value_struct = type opaque
+	%struct.lang_decl = type { i8 }
+	%struct.language_function = type { %struct.c_language_function, %struct.tree_node*, %struct.tree_node*, %struct.c_switch*, %struct.c_arg_info*, i32, i32, i32, i32 }
+	%struct.location_t = type { i8*, i32 }
+	%struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+	%struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+	%struct.rtx_def = type { i16, i8, i8, %struct.u }
+	%struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+	%struct.stmt_tree_s = type { %struct.tree_node*, i32 }
+	%struct.temp_slot = type opaque
+	%struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+	%struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+	%struct.tree_decl_u1 = type { i64 }
+	%struct.tree_decl_u2 = type { %struct.function* }
+	%struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+	%struct.tree_node = type { %struct.tree_decl }
+	%struct.u = type { [1 x i64] }
+	%struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+	%struct.varasm_status = type opaque
+	%struct.varray_head_tag = type opaque
+	%union.tree_ann_d = type opaque
+
+
+define void @declspecs_add_type(i32 %spec.1) {
+entry:
+	%spec.1961 = zext i32 %spec.1 to i64		; <i64> [#uses=1]
+	%spec.1961.adj = shl i64 %spec.1961, 32		; <i64> [#uses=1]
+	%spec.1961.adj.ins = or i64 %spec.1961.adj, 0		; <i64> [#uses=2]
+	%tmp10959 = lshr i64 %spec.1961.adj.ins, 32		; <i64> [#uses=2]
+	%tmp1920 = inttoptr i64 %tmp10959 to %struct.tree_common*		; <%struct.tree_common*> [#uses=1]
+	%tmp21 = getelementptr %struct.tree_common* %tmp1920, i32 0, i32 3		; <i8*> [#uses=1]
+	%tmp2122 = bitcast i8* %tmp21 to i32*		; <i32*> [#uses=1]
+	br i1 false, label %cond_next53, label %cond_true
+
+cond_true:		; preds = %entry
+	ret void
+
+cond_next53:		; preds = %entry
+	br i1 false, label %cond_true63, label %cond_next689
+
+cond_true63:		; preds = %cond_next53
+	ret void
+
+cond_next689:		; preds = %cond_next53
+	br i1 false, label %cond_false841, label %bb743
+
+bb743:		; preds = %cond_next689
+	ret void
+
+cond_false841:		; preds = %cond_next689
+	br i1 false, label %cond_true851, label %cond_true918
+
+cond_true851:		; preds = %cond_false841
+	tail call void @lookup_name( )
+	br i1 false, label %bb866, label %cond_next856
+
+cond_next856:		; preds = %cond_true851
+	ret void
+
+bb866:		; preds = %cond_true851
+	%tmp874 = load i32* %tmp2122		; <i32> [#uses=1]
+	%tmp876877 = trunc i32 %tmp874 to i8		; <i8> [#uses=1]
+	icmp eq i8 %tmp876877, 1		; <i1>:0 [#uses=1]
+	br i1 %0, label %cond_next881, label %cond_true878
+
+cond_true878:		; preds = %bb866
+	unreachable
+
+cond_next881:		; preds = %bb866
+	%tmp884885 = inttoptr i64 %tmp10959 to %struct.tree_identifier*		; <%struct.tree_identifier*> [#uses=1]
+	%tmp887 = getelementptr %struct.tree_identifier* %tmp884885, i32 0, i32 1, i32 0		; <i8**> [#uses=1]
+	%tmp888 = load i8** %tmp887		; <i8*> [#uses=1]
+	tail call void (i32, ...)* @error( i32 undef, i8* %tmp888 )
+	ret void
+
+cond_true918:		; preds = %cond_false841
+	%tmp920957 = trunc i64 %spec.1961.adj.ins to i32		; <i32> [#uses=0]
+	ret void
+}
+
+declare void @error(i32, ...)
+
+declare void @lookup_name()
diff --git a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..6d3f6404af840
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
@@ -0,0 +1,947 @@
+; RUN: llvm-as < %s | llc -march=arm
+; PR1266
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+	%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+	%struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] }
+	%struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
+	%struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] }
+	%struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+	%struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
+	%struct.addr_diff_vec_flags = type { i8, i8, i8, i8 }
+	%struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+	%struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8, %struct.tree_node* (%struct.tree_node**, %struct.tree_node*, %struct.tree_node*, i32, i8*)* }
+	%struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
+	%struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
+	%struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
+	%struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
+	%struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
+	%struct.cgraph_edge = type { %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.tree_node*, i8*, i8* }
+	%struct.cgraph_global_info = type { %struct.cgraph_node*, i32, i8 }
+	%struct.cgraph_local_info = type { i32, i8, i8, i8, i8, i8, i8, i8 }
+	%struct.cgraph_node = type { %struct.tree_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, i8*, %struct.cgraph_local_info, %struct.cgraph_global_info, %struct.cgraph_rtl_info, i32, i8, i8, i8, i8, i8 }
+	%struct.cgraph_rtl_info = type { i32, i8, i8 }
+	%struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.cselib_val_struct = type opaque
+	%struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
+	%struct.def_operand_ptr = type { %struct.tree_node** }
+	%struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+	%struct.diagnostic_context = type { %struct.pretty_printer*, [8 x i32], i8, i8, i8, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (i8*, i8**)*, %struct.tree_node*, i32, i32 }
+	%struct.diagnostic_info = type { %struct.text_info, %struct.location_t, i32 }
+	%struct.die_struct = type opaque
+	%struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
+	%struct.edge_def_insns = type { %struct.rtx_def* }
+	%struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
+	%struct.eh_status = type opaque
+	%struct.elt_list = type opaque
+	%struct.elt_t = type { %struct.tree_node*, %struct.tree_node* }
+	%struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+	%struct.et_node = type opaque
+	%struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+	%struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+	%struct.ggc_root_tab = type { i8*, i32, i32, void (i8*)*, void (i8*)* }
+	%struct.gimplify_ctx = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.varray_head_tag*, %struct.htab*, i32, i8, i8 }
+	%struct.gimplify_init_ctor_preeval_data = type { %struct.tree_node*, i32 }
+	%struct.ht_identifier = type { i8*, i32, i32 }
+	%struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
+	%struct.initial_value_struct = type opaque
+	%struct.lang_decl = type opaque
+	%struct.lang_hooks = type { i8*, i32, i32 (i32)*, i32 (i32, i8**)*, void (%struct.diagnostic_context*)*, i32 (i32, i8*, i32)*, i8 (i8*, i32) zeroext *, i8 (i8**) zeroext *, i8 () zeroext *, void ()*, void ()*, void (i32)*, void ()*, i64 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.rtx_def* (%struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.rtx_def**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i32 (%struct.rtx_def*, %struct.tree_node*)*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*)*, void (%struct.tree_node*)*, i8 () zeroext *, i8, i8, void ()*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, i8* (%struct.tree_node*, i32)*, i32 (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.diagnostic_context*, i8*)*, %struct.tree_node* (%struct.tree_node*)*, i64 (i64)*, %struct.attribute_spec*, %struct.attribute_spec*, %struct.attribute_spec*, i32 (%struct.tree_node*)*, %struct.lang_hooks_for_functions, %struct.lang_hooks_for_tree_inlining, %struct.lang_hooks_for_callgraph, %struct.lang_hooks_for_tree_dump, %struct.lang_hooks_for_decls, %struct.lang_hooks_for_types, i32 (%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*, i32, i32, i8*, %struct.tree_node*)* }
+	%struct.lang_hooks_for_callgraph = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node*)*, void (%struct.tree_node*)* }
+	%struct.lang_hooks_for_decls = type { i32 ()*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* ()*, i8 (%struct.tree_node*) zeroext *, void ()*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, i8* (%struct.tree_node*)* }
+	%struct.lang_hooks_for_functions = type { void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, i8 (%struct.tree_node*) zeroext * }
+	%struct.lang_hooks_for_tree_dump = type { i8 (i8*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)* }
+	%struct.lang_hooks_for_tree_inlining = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)*, i32 (%struct.tree_node**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*)*, i32 (%struct.tree_node*, %struct.tree_node*)*, i32 (%struct.tree_node*)*, i8 (%struct.tree_node*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32)* }
+	%struct.lang_hooks_for_types = type { %struct.tree_node* (i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (i32, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*, i8*)*, void (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i8 }
+	%struct.lang_type = type opaque
+	%struct.language_function = type opaque
+	%struct.location_t = type { i8*, i32 }
+	%struct.loop = type opaque
+	%struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+	%struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 }
+	%struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
+	%struct.output_buffer = type { %struct.obstack, %struct.FILE*, i32, [128 x i8] }
+	%struct.phi_arg_d = type { %struct.tree_node*, i8 }
+	%struct.pointer_set_t = type opaque
+	%struct.pretty_printer = type { %struct.output_buffer*, i8*, i32, i32, i32, i32, i32, i8 (%struct.pretty_printer*, %struct.text_info*) zeroext *, i8, i8 }
+	%struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* }
+	%struct.real_value = type { i8, [3 x i8], [5 x i32] }
+	%struct.reg_attrs = type { %struct.tree_node*, i64 }
+	%struct.reg_info_def = type opaque
+	%struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
+	%struct.rtunion = type { i32 }
+	%struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+	%struct.rtx_def = type { i16, i8, i8, %struct.u }
+	%struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+	%struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
+	%struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
+	%struct.temp_slot = type opaque
+	%struct.text_info = type { i8*, i8**, i32 }
+	%struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
+	%struct.tree_ann_d = type { %struct.stmt_ann_d }
+	%struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree }
+	%struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* }
+	%struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
+	%struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+	%struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+	%struct.tree_decl_u1 = type { i64 }
+	%struct.tree_decl_u1_a = type { i32 }
+	%struct.tree_decl_u2 = type { %struct.function* }
+	%struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] }
+	%struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier }
+	%struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi }
+	%struct.tree_int_cst_lowhi = type { i64, i64 }
+	%struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* }
+	%struct.tree_node = type { %struct.tree_decl }
+	%struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] }
+	%struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* }
+	%struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* }
+	%struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* }
+	%struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* }
+	%struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* }
+	%struct.tree_string = type { %struct.tree_common, i32, [1 x i8] }
+	%struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* }
+	%struct.tree_type_symtab = type { i32 }
+	%struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 }
+	%struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] }
+	%struct.tree_vector = type { %struct.tree_common, %struct.tree_node* }
+	%struct.u = type { [1 x i64] }
+	%struct.use_operand_ptr = type { %struct.tree_node** }
+	%struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
+	%struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
+	%struct.v_may_def_optype_d = type { i32, [1 x %struct.elt_t] }
+	%struct.v_must_def_optype_d = type { i32, [1 x %struct.elt_t] }
+	%struct.value_set = type opaque
+	%struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* }
+	%struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+	%struct.varasm_status = type opaque
+	%struct.varray_data = type { [1 x i64] }
+	%struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+	%struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
+@gt_pch_rs_gt_gimplify_h = external global [2 x %struct.ggc_root_tab]		; <[2 x %struct.ggc_root_tab]*> [#uses=0]
+@tmp_var_id_num = external global i32		; <i32*> [#uses=0]
+@gt_ggc_r_gt_gimplify_h = external global [1 x %struct.ggc_root_tab]		; <[1 x %struct.ggc_root_tab]*> [#uses=0]
+@__FUNCTION__.19956 = external global [15 x i8]		; <[15 x i8]*> [#uses=0]
+@str = external global [42 x i8]		; <[42 x i8]*> [#uses=1]
+@__FUNCTION__.19974 = external global [22 x i8]		; <[22 x i8]*> [#uses=0]
+@gimplify_ctxp = external global %struct.gimplify_ctx*		; <%struct.gimplify_ctx**> [#uses=0]
+@cl_pf_opts = external global %struct.cl_perfunc_opts		; <%struct.cl_perfunc_opts*> [#uses=0]
+@__FUNCTION__.20030 = external global [22 x i8]		; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20099 = external global [24 x i8]		; <[24 x i8]*> [#uses=0]
+@global_trees = external global [47 x %struct.tree_node*]		; <[47 x %struct.tree_node*]*> [#uses=0]
+@tree_code_type = external global [0 x i32]		; <[0 x i32]*> [#uses=2]
+@current_function_decl = external global %struct.tree_node*		; <%struct.tree_node**> [#uses=0]
+@str1 = external global [2 x i8]		; <[2 x i8]*> [#uses=0]
+@str2 = external global [7 x i8]		; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20151 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20221 = external global [9 x i8]		; <[9 x i8]*> [#uses=0]
+@tree_code_length = external global [0 x i8]		; <[0 x i8]*> [#uses=0]
+@__FUNCTION__.20435 = external global [17 x i8]		; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20496 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@cfun = external global %struct.function*		; <%struct.function**> [#uses=0]
+@__FUNCTION__.20194 = external global [15 x i8]		; <[15 x i8]*> [#uses=0]
+@__FUNCTION__.19987 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20532 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20583 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20606 = external global [22 x i8]		; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20644 = external global [17 x i8]		; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.20681 = external global [13 x i8]		; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.20700 = external global [13 x i8]		; <[13 x i8]*> [#uses=0]
+@__FUNCTION__.21426 = external global [20 x i8]		; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.21471 = external global [17 x i8]		; <[17 x i8]*> [#uses=0]
+@__FUNCTION__.21962 = external global [27 x i8]		; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.22992 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.23735 = external global [15 x i8]		; <[15 x i8]*> [#uses=0]
+@lang_hooks = external global %struct.lang_hooks		; <%struct.lang_hooks*> [#uses=0]
+@__FUNCTION__.27383 = external global [22 x i8]		; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.20776 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.10672 = external global [9 x i8]		; <[9 x i8]*> [#uses=0]
+@str3 = external global [47 x i8]		; <[47 x i8]*> [#uses=0]
+@str4 = external global [7 x i8]		; <[7 x i8]*> [#uses=0]
+@__FUNCTION__.20065 = external global [25 x i8]		; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.23256 = external global [16 x i8]		; <[16 x i8]*> [#uses=0]
+@__FUNCTION__.23393 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.20043 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20729 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20563 = external global [24 x i8]		; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.10663 = external global [10 x i8]		; <[10 x i8]*> [#uses=0]
+@__FUNCTION__.20367 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.20342 = external global [15 x i8]		; <[15 x i8]*> [#uses=0]
+@input_location = external global %struct.location_t		; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.24510 = external global [27 x i8]		; <[27 x i8]*> [#uses=0]
+@__FUNCTION__.25097 = external global [25 x i8]		; <[25 x i8]*> [#uses=0]
+@__FUNCTION__.24705 = external global [26 x i8]		; <[26 x i8]*> [#uses=0]
+@str5 = external global [2 x i8]		; <[2 x i8]*> [#uses=0]
+@__FUNCTION__.25136 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.24450 = external global [31 x i8]		; <[31 x i8]*> [#uses=0]
+@implicit_built_in_decls = external global [471 x %struct.tree_node*]		; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.24398 = external global [31 x i8]		; <[31 x i8]*> [#uses=0]
+@__FUNCTION__.26156 = external global [14 x i8]		; <[14 x i8]*> [#uses=1]
+@unknown_location = external global %struct.location_t		; <%struct.location_t*> [#uses=0]
+@__FUNCTION__.23038 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@str6 = external global [43 x i8]		; <[43 x i8]*> [#uses=0]
+@__FUNCTION__.25476 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.22136 = external global [20 x i8]		; <[20 x i8]*> [#uses=1]
+@__FUNCTION__.21997 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.21247 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@built_in_decls = external global [471 x %struct.tree_node*]		; <[471 x %struct.tree_node*]*> [#uses=0]
+@__FUNCTION__.21924 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21861 = external global [25 x i8]		; <[25 x i8]*> [#uses=0]
+@global_dc = external global %struct.diagnostic_context*		; <%struct.diagnostic_context**> [#uses=0]
+@__FUNCTION__.25246 = external global [32 x i8]		; <[32 x i8]*> [#uses=0]
+@str7 = external global [4 x i8]		; <[4 x i8]*> [#uses=0]
+@stderr = external global %struct.FILE*		; <%struct.FILE**> [#uses=0]
+@str8 = external global [24 x i8]		; <[24 x i8]*> [#uses=0]
+@str9 = external global [22 x i8]		; <[22 x i8]*> [#uses=0]
+@__FUNCTION__.27653 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27322 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.27139 = external global [20 x i8]		; <[20 x i8]*> [#uses=0]
+@__FUNCTION__.22462 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@str10 = external global [6 x i8]		; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.25389 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.25650 = external global [18 x i8]		; <[18 x i8]*> [#uses=0]
+@str11 = external global [32 x i8]		; <[32 x i8]*> [#uses=0]
+@str12 = external global [3 x i8]		; <[3 x i8]*> [#uses=0]
+@str13 = external global [44 x i8]		; <[44 x i8]*> [#uses=0]
+@__FUNCTION__.27444 = external global [14 x i8]		; <[14 x i8]*> [#uses=0]
+@timevar_enable = external global i8		; <i8*> [#uses=0]
+@__FUNCTION__.27533 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@flag_instrument_function_entry_exit = external global i32		; <i32*> [#uses=0]
+@__FUNCTION__.25331 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.20965 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@str14 = external global [12 x i8]		; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.26053 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@__FUNCTION__.26004 = external global [20 x i8]		; <[20 x i8]*> [#uses=0]
+@str15 = external global [8 x i8]		; <[8 x i8]*> [#uses=0]
+@__FUNCTION__.21584 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+@str16 = external global [12 x i8]		; <[12 x i8]*> [#uses=0]
+@__FUNCTION__.25903 = external global [28 x i8]		; <[28 x i8]*> [#uses=0]
+@__FUNCTION__.22930 = external global [23 x i8]		; <[23 x i8]*> [#uses=0]
+@__FUNCTION__.23832 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@str17 = external global [6 x i8]		; <[6 x i8]*> [#uses=0]
+@__FUNCTION__.24620 = external global [24 x i8]		; <[24 x i8]*> [#uses=0]
+@__FUNCTION__.24582 = external global [30 x i8]		; <[30 x i8]*> [#uses=0]
+@__FUNCTION__.21382 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+@__FUNCTION__.21117 = external global [21 x i8]		; <[21 x i8]*> [#uses=0]
+
+
+declare void @push_gimplify_context()
+
+declare i32 @gimple_tree_hash(i8*)
+
+declare i32 @iterative_hash_expr(%struct.tree_node*, i32)
+
+declare i32 @gimple_tree_eq(i8*, i8*)
+
+declare i32 @operand_equal_p(%struct.tree_node*, %struct.tree_node*, i32)
+
+declare void @fancy_abort(i8*, i32, i8*)
+
+declare i8* @xcalloc(i32, i32)
+
+declare %struct.htab* @htab_create(i32, i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*)
+
+declare void @free(i8*)
+
+declare void @gimple_push_bind_expr(%struct.tree_node*)
+
+declare void @gimple_pop_bind_expr()
+
+declare %struct.tree_node* @gimple_current_bind_expr()
+
+declare fastcc void @gimple_push_condition()
+
+declare %struct.tree_node* @create_artificial_label()
+
+declare %struct.tree_node* @build_decl_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @create_tmp_var_name(i8*)
+
+declare i32 @strlen(i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i32 @sprintf(i8*, i8*, ...)
+
+declare %struct.tree_node* @get_identifier(i8*)
+
+declare %struct.tree_node* @create_tmp_var_raw(%struct.tree_node*, i8*)
+
+declare %struct.tree_node* @build_qualified_type(%struct.tree_node*, i32)
+
+declare i8* @get_name(%struct.tree_node*)
+
+declare void @tree_operand_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...)
+
+declare void @declare_tmp_vars(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @nreverse(%struct.tree_node*)
+
+declare void @gimple_add_tmp_var(%struct.tree_node*)
+
+declare void @record_vars(%struct.tree_node*)
+
+declare %struct.tree_node* @create_tmp_var(%struct.tree_node*, i8*)
+
+declare void @pop_gimplify_context(%struct.tree_node*)
+
+declare void @htab_delete(%struct.htab*)
+
+declare fastcc void @annotate_one_with_locus(%struct.tree_node*, i32, i32)
+
+declare void @annotate_with_locus(%struct.tree_node*, i32, i32)
+
+declare %struct.tree_node* @mostly_copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_tree_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @mark_decls_volatile_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @copy_if_shared_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @walk_tree(%struct.tree_node**, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)
+
+declare %struct.tree_node* @unmark_visited_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @unshare_body(%struct.tree_node**, %struct.tree_node*)
+
+declare %struct.cgraph_node* @cgraph_node(%struct.tree_node*)
+
+declare fastcc void @unvisit_body(%struct.tree_node**, %struct.tree_node*)
+
+declare void @unshare_all_trees(%struct.tree_node*)
+
+declare %struct.tree_node* @unshare_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_and_jump(%struct.tree_node**)
+
+declare %struct.tree_node* @build1_stat(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare i32 @compare_case_labels(i8*, i8*)
+
+declare i32 @tree_int_cst_compare(%struct.tree_node*, %struct.tree_node*)
+
+declare void @sort_case_labels(%struct.tree_node*)
+
+declare void @tree_vec_elt_check_failed(i32, i32, i8*, i32, i8*)
+
+declare void @qsort(i8*, i32, i32, i32 (i8*, i8*)*)
+
+declare %struct.tree_node* @force_labels_r(%struct.tree_node**, i32*, i8*)
+
+declare fastcc void @canonicalize_component_ref(%struct.tree_node**)
+
+declare %struct.tree_node* @get_unwidened(%struct.tree_node*, %struct.tree_node*)
+
+declare fastcc void @maybe_with_size_expr(%struct.tree_node**)
+
+declare %struct.tree_node* @substitute_placeholder_in_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build2_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @gimple_boolify(%struct.tree_node*)
+
+declare %struct.tree_node* @convert(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @gimplify_init_ctor_preeval_1(%struct.tree_node**, i32*, i8*)
+
+declare i64 @get_alias_set(%struct.tree_node*)
+
+declare i32 @alias_sets_conflict_p(i64, i64)
+
+declare fastcc i8 @cpt_same_type(%struct.tree_node*, %struct.tree_node*) zeroext
+
+declare %struct.tree_node* @check_pointer_types_r(%struct.tree_node**, i32*, i8*)
+
+declare %struct.tree_node* @voidify_wrapper_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @integer_zerop(%struct.tree_node*)
+
+declare fastcc void @append_to_statement_list_1(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @alloc_stmt_list()
+
+declare void @tsi_link_after(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare void @append_to_statement_list_force(%struct.tree_node*, %struct.tree_node**)
+
+declare void @append_to_statement_list(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc %struct.tree_node* @shortcut_cond_r(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build3_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare fastcc %struct.tree_node* @shortcut_cond_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @expr_last(%struct.tree_node*)
+
+declare i8 @block_may_fallthru(%struct.tree_node*) zeroext 
+
+declare fastcc void @gimple_pop_condition(%struct.tree_node**)
+
+declare %struct.tree_node* @gimple_build_eh_filter(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @annotate_all_with_locus(%struct.tree_node**, i32, i32)
+
+declare fastcc %struct.tree_node* @internal_get_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+define i32 @gimplify_expr(%struct.tree_node** %expr_p, %struct.tree_node** %pre_p, %struct.tree_node** %post_p, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback) {
+entry:
+	%internal_post = alloca %struct.tree_node*, align 4		; <%struct.tree_node**> [#uses=2]
+	%pre_p_addr.0 = select i1 false, %struct.tree_node** null, %struct.tree_node** %pre_p		; <%struct.tree_node**> [#uses=7]
+	%post_p_addr.0 = select i1 false, %struct.tree_node** %internal_post, %struct.tree_node** %post_p		; <%struct.tree_node**> [#uses=7]
+	br i1 false, label %bb277, label %bb191
+
+bb191:		; preds = %entry
+	ret i32 0
+
+bb277:		; preds = %entry
+	%tmp283 = call i32 null( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 )		; <i32> [#uses=1]
+	switch i32 %tmp283, label %bb7478 [
+		 i32 0, label %cond_next289
+		 i32 -1, label %cond_next298
+	]
+
+cond_next289:		; preds = %bb277
+	ret i32 0
+
+cond_next298:		; preds = %bb277
+	switch i32 0, label %bb7444 [
+		 i32 24, label %bb7463
+		 i32 25, label %bb7463
+		 i32 26, label %bb7463
+		 i32 27, label %bb7463
+		 i32 28, label %bb7463
+		 i32 33, label %bb4503
+		 i32 39, label %bb397
+		 i32 40, label %bb5650
+		 i32 41, label %bb4339
+		 i32 42, label %bb4350
+		 i32 43, label %bb4350
+		 i32 44, label %bb319
+		 i32 45, label %bb397
+		 i32 46, label %bb6124
+		 i32 47, label %bb7463
+		 i32 49, label %bb5524
+		 i32 50, label %bb1283
+		 i32 51, label %bb1289
+		 i32 52, label %bb1289
+		 i32 53, label %bb5969
+		 i32 54, label %bb408
+		 i32 56, label %bb5079
+		 i32 57, label %bb428
+		 i32 59, label %bb5965
+		 i32 74, label %bb4275
+		 i32 75, label %bb4275
+		 i32 76, label %bb4275
+		 i32 77, label %bb4275
+		 i32 91, label %bb1296
+		 i32 92, label %bb1296
+		 i32 96, label %bb1322
+		 i32 112, label %bb2548
+		 i32 113, label %bb2548
+		 i32 115, label %bb397
+		 i32 116, label %bb5645
+		 i32 117, label %bb1504
+		 i32 121, label %bb397
+		 i32 122, label %bb397
+		 i32 123, label %bb313
+		 i32 124, label %bb313
+		 i32 125, label %bb313
+		 i32 126, label %bb313
+		 i32 127, label %bb2141
+		 i32 128, label %cond_next5873
+		 i32 129, label %cond_next5873
+		 i32 130, label %bb4536
+		 i32 131, label %bb5300
+		 i32 132, label %bb5170
+		 i32 133, label %bb5519
+		 i32 134, label %bb5091
+		 i32 135, label %bb5083
+		 i32 136, label %bb5087
+		 i32 137, label %bb5382
+		 i32 139, label %bb7463
+		 i32 140, label %bb7463
+		 i32 142, label %bb5974
+		 i32 143, label %bb6049
+		 i32 147, label %bb6296
+		 i32 151, label %cond_next6474
+	]
+
+bb313:		; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298
+	ret i32 0
+
+bb319:		; preds = %cond_next298
+	ret i32 0
+
+bb397:		; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+	ret i32 0
+
+bb408:		; preds = %cond_next298
+	%tmp413 = call fastcc i32 @gimplify_cond_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, %struct.tree_node* null, i32 %fallback )		; <i32> [#uses=0]
+	ret i32 0
+
+bb428:		; preds = %cond_next298
+	ret i32 0
+
+bb1283:		; preds = %cond_next298
+	ret i32 0
+
+bb1289:		; preds = %cond_next298, %cond_next298
+	ret i32 0
+
+bb1296:		; preds = %cond_next298, %cond_next298
+	ret i32 0
+
+bb1322:		; preds = %cond_next298
+	ret i32 0
+
+bb1504:		; preds = %cond_next298
+	ret i32 0
+
+bb2141:		; preds = %cond_next298
+	ret i32 0
+
+bb2548:		; preds = %cond_next298, %cond_next298
+	%tmp2554 = load %struct.tree_node** %expr_p		; <%struct.tree_node*> [#uses=2]
+	%tmp2562 = and i32 0, 255		; <i32> [#uses=1]
+	%tmp2569 = add i8 0, -4		; <i8> [#uses=1]
+	icmp ugt i8 %tmp2569, 5		; <i1>:0 [#uses=2]
+	%tmp2587 = load i8* null		; <i8> [#uses=1]
+	icmp eq i8 %tmp2587, 0		; <i1>:1 [#uses=2]
+	%tmp2607 = load %struct.tree_node** null		; <%struct.tree_node*> [#uses=2]
+	br i1 false, label %bb2754, label %cond_next2617
+
+cond_next2617:		; preds = %bb2548
+	ret i32 0
+
+bb2754:		; preds = %bb2548
+	br i1 %0, label %cond_true2780, label %cond_next2783
+
+cond_true2780:		; preds = %bb2754
+	call void @tree_class_check_failed( %struct.tree_node* %tmp2554, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+	unreachable
+
+cond_next2783:		; preds = %bb2754
+	%tmp2825 = and i32 0, 255		; <i32> [#uses=1]
+	%tmp2829 = load i32* null		; <i32> [#uses=1]
+	%tmp28292830 = trunc i32 %tmp2829 to i8		; <i8> [#uses=1]
+	%tmp2832 = add i8 %tmp28292830, -4		; <i8> [#uses=1]
+	icmp ugt i8 %tmp2832, 5		; <i1>:2 [#uses=1]
+	icmp eq i8 0, 0		; <i1>:3 [#uses=1]
+	%tmp28652866 = bitcast %struct.tree_node* %tmp2607 to %struct.tree_exp*		; <%struct.tree_exp*> [#uses=1]
+	%tmp2868 = getelementptr %struct.tree_exp* %tmp28652866, i32 0, i32 4, i32 0		; <%struct.tree_node**> [#uses=1]
+	%tmp2870 = load %struct.tree_node** %tmp2868		; <%struct.tree_node*> [#uses=1]
+	br i1 %1, label %cond_true2915, label %cond_next2927
+
+cond_true2915:		; preds = %cond_next2783
+	unreachable
+
+cond_next2927:		; preds = %cond_next2783
+	%tmp2938 = load %struct.tree_node** null		; <%struct.tree_node*> [#uses=1]
+	%tmp2944 = load i32* null		; <i32> [#uses=1]
+	%tmp2946 = and i32 %tmp2944, 255		; <i32> [#uses=1]
+	%tmp2949 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp2946		; <i32*> [#uses=1]
+	%tmp2950 = load i32* %tmp2949		; <i32> [#uses=1]
+	icmp eq i32 %tmp2950, 2		; <i1>:4 [#uses=1]
+	br i1 %4, label %cond_next2954, label %cond_true2951
+
+cond_true2951:		; preds = %cond_next2927
+	call void @tree_class_check_failed( %struct.tree_node* %tmp2938, i32 2, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+	unreachable
+
+cond_next2954:		; preds = %cond_next2927
+	br i1 %0, label %cond_true2991, label %cond_next2994
+
+cond_true2991:		; preds = %cond_next2954
+	unreachable
+
+cond_next2994:		; preds = %cond_next2954
+	br i1 %1, label %cond_true3009, label %cond_next3021
+
+cond_true3009:		; preds = %cond_next2994
+	call void @tree_operand_check_failed( i32 0, i32 %tmp2562, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+	unreachable
+
+cond_next3021:		; preds = %cond_next2994
+	br i1 %2, label %cond_true3044, label %cond_next3047
+
+cond_true3044:		; preds = %cond_next3021
+	call void @tree_class_check_failed( %struct.tree_node* %tmp2607, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+	unreachable
+
+cond_next3047:		; preds = %cond_next3021
+	br i1 %3, label %cond_true3062, label %cond_next3074
+
+cond_true3062:		; preds = %cond_next3047
+	call void @tree_operand_check_failed( i32 0, i32 %tmp2825, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) )
+	unreachable
+
+cond_next3074:		; preds = %cond_next3047
+	%tmp3084 = getelementptr %struct.tree_node* %tmp2870, i32 0, i32 0, i32 0, i32 1		; <%struct.tree_node**> [#uses=1]
+	%tmp3085 = load %struct.tree_node** %tmp3084		; <%struct.tree_node*> [#uses=1]
+	%tmp31043105 = bitcast %struct.tree_node* %tmp3085 to %struct.tree_type*		; <%struct.tree_type*> [#uses=1]
+	%tmp3106 = getelementptr %struct.tree_type* %tmp31043105, i32 0, i32 6		; <i16*> [#uses=1]
+	%tmp31063107 = bitcast i16* %tmp3106 to i32*		; <i32*> [#uses=1]
+	%tmp3108 = load i32* %tmp31063107		; <i32> [#uses=1]
+	xor i32 %tmp3108, 0		; <i32>:5 [#uses=1]
+	%tmp81008368 = and i32 %5, 65024		; <i32> [#uses=1]
+	icmp eq i32 %tmp81008368, 0		; <i1>:6 [#uses=1]
+	br i1 %6, label %cond_next3113, label %bb3351
+
+cond_next3113:		; preds = %cond_next3074
+	ret i32 0
+
+bb3351:		; preds = %cond_next3074
+	%tmp3354 = call i8 @tree_ssa_useless_type_conversion( %struct.tree_node* %tmp2554 ) zeroext 		; <i8> [#uses=1]
+	icmp eq i8 %tmp3354, 0		; <i1>:7 [#uses=1]
+	%tmp3424 = load i32* null		; <i32> [#uses=1]
+	br i1 %7, label %cond_next3417, label %cond_true3356
+
+cond_true3356:		; preds = %bb3351
+	ret i32 0
+
+cond_next3417:		; preds = %bb3351
+	br i1 false, label %cond_true3429, label %cond_next4266
+
+cond_true3429:		; preds = %cond_next3417
+	%tmp3443 = and i32 %tmp3424, 255		; <i32> [#uses=0]
+	ret i32 0
+
+cond_next4266:		; preds = %cond_next3417
+	%tmp4268 = load %struct.tree_node** %expr_p		; <%struct.tree_node*> [#uses=1]
+	icmp eq %struct.tree_node* %tmp4268, null		; <i1>:8 [#uses=1]
+	br i1 %8, label %bb4275, label %bb7463
+
+bb4275:		; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+	%tmp4289 = and i32 0, 255		; <i32> [#uses=2]
+	%tmp4292 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp4289		; <i32*> [#uses=1]
+	%tmp4293 = load i32* %tmp4292		; <i32> [#uses=1]
+	%tmp42934294 = trunc i32 %tmp4293 to i8		; <i8> [#uses=1]
+	%tmp4296 = add i8 %tmp42934294, -4		; <i8> [#uses=1]
+	icmp ugt i8 %tmp4296, 5		; <i1>:9 [#uses=1]
+	br i1 %9, label %cond_true4297, label %cond_next4300
+
+cond_true4297:		; preds = %bb4275
+	unreachable
+
+cond_next4300:		; preds = %bb4275
+	%tmp4314 = load i8* null		; <i8> [#uses=1]
+	icmp eq i8 %tmp4314, 0		; <i1>:10 [#uses=1]
+	br i1 %10, label %cond_true4315, label %cond_next4327
+
+cond_true4315:		; preds = %cond_next4300
+	call void @tree_operand_check_failed( i32 0, i32 %tmp4289, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 3997, i8* getelementptr ([14 x i8]* @__FUNCTION__.26156, i32 0, i32 0) )
+	unreachable
+
+cond_next4327:		; preds = %cond_next4300
+	%tmp4336 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 )		; <i32> [#uses=0]
+	ret i32 0
+
+bb4339:		; preds = %cond_next298
+	ret i32 0
+
+bb4350:		; preds = %cond_next298, %cond_next298
+	ret i32 0
+
+bb4503:		; preds = %cond_next298
+	ret i32 0
+
+bb4536:		; preds = %cond_next298
+	ret i32 0
+
+bb5079:		; preds = %cond_next298
+	ret i32 0
+
+bb5083:		; preds = %cond_next298
+	ret i32 0
+
+bb5087:		; preds = %cond_next298
+	ret i32 0
+
+bb5091:		; preds = %cond_next298
+	ret i32 0
+
+bb5170:		; preds = %cond_next298
+	ret i32 0
+
+bb5300:		; preds = %cond_next298
+	ret i32 0
+
+bb5382:		; preds = %cond_next298
+	ret i32 0
+
+bb5519:		; preds = %cond_next298
+	ret i32 0
+
+bb5524:		; preds = %cond_next298
+	ret i32 0
+
+bb5645:		; preds = %cond_next298
+	ret i32 0
+
+bb5650:		; preds = %cond_next298
+	ret i32 0
+
+cond_next5873:		; preds = %cond_next298, %cond_next298
+	ret i32 0
+
+bb5965:		; preds = %cond_next298
+	%tmp5968 = call fastcc i32 @gimplify_cleanup_point_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0 )		; <i32> [#uses=0]
+	ret i32 0
+
+bb5969:		; preds = %cond_next298
+	%tmp5973 = call fastcc i32 @gimplify_target_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 )		; <i32> [#uses=0]
+	ret i32 0
+
+bb5974:		; preds = %cond_next298
+	ret i32 0
+
+bb6049:		; preds = %cond_next298
+	ret i32 0
+
+bb6124:		; preds = %cond_next298
+	ret i32 0
+
+bb6296:		; preds = %cond_next298
+	ret i32 0
+
+cond_next6474:		; preds = %cond_next298
+	icmp eq %struct.tree_node** %internal_post, %post_p_addr.0		; <i1>:11 [#uses=1]
+	%iftmp.381.0 = select i1 %11, %struct.tree_node** null, %struct.tree_node** %post_p_addr.0		; <%struct.tree_node**> [#uses=1]
+	%tmp6490 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %iftmp.381.0, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback )		; <i32> [#uses=0]
+	%tmp6551 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 )		; <i32> [#uses=0]
+	ret i32 0
+
+bb7444:		; preds = %cond_next298
+	ret i32 0
+
+bb7463:		; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298
+	ret i32 0
+
+bb7478:		; preds = %bb277
+	ret i32 0
+}
+
+declare i8 @is_gimple_formal_tmp_rhs(%struct.tree_node*) zeroext 
+
+declare void @gimplify_and_add(%struct.tree_node*, %struct.tree_node**)
+
+declare %struct.tree_node* @get_initialized_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @get_formal_tmp_var(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_init_ctor_preeval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.gimplify_init_ctor_preeval_data*)
+
+declare i8 @type_contains_placeholder_p(%struct.tree_node*) zeroext 
+
+declare i8 @is_gimple_mem_rhs(%struct.tree_node*) zeroext 
+
+declare fastcc i32 @gimplify_modify_expr_rhs(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_compound_expr(%struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare i8 @is_gimple_lvalue(%struct.tree_node*) zeroext 
+
+declare void @categorize_ctor_elements(%struct.tree_node*, i64*, i64*, i64*, i8*)
+
+declare void @lhd_set_decl_assembler_name(%struct.tree_node*)
+
+declare i64 @int_size_in_bytes(%struct.tree_node*)
+
+declare i32 @can_move_by_pieces(i64, i32)
+
+declare i64 @count_type_elements(%struct.tree_node*)
+
+declare void @gimplify_stmt(%struct.tree_node**)
+
+declare %struct.tree_node* @get_base_address(%struct.tree_node*)
+
+declare fastcc void @gimplify_init_ctor_eval(%struct.tree_node*, %struct.tree_node*, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @build_complex(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare i8 (%struct.tree_node*) zeroext * @rhs_predicate_for(%struct.tree_node*)
+
+declare %struct.tree_node* @build_vector(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_val(%struct.tree_node*) zeroext 
+
+declare i8 @is_gimple_reg_type(%struct.tree_node*) zeroext 
+
+declare fastcc i32 @gimplify_cond_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node*, i32)
+
+declare fastcc i32 @gimplify_modify_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare %struct.tree_node* @tree_cons_stat(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_addr_expr(%struct.tree_node*)
+
+declare %struct.tree_node* @build_function_call_expr(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @is_gimple_addressable(%struct.tree_node*) zeroext 
+
+declare i8 @is_gimple_reg(%struct.tree_node*) zeroext 
+
+declare %struct.tree_node* @make_ssa_name(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @tree_ssa_useless_type_conversion(%struct.tree_node*) zeroext 
+
+declare fastcc i32 @gimplify_self_mod_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext )
+
+declare fastcc i32 @gimplify_compound_lval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i32)
+
+declare %struct.tree_node* @get_callee_fndecl(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_builtin(%struct.tree_node*, i8 zeroext )
+
+declare void @error(i8*, ...)
+
+declare %struct.tree_node* @build_empty_stmt()
+
+declare i8 @fold_builtin_next_arg(%struct.tree_node*) zeroext 
+
+declare fastcc i32 @gimplify_arg(%struct.tree_node**, %struct.tree_node**)
+
+declare i8 @is_gimple_call_addr(%struct.tree_node*) zeroext 
+
+declare i32 @call_expr_flags(%struct.tree_node*)
+
+declare void @recalculate_side_effects(%struct.tree_node*)
+
+declare %struct.tree_node* @fold_convert(%struct.tree_node*, %struct.tree_node*)
+
+declare void @recompute_tree_invarant_for_addr_expr(%struct.tree_node*)
+
+declare i32 @gimplify_va_arg_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @size_int_kind(i64, i32)
+
+declare %struct.tree_node* @size_binop(i32, %struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @build4_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*)
+
+declare void @gimplify_type_sizes(%struct.tree_node*, %struct.tree_node**)
+
+declare void @gimplify_one_sizepos(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @build_pointer_type(%struct.tree_node*)
+
+declare %struct.tree_node* @build_fold_indirect_ref(%struct.tree_node*)
+
+declare fastcc i32 @gimplify_bind_expr(%struct.tree_node**, %struct.tree_node*, %struct.tree_node**)
+
+declare fastcc void @gimplify_loop_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_switch_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare %struct.tree_node* @decl_function_context(%struct.tree_node*)
+
+declare %struct.varray_head_tag* @varray_grow(%struct.varray_head_tag*, i32)
+
+declare fastcc void @gimplify_return_expr(%struct.tree_node*, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_save_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_asm_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @gimplify_to_stmt_list(%struct.tree_node**)
+
+declare fastcc i32 @gimplify_cleanup_point_expr(%struct.tree_node**, %struct.tree_node**)
+
+declare fastcc i32 @gimplify_target_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)
+
+declare void @tsi_delink(%struct.tree_stmt_iterator*)
+
+declare void @tsi_link_before(%struct.tree_stmt_iterator*, %struct.tree_node*, i32)
+
+declare i8 @is_gimple_stmt(%struct.tree_node*) zeroext 
+
+declare void @print_generic_expr(%struct.FILE*, %struct.tree_node*, i32)
+
+declare void @debug_tree(%struct.tree_node*)
+
+declare void @internal_error(i8*, ...)
+
+declare %struct.tree_node* @force_gimple_operand(%struct.tree_node*, %struct.tree_node**, i8 zeroext , %struct.tree_node*)
+
+declare i8 @is_gimple_reg_rhs(%struct.tree_node*) zeroext 
+
+declare void @add_referenced_tmp_var(%struct.tree_node*)
+
+declare i8 @contains_placeholder_p(%struct.tree_node*) zeroext 
+
+declare %struct.varray_head_tag* @varray_init(i32, i32, i8*)
+
+declare i32 @handled_component_p(%struct.tree_node*)
+
+declare void @varray_check_failed(%struct.varray_head_tag*, i32, i8*, i32, i8*)
+
+declare %struct.tree_node* @array_ref_low_bound(%struct.tree_node*)
+
+declare i8 @is_gimple_min_invariant(%struct.tree_node*) zeroext 
+
+declare i8 @is_gimple_formal_tmp_reg(%struct.tree_node*) zeroext 
+
+declare %struct.tree_node* @array_ref_element_size(%struct.tree_node*)
+
+declare %struct.tree_node* @component_ref_field_offset(%struct.tree_node*)
+
+declare i8 @is_gimple_min_lval(%struct.tree_node*) zeroext 
+
+declare void @varray_underflow(%struct.varray_head_tag*, i8*, i32, i8*)
+
+declare i32 @list_length(%struct.tree_node*)
+
+declare i8 @parse_output_constraint(i8**, i32, i32, i32, i8*, i8*, i8*) zeroext 
+
+declare i8* @xstrdup(i8*)
+
+declare %struct.tree_node* @build_string(i32, i8*)
+
+declare i8* @strchr(i8*, i32)
+
+declare %struct.tree_node* @build_tree_list_stat(%struct.tree_node*, %struct.tree_node*)
+
+declare %struct.tree_node* @chainon(%struct.tree_node*, %struct.tree_node*)
+
+declare i8 @parse_input_constraint(i8**, i32, i32, i32, i32, i8**, i8*, i8*) zeroext 
+
+declare i8 @is_gimple_asm_val(%struct.tree_node*) zeroext 
+
+declare void @gimplify_body(%struct.tree_node**, %struct.tree_node*, i8 zeroext )
+
+declare void @timevar_push_1(i32)
+
+declare %struct.tree_node* @gimplify_parameters()
+
+declare %struct.tree_node* @expr_only(%struct.tree_node*)
+
+declare void @timevar_pop_1(i32)
+
+declare void @gimplify_function_tree(%struct.tree_node*)
+
+declare void @allocate_struct_function(%struct.tree_node*)
+
+declare %struct.tree_node* @make_tree_vec_stat(i32)
+
+declare %struct.tree_node* @tsi_split_statement_list_after(%struct.tree_stmt_iterator*)
+
+declare i8 @is_gimple_condexpr(%struct.tree_node*) zeroext 
+
+declare %struct.tree_node* @invert_truthvalue(%struct.tree_node*)
+
+declare i8 @initializer_zerop(%struct.tree_node*) zeroext 
+
+declare i32 @simple_cst_equal(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @aggregate_value_p(%struct.tree_node*, %struct.tree_node*)
+
+declare i32 @fwrite(i8*, i32, i32, %struct.FILE*)
diff --git a/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..f927ef43ca194
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+	%struct.rtx_def = type { i16, i8, i8, %struct.u }
+	%struct.u = type { [1 x i64] }
+
+define fastcc void @find_reloads_address(%struct.rtx_def** %loc) {
+entry:
+	%ad_addr = alloca %struct.rtx_def*		; <%struct.rtx_def**> [#uses=2]
+	br i1 false, label %cond_next416, label %cond_true340
+
+cond_true340:		; preds = %entry
+	ret void
+
+cond_next416:		; preds = %entry
+	%tmp1085 = load %struct.rtx_def** %ad_addr		; <%struct.rtx_def*> [#uses=1]
+	br i1 false, label %bb1084, label %cond_true418
+
+cond_true418:		; preds = %cond_next416
+	ret void
+
+bb1084:		; preds = %cond_next416
+	br i1 false, label %cond_true1092, label %cond_next1102
+
+cond_true1092:		; preds = %bb1084
+	%tmp1094 = getelementptr %struct.rtx_def* %tmp1085, i32 0, i32 3		; <%struct.u*> [#uses=1]
+	%tmp10981099 = bitcast %struct.u* %tmp1094 to %struct.rtx_def**		; <%struct.rtx_def**> [#uses=2]
+	%tmp1101 = load %struct.rtx_def** %tmp10981099		; <%struct.rtx_def*> [#uses=1]
+	store %struct.rtx_def* %tmp1101, %struct.rtx_def** %ad_addr
+	br label %cond_next1102
+
+cond_next1102:		; preds = %cond_true1092, %bb1084
+	%loc_addr.0 = phi %struct.rtx_def** [ %tmp10981099, %cond_true1092 ], [ %loc, %bb1084 ]		; <%struct.rtx_def**> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..55d29933a55c9
--- /dev/null
+++ b/test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
@@ -0,0 +1,101 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1279
+
+	%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }
+	%struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 }
+	%struct.eh_status = type opaque
+	%struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
+	%struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
+	%struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
+	%struct.initial_value_struct = type opaque
+	%struct.lang_decl = type opaque
+	%struct.language_function = type opaque
+	%struct.location_t = type { i8*, i32 }
+	%struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] }
+	%struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+	%struct.rtx_def = type { i16, i8, i8, %struct.u }
+	%struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
+	%struct.temp_slot = type opaque
+	%struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %union.tree_ann_d*, i8, i8, i8, i8, i8 }
+	%struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
+	%struct.tree_decl_u1 = type { i64 }
+	%struct.tree_decl_u2 = type { %struct.function* }
+	%struct.tree_node = type { %struct.tree_decl }
+	%struct.u = type { [1 x i64] }
+	%struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
+	%struct.varasm_status = type opaque
+	%struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
+	%union.tree_ann_d = type opaque
+@str469 = external global [42 x i8]		; <[42 x i8]*> [#uses=0]
+@__FUNCTION__.24265 = external global [19 x i8]		; <[19 x i8]*> [#uses=0]
+
+declare void @fancy_abort()
+
+define fastcc void @fold_builtin_bitop() {
+entry:
+	br i1 false, label %cond_true105, label %UnifiedReturnBlock
+
+cond_true105:		; preds = %entry
+	br i1 false, label %cond_true134, label %UnifiedReturnBlock
+
+cond_true134:		; preds = %cond_true105
+	switch i32 0, label %bb479 [
+		 i32 378, label %bb313
+		 i32 380, label %bb313
+		 i32 381, label %bb313
+		 i32 383, label %bb366
+		 i32 385, label %bb366
+		 i32 386, label %bb366
+		 i32 403, label %bb250
+		 i32 405, label %bb250
+		 i32 406, label %bb250
+		 i32 434, label %bb464
+		 i32 436, label %bb464
+		 i32 437, label %bb464
+		 i32 438, label %bb441
+		 i32 440, label %bb441
+		 i32 441, label %bb441
+	]
+
+bb250:		; preds = %cond_true134, %cond_true134, %cond_true134
+	ret void
+
+bb313:		; preds = %cond_true134, %cond_true134, %cond_true134
+	ret void
+
+bb366:		; preds = %cond_true134, %cond_true134, %cond_true134
+	ret void
+
+bb441:		; preds = %cond_true134, %cond_true134, %cond_true134
+	ret void
+
+bb457:		; preds = %bb464, %bb457
+	%tmp459 = add i64 0, 1		; <i64> [#uses=1]
+	br i1 false, label %bb474.preheader, label %bb457
+
+bb464:		; preds = %cond_true134, %cond_true134, %cond_true134
+	br i1 false, label %bb474.preheader, label %bb457
+
+bb474.preheader:		; preds = %bb464, %bb457
+	%result.5.ph = phi i64 [ 0, %bb464 ], [ %tmp459, %bb457 ]		; <i64> [#uses=1]
+	br label %bb474
+
+bb467:		; preds = %bb474
+	%indvar.next586 = add i64 %indvar585, 1		; <i64> [#uses=1]
+	br label %bb474
+
+bb474:		; preds = %bb467, %bb474.preheader
+	%indvar585 = phi i64 [ 0, %bb474.preheader ], [ %indvar.next586, %bb467 ]		; <i64> [#uses=2]
+	br i1 false, label %bb476, label %bb467
+
+bb476:		; preds = %bb474
+	%result.5 = add i64 %indvar585, %result.5.ph		; <i64> [#uses=0]
+	ret void
+
+bb479:		; preds = %cond_true134
+	tail call void @fancy_abort( )
+	unreachable
+
+UnifiedReturnBlock:		; preds = %cond_true105, %entry
+	ret void
+}
diff --git a/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..ef5a1ae404598
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin
+
+	%struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
+	%struct.Q_TBL = type { [64 x i16], i32 }
+	%struct.anon = type { [80 x i8] }
+	%struct.X_c_coef_ccler = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, i8***)* }
+	%struct.X_c_main_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32)* }
+	%struct.X_c_prep_ccler = type { void (%struct.X_Y*, i32)*, void (%struct.X_Y*, i8**, i32*, i32, i8***, i32*, i32)* }
+	%struct.X_color_converter = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8**, i8***, i32, i32)* }
+	%struct.X_common_struct = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32 }
+	%struct.X_comp_master = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, i32, i32 }
+	%struct.X_component_info = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Q_TBL*, i8* }
+	%struct.X_Y = type { %struct.X_error_mgr*, %struct.X_memory_mgr*, %struct.X_progress_mgr*, i8*, i32, i32, %struct.X_destination_mgr*, i32, i32, i32, i32, double, i32, i32, i32, %struct.X_component_info*, [4 x %struct.Q_TBL*], [4 x %struct.H_TBL*], [4 x %struct.H_TBL*], [16 x i8], [16 x i8], [16 x i8], i32, %struct.X_scan_info*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i16, i16, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.X_component_info*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, %struct.X_comp_master*, %struct.X_c_main_ccler*, %struct.X_c_prep_ccler*, %struct.X_c_coef_ccler*, %struct.X_marker_writer*, %struct.X_color_converter*, %struct.X_downssr*, %struct.X_forward_D*, %struct.X_entropy_en*, %struct.X_scan_info*, i32 }
+	%struct.X_destination_mgr = type { i8*, i32, void (%struct.X_Y*)*, i32 (%struct.X_Y*)*, void (%struct.X_Y*)* }
+	%struct.X_downssr = type { void (%struct.X_Y*)*, void (%struct.X_Y*, i8***, i32, i8***, i32)*, i32 }
+	%struct.X_entropy_en = type { void (%struct.X_Y*, i32)*, i32 (%struct.X_Y*, [64 x i16]**)*, void (%struct.X_Y*)* }
+	%struct.X_error_mgr = type { void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, void (%struct.X_common_struct*, i8*)*, void (%struct.X_common_struct*)*, i32, %struct.anon, i32, i32, i8**, i32, i8**, i32, i32 }
+	%struct.X_forward_D = type { void (%struct.X_Y*)*, void (%struct.X_Y*, %struct.X_component_info*, i8**, [64 x i16]*, i32, i32, i32)* }
+	%struct.X_marker_writer = type { void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*)*, void (%struct.X_Y*, i32, i32)*, void (%struct.X_Y*, i32)* }
+	%struct.X_memory_mgr = type { i8* (%struct.X_common_struct*, i32, i32)*, i8* (%struct.X_common_struct*, i32, i32)*, i8** (%struct.X_common_struct*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, i32, i32, i32)*, %struct.jvirt_sAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, %struct.jvirt_bAY_cc* (%struct.X_common_struct*, i32, i32, i32, i32, i32)*, void (%struct.X_common_struct*)*, i8** (%struct.X_common_struct*, %struct.jvirt_sAY_cc*, i32, i32, i32)*, [64 x i16]** (%struct.X_common_struct*, %struct.jvirt_bAY_cc*, i32, i32, i32)*, void (%struct.X_common_struct*, i32)*, void (%struct.X_common_struct*)*, i32, i32 }
+	%struct.X_progress_mgr = type { void (%struct.X_common_struct*)*, i32, i32, i32, i32 }
+	%struct.X_scan_info = type { i32, [4 x i32], i32, i32, i32, i32 }
+	%struct.jvirt_bAY_cc = type opaque
+	%struct.jvirt_sAY_cc = type opaque
+
+define void @test(%struct.X_Y* %cinfo) {
+entry:
+	br i1 false, label %bb.preheader, label %return
+
+bb.preheader:		; preds = %entry
+	%tbl.014.us = load i32* null		; <i32> [#uses=1]
+	br i1 false, label %cond_next.us, label %bb
+
+cond_next51.us:		; preds = %cond_next.us, %cond_true33.us.cond_true46.us_crit_edge
+	%htblptr.019.1.us = phi %struct.H_TBL** [ %tmp37.us, %cond_true33.us.cond_true46.us_crit_edge ], [ %tmp37.us, %cond_next.us ]		; <%struct.H_TBL**> [#uses=0]
+	ret void
+
+cond_true33.us.cond_true46.us_crit_edge:		; preds = %cond_next.us
+	call void @_C_X_a_HT( )
+	br label %cond_next51.us
+
+cond_next.us:		; preds = %bb.preheader
+	%tmp37.us = getelementptr %struct.X_Y* %cinfo, i32 0, i32 17, i32 %tbl.014.us		; <%struct.H_TBL**> [#uses=3]
+	%tmp4524.us = load %struct.H_TBL** %tmp37.us		; <%struct.H_TBL*> [#uses=1]
+	icmp eq %struct.H_TBL* %tmp4524.us, null		; <i1>:0 [#uses=1]
+	br i1 %0, label %cond_true33.us.cond_true46.us_crit_edge, label %cond_next51.us
+
+bb:		; preds = %bb.preheader
+	ret void
+
+return:		; preds = %entry
+	ret void
+}
+
+declare void @_C_X_a_HT()
diff --git a/test/CodeGen/ARM/2007-04-03-PEIBug.ll b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
new file mode 100644
index 0000000000000..e412127eae7b5
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-PEIBug.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep {add.*#0}
+
+define i32 @foo() {
+entry:
+	%A = alloca [1123 x i32], align 16		; <[1123 x i32]*> [#uses=1]
+	%B = alloca [3123 x i32], align 16		; <[3123 x i32]*> [#uses=1]
+	%C = alloca [12312 x i32], align 16		; <[12312 x i32]*> [#uses=1]
+	%tmp = call i32 (...)* @bar( [3123 x i32]* %B, [1123 x i32]* %A, [12312 x i32]* %C )		; <i32> [#uses=0]
+	ret i32 undef
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
new file mode 100644
index 0000000000000..42f5034c70a76
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
@@ -0,0 +1,99 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic | \
+; RUN:   not grep LPC9
+
+	%struct.B = type { i32 }
+	%struct.anon = type { void (%struct.B*)*, i32 }
+@str = internal constant [7 x i8] c"i, %d\0A\00"		; <[7 x i8]*> [#uses=1]
+@str1 = internal constant [7 x i8] c"j, %d\0A\00"		; <[7 x i8]*> [#uses=1]
+
+define internal void @_ZN1B1iEv(%struct.B* %this) {
+entry:
+	%tmp1 = getelementptr %struct.B* %this, i32 0, i32 0		; <i32*> [#uses=1]
+	%tmp2 = load i32* %tmp1		; <i32> [#uses=1]
+	%tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str, i32 0, i32 0), i32 %tmp2 )		; <i32> [#uses=0]
+	ret void
+}
+
+declare i32 @printf(i8*, ...)
+
+define internal void @_ZN1B1jEv(%struct.B* %this) {
+entry:
+	%tmp1 = getelementptr %struct.B* %this, i32 0, i32 0		; <i32*> [#uses=1]
+	%tmp2 = load i32* %tmp1		; <i32> [#uses=1]
+	%tmp4 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([7 x i8]* @str1, i32 0, i32 0), i32 %tmp2 )		; <i32> [#uses=0]
+	ret void
+}
+
+define i32 @main() {
+entry:
+	%b.i29 = alloca %struct.B, align 4		; <%struct.B*> [#uses=3]
+	%b.i1 = alloca %struct.B, align 4		; <%struct.B*> [#uses=3]
+	%b.i = alloca %struct.B, align 4		; <%struct.B*> [#uses=3]
+	%tmp2.i = getelementptr %struct.B* %b.i, i32 0, i32 0		; <i32*> [#uses=1]
+	store i32 4, i32* %tmp2.i
+	br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i
+
+cond_true.i:		; preds = %entry
+	%b2.i = bitcast %struct.B* %b.i to i8*		; <i8*> [#uses=1]
+	%ctg23.i = getelementptr i8* %b2.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp121314.i = bitcast i8* %ctg23.i to i32 (...)***		; <i32 (...)***> [#uses=1]
+	%tmp15.i = load i32 (...)*** %tmp121314.i		; <i32 (...)**> [#uses=1]
+	%tmp151.i = bitcast i32 (...)** %tmp15.i to i8*		; <i8*> [#uses=1]
+	%ctg2.i = getelementptr i8* %tmp151.i, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32)		; <i8*> [#uses=1]
+	%tmp2021.i = bitcast i8* %ctg2.i to i32 (...)**		; <i32 (...)**> [#uses=1]
+	%tmp22.i = load i32 (...)** %tmp2021.i		; <i32 (...)*> [#uses=1]
+	%tmp2223.i = bitcast i32 (...)* %tmp22.i to void (%struct.B*)*		; <void (%struct.B*)*> [#uses=1]
+	br label %_Z3fooiM1BFvvE.exit
+
+_Z3fooiM1BFvvE.exit:		; preds = %cond_true.i, %entry
+	%iftmp.2.0.i = phi void (%struct.B*)* [ %tmp2223.i, %cond_true.i ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %entry ]		; <void (%struct.B*)*> [#uses=1]
+	%b4.i = bitcast %struct.B* %b.i to i8*		; <i8*> [#uses=1]
+	%ctg25.i = getelementptr i8* %b4.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp3031.i = bitcast i8* %ctg25.i to %struct.B*		; <%struct.B*> [#uses=1]
+	call void %iftmp.2.0.i( %struct.B* %tmp3031.i )
+	%tmp2.i30 = getelementptr %struct.B* %b.i29, i32 0, i32 0		; <i32*> [#uses=1]
+	store i32 6, i32* %tmp2.i30
+	br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46
+
+cond_true.i46:		; preds = %_Z3fooiM1BFvvE.exit
+	%b2.i35 = bitcast %struct.B* %b.i29 to i8*		; <i8*> [#uses=1]
+	%ctg23.i36 = getelementptr i8* %b2.i35, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp121314.i37 = bitcast i8* %ctg23.i36 to i32 (...)***		; <i32 (...)***> [#uses=1]
+	%tmp15.i38 = load i32 (...)*** %tmp121314.i37		; <i32 (...)**> [#uses=1]
+	%tmp151.i41 = bitcast i32 (...)** %tmp15.i38 to i8*		; <i8*> [#uses=1]
+	%ctg2.i42 = getelementptr i8* %tmp151.i41, i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32)		; <i8*> [#uses=1]
+	%tmp2021.i43 = bitcast i8* %ctg2.i42 to i32 (...)**		; <i32 (...)**> [#uses=1]
+	%tmp22.i44 = load i32 (...)** %tmp2021.i43		; <i32 (...)*> [#uses=1]
+	%tmp2223.i45 = bitcast i32 (...)* %tmp22.i44 to void (%struct.B*)*		; <void (%struct.B*)*> [#uses=1]
+	br label %_Z3fooiM1BFvvE.exit56
+
+_Z3fooiM1BFvvE.exit56:		; preds = %cond_true.i46, %_Z3fooiM1BFvvE.exit
+	%iftmp.2.0.i49 = phi void (%struct.B*)* [ %tmp2223.i45, %cond_true.i46 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit ]		; <void (%struct.B*)*> [#uses=1]
+	%b4.i53 = bitcast %struct.B* %b.i29 to i8*		; <i8*> [#uses=1]
+	%ctg25.i54 = getelementptr i8* %b4.i53, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp3031.i55 = bitcast i8* %ctg25.i54 to %struct.B*		; <%struct.B*> [#uses=1]
+	call void %iftmp.2.0.i49( %struct.B* %tmp3031.i55 )
+	%tmp2.i2 = getelementptr %struct.B* %b.i1, i32 0, i32 0		; <i32*> [#uses=1]
+	store i32 -1, i32* %tmp2.i2
+	br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18
+
+cond_true.i18:		; preds = %_Z3fooiM1BFvvE.exit56
+	%b2.i7 = bitcast %struct.B* %b.i1 to i8*		; <i8*> [#uses=1]
+	%ctg23.i8 = getelementptr i8* %b2.i7, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp121314.i9 = bitcast i8* %ctg23.i8 to i32 (...)***		; <i32 (...)***> [#uses=1]
+	%tmp15.i10 = load i32 (...)*** %tmp121314.i9		; <i32 (...)**> [#uses=1]
+	%tmp151.i13 = bitcast i32 (...)** %tmp15.i10 to i8*		; <i8*> [#uses=1]
+	%ctg2.i14 = getelementptr i8* %tmp151.i13, i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32)		; <i8*> [#uses=1]
+	%tmp2021.i15 = bitcast i8* %ctg2.i14 to i32 (...)**		; <i32 (...)**> [#uses=1]
+	%tmp22.i16 = load i32 (...)** %tmp2021.i15		; <i32 (...)*> [#uses=1]
+	%tmp2223.i17 = bitcast i32 (...)* %tmp22.i16 to void (%struct.B*)*		; <void (%struct.B*)*> [#uses=1]
+	br label %_Z3fooiM1BFvvE.exit28
+
+_Z3fooiM1BFvvE.exit28:		; preds = %cond_true.i18, %_Z3fooiM1BFvvE.exit56
+	%iftmp.2.0.i21 = phi void (%struct.B*)* [ %tmp2223.i17, %cond_true.i18 ], [ inttoptr (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to void (%struct.B*)*), %_Z3fooiM1BFvvE.exit56 ]		; <void (%struct.B*)*> [#uses=1]
+	%b4.i25 = bitcast %struct.B* %b.i1 to i8*		; <i8*> [#uses=1]
+	%ctg25.i26 = getelementptr i8* %b4.i25, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (void (%struct.B*)* @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)		; <i8*> [#uses=1]
+	%tmp3031.i27 = bitcast i8* %ctg25.i26 to %struct.B*		; <%struct.B*> [#uses=1]
+	call void %iftmp.2.0.i21( %struct.B* %tmp3031.i27 )
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
new file mode 100644
index 0000000000000..ec70a596bc3ac
--- /dev/null
+++ b/test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+        %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
+@search = external global %struct.CHESS_POSITION                ; <%struct.CHESS_POSITION*> [#uses=3]
+@file_mask = external global [8 x i64]          ; <[8 x i64]*> [#uses=1]
+@rank_mask.1.b = external global i1             ; <i1*> [#uses=1]
+
+define fastcc void @EvaluateDevelopment() {
+entry:
+        %tmp7 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 7)         ; <i64> [#uses=1]
+        %tmp50 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 0)                ; <i64> [#uses=1]
+        %tmp52 = load i64* getelementptr (%struct.CHESS_POSITION* @search, i32 0, i32 1)                ; <i64> [#uses=1]
+        %tmp53 = or i64 %tmp52, %tmp50          ; <i64> [#uses=1]
+        %tmp57.b = load i1* @rank_mask.1.b              ; <i1> [#uses=1]
+        %tmp57 = select i1 %tmp57.b, i64 71776119061217280, i64 0               ; <i64> [#uses=1]
+        %tmp58 = and i64 %tmp57, %tmp7          ; <i64> [#uses=1]
+        %tmp59 = lshr i64 %tmp58, 8             ; <i64> [#uses=1]
+        %tmp63 = load i64* getelementptr ([8 x i64]* @file_mask, i32 0, i32 4)          ; <i64> [#uses=1]
+        %tmp64 = or i64 %tmp63, 0               ; <i64> [#uses=1]
+        %tmp65 = and i64 %tmp59, %tmp53         ; <i64> [#uses=1]
+        %tmp66 = and i64 %tmp65, %tmp64         ; <i64> [#uses=1]
+        %tmp67 = icmp eq i64 %tmp66, 0          ; <i1> [#uses=1]
+        br i1 %tmp67, label %cond_next145, label %cond_true70
+
+cond_true70:            ; preds = %entry
+        ret void
+
+cond_next145:           ; preds = %entry
+        ret void
+}
diff --git a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
new file mode 100644
index 0000000000000..f3f82bc4846f0
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
@@ -0,0 +1,113 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+	%struct.Connection = type { i32, [10 x i8], i32 }
+	%struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 }
+	%struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) signext *, i16 (%struct.Point*) signext *, double (%struct.Point*)*, double (%struct.Point*)* }
+	%struct.RefPoint = type { %struct.Point*, %struct.cppobjtype }
+	%struct.ShortArray = type { %struct.cppobjtype, i32, i16* }
+	%struct.TestObj = type { i8*, %struct.cppobjtype, i8, [32 x i8], i8*, i8**, i16, i16, i32, i32, i32, i32, float, double, %struct.cppobjtype, i32, i16*, i16**, i8**, i32, %struct.XyPoint, [3 x %struct.Connection], %struct.Point*, %struct.XyPoint*, i32, i8*, i8*, i16*, %struct.ShortArray, %struct.IntChunk, %struct.cppobjtype, %struct.cppobjtype, %struct.RefPoint, i32, %struct.cppobjtype, %struct.cppobjtype }
+	%struct.XyPoint = type { i16, i16 }
+	%struct.cppobjtype = type { i32, i16, i16 }
+@Msg = external global [256 x i8]		; <[256 x i8]*> [#uses=1]
+@.str53615 = external constant [48 x i8]		; <[48 x i8]*> [#uses=1]
+@FirstTime.4637.b = external global i1		; <i1*> [#uses=1]
+
+define fastcc void @Draw7(i32 %Option, i32* %Status) {
+entry:
+	%tmp115.b = load i1* @FirstTime.4637.b		; <i1> [#uses=1]
+	br i1 %tmp115.b, label %cond_next239, label %cond_next.i
+
+cond_next.i:		; preds = %entry
+	ret void
+
+cond_next239:		; preds = %entry
+	%tmp242 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp242, label %cond_next253, label %cond_next296
+
+cond_next253:		; preds = %cond_next239
+	switch i32 %Option, label %bb1326 [
+		 i32 3, label %cond_true258
+		 i32 4, label %cond_true268
+		 i32 2, label %cond_true279
+		 i32 1, label %cond_next315
+	]
+
+cond_true258:		; preds = %cond_next253
+	ret void
+
+cond_true268:		; preds = %cond_next253
+	ret void
+
+cond_true279:		; preds = %cond_next253
+	ret void
+
+cond_next296:		; preds = %cond_next239
+	ret void
+
+cond_next315:		; preds = %cond_next253
+	%tmp1140 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp1140, label %cond_true1143, label %bb1326
+
+cond_true1143:		; preds = %cond_next315
+	%tmp1148 = icmp eq i32 0, 0		; <i1> [#uses=4]
+	br i1 %tmp1148, label %cond_next1153, label %cond_true1151
+
+cond_true1151:		; preds = %cond_true1143
+	ret void
+
+cond_next1153:		; preds = %cond_true1143
+	%tmp8.i.i185 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	br i1 %tmp8.i.i185, label %TestObj_new1.exit, label %cond_true.i.i187
+
+cond_true.i.i187:		; preds = %cond_next1153
+	ret void
+
+TestObj_new1.exit:		; preds = %cond_next1153
+	%tmp1167 = icmp eq i16 0, 0		; <i1> [#uses=1]
+	%tmp1178 = icmp eq i32 0, 0		; <i1> [#uses=1]
+	%bothcond = and i1 %tmp1167, %tmp1178		; <i1> [#uses=1]
+	br i1 %bothcond, label %bb1199, label %bb1181
+
+bb1181:		; preds = %TestObj_new1.exit
+	ret void
+
+bb1199:		; preds = %TestObj_new1.exit
+	br i1 %tmp1148, label %cond_next1235, label %Object_Dump.exit302
+
+Object_Dump.exit302:		; preds = %bb1199
+	ret void
+
+cond_next1235:		; preds = %bb1199
+	%bothcond10485 = or i1 false, %tmp1148		; <i1> [#uses=1]
+	br i1 %bothcond10485, label %cond_next1267, label %cond_true1248
+
+cond_true1248:		; preds = %cond_next1235
+	ret void
+
+cond_next1267:		; preds = %cond_next1235
+	br i1 %tmp1148, label %cond_next1275, label %cond_true1272
+
+cond_true1272:		; preds = %cond_next1267
+	%tmp1273 = load %struct.TestObj** null		; <%struct.TestObj*> [#uses=2]
+	%tmp2930.i = ptrtoint %struct.TestObj* %tmp1273 to i32		; <i32> [#uses=1]
+	%tmp42.i348 = sub i32 0, %tmp2930.i		; <i32> [#uses=1]
+	%tmp45.i = getelementptr %struct.TestObj* %tmp1273, i32 0, i32 0		; <i8**> [#uses=2]
+	%tmp48.i = load i8** %tmp45.i		; <i8*> [#uses=1]
+	%tmp50.i350 = call i32 (i8*, i8*, ...)* @sprintf( i8* getelementptr ([256 x i8]* @Msg, i32 0, i32 0), i8* getelementptr ([48 x i8]* @.str53615, i32 0, i32 0), i8* null, i8** %tmp45.i, i8* %tmp48.i )		; <i32> [#uses=0]
+	br i1 false, label %cond_true.i632.i, label %Ut_TraceMsg.exit648.i
+
+cond_true.i632.i:		; preds = %cond_true1272
+	ret void
+
+Ut_TraceMsg.exit648.i:		; preds = %cond_true1272
+	%tmp57.i = getelementptr i8* null, i32 %tmp42.i348		; <i8*> [#uses=0]
+	ret void
+
+cond_next1275:		; preds = %cond_next1267
+	ret void
+
+bb1326:		; preds = %cond_next315, %cond_next253
+	ret void
+}
+
+declare i32 @sprintf(i8*, i8*, ...)
diff --git a/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll
new file mode 100644
index 0000000000000..159be4eca3348
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-05-InvalidPushPop.ll
@@ -0,0 +1,41 @@
+; RUN: llvm-as < %s | llc | not grep r11
+
+target triple = "thumb-linux-gnueabi"
+	%struct.__sched_param = type { i32 }
+	%struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
+@i.1882 = internal global i32 1		; <i32*> [#uses=2]
+@.str = internal constant [14 x i8] c"Thread 1: %d\0A\00"		; <[14 x i8]*> [#uses=1]
+@.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00"		; <[14 x i8]*> [#uses=1]
+
+define i8* @f(i8* %a) {
+entry:
+	%tmp1 = load i32* @i.1882		; <i32> [#uses=1]
+	%tmp2 = add i32 %tmp1, 1		; <i32> [#uses=2]
+	store i32 %tmp2, i32* @i.1882
+	%tmp34 = inttoptr i32 %tmp2 to i8*		; <i8*> [#uses=1]
+	ret i8* %tmp34
+}
+
+define i32 @main() {
+entry:
+	%t = alloca i32, align 4		; <i32*> [#uses=4]
+	%ret = alloca i32, align 4		; <i32*> [#uses=3]
+	%tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null )		; <i32> [#uses=0]
+	%tmp2 = load i32* %t		; <i32> [#uses=1]
+	%ret3 = bitcast i32* %ret to i8**		; <i8**> [#uses=2]
+	%tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 )		; <i32> [#uses=0]
+	%tmp5 = load i32* %ret		; <i32> [#uses=1]
+	%tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 )		; <i32> [#uses=0]
+	%tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null )		; <i32> [#uses=0]
+	%tmp9 = load i32* %t		; <i32> [#uses=1]
+	%tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 )		; <i32> [#uses=0]
+	%tmp12 = load i32* %ret		; <i32> [#uses=1]
+	%tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 )		; <i32> [#uses=0]
+	ret i32 0
+}
+
+declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
+
+declare i32 @pthread_join(i32, i8**)
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
new file mode 100644
index 0000000000000..11431be9c28c8
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll
@@ -0,0 +1,58 @@
+; RUN: llvm-as < %s | llc | not grep 1_0
+; This used to create an extra branch to 'entry', LBB1_0.
+
+; ModuleID = 'bug.bc'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-apple-darwin8"
+	%struct.HexxagonMove = type { i8, i8, i32 }
+	%struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* }
+
+define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) {
+entry:
+	%tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0		; <i32*> [#uses=1]
+	%tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1		; <%struct.HexxagonMove**> [#uses=2]
+	br label %bb49
+
+bb1:		; preds = %bb49
+	%tmp3 = load %struct.HexxagonMove** %tmp2		; <%struct.HexxagonMove*> [#uses=5]
+	%tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2		; <i32*> [#uses=1]
+	%tmp7 = load i32* %tmp6		; <i32> [#uses=2]
+	%tmp12 = add i32 %i.1, 1		; <i32> [#uses=7]
+	%tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2		; <i32*> [#uses=1]
+	%tmp15 = load i32* %tmp14		; <i32> [#uses=1]
+	%tmp16 = icmp slt i32 %tmp7, %tmp15		; <i1> [#uses=1]
+	br i1 %tmp16, label %cond_true, label %bb49
+
+cond_true:		; preds = %bb1
+	%tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0		; <i8*> [#uses=2]
+	%tmp67 = load i8* %tmp23.0		; <i8> [#uses=1]
+	%tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1		; <i8*> [#uses=1]
+	%tmp68 = load i8* %tmp23.1		; <i8> [#uses=1]
+	%tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0		; <i8*> [#uses=1]
+	tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 )
+	%tmp41 = load %struct.HexxagonMove** %tmp2		; <%struct.HexxagonMove*> [#uses=3]
+	%tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0		; <i8*> [#uses=1]
+	store i8 %tmp67, i8* %tmp44.0
+	%tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1		; <i8*> [#uses=1]
+	store i8 %tmp68, i8* %tmp44.1
+	%tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2		; <i32*> [#uses=1]
+	store i32 %tmp7, i32* %tmp44.2
+	br label %bb49
+
+bb49:		; preds = %bb59, %cond_true, %bb1, %entry
+	%i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ]		; <i32> [#uses=5]
+	%move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ]		; <i32> [#uses=2]
+	%tmp52 = load i32* %tmp51		; <i32> [#uses=1]
+	%tmp53 = add i32 %tmp52, -1		; <i32> [#uses=1]
+	%tmp55 = icmp sgt i32 %tmp53, %i.1		; <i1> [#uses=1]
+	br i1 %tmp55, label %bb1, label %bb59
+
+bb59:		; preds = %bb49
+	%tmp61 = icmp eq i32 %move.2, 0		; <i1> [#uses=1]
+	br i1 %tmp61, label %return, label %bb49
+
+return:		; preds = %bb59
+	ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
new file mode 100644
index 0000000000000..c3596e7c7b4f3
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
@@ -0,0 +1,68 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
+; Check that calls to baz and quux are tail-merged.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+	%i_addr = alloca i32		; <i32*> [#uses=2]
+	%q_addr = alloca i32		; <i32*> [#uses=2]
+	%retval = alloca i32, align 4		; <i32*> [#uses=1]
+	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	store i32 %i, i32* %i_addr
+	store i32 %q, i32* %q_addr
+	%tmp = load i32* %i_addr		; <i32> [#uses=1]
+	%tmp1 = icmp ne i32 %tmp, 0		; <i1> [#uses=1]
+	%tmp12 = zext i1 %tmp1 to i8		; <i8> [#uses=1]
+	%toBool = icmp ne i8 %tmp12, 0		; <i1> [#uses=1]
+	br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	%tmp3 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp4 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	br label %cond_next
+
+cond_false:		; preds = %entry
+	%tmp5 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp6 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	br label %cond_next
+
+cond_next:		; preds = %cond_false, %cond_true
+	%tmp7 = load i32* %q_addr		; <i32> [#uses=1]
+	%tmp8 = icmp ne i32 %tmp7, 0		; <i1> [#uses=1]
+	%tmp89 = zext i1 %tmp8 to i8		; <i8> [#uses=1]
+	%toBool10 = icmp ne i8 %tmp89, 0		; <i1> [#uses=1]
+	br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_true11:		; preds = %cond_next
+	%tmp13 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp14 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_false15:		; preds = %cond_next
+	%tmp16 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp17 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_next18:		; preds = %cond_false15, %cond_true11
+	%tmp19 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	br label %return
+
+return:		; preds = %cond_next18
+	%retval20 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
new file mode 100644
index 0000000000000..41ab1e52f674b
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
@@ -0,0 +1,69 @@
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
+; Check that calls to baz and quux are tail-merged.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+	%i_addr = alloca i32		; <i32*> [#uses=2]
+	%q_addr = alloca i32		; <i32*> [#uses=2]
+	%retval = alloca i32, align 4		; <i32*> [#uses=1]
+	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	store i32 %i, i32* %i_addr
+	store i32 %q, i32* %q_addr
+	%tmp = load i32* %i_addr		; <i32> [#uses=1]
+	%tmp1 = icmp ne i32 %tmp, 0		; <i1> [#uses=1]
+	%tmp12 = zext i1 %tmp1 to i8		; <i8> [#uses=1]
+	%toBool = icmp ne i8 %tmp12, 0		; <i1> [#uses=1]
+	br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	%tmp3 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp4 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	%tmp7 = load i32* %q_addr		; <i32> [#uses=1]
+	%tmp8 = icmp ne i32 %tmp7, 0		; <i1> [#uses=1]
+	%tmp89 = zext i1 %tmp8 to i8		; <i8> [#uses=1]
+	%toBool10 = icmp ne i8 %tmp89, 0		; <i1> [#uses=1]
+	br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false:		; preds = %entry
+	%tmp5 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp6 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	%tmp27 = load i32* %q_addr		; <i32> [#uses=1]
+	%tmp28 = icmp ne i32 %tmp27, 0		; <i1> [#uses=1]
+	%tmp289 = zext i1 %tmp28 to i8		; <i8> [#uses=1]
+	%toBool210 = icmp ne i8 %tmp289, 0		; <i1> [#uses=1]
+	br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11:		; preds = %cond_next
+	%tmp13 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp14 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_false15:		; preds = %cond_next
+	%tmp16 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp17 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_next18:		; preds = %cond_false15, %cond_true11
+	%tmp19 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	br label %return
+
+return:		; preds = %cond_next18
+	%retval20 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
new file mode 100644
index 0000000000000..58c5f89c619d5
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+
+define i32 @test3() {
+	tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+	ret i32 11
+}
diff --git a/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..430b3689c0b41
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
+; PR1406
+
+	%struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+	%struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+	%struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+	%struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+	%struct.AVOption = type opaque
+	%struct.AVPaletteControl = type { i32, [256 x i32] }
+	%struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+	%struct.AVRational = type { i32, i32 }
+	%struct.RcOverride = type { i32, i32, i32, float }
+
+define i32 @decode_init(%struct.AVCodecContext* %avctx) {
+entry:
+	br i1 false, label %bb, label %cond_next789
+
+bb:		; preds = %bb, %entry
+	br i1 false, label %bb59, label %bb
+
+bb59:		; preds = %bb
+	%tmp68 = sdiv i64 0, 0		; <i64> [#uses=1]
+	%tmp6869 = trunc i64 %tmp68 to i32		; <i32> [#uses=2]
+	%tmp81 = call i32 asm "smull $0, $1, $2, $3     \0A\09mov   $0, $0,     lsr $4\0A\09add   $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 13316085, i32 23, i32 9 )		; <i32> [#uses=0]
+	%tmp90 = call i32 asm "smull $0, $1, $2, $3     \0A\09mov   $0, $0,     lsr $4\0A\09add   $1, $0, $1, lsl $5\0A\09", "=&r,=*&r,r,r,i,i"( i32* null, i32 %tmp6869, i32 10568984, i32 23, i32 9 )		; <i32> [#uses=0]
+	unreachable
+
+cond_next789:		; preds = %entry
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
new file mode 100644
index 0000000000000..4c4a9336fd91b
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
@@ -0,0 +1,73 @@
+; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
+; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*baz | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*quux | count 1
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
+; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
+; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works.
+; PR1628
+
+; ModuleID = 'tail.c'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "i686-apple-darwin8"
+
+define i32 @f(i32 %i, i32 %q) {
+entry:
+	%i_addr = alloca i32		; <i32*> [#uses=2]
+	%q_addr = alloca i32		; <i32*> [#uses=2]
+	%retval = alloca i32, align 4		; <i32*> [#uses=1]
+	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	store i32 %i, i32* %i_addr
+	store i32 %q, i32* %q_addr
+	%tmp = load i32* %i_addr		; <i32> [#uses=1]
+	%tmp1 = icmp ne i32 %tmp, 0		; <i1> [#uses=1]
+	%tmp12 = zext i1 %tmp1 to i8		; <i8> [#uses=1]
+	%toBool = icmp ne i8 %tmp12, 0		; <i1> [#uses=1]
+	br i1 %toBool, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	%tmp3 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp4 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	%tmp7 = load i32* %q_addr		; <i32> [#uses=1]
+	%tmp8 = icmp ne i32 %tmp7, 0		; <i1> [#uses=1]
+	%tmp89 = zext i1 %tmp8 to i8		; <i8> [#uses=1]
+	%toBool10 = icmp ne i8 %tmp89, 0		; <i1> [#uses=1]
+	br i1 %toBool10, label %cond_true11, label %cond_false15
+
+cond_false:		; preds = %entry
+	%tmp5 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp6 = call i32 (...)* @baz( i32 5, i32 6 )		; <i32> [#uses=0]
+	%tmp27 = load i32* %q_addr		; <i32> [#uses=1]
+	%tmp28 = icmp ne i32 %tmp27, 0		; <i1> [#uses=1]
+	%tmp289 = zext i1 %tmp28 to i8		; <i8> [#uses=1]
+	%toBool210 = icmp ne i8 %tmp289, 0		; <i1> [#uses=1]
+	br i1 %toBool210, label %cond_true11, label %cond_false15
+
+cond_true11:		; preds = %cond_next
+	%tmp13 = call i32 (...)* @foo( )		; <i32> [#uses=0]
+	%tmp14 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_false15:		; preds = %cond_next
+	%tmp16 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	%tmp17 = call i32 (...)* @quux( i32 3, i32 4 )		; <i32> [#uses=0]
+	br label %cond_next18
+
+cond_next18:		; preds = %cond_false15, %cond_true11
+	%tmp19 = call i32 (...)* @bar( )		; <i32> [#uses=0]
+	br label %return
+
+return:		; preds = %cond_next18
+	%retval20 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval20
+}
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+declare i32 @foo(...)
+
+declare i32 @quux(...)
diff --git a/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
new file mode 100644
index 0000000000000..de32a26ae9cfb
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep {str.*\\!}
+
+	%struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 }
+	%struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 }
+	%struct.shape_pool_t = type { i8* (%struct.shape_pool_t*, i8*, i32)*, i8* (%struct.shape_pool_t*, i32)*, void (%struct.shape_pool_t*, i8*)* }
+
+define %struct.shape_path_t* @shape_path_alloc(%struct.shape_pool_t* %pool, i32* %shape) {
+entry:
+	br i1 false, label %cond_false, label %bb45
+
+bb45:		; preds = %entry
+	ret %struct.shape_path_t* null
+
+cond_false:		; preds = %entry
+	br i1 false, label %bb140, label %bb174
+
+bb140:		; preds = %bb140, %cond_false
+	%indvar = phi i32 [ 0, %cond_false ], [ %indvar.next, %bb140 ]		; <i32> [#uses=2]
+	%edge.230.0.rec = shl i32 %indvar, 1		; <i32> [#uses=3]
+	%edge.230.0 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.rec		; <%struct.shape_edge_t*> [#uses=1]
+	%edge.230.0.sum6970 = or i32 %edge.230.0.rec, 1		; <i32> [#uses=2]
+	%tmp154 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970		; <%struct.shape_edge_t*> [#uses=1]
+	%tmp11.i5 = getelementptr %struct.shape_edge_t* null, i32 %edge.230.0.sum6970, i32 0		; <%struct.shape_edge_t**> [#uses=1]
+	store %struct.shape_edge_t* %edge.230.0, %struct.shape_edge_t** %tmp11.i5
+	store %struct.shape_edge_t* %tmp154, %struct.shape_edge_t** null
+	%tmp16254.0.rec = add i32 %edge.230.0.rec, 2		; <i32> [#uses=1]
+	%xp.350.sum = add i32 0, %tmp16254.0.rec		; <i32> [#uses=1]
+	%tmp168 = icmp slt i32 %xp.350.sum, 0		; <i1> [#uses=1]
+	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
+	br i1 %tmp168, label %bb140, label %bb174
+
+bb174:		; preds = %bb140, %cond_false
+	ret %struct.shape_path_t* null
+}
diff --git a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
new file mode 100644
index 0000000000000..d21a8f209e960
--- /dev/null
+++ b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
@@ -0,0 +1,237 @@
+; RUN: llvm-as < %s | llc 
+; PR1424
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+	%struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }
+	%struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* }
+	%struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 }
+	%struct.AVEvalExpr = type opaque
+	%struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] }
+	%struct.AVOption = type opaque
+	%struct.AVPaletteControl = type { i32, [256 x i32] }
+	%struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] }
+	%struct.AVRational = type { i32, i32 }
+	%struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 }
+	%struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] }
+	%struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
+	%struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 }
+	%struct.MJpegContext = type opaque
+	%struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* }
+	%struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* }
+	%struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 }
+	%struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] }
+	%struct.Predictor = type { double, double, double }
+	%struct.PutBitContext = type { i32, i32, i8*, i8*, i8* }
+	%struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* }
+	%struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* }
+	%struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 }
+	%struct.RcOverride = type { i32, i32, i32, float }
+	%struct.ScanTable = type { i8*, [64 x i8], [64 x i8] }
+	%struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext }
+	%struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] }
+	%struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
+	%struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* }
+	%struct.x_and_coeff = type { i16, i16 }
+
+define fastcc void @iterative_me(%struct.SnowContext* %s) {
+entry:
+	%state = alloca [4224 x i8], align 8		; <[4224 x i8]*> [#uses=0]
+	%best_rd4233 = alloca i32, align 4		; <i32*> [#uses=0]
+	%tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36		; <i32*> [#uses=2]
+	br label %bb4198
+
+bb79:		; preds = %bb4189.preheader
+	br i1 false, label %cond_next239, label %cond_true
+
+cond_true:		; preds = %bb79
+	ret void
+
+cond_next239:		; preds = %bb79
+	%tmp286 = alloca i8, i32 0		; <i8*> [#uses=0]
+	ret void
+
+bb4198:		; preds = %bb4189.preheader, %entry
+	br i1 false, label %bb4189.preheader, label %bb4204
+
+bb4189.preheader:		; preds = %bb4198
+	br i1 false, label %bb79, label %bb4198
+
+bb4204:		; preds = %bb4198
+	br i1 false, label %bb4221, label %cond_next4213
+
+cond_next4213:		; preds = %bb4204
+	ret void
+
+bb4221:		; preds = %bb4204
+	br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock
+
+bb5242.preheader:		; preds = %bb4221
+	br label %bb5242
+
+bb4231:		; preds = %bb5233
+	%tmp4254.sum = add i32 0, 1		; <i32> [#uses=2]
+	br i1 false, label %bb4559, label %cond_next4622
+
+bb4559:		; preds = %bb4231
+	ret void
+
+cond_next4622:		; preds = %bb4231
+	%tmp4637 = load i16* null		; <i16> [#uses=1]
+	%tmp46374638 = sext i16 %tmp4637 to i32		; <i32> [#uses=1]
+	%tmp4642 = load i16* null		; <i16> [#uses=1]
+	%tmp46424643 = sext i16 %tmp4642 to i32		; <i32> [#uses=1]
+	%tmp4648 = load i16* null		; <i16> [#uses=1]
+	%tmp46484649 = sext i16 %tmp4648 to i32		; <i32> [#uses=1]
+	%tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0		; <i16*> [#uses=1]
+	%tmp4654 = load i16* %tmp4653		; <i16> [#uses=1]
+	%tmp46544655 = sext i16 %tmp4654 to i32		; <i32> [#uses=1]
+	%tmp4644 = add i32 %tmp46374638, 2		; <i32> [#uses=1]
+	%tmp4650 = add i32 %tmp4644, %tmp46424643		; <i32> [#uses=1]
+	%tmp4656 = add i32 %tmp4650, %tmp46484649		; <i32> [#uses=1]
+	%tmp4657 = add i32 %tmp4656, %tmp46544655		; <i32> [#uses=2]
+	%tmp4658 = ashr i32 %tmp4657, 2		; <i32> [#uses=1]
+	%tmp4662 = load i16* null		; <i16> [#uses=1]
+	%tmp46624663 = sext i16 %tmp4662 to i32		; <i32> [#uses=1]
+	%tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1		; <i16*> [#uses=1]
+	%tmp4673 = load i16* %tmp4672		; <i16> [#uses=1]
+	%tmp46734674 = sext i16 %tmp4673 to i32		; <i32> [#uses=1]
+	%tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1		; <i16*> [#uses=1]
+	%tmp4679 = load i16* %tmp4678		; <i16> [#uses=1]
+	%tmp46794680 = sext i16 %tmp4679 to i32		; <i32> [#uses=1]
+	%tmp4669 = add i32 %tmp46624663, 2		; <i32> [#uses=1]
+	%tmp4675 = add i32 %tmp4669, 0		; <i32> [#uses=1]
+	%tmp4681 = add i32 %tmp4675, %tmp46734674		; <i32> [#uses=1]
+	%tmp4682 = add i32 %tmp4681, %tmp46794680		; <i32> [#uses=2]
+	%tmp4683 = ashr i32 %tmp4682, 2		; <i32> [#uses=1]
+	%tmp4703 = load i32* %tmp21		; <i32> [#uses=1]
+	%tmp4707 = shl i32 %tmp4703, 0		; <i32> [#uses=4]
+	%tmp4710 = load %struct.BlockNode** null		; <%struct.BlockNode*> [#uses=6]
+	%tmp4713 = mul i32 %tmp4707, %mb_y.4		; <i32> [#uses=1]
+	%tmp4715 = add i32 %tmp4713, %mb_x.7		; <i32> [#uses=7]
+	store i8 0, i8* null
+	store i8 0, i8* null
+	%tmp47594761 = bitcast %struct.BlockNode* null to i8*		; <i8*> [#uses=2]
+	call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 )
+	%tmp4716.sum5775 = add i32 %tmp4715, 1		; <i32> [#uses=1]
+	%tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775		; <%struct.BlockNode*> [#uses=1]
+	%tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8*		; <i8*> [#uses=1]
+	%tmp4716.sum5774 = add i32 %tmp4715, %tmp4707		; <i32> [#uses=0]
+	%tmp47704772 = bitcast %struct.BlockNode* null to i8*		; <i8*> [#uses=1]
+	%tmp4774 = add i32 %tmp4707, 1		; <i32> [#uses=1]
+	%tmp4716.sum5773 = add i32 %tmp4774, %tmp4715		; <i32> [#uses=1]
+	%tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773		; <%struct.BlockNode*> [#uses=1]
+	%tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8*		; <i8*> [#uses=1]
+	%tmp4781 = icmp slt i32 %mb_x.7, 0		; <i1> [#uses=1]
+	%tmp4788 = or i1 %tmp4781, %tmp4784		; <i1> [#uses=2]
+	br i1 %tmp4788, label %cond_true4791, label %cond_next4794
+
+cond_true4791:		; preds = %cond_next4622
+	unreachable
+
+cond_next4794:		; preds = %cond_next4622
+	%tmp4797 = icmp slt i32 %mb_x.7, %tmp4707		; <i1> [#uses=1]
+	br i1 %tmp4797, label %cond_next4803, label %cond_true4800
+
+cond_true4800:		; preds = %cond_next4794
+	unreachable
+
+cond_next4803:		; preds = %cond_next4794
+	%tmp4825 = ashr i32 %tmp4657, 12		; <i32> [#uses=1]
+	shl i32 %tmp4682, 4		; <i32>:0 [#uses=1]
+	%tmp4828 = and i32 %0, -64		; <i32> [#uses=1]
+	%tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2		; <i8*> [#uses=0]
+	%tmp4826 = add i32 %tmp4828, %tmp4825		; <i32> [#uses=1]
+	%tmp4829 = add i32 %tmp4826, 0		; <i32> [#uses=1]
+	%tmp4835 = add i32 %tmp4829, 0		; <i32> [#uses=1]
+	store i32 %tmp4835, i32* null
+	%tmp48534854 = trunc i32 %tmp4658 to i16		; <i16> [#uses=1]
+	%tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0		; <i16*> [#uses=1]
+	store i16 %tmp48534854, i16* %tmp4856
+	%tmp48574858 = trunc i32 %tmp4683 to i16		; <i16> [#uses=1]
+	%tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1		; <i16*> [#uses=1]
+	store i16 %tmp48574858, i16* %tmp4860
+	%tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4		; <i8*> [#uses=0]
+	br i1 false, label %bb4933, label %cond_false4906
+
+cond_false4906:		; preds = %cond_next4803
+	call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 )
+	call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 )
+	call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 )
+	call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 )
+	br label %bb5215
+
+bb4933:		; preds = %bb5215, %cond_next4803
+	br i1 false, label %cond_true4944, label %bb5215
+
+cond_true4944:		; preds = %bb4933
+	%tmp4982 = load i32* %tmp21		; <i32> [#uses=1]
+	%tmp4986 = shl i32 %tmp4982, 0		; <i32> [#uses=2]
+	%tmp4992 = mul i32 %tmp4986, %mb_y.4		; <i32> [#uses=1]
+	%tmp4994 = add i32 %tmp4992, %mb_x.7		; <i32> [#uses=5]
+	%tmp4995.sum5765 = add i32 %tmp4994, 1		; <i32> [#uses=1]
+	%tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765		; <%struct.BlockNode*> [#uses=1]
+	%tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8*		; <i8*> [#uses=2]
+	call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 )
+	%tmp4995.sum5764 = add i32 %tmp4994, %tmp4986		; <i32> [#uses=1]
+	%tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764		; <%struct.BlockNode*> [#uses=1]
+	%tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8*		; <i8*> [#uses=2]
+	call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 )
+	%tmp4995.sum5763 = add i32 0, %tmp4994		; <i32> [#uses=1]
+	%tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763		; <%struct.BlockNode*> [#uses=1]
+	%tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8*		; <i8*> [#uses=1]
+	br i1 %tmp4788, label %cond_true5070, label %cond_next5073
+
+cond_true5070:		; preds = %cond_true4944
+	unreachable
+
+cond_next5073:		; preds = %cond_true4944
+	%tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1		; <i16*> [#uses=0]
+	%tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4		; <i8*> [#uses=0]
+	call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 )
+	call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 )
+	call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 )
+	br label %bb5215
+
+bb5215:		; preds = %cond_next5073, %bb4933, %cond_false4906
+	%i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ]		; <i32> [#uses=1]
+	%tmp5217 = icmp slt i32 %i4232.3, 4		; <i1> [#uses=1]
+	br i1 %tmp5217, label %bb4933, label %bb5220
+
+bb5220:		; preds = %bb5215
+	br i1 false, label %bb5230, label %cond_true5226
+
+cond_true5226:		; preds = %bb5220
+	ret void
+
+bb5230:		; preds = %bb5220
+	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
+	br label %bb5233
+
+bb5233:		; preds = %bb5233.preheader, %bb5230
+	%indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ]		; <i32> [#uses=2]
+	%mb_x.7 = shl i32 %indvar, 1		; <i32> [#uses=4]
+	br i1 false, label %bb4231, label %bb5239
+
+bb5239:		; preds = %bb5233
+	%indvar.next37882 = add i32 %indvar37881, 1		; <i32> [#uses=1]
+	br label %bb5242
+
+bb5242:		; preds = %bb5239, %bb5242.preheader
+	%indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ]		; <i32> [#uses=2]
+	%mb_y.4 = shl i32 %indvar37881, 1		; <i32> [#uses=3]
+	br i1 false, label %bb5233.preheader, label %bb5248
+
+bb5233.preheader:		; preds = %bb5242
+	%tmp4784 = icmp slt i32 %mb_y.4, 0		; <i1> [#uses=1]
+	br label %bb5233
+
+bb5248:		; preds = %bb5242
+	ret void
+
+UnifiedReturnBlock:		; preds = %bb4221
+	ret void
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/2007-08-15-ReuseBug.ll b/test/CodeGen/ARM/2007-08-15-ReuseBug.ll
new file mode 100644
index 0000000000000..3cfcdef48f4b4
--- /dev/null
+++ b/test/CodeGen/ARM/2007-08-15-ReuseBug.ll
@@ -0,0 +1,106 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
+; PR1609
+
+	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+	%struct.__sFILEX = type opaque
+	%struct.__sbuf = type { i8*, i32 }
+@_C_nextcmd = external global i32		; <i32*> [#uses=2]
+@_C_cmds = external global [100 x i8*]		; <[100 x i8*]*> [#uses=2]
+@.str44 = external constant [2 x i8]		; <[2 x i8]*> [#uses=1]
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+	br label %cond_next212.i
+
+bb21.i:		; preds = %cond_next212.i
+	br label %cond_next212.i
+
+bb24.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb27.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb30.i:		; preds = %cond_next212.i
+	%tmp205399.i = add i32 %argc_addr.2358.0.i, -1		; <i32> [#uses=1]
+	br label %cond_next212.i
+
+bb33.i:		; preds = %cond_next212.i
+	ret i32 0
+
+cond_next73.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb75.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb77.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb79.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb102.i:		; preds = %cond_next212.i
+	br i1 false, label %cond_true110.i, label %cond_next123.i
+
+cond_true110.i:		; preds = %bb102.i
+	%tmp116.i = getelementptr i8** %argv_addr.2321.0.i, i32 2		; <i8**> [#uses=1]
+	%tmp117.i = load i8** %tmp116.i		; <i8*> [#uses=1]
+	%tmp126425.i = call %struct.FILE* @fopen( i8* %tmp117.i, i8* getelementptr ([2 x i8]* @.str44, i32 0, i32 0) )		; <%struct.FILE*> [#uses=0]
+	ret i32 0
+
+cond_next123.i:		; preds = %bb102.i
+	%tmp122.i = getelementptr i8* %tmp215.i, i32 2		; <i8*> [#uses=0]
+	ret i32 0
+
+bb162.i:		; preds = %cond_next212.i
+	ret i32 0
+
+C_addcmd.exit120.i:		; preds = %cond_next212.i
+	%tmp3.i.i.i.i105.i = call i8* @calloc( i32 15, i32 1 )		; <i8*> [#uses=1]
+	%tmp1.i108.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 0		; <i8**> [#uses=1]
+	store i8* %tmp3.i.i.i.i105.i, i8** %tmp1.i108.i, align 4
+	%tmp.i91.i = load i32* @_C_nextcmd, align 4		; <i32> [#uses=1]
+	store i32 0, i32* @_C_nextcmd, align 4
+	%tmp3.i.i.i.i95.i = call i8* @calloc( i32 15, i32 1 )		; <i8*> [#uses=1]
+	%tmp1.i98.i = getelementptr [100 x i8*]* @_C_cmds, i32 0, i32 %tmp.i91.i		; <i8**> [#uses=1]
+	store i8* %tmp3.i.i.i.i95.i, i8** %tmp1.i98.i, align 4
+	br label %cond_next212.i
+
+bb174.i:		; preds = %cond_next212.i
+	ret i32 0
+
+bb192.i:		; preds = %cond_next212.i
+	br label %cond_next212.i
+
+cond_next212.i:		; preds = %cond_next212.i, %cond_next212.i, %cond_next212.i, %cond_next212.i, %bb192.i, %C_addcmd.exit120.i, %bb30.i, %bb21.i, %entry
+	%max_d.3 = phi i32 [ -1, %entry ], [ %max_d.3, %bb30.i ], [ %max_d.3, %bb21.i ], [ %max_d.3, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ], [ %max_d.3, %cond_next212.i ]		; <i32> [#uses=7]
+	%argv_addr.2321.0.i = phi i8** [ %argv, %entry ], [ %tmp214.i, %bb192.i ], [ %tmp214.i, %C_addcmd.exit120.i ], [ %tmp214.i, %bb30.i ], [ %tmp214.i, %bb21.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ], [ %tmp214.i, %cond_next212.i ]		; <i8**> [#uses=2]
+	%argc_addr.2358.0.i = phi i32 [ %argc, %entry ], [ %tmp205399.i, %bb30.i ], [ 0, %bb21.i ], [ 0, %C_addcmd.exit120.i ], [ 0, %bb192.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ], [ 0, %cond_next212.i ]		; <i32> [#uses=1]
+	%tmp214.i = getelementptr i8** %argv_addr.2321.0.i, i32 1		; <i8**> [#uses=9]
+	%tmp215.i = load i8** %tmp214.i		; <i8*> [#uses=1]
+	%tmp1314.i = sext i8 0 to i32		; <i32> [#uses=1]
+	switch i32 %tmp1314.i, label %bb192.i [
+		 i32 76, label %C_addcmd.exit120.i
+		 i32 77, label %bb174.i
+		 i32 83, label %bb162.i
+		 i32 97, label %bb33.i
+		 i32 98, label %bb21.i
+		 i32 99, label %bb24.i
+		 i32 100, label %bb27.i
+		 i32 101, label %cond_next212.i
+		 i32 102, label %bb102.i
+		 i32 105, label %bb75.i
+		 i32 109, label %bb30.i
+		 i32 113, label %cond_next212.i
+		 i32 114, label %cond_next73.i
+		 i32 115, label %bb79.i
+		 i32 116, label %cond_next212.i
+		 i32 118, label %bb77.i
+		 i32 119, label %cond_next212.i
+	]
+}
+
+declare %struct.FILE* @fopen(i8*, i8*)
+
+declare i8* @calloc(i32, i32)
diff --git a/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
new file mode 100644
index 0000000000000..ec170f8eac5be
--- /dev/null
+++ b/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -regalloc=local
+; PR1925
+
+	%struct.encode_aux_nearestmatch = type { i32*, i32*, i32*, i32*, i32, i32 }
+	%struct.encode_aux_pigeonhole = type { float, float, i32, i32, i32*, i32, i32*, i32*, i32* }
+	%struct.encode_aux_threshmatch = type { float*, i32*, i32, i32 }
+	%struct.oggpack_buffer = type { i32, i32, i8*, i8*, i32 }
+	%struct.static_codebook = type { i32, i32, i32*, i32, i32, i32, i32, i32, i32*, %struct.encode_aux_nearestmatch*, %struct.encode_aux_threshmatch*, %struct.encode_aux_pigeonhole*, i32 }
+
+define i32 @vorbis_staticbook_pack(%struct.static_codebook* %c, %struct.oggpack_buffer* %opb) {
+entry:
+	%opb_addr = alloca %struct.oggpack_buffer*		; <%struct.oggpack_buffer**> [#uses=1]
+	%tmp1 = load %struct.oggpack_buffer** %opb_addr, align 4		; <%struct.oggpack_buffer*> [#uses=1]
+	call void @oggpack_write( %struct.oggpack_buffer* %tmp1, i32 5653314, i32 24 ) nounwind 
+	call void @oggpack_write( %struct.oggpack_buffer* null, i32 0, i32 24 ) nounwind 
+	unreachable
+}
+
+declare void @oggpack_write(%struct.oggpack_buffer*, i32, i32)
diff --git a/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
new file mode 100644
index 0000000000000..b81d5759b6cf6
--- /dev/null
+++ b/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -regalloc=local
+; PR1925
+
+	%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" }
+	%"struct.kc::impl_ID" = type { %"struct.kc::impl_abstract_phylum", %"struct.kc::impl_Ccode_option"*, %"struct.kc::impl_casestring__Str"*, i32, %"struct.kc::impl_casestring__Str"* }
+	%"struct.kc::impl_abstract_phylum" = type { i32 (...)** }
+	%"struct.kc::impl_casestring__Str" = type { %"struct.kc::impl_abstract_phylum", i8* }
+
+define %"struct.kc::impl_ID"* @_ZN2kc18f_typeofunpsubtermEPNS_15impl_unpsubtermEPNS_7impl_IDE(%"struct.kc::impl_Ccode_option"* %a_unpsubterm, %"struct.kc::impl_ID"* %a_operator) {
+entry:
+	%tmp8 = getelementptr %"struct.kc::impl_Ccode_option"* %a_unpsubterm, i32 0, i32 0, i32 0		; <i32 (...)***> [#uses=0]
+	br i1 false, label %bb41, label %bb55
+
+bb41:		; preds = %entry
+	ret %"struct.kc::impl_ID"* null
+
+bb55:		; preds = %entry
+	%tmp67 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null )		; <i32> [#uses=0]
+	%tmp97 = tail call i32 null( %"struct.kc::impl_abstract_phylum"* null )		; <i32> [#uses=0]
+	ret %"struct.kc::impl_ID"* null
+}
diff --git a/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
new file mode 100644
index 0000000000000..ca34275f79f49
--- /dev/null
+++ b/test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | not grep 255
+
+define i32 @main(i32 %argc, i8** %argv) {
+entry:
+	br label %bb1
+bb1:		; preds = %entry
+	%tmp3.i.i = load i8* null, align 1		; <i8> [#uses=1]
+	%tmp4.i.i = icmp slt i8 %tmp3.i.i, 0		; <i1> [#uses=1]
+	br i1 %tmp4.i.i, label %bb2, label %bb3
+bb2:		; preds = %bb1
+	ret i32 1
+bb3:		; preds = %bb1
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
new file mode 100644
index 0000000000000..70f1774b4c521
--- /dev/null
+++ b/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
+
+@accum = external global { double, double }		; <{ double, double }*> [#uses=1]
+@.str = external constant [4 x i8]		; <[4 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+	br label %bb74.i
+bb74.i:		; preds = %bb88.i, %bb74.i, %entry
+	br i1 false, label %bb88.i, label %bb74.i
+bb88.i:		; preds = %bb74.i
+	br i1 false, label %mandel.exit, label %bb74.i
+mandel.exit:		; preds = %bb88.i
+	%tmp2 = volatile load double* getelementptr ({ double, double }* @accum, i32 0, i32 0), align 8		; <double> [#uses=1]
+	%tmp23 = fptosi double %tmp2 to i32		; <i32> [#uses=1]
+	%tmp5 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %tmp23 )		; <i32> [#uses=0]
+	ret i32 0
+}
+
+declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll
new file mode 100644
index 0000000000000..610f5ea7cd05d
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+@numBinsY = external global i32		; <i32*> [#uses=1]
+
+declare double @pow(double, double)
+
+define void @main(i32 %argc, i8** %argv) noreturn nounwind {
+entry:
+	br i1 false, label %bb34.outer.i.i.i, label %cond_false674
+bb34.outer.i.i.i:		; preds = %entry
+	br i1 false, label %bb2.i.i.i, label %bb47.i.i.i
+bb2.i.i.i:		; preds = %bb34.outer.i.i.i
+	%tmp24.i.i.i = call double @pow( double 0.000000e+00, double 2.000000e+00 )		; <double> [#uses=0]
+	ret void
+bb47.i.i.i:		; preds = %bb34.outer.i.i.i
+	br i1 false, label %bb220.i.i.i, label %bb62.preheader.i.i.i
+bb62.preheader.i.i.i:		; preds = %bb47.i.i.i
+	ret void
+bb220.i.i.i:		; preds = %bb47.i.i.i
+	br i1 false, label %bb248.i.i.i, label %cond_next232.i.i.i
+cond_next232.i.i.i:		; preds = %bb220.i.i.i
+	ret void
+bb248.i.i.i:		; preds = %bb220.i.i.i
+	br i1 false, label %bb300.i.i.i, label %cond_false256.i.i.i
+cond_false256.i.i.i:		; preds = %bb248.i.i.i
+	ret void
+bb300.i.i.i:		; preds = %bb248.i.i.i
+	store i32 undef, i32* @numBinsY, align 4
+	ret void
+cond_false674:		; preds = %entry
+	ret void
+}
+
+	%struct.anon = type { %struct.rnode*, %struct.rnode* }
+	%struct.ch_set = type { { i8, i8 }*, %struct.ch_set* }
+	%struct.pat_list = type { i32, %struct.pat_list* }
+	%struct.rnode = type { i16, { %struct.anon }, i16, %struct.pat_list*, %struct.pat_list* }
+
+define fastcc { i16, %struct.rnode* }* @get_token(i8** %s) nounwind  {
+entry:
+	br i1 false, label %bb42, label %bb78
+bb42:		; preds = %entry
+	br label %cond_next119.i
+bb17.i:		; preds = %cond_next119.i
+	br i1 false, label %cond_true53.i, label %cond_false99.i
+cond_true53.i:		; preds = %bb17.i
+	ret { i16, %struct.rnode* }* null
+cond_false99.i:		; preds = %bb17.i
+	%tmp106.i = malloc %struct.ch_set		; <%struct.ch_set*> [#uses=1]
+	br i1 false, label %bb126.i, label %cond_next119.i
+cond_next119.i:		; preds = %cond_false99.i, %bb42
+	%curr_ptr.0.reg2mem.0.i = phi %struct.ch_set* [ %tmp106.i, %cond_false99.i ], [ null, %bb42 ]		; <%struct.ch_set*> [#uses=2]
+	%prev_ptr.0.reg2mem.0.i = phi %struct.ch_set* [ %curr_ptr.0.reg2mem.0.i, %cond_false99.i ], [ undef, %bb42 ]		; <%struct.ch_set*> [#uses=1]
+	br i1 false, label %bb126.i, label %bb17.i
+bb126.i:		; preds = %cond_next119.i, %cond_false99.i
+	%prev_ptr.0.reg2mem.1.i = phi %struct.ch_set* [ %prev_ptr.0.reg2mem.0.i, %cond_next119.i ], [ %curr_ptr.0.reg2mem.0.i, %cond_false99.i ]		; <%struct.ch_set*> [#uses=0]
+	ret { i16, %struct.rnode* }* null
+bb78:		; preds = %entry
+	ret { i16, %struct.rnode* }* null
+}
diff --git a/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll
new file mode 100644
index 0000000000000..80ccddfcd735d
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll
@@ -0,0 +1,258 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+	%struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
+	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+	%struct.LOCBOX = type { i32, i32, i32, i32 }
+	%struct.SIDEBOX = type { i32, i32 }
+	%struct.UNCOMBOX = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.__sFILEX = type opaque
+	%struct.__sbuf = type { i8*, i32 }
+	%struct.cellbox = type { i8*, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i32, i32, %struct.CONTENTBOX*, %struct.UNCOMBOX*, [8 x %struct.tilebox*], %struct.SIDEBOX* }
+	%struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 }
+	%struct.tilebox = type { %struct.tilebox*, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.termbox*, %struct.LOCBOX* }
+@.str127 = external constant [2 x i8]		; <[2 x i8]*> [#uses=1]
+@.str584 = external constant [5 x i8]		; <[5 x i8]*> [#uses=1]
+@.str8115 = external constant [9 x i8]		; <[9 x i8]*> [#uses=1]
+
+declare %struct.FILE* @fopen(i8*, i8*)
+
+declare i32 @strcmp(i8*, i8*)
+
+declare i32 @fscanf(%struct.FILE*, i8*, ...)
+
+define void @main(i32 %argc, i8** %argv) noreturn  {
+entry:
+	br i1 false, label %cond_next48, label %cond_false674
+cond_next48:		; preds = %entry
+	%tmp61 = call %struct.FILE* @fopen( i8* null, i8* getelementptr ([2 x i8]* @.str127, i32 0, i32 0) )		; <%struct.FILE*> [#uses=2]
+	br i1 false, label %bb220.i.i.i, label %bb62.preheader.i.i.i
+bb62.preheader.i.i.i:		; preds = %cond_next48
+	ret void
+bb220.i.i.i:		; preds = %cond_next48
+	br i1 false, label %bb248.i.i.i, label %cond_next232.i.i.i
+cond_next232.i.i.i:		; preds = %bb220.i.i.i
+	ret void
+bb248.i.i.i:		; preds = %bb220.i.i.i
+	br i1 false, label %bb300.i.i.i, label %cond_false256.i.i.i
+cond_false256.i.i.i:		; preds = %bb248.i.i.i
+	ret void
+bb300.i.i.i:		; preds = %bb248.i.i.i
+	br label %bb.i.i347.i
+bb.i.i347.i:		; preds = %bb.i.i347.i, %bb300.i.i.i
+	br i1 false, label %bb894.loopexit.i.i, label %bb.i.i347.i
+bb.i350.i:		; preds = %bb894.i.i
+	br i1 false, label %bb24.i.i, label %cond_false373.i.i
+bb24.i.i:		; preds = %bb24.i.i, %bb.i350.i
+	br i1 false, label %bb40.i.i, label %bb24.i.i
+bb40.i.i:		; preds = %bb24.i.i
+	br i1 false, label %bb177.i393.i, label %bb82.i.i
+bb82.i.i:		; preds = %bb40.i.i
+	ret void
+bb177.i393.i:		; preds = %bb40.i.i
+	br i1 false, label %bb894.i.i, label %bb192.i.i
+bb192.i.i:		; preds = %bb177.i393.i
+	ret void
+cond_false373.i.i:		; preds = %bb.i350.i
+	%tmp376.i.i = call i32 @strcmp( i8* null, i8* getelementptr ([9 x i8]* @.str8115, i32 0, i32 0) )		; <i32> [#uses=0]
+	br i1 false, label %cond_true380.i.i, label %cond_next602.i.i
+cond_true380.i.i:		; preds = %cond_false373.i.i
+	%tmp394.i418.i = add i32 %cell.0.i.i, 1		; <i32> [#uses=1]
+	%tmp397.i420.i = load %struct.cellbox** null, align 4		; <%struct.cellbox*> [#uses=1]
+	br label %bb398.i.i
+bb398.i.i:		; preds = %bb398.i.i, %cond_true380.i.i
+	br i1 false, label %bb414.i.i, label %bb398.i.i
+bb414.i.i:		; preds = %bb398.i.i
+	br i1 false, label %bb581.i.i, label %bb455.i442.i
+bb455.i442.i:		; preds = %bb414.i.i
+	ret void
+bb581.i.i:		; preds = %bb581.i.i, %bb414.i.i
+	br i1 false, label %bb894.i.i, label %bb581.i.i
+cond_next602.i.i:		; preds = %cond_false373.i.i
+	br i1 false, label %bb609.i.i, label %bb661.i.i
+bb609.i.i:		; preds = %cond_next602.i.i
+	br label %bb620.i.i
+bb620.i.i:		; preds = %bb620.i.i, %bb609.i.i
+	%indvar166.i465.i = phi i32 [ %indvar.next167.i.i, %bb620.i.i ], [ 0, %bb609.i.i ]		; <i32> [#uses=1]
+	%tmp640.i.i = call i32 (%struct.FILE*, i8*, ...)* @fscanf( %struct.FILE* %tmp61, i8* getelementptr ([5 x i8]* @.str584, i32 0, i32 0), [1024 x i8]* null )		; <i32> [#uses=0]
+	%tmp648.i.i = load i32* null, align 4		; <i32> [#uses=1]
+	%tmp650.i468.i = icmp sgt i32 0, %tmp648.i.i		; <i1> [#uses=1]
+	%tmp624.i469.i = call i32 (%struct.FILE*, i8*, ...)* @fscanf( %struct.FILE* %tmp61, i8* getelementptr ([5 x i8]* @.str584, i32 0, i32 0), [1024 x i8]* null )		; <i32> [#uses=0]
+	%indvar.next167.i.i = add i32 %indvar166.i465.i, 1		; <i32> [#uses=1]
+	br i1 %tmp650.i468.i, label %bb653.i.i.loopexit, label %bb620.i.i
+bb653.i.i.loopexit:		; preds = %bb620.i.i
+	%tmp642.i466.i = add i32 0, 1		; <i32> [#uses=1]
+	br label %bb894.i.i
+bb661.i.i:		; preds = %cond_next602.i.i
+	ret void
+bb894.loopexit.i.i:		; preds = %bb.i.i347.i
+	br label %bb894.i.i
+bb894.i.i:		; preds = %bb894.loopexit.i.i, %bb653.i.i.loopexit, %bb581.i.i, %bb177.i393.i
+	%pinctr.0.i.i = phi i32 [ 0, %bb894.loopexit.i.i ], [ %tmp642.i466.i, %bb653.i.i.loopexit ], [ %pinctr.0.i.i, %bb177.i393.i ], [ %pinctr.0.i.i, %bb581.i.i ]		; <i32> [#uses=2]
+	%soft.0.i.i = phi i32 [ undef, %bb894.loopexit.i.i ], [ %soft.0.i.i, %bb653.i.i.loopexit ], [ 0, %bb177.i393.i ], [ 1, %bb581.i.i ]		; <i32> [#uses=1]
+	%cell.0.i.i = phi i32 [ 0, %bb894.loopexit.i.i ], [ %cell.0.i.i, %bb653.i.i.loopexit ], [ 0, %bb177.i393.i ], [ %tmp394.i418.i, %bb581.i.i ]		; <i32> [#uses=2]
+	%ptr.0.i.i = phi %struct.cellbox* [ undef, %bb894.loopexit.i.i ], [ %ptr.0.i.i, %bb653.i.i.loopexit ], [ null, %bb177.i393.i ], [ %tmp397.i420.i, %bb581.i.i ]		; <%struct.cellbox*> [#uses=1]
+	br i1 false, label %bb.i350.i, label %bb902.i502.i
+bb902.i502.i:		; preds = %bb894.i.i
+	ret void
+cond_false674:		; preds = %entry
+	ret void
+}
+
+	%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
+	%struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+	%struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+	%struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+@scalefac_band.1 = external global [14 x i32]		; <[14 x i32]*> [#uses=2]
+
+declare fastcc i32 @init_outer_loop(%struct.lame_global_flags*, double*, %struct.gr_info*)
+
+define fastcc void @outer_loop(%struct.lame_global_flags* %gfp, double* %xr, i32 %targ_bits, double* %best_noise, %struct.III_psy_xmin* %l3_xmin, i32* %l3_enc, %struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info, i32 %ch) {
+entry:
+	%cod_info.182 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 1		; <i32*> [#uses=1]
+	br label %bb
+bb:		; preds = %bb226, %entry
+	%save_cod_info.1.1 = phi i32 [ undef, %entry ], [ %save_cod_info.1.1, %bb226 ]		; <i32> [#uses=2]
+	br i1 false, label %cond_next, label %cond_true
+cond_true:		; preds = %bb
+	ret void
+cond_next:		; preds = %bb
+	br i1 false, label %cond_next144, label %cond_false
+cond_false:		; preds = %cond_next
+	ret void
+cond_next144:		; preds = %cond_next
+	br i1 false, label %cond_next205, label %cond_true163
+cond_true163:		; preds = %cond_next144
+	br i1 false, label %bb34.i, label %bb.i53
+bb.i53:		; preds = %cond_true163
+	ret void
+bb34.i:		; preds = %cond_true163
+	%tmp37.i55 = load i32* null, align 4		; <i32> [#uses=1]
+	br i1 false, label %bb65.preheader.i, label %bb78.i
+bb65.preheader.i:		; preds = %bb34.i
+	br label %bb65.outer.us.i
+bb65.outer.us.i:		; preds = %bb65.outer.us.i, %bb65.preheader.i
+	br i1 false, label %bb78.i, label %bb65.outer.us.i
+bb78.i:		; preds = %bb65.outer.us.i, %bb34.i
+	br i1 false, label %bb151.i.preheader, label %bb90.i
+bb90.i:		; preds = %bb78.i
+	ret void
+bb151.i.preheader:		; preds = %bb78.i
+	br label %bb151.i
+bb151.i:		; preds = %bb226.backedge.i, %bb151.i.preheader
+	%i.154.i = phi i32 [ %tmp15747.i, %bb226.backedge.i ], [ 0, %bb151.i.preheader ]		; <i32> [#uses=2]
+	%tmp15747.i = add i32 %i.154.i, 1		; <i32> [#uses=3]
+	br i1 false, label %bb155.i, label %bb226.backedge.i
+bb226.backedge.i:		; preds = %cond_next215.i, %bb151.i
+	%tmp228.i71 = icmp slt i32 %tmp15747.i, 3		; <i1> [#uses=1]
+	br i1 %tmp228.i71, label %bb151.i, label %amp_scalefac_bands.exit
+bb155.i:		; preds = %cond_next215.i, %bb151.i
+	%indvar90.i = phi i32 [ %indvar.next91.i, %cond_next215.i ], [ 0, %bb151.i ]		; <i32> [#uses=2]
+	%sfb.3.reg2mem.0.i = add i32 %indvar90.i, %tmp37.i55		; <i32> [#uses=4]
+	%tmp161.i = getelementptr [4 x [21 x double]]* null, i32 0, i32 %tmp15747.i, i32 %sfb.3.reg2mem.0.i		; <double*> [#uses=1]
+	%tmp162.i74 = load double* %tmp161.i, align 4		; <double> [#uses=0]
+	br i1 false, label %cond_true167.i, label %cond_next215.i
+cond_true167.i:		; preds = %bb155.i
+	%tmp173.i = getelementptr %struct.III_scalefac_t* null, i32 0, i32 1, i32 %sfb.3.reg2mem.0.i, i32 %i.154.i		; <i32*> [#uses=1]
+	store i32 0, i32* %tmp173.i, align 4
+	%tmp182.1.i = getelementptr [14 x i32]* @scalefac_band.1, i32 0, i32 %sfb.3.reg2mem.0.i		; <i32*> [#uses=0]
+	%tmp185.i78 = add i32 %sfb.3.reg2mem.0.i, 1		; <i32> [#uses=1]
+	%tmp187.1.i = getelementptr [14 x i32]* @scalefac_band.1, i32 0, i32 %tmp185.i78		; <i32*> [#uses=1]
+	%tmp188.i = load i32* %tmp187.1.i, align 4		; <i32> [#uses=1]
+	%tmp21153.i = icmp slt i32 0, %tmp188.i		; <i1> [#uses=1]
+	br i1 %tmp21153.i, label %bb190.preheader.i, label %cond_next215.i
+bb190.preheader.i:		; preds = %cond_true167.i
+	ret void
+cond_next215.i:		; preds = %cond_true167.i, %bb155.i
+	%indvar.next91.i = add i32 %indvar90.i, 1		; <i32> [#uses=2]
+	%exitcond99.i87 = icmp eq i32 %indvar.next91.i, 0		; <i1> [#uses=1]
+	br i1 %exitcond99.i87, label %bb226.backedge.i, label %bb155.i
+amp_scalefac_bands.exit:		; preds = %bb226.backedge.i
+	br i1 false, label %bb19.i, label %bb.i16
+bb.i16:		; preds = %amp_scalefac_bands.exit
+	ret void
+bb19.i:		; preds = %amp_scalefac_bands.exit
+	br i1 false, label %bb40.outer.i, label %cond_next205
+bb40.outer.i:		; preds = %bb19.i
+	ret void
+cond_next205:		; preds = %bb19.i, %cond_next144
+	br i1 false, label %bb226, label %cond_true210
+cond_true210:		; preds = %cond_next205
+	br i1 false, label %bb226, label %cond_true217
+cond_true217:		; preds = %cond_true210
+	%tmp221 = call fastcc i32 @init_outer_loop( %struct.lame_global_flags* %gfp, double* %xr, %struct.gr_info* %cod_info )		; <i32> [#uses=0]
+	ret void
+bb226:		; preds = %cond_true210, %cond_next205
+	br i1 false, label %bb231, label %bb
+bb231:		; preds = %bb226
+	store i32 %save_cod_info.1.1, i32* %cod_info.182
+	ret void
+}
+
+	%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
+	%struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
+	%struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] }
+	%struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
+
+define fastcc void @outer_loop2(%struct.lame_global_flags* %gfp, double* %xr, i32 %targ_bits, double* %best_noise, %struct.III_psy_xmin* %l3_xmin, i32* %l3_enc, %struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info, i32 %ch) {
+entry:
+	%cod_info.20128.1 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 1		; <i32*> [#uses=1]
+	%cod_info.20128.2 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 2		; <i32*> [#uses=1]
+	%cod_info.20128.3 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 3		; <i32*> [#uses=1]
+	br label %bb
+bb:		; preds = %bb226, %entry
+	%save_cod_info.19.1 = phi i32* [ undef, %entry ], [ %save_cod_info.19.0, %bb226 ]		; <i32*> [#uses=1]
+	%save_cod_info.0.1 = phi i32 [ undef, %entry ], [ %save_cod_info.0.0, %bb226 ]		; <i32> [#uses=1]
+	br i1 false, label %cond_next144, label %cond_false
+cond_false:		; preds = %bb
+	br i1 false, label %cond_true56, label %cond_false78
+cond_true56:		; preds = %cond_false
+	br i1 false, label %inner_loop.exit, label %cond_next85
+inner_loop.exit:		; preds = %cond_true56
+	br i1 false, label %cond_next104, label %cond_false96
+cond_false78:		; preds = %cond_false
+	ret void
+cond_next85:		; preds = %cond_true56
+	ret void
+cond_false96:		; preds = %inner_loop.exit
+	ret void
+cond_next104:		; preds = %inner_loop.exit
+	br i1 false, label %cond_next144, label %cond_false110
+cond_false110:		; preds = %cond_next104
+	ret void
+cond_next144:		; preds = %cond_next104, %bb
+	%save_cod_info.19.0 = phi i32* [ %save_cod_info.19.1, %bb ], [ null, %cond_next104 ]		; <i32*> [#uses=1]
+	%save_cod_info.4.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%save_cod_info.3.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%save_cod_info.2.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%save_cod_info.1.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%save_cod_info.0.0 = phi i32 [ %save_cod_info.0.1, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%over.1 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%best_over.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%notdone.0 = phi i32 [ 0, %bb ], [ 0, %cond_next104 ]		; <i32> [#uses=1]
+	%tmp147 = load i32* null, align 4		; <i32> [#uses=1]
+	%tmp148 = icmp eq i32 %tmp147, 0		; <i1> [#uses=1]
+	%tmp153 = icmp eq i32 %over.1, 0		; <i1> [#uses=1]
+	%bothcond = and i1 %tmp148, %tmp153		; <i1> [#uses=1]
+	%notdone.2 = select i1 %bothcond, i32 0, i32 %notdone.0		; <i32> [#uses=1]
+	br i1 false, label %cond_next205, label %cond_true163
+cond_true163:		; preds = %cond_next144
+	ret void
+cond_next205:		; preds = %cond_next144
+	br i1 false, label %bb226, label %cond_true210
+cond_true210:		; preds = %cond_next205
+	ret void
+bb226:		; preds = %cond_next205
+	%tmp228 = icmp eq i32 %notdone.2, 0		; <i1> [#uses=1]
+	br i1 %tmp228, label %bb231, label %bb
+bb231:		; preds = %bb226
+	store i32 %save_cod_info.1.0, i32* null
+	store i32 %save_cod_info.2.0, i32* null
+	store i32 %save_cod_info.3.0, i32* null
+	store i32 %save_cod_info.4.0, i32* null
+	store i32 0, i32* %cod_info.20128.1
+	store i32 0, i32* %cod_info.20128.2
+	store i32 0, i32* %cod_info.20128.3
+	%tmp244245 = sitofp i32 %best_over.0 to double		; <double> [#uses=1]
+	store double %tmp244245, double* %best_noise, align 4
+	ret void
+}
diff --git a/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll b/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll
new file mode 100644
index 0000000000000..3cd757fa62ad2
--- /dev/null
+++ b/test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll
@@ -0,0 +1,3544 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+declare void @foo(i8*, i8*, i32, i32, i32, i32, i32, i32, i32)
+
+define void @t() nounwind  {
+	br label %1
+; <label>:1		; preds = %0
+	br label %bb4351.i
+bb4351.i:		; preds = %1
+	switch i32 0, label %bb4411.i [
+		 i32 1, label %bb4354.i
+		 i32 2, label %bb4369.i
+	]
+bb4354.i:		; preds = %bb4351.i
+	br label %t.exit
+bb4369.i:		; preds = %bb4351.i
+	br label %bb4374.i
+bb4374.i:		; preds = %bb4369.i
+	br label %bb4411.i
+bb4411.i:		; preds = %bb4374.i, %bb4351.i
+	%sf4083.0.i = phi i32 [ 0, %bb4374.i ], [ 6, %bb4351.i ]		; <i32> [#uses=8]
+	br label %bb4498.i
+bb4498.i:		; preds = %bb4411.i
+	%sfComp4077.1.i = phi i32 [ undef, %bb4411.i ]		; <i32> [#uses=2]
+	%stComp4075.1.i = phi i32 [ undef, %bb4411.i ]		; <i32> [#uses=1]
+	switch i32 0, label %bb4553.i [
+		 i32 1, label %bb4501.i
+		 i32 2, label %bb4521.i
+	]
+bb4501.i:		; preds = %bb4498.i
+	%sfComp4077.1.reg2mem.0.i = phi i32 [ %sfComp4077.1.i, %bb4498.i ]		; <i32> [#uses=1]
+	call void @foo( i8* null, i8* null, i32 %sfComp4077.1.reg2mem.0.i, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0 ) nounwind 
+	br i1 false, label %UnifiedReturnBlock.i, label %bb4517.i
+bb4517.i:		; preds = %bb4501.i
+	br label %t.exit
+bb4521.i:		; preds = %bb4498.i
+	br label %bb4526.i
+bb4526.i:		; preds = %bb4521.i
+	switch i32 0, label %bb4529.i [
+		 i32 6, label %bb4530.i
+		 i32 7, label %bb4530.i
+	]
+bb4529.i:		; preds = %bb4526.i
+	br label %bb4530.i
+bb4530.i:		; preds = %bb4529.i, %bb4526.i, %bb4526.i
+	br label %bb4553.i
+bb4553.i:		; preds = %bb4530.i, %bb4498.i
+	%dt4080.0.i = phi i32 [ %stComp4075.1.i, %bb4530.i ], [ 7, %bb4498.i ]		; <i32> [#uses=32]
+	%df4081.0.i = phi i32 [ %sfComp4077.1.i, %bb4530.i ], [ 8, %bb4498.i ]		; <i32> [#uses=17]
+	switch i32 %sf4083.0.i, label %bb4559.i [
+		 i32 0, label %bb4558.i
+		 i32 1, label %bb4558.i
+		 i32 2, label %bb4558.i
+		 i32 5, label %bb4561.i
+		 i32 6, label %bb4561.i
+		 i32 7, label %bb4561.i
+		 i32 9, label %bb4557.i
+	]
+bb4557.i:		; preds = %bb4553.i
+	switch i32 %df4081.0.i, label %bb4569.i [
+		 i32 0, label %bb4568.i
+		 i32 1, label %bb4568.i
+		 i32 2, label %bb4568.i
+		 i32 5, label %bb4571.i
+		 i32 6, label %bb4571.i
+		 i32 7, label %bb4571.i
+		 i32 9, label %bb4567.i
+	]
+bb4558.i:		; preds = %bb4553.i, %bb4553.i, %bb4553.i
+	switch i32 %df4081.0.i, label %bb4569.i [
+		 i32 0, label %bb4568.i
+		 i32 1, label %bb4568.i
+		 i32 2, label %bb4568.i
+		 i32 5, label %bb4571.i
+		 i32 6, label %bb4571.i
+		 i32 7, label %bb4571.i
+		 i32 9, label %bb4567.i
+	]
+bb4559.i:		; preds = %bb4553.i
+	br label %bb4561.i
+bb4561.i:		; preds = %bb4559.i, %bb4553.i, %bb4553.i, %bb4553.i
+	switch i32 %df4081.0.i, label %bb4569.i [
+		 i32 0, label %bb4568.i
+		 i32 1, label %bb4568.i
+		 i32 2, label %bb4568.i
+		 i32 5, label %bb4571.i
+		 i32 6, label %bb4571.i
+		 i32 7, label %bb4571.i
+		 i32 9, label %bb4567.i
+	]
+bb4567.i:		; preds = %bb4561.i, %bb4558.i, %bb4557.i
+	br label %bb4580.i
+bb4568.i:		; preds = %bb4561.i, %bb4561.i, %bb4561.i, %bb4558.i, %bb4558.i, %bb4558.i, %bb4557.i, %bb4557.i, %bb4557.i
+	br label %bb4580.i
+bb4569.i:		; preds = %bb4561.i, %bb4558.i, %bb4557.i
+	br label %bb4571.i
+bb4571.i:		; preds = %bb4569.i, %bb4561.i, %bb4561.i, %bb4561.i, %bb4558.i, %bb4558.i, %bb4558.i, %bb4557.i, %bb4557.i, %bb4557.i
+	br label %bb4580.i
+bb4580.i:		; preds = %bb4571.i, %bb4568.i, %bb4567.i
+	br i1 false, label %bb4611.i, label %bb4593.i
+bb4593.i:		; preds = %bb4580.i
+	br i1 false, label %bb4610.i, label %bb4611.i
+bb4610.i:		; preds = %bb4593.i
+	br label %bb4611.i
+bb4611.i:		; preds = %bb4610.i, %bb4593.i, %bb4580.i
+	br i1 false, label %bb4776.i, label %bb4620.i
+bb4620.i:		; preds = %bb4611.i
+	switch i32 0, label %bb4776.i [
+		 i32 0, label %bb4691.i
+		 i32 2, label %bb4740.i
+		 i32 4, label %bb4755.i
+		 i32 8, label %bb4622.i
+		 i32 9, label %bb4622.i
+		 i32 10, label %bb4629.i
+		 i32 11, label %bb4629.i
+		 i32 12, label %bb4651.i
+		 i32 13, label %bb4651.i
+		 i32 14, label %bb4665.i
+		 i32 15, label %bb4665.i
+		 i32 16, label %bb4691.i
+		 i32 17, label %bb4691.i
+		 i32 18, label %bb4712.i
+		 i32 19, label %bb4712.i
+		 i32 22, label %bb4733.i
+		 i32 23, label %bb4733.i
+	]
+bb4622.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4628.i, label %bb4776.i
+bb4628.i:		; preds = %bb4622.i
+	br label %bb4776.i
+bb4629.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4644.i
+bb4644.i:		; preds = %bb4629.i
+	br i1 false, label %bb4650.i, label %bb4776.i
+bb4650.i:		; preds = %bb4644.i
+	br label %bb4776.i
+bb4651.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4658.i
+bb4658.i:		; preds = %bb4651.i
+	br i1 false, label %bb4664.i, label %bb4776.i
+bb4664.i:		; preds = %bb4658.i
+	br label %bb4776.i
+bb4665.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4684.i
+bb4684.i:		; preds = %bb4665.i
+	br i1 false, label %bb4690.i, label %bb4776.i
+bb4690.i:		; preds = %bb4684.i
+	br label %bb4776.i
+bb4691.i:		; preds = %bb4620.i, %bb4620.i, %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4698.i
+bb4698.i:		; preds = %bb4691.i
+	br i1 false, label %bb4711.i, label %bb4776.i
+bb4711.i:		; preds = %bb4698.i
+	br label %bb4776.i
+bb4712.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4726.i
+bb4726.i:		; preds = %bb4712.i
+	br i1 false, label %bb4732.i, label %bb4776.i
+bb4732.i:		; preds = %bb4726.i
+	br label %bb4776.i
+bb4733.i:		; preds = %bb4620.i, %bb4620.i
+	br i1 false, label %bb4739.i, label %bb4776.i
+bb4739.i:		; preds = %bb4733.i
+	br label %bb4776.i
+bb4740.i:		; preds = %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4754.i
+bb4754.i:		; preds = %bb4740.i
+	br label %bb4776.i
+bb4755.i:		; preds = %bb4620.i
+	br i1 false, label %bb4776.i, label %bb4774.i
+bb4774.i:		; preds = %bb4755.i
+	br label %bb4776.i
+bb4776.i:		; preds = %bb4774.i, %bb4755.i, %bb4754.i, %bb4740.i, %bb4739.i, %bb4733.i, %bb4732.i, %bb4726.i, %bb4712.i, %bb4711.i, %bb4698.i, %bb4691.i, %bb4690.i, %bb4684.i, %bb4665.i, %bb4664.i, %bb4658.i, %bb4651.i, %bb4650.i, %bb4644.i, %bb4629.i, %bb4628.i, %bb4622.i, %bb4620.i, %bb4611.i
+	switch i32 0, label %bb4790.i [
+		 i32 0, label %bb4786.i
+		 i32 1, label %bb4784.i
+		 i32 3, label %bb4784.i
+		 i32 5, label %bb4784.i
+		 i32 6, label %bb4785.i
+		 i32 7, label %bb4785.i
+		 i32 8, label %bb4791.i
+		 i32 9, label %bb4791.i
+		 i32 10, label %bb4791.i
+		 i32 11, label %bb4791.i
+		 i32 12, label %bb4791.i
+		 i32 13, label %bb4791.i
+		 i32 14, label %bb4791.i
+		 i32 15, label %bb4791.i
+		 i32 16, label %bb4791.i
+		 i32 17, label %bb4791.i
+		 i32 18, label %bb4791.i
+		 i32 19, label %bb4791.i
+	]
+bb4784.i:		; preds = %bb4776.i, %bb4776.i, %bb4776.i
+	br label %bb4791.i
+bb4785.i:		; preds = %bb4776.i, %bb4776.i
+	br label %bb4791.i
+bb4786.i:		; preds = %bb4776.i
+	br label %bb4791.i
+bb4790.i:		; preds = %bb4776.i
+	br label %bb4791.i
+bb4791.i:		; preds = %bb4790.i, %bb4786.i, %bb4785.i, %bb4784.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i, %bb4776.i
+	switch i32 %dt4080.0.i, label %bb4803.i [
+		 i32 0, label %bb4799.i
+		 i32 6, label %bb4794.i
+		 i32 7, label %bb4794.i
+		 i32 8, label %bb4804.i
+		 i32 9, label %bb4804.i
+		 i32 10, label %bb4804.i
+		 i32 11, label %bb4804.i
+		 i32 12, label %bb4804.i
+		 i32 13, label %bb4804.i
+		 i32 14, label %bb4804.i
+		 i32 15, label %bb4804.i
+		 i32 16, label %bb4804.i
+		 i32 17, label %bb4804.i
+		 i32 18, label %bb4804.i
+		 i32 19, label %bb4804.i
+	]
+bb4794.i:		; preds = %bb4791.i, %bb4791.i
+	br i1 false, label %bb4809.i, label %bb4819.i
+bb4799.i:		; preds = %bb4791.i
+	br i1 false, label %bb4809.i, label %bb4819.i
+bb4803.i:		; preds = %bb4791.i
+	br label %bb4804.i
+bb4804.i:		; preds = %bb4803.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i, %bb4791.i
+	br i1 false, label %bb4809.i, label %bb4819.i
+bb4809.i:		; preds = %bb4804.i, %bb4799.i, %bb4794.i
+	switch i32 %df4081.0.i, label %bb71.i.i [
+		 i32 3, label %bb61.i.i
+		 i32 4, label %bb.i.i
+		 i32 5, label %bb.i.i
+		 i32 6, label %bb.i.i
+		 i32 7, label %bb.i.i
+		 i32 8, label %bb38.i.i
+		 i32 9, label %bb38.i.i
+		 i32 10, label %bb50.i.i
+		 i32 11, label %bb40.i.i
+		 i32 16, label %bb38.i.i
+	]
+bb.i.i:		; preds = %bb4809.i, %bb4809.i, %bb4809.i, %bb4809.i
+	br label %bb403.i.i
+bb38.i.i:		; preds = %bb4809.i, %bb4809.i, %bb4809.i
+	br label %bb403.i.i
+bb40.i.i:		; preds = %bb4809.i
+	br label %bb403.i.i
+bb50.i.i:		; preds = %bb4809.i
+	br label %bb403.i.i
+bb61.i.i:		; preds = %bb4809.i
+	br label %bb403.i.i
+bb71.i.i:		; preds = %bb4809.i
+	br label %bb403.i.i
+bb403.i.i:		; preds = %bb71.i.i, %bb61.i.i, %bb50.i.i, %bb40.i.i, %bb38.i.i, %bb.i.i
+	br i1 false, label %bb408.i.i, label %bb502.i.i
+bb408.i.i:		; preds = %bb403.i.i
+	br label %bb708.i.i
+bb502.i.i:		; preds = %bb403.i.i
+	br label %bb708.i.i
+bb708.i.i:		; preds = %bb502.i.i, %bb408.i.i
+	switch i32 0, label %bb758.i.i [
+		 i32 0, label %bb710.i.i
+		 i32 1, label %bb713.i.i
+		 i32 2, label %bb718.i.i
+		 i32 3, label %bb721.i.i
+		 i32 4, label %bb726.i.i
+		 i32 5, label %bb729.i.i
+		 i32 8, label %bb732.i.i
+		 i32 9, label %bb732.i.i
+		 i32 10, label %bb737.i.i
+		 i32 11, label %bb737.i.i
+		 i32 12, label %bb742.i.i
+		 i32 13, label %bb742.i.i
+		 i32 14, label %bb745.i.i
+		 i32 15, label %bb745.i.i
+		 i32 16, label %bb750.i.i
+		 i32 17, label %bb750.i.i
+		 i32 18, label %bb753.i.i
+		 i32 19, label %bb753.i.i
+		 i32 22, label %bb750.i.i
+		 i32 23, label %bb750.i.i
+	]
+bb710.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb713.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb718.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb721.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb726.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb729.i.i:		; preds = %bb708.i.i
+	br label %bb758.i.i
+bb732.i.i:		; preds = %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb737.i.i:		; preds = %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb742.i.i:		; preds = %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb745.i.i:		; preds = %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb750.i.i:		; preds = %bb708.i.i, %bb708.i.i, %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb753.i.i:		; preds = %bb708.i.i, %bb708.i.i
+	br label %bb758.i.i
+bb758.i.i:		; preds = %bb753.i.i, %bb750.i.i, %bb745.i.i, %bb742.i.i, %bb737.i.i, %bb732.i.i, %bb729.i.i, %bb726.i.i, %bb721.i.i, %bb718.i.i, %bb713.i.i, %bb710.i.i, %bb708.i.i
+	switch i32 %dt4080.0.i, label %bb808.i.i [
+		 i32 0, label %bb760.i.i
+		 i32 1, label %bb763.i.i
+		 i32 2, label %bb768.i.i
+		 i32 3, label %bb771.i.i
+		 i32 4, label %bb776.i.i
+		 i32 5, label %bb779.i.i
+		 i32 8, label %bb782.i.i
+		 i32 9, label %bb782.i.i
+		 i32 10, label %bb787.i.i
+		 i32 11, label %bb787.i.i
+		 i32 12, label %bb792.i.i
+		 i32 13, label %bb792.i.i
+		 i32 14, label %bb795.i.i
+		 i32 15, label %bb795.i.i
+		 i32 16, label %bb800.i.i
+		 i32 17, label %bb800.i.i
+		 i32 18, label %bb803.i.i
+		 i32 19, label %bb803.i.i
+		 i32 22, label %bb800.i.i
+		 i32 23, label %bb800.i.i
+	]
+bb760.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb763.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb768.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb771.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb776.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb779.i.i:		; preds = %bb758.i.i
+	br label %bb811.i.i
+bb782.i.i:		; preds = %bb758.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb787.i.i:		; preds = %bb758.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb792.i.i:		; preds = %bb758.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb795.i.i:		; preds = %bb758.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb800.i.i:		; preds = %bb758.i.i, %bb758.i.i, %bb758.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb803.i.i:		; preds = %bb758.i.i, %bb758.i.i
+	br label %bb808.i.i
+bb808.i.i:		; preds = %bb803.i.i, %bb758.i.i
+	br label %bb811.i.i
+bb811.i.i:		; preds = %bb808.i.i, %bb800.i.i, %bb795.i.i, %bb792.i.i, %bb787.i.i, %bb782.i.i, %bb779.i.i, %bb776.i.i, %bb771.i.i, %bb768.i.i, %bb763.i.i, %bb760.i.i
+	switch i32 0, label %bb928.i.i [
+		 i32 0, label %bb813.i.i
+		 i32 1, label %bb833.i.i
+		 i32 2, label %bb813.i.i
+		 i32 3, label %bb833.i.i
+		 i32 4, label %bb813.i.i
+		 i32 5, label %bb813.i.i
+		 i32 8, label %bb872.i.i
+		 i32 9, label %bb872.i.i
+		 i32 10, label %bb890.i.i
+		 i32 11, label %bb890.i.i
+		 i32 12, label %bb813.i.i
+		 i32 13, label %bb813.i.i
+		 i32 14, label %bb908.i.i
+		 i32 15, label %bb908.i.i
+		 i32 16, label %bb813.i.i
+		 i32 17, label %bb813.i.i
+		 i32 18, label %bb908.i.i
+		 i32 19, label %bb908.i.i
+		 i32 22, label %bb813.i.i
+		 i32 23, label %bb813.i.i
+	]
+bb813.i.i:		; preds = %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i
+	switch i32 %dt4080.0.i, label %bb1065.i.i [
+		 i32 0, label %bb930.i.i
+		 i32 1, label %bb950.i.i
+		 i32 2, label %bb930.i.i
+		 i32 3, label %bb950.i.i
+		 i32 4, label %bb989.i.i
+		 i32 5, label %bb989.i.i
+		 i32 8, label %bb1009.i.i
+		 i32 9, label %bb1009.i.i
+		 i32 10, label %bb1027.i.i
+		 i32 11, label %bb1027.i.i
+		 i32 12, label %bb930.i.i
+		 i32 13, label %bb930.i.i
+		 i32 14, label %bb1045.i.i
+		 i32 15, label %bb1045.i.i
+		 i32 16, label %bb930.i.i
+		 i32 17, label %bb930.i.i
+		 i32 18, label %bb1045.i.i
+		 i32 19, label %bb1045.i.i
+		 i32 22, label %bb930.i.i
+		 i32 23, label %bb930.i.i
+	]
+bb833.i.i:		; preds = %bb811.i.i, %bb811.i.i
+	switch i32 %dt4080.0.i, label %bb1065.i.i [
+		 i32 0, label %bb930.i.i
+		 i32 1, label %bb950.i.i
+		 i32 2, label %bb930.i.i
+		 i32 3, label %bb950.i.i
+		 i32 4, label %bb989.i.i
+		 i32 5, label %bb989.i.i
+		 i32 8, label %bb1009.i.i
+		 i32 9, label %bb1009.i.i
+		 i32 10, label %bb1027.i.i
+		 i32 11, label %bb1027.i.i
+		 i32 12, label %bb930.i.i
+		 i32 13, label %bb930.i.i
+		 i32 14, label %bb1045.i.i
+		 i32 15, label %bb1045.i.i
+		 i32 16, label %bb930.i.i
+		 i32 17, label %bb930.i.i
+		 i32 18, label %bb1045.i.i
+		 i32 19, label %bb1045.i.i
+		 i32 22, label %bb930.i.i
+		 i32 23, label %bb930.i.i
+	]
+bb872.i.i:		; preds = %bb811.i.i, %bb811.i.i
+	switch i32 %dt4080.0.i, label %bb1065.i.i [
+		 i32 0, label %bb930.i.i
+		 i32 1, label %bb950.i.i
+		 i32 2, label %bb930.i.i
+		 i32 3, label %bb950.i.i
+		 i32 4, label %bb989.i.i
+		 i32 5, label %bb989.i.i
+		 i32 8, label %bb1009.i.i
+		 i32 9, label %bb1009.i.i
+		 i32 10, label %bb1027.i.i
+		 i32 11, label %bb1027.i.i
+		 i32 12, label %bb930.i.i
+		 i32 13, label %bb930.i.i
+		 i32 14, label %bb1045.i.i
+		 i32 15, label %bb1045.i.i
+		 i32 16, label %bb930.i.i
+		 i32 17, label %bb930.i.i
+		 i32 18, label %bb1045.i.i
+		 i32 19, label %bb1045.i.i
+		 i32 22, label %bb930.i.i
+		 i32 23, label %bb930.i.i
+	]
+bb890.i.i:		; preds = %bb811.i.i, %bb811.i.i
+	switch i32 %dt4080.0.i, label %bb1065.i.i [
+		 i32 0, label %bb930.i.i
+		 i32 1, label %bb950.i.i
+		 i32 2, label %bb930.i.i
+		 i32 3, label %bb950.i.i
+		 i32 4, label %bb989.i.i
+		 i32 5, label %bb989.i.i
+		 i32 8, label %bb1009.i.i
+		 i32 9, label %bb1009.i.i
+		 i32 10, label %bb1027.i.i
+		 i32 11, label %bb1027.i.i
+		 i32 12, label %bb930.i.i
+		 i32 13, label %bb930.i.i
+		 i32 14, label %bb1045.i.i
+		 i32 15, label %bb1045.i.i
+		 i32 16, label %bb930.i.i
+		 i32 17, label %bb930.i.i
+		 i32 18, label %bb1045.i.i
+		 i32 19, label %bb1045.i.i
+		 i32 22, label %bb930.i.i
+		 i32 23, label %bb930.i.i
+	]
+bb908.i.i:		; preds = %bb811.i.i, %bb811.i.i, %bb811.i.i, %bb811.i.i
+	br label %bb928.i.i
+bb928.i.i:		; preds = %bb908.i.i, %bb811.i.i
+	switch i32 %dt4080.0.i, label %bb1065.i.i [
+		 i32 0, label %bb930.i.i
+		 i32 1, label %bb950.i.i
+		 i32 2, label %bb930.i.i
+		 i32 3, label %bb950.i.i
+		 i32 4, label %bb989.i.i
+		 i32 5, label %bb989.i.i
+		 i32 8, label %bb1009.i.i
+		 i32 9, label %bb1009.i.i
+		 i32 10, label %bb1027.i.i
+		 i32 11, label %bb1027.i.i
+		 i32 12, label %bb930.i.i
+		 i32 13, label %bb930.i.i
+		 i32 14, label %bb1045.i.i
+		 i32 15, label %bb1045.i.i
+		 i32 16, label %bb930.i.i
+		 i32 17, label %bb930.i.i
+		 i32 18, label %bb1045.i.i
+		 i32 19, label %bb1045.i.i
+		 i32 22, label %bb930.i.i
+		 i32 23, label %bb930.i.i
+	]
+bb930.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb5235.i
+bb950.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb5235.i
+bb989.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb5235.i
+bb1009.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb5235.i
+bb1027.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb5235.i
+bb1045.i.i:		; preds = %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb928.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb890.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb872.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb833.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i, %bb813.i.i
+	br label %bb1065.i.i
+bb1065.i.i:		; preds = %bb1045.i.i, %bb928.i.i, %bb890.i.i, %bb872.i.i, %bb833.i.i, %bb813.i.i
+	br label %bb5235.i
+bb4819.i:		; preds = %bb4804.i, %bb4799.i, %bb4794.i
+	br i1 false, label %bb5208.i, label %bb5011.i
+bb5011.i:		; preds = %bb4819.i
+	switch i32 0, label %bb5039.i [
+		 i32 10, label %bb5016.i
+		 i32 3, label %bb5103.i
+	]
+bb5016.i:		; preds = %bb5011.i
+	br i1 false, label %bb5103.i, label %bb5039.i
+bb5039.i:		; preds = %bb5016.i, %bb5011.i
+	switch i32 0, label %bb5052.i [
+		 i32 3, label %bb5103.i
+		 i32 10, label %bb5103.i
+	]
+bb5052.i:		; preds = %bb5039.i
+	br i1 false, label %bb5103.i, label %bb5065.i
+bb5065.i:		; preds = %bb5052.i
+	br i1 false, label %bb5078.i, label %bb5103.i
+bb5078.i:		; preds = %bb5065.i
+	br i1 false, label %bb5103.i, label %bb5084.i
+bb5084.i:		; preds = %bb5078.i
+	br i1 false, label %bb5103.i, label %bb5090.i
+bb5090.i:		; preds = %bb5084.i
+	br i1 false, label %bb5103.i, label %bb5096.i
+bb5096.i:		; preds = %bb5090.i
+	br i1 false, label %bb5103.i, label %bb5102.i
+bb5102.i:		; preds = %bb5096.i
+	br label %bb5103.i
+bb5103.i:		; preds = %bb5102.i, %bb5096.i, %bb5090.i, %bb5084.i, %bb5078.i, %bb5065.i, %bb5052.i, %bb5039.i, %bb5039.i, %bb5016.i, %bb5011.i
+	switch i32 0, label %bb5208.i [
+		 i32 0, label %bb5133.i
+		 i32 2, label %bb5162.i
+		 i32 4, label %bb5182.i
+		 i32 10, label %bb5113.i
+		 i32 11, label %bb5113.i
+		 i32 12, label %bb5121.i
+		 i32 13, label %bb5121.i
+		 i32 14, label %bb5125.i
+		 i32 15, label %bb5125.i
+		 i32 16, label %bb5133.i
+		 i32 17, label %bb5133.i
+		 i32 18, label %bb5146.i
+		 i32 19, label %bb5146.i
+	]
+bb5113.i:		; preds = %bb5103.i, %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 8, label %bb5115.i
+		 i32 9, label %bb5115.i
+		 i32 12, label %bb5117.i
+		 i32 13, label %bb5117.i
+		 i32 14, label %bb5119.i
+		 i32 15, label %bb5119.i
+	]
+bb5115.i:		; preds = %bb5113.i, %bb5113.i
+	br label %bb5208.i
+bb5117.i:		; preds = %bb5113.i, %bb5113.i
+	br label %bb5208.i
+bb5119.i:		; preds = %bb5113.i, %bb5113.i
+	br label %bb5208.i
+bb5121.i:		; preds = %bb5103.i, %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 8, label %bb5123.i
+		 i32 9, label %bb5123.i
+	]
+bb5123.i:		; preds = %bb5121.i, %bb5121.i
+	br label %bb5208.i
+bb5125.i:		; preds = %bb5103.i, %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 8, label %bb5127.i
+		 i32 9, label %bb5127.i
+		 i32 12, label %bb5129.i
+		 i32 13, label %bb5129.i
+	]
+bb5127.i:		; preds = %bb5125.i, %bb5125.i
+	br label %bb5208.i
+bb5129.i:		; preds = %bb5125.i, %bb5125.i
+	br label %bb5208.i
+bb5133.i:		; preds = %bb5103.i, %bb5103.i, %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 8, label %bb5135.i
+		 i32 9, label %bb5135.i
+		 i32 10, label %bb5137.i
+		 i32 11, label %bb5137.i
+		 i32 12, label %bb5139.i
+		 i32 13, label %bb5139.i
+		 i32 14, label %bb5143.i
+		 i32 15, label %bb5143.i
+	]
+bb5135.i:		; preds = %bb5133.i, %bb5133.i
+	br label %bb5208.i
+bb5137.i:		; preds = %bb5133.i, %bb5133.i
+	br label %bb5208.i
+bb5139.i:		; preds = %bb5133.i, %bb5133.i
+	br label %bb5208.i
+bb5143.i:		; preds = %bb5133.i, %bb5133.i
+	br label %bb5208.i
+bb5146.i:		; preds = %bb5103.i, %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 0, label %bb5158.i
+		 i32 8, label %bb5148.i
+		 i32 9, label %bb5148.i
+		 i32 10, label %bb5150.i
+		 i32 11, label %bb5150.i
+		 i32 12, label %bb5152.i
+		 i32 13, label %bb5152.i
+		 i32 14, label %bb5155.i
+		 i32 15, label %bb5155.i
+		 i32 16, label %bb5158.i
+		 i32 17, label %bb5158.i
+	]
+bb5148.i:		; preds = %bb5146.i, %bb5146.i
+	br label %bb5208.i
+bb5150.i:		; preds = %bb5146.i, %bb5146.i
+	br label %bb5208.i
+bb5152.i:		; preds = %bb5146.i, %bb5146.i
+	br label %bb5208.i
+bb5155.i:		; preds = %bb5146.i, %bb5146.i
+	br label %bb5208.i
+bb5158.i:		; preds = %bb5146.i, %bb5146.i, %bb5146.i
+	br label %bb5208.i
+bb5162.i:		; preds = %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 0, label %bb5175.i
+		 i32 8, label %bb5164.i
+		 i32 9, label %bb5164.i
+		 i32 10, label %bb5166.i
+		 i32 11, label %bb5166.i
+		 i32 12, label %bb5168.i
+		 i32 13, label %bb5168.i
+		 i32 14, label %bb5172.i
+		 i32 15, label %bb5172.i
+		 i32 16, label %bb5175.i
+		 i32 17, label %bb5175.i
+		 i32 18, label %bb5179.i
+		 i32 19, label %bb5179.i
+	]
+bb5164.i:		; preds = %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5166.i:		; preds = %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5168.i:		; preds = %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5172.i:		; preds = %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5175.i:		; preds = %bb5162.i, %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5179.i:		; preds = %bb5162.i, %bb5162.i
+	br label %bb5208.i
+bb5182.i:		; preds = %bb5103.i
+	switch i32 %dt4080.0.i, label %bb5208.i [
+		 i32 0, label %bb5195.i
+		 i32 2, label %bb5202.i
+		 i32 8, label %bb5184.i
+		 i32 9, label %bb5184.i
+		 i32 10, label %bb5186.i
+		 i32 11, label %bb5186.i
+		 i32 12, label %bb5188.i
+		 i32 13, label %bb5188.i
+		 i32 14, label %bb5192.i
+		 i32 15, label %bb5192.i
+		 i32 16, label %bb5195.i
+		 i32 17, label %bb5195.i
+		 i32 18, label %bb5199.i
+		 i32 19, label %bb5199.i
+	]
+bb5184.i:		; preds = %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5186.i:		; preds = %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5188.i:		; preds = %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5192.i:		; preds = %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5195.i:		; preds = %bb5182.i, %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5199.i:		; preds = %bb5182.i, %bb5182.i
+	br label %bb5208.i
+bb5202.i:		; preds = %bb5182.i
+	br label %bb5208.i
+bb5208.i:		; preds = %bb5202.i, %bb5199.i, %bb5195.i, %bb5192.i, %bb5188.i, %bb5186.i, %bb5184.i, %bb5182.i, %bb5179.i, %bb5175.i, %bb5172.i, %bb5168.i, %bb5166.i, %bb5164.i, %bb5162.i, %bb5158.i, %bb5155.i, %bb5152.i, %bb5150.i, %bb5148.i, %bb5146.i, %bb5143.i, %bb5139.i, %bb5137.i, %bb5135.i, %bb5133.i, %bb5129.i, %bb5127.i, %bb5125.i, %bb5123.i, %bb5121.i, %bb5119.i, %bb5117.i, %bb5115.i, %bb5113.i, %bb5103.i, %bb4819.i
+	switch i32 0, label %bb5221.i [
+		 i32 0, label %bb5210.i
+		 i32 1, label %bb5211.i
+		 i32 2, label %bb5212.i
+		 i32 3, label %bb5213.i
+		 i32 4, label %bb5214.i
+		 i32 5, label %bb5215.i
+		 i32 6, label %bb5217.i
+		 i32 7, label %bb5216.i
+		 i32 12, label %bb5218.i
+		 i32 13, label %bb5218.i
+		 i32 14, label %bb5219.i
+		 i32 15, label %bb5219.i
+		 i32 16, label %bb5210.i
+		 i32 17, label %bb5210.i
+		 i32 22, label %bb5210.i
+		 i32 23, label %bb5210.i
+	]
+bb5210.i:		; preds = %bb5208.i, %bb5208.i, %bb5208.i, %bb5208.i, %bb5208.i
+	br label %bb5224.i
+bb5211.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5212.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5213.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5214.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5215.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5216.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5217.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5218.i:		; preds = %bb5208.i, %bb5208.i
+	br label %bb5224.i
+bb5219.i:		; preds = %bb5208.i, %bb5208.i
+	br label %bb5224.i
+bb5221.i:		; preds = %bb5208.i
+	br label %bb5224.i
+bb5224.i:		; preds = %bb5221.i, %bb5219.i, %bb5218.i, %bb5217.i, %bb5216.i, %bb5215.i, %bb5214.i, %bb5213.i, %bb5212.i, %bb5211.i, %bb5210.i
+	br label %bb5235.i
+bb5235.i:		; preds = %bb5224.i, %bb1065.i.i, %bb1027.i.i, %bb1009.i.i, %bb989.i.i, %bb950.i.i, %bb930.i.i
+	br label %bb5272.i
+bb5272.i:		; preds = %bb5235.i
+	br label %bb5276.i
+bb5276.i:		; preds = %bb19808.i, %bb5272.i
+	br label %bb16607.i
+bb5295.i:		; preds = %bb5295.preheader.i, %storeVecColor_RGB_UI.exit
+	br label %loadVecColor_BGRA_UI8888R.exit
+loadVecColor_BGRA_UI8888R.exit:		; preds = %bb5295.i
+	br i1 false, label %bb5325.i, label %bb5351.i
+bb5325.i:		; preds = %loadVecColor_BGRA_UI8888R.exit
+	br i1 false, label %bb4527.i, label %bb.i
+bb.i:		; preds = %bb5325.i
+	switch i32 0, label %bb4527.i [
+		 i32 4, label %bb4362.i
+		 i32 8, label %bb4448.i
+	]
+bb4362.i:		; preds = %bb.i
+	br i1 false, label %bb4532.i, label %bb5556.i
+bb4448.i:		; preds = %bb.i
+	br label %bb4527.i
+bb4527.i:		; preds = %bb4448.i, %bb.i, %bb5325.i
+	br i1 false, label %bb4532.i, label %bb5556.i
+bb4532.i:		; preds = %bb4527.i, %bb4362.i
+	switch i32 0, label %bb4997.i [
+		 i32 6, label %bb4534.i
+		 i32 7, label %bb4982.i
+	]
+bb4534.i:		; preds = %bb4532.i
+	br i1 false, label %bb4875.i, label %bb4619.i
+bb4619.i:		; preds = %bb4534.i
+	br i1 false, label %bb4875.i, label %bb4663.i
+bb4663.i:		; preds = %bb4619.i
+	br label %bb4855.i
+bb4759.i:		; preds = %bb4855.i
+	br label %bb4855.i
+bb4855.i:		; preds = %bb4759.i, %bb4663.i
+	br i1 false, label %bb4866.i, label %bb4759.i
+bb4866.i:		; preds = %bb4855.i
+	br label %bb4875.i
+bb4875.i:		; preds = %bb4866.i, %bb4619.i, %bb4534.i
+	br i1 false, label %bb4973.i, label %bb4922.i
+bb4922.i:		; preds = %bb4875.i
+	br label %bb4973.i
+bb4973.i:		; preds = %bb4922.i, %bb4875.i
+	br label %bb4982.i
+bb4982.i:		; preds = %bb4973.i, %bb4532.i
+	br label %bb5041.i
+bb4997.i:		; preds = %bb4532.i
+	br label %bb5041.i
+bb5041.i:		; preds = %bb4997.i, %bb4982.i
+	switch i32 0, label %bb5464.i [
+		 i32 0, label %bb5344.i
+		 i32 1, label %bb5374.i
+		 i32 2, label %bb5404.i
+		 i32 3, label %bb5434.i
+		 i32 11, label %bb5263.i
+	]
+bb5263.i:		; preds = %bb5041.i
+	br i1 false, label %bb12038.i, label %bb5467.i
+bb5344.i:		; preds = %bb5041.i
+	br i1 false, label %bb12038.i, label %bb5467.i
+bb5374.i:		; preds = %bb5041.i
+	br i1 false, label %bb12038.i, label %bb5467.i
+bb5404.i:		; preds = %bb5041.i
+	br i1 false, label %bb12038.i, label %bb5467.i
+bb5434.i:		; preds = %bb5041.i
+	br label %bb5464.i
+bb5464.i:		; preds = %bb5434.i, %bb5041.i
+	br i1 false, label %bb12038.i, label %bb5467.i
+bb5467.i:		; preds = %bb5464.i, %bb5404.i, %bb5374.i, %bb5344.i, %bb5263.i
+	switch i32 0, label %bb15866.i [
+		 i32 3, label %bb13016.i
+		 i32 4, label %bb12040.i
+		 i32 8, label %bb12514.i
+		 i32 10, label %bb12903.i
+		 i32 11, label %bb12553.i
+		 i32 16, label %bb12514.i
+	]
+bb5556.i:		; preds = %bb4527.i, %bb4362.i
+	switch i32 0, label %bb8990.i [
+		 i32 3, label %bb6403.i
+		 i32 4, label %bb6924.i
+		 i32 8, label %bb6924.i
+		 i32 10, label %bb6403.i
+		 i32 11, label %bb5882.i
+		 i32 16, label %bb5558.i
+	]
+bb5558.i:		; preds = %bb5556.i
+	br label %bb8990.i
+bb5882.i:		; preds = %bb5556.i
+	switch i32 0, label %bb6387.i [
+		 i32 1, label %bb6332.i
+		 i32 3, label %bb6332.i
+		 i32 4, label %bb6352.i
+		 i32 6, label %bb5884.i
+		 i32 7, label %bb8990.i
+	]
+bb5884.i:		; preds = %bb5882.i
+	br i1 false, label %bb6225.i, label %bb5969.i
+bb5969.i:		; preds = %bb5884.i
+	br i1 false, label %bb6225.i, label %bb6013.i
+bb6013.i:		; preds = %bb5969.i
+	br label %bb6205.i
+bb6109.i:		; preds = %bb6205.i
+	br label %bb6205.i
+bb6205.i:		; preds = %bb6109.i, %bb6013.i
+	br i1 false, label %bb6216.i, label %bb6109.i
+bb6216.i:		; preds = %bb6205.i
+	br label %bb6225.i
+bb6225.i:		; preds = %bb6216.i, %bb5969.i, %bb5884.i
+	br i1 false, label %bb6323.i, label %bb6272.i
+bb6272.i:		; preds = %bb6225.i
+	switch i32 0, label %bb6908.i [
+		 i32 1, label %bb6853.i48
+		 i32 3, label %bb6853.i48
+		 i32 4, label %bb6873.i
+		 i32 6, label %bb6405.i
+		 i32 7, label %bb8990.i
+	]
+bb6323.i:		; preds = %bb6225.i
+	switch i32 0, label %bb6908.i [
+		 i32 1, label %bb6853.i48
+		 i32 3, label %bb6853.i48
+		 i32 4, label %bb6873.i
+		 i32 6, label %bb6405.i
+		 i32 7, label %bb8990.i
+	]
+bb6332.i:		; preds = %bb5882.i, %bb5882.i
+	switch i32 0, label %bb6908.i [
+		 i32 1, label %bb6853.i48
+		 i32 3, label %bb6853.i48
+		 i32 4, label %bb6873.i
+		 i32 6, label %bb6405.i
+		 i32 7, label %bb8990.i
+	]
+bb6352.i:		; preds = %bb5882.i
+	br label %bb6873.i
+bb6387.i:		; preds = %bb5882.i
+	br label %bb6403.i
+bb6403.i:		; preds = %bb6387.i, %bb5556.i, %bb5556.i
+	switch i32 0, label %bb6908.i [
+		 i32 1, label %bb6853.i48
+		 i32 3, label %bb6853.i48
+		 i32 4, label %bb6873.i
+		 i32 6, label %bb6405.i
+		 i32 7, label %bb8990.i
+	]
+bb6405.i:		; preds = %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i
+	br i1 false, label %bb6746.i, label %bb6490.i
+bb6490.i:		; preds = %bb6405.i
+	br i1 false, label %bb6746.i, label %bb6534.i
+bb6534.i:		; preds = %bb6490.i
+	br label %bb6726.i
+bb6630.i:		; preds = %bb6726.i
+	br label %bb6726.i
+bb6726.i:		; preds = %bb6630.i, %bb6534.i
+	br i1 false, label %bb6737.i, label %bb6630.i
+bb6737.i:		; preds = %bb6726.i
+	br label %bb6746.i
+bb6746.i:		; preds = %bb6737.i, %bb6490.i, %bb6405.i
+	br i1 false, label %bb6844.i, label %bb6793.i
+bb6793.i:		; preds = %bb6746.i
+	br label %bb8990.i
+bb6844.i:		; preds = %bb6746.i
+	br label %bb8990.i
+bb6853.i48:		; preds = %bb6403.i, %bb6403.i, %bb6332.i, %bb6332.i, %bb6323.i, %bb6323.i, %bb6272.i, %bb6272.i
+	br label %bb8990.i
+bb6873.i:		; preds = %bb6403.i, %bb6352.i, %bb6332.i, %bb6323.i, %bb6272.i
+	br label %bb8990.i
+bb6908.i:		; preds = %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i
+	br label %bb8990.i
+bb6924.i:		; preds = %bb5556.i, %bb5556.i
+	switch i32 0, label %bb8929.i [
+		 i32 1, label %bb8715.i
+		 i32 3, label %bb8715.i
+		 i32 4, label %bb8792.i
+		 i32 6, label %bb6926.i
+		 i32 7, label %bb8990.i
+	]
+bb6926.i:		; preds = %bb6924.i
+	br i1 false, label %bb7267.i, label %bb7011.i
+bb7011.i:		; preds = %bb6926.i
+	br i1 false, label %bb7267.i, label %bb7055.i
+bb7055.i:		; preds = %bb7011.i
+	br label %bb7247.i
+bb7151.i:		; preds = %bb7247.i
+	br label %bb7247.i
+bb7247.i:		; preds = %bb7151.i, %bb7055.i
+	br i1 false, label %bb7258.i, label %bb7151.i
+bb7258.i:		; preds = %bb7247.i
+	br label %bb7267.i
+bb7267.i:		; preds = %bb7258.i, %bb7011.i, %bb6926.i
+	br i1 false, label %bb7365.i, label %bb7314.i
+bb7314.i:		; preds = %bb7267.i
+	br label %bb7365.i
+bb7365.i:		; preds = %bb7314.i, %bb7267.i
+	br i1 false, label %bb7714.i, label %bb7458.i
+bb7458.i:		; preds = %bb7365.i
+	br i1 false, label %bb7714.i, label %bb7502.i
+bb7502.i:		; preds = %bb7458.i
+	br label %bb7694.i
+bb7598.i:		; preds = %bb7694.i
+	br label %bb7694.i
+bb7694.i:		; preds = %bb7598.i, %bb7502.i
+	br i1 false, label %bb7705.i, label %bb7598.i
+bb7705.i:		; preds = %bb7694.i
+	br label %bb7714.i
+bb7714.i:		; preds = %bb7705.i, %bb7458.i, %bb7365.i
+	br i1 false, label %bb7812.i, label %bb7761.i
+bb7761.i:		; preds = %bb7714.i
+	br label %bb7812.i
+bb7812.i:		; preds = %bb7761.i, %bb7714.i
+	br i1 false, label %bb8161.i, label %bb7905.i
+bb7905.i:		; preds = %bb7812.i
+	br i1 false, label %bb8161.i, label %bb7949.i
+bb7949.i:		; preds = %bb7905.i
+	br label %bb8141.i
+bb8045.i:		; preds = %bb8141.i
+	br label %bb8141.i
+bb8141.i:		; preds = %bb8045.i, %bb7949.i
+	br i1 false, label %bb8152.i, label %bb8045.i
+bb8152.i:		; preds = %bb8141.i
+	br label %bb8161.i
+bb8161.i:		; preds = %bb8152.i, %bb7905.i, %bb7812.i
+	br i1 false, label %bb8259.i, label %bb8208.i
+bb8208.i:		; preds = %bb8161.i
+	br label %bb8259.i
+bb8259.i:		; preds = %bb8208.i, %bb8161.i
+	br i1 false, label %bb8608.i, label %bb8352.i
+bb8352.i:		; preds = %bb8259.i
+	br i1 false, label %bb8608.i, label %bb8396.i
+bb8396.i:		; preds = %bb8352.i
+	br label %bb8588.i63
+bb8492.i:		; preds = %bb8588.i63
+	br label %bb8588.i63
+bb8588.i63:		; preds = %bb8492.i, %bb8396.i
+	br i1 false, label %bb8599.i, label %bb8492.i
+bb8599.i:		; preds = %bb8588.i63
+	br label %bb8608.i
+bb8608.i:		; preds = %bb8599.i, %bb8352.i, %bb8259.i
+	br i1 false, label %bb8706.i, label %bb8655.i
+bb8655.i:		; preds = %bb8608.i
+	br label %bb8990.i
+bb8706.i:		; preds = %bb8608.i
+	br label %bb8990.i
+bb8715.i:		; preds = %bb6924.i, %bb6924.i
+	br label %bb8990.i
+bb8792.i:		; preds = %bb6924.i
+	br label %bb8990.i
+bb8929.i:		; preds = %bb6924.i
+	br label %bb8990.i
+bb8990.i:		; preds = %bb8929.i, %bb8792.i, %bb8715.i, %bb8706.i, %bb8655.i, %bb6924.i, %bb6908.i, %bb6873.i, %bb6853.i48, %bb6844.i, %bb6793.i, %bb6403.i, %bb6332.i, %bb6323.i, %bb6272.i, %bb5882.i, %bb5558.i, %bb5556.i
+	switch i32 %sf4083.0.i, label %bb11184.i [
+		 i32 0, label %bb10372.i
+		 i32 1, label %bb10609.i
+		 i32 2, label %bb10811.i
+		 i32 3, label %bb11013.i
+		 i32 4, label %bb8992.i
+		 i32 5, label %bb8992.i
+		 i32 6, label %bb8992.i
+		 i32 7, label %bb8992.i
+		 i32 8, label %bb9195.i
+		 i32 9, label %bb9195.i
+		 i32 10, label %bb9965.i
+		 i32 11, label %bb9585.i
+		 i32 16, label %bb9195.i
+	]
+bb8992.i:		; preds = %bb8990.i, %bb8990.i, %bb8990.i, %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb9075.i
+		 i32 1, label %bb9105.i
+		 i32 2, label %bb9135.i
+		 i32 3, label %bb9165.i
+		 i32 11, label %bb8994.i
+	]
+bb8994.i:		; preds = %bb8992.i
+	br label %bb11247.i
+bb9075.i:		; preds = %bb8992.i
+	br label %bb11247.i
+bb9105.i:		; preds = %bb8992.i
+	br label %bb11247.i
+bb9135.i:		; preds = %bb8992.i
+	br label %bb11247.i
+bb9165.i:		; preds = %bb8992.i
+	br label %bb11247.i
+bb9195.i:		; preds = %bb8990.i, %bb8990.i, %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb9491.i
+		 i32 1, label %bb9521.i
+		 i32 2, label %bb9551.i
+		 i32 3, label %bb9581.i
+		 i32 4, label %bb9197.i
+		 i32 11, label %bb9342.i
+	]
+bb9197.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9342.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9491.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9521.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9551.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9581.i:		; preds = %bb9195.i
+	br label %bb11247.i
+bb9585.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb9879.i
+		 i32 1, label %bb9920.i
+		 i32 2, label %bb9920.i
+		 i32 3, label %bb9924.i
+		 i32 4, label %bb9587.i
+		 i32 8, label %bb9587.i
+	]
+bb9587.i:		; preds = %bb9585.i, %bb9585.i
+	br label %bb11247.i
+bb9879.i:		; preds = %bb9585.i
+	br label %bb11247.i
+bb9920.i:		; preds = %bb9585.i, %bb9585.i
+	br label %bb11247.i
+bb9924.i:		; preds = %bb9585.i
+	br label %bb11247.i
+bb9965.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 1, label %bb10368.i
+		 i32 2, label %bb10368.i
+		 i32 3, label %bb10364.i
+		 i32 4, label %bb9967.i
+		 i32 8, label %bb10127.i
+		 i32 11, label %bb10287.i
+	]
+bb9967.i:		; preds = %bb9965.i
+	br label %bb11247.i
+bb10127.i:		; preds = %bb9965.i
+	br label %bb11247.i
+bb10287.i:		; preds = %bb9965.i
+	br label %bb11247.i
+bb10364.i:		; preds = %bb9965.i
+	br label %bb11247.i
+bb10368.i:		; preds = %bb9965.i, %bb9965.i
+	br label %bb11247.i
+bb10372.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 1, label %bb10605.i
+		 i32 2, label %bb10605.i
+		 i32 3, label %bb10601.i
+		 i32 4, label %bb10374.i
+		 i32 8, label %bb10449.i
+		 i32 11, label %bb10524.i
+	]
+bb10374.i:		; preds = %bb10372.i
+	br label %bb11247.i
+bb10449.i:		; preds = %bb10372.i
+	br label %bb11247.i
+bb10524.i:		; preds = %bb10372.i
+	br label %bb11247.i
+bb10601.i:		; preds = %bb10372.i
+	br label %bb11247.i
+bb10605.i:		; preds = %bb10372.i, %bb10372.i
+	br label %bb11247.i
+bb10609.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb10807.i
+		 i32 2, label %bb10807.i
+		 i32 3, label %bb10803.i
+		 i32 4, label %bb10611.i
+		 i32 8, label %bb10686.i
+		 i32 11, label %bb10761.i
+	]
+bb10611.i:		; preds = %bb10609.i
+	br label %bb11247.i
+bb10686.i:		; preds = %bb10609.i
+	br label %bb11247.i
+bb10761.i:		; preds = %bb10609.i
+	br label %bb11247.i
+bb10803.i:		; preds = %bb10609.i
+	br label %bb11247.i
+bb10807.i:		; preds = %bb10609.i, %bb10609.i
+	br label %bb11247.i
+bb10811.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb11009.i
+		 i32 1, label %bb11009.i
+		 i32 3, label %bb11005.i
+		 i32 4, label %bb10813.i
+		 i32 8, label %bb10888.i
+		 i32 11, label %bb10963.i
+	]
+bb10813.i:		; preds = %bb10811.i
+	br label %bb11247.i
+bb10888.i:		; preds = %bb10811.i
+	br label %bb11247.i
+bb10963.i:		; preds = %bb10811.i
+	br label %bb11247.i
+bb11005.i:		; preds = %bb10811.i
+	br label %bb11247.i
+bb11009.i:		; preds = %bb10811.i, %bb10811.i
+	br label %bb11247.i
+bb11013.i:		; preds = %bb8990.i
+	switch i32 0, label %bb11184.i [
+		 i32 0, label %bb11180.i
+		 i32 1, label %bb11180.i
+		 i32 2, label %bb11180.i
+		 i32 4, label %bb11015.i
+		 i32 8, label %bb11090.i
+		 i32 11, label %bb11103.i
+	]
+bb11015.i:		; preds = %bb11013.i
+	br label %bb11247.i
+bb11090.i:		; preds = %bb11013.i
+	br label %bb11247.i
+bb11103.i:		; preds = %bb11013.i
+	br label %bb11247.i
+bb11180.i:		; preds = %bb11013.i, %bb11013.i, %bb11013.i
+	br label %bb11184.i
+bb11184.i:		; preds = %bb11180.i, %bb11013.i, %bb10811.i, %bb10609.i, %bb10372.i, %bb9965.i, %bb9585.i, %bb9195.i, %bb8992.i, %bb8990.i
+	br label %bb11247.i
+bb11247.i:		; preds = %bb11184.i, %bb11103.i, %bb11090.i, %bb11015.i, %bb11009.i, %bb11005.i, %bb10963.i, %bb10888.i, %bb10813.i, %bb10807.i, %bb10803.i, %bb10761.i, %bb10686.i, %bb10611.i, %bb10605.i, %bb10601.i, %bb10524.i, %bb10449.i, %bb10374.i, %bb10368.i, %bb10364.i, %bb10287.i, %bb10127.i, %bb9967.i, %bb9924.i, %bb9920.i, %bb9879.i, %bb9587.i, %bb9581.i, %bb9551.i, %bb9521.i, %bb9491.i, %bb9342.i, %bb9197.i, %bb9165.i, %bb9135.i, %bb9105.i, %bb9075.i, %bb8994.i
+	br i1 false, label %bb11250.i, label %bb11256.i
+bb11250.i:		; preds = %bb11247.i
+	br label %bb11378.i
+bb11256.i:		; preds = %bb11247.i
+	switch i32 0, label %bb11348.i [
+		 i32 4, label %bb11258.i
+		 i32 8, label %bb11258.i
+		 i32 11, label %bb11318.i
+	]
+bb11258.i:		; preds = %bb11256.i, %bb11256.i
+	br i1 false, label %bb11273.i, label %bb11261.i
+bb11261.i:		; preds = %bb11258.i
+	br label %bb11273.i
+bb11273.i:		; preds = %bb11261.i, %bb11258.i
+	br i1 false, label %bb11288.i, label %bb11276.i
+bb11276.i:		; preds = %bb11273.i
+	br label %bb11288.i
+bb11288.i:		; preds = %bb11276.i, %bb11273.i
+	br i1 false, label %bb11303.i, label %bb11291.i
+bb11291.i:		; preds = %bb11288.i
+	br label %bb11303.i
+bb11303.i:		; preds = %bb11291.i, %bb11288.i
+	br i1 false, label %bb11318.i, label %bb11306.i
+bb11306.i:		; preds = %bb11303.i
+	br label %bb11318.i
+bb11318.i:		; preds = %bb11306.i, %bb11303.i, %bb11256.i
+	br i1 false, label %bb11333.i, label %bb11321.i
+bb11321.i:		; preds = %bb11318.i
+	br label %bb11333.i
+bb11333.i:		; preds = %bb11321.i, %bb11318.i
+	br i1 false, label %bb11348.i, label %bb11336.i
+bb11336.i:		; preds = %bb11333.i
+	br label %bb11348.i
+bb11348.i:		; preds = %bb11336.i, %bb11333.i, %bb11256.i
+	br i1 false, label %bb11363.i, label %bb11351.i
+bb11351.i:		; preds = %bb11348.i
+	br label %bb11363.i
+bb11363.i:		; preds = %bb11351.i, %bb11348.i
+	br i1 false, label %bb11378.i, label %bb11366.i
+bb11366.i:		; preds = %bb11363.i
+	br label %bb11378.i
+bb11378.i:		; preds = %bb11366.i, %bb11363.i, %bb11250.i
+	br label %bb12038.i
+bb12038.i:		; preds = %bb11378.i, %bb5464.i, %bb5404.i, %bb5374.i, %bb5344.i, %bb5263.i
+	switch i32 0, label %bb15866.i [
+		 i32 3, label %bb13016.i
+		 i32 4, label %bb12040.i
+		 i32 8, label %bb12514.i
+		 i32 10, label %bb12903.i
+		 i32 11, label %bb12553.i
+		 i32 16, label %bb12514.i
+	]
+bb12040.i:		; preds = %bb12038.i, %bb5467.i
+	br label %bb13026.i
+bb12514.i:		; preds = %bb12038.i, %bb12038.i, %bb5467.i, %bb5467.i
+	br label %bb13026.i
+bb12553.i:		; preds = %bb12038.i, %bb5467.i
+	br i1 false, label %bb12558.i, label %bb12747.i
+bb12558.i:		; preds = %bb12553.i
+	br i1 false, label %bb12666.i, label %bb12654.i
+bb12654.i:		; preds = %bb12558.i
+	br label %bb12666.i
+bb12666.i:		; preds = %bb12654.i, %bb12558.i
+	br label %bb12747.i
+bb12747.i:		; preds = %bb12666.i, %bb12553.i
+	br label %bb13026.i
+bb12903.i:		; preds = %bb12038.i, %bb5467.i
+	br i1 false, label %bb12908.i, label %bb13026.i
+bb12908.i:		; preds = %bb12903.i
+	br i1 false, label %bb13026.i, label %bb13004.i
+bb13004.i:		; preds = %bb12908.i
+	switch i32 0, label %bb15866.i [
+		 i32 3, label %bb13752.i
+		 i32 4, label %bb14197.i
+		 i32 8, label %bb14197.i
+		 i32 10, label %bb13752.i
+		 i32 11, label %bb13307.i
+		 i32 16, label %bb13028.i
+	]
+bb13016.i:		; preds = %bb12038.i, %bb5467.i
+	br label %bb13026.i
+bb13026.i:		; preds = %bb13016.i, %bb12908.i, %bb12903.i, %bb12747.i, %bb12514.i, %bb12040.i
+	switch i32 0, label %bb15866.i [
+		 i32 3, label %bb13752.i
+		 i32 4, label %bb14197.i
+		 i32 8, label %bb14197.i
+		 i32 10, label %bb13752.i
+		 i32 11, label %bb13307.i
+		 i32 16, label %bb13028.i
+	]
+bb13028.i:		; preds = %bb13026.i, %bb13004.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb13307.i:		; preds = %bb13026.i, %bb13004.i
+	switch i32 %dt4080.0.i, label %bb13736.i [
+		 i32 6, label %bb13312.i
+		 i32 1, label %bb13624.i
+		 i32 3, label %bb13624.i
+		 i32 5, label %bb13649.i
+		 i32 4, label %bb13688.i
+		 i32 7, label %bb15866.i
+	]
+bb13312.i:		; preds = %bb13307.i
+	br i1 false, label %bb13483.i, label %bb13400.i
+bb13400.i:		; preds = %bb13312.i
+	br label %bb13483.i
+bb13483.i:		; preds = %bb13400.i, %bb13312.i
+	br i1 false, label %bb13593.i, label %bb13505.i
+bb13505.i:		; preds = %bb13483.i
+	switch i32 %dt4080.0.i, label %bb14181.i [
+		 i32 6, label %bb13757.i
+		 i32 1, label %bb14069.i
+		 i32 3, label %bb14069.i
+		 i32 5, label %bb14094.i
+		 i32 4, label %bb14133.i
+		 i32 7, label %bb15866.i
+	]
+bb13593.i:		; preds = %bb13483.i
+	switch i32 %dt4080.0.i, label %bb14181.i [
+		 i32 6, label %bb13757.i
+		 i32 1, label %bb14069.i
+		 i32 3, label %bb14069.i
+		 i32 5, label %bb14094.i
+		 i32 4, label %bb14133.i
+		 i32 7, label %bb15866.i
+	]
+bb13624.i:		; preds = %bb13307.i, %bb13307.i
+	switch i32 %dt4080.0.i, label %bb14181.i [
+		 i32 6, label %bb13757.i
+		 i32 1, label %bb14069.i
+		 i32 3, label %bb14069.i
+		 i32 5, label %bb14094.i
+		 i32 4, label %bb14133.i
+		 i32 7, label %bb15866.i
+	]
+bb13649.i:		; preds = %bb13307.i
+	br label %bb14094.i
+bb13688.i:		; preds = %bb13307.i
+	br label %bb14133.i
+bb13736.i:		; preds = %bb13307.i
+	br label %bb13752.i
+bb13752.i:		; preds = %bb13736.i, %bb13026.i, %bb13026.i, %bb13004.i, %bb13004.i
+	switch i32 %dt4080.0.i, label %bb14181.i [
+		 i32 6, label %bb13757.i
+		 i32 1, label %bb14069.i
+		 i32 3, label %bb14069.i
+		 i32 5, label %bb14094.i
+		 i32 4, label %bb14133.i
+		 i32 7, label %bb15866.i
+	]
+bb13757.i:		; preds = %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i
+	br i1 false, label %bb13928.i, label %bb13845.i
+bb13845.i:		; preds = %bb13757.i
+	br label %bb13928.i
+bb13928.i:		; preds = %bb13845.i, %bb13757.i
+	br i1 false, label %bb14038.i, label %bb13950.i
+bb13950.i:		; preds = %bb13928.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14038.i:		; preds = %bb13928.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14069.i:		; preds = %bb13752.i, %bb13752.i, %bb13624.i, %bb13624.i, %bb13593.i, %bb13593.i, %bb13505.i, %bb13505.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14094.i:		; preds = %bb13752.i, %bb13649.i, %bb13624.i, %bb13593.i, %bb13505.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14133.i:		; preds = %bb13752.i, %bb13688.i, %bb13624.i, %bb13593.i, %bb13505.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14181.i:		; preds = %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb14197.i:		; preds = %bb13026.i, %bb13026.i, %bb13004.i, %bb13004.i
+	switch i32 %dt4080.0.i, label %bb15805.i [
+		 i32 6, label %bb14202.i
+		 i32 1, label %bb15411.i
+		 i32 3, label %bb15411.i
+		 i32 5, label %bb15493.i
+		 i32 4, label %bb15631.i
+		 i32 7, label %bb15866.i
+	]
+bb14202.i:		; preds = %bb14197.i
+	br i1 false, label %bb14373.i, label %bb14290.i
+bb14290.i:		; preds = %bb14202.i
+	br label %bb14373.i
+bb14373.i:		; preds = %bb14290.i, %bb14202.i
+	br i1 false, label %bb14483.i, label %bb14395.i
+bb14395.i:		; preds = %bb14373.i
+	br label %bb14483.i
+bb14483.i:		; preds = %bb14395.i, %bb14373.i
+	br i1 false, label %bb14672.i, label %bb14589.i
+bb14589.i:		; preds = %bb14483.i
+	br label %bb14672.i
+bb14672.i:		; preds = %bb14589.i, %bb14483.i
+	br i1 false, label %bb14782.i, label %bb14694.i
+bb14694.i:		; preds = %bb14672.i
+	br label %bb14782.i
+bb14782.i:		; preds = %bb14694.i, %bb14672.i
+	br i1 false, label %bb14971.i, label %bb14888.i
+bb14888.i:		; preds = %bb14782.i
+	br label %bb14971.i
+bb14971.i:		; preds = %bb14888.i, %bb14782.i
+	br i1 false, label %bb15081.i, label %bb14993.i
+bb14993.i:		; preds = %bb14971.i
+	br label %bb15081.i
+bb15081.i:		; preds = %bb14993.i, %bb14971.i
+	br i1 false, label %bb15270.i, label %bb15187.i
+bb15187.i:		; preds = %bb15081.i
+	br label %bb15270.i
+bb15270.i:		; preds = %bb15187.i, %bb15081.i
+	br i1 false, label %bb15380.i, label %bb15292.i
+bb15292.i:		; preds = %bb15270.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15380.i:		; preds = %bb15270.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15411.i:		; preds = %bb14197.i, %bb14197.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15493.i:		; preds = %bb14197.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15631.i:		; preds = %bb14197.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15805.i:		; preds = %bb14197.i
+	br label %bb15866.i
+bb15866.i:		; preds = %bb15805.i, %bb14197.i, %bb13752.i, %bb13624.i, %bb13593.i, %bb13505.i, %bb13307.i, %bb13026.i, %bb13004.i, %bb12038.i, %bb5467.i
+	br i1 false, label %UnifiedReturnBlock.i177, label %bb15869.i
+bb15869.i:		; preds = %bb15866.i, %bb15631.i, %bb15493.i, %bb15411.i, %bb15380.i, %bb15292.i, %bb14181.i, %bb14133.i, %bb14094.i, %bb14069.i, %bb14038.i, %bb13950.i, %bb13028.i
+	switch i32 0, label %UnifiedReturnBlock.i177 [
+		 i32 4, label %bb15874.i
+		 i32 8, label %bb15960.i
+	]
+bb15874.i:		; preds = %bb15869.i
+	br label %glgVectorFloatConversion.exit
+bb15960.i:		; preds = %bb15869.i
+	br label %glgVectorFloatConversion.exit
+UnifiedReturnBlock.i177:		; preds = %bb15869.i, %bb15866.i, %bb15631.i, %bb15493.i, %bb15411.i, %bb15380.i, %bb15292.i, %bb14181.i, %bb14133.i, %bb14094.i, %bb14069.i, %bb14038.i, %bb13950.i, %bb13028.i
+	br label %glgVectorFloatConversion.exit
+glgVectorFloatConversion.exit:		; preds = %UnifiedReturnBlock.i177, %bb15960.i, %bb15874.i
+	br label %bb16581.i
+bb5351.i:		; preds = %loadVecColor_BGRA_UI8888R.exit
+	br i1 false, label %bb5359.i, label %bb5586.i
+bb5359.i:		; preds = %bb5351.i
+	switch i32 0, label %bb5586.i [
+		 i32 0, label %bb5361.i
+		 i32 1, label %bb5511.i
+		 i32 2, label %bb5511.i
+	]
+bb5361.i:		; preds = %bb5359.i
+	br i1 false, label %bb5366.i, label %bb5379.i
+bb5366.i:		; preds = %bb5361.i
+	br label %bb7230.i
+bb5379.i:		; preds = %bb5361.i
+	switch i32 %sf4083.0.i, label %bb5415.i [
+		 i32 1, label %bb5384.i
+		 i32 2, label %bb5402.i
+	]
+bb5384.i:		; preds = %bb5379.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5445.i
+		 i32 8, label %bb5445.i
+		 i32 11, label %bb5445.i
+	]
+bb5402.i:		; preds = %bb5379.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5445.i
+		 i32 8, label %bb5445.i
+		 i32 11, label %bb5445.i
+	]
+bb5415.i:		; preds = %bb5379.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5445.i
+		 i32 8, label %bb5445.i
+		 i32 11, label %bb5445.i
+	]
+bb5445.i:		; preds = %bb5415.i, %bb5415.i, %bb5415.i, %bb5402.i, %bb5402.i, %bb5402.i, %bb5384.i, %bb5384.i, %bb5384.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5470.i
+		 i32 8, label %bb5470.i
+		 i32 11, label %bb6853.i
+	]
+bb5470.i:		; preds = %bb5445.i, %bb5445.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5498.i
+		 i32 8, label %bb5493.i
+		 i32 11, label %bb6853.i
+	]
+bb5493.i:		; preds = %bb5470.i
+	br i1 false, label %bb5498.i, label %bb5586.i
+bb5498.i:		; preds = %bb5493.i, %bb5470.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5591.i
+		 i32 8, label %bb6153.i
+		 i32 11, label %bb6853.i
+	]
+bb5511.i:		; preds = %bb5359.i, %bb5359.i
+	br i1 false, label %bb5568.i, label %bb5586.i
+bb5568.i:		; preds = %bb5511.i
+	br label %bb5586.i
+bb5586.i:		; preds = %bb5568.i, %bb5511.i, %bb5493.i, %bb5359.i, %bb5351.i
+	switch i32 0, label %bb7230.i [
+		 i32 4, label %bb5591.i
+		 i32 8, label %bb6153.i
+		 i32 11, label %bb6853.i
+	]
+bb5591.i:		; preds = %bb5586.i, %bb5498.i
+	switch i32 0, label %bb5995.i [
+		 i32 4, label %bb5596.i
+		 i32 8, label %bb5680.i
+		 i32 11, label %bb5842.i
+	]
+bb5596.i:		; preds = %bb5591.i
+	br i1 false, label %bb8428.i, label %bb5602.i
+bb5602.i:		; preds = %bb5596.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb5680.i:		; preds = %bb5591.i
+	br i1 false, label %bb5692.i, label %bb5764.i
+bb5692.i:		; preds = %bb5680.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb5764.i:		; preds = %bb5680.i
+	br i1 false, label %bb8428.i, label %bb5772.i
+bb5772.i:		; preds = %bb5764.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb5842.i:		; preds = %bb5591.i
+	br i1 false, label %bb5920.i, label %bb5845.i
+bb5845.i:		; preds = %bb5842.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb5920.i:		; preds = %bb5842.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb5995.i:		; preds = %bb5591.i
+	switch i32 %df4081.0.i, label %bb8428.i [
+		 i32 0, label %bb6007.i
+		 i32 10, label %bb6007.i
+		 i32 1, label %bb6042.i
+		 i32 2, label %bb6079.i
+		 i32 3, label %bb6116.i
+	]
+bb6007.i:		; preds = %bb5995.i, %bb5995.i
+	br i1 false, label %bb6012.i, label %bb8428.i
+bb6012.i:		; preds = %bb6007.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6042.i:		; preds = %bb5995.i
+	br i1 false, label %bb6049.i, label %bb6045.i
+bb6045.i:		; preds = %bb6042.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6049.i:		; preds = %bb6042.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6079.i:		; preds = %bb5995.i
+	br i1 false, label %bb6086.i, label %bb6082.i
+bb6082.i:		; preds = %bb6079.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6086.i:		; preds = %bb6079.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6116.i:		; preds = %bb5995.i
+	br i1 false, label %bb6123.i, label %bb6119.i
+bb6119.i:		; preds = %bb6116.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6123.i:		; preds = %bb6116.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6153.i:		; preds = %bb5586.i, %bb5498.i
+	switch i32 0, label %bb6724.i [
+		 i32 4, label %bb6158.i
+		 i32 8, label %bb6459.i
+		 i32 11, label %bb6621.i
+	]
+bb6158.i:		; preds = %bb6153.i
+	br i1 false, label %bb6242.i, label %bb6161.i
+bb6161.i:		; preds = %bb6158.i
+	br i1 false, label %bb6239.i, label %bb6166.i
+bb6166.i:		; preds = %bb6161.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6239.i:		; preds = %bb6161.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6242.i:		; preds = %bb6158.i
+	br i1 false, label %bb6245.i, label %bb6317.i
+bb6245.i:		; preds = %bb6242.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6317.i:		; preds = %bb6242.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6459.i:		; preds = %bb6153.i
+	br i1 false, label %bb6471.i, label %bb6543.i
+bb6471.i:		; preds = %bb6459.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6543.i:		; preds = %bb6459.i
+	br i1 false, label %bb8428.i, label %bb6551.i
+bb6551.i:		; preds = %bb6543.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6621.i:		; preds = %bb6153.i
+	br i1 false, label %bb6626.i, label %bb6651.i
+bb6626.i:		; preds = %bb6621.i
+	br label %bb6651.i
+bb6651.i:		; preds = %bb6626.i, %bb6621.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6724.i:		; preds = %bb6153.i
+	switch i32 %df4081.0.i, label %bb8428.i [
+		 i32 0, label %bb6736.i
+		 i32 10, label %bb6736.i
+		 i32 1, label %bb6771.i
+		 i32 2, label %bb6808.i
+		 i32 3, label %bb6845.i
+	]
+bb6736.i:		; preds = %bb6724.i, %bb6724.i
+	br i1 false, label %bb6741.i, label %bb8428.i
+bb6741.i:		; preds = %bb6736.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6771.i:		; preds = %bb6724.i
+	br i1 false, label %bb6778.i, label %bb6774.i
+bb6774.i:		; preds = %bb6771.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6778.i:		; preds = %bb6771.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6808.i:		; preds = %bb6724.i
+	br i1 false, label %bb6815.i, label %bb6811.i
+bb6811.i:		; preds = %bb6808.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6815.i:		; preds = %bb6808.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6845.i:		; preds = %bb6724.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6853.i:		; preds = %bb5586.i, %bb5498.i, %bb5470.i, %bb5445.i
+	switch i32 0, label %bb8428.i [
+		 i32 4, label %bb6858.i
+		 i32 8, label %bb7072.i
+		 i32 10, label %bb7149.i
+		 i32 3, label %bb7192.i
+	]
+bb6858.i:		; preds = %bb6853.i
+	br i1 false, label %bb6942.i, label %bb6861.i
+bb6861.i:		; preds = %bb6858.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb6942.i:		; preds = %bb6858.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7072.i:		; preds = %bb6853.i
+	br i1 false, label %bb7119.i, label %bb7075.i
+bb7075.i:		; preds = %bb7072.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7119.i:		; preds = %bb7072.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7149.i:		; preds = %bb6853.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7192.i:		; preds = %bb6853.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7230.i:		; preds = %bb5586.i, %bb5498.i, %bb5470.i, %bb5445.i, %bb5415.i, %bb5402.i, %bb5384.i, %bb5366.i
+	switch i32 %sf4083.0.i, label %bb8428.i [
+		 i32 10, label %bb7235.i
+		 i32 0, label %bb7455.i
+		 i32 1, label %bb7725.i
+		 i32 2, label %bb7978.i
+		 i32 3, label %bb8231.i
+	]
+bb7235.i:		; preds = %bb7230.i
+	switch i32 0, label %bb7442.i [
+		 i32 4, label %bb7240.i
+		 i32 8, label %bb7329.i
+		 i32 11, label %bb7369.i
+	]
+bb7240.i:		; preds = %bb7235.i
+	br i1 false, label %bb7252.i, label %bb7243.i
+bb7243.i:		; preds = %bb7240.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7252.i:		; preds = %bb7240.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7329.i:		; preds = %bb7235.i
+	br i1 false, label %bb7339.i, label %bb7332.i
+bb7332.i:		; preds = %bb7329.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7339.i:		; preds = %bb7329.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7369.i:		; preds = %bb7235.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7442.i:		; preds = %bb7235.i
+	br i1 false, label %bb7447.i, label %bb8428.i
+bb7447.i:		; preds = %bb7442.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7455.i:		; preds = %bb7230.i
+	switch i32 0, label %bb7703.i [
+		 i32 4, label %bb7460.i
+		 i32 8, label %bb7546.i
+		 i32 11, label %bb7630.i
+	]
+bb7460.i:		; preds = %bb7455.i
+	br i1 false, label %bb7471.i, label %bb7463.i
+bb7463.i:		; preds = %bb7460.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7471.i:		; preds = %bb7460.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7546.i:		; preds = %bb7455.i
+	br i1 false, label %bb7555.i, label %bb7549.i
+bb7549.i:		; preds = %bb7546.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7555.i:		; preds = %bb7546.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7630.i:		; preds = %bb7455.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7703.i:		; preds = %bb7455.i
+	br i1 false, label %bb7709.i, label %bb7712.i
+bb7709.i:		; preds = %bb7703.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7712.i:		; preds = %bb7703.i
+	br i1 false, label %bb7717.i, label %bb8428.i
+bb7717.i:		; preds = %bb7712.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7725.i:		; preds = %bb7230.i
+	switch i32 0, label %bb7945.i [
+		 i32 4, label %bb7730.i
+		 i32 8, label %bb7819.i
+		 i32 11, label %bb7906.i
+	]
+bb7730.i:		; preds = %bb7725.i
+	br i1 false, label %bb7744.i, label %bb7733.i
+bb7733.i:		; preds = %bb7730.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7744.i:		; preds = %bb7730.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7819.i:		; preds = %bb7725.i
+	br i1 false, label %bb7831.i, label %bb7822.i
+bb7822.i:		; preds = %bb7819.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7831.i:		; preds = %bb7819.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7906.i:		; preds = %bb7725.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7945.i:		; preds = %bb7725.i
+	switch i32 %df4081.0.i, label %bb8428.i [
+		 i32 0, label %bb7962.i
+		 i32 2, label %bb7962.i
+		 i32 10, label %bb7962.i
+		 i32 3, label %bb7970.i
+	]
+bb7962.i:		; preds = %bb7945.i, %bb7945.i, %bb7945.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7970.i:		; preds = %bb7945.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7978.i:		; preds = %bb7230.i
+	switch i32 0, label %bb8198.i [
+		 i32 4, label %bb7983.i
+		 i32 8, label %bb8072.i
+		 i32 11, label %bb8159.i
+	]
+bb7983.i:		; preds = %bb7978.i
+	br i1 false, label %bb7997.i, label %bb7986.i
+bb7986.i:		; preds = %bb7983.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb7997.i:		; preds = %bb7983.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8072.i:		; preds = %bb7978.i
+	br i1 false, label %bb8084.i, label %bb8075.i
+bb8075.i:		; preds = %bb8072.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8084.i:		; preds = %bb8072.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8159.i:		; preds = %bb7978.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8198.i:		; preds = %bb7978.i
+	switch i32 %df4081.0.i, label %bb8428.i [
+		 i32 0, label %bb8215.i
+		 i32 1, label %bb8215.i
+		 i32 10, label %bb8215.i
+		 i32 3, label %bb8223.i
+	]
+bb8215.i:		; preds = %bb8198.i, %bb8198.i, %bb8198.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8223.i:		; preds = %bb8198.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8231.i:		; preds = %bb7230.i
+	switch i32 0, label %bb8428.i [
+		 i32 4, label %bb8236.i
+		 i32 8, label %bb8326.i
+		 i32 11, label %bb8347.i
+		 i32 10, label %bb8425.i
+	]
+bb8236.i:		; preds = %bb8231.i
+	br i1 false, label %bb8251.i, label %bb8239.i
+bb8239.i:		; preds = %bb8236.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8251.i:		; preds = %bb8236.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8326.i:		; preds = %bb8231.i
+	br i1 false, label %bb8339.i, label %bb8428.i
+bb8339.i:		; preds = %bb8326.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8347.i:		; preds = %bb8231.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8425.i:		; preds = %bb8231.i
+	br label %bb8428.i
+bb8428.i:		; preds = %bb8425.i, %bb8326.i, %bb8231.i, %bb8198.i, %bb7945.i, %bb7712.i, %bb7442.i, %bb7230.i, %bb6853.i, %bb6736.i, %bb6724.i, %bb6543.i, %bb6007.i, %bb5995.i, %bb5764.i, %bb5596.i
+	br i1 false, label %bb8668.i, label %bb8434.i
+bb8434.i:		; preds = %bb8428.i, %bb8347.i, %bb8339.i, %bb8251.i, %bb8239.i, %bb8223.i, %bb8215.i, %bb8159.i, %bb8084.i, %bb8075.i, %bb7997.i, %bb7986.i, %bb7970.i, %bb7962.i, %bb7906.i, %bb7831.i, %bb7822.i, %bb7744.i, %bb7733.i, %bb7717.i, %bb7709.i, %bb7630.i, %bb7555.i, %bb7549.i, %bb7471.i, %bb7463.i, %bb7447.i, %bb7369.i, %bb7339.i, %bb7332.i, %bb7252.i, %bb7243.i, %bb7192.i, %bb7149.i, %bb7119.i, %bb7075.i, %bb6942.i, %bb6861.i, %bb6845.i, %bb6815.i, %bb6811.i, %bb6778.i, %bb6774.i, %bb6741.i, %bb6651.i, %bb6551.i, %bb6471.i, %bb6317.i, %bb6245.i, %bb6239.i, %bb6166.i, %bb6123.i, %bb6119.i, %bb6086.i, %bb6082.i, %bb6049.i, %bb6045.i, %bb6012.i, %bb5920.i, %bb5845.i, %bb5772.i, %bb5692.i, %bb5602.i
+	switch i32 0, label %bb8668.i [
+		 i32 0, label %bb8436.i
+		 i32 1, label %bb8531.i
+		 i32 2, label %bb8531.i
+	]
+bb8436.i:		; preds = %bb8434.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8465.i
+		 i32 8, label %bb8465.i
+		 i32 11, label %bb8465.i
+		 i32 3, label %bb9301.i
+	]
+bb8465.i:		; preds = %bb8436.i, %bb8436.i, %bb8436.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8490.i
+		 i32 8, label %bb8490.i
+		 i32 3, label %bb9301.i
+		 i32 11, label %bb9153.i
+	]
+bb8490.i:		; preds = %bb8465.i, %bb8465.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8518.i
+		 i32 8, label %bb8513.i
+		 i32 3, label %bb9301.i
+		 i32 11, label %bb9153.i
+	]
+bb8513.i:		; preds = %bb8490.i
+	br i1 false, label %bb8518.i, label %bb8668.i
+bb8518.i:		; preds = %bb8513.i, %bb8490.i
+	switch i32 0, label %bb9310.i [
+		 i32 3, label %bb9301.i
+		 i32 4, label %bb8670.i
+		 i32 8, label %bb9112.i
+		 i32 11, label %bb9153.i
+	]
+bb8531.i:		; preds = %bb8434.i, %bb8434.i
+	br i1 false, label %bb8536.i, label %bb8575.i
+bb8536.i:		; preds = %bb8531.i
+	br i1 false, label %bb8557.i, label %bb8588.i
+bb8557.i:		; preds = %bb8536.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8600.i
+		 i32 8, label %bb8600.i
+		 i32 3, label %bb9301.i
+		 i32 11, label %bb9153.i
+	]
+bb8575.i:		; preds = %bb8531.i
+	br label %bb8588.i
+bb8588.i:		; preds = %bb8575.i, %bb8536.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8600.i
+		 i32 8, label %bb8600.i
+		 i32 3, label %bb9301.i
+		 i32 11, label %bb9153.i
+	]
+bb8600.i:		; preds = %bb8588.i, %bb8588.i, %bb8557.i, %bb8557.i
+	switch i32 0, label %bb9310.i [
+		 i32 4, label %bb8629.i
+		 i32 3, label %bb9301.i
+		 i32 8, label %bb9112.i
+		 i32 11, label %bb9153.i
+	]
+bb8629.i:		; preds = %bb8600.i
+	br i1 false, label %bb8650.i, label %bb8668.i
+bb8650.i:		; preds = %bb8629.i
+	br label %bb8668.i
+bb8668.i:		; preds = %bb8650.i, %bb8629.i, %bb8513.i, %bb8434.i, %bb8428.i, %bb8347.i, %bb8339.i, %bb8251.i, %bb8239.i, %bb8223.i, %bb8215.i, %bb8159.i, %bb8084.i, %bb8075.i, %bb7997.i, %bb7986.i, %bb7970.i, %bb7962.i, %bb7906.i, %bb7831.i, %bb7822.i, %bb7744.i, %bb7733.i, %bb7717.i, %bb7709.i, %bb7630.i, %bb7555.i, %bb7549.i, %bb7471.i, %bb7463.i, %bb7447.i, %bb7369.i, %bb7339.i, %bb7332.i, %bb7252.i, %bb7243.i, %bb7192.i, %bb7149.i, %bb7119.i, %bb7075.i, %bb6942.i, %bb6861.i, %bb6845.i, %bb6815.i, %bb6811.i, %bb6778.i, %bb6774.i, %bb6741.i, %bb6651.i, %bb6551.i, %bb6471.i, %bb6317.i, %bb6245.i, %bb6239.i, %bb6166.i, %bb6123.i, %bb6119.i, %bb6086.i, %bb6082.i, %bb6049.i, %bb6045.i, %bb6012.i, %bb5920.i, %bb5845.i, %bb5772.i, %bb5692.i, %bb5602.i
+	switch i32 0, label %bb9310.i [
+		 i32 3, label %bb9301.i
+		 i32 4, label %bb8670.i
+		 i32 8, label %bb9112.i
+		 i32 11, label %bb9153.i
+	]
+bb8670.i:		; preds = %bb8668.i, %bb8518.i
+	br label %bb9310.i
+bb9112.i:		; preds = %bb8668.i, %bb8600.i, %bb8518.i
+	br label %bb9310.i
+bb9153.i:		; preds = %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i
+	br label %bb9310.i
+bb9301.i:		; preds = %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i, %bb8436.i
+	br label %bb9310.i
+bb9310.i:		; preds = %bb9301.i, %bb9153.i, %bb9112.i, %bb8670.i, %bb8668.i, %bb8600.i, %bb8588.i, %bb8557.i, %bb8518.i, %bb8490.i, %bb8465.i, %bb8436.i
+	br i1 false, label %bb16581.i, label %bb9313.i
+bb9313.i:		; preds = %bb9310.i
+	switch i32 %dt4080.0.i, label %bb16578.i [
+		 i32 0, label %bb9315.i
+		 i32 1, label %bb9890.i
+		 i32 2, label %bb10465.i
+		 i32 3, label %bb11040.i
+		 i32 4, label %bb11615.i
+		 i32 5, label %bb11823.i
+		 i32 8, label %bb12398.i
+		 i32 9, label %bb12833.i
+		 i32 10, label %bb13268.i
+		 i32 11, label %bb13268.i
+		 i32 12, label %bb13703.i
+		 i32 13, label %bb13703.i
+		 i32 14, label %bb14278.i
+		 i32 15, label %bb14853.i
+		 i32 16, label %bb9315.i
+		 i32 17, label %bb9315.i
+		 i32 18, label %bb15428.i
+		 i32 19, label %bb16003.i
+	]
+bb9315.i:		; preds = %bb9313.i, %bb9313.i, %bb9313.i
+	br i1 false, label %bb9535.i, label %bb9323.i
+bb9323.i:		; preds = %bb9315.i
+	br label %bb9535.i
+bb9535.i:		; preds = %bb9323.i, %bb9315.i
+	br label %bb16581.i
+bb9890.i:		; preds = %bb9313.i
+	br i1 false, label %bb10255.i, label %bb9898.i
+bb9898.i:		; preds = %bb9890.i
+	br label %bb10255.i
+bb10255.i:		; preds = %bb9898.i, %bb9890.i
+	br label %bb16581.i
+bb10465.i:		; preds = %bb9313.i
+	br i1 false, label %bb10685.i, label %bb10473.i
+bb10473.i:		; preds = %bb10465.i
+	br label %bb10685.i
+bb10685.i:		; preds = %bb10473.i, %bb10465.i
+	br label %bb16581.i
+bb11040.i:		; preds = %bb9313.i
+	br i1 false, label %bb11405.i, label %bb11048.i
+bb11048.i:		; preds = %bb11040.i
+	br label %bb11405.i
+bb11405.i:		; preds = %bb11048.i, %bb11040.i
+	br label %bb16581.i
+bb11615.i:		; preds = %bb9313.i
+	br i1 false, label %bb16581.i, label %bb11618.i
+bb11618.i:		; preds = %bb11615.i
+	br label %bb16581.i
+bb11823.i:		; preds = %bb9313.i
+	br i1 false, label %bb12188.i, label %bb11831.i
+bb11831.i:		; preds = %bb11823.i
+	br label %bb12188.i
+bb12188.i:		; preds = %bb11831.i, %bb11823.i
+	br label %bb16581.i
+bb12398.i:		; preds = %bb9313.i
+	br i1 false, label %bb12566.i, label %bb12406.i
+bb12406.i:		; preds = %bb12398.i
+	br label %bb12566.i
+bb12566.i:		; preds = %bb12406.i, %bb12398.i
+	br label %bb16581.i
+bb12833.i:		; preds = %bb9313.i
+	br i1 false, label %bb13001.i, label %bb12841.i
+bb12841.i:		; preds = %bb12833.i
+	br label %bb13001.i
+bb13001.i:		; preds = %bb12841.i, %bb12833.i
+	br label %bb16581.i
+bb13268.i:		; preds = %bb9313.i, %bb9313.i
+	br i1 false, label %bb13436.i, label %bb13276.i
+bb13276.i:		; preds = %bb13268.i
+	br label %bb13436.i
+bb13436.i:		; preds = %bb13276.i, %bb13268.i
+	br label %bb16581.i
+bb13703.i:		; preds = %bb9313.i, %bb9313.i
+	br i1 false, label %bb13923.i, label %bb13711.i
+bb13711.i:		; preds = %bb13703.i
+	br label %bb13923.i
+bb13923.i:		; preds = %bb13711.i, %bb13703.i
+	br label %bb16581.i
+bb14278.i:		; preds = %bb9313.i
+	br i1 false, label %bb14498.i, label %bb14286.i
+bb14286.i:		; preds = %bb14278.i
+	br label %bb14498.i
+bb14498.i:		; preds = %bb14286.i, %bb14278.i
+	br label %bb16581.i
+bb14853.i:		; preds = %bb9313.i
+	br i1 false, label %bb15073.i, label %bb14861.i
+bb14861.i:		; preds = %bb14853.i
+	br label %bb15073.i
+bb15073.i:		; preds = %bb14861.i, %bb14853.i
+	br label %bb16581.i
+bb15428.i:		; preds = %bb9313.i
+	br i1 false, label %bb15648.i, label %bb15436.i
+bb15436.i:		; preds = %bb15428.i
+	br label %bb15648.i
+bb15648.i:		; preds = %bb15436.i, %bb15428.i
+	br label %bb16581.i
+bb16003.i:		; preds = %bb9313.i
+	br i1 false, label %bb16223.i, label %bb16011.i
+bb16011.i:		; preds = %bb16003.i
+	br label %bb16223.i
+bb16223.i:		; preds = %bb16011.i, %bb16003.i
+	br label %bb16581.i
+bb16578.i:		; preds = %bb9313.i
+	unreachable
+bb16581.i:		; preds = %bb16223.i, %bb15648.i, %bb15073.i, %bb14498.i, %bb13923.i, %bb13436.i, %bb13001.i, %bb12566.i, %bb12188.i, %bb11618.i, %bb11615.i, %bb11405.i, %bb10685.i, %bb10255.i, %bb9535.i, %bb9310.i, %glgVectorFloatConversion.exit
+	br label %storeVecColor_RGB_UI.exit
+storeVecColor_RGB_UI.exit:		; preds = %bb16581.i
+	br i1 false, label %bb5295.i, label %bb16621.i
+bb16607.i:		; preds = %bb5276.i
+	br i1 false, label %bb5295.preheader.i, label %bb16621.i
+bb5295.preheader.i:		; preds = %bb16607.i
+	br label %bb5295.i
+bb16621.i:		; preds = %bb16607.i, %storeVecColor_RGB_UI.exit
+	br label %bb16650.outer.i
+bb16650.outer.i:		; preds = %bb16621.i
+	br label %bb16650.i
+bb16650.i:		; preds = %storeColor_RGB_UI.exit, %bb16650.outer.i
+	br label %loadColor_BGRA_UI8888R.exit
+loadColor_BGRA_UI8888R.exit:		; preds = %bb16650.i
+	br i1 false, label %bb16671.i, label %bb16697.i
+bb16671.i:		; preds = %loadColor_BGRA_UI8888R.exit
+	br i1 false, label %bb.i179, label %bb662.i
+bb.i179:		; preds = %bb16671.i
+	switch i32 0, label %bb513.i [
+		 i32 7, label %bb418.i
+		 i32 6, label %bb433.i
+	]
+bb418.i:		; preds = %bb.i179
+	br label %bb559.i
+bb433.i:		; preds = %bb.i179
+	switch i32 0, label %bb493.i [
+		 i32 31744, label %bb455.i
+		 i32 0, label %bb471.i
+	]
+bb455.i:		; preds = %bb433.i
+	br i1 false, label %bb463.i, label %bb504.i
+bb463.i:		; preds = %bb455.i
+	br label %bb559.i
+bb471.i:		; preds = %bb433.i
+	br i1 false, label %bb497.i, label %bb484.preheader.i
+bb484.preheader.i:		; preds = %bb471.i
+	br i1 false, label %bb479.i, label %bb490.i
+bb479.i:		; preds = %bb479.i, %bb484.preheader.i
+	br i1 false, label %bb479.i, label %bb490.i
+bb490.i:		; preds = %bb479.i, %bb484.preheader.i
+	br label %bb559.i
+bb493.i:		; preds = %bb433.i
+	br label %bb497.i
+bb497.i:		; preds = %bb493.i, %bb471.i
+	br label %bb504.i
+bb504.i:		; preds = %bb497.i, %bb455.i
+	br label %bb513.i
+bb513.i:		; preds = %bb504.i, %bb.i179
+	br label %bb559.i
+bb559.i:		; preds = %bb513.i, %bb490.i, %bb463.i, %bb418.i
+	br i1 false, label %bb2793.i, label %bb614.i
+bb614.i:		; preds = %bb559.i
+	br i1 false, label %bb626.i, label %bb620.i
+bb620.i:		; preds = %bb614.i
+	br i1 false, label %bb625.i, label %bb626.i
+bb625.i:		; preds = %bb620.i
+	br label %bb626.i
+bb626.i:		; preds = %bb625.i, %bb620.i, %bb614.i
+	br i1 false, label %bb638.i, label %bb632.i
+bb632.i:		; preds = %bb626.i
+	br i1 false, label %bb637.i, label %bb638.i
+bb637.i:		; preds = %bb632.i
+	br label %bb638.i
+bb638.i:		; preds = %bb637.i, %bb632.i, %bb626.i
+	br i1 false, label %bb650.i, label %bb644.i
+bb644.i:		; preds = %bb638.i
+	br i1 false, label %bb649.i, label %bb650.i
+bb649.i:		; preds = %bb644.i
+	br label %bb650.i
+bb650.i:		; preds = %bb649.i, %bb644.i, %bb638.i
+	br i1 false, label %bb2793.i, label %bb656.i
+bb656.i:		; preds = %bb650.i
+	br i1 false, label %bb661.i, label %bb2793.i
+bb661.i:		; preds = %bb656.i
+	switch i32 0, label %bb2883.i [
+		 i32 3, label %bb2874.i
+		 i32 4, label %bb2795.i
+		 i32 8, label %bb2810.i
+		 i32 10, label %bb2834.i
+		 i32 11, label %bb2819.i
+		 i32 16, label %bb2810.i
+	]
+bb662.i:		; preds = %bb16671.i
+	switch i32 0, label %bb1937.i [
+		 i32 3, label %bb902.i
+		 i32 4, label %bb1416.i
+		 i32 8, label %bb1020.i
+		 i32 10, label %bb902.i
+		 i32 11, label %bb784.i
+		 i32 16, label %bb664.i
+	]
+bb664.i:		; preds = %bb662.i
+	br i1 false, label %bb682.i, label %bb669.i
+bb669.i:		; preds = %bb664.i
+	br label %bb710.i
+bb682.i:		; preds = %bb664.i
+	br label %bb710.i
+bb710.i:		; preds = %bb682.i, %bb669.i
+	br i1 false, label %bb760.i, label %bb754.i
+bb754.i:		; preds = %bb710.i
+	br i1 false, label %bb759.i, label %bb760.i
+bb759.i:		; preds = %bb754.i
+	br label %bb760.i
+bb760.i:		; preds = %bb759.i, %bb754.i, %bb710.i
+	br i1 false, label %bb772.i, label %bb766.i
+bb766.i:		; preds = %bb760.i
+	br i1 false, label %bb771.i, label %bb772.i
+bb771.i:		; preds = %bb766.i
+	br label %bb772.i
+bb772.i:		; preds = %bb771.i, %bb766.i, %bb760.i
+	br i1 false, label %bb1937.i, label %bb778.i
+bb778.i:		; preds = %bb772.i
+	br i1 false, label %bb783.i, label %bb1937.i
+bb783.i:		; preds = %bb778.i
+	br label %bb1937.i
+bb784.i:		; preds = %bb662.i
+	switch i32 0, label %bb892.i [
+		 i32 1, label %bb868.i
+		 i32 3, label %bb868.i
+		 i32 4, label %bb882.i
+		 i32 6, label %bb792.i
+		 i32 7, label %bb786.i
+	]
+bb786.i:		; preds = %bb784.i
+	br label %bb904.i
+bb792.i:		; preds = %bb784.i
+	switch i32 0, label %bb852.i [
+		 i32 31744, label %bb814.i
+		 i32 0, label %bb830.i
+	]
+bb814.i:		; preds = %bb792.i
+	br i1 false, label %bb822.i, label %bb863.i
+bb822.i:		; preds = %bb814.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb830.i:		; preds = %bb792.i
+	br i1 false, label %bb856.i, label %bb843.preheader.i
+bb843.preheader.i:		; preds = %bb830.i
+	br i1 false, label %bb838.i, label %bb849.i
+bb838.i:		; preds = %bb838.i, %bb843.preheader.i
+	br i1 false, label %bb838.i, label %bb849.i
+bb849.i:		; preds = %bb838.i, %bb843.preheader.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb852.i:		; preds = %bb792.i
+	br label %bb856.i
+bb856.i:		; preds = %bb852.i, %bb830.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb863.i:		; preds = %bb814.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb868.i:		; preds = %bb784.i, %bb784.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb882.i:		; preds = %bb784.i
+	br label %bb1000.i
+bb892.i:		; preds = %bb784.i
+	br label %bb902.i
+bb902.i:		; preds = %bb892.i, %bb662.i, %bb662.i
+	switch i32 0, label %bb1010.i [
+		 i32 1, label %bb986.i
+		 i32 3, label %bb986.i
+		 i32 4, label %bb1000.i
+		 i32 6, label %bb910.i
+		 i32 7, label %bb904.i
+	]
+bb904.i:		; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i, %bb786.i
+	br label %bb1937.i
+bb910.i:		; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+	switch i32 0, label %bb970.i [
+		 i32 31744, label %bb932.i
+		 i32 0, label %bb948.i
+	]
+bb932.i:		; preds = %bb910.i
+	br i1 false, label %bb940.i, label %bb981.i
+bb940.i:		; preds = %bb932.i
+	br label %bb1937.i
+bb948.i:		; preds = %bb910.i
+	br i1 false, label %bb974.i, label %bb961.preheader.i
+bb961.preheader.i:		; preds = %bb948.i
+	br i1 false, label %bb956.i, label %bb967.i
+bb956.i:		; preds = %bb956.i, %bb961.preheader.i
+	br i1 false, label %bb956.i, label %bb967.i
+bb967.i:		; preds = %bb956.i, %bb961.preheader.i
+	br label %bb1937.i
+bb970.i:		; preds = %bb910.i
+	br label %bb974.i
+bb974.i:		; preds = %bb970.i, %bb948.i
+	br label %bb1937.i
+bb981.i:		; preds = %bb932.i
+	br label %bb1937.i
+bb986.i:		; preds = %bb902.i, %bb902.i, %bb868.i, %bb868.i, %bb863.i, %bb863.i, %bb856.i, %bb856.i, %bb849.i, %bb849.i, %bb822.i, %bb822.i
+	br label %bb1937.i
+bb1000.i:		; preds = %bb902.i, %bb882.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+	br label %bb1937.i
+bb1010.i:		; preds = %bb902.i, %bb868.i, %bb863.i, %bb856.i, %bb849.i, %bb822.i
+	br label %bb1937.i
+bb1020.i:		; preds = %bb662.i
+	switch i32 0, label %bb1388.i [
+		 i32 1, label %bb1264.i
+		 i32 3, label %bb1264.i
+		 i32 4, label %bb1304.i
+		 i32 6, label %bb1038.i
+		 i32 7, label %bb1022.i
+		 i32 8, label %bb1332.i
+		 i32 9, label %bb1332.i
+		 i32 10, label %bb1360.i
+		 i32 11, label %bb1360.i
+	]
+bb1022.i:		; preds = %bb1020.i
+	br label %bb1937.i
+bb1038.i:		; preds = %bb1020.i
+	switch i32 0, label %bb1098.i [
+		 i32 31744, label %bb1060.i
+		 i32 0, label %bb1076.i
+	]
+bb1060.i:		; preds = %bb1038.i
+	br i1 false, label %bb1068.i, label %bb1109.i
+bb1068.i:		; preds = %bb1060.i
+	br label %bb1109.i
+bb1076.i:		; preds = %bb1038.i
+	br i1 false, label %bb1102.i, label %bb1089.preheader.i
+bb1089.preheader.i:		; preds = %bb1076.i
+	br i1 false, label %bb1084.i, label %bb1095.i
+bb1084.i:		; preds = %bb1084.i, %bb1089.preheader.i
+	br i1 false, label %bb1084.i, label %bb1095.i
+bb1095.i:		; preds = %bb1084.i, %bb1089.preheader.i
+	br label %bb1109.i
+bb1098.i:		; preds = %bb1038.i
+	br label %bb1102.i
+bb1102.i:		; preds = %bb1098.i, %bb1076.i
+	br label %bb1109.i
+bb1109.i:		; preds = %bb1102.i, %bb1095.i, %bb1068.i, %bb1060.i
+	switch i32 0, label %bb1173.i [
+		 i32 31744, label %bb1135.i
+		 i32 0, label %bb1151.i
+	]
+bb1135.i:		; preds = %bb1109.i
+	br i1 false, label %bb1143.i, label %bb1184.i
+bb1143.i:		; preds = %bb1135.i
+	br label %bb1184.i
+bb1151.i:		; preds = %bb1109.i
+	br i1 false, label %bb1177.i, label %bb1164.preheader.i
+bb1164.preheader.i:		; preds = %bb1151.i
+	br i1 false, label %bb1159.i, label %bb1170.i
+bb1159.i:		; preds = %bb1159.i, %bb1164.preheader.i
+	br i1 false, label %bb1159.i, label %bb1170.i
+bb1170.i:		; preds = %bb1159.i, %bb1164.preheader.i
+	br label %bb1184.i
+bb1173.i:		; preds = %bb1109.i
+	br label %bb1177.i
+bb1177.i:		; preds = %bb1173.i, %bb1151.i
+	br label %bb1184.i
+bb1184.i:		; preds = %bb1177.i, %bb1170.i, %bb1143.i, %bb1135.i
+	switch i32 0, label %bb1248.i [
+		 i32 31744, label %bb1210.i
+		 i32 0, label %bb1226.i
+	]
+bb1210.i:		; preds = %bb1184.i
+	br i1 false, label %bb1218.i, label %bb1259.i
+bb1218.i:		; preds = %bb1210.i
+	br label %bb1937.i
+bb1226.i:		; preds = %bb1184.i
+	br i1 false, label %bb1252.i, label %bb1239.preheader.i
+bb1239.preheader.i:		; preds = %bb1226.i
+	br i1 false, label %bb1234.i, label %bb1245.i
+bb1234.i:		; preds = %bb1234.i, %bb1239.preheader.i
+	br i1 false, label %bb1234.i, label %bb1245.i
+bb1245.i:		; preds = %bb1234.i, %bb1239.preheader.i
+	br label %bb1937.i
+bb1248.i:		; preds = %bb1184.i
+	br label %bb1252.i
+bb1252.i:		; preds = %bb1248.i, %bb1226.i
+	br label %bb1937.i
+bb1259.i:		; preds = %bb1210.i
+	br label %bb1937.i
+bb1264.i:		; preds = %bb1020.i, %bb1020.i
+	br label %bb1937.i
+bb1304.i:		; preds = %bb1020.i
+	br label %bb1937.i
+bb1332.i:		; preds = %bb1020.i, %bb1020.i
+	br label %bb1937.i
+bb1360.i:		; preds = %bb1020.i, %bb1020.i
+	br label %bb1937.i
+bb1388.i:		; preds = %bb1020.i
+	br label %bb1937.i
+bb1416.i:		; preds = %bb662.i
+	switch i32 0, label %bb1900.i [
+		 i32 1, label %bb1740.i
+		 i32 3, label %bb1740.i
+		 i32 4, label %bb1793.i
+		 i32 6, label %bb1439.i
+		 i32 7, label %bb1418.i
+		 i32 14, label %bb1830.i
+		 i32 15, label %bb1830.i
+		 i32 18, label %bb1863.i
+		 i32 19, label %bb1863.i
+	]
+bb1418.i:		; preds = %bb1416.i
+	br label %bb1937.i
+bb1439.i:		; preds = %bb1416.i
+	switch i32 0, label %bb1499.i [
+		 i32 31744, label %bb1461.i
+		 i32 0, label %bb1477.i
+	]
+bb1461.i:		; preds = %bb1439.i
+	br i1 false, label %bb1469.i, label %bb1510.i
+bb1469.i:		; preds = %bb1461.i
+	br label %bb1510.i
+bb1477.i:		; preds = %bb1439.i
+	br i1 false, label %bb1503.i, label %bb1490.preheader.i
+bb1490.preheader.i:		; preds = %bb1477.i
+	br i1 false, label %bb1485.i, label %bb1496.i
+bb1485.i:		; preds = %bb1485.i, %bb1490.preheader.i
+	br i1 false, label %bb1485.i, label %bb1496.i
+bb1496.i:		; preds = %bb1485.i, %bb1490.preheader.i
+	br label %bb1510.i
+bb1499.i:		; preds = %bb1439.i
+	br label %bb1503.i
+bb1503.i:		; preds = %bb1499.i, %bb1477.i
+	br label %bb1510.i
+bb1510.i:		; preds = %bb1503.i, %bb1496.i, %bb1469.i, %bb1461.i
+	switch i32 0, label %bb1574.i [
+		 i32 31744, label %bb1536.i
+		 i32 0, label %bb1552.i
+	]
+bb1536.i:		; preds = %bb1510.i
+	br i1 false, label %bb1544.i, label %bb1585.i
+bb1544.i:		; preds = %bb1536.i
+	br label %bb1585.i
+bb1552.i:		; preds = %bb1510.i
+	br i1 false, label %bb1578.i, label %bb1565.preheader.i
+bb1565.preheader.i:		; preds = %bb1552.i
+	br i1 false, label %bb1560.i, label %bb1571.i
+bb1560.i:		; preds = %bb1560.i, %bb1565.preheader.i
+	br i1 false, label %bb1560.i, label %bb1571.i
+bb1571.i:		; preds = %bb1560.i, %bb1565.preheader.i
+	br label %bb1585.i
+bb1574.i:		; preds = %bb1510.i
+	br label %bb1578.i
+bb1578.i:		; preds = %bb1574.i, %bb1552.i
+	br label %bb1585.i
+bb1585.i:		; preds = %bb1578.i, %bb1571.i, %bb1544.i, %bb1536.i
+	switch i32 0, label %bb1649.i [
+		 i32 31744, label %bb1611.i
+		 i32 0, label %bb1627.i
+	]
+bb1611.i:		; preds = %bb1585.i
+	br i1 false, label %bb1619.i, label %bb1660.i
+bb1619.i:		; preds = %bb1611.i
+	br label %bb1660.i
+bb1627.i:		; preds = %bb1585.i
+	br i1 false, label %bb1653.i, label %bb1640.preheader.i
+bb1640.preheader.i:		; preds = %bb1627.i
+	br i1 false, label %bb1635.i, label %bb1646.i
+bb1635.i:		; preds = %bb1635.i, %bb1640.preheader.i
+	br i1 false, label %bb1635.i, label %bb1646.i
+bb1646.i:		; preds = %bb1635.i, %bb1640.preheader.i
+	br label %bb1660.i
+bb1649.i:		; preds = %bb1585.i
+	br label %bb1653.i
+bb1653.i:		; preds = %bb1649.i, %bb1627.i
+	br label %bb1660.i
+bb1660.i:		; preds = %bb1653.i, %bb1646.i, %bb1619.i, %bb1611.i
+	switch i32 0, label %bb1724.i [
+		 i32 31744, label %bb1686.i
+		 i32 0, label %bb1702.i
+	]
+bb1686.i:		; preds = %bb1660.i
+	br i1 false, label %bb1694.i, label %bb1735.i
+bb1694.i:		; preds = %bb1686.i
+	br label %bb1937.i
+bb1702.i:		; preds = %bb1660.i
+	br i1 false, label %bb1728.i, label %bb1715.preheader.i
+bb1715.preheader.i:		; preds = %bb1702.i
+	br i1 false, label %bb1710.i, label %bb1721.i
+bb1710.i:		; preds = %bb1710.i, %bb1715.preheader.i
+	br i1 false, label %bb1710.i, label %bb1721.i
+bb1721.i:		; preds = %bb1710.i, %bb1715.preheader.i
+	br label %bb1937.i
+bb1724.i:		; preds = %bb1660.i
+	br label %bb1728.i
+bb1728.i:		; preds = %bb1724.i, %bb1702.i
+	br label %bb1937.i
+bb1735.i:		; preds = %bb1686.i
+	br label %bb1937.i
+bb1740.i:		; preds = %bb1416.i, %bb1416.i
+	br label %bb1937.i
+bb1793.i:		; preds = %bb1416.i
+	br label %bb1937.i
+bb1830.i:		; preds = %bb1416.i, %bb1416.i
+	br label %bb1937.i
+bb1863.i:		; preds = %bb1416.i, %bb1416.i
+	br label %bb1937.i
+bb1900.i:		; preds = %bb1416.i
+	br label %bb1937.i
+bb1937.i:		; preds = %bb1900.i, %bb1863.i, %bb1830.i, %bb1793.i, %bb1740.i, %bb1735.i, %bb1728.i, %bb1721.i, %bb1694.i, %bb1418.i, %bb1388.i, %bb1360.i, %bb1332.i, %bb1304.i, %bb1264.i, %bb1259.i, %bb1252.i, %bb1245.i, %bb1218.i, %bb1022.i, %bb1010.i, %bb1000.i, %bb986.i, %bb981.i, %bb974.i, %bb967.i, %bb940.i, %bb904.i, %bb783.i, %bb778.i, %bb772.i, %bb662.i
+	switch i32 %sf4083.0.i, label %bb2321.i [
+		 i32 0, label %bb2027.i
+		 i32 1, label %bb2081.i
+		 i32 2, label %bb2161.i
+		 i32 3, label %bb2241.i
+		 i32 8, label %bb1939.i
+		 i32 9, label %bb1939.i
+		 i32 10, label %bb1957.i
+		 i32 11, label %bb1975.i
+		 i32 16, label %bb1939.i
+	]
+bb1939.i:		; preds = %bb1937.i, %bb1937.i, %bb1937.i
+	switch i32 0, label %bb2321.i [
+		 i32 3, label %bb1956.i
+		 i32 4, label %bb1956.i
+		 i32 11, label %bb1956.i
+	]
+bb1956.i:		; preds = %bb1939.i, %bb1939.i, %bb1939.i
+	br label %bb2337.i
+bb1957.i:		; preds = %bb1937.i
+	switch i32 0, label %bb1975.i [
+		 i32 3, label %bb1974.i
+		 i32 4, label %bb1974.i
+		 i32 11, label %bb1974.i
+	]
+bb1974.i:		; preds = %bb1957.i, %bb1957.i, %bb1957.i
+	br label %bb1975.i
+bb1975.i:		; preds = %bb1974.i, %bb1957.i, %bb1937.i
+	switch i32 0, label %bb2001.i [
+		 i32 1, label %bb1992.i
+		 i32 4, label %bb1992.i
+		 i32 8, label %bb1992.i
+	]
+bb1992.i:		; preds = %bb1975.i, %bb1975.i, %bb1975.i
+	br label %bb2001.i
+bb2001.i:		; preds = %bb1992.i, %bb1975.i
+	switch i32 0, label %bb2321.i [
+		 i32 2, label %bb2018.i
+		 i32 4, label %bb2018.i
+		 i32 8, label %bb2018.i
+	]
+bb2018.i:		; preds = %bb2001.i, %bb2001.i, %bb2001.i
+	br label %bb2321.i
+bb2027.i:		; preds = %bb1937.i
+	switch i32 0, label %bb2045.i [
+		 i32 1, label %bb2044.i
+		 i32 4, label %bb2044.i
+		 i32 8, label %bb2044.i
+	]
+bb2044.i:		; preds = %bb2027.i, %bb2027.i, %bb2027.i
+	br label %bb2045.i
+bb2045.i:		; preds = %bb2044.i, %bb2027.i
+	switch i32 0, label %bb2063.i [
+		 i32 2, label %bb2062.i
+		 i32 4, label %bb2062.i
+		 i32 8, label %bb2062.i
+	]
+bb2062.i:		; preds = %bb2045.i, %bb2045.i, %bb2045.i
+	br label %bb2063.i
+bb2063.i:		; preds = %bb2062.i, %bb2045.i
+	switch i32 0, label %bb2321.i [
+		 i32 3, label %bb2080.i
+		 i32 4, label %bb2080.i
+		 i32 11, label %bb2080.i
+	]
+bb2080.i:		; preds = %bb2063.i, %bb2063.i, %bb2063.i
+	br label %bb2321.i
+bb2081.i:		; preds = %bb1937.i
+	switch i32 0, label %bb2100.i [
+		 i32 1, label %bb2098.i
+		 i32 4, label %bb2098.i
+		 i32 8, label %bb2098.i
+	]
+bb2098.i:		; preds = %bb2081.i, %bb2081.i, %bb2081.i
+	br label %bb2100.i
+bb2100.i:		; preds = %bb2098.i, %bb2081.i
+	switch i32 0, label %bb2125.i [
+		 i32 4, label %bb2124.i
+		 i32 8, label %bb2124.i
+		 i32 0, label %bb2124.i
+		 i32 11, label %bb2124.i
+	]
+bb2124.i:		; preds = %bb2100.i, %bb2100.i, %bb2100.i, %bb2100.i
+	br label %bb2125.i
+bb2125.i:		; preds = %bb2124.i, %bb2100.i
+	switch i32 0, label %bb2143.i [
+		 i32 2, label %bb2142.i
+		 i32 4, label %bb2142.i
+		 i32 8, label %bb2142.i
+	]
+bb2142.i:		; preds = %bb2125.i, %bb2125.i, %bb2125.i
+	br label %bb2143.i
+bb2143.i:		; preds = %bb2142.i, %bb2125.i
+	switch i32 0, label %bb2321.i [
+		 i32 3, label %bb2160.i
+		 i32 4, label %bb2160.i
+		 i32 11, label %bb2160.i
+	]
+bb2160.i:		; preds = %bb2143.i, %bb2143.i, %bb2143.i
+	br label %bb2321.i
+bb2161.i:		; preds = %bb1937.i
+	switch i32 0, label %bb2180.i [
+		 i32 2, label %bb2178.i
+		 i32 4, label %bb2178.i
+		 i32 8, label %bb2178.i
+	]
+bb2178.i:		; preds = %bb2161.i, %bb2161.i, %bb2161.i
+	br label %bb2180.i
+bb2180.i:		; preds = %bb2178.i, %bb2161.i
+	switch i32 0, label %bb2205.i [
+		 i32 4, label %bb2204.i
+		 i32 8, label %bb2204.i
+		 i32 0, label %bb2204.i
+		 i32 11, label %bb2204.i
+	]
+bb2204.i:		; preds = %bb2180.i, %bb2180.i, %bb2180.i, %bb2180.i
+	br label %bb2205.i
+bb2205.i:		; preds = %bb2204.i, %bb2180.i
+	switch i32 0, label %bb2223.i [
+		 i32 1, label %bb2222.i
+		 i32 4, label %bb2222.i
+		 i32 8, label %bb2222.i
+	]
+bb2222.i:		; preds = %bb2205.i, %bb2205.i, %bb2205.i
+	br label %bb2223.i
+bb2223.i:		; preds = %bb2222.i, %bb2205.i
+	switch i32 0, label %bb2321.i [
+		 i32 3, label %bb2240.i
+		 i32 4, label %bb2240.i
+		 i32 11, label %bb2240.i
+	]
+bb2240.i:		; preds = %bb2223.i, %bb2223.i, %bb2223.i
+	br label %bb2321.i
+bb2241.i:		; preds = %bb1937.i
+	switch i32 0, label %bb2260.i [
+		 i32 3, label %bb2258.i
+		 i32 4, label %bb2258.i
+		 i32 11, label %bb2258.i
+	]
+bb2258.i:		; preds = %bb2241.i, %bb2241.i, %bb2241.i
+	br label %bb2260.i
+bb2260.i:		; preds = %bb2258.i, %bb2241.i
+	switch i32 0, label %bb2285.i [
+		 i32 4, label %bb2284.i
+		 i32 11, label %bb2284.i
+		 i32 0, label %bb2284.i
+		 i32 8, label %bb2284.i
+	]
+bb2284.i:		; preds = %bb2260.i, %bb2260.i, %bb2260.i, %bb2260.i
+	br label %bb2285.i
+bb2285.i:		; preds = %bb2284.i, %bb2260.i
+	switch i32 0, label %bb2303.i [
+		 i32 1, label %bb2302.i
+		 i32 4, label %bb2302.i
+		 i32 8, label %bb2302.i
+	]
+bb2302.i:		; preds = %bb2285.i, %bb2285.i, %bb2285.i
+	br label %bb2303.i
+bb2303.i:		; preds = %bb2302.i, %bb2285.i
+	switch i32 0, label %bb2321.i [
+		 i32 2, label %bb2320.i
+		 i32 4, label %bb2320.i
+		 i32 8, label %bb2320.i
+	]
+bb2320.i:		; preds = %bb2303.i, %bb2303.i, %bb2303.i
+	br label %bb2321.i
+bb2321.i:		; preds = %bb2320.i, %bb2303.i, %bb2240.i, %bb2223.i, %bb2160.i, %bb2143.i, %bb2080.i, %bb2063.i, %bb2018.i, %bb2001.i, %bb1939.i, %bb1937.i
+	br label %bb2337.i
+bb2337.i:		; preds = %bb2321.i, %bb1956.i
+	br label %bb2353.i
+bb2353.i:		; preds = %bb2337.i
+	br label %bb2369.i
+bb2369.i:		; preds = %bb2353.i
+	br label %bb2385.i
+bb2385.i:		; preds = %bb2369.i
+	br i1 false, label %bb2388.i, label %bb2394.i
+bb2388.i:		; preds = %bb2385.i
+	br label %bb2600.i
+bb2394.i:		; preds = %bb2385.i
+	switch i32 0, label %bb2600.i [
+		 i32 0, label %bb2504.i
+		 i32 1, label %bb2528.i
+		 i32 2, label %bb2552.i
+		 i32 3, label %bb2576.i
+		 i32 4, label %bb2396.i
+		 i32 8, label %bb2420.i
+		 i32 11, label %bb2480.i
+	]
+bb2396.i:		; preds = %bb2394.i
+	br i1 false, label %bb2411.i, label %bb2399.i
+bb2399.i:		; preds = %bb2396.i
+	br i1 false, label %bb2420.i, label %bb2405.i
+bb2405.i:		; preds = %bb2399.i
+	br i1 false, label %bb2410.i, label %bb2420.i
+bb2410.i:		; preds = %bb2405.i
+	br i1 false, label %bb2459.i, label %bb2423.i
+bb2411.i:		; preds = %bb2396.i
+	br i1 false, label %bb2420.i, label %bb2414.i
+bb2414.i:		; preds = %bb2411.i
+	br i1 false, label %bb2419.i, label %bb2420.i
+bb2419.i:		; preds = %bb2414.i
+	br label %bb2420.i
+bb2420.i:		; preds = %bb2419.i, %bb2414.i, %bb2411.i, %bb2405.i, %bb2399.i, %bb2394.i
+	br i1 false, label %bb2459.i, label %bb2423.i
+bb2423.i:		; preds = %bb2420.i, %bb2410.i
+	br i1 false, label %bb2435.i, label %bb2429.i
+bb2429.i:		; preds = %bb2423.i
+	br i1 false, label %bb2434.i, label %bb2435.i
+bb2434.i:		; preds = %bb2429.i
+	br label %bb2435.i
+bb2435.i:		; preds = %bb2434.i, %bb2429.i, %bb2423.i
+	br i1 false, label %bb2447.i, label %bb2441.i
+bb2441.i:		; preds = %bb2435.i
+	br i1 false, label %bb2446.i, label %bb2447.i
+bb2446.i:		; preds = %bb2441.i
+	br label %bb2447.i
+bb2447.i:		; preds = %bb2446.i, %bb2441.i, %bb2435.i
+	br i1 false, label %bb2600.i, label %bb2453.i
+bb2453.i:		; preds = %bb2447.i
+	br i1 false, label %bb2458.i, label %bb2600.i
+bb2458.i:		; preds = %bb2453.i
+	br label %bb2793.i
+bb2459.i:		; preds = %bb2420.i, %bb2410.i
+	br i1 false, label %bb2600.i, label %bb2462.i
+bb2462.i:		; preds = %bb2459.i
+	br i1 false, label %bb2479.i, label %bb2600.i
+bb2479.i:		; preds = %bb2462.i
+	br label %bb2600.i
+bb2480.i:		; preds = %bb2394.i
+	br i1 false, label %bb2495.i, label %bb2483.i
+bb2483.i:		; preds = %bb2480.i
+	br i1 false, label %bb2504.i, label %bb2489.i
+bb2489.i:		; preds = %bb2483.i
+	br i1 false, label %bb2494.i, label %bb2504.i
+bb2494.i:		; preds = %bb2489.i
+	br i1 false, label %bb2519.i, label %bb2507.i
+bb2495.i:		; preds = %bb2480.i
+	br i1 false, label %bb2504.i, label %bb2498.i
+bb2498.i:		; preds = %bb2495.i
+	br i1 false, label %bb2503.i, label %bb2504.i
+bb2503.i:		; preds = %bb2498.i
+	br label %bb2504.i
+bb2504.i:		; preds = %bb2503.i, %bb2498.i, %bb2495.i, %bb2489.i, %bb2483.i, %bb2394.i
+	br i1 false, label %bb2519.i, label %bb2507.i
+bb2507.i:		; preds = %bb2504.i, %bb2494.i
+	br i1 false, label %bb2600.i, label %bb2513.i
+bb2513.i:		; preds = %bb2507.i
+	br i1 false, label %bb2518.i, label %bb2600.i
+bb2518.i:		; preds = %bb2513.i
+	br label %bb2600.i
+bb2519.i:		; preds = %bb2504.i, %bb2494.i
+	br i1 false, label %bb2600.i, label %bb2522.i
+bb2522.i:		; preds = %bb2519.i
+	br i1 false, label %bb2527.i, label %bb2600.i
+bb2527.i:		; preds = %bb2522.i
+	br label %bb2600.i
+bb2528.i:		; preds = %bb2394.i
+	br i1 false, label %bb2543.i, label %bb2531.i
+bb2531.i:		; preds = %bb2528.i
+	br i1 false, label %bb2600.i, label %bb2537.i
+bb2537.i:		; preds = %bb2531.i
+	br i1 false, label %bb2542.i, label %bb2600.i
+bb2542.i:		; preds = %bb2537.i
+	br label %bb2600.i
+bb2543.i:		; preds = %bb2528.i
+	br i1 false, label %bb2600.i, label %bb2546.i
+bb2546.i:		; preds = %bb2543.i
+	br i1 false, label %bb2551.i, label %bb2600.i
+bb2551.i:		; preds = %bb2546.i
+	br label %bb2600.i
+bb2552.i:		; preds = %bb2394.i
+	br i1 false, label %bb2567.i, label %bb2555.i
+bb2555.i:		; preds = %bb2552.i
+	br i1 false, label %bb2600.i, label %bb2561.i
+bb2561.i:		; preds = %bb2555.i
+	br i1 false, label %bb2566.i, label %bb2600.i
+bb2566.i:		; preds = %bb2561.i
+	br label %bb2600.i
+bb2567.i:		; preds = %bb2552.i
+	br i1 false, label %bb2600.i, label %bb2570.i
+bb2570.i:		; preds = %bb2567.i
+	br i1 false, label %bb2575.i, label %bb2600.i
+bb2575.i:		; preds = %bb2570.i
+	br label %bb2600.i
+bb2576.i:		; preds = %bb2394.i
+	br i1 false, label %bb2591.i, label %bb2579.i
+bb2579.i:		; preds = %bb2576.i
+	br i1 false, label %bb2600.i, label %bb2585.i
+bb2585.i:		; preds = %bb2579.i
+	br i1 false, label %bb2590.i, label %bb2600.i
+bb2590.i:		; preds = %bb2585.i
+	br label %bb2600.i
+bb2591.i:		; preds = %bb2576.i
+	br i1 false, label %bb2600.i, label %bb2594.i
+bb2594.i:		; preds = %bb2591.i
+	br i1 false, label %bb2599.i, label %bb2600.i
+bb2599.i:		; preds = %bb2594.i
+	br label %bb2600.i
+bb2600.i:		; preds = %bb2599.i, %bb2594.i, %bb2591.i, %bb2590.i, %bb2585.i, %bb2579.i, %bb2575.i, %bb2570.i, %bb2567.i, %bb2566.i, %bb2561.i, %bb2555.i, %bb2551.i, %bb2546.i, %bb2543.i, %bb2542.i, %bb2537.i, %bb2531.i, %bb2527.i, %bb2522.i, %bb2519.i, %bb2518.i, %bb2513.i, %bb2507.i, %bb2479.i, %bb2462.i, %bb2459.i, %bb2453.i, %bb2447.i, %bb2394.i, %bb2388.i
+	br label %bb2793.i
+bb2793.i:		; preds = %bb2600.i, %bb2458.i, %bb656.i, %bb650.i, %bb559.i
+	switch i32 0, label %bb2883.i [
+		 i32 3, label %bb2874.i
+		 i32 4, label %bb2795.i
+		 i32 8, label %bb2810.i
+		 i32 10, label %bb2834.i
+		 i32 11, label %bb2819.i
+		 i32 16, label %bb2810.i
+	]
+bb2795.i:		; preds = %bb2793.i, %bb661.i
+	br label %bb2810.i
+bb2810.i:		; preds = %bb2795.i, %bb2793.i, %bb2793.i, %bb661.i, %bb661.i
+	br label %bb2883.i
+bb2819.i:		; preds = %bb2793.i, %bb661.i
+	br label %bb2834.i
+bb2834.i:		; preds = %bb2819.i, %bb2793.i, %bb661.i
+	switch i32 0, label %bb2860.i [
+		 i32 4, label %bb2846.i
+		 i32 8, label %bb2846.i
+	]
+bb2846.i:		; preds = %bb2834.i, %bb2834.i
+	br i1 false, label %bb2859.i, label %bb2860.i
+bb2859.i:		; preds = %bb2846.i
+	br label %bb2860.i
+bb2860.i:		; preds = %bb2859.i, %bb2846.i, %bb2834.i
+	switch i32 %df4081.0.i, label %bb2867.bb2883_crit_edge.i [
+		 i32 1, label %bb2883.i
+		 i32 2, label %bb2872.i
+	]
+bb2867.bb2883_crit_edge.i:		; preds = %bb2860.i
+	br label %bb2883.i
+bb2872.i:		; preds = %bb2860.i
+	switch i32 0, label %UnifiedReturnBlock.i235 [
+		 i32 3, label %bb3253.i
+		 i32 4, label %bb4173.i
+		 i32 8, label %bb3485.i
+		 i32 10, label %bb3253.i
+		 i32 11, label %bb3021.i
+		 i32 16, label %bb2885.i
+	]
+bb2874.i:		; preds = %bb2793.i, %bb661.i
+	br label %bb2883.i
+bb2883.i:		; preds = %bb2874.i, %bb2867.bb2883_crit_edge.i, %bb2860.i, %bb2810.i, %bb2793.i, %bb661.i
+	%f_alpha.1.i = phi i32 [ 0, %bb2867.bb2883_crit_edge.i ], [ 0, %bb2874.i ], [ 1065353216, %bb661.i ], [ 0, %bb2793.i ], [ 0, %bb2810.i ], [ 0, %bb2860.i ]		; <i32> [#uses=1]
+	switch i32 0, label %UnifiedReturnBlock.i235 [
+		 i32 3, label %bb3253.i
+		 i32 4, label %bb4173.i
+		 i32 8, label %bb3485.i
+		 i32 10, label %bb3253.i
+		 i32 11, label %bb3021.i
+		 i32 16, label %bb2885.i
+	]
+bb2885.i:		; preds = %bb2883.i, %bb2872.i
+	br i1 false, label %bb3011.i, label %bb2890.i
+bb2890.i:		; preds = %bb2885.i
+	br i1 false, label %bb2960.i, label %bb2954.i
+bb2954.i:		; preds = %bb2890.i
+	br i1 false, label %bb2959.i, label %bb2960.i
+bb2959.i:		; preds = %bb2954.i
+	br label %bb2960.i
+bb2960.i:		; preds = %bb2959.i, %bb2954.i, %bb2890.i
+	br i1 false, label %bb2972.i, label %bb2966.i
+bb2966.i:		; preds = %bb2960.i
+	br i1 false, label %bb2971.i, label %bb2972.i
+bb2971.i:		; preds = %bb2966.i
+	br label %bb2972.i
+bb2972.i:		; preds = %bb2971.i, %bb2966.i, %bb2960.i
+	br label %glgScalarFloatConversion.exit
+bb3011.i:		; preds = %bb2885.i
+	br label %glgScalarFloatConversion.exit
+bb3021.i:		; preds = %bb2883.i, %bb2872.i
+	switch i32 %dt4080.0.i, label %bb3192.i [
+		 i32 7, label %bb3026.i
+		 i32 6, label %bb3037.i
+		 i32 1, label %bb3125.i
+		 i32 3, label %bb3125.i
+		 i32 5, label %bb3144.i
+	]
+bb3026.i:		; preds = %bb3021.i
+	br label %bb3258.i
+bb3037.i:		; preds = %bb3021.i
+	br i1 false, label %bb3052.i, label %bb3074.i
+bb3052.i:		; preds = %bb3037.i
+	br i1 false, label %bb3105.i, label %bb3069.i
+bb3069.i:		; preds = %bb3052.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3074.i:		; preds = %bb3037.i
+	br i1 false, label %bb3079.i, label %bb3092.i
+bb3079.i:		; preds = %bb3074.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3092.i:		; preds = %bb3074.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3105.i:		; preds = %bb3052.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3125.i:		; preds = %bb3021.i, %bb3021.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3144.i:		; preds = %bb3021.i
+	br label %bb3376.i
+bb3192.i:		; preds = %bb3021.i
+	br i1 false, label %bb3197.i, label %bb3243.i
+bb3197.i:		; preds = %bb3192.i
+	br label %bb3424.i
+bb3243.i:		; preds = %bb3192.i
+	br label %bb3253.i
+bb3253.i:		; preds = %bb3243.i, %bb2883.i, %bb2883.i, %bb2872.i, %bb2872.i
+	switch i32 %dt4080.0.i, label %bb3424.i [
+		 i32 7, label %bb3258.i
+		 i32 6, label %bb3269.i
+		 i32 1, label %bb3357.i
+		 i32 3, label %bb3357.i
+		 i32 5, label %bb3376.i
+	]
+bb3258.i:		; preds = %bb3253.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i, %bb3026.i
+	br label %glgScalarFloatConversion.exit
+bb3269.i:		; preds = %bb3253.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+	br i1 false, label %bb3284.i, label %bb3306.i
+bb3284.i:		; preds = %bb3269.i
+	br i1 false, label %bb3337.i, label %bb3301.i
+bb3301.i:		; preds = %bb3284.i
+	br label %glgScalarFloatConversion.exit
+bb3306.i:		; preds = %bb3269.i
+	br i1 false, label %bb3311.i, label %bb3324.i
+bb3311.i:		; preds = %bb3306.i
+	br label %glgScalarFloatConversion.exit
+bb3324.i:		; preds = %bb3306.i
+	br label %glgScalarFloatConversion.exit
+bb3337.i:		; preds = %bb3284.i
+	br label %glgScalarFloatConversion.exit
+bb3357.i:		; preds = %bb3253.i, %bb3253.i, %bb3125.i, %bb3125.i, %bb3105.i, %bb3105.i, %bb3092.i, %bb3092.i, %bb3079.i, %bb3079.i, %bb3069.i, %bb3069.i
+	br label %glgScalarFloatConversion.exit
+bb3376.i:		; preds = %bb3253.i, %bb3144.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+	br label %glgScalarFloatConversion.exit
+bb3424.i:		; preds = %bb3253.i, %bb3197.i, %bb3125.i, %bb3105.i, %bb3092.i, %bb3079.i, %bb3069.i
+	br i1 false, label %bb3429.i, label %bb3475.i
+bb3429.i:		; preds = %bb3424.i
+	br label %glgScalarFloatConversion.exit
+bb3475.i:		; preds = %bb3424.i
+	br label %glgScalarFloatConversion.exit
+bb3485.i:		; preds = %bb2883.i, %bb2872.i
+	switch i32 %dt4080.0.i, label %bb4077.i [
+		 i32 7, label %bb3490.i
+		 i32 6, label %bb3511.i
+		 i32 1, label %bb3749.i
+		 i32 3, label %bb3749.i
+		 i32 5, label %bb3794.i
+		 i32 4, label %bb3941.i
+	]
+bb3490.i:		; preds = %bb3485.i
+	br label %glgScalarFloatConversion.exit
+bb3511.i:		; preds = %bb3485.i
+	br i1 false, label %bb3526.i, label %bb3548.i
+bb3526.i:		; preds = %bb3511.i
+	br i1 false, label %bb3579.i, label %bb3543.i
+bb3543.i:		; preds = %bb3526.i
+	br label %bb3579.i
+bb3548.i:		; preds = %bb3511.i
+	br i1 false, label %bb3553.i, label %bb3566.i
+bb3553.i:		; preds = %bb3548.i
+	br label %bb3579.i
+bb3566.i:		; preds = %bb3548.i
+	br label %bb3579.i
+bb3579.i:		; preds = %bb3566.i, %bb3553.i, %bb3543.i, %bb3526.i
+	br i1 false, label %bb3601.i, label %bb3623.i
+bb3601.i:		; preds = %bb3579.i
+	br i1 false, label %bb3654.i, label %bb3618.i
+bb3618.i:		; preds = %bb3601.i
+	br label %bb3654.i
+bb3623.i:		; preds = %bb3579.i
+	br i1 false, label %bb3628.i, label %bb3641.i
+bb3628.i:		; preds = %bb3623.i
+	br label %bb3654.i
+bb3641.i:		; preds = %bb3623.i
+	br label %bb3654.i
+bb3654.i:		; preds = %bb3641.i, %bb3628.i, %bb3618.i, %bb3601.i
+	br i1 false, label %bb3676.i, label %bb3698.i
+bb3676.i:		; preds = %bb3654.i
+	br i1 false, label %bb3729.i, label %bb3693.i
+bb3693.i:		; preds = %bb3676.i
+	br label %glgScalarFloatConversion.exit
+bb3698.i:		; preds = %bb3654.i
+	br i1 false, label %bb3703.i, label %bb3716.i
+bb3703.i:		; preds = %bb3698.i
+	br label %glgScalarFloatConversion.exit
+bb3716.i:		; preds = %bb3698.i
+	br label %glgScalarFloatConversion.exit
+bb3729.i:		; preds = %bb3676.i
+	br label %glgScalarFloatConversion.exit
+bb3749.i:		; preds = %bb3485.i, %bb3485.i
+	br label %glgScalarFloatConversion.exit
+bb3794.i:		; preds = %bb3485.i
+	br label %glgScalarFloatConversion.exit
+bb3941.i:		; preds = %bb3485.i
+	br label %glgScalarFloatConversion.exit
+bb4077.i:		; preds = %bb3485.i
+	br i1 false, label %bb4083.i, label %bb4111.i
+bb4083.i:		; preds = %bb4077.i
+	br label %glgScalarFloatConversion.exit
+bb4111.i:		; preds = %bb4077.i
+	br i1 false, label %bb4117.i, label %bb4145.i
+bb4117.i:		; preds = %bb4111.i
+	br label %glgScalarFloatConversion.exit
+bb4145.i:		; preds = %bb4111.i
+	br label %glgScalarFloatConversion.exit
+bb4173.i:		; preds = %bb2883.i, %bb2872.i
+	%f_red.0.reg2mem.4.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ]		; <i32> [#uses=2]
+	%f_green.0.reg2mem.2.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ]		; <i32> [#uses=1]
+	%f_blue.0.reg2mem.2.i = phi i32 [ 0, %bb2872.i ], [ 0, %bb2883.i ]		; <i32> [#uses=1]
+	%f_alpha.1.reg2mem.1.i = phi i32 [ 0, %bb2872.i ], [ %f_alpha.1.i, %bb2883.i ]		; <i32> [#uses=1]
+	switch i32 %dt4080.0.i, label %bb4950.i [
+		 i32 7, label %bb4178.i
+		 i32 6, label %bb4204.i
+		 i32 1, label %bb4517.i202
+		 i32 3, label %bb4517.i202
+		 i32 5, label %bb4575.i
+		 i32 4, label %bb4769.i
+	]
+bb4178.i:		; preds = %bb4173.i
+	br label %glgScalarFloatConversion.exit
+bb4204.i:		; preds = %bb4173.i
+	%tmp4210.i = and i32 0, 32768		; <i32> [#uses=4]
+	%tmp4212.i = and i32 %f_red.0.reg2mem.4.i, 2139095040		; <i32> [#uses=1]
+	%tmp4214.i = and i32 %f_red.0.reg2mem.4.i, 8388607		; <i32> [#uses=1]
+	br i1 false, label %bb4219.i, label %bb4241.i
+bb4219.i:		; preds = %bb4204.i
+	br i1 false, label %bb4272.i, label %bb4236.i
+bb4236.i:		; preds = %bb4219.i
+	br label %bb4272.i
+bb4241.i:		; preds = %bb4204.i
+	br i1 false, label %bb4246.i, label %bb4259.i
+bb4246.i:		; preds = %bb4241.i
+	%tmp4253.i = lshr i32 %tmp4214.i, 0		; <i32> [#uses=1]
+	%tmp4253.masked.i = and i32 %tmp4253.i, 65535		; <i32> [#uses=1]
+	br label %bb4272.i
+bb4259.i:		; preds = %bb4241.i
+	%tmp4261.i187 = add i32 %tmp4212.i, 134217728		; <i32> [#uses=1]
+	%tmp4262.i188 = lshr i32 %tmp4261.i187, 13		; <i32> [#uses=1]
+	%tmp4262.masked.i = and i32 %tmp4262.i188, 64512		; <i32> [#uses=1]
+	%tmp42665693.masked.i = or i32 %tmp4262.masked.i, %tmp4210.i		; <i32> [#uses=1]
+	br label %bb4272.i
+bb4272.i:		; preds = %bb4259.i, %bb4246.i, %bb4236.i, %bb4219.i
+	%tmp42665693.masked.pn.i = phi i32 [ %tmp42665693.masked.i, %bb4259.i ], [ %tmp4253.masked.i, %bb4246.i ], [ %tmp4210.i, %bb4236.i ], [ %tmp4210.i, %bb4219.i ]		; <i32> [#uses=1]
+	%tmp4268.pn.i = phi i32 [ 0, %bb4259.i ], [ %tmp4210.i, %bb4246.i ], [ 31744, %bb4236.i ], [ 32767, %bb4219.i ]		; <i32> [#uses=1]
+	%tmp100.0.i = or i32 %tmp4268.pn.i, %tmp42665693.masked.pn.i		; <i32> [#uses=0]
+	%tmp4289.i = and i32 %f_green.0.reg2mem.2.i, 8388607		; <i32> [#uses=1]
+	br i1 false, label %bb4294.i, label %bb4316.i
+bb4294.i:		; preds = %bb4272.i
+	br i1 false, label %bb4347.i, label %bb4311.i
+bb4311.i:		; preds = %bb4294.i
+	br label %bb4347.i
+bb4316.i:		; preds = %bb4272.i
+	br i1 false, label %bb4321.i, label %bb4334.i
+bb4321.i:		; preds = %bb4316.i
+	br label %bb4347.i
+bb4334.i:		; preds = %bb4316.i
+	%tmp4343.i = lshr i32 %tmp4289.i, 13		; <i32> [#uses=0]
+	br label %bb4347.i
+bb4347.i:		; preds = %bb4334.i, %bb4321.i, %bb4311.i, %bb4294.i
+	%tmp4364.i190 = and i32 %f_blue.0.reg2mem.2.i, 8388607		; <i32> [#uses=1]
+	br i1 false, label %bb4369.i192, label %bb4391.i
+bb4369.i192:		; preds = %bb4347.i
+	br i1 false, label %bb4422.i, label %bb4386.i
+bb4386.i:		; preds = %bb4369.i192
+	br label %bb4422.i
+bb4391.i:		; preds = %bb4347.i
+	br i1 false, label %bb4396.i, label %bb4409.i
+bb4396.i:		; preds = %bb4391.i
+	br label %bb4422.i
+bb4409.i:		; preds = %bb4391.i
+	%tmp4418.i = lshr i32 %tmp4364.i190, 13		; <i32> [#uses=0]
+	br label %bb4422.i
+bb4422.i:		; preds = %bb4409.i, %bb4396.i, %bb4386.i, %bb4369.i192
+	%tmp4439.i194 = and i32 %f_alpha.1.reg2mem.1.i, 8388607		; <i32> [#uses=1]
+	br i1 false, label %bb4444.i, label %bb4466.i
+bb4444.i:		; preds = %bb4422.i
+	br i1 false, label %bb4497.i, label %bb4461.i
+bb4461.i:		; preds = %bb4444.i
+	br label %glgScalarFloatConversion.exit
+bb4466.i:		; preds = %bb4422.i
+	br i1 false, label %bb4471.i, label %bb4484.i
+bb4471.i:		; preds = %bb4466.i
+	br label %glgScalarFloatConversion.exit
+bb4484.i:		; preds = %bb4466.i
+	%tmp4493.i = lshr i32 %tmp4439.i194, 13		; <i32> [#uses=0]
+	br label %glgScalarFloatConversion.exit
+bb4497.i:		; preds = %bb4444.i
+	br label %glgScalarFloatConversion.exit
+bb4517.i202:		; preds = %bb4173.i, %bb4173.i
+	br label %glgScalarFloatConversion.exit
+bb4575.i:		; preds = %bb4173.i
+	br label %glgScalarFloatConversion.exit
+bb4769.i:		; preds = %bb4173.i
+	br label %glgScalarFloatConversion.exit
+bb4950.i:		; preds = %bb4173.i
+	br i1 false, label %bb4956.i, label %bb4993.i
+bb4956.i:		; preds = %bb4950.i
+	br label %glgScalarFloatConversion.exit
+bb4993.i:		; preds = %bb4950.i
+	br i1 false, label %bb4999.i, label %bb5036.i
+bb4999.i:		; preds = %bb4993.i
+	br label %glgScalarFloatConversion.exit
+bb5036.i:		; preds = %bb4993.i
+	br label %glgScalarFloatConversion.exit
+UnifiedReturnBlock.i235:		; preds = %bb2883.i, %bb2872.i
+	br label %glgScalarFloatConversion.exit
+glgScalarFloatConversion.exit:		; preds = %UnifiedReturnBlock.i235, %bb5036.i, %bb4999.i, %bb4956.i, %bb4769.i, %bb4575.i, %bb4517.i202, %bb4497.i, %bb4484.i, %bb4471.i, %bb4461.i, %bb4178.i, %bb4145.i, %bb4117.i, %bb4083.i, %bb3941.i, %bb3794.i, %bb3749.i, %bb3729.i, %bb3716.i, %bb3703.i, %bb3693.i, %bb3490.i, %bb3475.i, %bb3429.i, %bb3376.i, %bb3357.i, %bb3337.i, %bb3324.i, %bb3311.i, %bb3301.i, %bb3258.i, %bb3011.i, %bb2972.i
+	br label %bb18851.i
+bb16697.i:		; preds = %loadColor_BGRA_UI8888R.exit
+	br i1 false, label %bb17749.i, label %bb16700.i
+bb16700.i:		; preds = %bb16697.i
+	switch i32 0, label %bb16829.i [
+		 i32 4, label %bb16705.i
+		 i32 8, label %bb16743.i
+		 i32 11, label %bb16795.i
+	]
+bb16705.i:		; preds = %bb16700.i
+	switch i32 %df4081.0.i, label %bb17183.i [
+		 i32 1, label %bb16710.i
+		 i32 2, label %bb16721.i
+		 i32 3, label %bb16732.i
+	]
+bb16710.i:		; preds = %bb16705.i
+	br label %bb17195.i
+bb16721.i:		; preds = %bb16705.i
+	br label %bb17195.i
+bb16732.i:		; preds = %bb16705.i
+	br label %bb17195.i
+bb16743.i:		; preds = %bb16700.i
+	switch i32 0, label %bb16759.i [
+		 i32 4, label %bb16755.i
+		 i32 11, label %bb16755.i
+	]
+bb16755.i:		; preds = %bb16743.i, %bb16743.i
+	br label %bb17195.i
+bb16759.i:		; preds = %bb16743.i
+	switch i32 %df4081.0.i, label %bb17183.i [
+		 i32 1, label %bb16764.i
+		 i32 2, label %bb16775.i
+		 i32 3, label %bb16786.i
+	]
+bb16764.i:		; preds = %bb16759.i
+	br label %bb17195.i
+bb16775.i:		; preds = %bb16759.i
+	br label %bb17195.i
+bb16786.i:		; preds = %bb16759.i
+	br label %bb17195.i
+bb16795.i:		; preds = %bb16700.i
+	switch i32 0, label %bb17183.i [
+		 i32 4, label %bb16807.i
+		 i32 8, label %bb16807.i
+		 i32 3, label %bb16823.i
+	]
+bb16807.i:		; preds = %bb16795.i, %bb16795.i
+	br label %bb17195.i
+bb16823.i:		; preds = %bb16795.i
+	br label %bb17195.i
+bb16829.i:		; preds = %bb16700.i
+	switch i32 %sf4083.0.i, label %bb17183.i [
+		 i32 10, label %bb16834.i
+		 i32 0, label %bb16892.i
+		 i32 1, label %bb16953.i
+		 i32 2, label %bb17037.i
+		 i32 3, label %bb17121.i
+	]
+bb16834.i:		; preds = %bb16829.i
+	switch i32 0, label %bb16878.i [
+		 i32 4, label %bb16839.i
+		 i32 8, label %bb16858.i
+		 i32 11, label %bb16874.i
+	]
+bb16839.i:		; preds = %bb16834.i
+	br label %bb17195.i
+bb16858.i:		; preds = %bb16834.i
+	br label %bb17195.i
+bb16874.i:		; preds = %bb16834.i
+	br label %bb17195.i
+bb16878.i:		; preds = %bb16834.i
+	br i1 false, label %bb16883.i, label %bb17183.i
+bb16883.i:		; preds = %bb16878.i
+	br label %bb17195.i
+bb16892.i:		; preds = %bb16829.i
+	switch i32 0, label %bb16930.i [
+		 i32 4, label %bb16897.i
+		 i32 8, label %bb16913.i
+		 i32 11, label %bb16926.i
+	]
+bb16897.i:		; preds = %bb16892.i
+	br label %bb17195.i
+bb16913.i:		; preds = %bb16892.i
+	br label %bb17195.i
+bb16926.i:		; preds = %bb16892.i
+	br label %bb17195.i
+bb16930.i:		; preds = %bb16892.i
+	br i1 false, label %bb16936.i, label %bb16939.i
+bb16936.i:		; preds = %bb16930.i
+	br label %bb17195.i
+bb16939.i:		; preds = %bb16930.i
+	br i1 false, label %bb16944.i, label %bb17183.i
+bb16944.i:		; preds = %bb16939.i
+	br label %bb17195.i
+bb16953.i:		; preds = %bb16829.i
+	switch i32 0, label %bb17003.i [
+		 i32 4, label %bb16958.i
+		 i32 8, label %bb16979.i
+		 i32 11, label %bb16997.i
+	]
+bb16958.i:		; preds = %bb16953.i
+	br label %bb17195.i
+bb16979.i:		; preds = %bb16953.i
+	br label %bb17195.i
+bb16997.i:		; preds = %bb16953.i
+	br label %bb17195.i
+bb17003.i:		; preds = %bb16953.i
+	switch i32 %df4081.0.i, label %bb17183.i [
+		 i32 0, label %bb17020.i
+		 i32 2, label %bb17020.i
+		 i32 10, label %bb17020.i
+		 i32 3, label %bb17028.i
+	]
+bb17020.i:		; preds = %bb17003.i, %bb17003.i, %bb17003.i
+	br label %bb17195.i
+bb17028.i:		; preds = %bb17003.i
+	br label %bb17195.i
+bb17037.i:		; preds = %bb16829.i
+	switch i32 0, label %bb17087.i [
+		 i32 4, label %bb17042.i
+		 i32 8, label %bb17063.i
+		 i32 11, label %bb17081.i
+	]
+bb17042.i:		; preds = %bb17037.i
+	br label %bb17195.i
+bb17063.i:		; preds = %bb17037.i
+	br label %bb17195.i
+bb17081.i:		; preds = %bb17037.i
+	br label %bb17195.i
+bb17087.i:		; preds = %bb17037.i
+	switch i32 %df4081.0.i, label %bb17183.i [
+		 i32 0, label %bb17104.i
+		 i32 1, label %bb17104.i
+		 i32 10, label %bb17104.i
+		 i32 3, label %bb17112.i
+	]
+bb17104.i:		; preds = %bb17087.i, %bb17087.i, %bb17087.i
+	br label %bb17195.i
+bb17112.i:		; preds = %bb17087.i
+	br label %bb17195.i
+bb17121.i:		; preds = %bb16829.i
+	switch i32 0, label %bb17183.i [
+		 i32 4, label %bb17126.i
+		 i32 8, label %bb17149.i
+		 i32 11, label %bb17167.i
+		 i32 10, label %bb17180.i
+	]
+bb17126.i:		; preds = %bb17121.i
+	br label %bb17195.i
+bb17149.i:		; preds = %bb17121.i
+	br label %bb17195.i
+bb17167.i:		; preds = %bb17121.i
+	br label %bb17195.i
+bb17180.i:		; preds = %bb17121.i
+	br label %bb17183.i
+bb17183.i:		; preds = %bb17180.i, %bb17121.i, %bb17087.i, %bb17003.i, %bb16939.i, %bb16878.i, %bb16829.i, %bb16795.i, %bb16759.i, %bb16705.i
+	br label %bb17195.i
+bb17195.i:		; preds = %bb17183.i, %bb17167.i, %bb17149.i, %bb17126.i, %bb17112.i, %bb17104.i, %bb17081.i, %bb17063.i, %bb17042.i, %bb17028.i, %bb17020.i, %bb16997.i, %bb16979.i, %bb16958.i, %bb16944.i, %bb16936.i, %bb16926.i, %bb16913.i, %bb16897.i, %bb16883.i, %bb16874.i, %bb16858.i, %bb16839.i, %bb16823.i, %bb16807.i, %bb16786.i, %bb16775.i, %bb16764.i, %bb16755.i, %bb16732.i, %bb16721.i, %bb16710.i
+	br i1 false, label %bb18845.i, label %bb17225.i
+bb17225.i:		; preds = %bb17195.i
+	switch i32 %dt4080.0.i, label %bb17677.i [
+		 i32 4, label %bb17227.i
+		 i32 8, label %bb17259.i
+		 i32 9, label %bb17309.i
+		 i32 10, label %bb17359.i
+		 i32 11, label %bb17359.i
+		 i32 14, label %bb17409.i
+		 i32 15, label %bb17474.i
+		 i32 18, label %bb17539.i
+		 i32 19, label %bb17604.i
+		 i32 0, label %bb17680.i
+		 i32 1, label %bb17672.i
+		 i32 2, label %bb17673.i
+		 i32 3, label %bb17674.i
+		 i32 5, label %bb17675.i
+		 i32 12, label %bb17676.i
+		 i32 13, label %bb17676.i
+		 i32 16, label %bb17680.i
+		 i32 17, label %bb17680.i
+	]
+bb17227.i:		; preds = %bb17225.i
+	br i1 false, label %bb18845.i, label %bb17230.i
+bb17230.i:		; preds = %bb17227.i
+	br label %bb18851.i
+bb17259.i:		; preds = %bb17225.i
+	br i1 false, label %bb17284.i, label %bb17262.i
+bb17262.i:		; preds = %bb17259.i
+	br label %bb17284.i
+bb17284.i:		; preds = %bb17262.i, %bb17259.i
+	br label %bb18851.i
+bb17309.i:		; preds = %bb17225.i
+	br i1 false, label %bb17334.i, label %bb17312.i
+bb17312.i:		; preds = %bb17309.i
+	br label %bb17334.i
+bb17334.i:		; preds = %bb17312.i, %bb17309.i
+	br label %bb18851.i
+bb17359.i:		; preds = %bb17225.i, %bb17225.i
+	br i1 false, label %bb17384.i, label %bb17362.i
+bb17362.i:		; preds = %bb17359.i
+	br label %bb17384.i
+bb17384.i:		; preds = %bb17362.i, %bb17359.i
+	br label %bb18851.i
+bb17409.i:		; preds = %bb17225.i
+	br i1 false, label %bb17441.i, label %bb17412.i
+bb17412.i:		; preds = %bb17409.i
+	br label %bb17441.i
+bb17441.i:		; preds = %bb17412.i, %bb17409.i
+	br label %bb18851.i
+bb17474.i:		; preds = %bb17225.i
+	br i1 false, label %bb17506.i, label %bb17477.i
+bb17477.i:		; preds = %bb17474.i
+	br label %bb17506.i
+bb17506.i:		; preds = %bb17477.i, %bb17474.i
+	br label %bb18851.i
+bb17539.i:		; preds = %bb17225.i
+	br i1 false, label %bb17571.i, label %bb17542.i
+bb17542.i:		; preds = %bb17539.i
+	br label %bb17571.i
+bb17571.i:		; preds = %bb17542.i, %bb17539.i
+	br label %bb18851.i
+bb17604.i:		; preds = %bb17225.i
+	br i1 false, label %bb17636.i, label %bb17607.i
+bb17607.i:		; preds = %bb17604.i
+	br label %bb17636.i
+bb17636.i:		; preds = %bb17607.i, %bb17604.i
+	br label %bb18851.i
+bb17672.i:		; preds = %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17673.i:		; preds = %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17674.i:		; preds = %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17675.i:		; preds = %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17676.i:		; preds = %bb17225.i, %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17677.i:		; preds = %bb17225.i
+	unreachable
+bb17680.i:		; preds = %bb17225.i, %bb17225.i, %bb17225.i
+	br i1 false, label %bb17716.i, label %bb17683.i
+bb17683.i:		; preds = %bb17680.i, %bb17676.i, %bb17675.i, %bb17674.i, %bb17673.i, %bb17672.i
+	br label %bb17716.i
+bb17716.i:		; preds = %bb17683.i, %bb17680.i, %bb17676.i, %bb17675.i, %bb17674.i, %bb17673.i, %bb17672.i
+	br label %bb18851.i
+bb17749.i:		; preds = %bb16697.i
+	br i1 false, label %bb17757.i, label %bb17903.i
+bb17757.i:		; preds = %bb17749.i
+	switch i32 0, label %bb17903.i [
+		 i32 0, label %bb17759.i
+		 i32 1, label %bb17853.i
+		 i32 2, label %bb17853.i
+	]
+bb17759.i:		; preds = %bb17757.i
+	br i1 false, label %bb17764.i, label %bb17772.i
+bb17764.i:		; preds = %bb17759.i
+	br label %bb18032.i
+bb17772.i:		; preds = %bb17759.i
+	switch i32 %sf4083.0.i, label %bb17798.i [
+		 i32 1, label %bb17777.i
+		 i32 2, label %bb17790.i
+	]
+bb17777.i:		; preds = %bb17772.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17818.i
+		 i32 8, label %bb17818.i
+		 i32 11, label %bb17845.i
+	]
+bb17790.i:		; preds = %bb17772.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17818.i
+		 i32 8, label %bb17818.i
+		 i32 11, label %bb17845.i
+	]
+bb17798.i:		; preds = %bb17772.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17818.i
+		 i32 8, label %bb17818.i
+		 i32 11, label %bb17845.i
+	]
+bb17818.i:		; preds = %bb17798.i, %bb17798.i, %bb17790.i, %bb17790.i, %bb17777.i, %bb17777.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17845.i
+		 i32 11, label %bb17845.i
+		 i32 8, label %bb17946.i
+	]
+bb17845.i:		; preds = %bb17818.i, %bb17818.i, %bb17798.i, %bb17790.i, %bb17777.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17908.i
+		 i32 8, label %bb17946.i
+		 i32 11, label %bb17998.i
+	]
+bb17853.i:		; preds = %bb17757.i, %bb17757.i
+	br i1 false, label %bb17890.i, label %bb17903.i
+bb17890.i:		; preds = %bb17853.i
+	br label %bb17903.i
+bb17903.i:		; preds = %bb17890.i, %bb17853.i, %bb17757.i, %bb17749.i
+	switch i32 0, label %bb18032.i [
+		 i32 4, label %bb17908.i
+		 i32 8, label %bb17946.i
+		 i32 11, label %bb17998.i
+	]
+bb17908.i:		; preds = %bb17903.i, %bb17845.i
+	switch i32 %df4081.0.i, label %bb18386.i [
+		 i32 1, label %bb17913.i
+		 i32 2, label %bb17924.i
+		 i32 3, label %bb17935.i
+	]
+bb17913.i:		; preds = %bb17908.i
+	br label %bb18398.i
+bb17924.i:		; preds = %bb17908.i
+	br label %bb18398.i
+bb17935.i:		; preds = %bb17908.i
+	br label %bb18398.i
+bb17946.i:		; preds = %bb17903.i, %bb17845.i, %bb17818.i
+	switch i32 0, label %bb17962.i [
+		 i32 4, label %bb17958.i
+		 i32 11, label %bb17958.i
+	]
+bb17958.i:		; preds = %bb17946.i, %bb17946.i
+	br label %bb18398.i
+bb17962.i:		; preds = %bb17946.i
+	switch i32 %df4081.0.i, label %bb18386.i [
+		 i32 1, label %bb17967.i
+		 i32 2, label %bb17978.i
+		 i32 3, label %bb17989.i
+	]
+bb17967.i:		; preds = %bb17962.i
+	br label %bb18398.i
+bb17978.i:		; preds = %bb17962.i
+	br label %bb18398.i
+bb17989.i:		; preds = %bb17962.i
+	br label %bb18398.i
+bb17998.i:		; preds = %bb17903.i, %bb17845.i
+	switch i32 0, label %bb18386.i [
+		 i32 4, label %bb18010.i
+		 i32 8, label %bb18010.i
+		 i32 3, label %bb18026.i
+	]
+bb18010.i:		; preds = %bb17998.i, %bb17998.i
+	br label %bb18398.i
+bb18026.i:		; preds = %bb17998.i
+	br label %bb18398.i
+bb18032.i:		; preds = %bb17903.i, %bb17845.i, %bb17818.i, %bb17798.i, %bb17790.i, %bb17777.i, %bb17764.i
+	switch i32 %sf4083.0.i, label %bb18386.i [
+		 i32 10, label %bb18037.i
+		 i32 0, label %bb18095.i
+		 i32 1, label %bb18156.i
+		 i32 2, label %bb18240.i
+		 i32 3, label %bb18324.i
+	]
+bb18037.i:		; preds = %bb18032.i
+	switch i32 0, label %bb18081.i [
+		 i32 4, label %bb18042.i
+		 i32 8, label %bb18061.i
+		 i32 11, label %bb18077.i
+	]
+bb18042.i:		; preds = %bb18037.i
+	br label %bb18398.i
+bb18061.i:		; preds = %bb18037.i
+	br label %bb18398.i
+bb18077.i:		; preds = %bb18037.i
+	br label %bb18398.i
+bb18081.i:		; preds = %bb18037.i
+	br i1 false, label %bb18086.i, label %bb18386.i
+bb18086.i:		; preds = %bb18081.i
+	br label %bb18398.i
+bb18095.i:		; preds = %bb18032.i
+	switch i32 0, label %bb18133.i [
+		 i32 4, label %bb18100.i
+		 i32 8, label %bb18116.i
+		 i32 11, label %bb18129.i
+	]
+bb18100.i:		; preds = %bb18095.i
+	br label %bb18398.i
+bb18116.i:		; preds = %bb18095.i
+	br label %bb18398.i
+bb18129.i:		; preds = %bb18095.i
+	br label %bb18398.i
+bb18133.i:		; preds = %bb18095.i
+	br i1 false, label %bb18139.i, label %bb18142.i
+bb18139.i:		; preds = %bb18133.i
+	br label %bb18398.i
+bb18142.i:		; preds = %bb18133.i
+	br i1 false, label %bb18147.i, label %bb18386.i
+bb18147.i:		; preds = %bb18142.i
+	br label %bb18398.i
+bb18156.i:		; preds = %bb18032.i
+	switch i32 0, label %bb18206.i [
+		 i32 4, label %bb18161.i
+		 i32 8, label %bb18182.i
+		 i32 11, label %bb18200.i
+	]
+bb18161.i:		; preds = %bb18156.i
+	br label %bb18398.i
+bb18182.i:		; preds = %bb18156.i
+	br label %bb18398.i
+bb18200.i:		; preds = %bb18156.i
+	br label %bb18398.i
+bb18206.i:		; preds = %bb18156.i
+	switch i32 %df4081.0.i, label %bb18386.i [
+		 i32 0, label %bb18223.i
+		 i32 2, label %bb18223.i
+		 i32 10, label %bb18223.i
+		 i32 3, label %bb18231.i
+	]
+bb18223.i:		; preds = %bb18206.i, %bb18206.i, %bb18206.i
+	br label %bb18398.i
+bb18231.i:		; preds = %bb18206.i
+	br label %bb18398.i
+bb18240.i:		; preds = %bb18032.i
+	switch i32 0, label %bb18290.i [
+		 i32 4, label %bb18245.i
+		 i32 8, label %bb18266.i
+		 i32 11, label %bb18284.i
+	]
+bb18245.i:		; preds = %bb18240.i
+	br label %bb18398.i
+bb18266.i:		; preds = %bb18240.i
+	br label %bb18398.i
+bb18284.i:		; preds = %bb18240.i
+	br label %bb18398.i
+bb18290.i:		; preds = %bb18240.i
+	switch i32 %df4081.0.i, label %bb18386.i [
+		 i32 0, label %bb18307.i
+		 i32 1, label %bb18307.i
+		 i32 10, label %bb18307.i
+		 i32 3, label %bb18315.i
+	]
+bb18307.i:		; preds = %bb18290.i, %bb18290.i, %bb18290.i
+	br label %bb18398.i
+bb18315.i:		; preds = %bb18290.i
+	br label %bb18398.i
+bb18324.i:		; preds = %bb18032.i
+	switch i32 0, label %bb18386.i [
+		 i32 4, label %bb18329.i
+		 i32 8, label %bb18352.i
+		 i32 11, label %bb18370.i
+		 i32 10, label %bb18383.i
+	]
+bb18329.i:		; preds = %bb18324.i
+	br label %bb18398.i
+bb18352.i:		; preds = %bb18324.i
+	br label %bb18398.i
+bb18370.i:		; preds = %bb18324.i
+	br label %bb18398.i
+bb18383.i:		; preds = %bb18324.i
+	br label %bb18386.i
+bb18386.i:		; preds = %bb18383.i, %bb18324.i, %bb18290.i, %bb18206.i, %bb18142.i, %bb18081.i, %bb18032.i, %bb17998.i, %bb17962.i, %bb17908.i
+	br label %bb18398.i
+bb18398.i:		; preds = %bb18386.i, %bb18370.i, %bb18352.i, %bb18329.i, %bb18315.i, %bb18307.i, %bb18284.i, %bb18266.i, %bb18245.i, %bb18231.i, %bb18223.i, %bb18200.i, %bb18182.i, %bb18161.i, %bb18147.i, %bb18139.i, %bb18129.i, %bb18116.i, %bb18100.i, %bb18086.i, %bb18077.i, %bb18061.i, %bb18042.i, %bb18026.i, %bb18010.i, %bb17989.i, %bb17978.i, %bb17967.i, %bb17958.i, %bb17935.i, %bb17924.i, %bb17913.i
+	br i1 false, label %bb18589.i, label %bb18431.i
+bb18431.i:		; preds = %bb18398.i
+	switch i32 0, label %bb18589.i [
+		 i32 0, label %bb18433.i
+		 i32 1, label %bb18487.i
+		 i32 2, label %bb18487.i
+	]
+bb18433.i:		; preds = %bb18431.i
+	switch i32 0, label %bb18589.i [
+		 i32 4, label %bb18452.i
+		 i32 8, label %bb18452.i
+		 i32 11, label %bb18479.i
+	]
+bb18452.i:		; preds = %bb18433.i, %bb18433.i
+	switch i32 0, label %bb18589.i [
+		 i32 4, label %bb18479.i
+		 i32 11, label %bb18479.i
+	]
+bb18479.i:		; preds = %bb18452.i, %bb18452.i, %bb18433.i
+	br i1 false, label %bb18845.i, label %bb18592.i
+bb18487.i:		; preds = %bb18431.i, %bb18431.i
+	br i1 false, label %bb18492.i, label %bb18521.i
+bb18492.i:		; preds = %bb18487.i
+	br i1 false, label %bb18508.i, label %bb18529.i
+bb18508.i:		; preds = %bb18492.i
+	switch i32 0, label %bb18589.i [
+		 i32 4, label %bb18541.i
+		 i32 8, label %bb18541.i
+	]
+bb18521.i:		; preds = %bb18487.i
+	br label %bb18529.i
+bb18529.i:		; preds = %bb18521.i, %bb18492.i
+	switch i32 0, label %bb18589.i [
+		 i32 4, label %bb18541.i
+		 i32 8, label %bb18541.i
+	]
+bb18541.i:		; preds = %bb18529.i, %bb18529.i, %bb18508.i, %bb18508.i
+	br i1 false, label %bb18560.i, label %bb18589.i
+bb18560.i:		; preds = %bb18541.i
+	br i1 false, label %bb18576.i, label %bb18589.i
+bb18576.i:		; preds = %bb18560.i
+	br label %bb18589.i
+bb18589.i:		; preds = %bb18576.i, %bb18560.i, %bb18541.i, %bb18529.i, %bb18508.i, %bb18452.i, %bb18433.i, %bb18431.i, %bb18398.i
+	br i1 false, label %bb18845.i, label %bb18592.i
+bb18592.i:		; preds = %bb18589.i, %bb18479.i
+	switch i32 %dt4080.0.i, label %bb18809.i [
+		 i32 4, label %bb18845.i
+		 i32 8, label %bb18594.i
+		 i32 9, label %bb18619.i
+		 i32 10, label %bb18644.i
+		 i32 11, label %bb18644.i
+		 i32 14, label %bb18669.i
+		 i32 15, label %bb18702.i
+		 i32 18, label %bb18735.i
+		 i32 19, label %bb18768.i
+		 i32 0, label %bb18812.i
+		 i32 1, label %bb18804.i
+		 i32 2, label %bb18805.i
+		 i32 3, label %bb18806.i
+		 i32 5, label %bb18807.i
+		 i32 12, label %bb18808.i
+		 i32 13, label %bb18808.i
+		 i32 16, label %bb18812.i
+		 i32 17, label %bb18812.i
+	]
+bb18594.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18619.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18644.i:		; preds = %bb18592.i, %bb18592.i
+	br label %bb18851.i
+bb18669.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18702.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18735.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18768.i:		; preds = %bb18592.i
+	br label %bb18851.i
+bb18804.i:		; preds = %bb18592.i
+	br label %bb18812.i
+bb18805.i:		; preds = %bb18592.i
+	br label %bb18812.i
+bb18806.i:		; preds = %bb18592.i
+	br label %bb18812.i
+bb18807.i:		; preds = %bb18592.i
+	br label %bb18812.i
+bb18808.i:		; preds = %bb18592.i, %bb18592.i
+	br label %bb18812.i
+bb18809.i:		; preds = %bb18592.i
+	unreachable
+bb18812.i:		; preds = %bb18808.i, %bb18807.i, %bb18806.i, %bb18805.i, %bb18804.i, %bb18592.i, %bb18592.i, %bb18592.i
+	br label %bb18845.i
+bb18845.i:		; preds = %bb18812.i, %bb18592.i, %bb18589.i, %bb18479.i, %bb17227.i, %bb17195.i
+	br label %bb18851.i
+bb18851.i:		; preds = %bb18845.i, %bb18768.i, %bb18735.i, %bb18702.i, %bb18669.i, %bb18644.i, %bb18619.i, %bb18594.i, %bb17716.i, %bb17636.i, %bb17571.i, %bb17506.i, %bb17441.i, %bb17384.i, %bb17334.i, %bb17284.i, %bb17230.i, %glgScalarFloatConversion.exit
+	br label %storeColor_RGB_UI.exit
+storeColor_RGB_UI.exit:		; preds = %bb18851.i
+	br i1 false, label %bb19786.i, label %bb16650.i
+bb19786.i:		; preds = %storeColor_RGB_UI.exit
+	br label %bb19808.i
+bb19808.i:		; preds = %bb19786.i
+	br i1 false, label %bb19818.i, label %bb5276.i
+bb19818.i:		; preds = %bb19808.i
+	br i1 false, label %bb19840.i, label %bb19821.i
+bb19821.i:		; preds = %bb19818.i
+	br label %bb19840.i
+bb19840.i:		; preds = %bb19821.i, %bb19818.i
+	br i1 false, label %UnifiedReturnBlock.i, label %bb19843.i
+bb19843.i:		; preds = %bb19840.i
+	br label %t.exit
+UnifiedReturnBlock.i:		; preds = %bb19840.i, %bb4501.i
+	br label %t.exit
+t.exit:		; preds = %UnifiedReturnBlock.i, %bb19843.i, %bb4517.i, %bb4354.i
+	ret void
+}
diff --git a/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll b/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll
new file mode 100644
index 0000000000000..035af08cd40ac
--- /dev/null
+++ b/test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll
@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+	%struct.BiContextType = type { i16, i8, i32 }
+	%struct.Bitstream = type { i32, i32, i8, i32, i32, i8, i8, i32, i32, i8*, i32 }
+	%struct.DataPartition = type { %struct.Bitstream*, %struct.EncodingEnvironment, %struct.EncodingEnvironment }
+	%struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t* }
+	%struct.EncodingEnvironment = type { i32, i32, i32, i32, i32, i8*, i32*, i32, i32 }
+	%struct.ImageParameters = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8**, i8**, i32, i32***, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [9 x [16 x [16 x i16]]], [5 x [16 x [16 x i16]]], [9 x [8 x [8 x i16]]], [2 x [4 x [16 x [16 x i16]]]], [16 x [16 x i16]], [16 x [16 x i32]], i32****, i32***, i32***, i32***, i32****, i32****, %struct.Picture*, %struct.Slice*, %struct.Macroblock*, i32*, i32*, i32, i32, i32, i32, [4 x [4 x i32]], i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i16******, i16******, i16******, i16******, [15 x i16], i32, i32, i32, i32, i32, i32, i32, i32, [6 x [32 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [1 x i32], i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.DecRefPicMarking_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, double**, double***, i32***, double**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x [2 x i32]], [2 x i32], i32, i32, i16, i32, i32, i32, i32, i32 }
+	%struct.Macroblock = type { i32, i32, i32, [2 x i32], i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.MotionInfoContexts = type { [3 x [11 x %struct.BiContextType]], [2 x [9 x %struct.BiContextType]], [2 x [10 x %struct.BiContextType]], [2 x [6 x %struct.BiContextType]], [4 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x %struct.BiContextType] }
+	%struct.Picture = type { i32, i32, [100 x %struct.Slice*], i32, float, float, float }
+	%struct.Slice = type { i32, i32, i32, i32, i32, i32, %struct.DataPartition*, %struct.MotionInfoContexts*, %struct.TextureInfoContexts*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (i32)*, [3 x [2 x i32]] }
+	%struct.TextureInfoContexts = type { [2 x %struct.BiContextType], [4 x %struct.BiContextType], [3 x [4 x %struct.BiContextType]], [10 x [4 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [5 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]], [10 x [15 x %struct.BiContextType]] }
+@images = external global %struct.ImageParameters		; <%struct.ImageParameters*> [#uses=2]
+
+declare i8* @calloc(i32, i32)
+
+define fastcc void @init_global_buffers() nounwind {
+entry:
+	%tmp50.i.i = mul i32 0, 0		; <i32> [#uses=2]
+	br i1 false, label %init_orig_buffers.exit, label %cond_true.i29
+
+cond_true.i29:		; preds = %entry
+	%tmp17.i = load i32* getelementptr (%struct.ImageParameters* @images, i32 0, i32 20), align 8		; <i32> [#uses=1]
+	%tmp20.i27 = load i32* getelementptr (%struct.ImageParameters* @images, i32 0, i32 16), align 8		; <i32> [#uses=1]
+	%tmp8.i.i = select i1 false, i32 1, i32 0		; <i32> [#uses=1]
+	br label %bb.i8.us.i
+
+bb.i8.us.i:		; preds = %get_mem2Dpel.exit.i.us.i, %cond_true.i29
+	%j.04.i.us.i = phi i32 [ %indvar.next39.i, %get_mem2Dpel.exit.i.us.i ], [ 0, %cond_true.i29 ]		; <i32> [#uses=2]
+	%tmp13.i.us.i = getelementptr i16*** null, i32 %j.04.i.us.i		; <i16***> [#uses=0]
+	%tmp15.i.i.us.i = tail call i8* @calloc( i32 0, i32 2 )		; <i8*> [#uses=0]
+	store i16* null, i16** null, align 4
+	br label %bb.i.i.us.i
+
+get_mem2Dpel.exit.i.us.i:		; preds = %bb.i.i.us.i
+	%indvar.next39.i = add i32 %j.04.i.us.i, 1		; <i32> [#uses=2]
+	%exitcond40.i = icmp eq i32 %indvar.next39.i, 2		; <i1> [#uses=1]
+	br i1 %exitcond40.i, label %get_mem3Dpel.exit.split.i, label %bb.i8.us.i
+
+bb.i.i.us.i:		; preds = %bb.i.i.us.i, %bb.i8.us.i
+	%exitcond.i = icmp eq i32 0, %tmp8.i.i		; <i1> [#uses=1]
+	br i1 %exitcond.i, label %get_mem2Dpel.exit.i.us.i, label %bb.i.i.us.i
+
+get_mem3Dpel.exit.split.i:		; preds = %get_mem2Dpel.exit.i.us.i
+	%tmp30.i.i = shl i32 %tmp17.i, 2		; <i32> [#uses=1]
+	%tmp31.i.i = mul i32 %tmp30.i.i, %tmp20.i27		; <i32> [#uses=1]
+	%tmp23.i31 = add i32 %tmp31.i.i, %tmp50.i.i		; <i32> [#uses=1]
+	br label %init_orig_buffers.exit
+
+init_orig_buffers.exit:		; preds = %get_mem3Dpel.exit.split.i, %entry
+	%memory_size.0.i = phi i32 [ %tmp23.i31, %get_mem3Dpel.exit.split.i ], [ %tmp50.i.i, %entry ]		; <i32> [#uses=1]
+	%tmp41 = add i32 0, %memory_size.0.i		; <i32> [#uses=0]
+	unreachable
+}
diff --git a/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll b/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll
new file mode 100644
index 0000000000000..e98126bf87aa9
--- /dev/null
+++ b/test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+	%struct.Decoders = type { i32**, i16***, i16****, i16***, i16**, i8**, i8** }
+@decoders = external global %struct.Decoders		; <%struct.Decoders*> [#uses=1]
+
+declare i8* @calloc(i32, i32)
+
+declare fastcc i32 @get_mem2Dint(i32***, i32, i32)
+
+define fastcc void @init_global_buffers() nounwind {
+entry:
+	%tmp151 = tail call fastcc i32 @get_mem2Dint( i32*** getelementptr (%struct.Decoders* @decoders, i32 0, i32 0), i32 16, i32 16 )		; <i32> [#uses=1]
+	%tmp158 = tail call i8* @calloc( i32 0, i32 4 )		; <i8*> [#uses=0]
+	br i1 false, label %cond_true166, label %bb190.preheader
+
+bb190.preheader:		; preds = %entry
+	%memory_size.3555 = add i32 0, %tmp151		; <i32> [#uses=0]
+	unreachable
+
+cond_true166:		; preds = %entry
+	unreachable
+}
diff --git a/test/CodeGen/ARM/2008-07-17-Fdiv.ll b/test/CodeGen/ARM/2008-07-17-Fdiv.ll
new file mode 100644
index 0000000000000..aa75970418a60
--- /dev/null
+++ b/test/CodeGen/ARM/2008-07-17-Fdiv.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define float @f(float %a, float %b) nounwind  {
+	%tmp = fdiv float %a, %b
+	ret float %tmp
+}
diff --git a/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll b/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll
new file mode 100644
index 0000000000000..6ea75eb5c79c5
--- /dev/null
+++ b/test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=arm
+; PR2589
+
+define void @main({ i32 }*) {
+entry:
+	%sret1 = alloca { i32 }		; <{ i32 }*> [#uses=1]
+	load { i32 }* %sret1		; <{ i32 }>:1 [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll b/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll
new file mode 100644
index 0000000000000..0a79e8665a75e
--- /dev/null
+++ b/test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
+
+	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+	%struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }
+	%struct.__sFILEX = type opaque
+	%struct.__sbuf = type { i8*, i32 }
+@__gcov_var = common global %struct.__gcov_var zeroinitializer		; <%struct.__gcov_var*> [#uses=1]
+
+define i32 @__gcov_close() nounwind {
+entry:
+	load i32* getelementptr (%struct.__gcov_var* @__gcov_var, i32 0, i32 5), align 4		; <i32>:0 [#uses=1]
+	ret i32 %0
+}
diff --git a/test/CodeGen/ARM/2008-09-14-CoaleserBug.ll b/test/CodeGen/ARM/2008-09-14-CoaleserBug.ll
new file mode 100644
index 0000000000000..c601b90e0710c
--- /dev/null
+++ b/test/CodeGen/ARM/2008-09-14-CoaleserBug.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+@"\01LC1" = external constant [288 x i8]		; <[288 x i8]*> [#uses=1]
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+define i32 @main(i32 %argc, i8** %argv) nounwind {
+entry:
+	br label %bb.i
+
+bb.i:		; preds = %bb.i, %entry
+	%i.01.i = phi i32 [ 0, %entry ], [ %indvar.next52, %bb.i ]		; <i32> [#uses=1]
+	%indvar.next52 = add i32 %i.01.i, 1		; <i32> [#uses=2]
+	%exitcond53 = icmp eq i32 %indvar.next52, 15		; <i1> [#uses=1]
+	br i1 %exitcond53, label %bb.i33.loopexit, label %bb.i
+
+bb.i33.loopexit:		; preds = %bb.i
+	%0 = malloc [347 x i8]		; <[347 x i8]*> [#uses=2]
+	%.sub = getelementptr [347 x i8]* %0, i32 0, i32 0		; <i8*> [#uses=1]
+	call void @llvm.memcpy.i32( i8* %.sub, i8* getelementptr ([288 x i8]* @"\01LC1", i32 0, i32 0), i32 287, i32 1 ) nounwind
+	br label %bb.i28
+
+bb.i28:		; preds = %bb.i28, %bb.i33.loopexit
+	br i1 false, label %repeat_fasta.exit, label %bb.i28
+
+repeat_fasta.exit:		; preds = %bb.i28
+	free [347 x i8]* %0
+	unreachable
+}
diff --git a/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
new file mode 100644
index 0000000000000..b3ea6fc5945fc
--- /dev/null
+++ b/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define void @gcov_exit() nounwind {
+entry:
+	br i1 false, label %bb24, label %bb33.thread
+
+bb24:		; preds = %entry
+	br label %bb39
+
+bb33.thread:		; preds = %entry
+	%0 = alloca i8, i32 0		; <i8*> [#uses=1]
+	br label %bb39
+
+bb39:		; preds = %bb33.thread, %bb24
+	%.reg2mem.0 = phi i8* [ %0, %bb33.thread ], [ null, %bb24 ]		; <i8*> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll b/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll
new file mode 100644
index 0000000000000..164e9643f170a
--- /dev/null
+++ b/test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
+
+define hidden i64 @__muldi3(i64 %u, i64 %v) nounwind {
+entry:
+	%0 = trunc i64 %u to i32		; <i32> [#uses=1]
+	%asmtmp = tail call { i32, i32, i32, i32, i32 } asm "@ Inlined umul_ppmm\0A\09mov\09$2, $5, lsr #16\0A\09mov\09$0, $6, lsr #16\0A\09bic\09$3, $5, $2, lsl #16\0A\09bic\09$4, $6, $0, lsl #16\0A\09mul\09$1, $3, $4\0A\09mul\09$4, $2, $4\0A\09mul\09$3, $0, $3\0A\09mul\09$0, $2, $0\0A\09adds\09$3, $4, $3\0A\09addcs\09$0, $0, #65536\0A\09adds\09$1, $1, $3, lsl #16\0A\09adc\09$0, $0, $3, lsr #16", "=&r,=r,=&r,=&r,=r,r,r,~{cc}"(i32 %0, i32 0) nounwind		; <{ i32, i32, i32, i32, i32 }> [#uses=1]
+	%asmresult1 = extractvalue { i32, i32, i32, i32, i32 } %asmtmp, 1		; <i32> [#uses=1]
+	%asmresult116 = zext i32 %asmresult1 to i64		; <i64> [#uses=1]
+	%asmresult116.ins = or i64 0, %asmresult116		; <i64> [#uses=1]
+	%1 = lshr i64 %v, 32		; <i64> [#uses=1]
+	%2 = mul i64 %1, %u		; <i64> [#uses=1]
+	%3 = add i64 %2, 0		; <i64> [#uses=1]
+	%4 = shl i64 %3, 32		; <i64> [#uses=1]
+	%5 = add i64 %asmresult116.ins, %4		; <i64> [#uses=1]
+	ret i64 %5
+}
diff --git a/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll b/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll
new file mode 100644
index 0000000000000..7b7ea6bcc493f
--- /dev/null
+++ b/test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll
@@ -0,0 +1,414 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 184
+
+	%"struct.Adv5::Ekin<3>" = type <{ i8 }>
+	%"struct.Adv5::X::Energyflux<3>" = type { double }
+	%"struct.BinaryNode<OpAdd,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > >" = type { %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" }
+	%"struct.BinaryNode<OpAdd,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > >" = type { %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >" }
+	%"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >" = type { %"struct.Adv5::X::Energyflux<3>", %"struct.BinaryNode<OpAdd,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > >" }
+	%"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > >" = type { %"struct.Adv5::X::Energyflux<3>", %"struct.BinaryNode<OpAdd,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > >" }
+	%"struct.Centering<3>" = type { i32, i32, %"struct.std::vector<Loc<3>,std::allocator<Loc<3> > >", %"struct.std::vector<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >" }
+	%"struct.ContextMapper<1>" = type { i32 (...)** }
+	%"struct.DataBlockController<double>" = type { %"struct.RefBlockController<double>", %"struct.Adv5::Ekin<3>"*, i8, %"struct.SingleObservable<int>", i32 }
+	%"struct.DataBlockPtr<double,false>" = type { %"struct.RefCountedBlockPtr<double,false,DataBlockController<double> >" }
+	%"struct.Domain<1,DomainTraits<Interval<1> > >" = type { %"struct.DomainBase<DomainTraits<Interval<1> > >" }
+	%"struct.Domain<1,DomainTraits<Loc<1> > >" = type { %"struct.DomainBase<DomainTraits<Loc<1> > >" }
+	%"struct.Domain<1,DomainTraits<Range<1> > >" = type { %"struct.DomainBase<DomainTraits<Range<1> > >" }
+	%"struct.Domain<3,DomainTraits<Interval<3> > >" = type { %"struct.DomainBase<DomainTraits<Interval<3> > >" }
+	%"struct.Domain<3,DomainTraits<Loc<3> > >" = type { %"struct.DomainBase<DomainTraits<Loc<3> > >" }
+	%"struct.Domain<3,DomainTraits<Range<3> > >" = type { %"struct.DomainBase<DomainTraits<Range<3> > >" }
+	%"struct.DomainBase<DomainTraits<Interval<1> > >" = type { [2 x i32] }
+	%"struct.DomainBase<DomainTraits<Interval<3> > >" = type { [3 x %"struct.WrapNoInit<Interval<1> >"] }
+	%"struct.DomainBase<DomainTraits<Loc<1> > >" = type { i32 }
+	%"struct.DomainBase<DomainTraits<Loc<3> > >" = type { [3 x %"struct.WrapNoInit<Loc<1> >"] }
+	%"struct.DomainBase<DomainTraits<Range<1> > >" = type { [3 x i32] }
+	%"struct.DomainBase<DomainTraits<Range<3> > >" = type { [3 x %"struct.WrapNoInit<Range<1> >"] }
+	%"struct.DomainLayout<3>" = type { %"struct.Node<Interval<3>,Interval<3> >" }
+	%"struct.DomainMap<Interval<1>,int>" = type { i32, %"struct.DomainMapNode<Interval<1>,int>"*, %"struct.DomainMapIterator<Interval<1>,int>" }
+	%"struct.DomainMapIterator<Interval<1>,int>" = type { %"struct.DomainMapNode<Interval<1>,int>"*, %"struct.std::_List_const_iterator<Interval<3> >" }
+	%"struct.DomainMapNode<Interval<1>,int>" = type { %"struct.Interval<1>", %"struct.DomainMapNode<Interval<1>,int>"*, %"struct.DomainMapNode<Interval<1>,int>"*, %"struct.DomainMapNode<Interval<1>,int>"*, %"struct.std::list<Interval<3>,std::allocator<Interval<3> > >" }
+	%"struct.Engine<3,Zero<double>,ConstantFunction>" = type { %"struct.Adv5::Ekin<3>", %"struct.Interval<3>", [3 x i32] }
+	%"struct.Engine<3,double,Brick>" = type { %"struct.Pooma::BrickBase<3>", %"struct.DataBlockPtr<double,false>", double* }
+	%"struct.Engine<3,double,BrickView>" = type { %"struct.Pooma::BrickViewBase<3>", %"struct.DataBlockPtr<double,false>", double* }
+	%"struct.Engine<3,double,ConstantFunction>" = type { double, %"struct.Interval<3>", [3 x i32] }
+	%"struct.Engine<3,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >" = type { %"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >", %"struct.Interval<3>" }
+	%"struct.Engine<3,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >" = type { %"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > >", %"struct.Interval<3>" }
+	%"struct.Engine<3,double,MultiPatch<GridTag, Remote<Brick> > >" = type { %"struct.ContextMapper<1>", %"struct.GridLayout<3>", %"struct.RefCountedBlockPtr<Engine<3, double, Remote<Brick> >,false,RefBlockController<Engine<3, double, Remote<Brick> > > >", i32* }
+	%"struct.Engine<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" = type { %"struct.GridLayoutView<3,3>", %"struct.Engine<3,double,MultiPatch<GridTag, Remote<Brick> > >" }
+	%"struct.Engine<3,double,Remote<Brick> >" = type { %"struct.Interval<3>", i32, %"struct.RefCountedPtr<Shared<Engine<3, double, Brick> > >" }
+	%"struct.Engine<3,double,Remote<BrickView> >" = type { %"struct.Interval<3>", i32, %"struct.RefCountedPtr<Shared<Engine<3, double, BrickView> > >" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,Zero<double>,ConstantFunction>" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,Zero<double>,ConstantFunction>" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" }
+	%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >" = type { %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >" }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,Zero<double>,ConstantFunction>" = type { i32, %"struct.Centering<3>", i32, %"struct.RefCountedBlockPtr<FieldEngineBaseData<3, Zero<double>, ConstantFunction>,false,RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> > >", %"struct.Interval<3>", %"struct.GuardLayers<3>", %"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>" = type { i32, %"struct.Centering<3>", i32, %"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, ConstantFunction>,false,RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> > >", %"struct.Interval<3>", %"struct.GuardLayers<3>", %"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >" = type { %"struct.Engine<3,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >" = type { %"struct.Engine<3,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"* }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >" = type { i32, %"struct.Centering<3>", i32, %"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > >,false,RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > > >", %"struct.Interval<3>", %"struct.GuardLayers<3>", %"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" = type { i32, %"struct.Centering<3>", i32, %"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> >,false,RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >", %"struct.Interval<3>", %"struct.GuardLayers<3>", %"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" }
+	%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >" = type { i32, %"struct.Centering<3>", i32, %"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, Remote<BrickView> >,false,RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > > >", %"struct.Interval<3>", %"struct.GuardLayers<3>", %"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" }
+	%"struct.FieldEngineBaseData<3,Zero<double>,ConstantFunction>" = type { %"struct.Engine<3,Zero<double>,ConstantFunction>", %struct.RelationList }
+	%"struct.FieldEngineBaseData<3,double,ConstantFunction>" = type { %"struct.Engine<3,double,ConstantFunction>", %struct.RelationList }
+	%"struct.FieldEngineBaseData<3,double,MultiPatch<GridTag, Remote<Brick> > >" = type { %"struct.Engine<3,double,MultiPatch<GridTag, Remote<Brick> > >", %struct.RelationList }
+	%"struct.FieldEngineBaseData<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >" = type { %"struct.Engine<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >", %struct.RelationList }
+	%"struct.FieldEngineBaseData<3,double,Remote<BrickView> >" = type { %"struct.Engine<3,double,Remote<BrickView> >", %struct.RelationList }
+	%struct.GlobalIDDataBase = type { %"struct.std::vector<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >", %"struct.std::map<int,InformStream*,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >" }
+	%"struct.GlobalIDDataBase::Pack" = type { i32, i32, i32, i32 }
+	%"struct.GridLayout<3>" = type { %"struct.ContextMapper<1>", %"struct.LayoutBase<3,GridLayoutData<3> >", %"struct.Observable<GridLayout<3> >" }
+	%"struct.GridLayoutData<3>" = type { %"struct.LayoutBaseData<3>", %struct.RefCounted, [21 x i8], i8, [3 x i32], [3 x %"struct.DomainMap<Interval<1>,int>"], [3 x %"struct.DomainMap<Interval<1>,int>"] }
+	%"struct.GridLayoutView<3,3>" = type { %"struct.LayoutBaseView<3,3,GridLayoutViewData<3, 3> >" }
+	%"struct.GridLayoutViewData<3,3>" = type { %"struct.LayoutBaseViewData<3,3,GridLayout<3> >", %struct.RefCounted }
+	%"struct.GuardLayers<3>" = type { [3 x i32], [3 x i32] }
+	%"struct.INode<3>" = type { %"struct.Interval<3>", %struct.GlobalIDDataBase*, i32 }
+	%"struct.Interval<1>" = type { %"struct.Domain<1,DomainTraits<Interval<1> > >" }
+	%"struct.Interval<3>" = type { %"struct.Domain<3,DomainTraits<Interval<3> > >" }
+	%"struct.LayoutBase<3,GridLayoutData<3> >" = type { %"struct.RefCountedPtr<GridLayoutData<3> >" }
+	%"struct.LayoutBaseData<3>" = type { i32, %"struct.Interval<3>", %"struct.Interval<3>", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", i8, i8, %"struct.GuardLayers<3>", %"struct.GuardLayers<3>", %"struct.std::vector<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >", [3 x i32], [3 x i32], %"struct.Loc<3>" }
+	%"struct.LayoutBaseData<3>::GCFillInfo" = type { %"struct.Interval<3>", i32, i32, i32 }
+	%"struct.LayoutBaseView<3,3,GridLayoutViewData<3, 3> >" = type { %"struct.RefCountedPtr<GridLayoutViewData<3, 3> >" }
+	%"struct.LayoutBaseViewData<3,3,GridLayout<3> >" = type { i32, %"struct.GridLayout<3>", %"struct.GuardLayers<3>", %"struct.GuardLayers<3>", %"struct.ViewIndexer<3,3>", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", %"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >", i8 }
+	%"struct.Loc<1>" = type { %"struct.Domain<1,DomainTraits<Loc<1> > >" }
+	%"struct.Loc<3>" = type { %"struct.Domain<3,DomainTraits<Loc<3> > >" }
+	%"struct.MultiArg6<Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, ConstantFunction>,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, Zero<double>, ConstantFunction> >" = type { %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>", %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,Zero<double>,ConstantFunction>" }
+	%"struct.NoMeshData<3>" = type { %struct.RefCounted, %"struct.Interval<3>", %"struct.Interval<3>", %"struct.Interval<3>", %"struct.Interval<3>" }
+	%"struct.Node<Interval<3>,Interval<3> >" = type { %"struct.Interval<3>", %"struct.Interval<3>", i32, i32, i32, i32 }
+	%"struct.Observable<GridLayout<3> >" = type { %"struct.GridLayout<3>"*, %"struct.std::vector<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >", i32, %"struct.Adv5::Ekin<3>" }
+	%"struct.Pooma::BrickBase<3>" = type { %"struct.DomainLayout<3>", [3 x i32], [3 x i32], i32, i8 }
+	%"struct.Pooma::BrickViewBase<3>" = type { %"struct.Interval<3>", [3 x i32], [3 x i32], i32, i8 }
+	%"struct.Range<1>" = type { %"struct.Domain<1,DomainTraits<Range<1> > >" }
+	%"struct.Range<3>" = type { %"struct.Domain<3,DomainTraits<Range<3> > >" }
+	%"struct.RefBlockController<Engine<3, double, Remote<Brick> > >" = type { %struct.RefCounted, %"struct.Engine<3,double,Remote<Brick> >"*, %"struct.Engine<3,double,Remote<Brick> >"*, %"struct.Engine<3,double,Remote<Brick> >"*, i8 }
+	%"struct.RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> >" = type { %struct.RefCounted, %"struct.FieldEngineBaseData<3,Zero<double>,ConstantFunction>"*, %"struct.FieldEngineBaseData<3,Zero<double>,ConstantFunction>"*, %"struct.FieldEngineBaseData<3,Zero<double>,ConstantFunction>"*, i8 }
+	%"struct.RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> >" = type { %struct.RefCounted, %"struct.FieldEngineBaseData<3,double,ConstantFunction>"*, %"struct.FieldEngineBaseData<3,double,ConstantFunction>"*, %"struct.FieldEngineBaseData<3,double,ConstantFunction>"*, i8 }
+	%"struct.RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > >" = type { %struct.RefCounted, %"struct.FieldEngineBaseData<3,double,MultiPatch<GridTag, Remote<Brick> > >"*, %"struct.FieldEngineBaseData<3,double,MultiPatch<GridTag, Remote<Brick> > >"*, %"struct.FieldEngineBaseData<3,double,MultiPatch<GridTag, Remote<Brick> > >"*, i8 }
+	%"struct.RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > >" = type { %struct.RefCounted, %"struct.FieldEngineBaseData<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*, %"struct.FieldEngineBaseData<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*, %"struct.FieldEngineBaseData<3,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*, i8 }
+	%"struct.RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > >" = type { %struct.RefCounted, %"struct.FieldEngineBaseData<3,double,Remote<BrickView> >"*, %"struct.FieldEngineBaseData<3,double,Remote<BrickView> >"*, %"struct.FieldEngineBaseData<3,double,Remote<BrickView> >"*, i8 }
+	%"struct.RefBlockController<double>" = type { %struct.RefCounted, double*, double*, double*, i8 }
+	%struct.RefCounted = type { i32, %"struct.Adv5::Ekin<3>" }
+	%"struct.RefCountedBlockPtr<Engine<3, double, Remote<Brick> >,false,RefBlockController<Engine<3, double, Remote<Brick> > > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<Engine<3, double, Remote<Brick> > > >" }
+	%"struct.RefCountedBlockPtr<FieldEngineBaseData<3, Zero<double>, ConstantFunction>,false,RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> > >" }
+	%"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, ConstantFunction>,false,RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> > >" }
+	%"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > >,false,RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > > >" }
+	%"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> >,false,RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >" }
+	%"struct.RefCountedBlockPtr<FieldEngineBaseData<3, double, Remote<BrickView> >,false,RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > > >" = type { i32, %"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > > >" }
+	%"struct.RefCountedBlockPtr<double,false,DataBlockController<double> >" = type { i32, %"struct.RefCountedPtr<DataBlockController<double> >" }
+	%"struct.RefCountedPtr<DataBlockController<double> >" = type { %"struct.DataBlockController<double>"* }
+	%"struct.RefCountedPtr<GridLayoutData<3> >" = type { %"struct.GridLayoutData<3>"* }
+	%"struct.RefCountedPtr<GridLayoutViewData<3, 3> >" = type { %"struct.GridLayoutViewData<3,3>"* }
+	%"struct.RefCountedPtr<RefBlockController<Engine<3, double, Remote<Brick> > > >" = type { %"struct.RefBlockController<Engine<3, double, Remote<Brick> > >"* }
+	%"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> > >" = type { %"struct.RefBlockController<FieldEngineBaseData<3, Zero<double>, ConstantFunction> >"* }
+	%"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> > >" = type { %"struct.RefBlockController<FieldEngineBaseData<3, double, ConstantFunction> >"* }
+	%"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > > >" = type { %"struct.RefBlockController<FieldEngineBaseData<3, double, MultiPatch<GridTag, Remote<Brick> > > >"* }
+	%"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >" = type { %"struct.RefBlockController<FieldEngineBaseData<3, double, MultiPatchView<GridTag, Remote<Brick>, 3> > >"* }
+	%"struct.RefCountedPtr<RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > > >" = type { %"struct.RefBlockController<FieldEngineBaseData<3, double, Remote<BrickView> > >"* }
+	%"struct.RefCountedPtr<RelationListData>" = type { %struct.RelationListData* }
+	%"struct.RefCountedPtr<Shared<Engine<3, double, Brick> > >" = type { %"struct.Shared<Engine<3, double, Brick> >"* }
+	%"struct.RefCountedPtr<Shared<Engine<3, double, BrickView> > >" = type { %"struct.Shared<Engine<3, double, BrickView> >"* }
+	%"struct.RefCountedPtr<UniformRectilinearMeshData<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> > >" = type { %"struct.UniformRectilinearMeshData<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >"* }
+	%struct.RelationList = type { %"struct.RefCountedPtr<RelationListData>" }
+	%struct.RelationListData = type { %struct.RefCounted, %"struct.std::vector<RelationListItem*,std::allocator<RelationListItem*> >" }
+	%struct.RelationListItem = type { i32 (...)**, i32, i32, i8 }
+	%"struct.Shared<Engine<3, double, Brick> >" = type { %struct.RefCounted, %"struct.Engine<3,double,Brick>" }
+	%"struct.Shared<Engine<3, double, BrickView> >" = type { %struct.RefCounted, %"struct.Engine<3,double,BrickView>" }
+	%"struct.SingleObservable<int>" = type { %"struct.ContextMapper<1>"* }
+	%"struct.UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" = type { %"struct.RefCountedPtr<UniformRectilinearMeshData<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> > >" }
+	%"struct.UniformRectilinearMeshData<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >" = type { %"struct.NoMeshData<3>", %"struct.Vector<3,double,Full>", %"struct.Vector<3,double,Full>" }
+	%"struct.Vector<3,double,Full>" = type { %"struct.VectorEngine<3,double,Full>" }
+	%"struct.VectorEngine<3,double,Full>" = type { [3 x double] }
+	%"struct.ViewIndexer<3,3>" = type { %"struct.Interval<3>", %"struct.Range<3>", [3 x i32], [3 x i32], %"struct.Loc<3>" }
+	%"struct.WrapNoInit<Interval<1> >" = type { %"struct.Interval<1>" }
+	%"struct.WrapNoInit<Loc<1> >" = type { %"struct.Loc<1>" }
+	%"struct.WrapNoInit<Range<1> >" = type { %"struct.Range<1>" }
+	%"struct.std::_List_base<Interval<3>,std::allocator<Interval<3> > >" = type { %"struct.std::_List_base<Interval<3>,std::allocator<Interval<3> > >::_List_impl" }
+	%"struct.std::_List_base<Interval<3>,std::allocator<Interval<3> > >::_List_impl" = type { %"struct.std::_List_node_base" }
+	%"struct.std::_List_const_iterator<Interval<3> >" = type { %"struct.std::_List_node_base"* }
+	%"struct.std::_List_node_base" = type { %"struct.std::_List_node_base"*, %"struct.std::_List_node_base"* }
+	%"struct.std::_Rb_tree<int,std::pair<const int, InformStream*>,std::_Select1st<std::pair<const int, InformStream*> >,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >" = type { %"struct.std::_Rb_tree<int,std::pair<const int, InformStream*>,std::_Select1st<std::pair<const int, InformStream*> >,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >::_Rb_tree_impl<std::less<int>,false>" }
+	%"struct.std::_Rb_tree<int,std::pair<const int, InformStream*>,std::_Select1st<std::pair<const int, InformStream*> >,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >::_Rb_tree_impl<std::less<int>,false>" = type { %"struct.Adv5::Ekin<3>", %"struct.std::_Rb_tree_node_base", i32 }
+	%"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
+	%"struct.std::_Vector_base<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >" = type { %"struct.std::_Vector_base<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >::_Vector_impl" }
+	%"struct.std::_Vector_base<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >::_Vector_impl" = type { %"struct.GlobalIDDataBase::Pack"*, %"struct.GlobalIDDataBase::Pack"*, %"struct.GlobalIDDataBase::Pack"* }
+	%"struct.std::_Vector_base<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >" = type { %"struct.std::_Vector_base<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >::_Vector_impl" }
+	%"struct.std::_Vector_base<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >::_Vector_impl" = type { %"struct.LayoutBaseData<3>::GCFillInfo"*, %"struct.LayoutBaseData<3>::GCFillInfo"*, %"struct.LayoutBaseData<3>::GCFillInfo"* }
+	%"struct.std::_Vector_base<Loc<3>,std::allocator<Loc<3> > >" = type { %"struct.std::_Vector_base<Loc<3>,std::allocator<Loc<3> > >::_Vector_impl" }
+	%"struct.std::_Vector_base<Loc<3>,std::allocator<Loc<3> > >::_Vector_impl" = type { %"struct.Loc<3>"*, %"struct.Loc<3>"*, %"struct.Loc<3>"* }
+	%"struct.std::_Vector_base<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >" = type { %"struct.std::_Vector_base<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >::_Vector_impl" }
+	%"struct.std::_Vector_base<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >::_Vector_impl" = type { %"struct.Node<Interval<3>,Interval<3> >"**, %"struct.Node<Interval<3>,Interval<3> >"**, %"struct.Node<Interval<3>,Interval<3> >"** }
+	%"struct.std::_Vector_base<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >" = type { %"struct.std::_Vector_base<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >::_Vector_impl" }
+	%"struct.std::_Vector_base<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >::_Vector_impl" = type { %"struct.ContextMapper<1>"**, %"struct.ContextMapper<1>"**, %"struct.ContextMapper<1>"** }
+	%"struct.std::_Vector_base<RelationListItem*,std::allocator<RelationListItem*> >" = type { %"struct.std::_Vector_base<RelationListItem*,std::allocator<RelationListItem*> >::_Vector_impl" }
+	%"struct.std::_Vector_base<RelationListItem*,std::allocator<RelationListItem*> >::_Vector_impl" = type { %struct.RelationListItem**, %struct.RelationListItem**, %struct.RelationListItem** }
+	%"struct.std::_Vector_base<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >" = type { %"struct.std::_Vector_base<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >::_Vector_impl" }
+	%"struct.std::_Vector_base<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >::_Vector_impl" = type { %"struct.Vector<3,double,Full>"*, %"struct.Vector<3,double,Full>"*, %"struct.Vector<3,double,Full>"* }
+	%"struct.std::list<Interval<3>,std::allocator<Interval<3> > >" = type { %"struct.std::_List_base<Interval<3>,std::allocator<Interval<3> > >" }
+	%"struct.std::map<int,InformStream*,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >" = type { %"struct.std::_Rb_tree<int,std::pair<const int, InformStream*>,std::_Select1st<std::pair<const int, InformStream*> >,std::less<int>,std::allocator<std::pair<const int, InformStream*> > >" }
+	%"struct.std::vector<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >" = type { %"struct.std::_Vector_base<GlobalIDDataBase::Pack,std::allocator<GlobalIDDataBase::Pack> >" }
+	%"struct.std::vector<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >" = type { %"struct.std::_Vector_base<LayoutBaseData<3>::GCFillInfo,std::allocator<LayoutBaseData<3>::GCFillInfo> >" }
+	%"struct.std::vector<Loc<3>,std::allocator<Loc<3> > >" = type { %"struct.std::_Vector_base<Loc<3>,std::allocator<Loc<3> > >" }
+	%"struct.std::vector<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >" = type { %"struct.std::_Vector_base<Node<Interval<3>, Interval<3> >*,std::allocator<Node<Interval<3>, Interval<3> >*> >" }
+	%"struct.std::vector<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >" = type { %"struct.std::_Vector_base<Observer<GridLayout<3> >*,std::allocator<Observer<GridLayout<3> >*> >" }
+	%"struct.std::vector<RelationListItem*,std::allocator<RelationListItem*> >" = type { %"struct.std::_Vector_base<RelationListItem*,std::allocator<RelationListItem*> >" }
+	%"struct.std::vector<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >" = type { %"struct.std::_Vector_base<Vector<3, double, Full>,std::allocator<Vector<3, double, Full> > >" }
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind
+
+declare fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEEC1ERKSC_(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*) nounwind
+
+declare fastcc void @_ZN9CenteringILi3EEC1ERKS0_i(%"struct.Centering<3>"*, %"struct.Centering<3>"*, i32) nounwind
+
+declare fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEED1Ev(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"*) nounwind
+
+declare fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEEC1Id14MultiPatchViewI7GridTagS6_I5BrickELi3EEEERKS_IS5_T_T0_ERK5INodeILi3EE(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"*, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*, %"struct.INode<3>"*) nounwind
+
+declare fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEED1Ev(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*) nounwind
+
+declare fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEEC1Id10MultiPatchIS7_SA_EEERKS_IS5_T_T0_ERK8IntervalILi3EE(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*, %"struct.Interval<3>"*) nounwind
+
+define fastcc void @t(double %dt, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %rh, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %T, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %v, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %pg, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %ph, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %cs, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>"* %cv, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,Zero<double>,ConstantFunction>"* %dlmdlt, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ConstantFunction>"* %xmue, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %vint, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %cent, %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %fvis, double %c_nr, double %c_av, i8 zeroext %cartvis_f) nounwind {
+entry:
+	%0 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"*> [#uses=4]
+	%s.i.i.i.i.i = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%1 = alloca %"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >"		; <%"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >"*> [#uses=2]
+	%multiArg.i = alloca %"struct.MultiArg6<Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, ConstantFunction>,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, Zero<double>, ConstantFunction> >"		; <%"struct.MultiArg6<Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatch<GridTag, Remote<Brick> > >,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, ConstantFunction>,Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, Zero<double>, ConstantFunction> >"*> [#uses=0]
+	%2 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=6]
+	%3 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=2]
+	%4 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=0]
+	%5 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=2]
+	%6 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=0]
+	%7 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%8 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%9 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%10 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%11 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%12 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%13 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%14 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%15 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%16 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%17 = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%18 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%19 = alloca double		; <double*> [#uses=0]
+	%20 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=0]
+	%21 = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%22 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=0]
+	%23 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=0]
+	%24 = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%25 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%26 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%27 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%28 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%29 = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%30 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%31 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%32 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%33 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%34 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%35 = alloca %"struct.Interval<3>"		; <%"struct.Interval<3>"*> [#uses=0]
+	%36 = alloca %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"		; <%"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=0]
+	%37 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %v, i32 0, i32 0, i32 5		; <%"struct.GuardLayers<3>"*> [#uses=1]
+	%38 = bitcast %"struct.GuardLayers<3>"* %37 to i8*		; <i8*> [#uses=1]
+	br label %bb.i.i.i.i.i
+
+bb.i.i.i.i.i:		; preds = %bb.i.i.i.i.i, %entry
+	%39 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %39, label %_ZN14ScalarCodeInfoILi3ELi4EEC1Ev.exit.i, label %bb.i.i.i.i.i
+
+_ZN14ScalarCodeInfoILi3ELi4EEC1Ev.exit.i:		; preds = %bb.i.i.i.i.i
+	br label %bb.i.i.i35.i.i34
+
+bb.i.i.i35.i.i34:		; preds = %bb.i.i.i35.i.i34, %_ZN14ScalarCodeInfoILi3ELi4EEC1Ev.exit.i
+	%40 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %40, label %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i37, label %bb.i.i.i35.i.i34
+
+_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i37:		; preds = %bb.i.i.i35.i.i34
+	br label %bb.i.i.i19.i.i47
+
+bb.i.i.i19.i.i47:		; preds = %bb.i.i.i19.i.i47, %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i37
+	%41 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %41, label %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i50, label %bb.i.i.i19.i.i47
+
+_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i50:		; preds = %bb.i.i.i19.i.i47
+	%42 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %rh, i32 0, i32 0		; <%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"*> [#uses=1]
+	br label %bb.i.i.i19.i.i.i
+
+bb.i.i.i19.i.i.i:		; preds = %bb.i.i.i19.i.i.i, %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i50
+	%43 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %43, label %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i.i, label %bb.i.i.i19.i.i.i
+
+_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i.i:		; preds = %bb.i.i.i19.i.i.i
+	br label %bb.i.i.i35.i.i433
+
+bb.i.i.i35.i.i433:		; preds = %bb.i.i.i35.i.i433, %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i.i
+	%44 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %44, label %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i436, label %bb.i.i.i35.i.i433
+
+_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i436:		; preds = %bb.i.i.i35.i.i433
+	br label %bb.i.i.i19.i.i446
+
+bb.i.i.i19.i.i446:		; preds = %bb.i.i.i19.i.i446, %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit36.i.i436
+	%45 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %45, label %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i449, label %bb.i.i.i19.i.i446
+
+_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i449:		; preds = %bb.i.i.i19.i.i446
+	br label %bb.i.i.i.i.i459
+
+bb.i.i.i.i.i459:		; preds = %bb.i.i.i.i.i459, %_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_.exit20.i.i449
+	%46 = icmp eq i32* null, null		; <i1> [#uses=1]
+	br i1 %46, label %_ZN14ScalarCodeInfoILi3ELi6EEC1Ev.exit.i460, label %bb.i.i.i.i.i459
+
+_ZN14ScalarCodeInfoILi3ELi6EEC1Ev.exit.i460:		; preds = %bb.i.i.i.i.i459
+	%47 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %5, i32 0, i32 0, i32 1		; <%"struct.Centering<3>"*> [#uses=1]
+	%48 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %vint, i32 0, i32 0, i32 1		; <%"struct.Centering<3>"*> [#uses=2]
+	%49 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %5, i32 0, i32 0, i32 5		; <%"struct.GuardLayers<3>"*> [#uses=1]
+	%50 = bitcast %"struct.GuardLayers<3>"* %49 to i8*		; <i8*> [#uses=1]
+	%51 = bitcast %"struct.GuardLayers<3>"* null to i8*		; <i8*> [#uses=2]
+	%52 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %3, i32 0, i32 0, i32 1		; <%"struct.Centering<3>"*> [#uses=1]
+	%53 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %3, i32 0, i32 0, i32 5		; <%"struct.GuardLayers<3>"*> [#uses=1]
+	%54 = bitcast %"struct.GuardLayers<3>"* %53 to i8*		; <i8*> [#uses=1]
+	%55 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 1		; <%"struct.Centering<3>"*> [#uses=1]
+	%56 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
+	%57 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
+	%58 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 0, i32 0, i32 0		; <i32*> [#uses=1]
+	%59 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
+	%60 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %2, i32 0, i32 0, i32 5		; <%"struct.GuardLayers<3>"*> [#uses=1]
+	%61 = bitcast %"struct.GuardLayers<3>"* %60 to i8*		; <i8*> [#uses=1]
+	%62 = getelementptr %"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >"* %1, i32 0, i32 1, i32 0, i32 0		; <%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=1]
+	%63 = getelementptr %"struct.BinaryNode<OpMultiply,Scalar<double>,BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > >"* %1, i32 0, i32 1, i32 1, i32 0		; <%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"*> [#uses=1]
+	%64 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, MultiPatchView<GridTag, Remote<Brick>, 3> > > > > >"* null, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0		; <double*> [#uses=1]
+	%65 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"* %0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0		; <%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"*> [#uses=2]
+	%66 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"* %0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0		; <i32*> [#uses=1]
+	%67 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"* %0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
+	%68 = getelementptr %"struct.Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,ExpressionTag<BinaryNode<OpMultiply, Scalar<double>, BinaryNode<OpAdd, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> >, Field<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >, double, Remote<BrickView> > > > > >"* %0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
+	br label %bb15
+
+bb15:		; preds = %_Z6assignI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EES5_d13ExpressionTagI10BinaryNodeI10OpMultiply6ScalarIdESD_I5OpAdd9ReferenceI5FieldIS5_dSB_EESL_EEE8OpAssignERKSJ_IT_T0_T1_ESV_RKSJ_IT2_T3_T4_ERKT5_.exit, %_ZN14ScalarCodeInfoILi3ELi6EEC1Ev.exit.i460
+	%i.0.reg2mem.0 = phi i32 [ 0, %_ZN14ScalarCodeInfoILi3ELi6EEC1Ev.exit.i460 ], [ %indvar.next, %_Z6assignI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EES5_d13ExpressionTagI10BinaryNodeI10OpMultiply6ScalarIdESD_I5OpAdd9ReferenceI5FieldIS5_dSB_EESL_EEE8OpAssignERKSJ_IT_T0_T1_ESV_RKSJ_IT2_T3_T4_ERKT5_.exit ]		; <i32> [#uses=4]
+	call fastcc void @_ZN9CenteringILi3EEC1ERKS0_i(%"struct.Centering<3>"* %47, %"struct.Centering<3>"* %48, i32 %i.0.reg2mem.0) nounwind
+	call void @llvm.memcpy.i32(i8* %50, i8* %51, i32 24, i32 4) nounwind
+	call fastcc void @_ZN9CenteringILi3EEC1ERKS0_i(%"struct.Centering<3>"* %52, %"struct.Centering<3>"* %48, i32 %i.0.reg2mem.0) nounwind
+	call void @llvm.memcpy.i32(i8* %54, i8* %51, i32 24, i32 4) nounwind
+	br i1 false, label %bb.i940, label %bb4.i943
+
+bb.i940:		; preds = %bb15
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit944
+
+bb4.i943:		; preds = %bb15
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit944
+
+_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit944:		; preds = %bb4.i943, %bb.i940
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEEC1Id10MultiPatchIS7_SA_EEERKS_IS5_T_T0_ERK8IntervalILi3EE(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* null, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* null, %"struct.Interval<3>"* null) nounwind
+	call fastcc void @_ZN9CenteringILi3EEC1ERKS0_i(%"struct.Centering<3>"* %55, %"struct.Centering<3>"* null, i32 %i.0.reg2mem.0) nounwind
+	call void @llvm.memcpy.i32(i8* %61, i8* %38, i32 24, i32 4) nounwind
+	%69 = load %"struct.Loc<3>"** null, align 4		; <%"struct.Loc<3>"*> [#uses=1]
+	%70 = ptrtoint %"struct.Loc<3>"* %69 to i32		; <i32> [#uses=1]
+	%.off.i911 = sub i32 0, %70		; <i32> [#uses=1]
+	%71 = icmp ult i32 %.off.i911, 12		; <i1> [#uses=1]
+	%72 = sub i32 0, 0		; <i32> [#uses=2]
+	%73 = load i32* %56, align 4		; <i32> [#uses=1]
+	%74 = add i32 %73, 0		; <i32> [#uses=1]
+	%75 = sub i32 %74, %72		; <i32> [#uses=1]
+	%76 = add i32 %75, 0		; <i32> [#uses=1]
+	%77 = load i32* null, align 8		; <i32> [#uses=2]
+	%78 = load i32* null, align 4		; <i32> [#uses=1]
+	%79 = sub i32 %77, %78		; <i32> [#uses=1]
+	%80 = load i32* %57, align 4		; <i32> [#uses=1]
+	%81 = load i32* null, align 4		; <i32> [#uses=1]
+	br i1 %71, label %bb.i912, label %bb4.i915
+
+bb.i912:		; preds = %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit944
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit916
+
+bb4.i915:		; preds = %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit944
+	%82 = sub i32 %77, %79		; <i32> [#uses=1]
+	%83 = add i32 %82, %80		; <i32> [#uses=1]
+	%84 = add i32 %83, %81		; <i32> [#uses=1]
+	%85 = load i32* %58, align 8		; <i32> [#uses=2]
+	%86 = load i32* null, align 8		; <i32> [#uses=1]
+	%87 = sub i32 %85, %86		; <i32> [#uses=2]
+	%88 = load i32* %59, align 4		; <i32> [#uses=1]
+	%89 = load i32* null, align 4		; <i32> [#uses=1]
+	%90 = sub i32 %85, %87		; <i32> [#uses=1]
+	%91 = add i32 %90, %88		; <i32> [#uses=1]
+	%92 = add i32 %91, %89		; <i32> [#uses=1]
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit916
+
+_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit916:		; preds = %bb4.i915, %bb.i912
+	%.0978.0.0.1.0.0.0.0.1.0 = phi i32 [ %84, %bb4.i915 ], [ 0, %bb.i912 ]		; <i32> [#uses=0]
+	%.0978.0.0.2.0.0.0.0.0.0 = phi i32 [ %87, %bb4.i915 ], [ 0, %bb.i912 ]		; <i32> [#uses=1]
+	%.0978.0.0.2.0.0.0.0.1.0 = phi i32 [ %92, %bb4.i915 ], [ 0, %bb.i912 ]		; <i32> [#uses=0]
+	store i32 %72, i32* null, align 8
+	store i32 %76, i32* null, align 4
+	store i32 %.0978.0.0.2.0.0.0.0.0.0, i32* null, align 8
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEEC1Id10MultiPatchIS7_SA_EEERKS_IS5_T_T0_ERK8IntervalILi3EE(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* null, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* null, %"struct.Interval<3>"* null) nounwind
+	%93 = load i32* null, align 8		; <i32> [#uses=1]
+	%94 = icmp sgt i32 %93, 0		; <i1> [#uses=1]
+	br i1 %94, label %bb1.i, label %_Z6assignI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EES5_d13ExpressionTagI10BinaryNodeI10OpMultiply6ScalarIdESD_I5OpAdd9ReferenceI5FieldIS5_dSB_EESL_EEE8OpAssignERKSJ_IT_T0_T1_ESV_RKSJ_IT2_T3_T4_ERKT5_.exit
+
+bb1.i:		; preds = %bb3.i23.i.i, %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit916
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEED1Ev(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* %63) nounwind
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EEED1Ev(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* %62) nounwind
+	br label %bb.i17.i14.i
+
+bb.i17.i14.i:		; preds = %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i, %bb1.i
+	%i.0.02.rec.i.i.i = phi i32 [ %.rec.i.i.i641, %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i ], [ 0, %bb1.i ]		; <i32> [#uses=1]
+	%95 = load double* %64, align 8		; <double> [#uses=1]
+	store double %95, double* null, align 8
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEEC1Id14MultiPatchViewI7GridTagS6_I5BrickELi3EEEERKS_IS5_T_T0_ERK5INodeILi3EE(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"* %65, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatchView<GridTag, Remote<Brick>, 3> >"* null, %"struct.INode<3>"* null) nounwind
+	%96 = load %"struct.Loc<3>"** null, align 4		; <%"struct.Loc<3>"*> [#uses=1]
+	%97 = ptrtoint %"struct.Loc<3>"* %96 to i32		; <i32> [#uses=1]
+	%.off.i21.i.i.i.i = sub i32 0, %97		; <i32> [#uses=1]
+	%98 = icmp ult i32 %.off.i21.i.i.i.i, 12		; <i1> [#uses=1]
+	br i1 %98, label %bb.i22.i.i.i.i, label %bb3.i25.i.i.i.i
+
+bb.i22.i.i.i.i:		; preds = %bb.i17.i14.i
+	%99 = load i32* null, align 4		; <i32> [#uses=1]
+	%100 = icmp eq i32 %99, 1		; <i1> [#uses=1]
+	%101 = load i32* null, align 4		; <i32> [#uses=1]
+	br i1 %100, label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i, label %bb6.i.i24.i.i.i.i
+
+bb6.i.i24.i.i.i.i:		; preds = %bb.i22.i.i.i.i
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i
+
+bb3.i25.i.i.i.i:		; preds = %bb.i17.i14.i
+	%102 = load i32* %66, align 8		; <i32> [#uses=2]
+	%103 = load i32* %67, align 4		; <i32> [#uses=1]
+	%104 = load i32* %68, align 4		; <i32> [#uses=1]
+	br label %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i
+
+_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i:		; preds = %bb3.i25.i.i.i.i, %bb6.i.i24.i.i.i.i, %bb.i22.i.i.i.i
+	%.rle1279 = phi i32 [ 0, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.rle1277 = phi i32 [ %102, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.rle1275 = phi i32 [ 0, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.2.0.0.0.0.1.0 = phi i32 [ %104, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.2.0.0.0.0.0.0 = phi i32 [ 0, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.1.0.0.0.0.1.0 = phi i32 [ %103, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.1.0.0.0.0.0.0 = phi i32 [ %102, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.0.0.0.0.0.1.0 = phi i32 [ 0, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ %101, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%.01034.0.0.0.0.0.0.0.0.0 = phi i32 [ 0, %bb3.i25.i.i.i.i ], [ 0, %bb6.i.i24.i.i.i.i ], [ 0, %bb.i22.i.i.i.i ]		; <i32> [#uses=1]
+	%105 = sub i32 %.01034.0.0.0.0.0.0.0.0.0, %.rle1275		; <i32> [#uses=0]
+	%106 = sub i32 %.01034.0.0.1.0.0.0.0.0.0, %.rle1277		; <i32> [#uses=0]
+	%107 = sub i32 %.01034.0.0.2.0.0.0.0.0.0, %.rle1279		; <i32> [#uses=0]
+	store i32 %.01034.0.0.0.0.0.0.0.1.0, i32* null, align 4
+	store i32 %.01034.0.0.1.0.0.0.0.1.0, i32* null, align 4
+	store i32 %.01034.0.0.2.0.0.0.0.1.0, i32* null, align 4
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEED1Ev(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,Remote<BrickView> >"* %65) nounwind
+	%.rec.i.i.i641 = add i32 %i.0.02.rec.i.i.i, 1		; <i32> [#uses=1]
+	%108 = load %"struct.INode<3>"** null, align 4		; <%"struct.INode<3>"*> [#uses=1]
+	%109 = icmp eq %"struct.INode<3>"* null, %108		; <i1> [#uses=1]
+	br i1 %109, label %bb3.i23.i.i, label %bb.i17.i14.i
+
+bb3.i23.i.i:		; preds = %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd6RemoteI9BrickViewEE14physicalDomainEv.exit26.i.i.i.i
+	br label %bb1.i
+
+_Z6assignI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EES5_d13ExpressionTagI10BinaryNodeI10OpMultiply6ScalarIdESD_I5OpAdd9ReferenceI5FieldIS5_dSB_EESL_EEE8OpAssignERKSJ_IT_T0_T1_ESV_RKSJ_IT2_T3_T4_ERKT5_.exit:		; preds = %_ZNK11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEE11totalDomainEv.exit916
+	%indvar.next = add i32 %i.0.reg2mem.0, 1		; <i32> [#uses=2]
+	%exitcond = icmp eq i32 %indvar.next, 3		; <i1> [#uses=1]
+	br i1 %exitcond, label %bb18, label %bb15
+
+bb18:		; preds = %_Z6assignI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd14MultiPatchViewI7GridTag6RemoteI5BrickELi3EES5_d13ExpressionTagI10BinaryNodeI10OpMultiply6ScalarIdESD_I5OpAdd9ReferenceI5FieldIS5_dSB_EESL_EEE8OpAssignERKSJ_IT_T0_T1_ESV_RKSJ_IT2_T3_T4_ERKT5_.exit
+	call fastcc void @_ZN11FieldEngineI22UniformRectilinearMeshI10MeshTraitsILi3Ed21UniformRectilinearTag12CartesianTagLi3EEEd10MultiPatchI7GridTag6RemoteI5BrickEEEC1ERKSC_(%"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* null, %"struct.FieldEngine<UniformRectilinearMesh<MeshTraits<3, double, UniformRectilinearTag, CartesianTag, 3> >,double,MultiPatch<GridTag, Remote<Brick> > >"* %42) nounwind
+	unreachable
+}
diff --git a/test/CodeGen/ARM/2009-02-16-SpillerBug.ll b/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
new file mode 100644
index 0000000000000..48e663dd80675
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-16-SpillerBug.ll
@@ -0,0 +1,117 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
+
+target triple = "arm-apple-darwin9"
+	%struct.FILE_POS = type { i8, i8, i16, i32 }
+	%struct.FIRST_UNION = type { %struct.FILE_POS }
+	%struct.FOURTH_UNION = type { %struct.STYLE }
+	%struct.GAP = type { i8, i8, i16 }
+	%struct.LIST = type { %struct.rec*, %struct.rec* }
+	%struct.SECOND_UNION = type { { i16, i8, i8 } }
+	%struct.STYLE = type { { %struct.GAP }, { %struct.GAP }, i16, i16, i32 }
+	%struct.THIRD_UNION = type { { [2 x i32], [2 x i32] } }
+	%struct.head_type = type { [2 x %struct.LIST], %struct.FIRST_UNION, %struct.SECOND_UNION, %struct.THIRD_UNION, %struct.FOURTH_UNION, %struct.rec*, { %struct.rec* }, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, %struct.rec*, i32 }
+	%struct.rec = type { %struct.head_type }
+@no_file_pos = external global %struct.FILE_POS		; <%struct.FILE_POS*> [#uses=1]
+@"\01LC13423" = external constant [23 x i8]		; <[23 x i8]*> [#uses=1]
+@"\01LC18972" = external constant [13 x i8]		; <[13 x i8]*> [#uses=1]
+
+define fastcc void @FlushGalley(%struct.rec* %hd) nounwind {
+entry:
+	br label %RESUME
+
+RESUME:		; preds = %bb520.preheader, %entry
+	br label %bb396
+
+bb122:		; preds = %bb396
+	switch i32 0, label %bb394 [
+		i32 1, label %bb131
+		i32 2, label %bb244
+		i32 4, label %bb244
+		i32 5, label %bb244
+		i32 6, label %bb244
+		i32 7, label %bb244
+		i32 11, label %bb244
+		i32 12, label %bb244
+		i32 15, label %bb244
+		i32 17, label %bb244
+		i32 18, label %bb244
+		i32 19, label %bb244
+		i32 20, label %bb396
+		i32 21, label %bb396
+		i32 22, label %bb396
+		i32 23, label %bb396
+		i32 24, label %bb244
+		i32 25, label %bb244
+		i32 26, label %bb244
+		i32 27, label %bb244
+		i32 28, label %bb244
+		i32 29, label %bb244
+		i32 30, label %bb244
+		i32 31, label %bb244
+		i32 32, label %bb244
+		i32 33, label %bb244
+		i32 34, label %bb244
+		i32 35, label %bb244
+		i32 36, label %bb244
+		i32 37, label %bb244
+		i32 38, label %bb244
+		i32 39, label %bb244
+		i32 40, label %bb244
+		i32 41, label %bb244
+		i32 42, label %bb244
+		i32 43, label %bb244
+		i32 44, label %bb244
+		i32 45, label %bb244
+		i32 46, label %bb244
+		i32 50, label %bb244
+		i32 51, label %bb244
+		i32 94, label %bb244
+		i32 95, label %bb244
+		i32 96, label %bb244
+		i32 97, label %bb244
+		i32 98, label %bb244
+		i32 99, label %bb244
+	]
+
+bb131:		; preds = %bb122
+	br label %bb396
+
+bb244:		; preds = %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122, %bb122
+	%0 = icmp eq %struct.rec* %stop_link.3, null		; <i1> [#uses=1]
+	br i1 %0, label %bb435, label %bb433
+
+bb394:		; preds = %bb122
+	call void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 3, i8* getelementptr ([23 x i8]* @"\01LC13423", i32 0, i32 0), i32 0, %struct.FILE_POS* @no_file_pos, i8* getelementptr ([13 x i8]* @"\01LC18972", i32 0, i32 0), i8* null) nounwind
+	br label %bb396
+
+bb396:		; preds = %bb394, %bb131, %bb122, %bb122, %bb122, %bb122, %RESUME
+	%stop_link.3 = phi %struct.rec* [ null, %RESUME ], [ %stop_link.3, %bb394 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %stop_link.3, %bb122 ], [ %link.1, %bb131 ]		; <%struct.rec*> [#uses=7]
+	%headers_seen.1 = phi i32 [ 0, %RESUME ], [ %headers_seen.1, %bb394 ], [ 1, %bb122 ], [ 1, %bb122 ], [ 1, %bb122 ], [ 1, %bb122 ], [ %headers_seen.1, %bb131 ]		; <i32> [#uses=2]
+	%link.1 = load %struct.rec** null		; <%struct.rec*> [#uses=2]
+	%1 = icmp eq %struct.rec* %link.1, %hd		; <i1> [#uses=1]
+	br i1 %1, label %bb398, label %bb122
+
+bb398:		; preds = %bb396
+	unreachable
+
+bb433:		; preds = %bb244
+	call fastcc void @Promote(%struct.rec* %hd, %struct.rec* %stop_link.3, %struct.rec* null, i32 1) nounwind
+	br label %bb435
+
+bb435:		; preds = %bb433, %bb244
+	br i1 false, label %bb491, label %bb499
+
+bb491:		; preds = %bb435
+	br label %bb499
+
+bb499:		; preds = %bb499, %bb491, %bb435
+	%2 = icmp eq %struct.rec* null, null		; <i1> [#uses=1]
+	br i1 %2, label %bb520.preheader, label %bb499
+
+bb520.preheader:		; preds = %bb499
+	br label %RESUME
+}
+
+declare fastcc void @Promote(%struct.rec*, %struct.rec*, %struct.rec* nocapture, i32) nounwind
+
+declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll b/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll
new file mode 100644
index 0000000000000..d7befa0987488
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc
+; PR3610
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
+target triple = "arm-elf"
+
+define i32 @main(i8*) nounwind {
+entry:
+	%ap = alloca i8*		; <i8**> [#uses=2]
+	store i8* %0, i8** %ap
+	%retval = alloca i32		; <i32*> [#uses=2]
+	store i32 0, i32* %retval
+	%tmp = alloca float		; <float*> [#uses=1]
+	%1 = va_arg i8** %ap, float		; <float> [#uses=1]
+	store float %1, float* %tmp
+	br label %return
+
+return:		; preds = %entry
+	%2 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %2
+}
diff --git a/test/CodeGen/ARM/2009-02-27-SpillerBug.ll b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
new file mode 100644
index 0000000000000..56e949f832cc7
--- /dev/null
+++ b/test/CodeGen/ARM/2009-02-27-SpillerBug.ll
@@ -0,0 +1,229 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
+
+target triple = "arm-apple-darwin9"
+@a = external global double		; <double*> [#uses=1]
+@N = external global double		; <double*> [#uses=1]
+
+declare double @llvm.exp.f64(double) nounwind readonly
+
+define fastcc void @findratio(double* nocapture %res1, double* nocapture %res2) nounwind {
+bb.thread:
+	br label %bb52
+
+bb32:		; preds = %bb52
+	%0 = add double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%1 = add i32 %j.1, 1		; <i32> [#uses=1]
+	br label %bb52
+
+bb52:		; preds = %bb53, %bb32, %bb.thread
+	%i.3494 = phi i32 [ 0, %bb.thread ], [ %3, %bb53 ], [ %i.3494, %bb32 ]		; <i32> [#uses=2]
+	%k.4 = phi double [ %0, %bb32 ], [ 0.000000e+00, %bb53 ], [ 0.000000e+00, %bb.thread ]		; <double> [#uses=2]
+	%j.1 = phi i32 [ %1, %bb32 ], [ 0, %bb53 ], [ 0, %bb.thread ]		; <i32> [#uses=2]
+	%2 = icmp sgt i32 %j.1, 99		; <i1> [#uses=1]
+	br i1 %2, label %bb53, label %bb32
+
+bb53:		; preds = %bb52
+	%3 = add i32 %i.3494, 1		; <i32> [#uses=2]
+	%phitmp = icmp sgt i32 %3, 999999		; <i1> [#uses=1]
+	br i1 %phitmp, label %bb55, label %bb52
+
+bb55:		; preds = %bb53
+	%4 = load double* @a, align 4		; <double> [#uses=10]
+	%5 = add double %4, 0.000000e+00		; <double> [#uses=16]
+	%6 = fcmp ogt double %k.4, 0.000000e+00		; <i1> [#uses=1]
+	%.pn404 = mul double %4, %4		; <double> [#uses=4]
+	%.pn402 = mul double %5, %5		; <double> [#uses=5]
+	%.pn165.in = load double* @N		; <double> [#uses=5]
+	%.pn198 = mul double 0.000000e+00, %5		; <double> [#uses=1]
+	%.pn185 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn147 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn141 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
+	%.pn142 = fdiv double 0.000000e+00, %5		; <double> [#uses=1]
+	%.pn136 = fdiv double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn132 = fdiv double 0.000000e+00, %5		; <double> [#uses=1]
+	%.pn123 = fdiv double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn124 = fdiv double 0.000000e+00, %.pn198		; <double> [#uses=1]
+	%.pn120 = fdiv double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%.pn117 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
+	%.pn118 = fdiv double %.pn185, %5		; <double> [#uses=1]
+	%.pn88 = fdiv double %.pn147, %5		; <double> [#uses=1]
+	%.pn81 = sub double %.pn141, %.pn142		; <double> [#uses=1]
+	%.pn77 = sub double 0.000000e+00, %.pn136		; <double> [#uses=1]
+	%.pn75 = sub double 0.000000e+00, %.pn132		; <double> [#uses=1]
+	%.pn69 = sub double %.pn123, %.pn124		; <double> [#uses=1]
+	%.pn67 = sub double 0.000000e+00, %.pn120		; <double> [#uses=1]
+	%.pn56 = sub double %.pn117, %.pn118		; <double> [#uses=1]
+	%.pn42 = sub double 0.000000e+00, %.pn88		; <double> [#uses=1]
+	%.pn60 = mul double %.pn81, 0.000000e+00		; <double> [#uses=1]
+	%.pn57 = add double %.pn77, 0.000000e+00		; <double> [#uses=1]
+	%.pn58 = mul double %.pn75, %.pn165.in		; <double> [#uses=1]
+	%.pn32 = add double %.pn69, 0.000000e+00		; <double> [#uses=1]
+	%.pn33 = mul double %.pn67, %.pn165.in		; <double> [#uses=1]
+	%.pn17 = sub double 0.000000e+00, %.pn60		; <double> [#uses=1]
+	%.pn9 = add double %.pn57, %.pn58		; <double> [#uses=1]
+	%.pn30 = mul double 0.000000e+00, %.pn56		; <double> [#uses=1]
+	%.pn24 = mul double 0.000000e+00, %.pn42		; <double> [#uses=1]
+	%.pn1 = add double %.pn32, %.pn33		; <double> [#uses=1]
+	%.pn28 = sub double %.pn30, 0.000000e+00		; <double> [#uses=1]
+	%.pn26 = add double %.pn28, 0.000000e+00		; <double> [#uses=1]
+	%.pn22 = sub double %.pn26, 0.000000e+00		; <double> [#uses=1]
+	%.pn20 = sub double %.pn24, 0.000000e+00		; <double> [#uses=1]
+	%.pn18 = add double %.pn22, 0.000000e+00		; <double> [#uses=1]
+	%.pn16 = add double %.pn20, 0.000000e+00		; <double> [#uses=1]
+	%.pn14 = sub double %.pn18, 0.000000e+00		; <double> [#uses=1]
+	%.pn12 = sub double %.pn16, %.pn17		; <double> [#uses=1]
+	%.pn10 = add double %.pn14, 0.000000e+00		; <double> [#uses=1]
+	%.pn8 = add double %.pn12, 0.000000e+00		; <double> [#uses=1]
+	%.pn6 = sub double %.pn10, 0.000000e+00		; <double> [#uses=1]
+	%.pn4 = sub double %.pn8, %.pn9		; <double> [#uses=1]
+	%.pn2 = add double %.pn6, 0.000000e+00		; <double> [#uses=1]
+	%.pn = add double %.pn4, 0.000000e+00		; <double> [#uses=1]
+	%N1.0 = sub double %.pn2, 0.000000e+00		; <double> [#uses=2]
+	%D1.0 = sub double %.pn, %.pn1		; <double> [#uses=2]
+	br i1 %6, label %bb62, label %bb64
+
+bb62:		; preds = %bb55
+	%7 = mul double 0.000000e+00, %4		; <double> [#uses=1]
+	%8 = sub double -0.000000e+00, %7		; <double> [#uses=3]
+	%9 = mul double 0.000000e+00, %5		; <double> [#uses=1]
+	%10 = sub double -0.000000e+00, %9		; <double> [#uses=3]
+	%11 = mul double %.pn404, %4		; <double> [#uses=5]
+	%12 = mul double %.pn402, %5		; <double> [#uses=5]
+	%13 = mul double 0.000000e+00, -2.000000e+00		; <double> [#uses=1]
+	%14 = fdiv double 0.000000e+00, %.pn402		; <double> [#uses=1]
+	%15 = sub double 0.000000e+00, %14		; <double> [#uses=1]
+	%16 = mul double 0.000000e+00, %15		; <double> [#uses=1]
+	%17 = add double %13, %16		; <double> [#uses=1]
+	%18 = mul double %.pn165.in, -2.000000e+00		; <double> [#uses=5]
+	%19 = mul double %18, 0.000000e+00		; <double> [#uses=1]
+	%20 = add double %17, %19		; <double> [#uses=1]
+	%21 = mul double 0.000000e+00, %20		; <double> [#uses=1]
+	%22 = add double 0.000000e+00, %21		; <double> [#uses=1]
+	%23 = fdiv double 0.000000e+00, %12		; <double> [#uses=1]
+	%24 = sub double 0.000000e+00, %23		; <double> [#uses=0]
+	%25 = mul double %18, 0.000000e+00		; <double> [#uses=1]
+	%26 = add double 0.000000e+00, %25		; <double> [#uses=1]
+	%27 = mul double 0.000000e+00, %26		; <double> [#uses=1]
+	%28 = sub double %22, %27		; <double> [#uses=1]
+	%29 = mul double %11, %4		; <double> [#uses=1]
+	%30 = mul double %12, %5		; <double> [#uses=3]
+	%31 = mul double %.pn165.in, -4.000000e+00		; <double> [#uses=1]
+	%32 = mul double %.pn165.in, 0x3FF5555555555555		; <double> [#uses=1]
+	%33 = mul double %32, 0.000000e+00		; <double> [#uses=2]
+	%34 = add double %28, 0.000000e+00		; <double> [#uses=1]
+	%35 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%36 = fdiv double %35, %11		; <double> [#uses=1]
+	%37 = fdiv double 0.000000e+00, %12		; <double> [#uses=1]
+	%38 = sub double %36, %37		; <double> [#uses=1]
+	%39 = mul double 0.000000e+00, %38		; <double> [#uses=1]
+	%40 = add double 0.000000e+00, %39		; <double> [#uses=1]
+	%41 = add double %40, 0.000000e+00		; <double> [#uses=1]
+	%42 = add double %41, 0.000000e+00		; <double> [#uses=1]
+	%43 = mul double %42, 0.000000e+00		; <double> [#uses=1]
+	%44 = sub double %34, %43		; <double> [#uses=1]
+	%45 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
+	%46 = sub double -0.000000e+00, %45		; <double> [#uses=2]
+	%47 = fdiv double %46, 0.000000e+00		; <double> [#uses=1]
+	%48 = mul double %30, %5		; <double> [#uses=1]
+	%49 = fdiv double 0.000000e+00, %48		; <double> [#uses=1]
+	%50 = sub double %47, %49		; <double> [#uses=1]
+	%51 = mul double %50, -4.000000e+00		; <double> [#uses=1]
+	%52 = add double %51, 0.000000e+00		; <double> [#uses=1]
+	%53 = fdiv double %46, %11		; <double> [#uses=1]
+	%54 = sub double %53, 0.000000e+00		; <double> [#uses=1]
+	%55 = mul double %31, %54		; <double> [#uses=1]
+	%56 = add double %52, %55		; <double> [#uses=1]
+	%57 = add double %56, 0.000000e+00		; <double> [#uses=1]
+	%58 = add double %44, %57		; <double> [#uses=1]
+	%59 = sub double %58, 0.000000e+00		; <double> [#uses=1]
+	%60 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
+	%61 = sub double -0.000000e+00, %60		; <double> [#uses=1]
+	%62 = fdiv double 0.000000e+00, -6.000000e+00		; <double> [#uses=1]
+	%63 = fdiv double %61, %5		; <double> [#uses=1]
+	%64 = sub double 0.000000e+00, %63		; <double> [#uses=1]
+	%65 = mul double %62, %64		; <double> [#uses=1]
+	%66 = sub double 0.000000e+00, %65		; <double> [#uses=1]
+	%67 = sub double -0.000000e+00, 0.000000e+00		; <double> [#uses=2]
+	%68 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
+	%69 = sub double -0.000000e+00, %68		; <double> [#uses=2]
+	%70 = fdiv double %67, %.pn404		; <double> [#uses=1]
+	%71 = fdiv double %69, %.pn402		; <double> [#uses=1]
+	%72 = sub double %70, %71		; <double> [#uses=1]
+	%73 = mul double %72, -5.000000e-01		; <double> [#uses=1]
+	%74 = fdiv double %67, %4		; <double> [#uses=1]
+	%75 = fdiv double %69, %5		; <double> [#uses=1]
+	%76 = sub double %74, %75		; <double> [#uses=1]
+	%77 = mul double %76, 0.000000e+00		; <double> [#uses=1]
+	%78 = add double %73, %77		; <double> [#uses=1]
+	%79 = mul double 0.000000e+00, %78		; <double> [#uses=1]
+	%80 = add double %66, %79		; <double> [#uses=1]
+	%81 = fdiv double 0.000000e+00, %.pn404		; <double> [#uses=1]
+	%82 = fdiv double 0.000000e+00, %.pn402		; <double> [#uses=1]
+	%83 = sub double %81, %82		; <double> [#uses=1]
+	%84 = mul double %83, -5.000000e-01		; <double> [#uses=1]
+	%85 = fdiv double 0.000000e+00, %4		; <double> [#uses=1]
+	%86 = fdiv double 0.000000e+00, %5		; <double> [#uses=1]
+	%87 = sub double %85, %86		; <double> [#uses=1]
+	%88 = mul double %87, 0.000000e+00		; <double> [#uses=1]
+	%89 = add double %84, %88		; <double> [#uses=1]
+	%90 = mul double 0.000000e+00, %89		; <double> [#uses=1]
+	%91 = sub double %80, %90		; <double> [#uses=1]
+	%92 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
+	%93 = sub double -0.000000e+00, %92		; <double> [#uses=1]
+	%94 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
+	%95 = sub double -0.000000e+00, %94		; <double> [#uses=3]
+	%96 = fdiv double %95, %.pn402		; <double> [#uses=1]
+	%97 = sub double 0.000000e+00, %96		; <double> [#uses=1]
+	%98 = mul double 0.000000e+00, %97		; <double> [#uses=1]
+	%99 = fdiv double %93, %11		; <double> [#uses=1]
+	%100 = fdiv double %95, %12		; <double> [#uses=1]
+	%101 = sub double %99, %100		; <double> [#uses=1]
+	%102 = sub double %98, %101		; <double> [#uses=1]
+	%103 = fdiv double %95, %5		; <double> [#uses=1]
+	%104 = sub double 0.000000e+00, %103		; <double> [#uses=1]
+	%105 = mul double %18, %104		; <double> [#uses=1]
+	%106 = add double %102, %105		; <double> [#uses=1]
+	%107 = mul double %106, %k.4		; <double> [#uses=1]
+	%108 = add double %91, %107		; <double> [#uses=1]
+	%109 = sub double %108, 0.000000e+00		; <double> [#uses=1]
+	%110 = tail call double @llvm.exp.f64(double %8) nounwind		; <double> [#uses=1]
+	%111 = sub double -0.000000e+00, %110		; <double> [#uses=2]
+	%112 = tail call double @llvm.exp.f64(double %10) nounwind		; <double> [#uses=1]
+	%113 = sub double -0.000000e+00, %112		; <double> [#uses=2]
+	%114 = fdiv double %111, %11		; <double> [#uses=1]
+	%115 = fdiv double %113, %12		; <double> [#uses=1]
+	%116 = sub double %114, %115		; <double> [#uses=1]
+	%117 = mul double 0.000000e+00, %116		; <double> [#uses=1]
+	%118 = fdiv double %111, %29		; <double> [#uses=1]
+	%119 = fdiv double %113, %30		; <double> [#uses=1]
+	%120 = sub double %118, %119		; <double> [#uses=1]
+	%121 = sub double %117, %120		; <double> [#uses=1]
+	%122 = mul double %18, 0.000000e+00		; <double> [#uses=1]
+	%123 = add double %121, %122		; <double> [#uses=1]
+	%124 = mul double %33, 0.000000e+00		; <double> [#uses=1]
+	%125 = add double %123, %124		; <double> [#uses=1]
+	%126 = add double %109, %125		; <double> [#uses=1]
+	%127 = tail call double @llvm.exp.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
+	%128 = sub double -0.000000e+00, %127		; <double> [#uses=2]
+	%129 = fdiv double %128, %30		; <double> [#uses=1]
+	%130 = sub double 0.000000e+00, %129		; <double> [#uses=1]
+	%131 = sub double 0.000000e+00, %130		; <double> [#uses=1]
+	%132 = fdiv double 0.000000e+00, %.pn404		; <double> [#uses=1]
+	%133 = sub double %132, 0.000000e+00		; <double> [#uses=1]
+	%134 = mul double %18, %133		; <double> [#uses=1]
+	%135 = add double %131, %134		; <double> [#uses=1]
+	%136 = fdiv double %128, %5		; <double> [#uses=1]
+	%137 = sub double 0.000000e+00, %136		; <double> [#uses=1]
+	%138 = mul double %33, %137		; <double> [#uses=1]
+	%139 = add double %135, %138		; <double> [#uses=1]
+	%140 = sub double %126, %139		; <double> [#uses=1]
+	%141 = add double %N1.0, %59		; <double> [#uses=1]
+	%142 = add double %D1.0, %140		; <double> [#uses=1]
+	br label %bb64
+
+bb64:		; preds = %bb62, %bb55
+	%N1.0.pn = phi double [ %141, %bb62 ], [ %N1.0, %bb55 ]		; <double> [#uses=1]
+	%D1.0.pn = phi double [ %142, %bb62 ], [ %D1.0, %bb55 ]		; <double> [#uses=1]
+	%x.1 = fdiv double %N1.0.pn, %D1.0.pn		; <double> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
new file mode 100644
index 0000000000000..7556616f995d5
--- /dev/null
+++ b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll
@@ -0,0 +1,78 @@
+; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin9 -mattr=+vfp2
+; rdar://6653182
+
+	%struct.ggBRDF = type { i32 (...)** }
+	%struct.ggPoint2 = type { [2 x double] }
+	%struct.ggPoint3 = type { [3 x double] }
+	%struct.ggSpectrum = type { [8 x float] }
+	%struct.ggSphere = type { %struct.ggPoint3, double }
+	%struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum }
+	%struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire }
+	%struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere }
+
+declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind
+
+declare double @llvm.sqrt.f64(double) nounwind readonly
+
+declare double @sin(double) nounwind readonly
+
+declare double @acos(double) nounwind readonly
+
+define i32 @_ZNK34mrDiffuseSolidAngleSphereLuminaire18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd(%struct.mrDiffuseCosineSphereLuminaire* nocapture %this, %struct.ggPoint3* nocapture %x, %struct.ggPoint3* nocapture %unnamed_arg, %struct.ggPoint2* nocapture %uv, double %unnamed_arg2, %struct.ggPoint3* nocapture %on_light, double* nocapture %invProb) nounwind {
+entry:
+	%0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind		; <double> [#uses=4]
+	%1 = fcmp ult double 0.000000e+00, %0		; <i1> [#uses=1]
+	br i1 %1, label %bb3, label %bb7
+
+bb3:		; preds = %entry
+	%2 = fdiv double 1.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%3 = mul double 0.000000e+00, %2		; <double> [#uses=2]
+	%4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind		; <double> [#uses=1]
+	%5 = fdiv double 1.000000e+00, %4		; <double> [#uses=2]
+	%6 = mul double %3, %5		; <double> [#uses=2]
+	%7 = mul double 0.000000e+00, %5		; <double> [#uses=2]
+	%8 = mul double %3, %7		; <double> [#uses=1]
+	%9 = sub double %8, 0.000000e+00		; <double> [#uses=1]
+	%10 = mul double 0.000000e+00, %6		; <double> [#uses=1]
+	%11 = sub double 0.000000e+00, %10		; <double> [#uses=1]
+	%12 = sub double -0.000000e+00, %11		; <double> [#uses=1]
+	%13 = mul double %0, %0		; <double> [#uses=2]
+	%14 = sub double %13, 0.000000e+00		; <double> [#uses=1]
+	%15 = call double @llvm.sqrt.f64(double %14)		; <double> [#uses=1]
+	%16 = mul double 0.000000e+00, %15		; <double> [#uses=1]
+	%17 = fdiv double %16, %0		; <double> [#uses=1]
+	%18 = add double 0.000000e+00, %17		; <double> [#uses=1]
+	%19 = call double @acos(double %18) nounwind readonly		; <double> [#uses=1]
+	%20 = load double* null, align 4		; <double> [#uses=1]
+	%21 = mul double %20, 0x401921FB54442D18		; <double> [#uses=1]
+	%22 = call double @sin(double %19) nounwind readonly		; <double> [#uses=2]
+	%23 = mul double %22, 0.000000e+00		; <double> [#uses=2]
+	%24 = mul double %6, %23		; <double> [#uses=1]
+	%25 = mul double %7, %23		; <double> [#uses=1]
+	%26 = call double @sin(double %21) nounwind readonly		; <double> [#uses=1]
+	%27 = mul double %22, %26		; <double> [#uses=2]
+	%28 = mul double %9, %27		; <double> [#uses=1]
+	%29 = mul double %27, %12		; <double> [#uses=1]
+	%30 = add double %24, %28		; <double> [#uses=1]
+	%31 = add double 0.000000e+00, %29		; <double> [#uses=1]
+	%32 = add double %25, 0.000000e+00		; <double> [#uses=1]
+	%33 = add double %30, 0.000000e+00		; <double> [#uses=1]
+	%34 = add double %31, 0.000000e+00		; <double> [#uses=1]
+	%35 = add double %32, 0.000000e+00		; <double> [#uses=1]
+	%36 = bitcast %struct.ggPoint3* %x to i8*		; <i8*> [#uses=1]
+	call void @llvm.memcpy.i32(i8* null, i8* %36, i32 24, i32 4) nounwind
+	store double %33, double* null, align 8
+	br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i
+
+bb5.i.i.i:		; preds = %bb3
+	unreachable
+
+_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit:		; preds = %bb3
+	%37 = sub double %13, 0.000000e+00		; <double> [#uses=0]
+	%38 = sub double -0.000000e+00, %34		; <double> [#uses=0]
+	%39 = sub double -0.000000e+00, %35		; <double> [#uses=0]
+	ret i32 1
+
+bb7:		; preds = %entry
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll b/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll
new file mode 100644
index 0000000000000..0ec6d7d4ff735
--- /dev/null
+++ b/test/CodeGen/ARM/2009-03-09-AddrModeBug.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+	%struct.hit_t = type { %struct.v_t, double }
+	%struct.node_t = type { %struct.hit_t, %struct.hit_t, i32 }
+	%struct.v_t = type { double, double, double }
+
+define fastcc %struct.node_t* @_ZL6createP6node_tii3v_tS1_d(%struct.node_t* %n, i32 %lvl, i32 %dist, i64 %c.0.0, i64 %c.0.1, i64 %c.0.2, i64 %d.0.0, i64 %d.0.1, i64 %d.0.2, double %r) nounwind {
+entry:
+	%0 = getelementptr %struct.node_t* %n, i32 0, i32 1		; <%struct.hit_t*> [#uses=1]
+	%1 = bitcast %struct.hit_t* %0 to i256*		; <i256*> [#uses=1]
+	store i256 0, i256* %1, align 4
+	unreachable
+}
diff --git a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
new file mode 100644
index 0000000000000..11c05c6ea7b3d
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {swi 107}
+
+define i32 @_swilseek(i32) nounwind {
+entry:
+	%ptr = alloca i32		; <i32*> [#uses=2]
+	store i32 %0, i32* %ptr
+	%retval = alloca i32		; <i32*> [#uses=2]
+	store i32 0, i32* %retval
+	%res = alloca i32		; <i32*> [#uses=0]
+	%fh = alloca i32		; <i32*> [#uses=1]
+	%1 = load i32* %fh		; <i32> [#uses=1]
+	%2 = load i32* %ptr		; <i32> [#uses=1]
+	%3 = call i32 asm "mov r0, $2; mov r1, $3; swi ${1:a}; mov $0, r0", "=r,i,r,r,~{r0},~{r1}"(i32 107, i32 %1, i32 %2) nounwind		; <i32> [#uses=1]
+        store i32 %3, i32* %retval
+	br label %return
+
+return:		; preds = %entry
+	%4 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %4
+}
diff --git a/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll b/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll
new file mode 100644
index 0000000000000..c00b1fb986069
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-AggregateAddr.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm
+; PR3795
+
+define fastcc void @_D3foo3fooFAriZv({ i32, { double, double }* } %d_arg, i32 %x_arg) {
+entry:
+	%d = alloca { i32, { double, double }* }		; <{ i32, { double, double }* }*> [#uses=2]
+	%x = alloca i32		; <i32*> [#uses=2]
+	%b = alloca { double, double }		; <{ double, double }*> [#uses=1]
+	store { i32, { double, double }* } %d_arg, { i32, { double, double }* }* %d
+	store i32 %x_arg, i32* %x
+	%tmp = load i32* %x		; <i32> [#uses=1]
+	%tmp1 = getelementptr { i32, { double, double }* }* %d, i32 0, i32 1		; <{ double, double }**> [#uses=1]
+	%.ptr = load { double, double }** %tmp1		; <{ double, double }*> [#uses=1]
+	%tmp2 = getelementptr { double, double }* %.ptr, i32 %tmp		; <{ double, double }*> [#uses=1]
+	%tmp3 = load { double, double }* %tmp2		; <{ double, double }> [#uses=1]
+	store { double, double } %tmp3, { double, double }* %b
+	ret void
+}
diff --git a/test/CodeGen/ARM/2009-04-08-FREM.ll b/test/CodeGen/ARM/2009-04-08-FREM.ll
new file mode 100644
index 0000000000000..c7e343c89203c
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-FREM.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+declare i32 @printf(i8*, ...)
+
+define i32 @main() {
+	%rem_r = frem double 0.000000e+00, 0.000000e+00		; <double> [#uses=1]
+	%1 = call i32 (i8*, ...)* @printf(i8* null, double %rem_r)		; <i32> [#uses=0]
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/2009-04-08-FloatUndef.ll b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
new file mode 100644
index 0000000000000..9dc3b3485ec64
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-08-FloatUndef.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) {
+entry:
+	%input2 = load <4 x float>* null, align 16		; <<4 x float>> [#uses=2]
+	%shuffle7 = shufflevector <4 x float> %input2, <4 x float> <float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x i32> <i32 2, i32 2, i32 2, i32 2>		; <<4 x float>> [#uses=1]
+	%mul1 = mul <4 x float> %shuffle7, zeroinitializer		; <<4 x float>> [#uses=1]
+	%add2 = add <4 x float> %mul1, %input2		; <<4 x float>> [#uses=1]
+	store <4 x float> %add2, <4 x float>* null, align 16
+	ret void
+}
diff --git a/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll
new file mode 100644
index 0000000000000..223fa0f435c9e
--- /dev/null
+++ b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm
+; PR3954
+
+define void @foo(...) nounwind {
+entry:
+	%rr = alloca i32		; <i32*> [#uses=2]
+	%0 = load i32* %rr		; <i32> [#uses=1]
+	%1 = call i32 asm "nop", "=r,0"(i32 %0) nounwind		; <i32> [#uses=1]
+	store i32 %1, i32* %rr
+	br label %return
+
+return:		; preds = %entry
+	ret void
+}
diff --git a/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll b/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
new file mode 100644
index 0000000000000..2bca6e62fc301
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
+; PR4166
+
+	%"byte[]" = type { i32, i8* }
+	%tango.time.Time.Time = type { i64 }
+
+define fastcc void @t() {
+entry:
+	%tmp28 = call fastcc i1 null(i32* null, %"byte[]" undef, %"byte[]" undef, %tango.time.Time.Time* byval null)		; <i1> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll b/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
new file mode 100644
index 0000000000000..d03b7ce87539c
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
+; PR4100
+@.str = external constant [30 x i8]		; <[30 x i8]*> [#uses=1]
+
+define i16 @fn16(i16 %arg0.0, <2 x i16> %arg1, i16 %arg2.0) nounwind {
+entry:
+	store <2 x i16> %arg1, <2 x i16>* null
+	%0 = call i32 (i8*, ...)* @printf(i8* getelementptr ([30 x i8]* @.str, i32 0, i32 0), i32 0) nounwind		; <i32> [#uses=0]
+	ret i16 0
+}
+
+declare i32 @printf(i8*, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll b/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll
new file mode 100644
index 0000000000000..35d4306e9d14e
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm
+	%struct.List = type { %struct.List*, i32 }
+@Node5 = external constant %struct.List		; <%struct.List*> [#uses=1]
+@"\01LC" = external constant [7 x i8]		; <[7 x i8]*> [#uses=1]
+
+define i32 @main() nounwind {
+entry:
+	br label %bb
+
+bb:		; preds = %bb3, %entry
+	%CurL.02 = phi %struct.List* [ @Node5, %entry ], [ %2, %bb3 ]		; <%struct.List*> [#uses=1]
+	%PrevL.01 = phi %struct.List* [ null, %entry ], [ %CurL.02, %bb3 ]		; <%struct.List*> [#uses=1]
+	%0 = icmp eq %struct.List* %PrevL.01, null		; <i1> [#uses=1]
+	br i1 %0, label %bb3, label %bb1
+
+bb1:		; preds = %bb
+	br label %bb3
+
+bb3:		; preds = %bb1, %bb
+	%iftmp.0.0 = phi i32 [ 0, %bb1 ], [ -1, %bb ]		; <i32> [#uses=1]
+	%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i32 0), i32 0, i32 %iftmp.0.0) nounwind		; <i32> [#uses=0]
+	%2 = load %struct.List** null, align 4		; <%struct.List*> [#uses=2]
+	%phitmp = icmp eq %struct.List* %2, null		; <i1> [#uses=1]
+	br i1 %phitmp, label %bb5, label %bb
+
+bb5:		; preds = %bb3
+	ret i32 0
+}
+
+declare i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
new file mode 100644
index 0000000000000..f942c9fc22168
--- /dev/null
+++ b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=arm | grep swp
+; PR4091
+
+define void @foo(i32 %i, i32* %p) nounwind {
+	%asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind
+	ret void
+}
diff --git a/test/CodeGen/ARM/addrmode.ll b/test/CodeGen/ARM/addrmode.ll
new file mode 100644
index 0000000000000..a3832c0ea3dba
--- /dev/null
+++ b/test/CodeGen/ARM/addrmode.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm -stats |& grep asm-printer | grep 4
+
+define i32 @t1(i32 %a) {
+	%b = mul i32 %a, 9
+        %c = inttoptr i32 %b to i32*
+        %d = load i32* %c
+	ret i32 %d
+}
+
+define i32 @t2(i32 %a) {
+	%b = mul i32 %a, -7
+        %c = inttoptr i32 %b to i32*
+        %d = load i32* %c
+	ret i32 %d
+}
diff --git a/test/CodeGen/ARM/aliases.ll b/test/CodeGen/ARM/aliases.ll
new file mode 100644
index 0000000000000..70b2c4d4195bf
--- /dev/null
+++ b/test/CodeGen/ARM/aliases.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -mtriple=arm-linux-gnueabi -o %t -f
+; RUN: grep set %t   | count 5
+; RUN: grep globl %t | count 4
+; RUN: grep weak %t  | count 1
+
+@bar = external global i32
+@foo1 = alias i32* @bar
+@foo2 = alias i32* @bar
+
+%FunTy = type i32()
+
+declare i32 @foo_f()
+@bar_f = alias weak %FunTy* @foo_f
+
+@bar_i = alias internal i32* @bar
+
+@A = alias bitcast (i32* @bar to i64*)
+
+define i32 @test() {
+entry:
+   %tmp = load i32* @foo1
+   %tmp1 = load i32* @foo2
+   %tmp0 = load i32* @bar_i
+   %tmp2 = call i32 @foo_f()
+   %tmp3 = add i32 %tmp, %tmp2
+   %tmp4 = call %FunTy* @bar_f()
+   %tmp5 = add i32 %tmp3, %tmp4
+   %tmp6 = add i32 %tmp1, %tmp5
+   %tmp7 = add i32 %tmp6, %tmp0
+   ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/align.ll b/test/CodeGen/ARM/align.ll
new file mode 100644
index 0000000000000..bb336ceebbabd
--- /dev/null
+++ b/test/CodeGen/ARM/align.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm | grep align.*1 | count 1
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN:   grep align.*2 | count 2
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN:   grep align.*3 | count 2
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep align.*2 | count 4
+
+@a = global i1 true
+@b = global i8 1
+@c = global i16 2
+@d = global i32 3
+@e = global i64 4
+@f = global float 5.0
+@g = global double 6.0
diff --git a/test/CodeGen/ARM/alloca.ll b/test/CodeGen/ARM/alloca.ll
new file mode 100644
index 0000000000000..f7e450f593242
--- /dev/null
+++ b/test/CodeGen/ARM/alloca.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN:   grep {mov r11, sp}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN:   grep {mov sp, r11}
+
+define void @f(i32 %a) {
+entry:
+        %tmp = alloca i8, i32 %a                ; <i8*> [#uses=1]
+        call void @g( i8* %tmp, i32 %a, i32 1, i32 2, i32 3 )
+        ret void
+}
+
+declare void @g(i8*, i32, i32, i32, i32)
diff --git a/test/CodeGen/ARM/argaddr.ll b/test/CodeGen/ARM/argaddr.ll
new file mode 100644
index 0000000000000..080827d7f42e0
--- /dev/null
+++ b/test/CodeGen/ARM/argaddr.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
+entry:
+        %a_addr = alloca i32            ; <i32*> [#uses=2]
+        %b_addr = alloca i32            ; <i32*> [#uses=2]
+        %c_addr = alloca i32            ; <i32*> [#uses=2]
+        %d_addr = alloca i32            ; <i32*> [#uses=2]
+        %e_addr = alloca i32            ; <i32*> [#uses=2]
+        store i32 %a, i32* %a_addr
+        store i32 %b, i32* %b_addr
+        store i32 %c, i32* %c_addr
+        store i32 %d, i32* %d_addr
+        store i32 %e, i32* %e_addr
+        call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
+        ret void
+}
+
+declare void @g(i32*, i32*, i32*, i32*, i32*)
diff --git a/test/CodeGen/ARM/arguments-nosplit-double.ll b/test/CodeGen/ARM/arguments-nosplit-double.ll
new file mode 100644
index 0000000000000..57ff95c0cb6d0
--- /dev/null
+++ b/test/CodeGen/ARM/arguments-nosplit-double.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
+; PR4059
+
+define i32 @f(i64 %z, i32 %a, double %b) {
+	%tmp = call i32 @g(double %b)
+	ret i32 %tmp
+}
+
+declare i32 @g(double)
diff --git a/test/CodeGen/ARM/arguments-nosplit-i64.ll b/test/CodeGen/ARM/arguments-nosplit-i64.ll
new file mode 100644
index 0000000000000..5464674dbca5f
--- /dev/null
+++ b/test/CodeGen/ARM/arguments-nosplit-i64.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
+; PR4058
+
+define i32 @f(i64 %z, i32 %a, i64 %b) {
+	%tmp = call i32 @g(i64 %b)
+	ret i32 %tmp
+}
+
+declare i32 @g(i64)
diff --git a/test/CodeGen/ARM/arguments.ll b/test/CodeGen/ARM/arguments.ll
new file mode 100644
index 0000000000000..833e22dc269d1
--- /dev/null
+++ b/test/CodeGen/ARM/arguments.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN:   grep {mov r0, r2} | count 1
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep {mov r0, r1} | count 1
+
+define i32 @f(i32 %a, i64 %b) {
+        %tmp = call i32 @g(i64 %b)
+        ret i32 %tmp
+}
+
+declare i32 @g(i64)
diff --git a/test/CodeGen/ARM/arguments2.ll b/test/CodeGen/ARM/arguments2.ll
new file mode 100644
index 0000000000000..eb7e45b4f3664
--- /dev/null
+++ b/test/CodeGen/ARM/arguments2.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define i32 @f(i32 %a, i128 %b) {
+        %tmp = call i32 @g(i128 %b)
+        ret i32 %tmp
+}
+
+declare i32 @g(i128)
diff --git a/test/CodeGen/ARM/arguments3.ll b/test/CodeGen/ARM/arguments3.ll
new file mode 100644
index 0000000000000..97c040521d8b6
--- /dev/null
+++ b/test/CodeGen/ARM/arguments3.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define i64 @f(i32 %a, i128 %b) {
+        %tmp = call i64 @g(i128 %b)
+        ret i64 %tmp
+}
+
+declare i64 @g(i128)
diff --git a/test/CodeGen/ARM/arguments4.ll b/test/CodeGen/ARM/arguments4.ll
new file mode 100644
index 0000000000000..63ba64b27f1f2
--- /dev/null
+++ b/test/CodeGen/ARM/arguments4.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define float @f(i32 %a, i128 %b) {
+        %tmp = call float @g(i128 %b)
+        ret float %tmp
+}
+
+declare float @g(i128)
diff --git a/test/CodeGen/ARM/arguments5.ll b/test/CodeGen/ARM/arguments5.ll
new file mode 100644
index 0000000000000..2000ff7b4a857
--- /dev/null
+++ b/test/CodeGen/ARM/arguments5.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define double @f(i32 %a, i128 %b) {
+        %tmp = call double @g(i128 %b)
+        ret double %tmp
+}
+
+declare double @g(i128)
diff --git a/test/CodeGen/ARM/arguments6.ll b/test/CodeGen/ARM/arguments6.ll
new file mode 100644
index 0000000000000..a18c621d14374
--- /dev/null
+++ b/test/CodeGen/ARM/arguments6.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define i128 @f(i32 %a, i128 %b) {
+        %tmp = call i128 @g(i128 %b)
+        ret i128 %tmp
+}
+
+declare i128 @g(i128)
diff --git a/test/CodeGen/ARM/arguments7.ll b/test/CodeGen/ARM/arguments7.ll
new file mode 100644
index 0000000000000..489ffd41604d7
--- /dev/null
+++ b/test/CodeGen/ARM/arguments7.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define double @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b) {
+        %tmp = call double @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b)
+        ret double %tmp
+}
+
+declare double @g(double)
diff --git a/test/CodeGen/ARM/arguments8.ll b/test/CodeGen/ARM/arguments8.ll
new file mode 100644
index 0000000000000..5ff7e09548ea8
--- /dev/null
+++ b/test/CodeGen/ARM/arguments8.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define i64 @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b) {
+        %tmp = call i64 @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, i64 %b)
+        ret i64 %tmp
+}
+
+declare i64 @g(i64)
diff --git a/test/CodeGen/ARM/arm-asm.ll b/test/CodeGen/ARM/arm-asm.ll
new file mode 100644
index 0000000000000..b260b1312daff
--- /dev/null
+++ b/test/CodeGen/ARM/arm-asm.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @frame_dummy() {
+entry:
+        %tmp1 = tail call void (i8*)* (void (i8*)*)* asm "", "=r,0,~{dirflag},~{fpsr},~{flags}"( void (i8*)* null )           ; <void (i8*)*> [#uses=0]
+        ret void
+}
diff --git a/test/CodeGen/ARM/arm-negative-stride.ll b/test/CodeGen/ARM/arm-negative-stride.ll
new file mode 100644
index 0000000000000..553c2fb646710
--- /dev/null
+++ b/test/CodeGen/ARM/arm-negative-stride.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\}
+
+define void @test(i32* %P, i32 %A, i32 %i) nounwind {
+entry:
+        icmp eq i32 %i, 0               ; <i1>:0 [#uses=1]
+        br i1 %0, label %return, label %bb
+
+bb:             ; preds = %bb, %entry
+        %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]          ; <i32> [#uses=2]
+        %i_addr.09.0 = sub i32 %i, %indvar              ; <i32> [#uses=1]
+        %tmp2 = getelementptr i32* %P, i32 %i_addr.09.0         ; <i32*> [#uses=1]
+        store i32 %A, i32* %tmp2
+        %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
+        icmp eq i32 %indvar.next, %i            ; <i1>:1 [#uses=1]
+        br i1 %1, label %return, label %bb
+
+return:         ; preds = %bb, %entry
+        ret void
+}
+
diff --git a/test/CodeGen/ARM/bits.ll b/test/CodeGen/ARM/bits.ll
new file mode 100644
index 0000000000000..0ac4f9a3833dc
--- /dev/null
+++ b/test/CodeGen/ARM/bits.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep and      %t | count 1
+; RUN: grep orr      %t | count 1
+; RUN: grep eor      %t | count 1
+; RUN: grep mov.*lsl %t | count 1
+; RUN: grep mov.*asr %t | count 1
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+	%tmp2 = and i32 %b, %a		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+	%tmp2 = or i32 %b, %a		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+	%tmp2 = xor i32 %b, %a		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+	%tmp3 = shl i32 %a, %b		; <i32> [#uses=1]
+	ret i32 %tmp3
+}
+
+define i32 @f5(i32 %a, i32 %b) {
+entry:
+	%tmp3 = ashr i32 %a, %b		; <i32> [#uses=1]
+	ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/branch.ll b/test/CodeGen/ARM/branch.ll
new file mode 100644
index 0000000000000..7f6b18333bf22
--- /dev/null
+++ b/test/CodeGen/ARM/branch.ll
@@ -0,0 +1,57 @@
+; RUN: llvm-as < %s | llc -march=arm -disable-arm-if-conversion > %t 
+; RUN: grep bne %t
+; RUN: grep bge %t
+; RUN: grep bhs %t
+; RUN: grep blo %t
+
+define void @f1(i32 %a, i32 %b, i32* %v) {
+entry:
+        %tmp = icmp eq i32 %a, %b               ; <i1> [#uses=1]
+        br i1 %tmp, label %cond_true, label %return
+
+cond_true:              ; preds = %entry
+        store i32 0, i32* %v
+        ret void
+
+return:         ; preds = %entry
+        ret void
+}
+
+define void @f2(i32 %a, i32 %b, i32* %v) {
+entry:
+        %tmp = icmp slt i32 %a, %b              ; <i1> [#uses=1]
+        br i1 %tmp, label %cond_true, label %return
+
+cond_true:              ; preds = %entry
+        store i32 0, i32* %v
+        ret void
+
+return:         ; preds = %entry
+        ret void
+}
+
+define void @f3(i32 %a, i32 %b, i32* %v) {
+entry:
+        %tmp = icmp ult i32 %a, %b              ; <i1> [#uses=1]
+        br i1 %tmp, label %cond_true, label %return
+
+cond_true:              ; preds = %entry
+        store i32 0, i32* %v
+        ret void
+
+return:         ; preds = %entry
+        ret void
+}
+
+define void @f4(i32 %a, i32 %b, i32* %v) {
+entry:
+        %tmp = icmp ult i32 %a, %b              ; <i1> [#uses=1]
+        br i1 %tmp, label %return, label %cond_true
+
+cond_true:              ; preds = %entry
+        store i32 0, i32* %v
+        ret void
+
+return:         ; preds = %entry
+        ret void
+}
diff --git a/test/CodeGen/ARM/bx_fold.ll b/test/CodeGen/ARM/bx_fold.ll
new file mode 100644
index 0000000000000..437b3189141dc
--- /dev/null
+++ b/test/CodeGen/ARM/bx_fold.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | not grep bx
+
+define void @test(i32 %Ptr, i8* %L) {
+entry:
+	br label %bb1
+
+bb:		; preds = %bb1
+	%gep.upgrd.1 = zext i32 %indvar to i64		; <i64> [#uses=1]
+	%tmp7 = getelementptr i8* %L, i64 %gep.upgrd.1		; <i8*> [#uses=1]
+	store i8 0, i8* %tmp7
+	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
+	br label %bb1
+
+bb1:		; preds = %bb, %entry
+	%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]		; <i32> [#uses=3]
+	%i.0 = bitcast i32 %indvar to i32		; <i32> [#uses=2]
+	%tmp = tail call i32 (...)* @bar( )		; <i32> [#uses=1]
+	%tmp2 = add i32 %i.0, %tmp		; <i32> [#uses=1]
+	%Ptr_addr.0 = sub i32 %Ptr, %tmp2		; <i32> [#uses=0]
+	%tmp12 = icmp eq i32 %i.0, %Ptr		; <i1> [#uses=1]
+	%tmp12.not = xor i1 %tmp12, true		; <i1> [#uses=1]
+	%bothcond = and i1 %tmp12.not, false		; <i1> [#uses=1]
+	br i1 %bothcond, label %bb, label %bb18
+
+bb18:		; preds = %bb1
+	ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll
new file mode 100644
index 0000000000000..6b196653e05ac
--- /dev/null
+++ b/test/CodeGen/ARM/call.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {mov lr, pc}
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5t | grep blx
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi\
+; RUN:   -relocation-model=pic | grep {PLT}
+
+@t = weak global i32 ()* null           ; <i32 ()**> [#uses=1]
+
+declare void @g(i32, i32, i32, i32)
+
+define void @f() {
+        call void @g( i32 1, i32 2, i32 3, i32 4 )
+        ret void
+}
+
+define void @g.upgrd.1() {
+        %tmp = load i32 ()** @t         ; <i32 ()*> [#uses=1]
+        %tmp.upgrd.2 = tail call i32 %tmp( )            ; <i32> [#uses=0]
+        ret void
+}
diff --git a/test/CodeGen/ARM/call_nolink.ll b/test/CodeGen/ARM/call_nolink.ll
new file mode 100644
index 0000000000000..1af6fad099b4e
--- /dev/null
+++ b/test/CodeGen/ARM/call_nolink.ll
@@ -0,0 +1,52 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:   not grep {bx lr}
+
+	%struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
+@r = external global [14 x i32]		; <[14 x i32]*> [#uses=4]
+@isa = external global [13 x %struct.anon]		; <[13 x %struct.anon]*> [#uses=1]
+@pgm = external global [2 x { i32, [3 x i32] }]		; <[2 x { i32, [3 x i32] }]*> [#uses=4]
+@numi = external global i32		; <i32*> [#uses=1]
+@counter = external global [2 x i32]		; <[2 x i32]*> [#uses=1]
+
+
+define void @main_bb_2E_i_bb205_2E_i_2E_i_bb115_2E_i_2E_i() {
+newFuncRoot:
+	br label %bb115.i.i
+
+bb115.i.i.bb170.i.i_crit_edge.exitStub:		; preds = %bb115.i.i
+	ret void
+
+bb115.i.i.bb115.i.i_crit_edge:		; preds = %bb115.i.i
+	br label %bb115.i.i
+
+bb115.i.i:		; preds = %bb115.i.i.bb115.i.i_crit_edge, %newFuncRoot
+	%i_addr.3210.0.i.i = phi i32 [ %tmp166.i.i, %bb115.i.i.bb115.i.i_crit_edge ], [ 0, %newFuncRoot ]		; <i32> [#uses=7]
+	%tmp124.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 0		; <i32*> [#uses=1]
+	%tmp125.i.i = load i32* %tmp124.i.i		; <i32> [#uses=1]
+	%tmp126.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp125.i.i		; <i32*> [#uses=1]
+	%tmp127.i.i = load i32* %tmp126.i.i		; <i32> [#uses=1]
+	%tmp131.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 1		; <i32*> [#uses=1]
+	%tmp132.i.i = load i32* %tmp131.i.i		; <i32> [#uses=1]
+	%tmp133.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp132.i.i		; <i32*> [#uses=1]
+	%tmp134.i.i = load i32* %tmp133.i.i		; <i32> [#uses=1]
+	%tmp138.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 1, i32 2		; <i32*> [#uses=1]
+	%tmp139.i.i = load i32* %tmp138.i.i		; <i32> [#uses=1]
+	%tmp140.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp139.i.i		; <i32*> [#uses=1]
+	%tmp141.i.i = load i32* %tmp140.i.i		; <i32> [#uses=1]
+	%tmp143.i.i = add i32 %i_addr.3210.0.i.i, 12		; <i32> [#uses=1]
+	%tmp146.i.i = getelementptr [2 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %i_addr.3210.0.i.i, i32 0		; <i32*> [#uses=1]
+	%tmp147.i.i = load i32* %tmp146.i.i		; <i32> [#uses=1]
+	%tmp149.i.i = getelementptr [13 x %struct.anon]* @isa, i32 0, i32 %tmp147.i.i, i32 0		; <i32 (i32, i32, i32)**> [#uses=1]
+	%tmp150.i.i = load i32 (i32, i32, i32)** %tmp149.i.i		; <i32 (i32, i32, i32)*> [#uses=1]
+	%tmp154.i.i = tail call i32 %tmp150.i.i( i32 %tmp127.i.i, i32 %tmp134.i.i, i32 %tmp141.i.i )		; <i32> [#uses=1]
+	%tmp155.i.i = getelementptr [14 x i32]* @r, i32 0, i32 %tmp143.i.i		; <i32*> [#uses=1]
+	store i32 %tmp154.i.i, i32* %tmp155.i.i
+	%tmp159.i.i = getelementptr [2 x i32]* @counter, i32 0, i32 %i_addr.3210.0.i.i		; <i32*> [#uses=2]
+	%tmp160.i.i = load i32* %tmp159.i.i		; <i32> [#uses=1]
+	%tmp161.i.i = add i32 %tmp160.i.i, 1		; <i32> [#uses=1]
+	store i32 %tmp161.i.i, i32* %tmp159.i.i
+	%tmp166.i.i = add i32 %i_addr.3210.0.i.i, 1		; <i32> [#uses=2]
+	%tmp168.i.i = load i32* @numi		; <i32> [#uses=1]
+	icmp slt i32 %tmp166.i.i, %tmp168.i.i		; <i1>:0 [#uses=1]
+	br i1 %0, label %bb115.i.i.bb115.i.i_crit_edge, label %bb115.i.i.bb170.i.i_crit_edge.exitStub
+}
diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll
new file mode 100644
index 0000000000000..389fb2ce1ee8f
--- /dev/null
+++ b/test/CodeGen/ARM/clz.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5t | grep clz
+
+declare i32 @llvm.ctlz.i32(i32)
+
+define i32 @test(i32 %x) {
+        %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x )              ; <i32> [#uses=1]
+        ret i32 %tmp.1
+}
diff --git a/test/CodeGen/ARM/compare-call.ll b/test/CodeGen/ARM/compare-call.ll
new file mode 100644
index 0000000000000..fcb8b179c803d
--- /dev/null
+++ b/test/CodeGen/ARM/compare-call.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
+; RUN:   grep fcmpes
+
+define void @test3(float* %glob, i32 %X) {
+entry:
+        %tmp = load float* %glob                ; <float> [#uses=1]
+        %tmp2 = getelementptr float* %glob, i32 2               ; <float*> [#uses=1]
+        %tmp3 = load float* %tmp2               ; <float> [#uses=1]
+        %tmp.upgrd.1 = fcmp ogt float %tmp, %tmp3               ; <i1> [#uses=1]
+        br i1 %tmp.upgrd.1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:              ; preds = %entry
+        %tmp.upgrd.2 = tail call i32 (...)* @bar( )             ; <i32> [#uses=0]
+        ret void
+
+UnifiedReturnBlock:             ; preds = %entry
+        ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll
new file mode 100644
index 0000000000000..095157b592bf7
--- /dev/null
+++ b/test/CodeGen/ARM/constants.ll
@@ -0,0 +1,42 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {mov r0, #0} | count 1
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {mov r0, #255$} | count 1
+; RUN: llvm-as < %s | llc -march=arm -asm-verbose | \
+; RUN:   grep {mov r0.*256} | count 1
+; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {orr.*256} | count 1
+; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {mov r0, .*-1073741761} | count 1
+; RUN: llvm-as < %s | llc -march=arm -asm-verbose | grep {mov r0, .*1008} | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep {cmp r0, #1, 16} | count 1
+
+define i32 @f1() {
+        ret i32 0
+}
+
+define i32 @f2() {
+        ret i32 255
+}
+
+define i32 @f3() {
+        ret i32 256
+}
+
+define i32 @f4() {
+        ret i32 257
+}
+
+define i32 @f5() {
+        ret i32 -1073741761
+}
+
+define i32 @f6() {
+        ret i32 1008
+}
+
+define void @f7(i32 %a) {
+        %b = icmp ugt i32 %a, 65536             ; <i1> [#uses=1]
+        br i1 %b, label %r, label %r
+
+r:              ; preds = %0, %0
+        ret void
+}
diff --git a/test/CodeGen/ARM/cse-libcalls.ll b/test/CodeGen/ARM/cse-libcalls.ll
new file mode 100644
index 0000000000000..3b499a4021c10
--- /dev/null
+++ b/test/CodeGen/ARM/cse-libcalls.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {bl.\*__ltdf} | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+; Without CSE of libcalls, there are two calls in the output instead of one.
+
+define i32 @u_f_nonbon(double %lambda) nounwind {
+entry:
+	%tmp19.i.i = load double* null, align 4		; <double> [#uses=2]
+	%tmp6.i = fcmp olt double %tmp19.i.i, 1.000000e+00		; <i1> [#uses=1]
+	%dielectric.0.i = select i1 %tmp6.i, double 1.000000e+00, double %tmp19.i.i		; <double> [#uses=1]
+	%tmp10.i4 = fdiv double 0x4074C2D71F36262D, %dielectric.0.i		; <double> [#uses=1]
+	br i1 false, label %bb28.i, label %bb508.i
+
+bb28.i:		; preds = %bb28.i, %entry
+	br i1 false, label %bb502.loopexit.i, label %bb28.i
+
+bb.nph53.i:		; preds = %bb502.loopexit.i
+	%tmp354.i = sub double -0.000000e+00, %tmp10.i4		; <double> [#uses=0]
+	br label %bb244.i
+
+bb244.i:		; preds = %bb244.i, %bb.nph53.i
+	br label %bb244.i
+
+bb502.loopexit.i:		; preds = %bb28.i
+	br i1 false, label %bb.nph53.i, label %bb508.i
+
+bb508.i:		; preds = %bb502.loopexit.i, %entry
+	ret i32 1
+}
diff --git a/test/CodeGen/ARM/ctors_dtors.ll b/test/CodeGen/ARM/ctors_dtors.ll
new file mode 100644
index 0000000000000..5caa5b1266dac
--- /dev/null
+++ b/test/CodeGen/ARM/ctors_dtors.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as <  %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep {\\.mod_init_func}
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep {\\.mod_term_func} 
+; RUN: llvm-as  < %s | llc -mtriple=arm-linux-gnu | \
+; RUN:   grep {\\.section \\.ctors,"aw",.progbits}
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu | \
+; RUN:   grep {\\.section \\.dtors,"aw",.progbits}
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN:   grep {\\.section \\.init_array,"aw",.init_array}
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
+; RUN:   grep {\\.section \\.fini_array,"aw",.fini_array}
+
+@llvm.global_ctors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_init } ]                ; <[1 x { i32, void ()* }]*> [#uses=0]
+@llvm.global_dtors = appending global [1 x { i32, void ()* }] [ { i32, void ()* } { i32 65535, void ()* @__mf_fini } ]                ; <[1 x { i32, void ()* }]*> [#uses=0]
+
+define void @__mf_init() {
+entry:
+        ret void
+}
+
+define void @__mf_fini() {
+entry:
+        ret void
+}
diff --git a/test/CodeGen/ARM/dg.exp b/test/CodeGen/ARM/dg.exp
new file mode 100644
index 0000000000000..3ff359aab39b5
--- /dev/null
+++ b/test/CodeGen/ARM/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target ARM] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}
diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll
new file mode 100644
index 0000000000000..1085ec7fa624e
--- /dev/null
+++ b/test/CodeGen/ARM/div.ll
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep __divsi3  %t
+; RUN: grep __udivsi3 %t
+; RUN: grep __modsi3  %t
+; RUN: grep __umodsi3 %t
+
+define i32 @f1(i32 %a, i32 %b) {
+entry:
+        %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+entry:
+        %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f3(i32 %a, i32 %b) {
+entry:
+        %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f4(i32 %a, i32 %b) {
+entry:
+        %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
diff --git a/test/CodeGen/ARM/dyn-stackalloc.ll b/test/CodeGen/ARM/dyn-stackalloc.ll
new file mode 100644
index 0000000000000..602fd9bd550ab
--- /dev/null
+++ b/test/CodeGen/ARM/dyn-stackalloc.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp}
+; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \
+; RUN:   not grep {sub.*r7}
+; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280
+
+	%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
+	%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
+
+define void @t1(%struct.state* %v) {
+	%tmp6 = load i32* null
+	%tmp8 = alloca float, i32 %tmp6
+	store i32 1, i32* null
+	br i1 false, label %bb123.preheader, label %return
+
+bb123.preheader:
+	br i1 false, label %bb43, label %return
+
+bb43:
+	call fastcc void @f1( float* %tmp8, float* null, i32 0 )
+	%tmp70 = load i32* null
+	%tmp85 = getelementptr float* %tmp8, i32 0
+	call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 )
+	ret void
+
+return:
+	ret void
+}
+
+declare fastcc void @f1(float*, float*, i32)
+
+declare fastcc void @f2(float*, float*, float*, i32)
+
+	%struct.comment = type { i8**, i32*, i32, i8* }
+@str215 = external global [2 x i8]
+
+define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
+	%tmp1 = call i32 @strlen( i8* %tag )
+	%tmp3 = call i32 @strlen( i8* %contents )
+	%tmp4 = add i32 %tmp1, 2
+	%tmp5 = add i32 %tmp4, %tmp3
+	%tmp6 = alloca i8, i32 %tmp5
+	%tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag )
+	%tmp6.len = call i32 @strlen( i8* %tmp6 )
+	%tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len
+	call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 )
+	%tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents )
+	call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 )
+	ret void
+}
+
+declare i32 @strlen(i8*)
+
+declare i8* @strcat(i8*, i8*)
+
+declare fastcc void @comment_add(%struct.comment*, i8*)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare i8* @strcpy(i8*, i8*)
diff --git a/test/CodeGen/ARM/extloadi1.ll b/test/CodeGen/ARM/extloadi1.ll
new file mode 100644
index 0000000000000..2e9041c6ecab1
--- /dev/null
+++ b/test/CodeGen/ARM/extloadi1.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm
+@handler_installed.6144.b = external global i1          ; <i1*> [#uses=1]
+
+define void @__mf_sigusr1_respond() {
+entry:
+        %tmp8.b = load i1* @handler_installed.6144.b            ; <i1> [#uses=1]
+        br i1 false, label %cond_true7, label %cond_next
+
+cond_next:              ; preds = %entry
+        br i1 %tmp8.b, label %bb, label %cond_next3
+
+cond_next3:             ; preds = %cond_next
+        ret void
+
+bb:             ; preds = %cond_next
+        ret void
+
+cond_true7:             ; preds = %entry
+        ret void
+}
diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll
new file mode 100644
index 0000000000000..66acda9c9b913
--- /dev/null
+++ b/test/CodeGen/ARM/fcopysign.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep bic | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
+; RUN:   grep fneg | count 2
+
+define float @test1(float %x, double %y) {
+	%tmp = fpext float %x to double
+	%tmp2 = tail call double @copysign( double %tmp, double %y )
+	%tmp3 = fptrunc double %tmp2 to float
+	ret float %tmp3
+}
+
+define double @test2(double %x, float %y) {
+	%tmp = fpext float %y to double
+	%tmp2 = tail call double @copysign( double %x, double %tmp )
+	ret double %tmp2
+}
+
+declare double @copysign(double, double)
diff --git a/test/CodeGen/ARM/fixunsdfdi.ll b/test/CodeGen/ARM/fixunsdfdi.ll
new file mode 100644
index 0000000000000..d3038b9af76c5
--- /dev/null
+++ b/test/CodeGen/ARM/fixunsdfdi.ll
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fstd
+
+define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
+entry:
+	%x14 = bitcast double %x to i64		; <i64> [#uses=1]
+	br i1 true, label %bb3, label %bb10
+
+bb3:		; preds = %entry
+	br i1 true, label %bb5, label %bb7
+
+bb5:		; preds = %bb3
+	%u.in.mask = and i64 %x14, -4294967296		; <i64> [#uses=1]
+	%.ins = or i64 0, %u.in.mask		; <i64> [#uses=1]
+	%0 = bitcast i64 %.ins to double		; <double> [#uses=1]
+	%1 = sub double %x, %0		; <double> [#uses=1]
+	%2 = fptosi double %1 to i32		; <i32> [#uses=1]
+	%3 = add i32 %2, 0		; <i32> [#uses=1]
+	%4 = zext i32 %3 to i64		; <i64> [#uses=1]
+	%5 = shl i64 %4, 32		; <i64> [#uses=1]
+	%6 = or i64 %5, 0		; <i64> [#uses=1]
+	ret i64 %6
+
+bb7:		; preds = %bb3
+	ret i64 0
+
+bb10:		; preds = %entry
+	ret i64 0
+}
diff --git a/test/CodeGen/ARM/fmdrr-fmrrd.ll b/test/CodeGen/ARM/fmdrr-fmrrd.ll
new file mode 100644
index 0000000000000..315e6238732fc
--- /dev/null
+++ b/test/CodeGen/ARM/fmdrr-fmrrd.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fmdrr
+; RUN: llvm-as < %s | llc -march=arm -mattr=vfp2 | not grep fmrrd
+
+; naive codegen for this is:
+; _i:
+;        fmdrr d0, r0, r1
+;        fmrrd r0, r1, d0
+;        bx lr
+
+define i64 @test(double %X) {
+        %Y = bitcast double %X to i64
+        ret i64 %Y
+}
diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll
new file mode 100644
index 0000000000000..87a30c99e2818
--- /dev/null
+++ b/test/CodeGen/ARM/fnmul.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fnmuld
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul
+
+
+define double @t1(double %a, double %b) {
+entry:
+        %tmp2 = sub double -0.000000e+00, %a            ; <double> [#uses=1]
+        %tmp4 = mul double %tmp2, %b            ; <double> [#uses=1]
+        ret double %tmp4
+}
+
diff --git a/test/CodeGen/ARM/formal.ll b/test/CodeGen/ARM/formal.ll
new file mode 100644
index 0000000000000..6d6d108f32835
--- /dev/null
+++ b/test/CodeGen/ARM/formal.ll
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+declare void @bar(i64 %x, i64 %y)
+
+define void @foo() {
+  call void @bar(i64 2, i64 3)
+  ret void
+}
diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll
new file mode 100644
index 0000000000000..ba199dbf56080
--- /dev/null
+++ b/test/CodeGen/ARM/fp.ll
@@ -0,0 +1,62 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fmsr %t | count 4
+; RUN: grep fsitos %t
+; RUN: grep fmrs %t | count 2
+; RUN: grep fsitod %t
+; RUN: grep fmrrd %t | count 3
+; RUN: not grep fmdrr %t 
+; RUN: grep fldd %t
+; RUN: grep fuitod %t
+; RUN: grep fuitos %t
+; RUN: grep 1065353216 %t
+
+define float @f(i32 %a) {
+entry:
+        %tmp = sitofp i32 %a to float           ; <float> [#uses=1]
+        ret float %tmp
+}
+
+define double @g(i32 %a) {
+entry:
+        %tmp = sitofp i32 %a to double          ; <double> [#uses=1]
+        ret double %tmp
+}
+
+define double @uint_to_double(i32 %a) {
+entry:
+        %tmp = uitofp i32 %a to double          ; <double> [#uses=1]
+        ret double %tmp
+}
+
+define float @uint_to_float(i32 %a) {
+entry:
+        %tmp = uitofp i32 %a to float           ; <float> [#uses=1]
+        ret float %tmp
+}
+
+define double @h(double* %v) {
+entry:
+        %tmp = load double* %v          ; <double> [#uses=1]
+        ret double %tmp
+}
+
+define float @h2() {
+entry:
+        ret float 1.000000e+00
+}
+
+define double @f2(double %a) {
+        ret double %a
+}
+
+define void @f3() {
+entry:
+        %tmp = call double @f5( )               ; <double> [#uses=1]
+        call void @f4( double %tmp )
+        ret void
+}
+
+declare void @f4(double)
+
+declare double @f5()
+
diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll
new file mode 100644
index 0000000000000..11933d5f70c90
--- /dev/null
+++ b/test/CodeGen/ARM/fparith.ll
@@ -0,0 +1,85 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fadds %t
+; RUN: grep faddd %t
+; RUN: grep fmuls %t
+; RUN: grep fmuld %t
+; RUN: grep eor %t
+; RUN: grep fnegd %t
+; RUN: grep fdivs %t
+; RUN: grep fdivd %t
+
+define float @f1(float %a, float %b) {
+entry:
+	%tmp = add float %a, %b		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f2(double %a, double %b) {
+entry:
+	%tmp = add double %a, %b		; <double> [#uses=1]
+	ret double %tmp
+}
+
+define float @f3(float %a, float %b) {
+entry:
+	%tmp = mul float %a, %b		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f4(double %a, double %b) {
+entry:
+	%tmp = mul double %a, %b		; <double> [#uses=1]
+	ret double %tmp
+}
+
+define float @f5(float %a, float %b) {
+entry:
+	%tmp = sub float %a, %b		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f6(double %a, double %b) {
+entry:
+	%tmp = sub double %a, %b		; <double> [#uses=1]
+	ret double %tmp
+}
+
+define float @f7(float %a) {
+entry:
+	%tmp1 = sub float -0.000000e+00, %a		; <float> [#uses=1]
+	ret float %tmp1
+}
+
+define double @f8(double %a) {
+entry:
+	%tmp1 = sub double -0.000000e+00, %a		; <double> [#uses=1]
+	ret double %tmp1
+}
+
+define float @f9(float %a, float %b) {
+entry:
+	%tmp1 = fdiv float %a, %b		; <float> [#uses=1]
+	ret float %tmp1
+}
+
+define double @f10(double %a, double %b) {
+entry:
+	%tmp1 = fdiv double %a, %b		; <double> [#uses=1]
+	ret double %tmp1
+}
+
+define float @f11(float %a) {
+entry:
+	%tmp1 = call float @fabsf( float %a )		; <float> [#uses=1]
+	ret float %tmp1
+}
+
+declare float @fabsf(float)
+
+define double @f12(double %a) {
+entry:
+	%tmp1 = call double @fabs( double %a )		; <double> [#uses=1]
+	ret double %tmp1
+}
+
+declare double @fabs(double)
diff --git a/test/CodeGen/ARM/fpcmp.ll b/test/CodeGen/ARM/fpcmp.ll
new file mode 100644
index 0000000000000..ce0f4029589d5
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp.ll
@@ -0,0 +1,57 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep movmi %t
+; RUN: grep moveq %t
+; RUN: grep movgt %t
+; RUN: grep movge %t
+; RUN: grep movne %t
+; RUN: grep fcmped %t | count 1
+; RUN: grep fcmpes %t | count 6
+
+define i32 @f1(float %a) {
+entry:
+        %tmp = fcmp olt float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp1 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f2(float %a) {
+entry:
+        %tmp = fcmp oeq float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp2 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp2
+}
+
+define i32 @f3(float %a) {
+entry:
+        %tmp = fcmp ogt float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp3 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp3
+}
+
+define i32 @f4(float %a) {
+entry:
+        %tmp = fcmp oge float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp4 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp4
+}
+
+define i32 @f5(float %a) {
+entry:
+        %tmp = fcmp ole float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp5 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp5
+}
+
+define i32 @f6(float %a) {
+entry:
+        %tmp = fcmp une float %a, 1.000000e+00          ; <i1> [#uses=1]
+        %tmp6 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp6
+}
+
+define i32 @g1(double %a) {
+entry:
+        %tmp = fcmp olt double %a, 1.000000e+00         ; <i1> [#uses=1]
+        %tmp7 = zext i1 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/fpcmp_ueq.ll b/test/CodeGen/ARM/fpcmp_ueq.ll
new file mode 100644
index 0000000000000..3e749afb400cb
--- /dev/null
+++ b/test/CodeGen/ARM/fpcmp_ueq.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm | grep moveq 
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | grep movvs
+
+define i32 @f7(float %a, float %b) {
+entry:
+    %tmp = fcmp ueq float %a,%b
+    %retval = select i1 %tmp, i32 666, i32 42
+    ret i32 %retval
+}
+
diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll
new file mode 100644
index 0000000000000..23850075d0dc9
--- /dev/null
+++ b/test/CodeGen/ARM/fpconv.ll
@@ -0,0 +1,83 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 > %t
+; RUN: grep fcvtsd %t
+; RUN: grep fcvtds %t
+; RUN: grep ftosizs %t
+; RUN: grep ftouizs %t
+; RUN: grep ftosizd %t
+; RUN: grep ftouizd %t
+; RUN: grep fsitos %t
+; RUN: grep fsitod %t
+; RUN: grep fuitos %t
+; RUN: grep fuitod %t
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep truncdfsf2 %t
+; RUN: grep extendsfdf2 %t
+; RUN: grep fixsfsi %t
+; RUN: grep fixunssfsi %t
+; RUN: grep fixdfsi %t
+; RUN: grep fixunsdfsi %t
+; RUN: grep floatsisf %t
+; RUN: grep floatsidf %t
+; RUN: grep floatunsisf %t
+; RUN: grep floatunsidf %t
+; RUN: llvm-as < %s | llc -march=thumb
+
+define float @f1(double %x) {
+entry:
+	%tmp1 = fptrunc double %x to float		; <float> [#uses=1]
+	ret float %tmp1
+}
+
+define double @f2(float %x) {
+entry:
+	%tmp1 = fpext float %x to double		; <double> [#uses=1]
+	ret double %tmp1
+}
+
+define i32 @f3(float %x) {
+entry:
+	%tmp = fptosi float %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f4(float %x) {
+entry:
+	%tmp = fptoui float %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f5(double %x) {
+entry:
+	%tmp = fptosi double %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define i32 @f6(double %x) {
+entry:
+	%tmp = fptoui double %x to i32		; <i32> [#uses=1]
+	ret i32 %tmp
+}
+
+define float @f7(i32 %a) {
+entry:
+	%tmp = sitofp i32 %a to float		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f8(i32 %a) {
+entry:
+	%tmp = sitofp i32 %a to double		; <double> [#uses=1]
+	ret double %tmp
+}
+
+define float @f9(i32 %a) {
+entry:
+	%tmp = uitofp i32 %a to float		; <float> [#uses=1]
+	ret float %tmp
+}
+
+define double @f10(i32 %a) {
+entry:
+	%tmp = uitofp i32 %a to double		; <double> [#uses=1]
+	ret double %tmp
+}
diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll
new file mode 100644
index 0000000000000..48204ecdebf9d
--- /dev/null
+++ b/test/CodeGen/ARM/fpmem.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {mov r0, #0} | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep {flds.*\\\[} | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep {fsts.*\\\[} | count 1
+
+define float @f1(float %a) {
+        ret float 0.000000e+00
+}
+
+define float @f2(float* %v, float %u) {
+        %tmp = load float* %v           ; <float> [#uses=1]
+        %tmp1 = add float %tmp, %u              ; <float> [#uses=1]
+        ret float %tmp1
+}
+
+define void @f3(float %a, float %b, float* %v) {
+        %tmp = add float %a, %b         ; <float> [#uses=1]
+        store float %tmp, float* %v
+        ret void
+}
diff --git a/test/CodeGen/ARM/fpow.ll b/test/CodeGen/ARM/fpow.ll
new file mode 100644
index 0000000000000..155763c9847ae
--- /dev/null
+++ b/test/CodeGen/ARM/fpow.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=thumb
+
+define double @t(double %x, double %y) nounwind optsize {
+entry:
+	%0 = tail call double @llvm.pow.f64( double %x, double %y )		; <double> [#uses=1]
+	ret double %0
+}
+
+declare double @llvm.pow.f64(double, double) nounwind readonly
diff --git a/test/CodeGen/ARM/fpowi.ll b/test/CodeGen/ARM/fpowi.ll
new file mode 100644
index 0000000000000..ab09ffff6b36a
--- /dev/null
+++ b/test/CodeGen/ARM/fpowi.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep powidf2
+; PR1287
+
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "arm-linux-gnueabi"
+
+define double @_ZSt3powdi(double %__x, i32 %__i) {
+entry:
+	%tmp3 = call double @llvm.powi.f64( double 0.000000e+00, i32 0 )		; <double> [#uses=1]
+	store double %tmp3, double* null, align 8
+	unreachable
+}
+
+declare double @llvm.powi.f64(double, i32)
+
diff --git a/test/CodeGen/ARM/fptoint.ll b/test/CodeGen/ARM/fptoint.ll
new file mode 100644
index 0000000000000..41168acc42a55
--- /dev/null
+++ b/test/CodeGen/ARM/fptoint.ll
@@ -0,0 +1,47 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | grep fmrs | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | not grep fmrrd
+
+@i = weak global i32 0		; <i32*> [#uses=2]
+@u = weak global i32 0		; <i32*> [#uses=2]
+
+define i32 @foo1(float *%x) {
+        %tmp1 = load float* %x
+	%tmp2 = bitcast float %tmp1 to i32
+	ret i32 %tmp2
+}
+
+define i64 @foo2(double *%x) {
+        %tmp1 = load double* %x
+	%tmp2 = bitcast double %tmp1 to i64
+	ret i64 %tmp2
+}
+
+define void @foo5(float %x) {
+	%tmp1 = fptosi float %x to i32
+	store i32 %tmp1, i32* @i
+	ret void
+}
+
+define void @foo6(float %x) {
+	%tmp1 = fptoui float %x to i32
+	store i32 %tmp1, i32* @u
+	ret void
+}
+
+define void @foo7(double %x) {
+	%tmp1 = fptosi double %x to i32
+	store i32 %tmp1, i32* @i
+	ret void
+}
+
+define void @foo8(double %x) {
+	%tmp1 = fptoui double %x to i32
+	store i32 %tmp1, i32* @u
+	ret void
+}
+
+define void @foo9(double %x) {
+	%tmp = fptoui double %x to i16
+	store i16 %tmp, i16* null
+	ret void
+}
diff --git a/test/CodeGen/ARM/frame_thumb.ll b/test/CodeGen/ARM/frame_thumb.ll
new file mode 100644
index 0000000000000..fe82db9921296
--- /dev/null
+++ b/test/CodeGen/ARM/frame_thumb.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-apple-darwin \
+; RUN:     -disable-fp-elim | not grep {r11}
+; RUN: llvm-as < %s | llc -march=thumb -mtriple=arm-linux-gnueabi \
+; RUN:     -disable-fp-elim | not grep {r11}
+
+define i32 @f() {
+entry:
+	ret i32 10
+}
diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll
new file mode 100644
index 0000000000000..16231da39b7cf
--- /dev/null
+++ b/test/CodeGen/ARM/hello.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | grep mov | count 1
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnu --disable-fp-elim | \
+; RUN:   grep mov | count 3
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep mov | count 2
+
+@str = internal constant [12 x i8] c"Hello World\00"
+
+define i32 @main() {
+	%tmp = call i32 @puts( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) )		; <i32> [#uses=0]
+	ret i32 0
+}
+
+declare i32 @puts(i8*)
diff --git a/test/CodeGen/ARM/hidden-vis-2.ll b/test/CodeGen/ARM/hidden-vis-2.ll
new file mode 100644
index 0000000000000..6cf69aa486d5c
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis-2.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldr | count 2
+
+@x = weak hidden global i32 0		; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+	%0 = load i32* @x, align 4		; <i32> [#uses=1]
+	ret i32 %0
+}
diff --git a/test/CodeGen/ARM/hidden-vis-3.ll b/test/CodeGen/ARM/hidden-vis-3.ll
new file mode 100644
index 0000000000000..4477f2a441a15
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis-3.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldr | count 6
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep non_lazy_ptr
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep long | count 4
+
+@x = external hidden global i32		; <i32*> [#uses=1]
+@y = extern_weak hidden global i32	; <i32*> [#uses=1]
+
+define i32 @t() nounwind readonly {
+entry:
+	%0 = load i32* @x, align 4		; <i32> [#uses=1]
+	%1 = load i32* @y, align 4		; <i32> [#uses=1]
+	%2 = add i32 %1, %0		; <i32> [#uses=1]
+	ret i32 %2
+}
diff --git a/test/CodeGen/ARM/hidden-vis.ll b/test/CodeGen/ARM/hidden-vis.ll
new file mode 100644
index 0000000000000..93f81ecdae053
--- /dev/null
+++ b/test/CodeGen/ARM/hidden-vis.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep .private_extern | count 2
+
+%struct.Person = type { i32 }
+@a = hidden global i32 0
+@b = external global i32
+
+
+define weak hidden void @_ZN6Person13privateMethodEv(%struct.Person* %this) {
+  ret void
+}
+
+declare void @function(i32)
+
+define weak void @_ZN6PersonC1Ei(%struct.Person* %this, i32 %_c) {
+  ret void
+}
+
diff --git a/test/CodeGen/ARM/iabs.ll b/test/CodeGen/ARM/iabs.ll
new file mode 100644
index 0000000000000..f10591f41f765
--- /dev/null
+++ b/test/CodeGen/ARM/iabs.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm -stats |& \
+; RUN:   grep {3 .*Number of machine instrs printed}
+; RUN: llvm-as < %s | llc -march=thumb -stats |& \
+; RUN:   grep {4 .*Number of machine instrs printed}
+
+;; Integer absolute value, should produce something as good as: ARM:
+;;   add r3, r0, r0, asr #31
+;;   eor r0, r3, r0, asr #31
+;;   bx lr
+;; Thumb:
+;;   asr r2, r0, #31
+;;   add r0, r0, r2
+;;   eor r0, r2
+;;   bx lr
+
+define i32 @test(i32 %a) {
+        %tmp1neg = sub i32 0, %a
+        %b = icmp sgt i32 %a, -1
+        %abs = select i1 %b, i32 %a, i32 %tmp1neg
+        ret i32 %abs
+}
+
diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll
new file mode 100644
index 0000000000000..7d429550b3add
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt1.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep bx | count 1
+
+define i32 @t1(i32 %a, i32 %b) {
+	%tmp2 = icmp eq i32 %a, 0
+	br i1 %tmp2, label %cond_false, label %cond_true
+
+cond_true:
+	%tmp5 = add i32 %b, 1
+	ret i32 %tmp5
+
+cond_false:
+	%tmp7 = add i32 %b, -1
+	ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll
new file mode 100644
index 0000000000000..3942061212182
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt2.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep bxlt | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep bxgt | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep bxge | count 1
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+	%tmp2 = icmp sgt i32 %c, 10
+	%tmp5 = icmp slt i32 %d, 4
+	%tmp8 = or i1 %tmp5, %tmp2
+	%tmp13 = add i32 %b, %a
+	br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+	%tmp15 = add i32 %tmp13, %c
+	%tmp1821 = sub i32 %tmp15, %d
+	ret i32 %tmp1821
+
+UnifiedReturnBlock:
+	ret i32 %tmp13
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) {
+	%tmp2 = icmp sgt i32 %c, 10
+	%tmp5 = icmp slt i32 %d, 4
+	%tmp8 = and i1 %tmp5, %tmp2
+	%tmp13 = add i32 %b, %a
+	br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:
+	%tmp15 = add i32 %tmp13, %c
+	%tmp1821 = sub i32 %tmp15, %d
+	ret i32 %tmp1821
+
+UnifiedReturnBlock:
+	ret i32 %tmp13
+}
diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll
new file mode 100644
index 0000000000000..620bcbea1f27e
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt3.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep cmpne | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep bx | count 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) {
+	switch i32 %c, label %cond_next [
+		 i32 1, label %cond_true
+		 i32 7, label %cond_true
+	]
+
+cond_true:
+	%tmp12 = add i32 %a, 1
+	%tmp1518 = add i32 %tmp12, %b
+	ret i32 %tmp1518
+
+cond_next:
+	%tmp15 = add i32 %b, %a
+	ret i32 %tmp15
+}
diff --git a/test/CodeGen/ARM/ifcvt4.ll b/test/CodeGen/ARM/ifcvt4.ll
new file mode 100644
index 0000000000000..ce5a679196c59
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt4.ll
@@ -0,0 +1,38 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep subgt | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep suble | count 1
+; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
+
+define i32 @t(i32 %a, i32 %b) {
+entry:
+	%tmp1434 = icmp eq i32 %a, %b		; <i1> [#uses=1]
+	br i1 %tmp1434, label %bb17, label %bb.outer
+
+bb.outer:		; preds = %cond_false, %entry
+	%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]		; <i32> [#uses=5]
+	%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]		; <i32> [#uses=1]
+	br label %bb
+
+bb:		; preds = %cond_true, %bb.outer
+	%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]		; <i32> [#uses=2]
+	%tmp. = sub i32 0, %b_addr.021.0.ph		; <i32> [#uses=1]
+	%tmp.40 = mul i32 %indvar, %tmp.		; <i32> [#uses=1]
+	%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph		; <i32> [#uses=6]
+	%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph		; <i1> [#uses=1]
+	br i1 %tmp3, label %cond_true, label %cond_false
+
+cond_true:		; preds = %bb
+	%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph		; <i32> [#uses=2]
+	%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph		; <i1> [#uses=1]
+	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=1]
+	br i1 %tmp1437, label %bb17, label %bb
+
+cond_false:		; preds = %bb
+	%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0		; <i32> [#uses=2]
+	%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10		; <i1> [#uses=1]
+	br i1 %tmp14, label %bb17, label %bb.outer
+
+bb17:		; preds = %cond_false, %cond_true, %entry
+	%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]		; <i32> [#uses=1]
+	ret i32 %a_addr.026.1
+}
diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
new file mode 100644
index 0000000000000..f8d4f82bbe28b
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep blge | count 1
+
+@x = external global i32*		; <i32**> [#uses=1]
+
+define void @foo(i32 %a) {
+entry:
+	%tmp = load i32** @x		; <i32*> [#uses=1]
+	store i32 %a, i32* %tmp
+	ret void
+}
+
+define void @t1(i32 %a, i32 %b) {
+entry:
+	%tmp1 = icmp sgt i32 %a, 10		; <i1> [#uses=1]
+	br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:		; preds = %entry
+	tail call void @foo( i32 %b )
+	ret void
+
+UnifiedReturnBlock:		; preds = %entry
+	ret void
+}
diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll
new file mode 100644
index 0000000000000..63c4a0819dbf3
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt6.ll
@@ -0,0 +1,25 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep cmpne | count 1
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep ldmhi | count 1
+
+define void @foo(i32 %X, i32 %Y) {
+entry:
+	%tmp1 = icmp ult i32 %X, 4		; <i1> [#uses=1]
+	%tmp4 = icmp eq i32 %Y, 0		; <i1> [#uses=1]
+	%tmp7 = or i1 %tmp4, %tmp1		; <i1> [#uses=1]
+	br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
+
+cond_true:		; preds = %entry
+	%tmp10 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	ret void
+
+UnifiedReturnBlock:		; preds = %entry
+	ret void
+}
+
+declare i32 @bar(...)
diff --git a/test/CodeGen/ARM/ifcvt7.ll b/test/CodeGen/ARM/ifcvt7.ll
new file mode 100644
index 0000000000000..6bb4b5609a580
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt7.ll
@@ -0,0 +1,39 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep cmpeq | count 1
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep moveq | count 1
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep ldmeq | count 1
+; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1.
+
+	%struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* }
+
+define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
+entry:
+	br label %tailrecurse
+
+tailrecurse:		; preds = %bb, %entry
+	%tmp6 = load %struct.quad_struct** null		; <%struct.quad_struct*> [#uses=1]
+	%tmp9 = load %struct.quad_struct** null		; <%struct.quad_struct*> [#uses=2]
+	%tmp12 = load %struct.quad_struct** null		; <%struct.quad_struct*> [#uses=1]
+	%tmp14 = icmp eq %struct.quad_struct* null, null		; <i1> [#uses=1]
+	%tmp17 = icmp eq %struct.quad_struct* %tmp6, null		; <i1> [#uses=1]
+	%tmp23 = icmp eq %struct.quad_struct* %tmp9, null		; <i1> [#uses=1]
+	%tmp29 = icmp eq %struct.quad_struct* %tmp12, null		; <i1> [#uses=1]
+	%bothcond = and i1 %tmp17, %tmp14		; <i1> [#uses=1]
+	%bothcond1 = and i1 %bothcond, %tmp23		; <i1> [#uses=1]
+	%bothcond2 = and i1 %bothcond1, %tmp29		; <i1> [#uses=1]
+	br i1 %bothcond2, label %return, label %bb
+
+bb:		; preds = %tailrecurse
+	%tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 )		; <i32> [#uses=0]
+	br label %tailrecurse
+
+return:		; preds = %tailrecurse
+	ret i32 0
+}
diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll
new file mode 100644
index 0000000000000..85bd8c7bf1fc8
--- /dev/null
+++ b/test/CodeGen/ARM/ifcvt8.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -mtriple=arm-apple-darwin | \
+; RUN:   grep ldmne | count 1
+
+	%struct.SString = type { i8*, i32, i32 }
+
+declare void @abort()
+
+define fastcc void @t(%struct.SString* %word, i8 signext  %c) {
+entry:
+	%tmp1 = icmp eq %struct.SString* %word, null		; <i1> [#uses=1]
+	br i1 %tmp1, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	tail call void @abort( )
+	unreachable
+
+cond_false:		; preds = %entry
+	ret void
+}
diff --git a/test/CodeGen/ARM/illegal-vector-bitcast.ll b/test/CodeGen/ARM/illegal-vector-bitcast.ll
new file mode 100644
index 0000000000000..79f9929b7df3f
--- /dev/null
+++ b/test/CodeGen/ARM/illegal-vector-bitcast.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @foo(<8 x float>* %f, <8 x float>* %g, <4 x i64>* %y)
+{
+  %h = load <8 x float>* %f
+  %i = mul <8 x float> %h, <float 0x3FF19999A0000000, float 0x400A666660000000, float 0x40119999A0000000, float 0x40159999A0000000, float 0.5, float 0x3FE3333340000000, float 0x3FE6666660000000, float 0x3FE99999A0000000>
+  %m = bitcast <8 x float> %i to <4 x i64>
+  %z = load <4 x i64>* %y
+  %n = mul <4 x i64> %z, %m
+  %p = bitcast <4 x i64> %n to <8 x float>
+  store <8 x float> %p, <8 x float>* %g
+  ret void
+}
diff --git a/test/CodeGen/ARM/imm.ll b/test/CodeGen/ARM/imm.ll
new file mode 100644
index 0000000000000..998adbae5c94f
--- /dev/null
+++ b/test/CodeGen/ARM/imm.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep CPI
+
+define i32 @test1(i32 %A) {
+        %B = add i32 %A, -268435441             ; <i32> [#uses=1]
+        ret i32 %B
+}
+
+define i32 @test2() {
+        ret i32 65533
+}
+
+define i32 @test3(i32 %A) {
+        %B = or i32 %A, 65533           ; <i32> [#uses=1]
+        ret i32 %B
+}
+
diff --git a/test/CodeGen/ARM/inlineasm-imm-arm.ll b/test/CodeGen/ARM/inlineasm-imm-arm.ll
new file mode 100644
index 0000000000000..2ceceae0d9d17
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm-imm-arm.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+; Test ARM-mode "I" constraint, for any Data Processing immediate.
+define i32 @testI(i32 %x) {
+	%y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 65280 ) nounwind
+	ret i32 %y
+}
+
+; Test ARM-mode "J" constraint, for compatibility with unknown use in GCC.
+define void @testJ() {
+	tail call void asm sideeffect ".word $0", "J"( i32 4080 ) nounwind
+	ret void
+}
+
+; Test ARM-mode "K" constraint, for bitwise inverted Data Processing immediates.
+define void @testK() {
+	tail call void asm sideeffect ".word $0", "K"( i32 16777215 ) nounwind
+	ret void
+}
+
+; Test ARM-mode "L" constraint, for negated Data Processing immediates.
+define void @testL() {
+	tail call void asm sideeffect ".word $0", "L"( i32 -65280 ) nounwind
+	ret void
+}
+
+; Test ARM-mode "M" constraint, for value between 0 and 32.
+define i32 @testM(i32 %x) {
+	%y = call i32 asm "lsl $0, $1, $2", "=r,r,M"( i32 %x, i32 31 ) nounwind
+	ret i32 %y
+}
diff --git a/test/CodeGen/ARM/inlineasm-imm-thumb.ll b/test/CodeGen/ARM/inlineasm-imm-thumb.ll
new file mode 100644
index 0000000000000..2c872e7e310fd
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm-imm-thumb.ll
@@ -0,0 +1,43 @@
+; RUN: llvm-as < %s | llc -march=thumb
+
+; Test Thumb-mode "I" constraint, for ADD immediate.
+define i32 @testI(i32 %x) {
+	%y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind
+	ret i32 %y
+}
+
+; Test Thumb-mode "J" constraint, for negated ADD immediates.
+define void @testJ() {
+	tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind
+	ret void
+}
+
+; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
+define void @testK() {
+	tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind
+	ret void
+}
+
+; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
+define i32 @testL(i32 %x) {
+	%y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind
+	ret i32 %y
+}
+
+; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
+define i32 @testM() {
+	%y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
+	ret i32 %y
+}
+
+; Test Thumb-mode "N" constraint, for values between 0 and 31.
+define i32 @testN(i32 %x) {
+	%y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind
+	ret i32 %y
+}
+
+; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
+define void @testO() {
+	tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind
+        ret void
+}
diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll
new file mode 100644
index 0000000000000..2f7332a5f4805
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+
+define i32 @test1(i32 %tmp54) {
+	%tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 )		; <i32> [#uses=1]
+	ret i32 %tmp56
+}
+
+define void @test2() {
+	%tmp1 = call i64 asm "ldmia $1!, {$0, ${0:H}}", "=r,=*r,1"( i32** null, i32* null )		; <i64> [#uses=2]
+	%tmp2 = lshr i64 %tmp1, 32		; <i64> [#uses=1]
+	%tmp3 = trunc i64 %tmp2 to i32		; <i32> [#uses=1]
+	%tmp4 = call i32 asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( i32 0, i32 %tmp3 )		; <i32> [#uses=0]
+	ret void
+}
+
+define void @test3() {
+	tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+	ret void
+}
diff --git a/test/CodeGen/ARM/inlineasm2.ll b/test/CodeGen/ARM/inlineasm2.ll
new file mode 100644
index 0000000000000..69394eb5bd494
--- /dev/null
+++ b/test/CodeGen/ARM/inlineasm2.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define double @__ieee754_sqrt(double %x) {
+	%tmp2 = tail call double asm "fsqrtd ${0:P}, ${1:P}", "=w,w"( double %x )
+	ret double %tmp2
+}
+
+define float @__ieee754_sqrtf(float %x) {
+	%tmp2 = tail call float asm "fsqrts $0, $1", "=w,w"( float %x )
+	ret float %tmp2
+}
diff --git a/test/CodeGen/ARM/insn-sched1.ll b/test/CodeGen/ARM/insn-sched1.ll
new file mode 100644
index 0000000000000..f20344301e997
--- /dev/null
+++ b/test/CodeGen/ARM/insn-sched1.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6 |\
+; RUN:   grep mov | count 3
+
+define i32 @test(i32 %x) {
+        %tmp = trunc i32 %x to i16              ; <i16> [#uses=1]
+        %tmp2 = tail call i32 @f( i32 1, i16 %tmp )             ; <i32> [#uses=1]
+        ret i32 %tmp2
+}
+
+declare i32 @f(i32, i16)
diff --git a/test/CodeGen/ARM/ispositive.ll b/test/CodeGen/ARM/ispositive.ll
new file mode 100644
index 0000000000000..8dcac30fac8be
--- /dev/null
+++ b/test/CodeGen/ARM/ispositive.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm | grep {mov r0, r0, lsr #31}
+; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31}
+
+define i32 @test1(i32 %X) {
+entry:
+        icmp slt i32 %X, 0              ; <i1>:0 [#uses=1]
+        zext i1 %0 to i32               ; <i32>:1 [#uses=1]
+        ret i32 %1
+}
+
diff --git a/test/CodeGen/ARM/large-stack.ll b/test/CodeGen/ARM/large-stack.ll
new file mode 100644
index 0000000000000..42d7d0972dca8
--- /dev/null
+++ b/test/CodeGen/ARM/large-stack.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5
+
+define void @test1() {
+    %tmp = alloca [ 64 x i32 ] , align 4
+    ret void
+}
+
+define void @test2() {
+    %tmp = alloca [ 4168 x i8 ] , align 4
+    ret void
+}
+
+define i32 @test3() {
+	%retval = alloca i32, align 4
+	%tmp = alloca i32, align 4
+	%a = alloca [805306369 x i8], align 16
+	store i32 0, i32* %tmp
+	%tmp1 = load i32* %tmp
+        ret i32 %tmp1
+}
diff --git a/test/CodeGen/ARM/ldm.ll b/test/CodeGen/ARM/ldm.ll
new file mode 100644
index 0000000000000..6a054577fc8bf
--- /dev/null
+++ b/test/CodeGen/ARM/ldm.ll
@@ -0,0 +1,35 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep ldmia | count 2
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep ldmib | count 1
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
+; RUN:   grep {ldmfd sp\!} | count 3
+
+@X = external global [0 x i32]          ; <[0 x i32]*> [#uses=5]
+
+define i32 @t1() {
+        %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0)            ; <i32> [#uses=1]
+        %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1)           ; <i32> [#uses=1]
+        %tmp4 = tail call i32 @f1( i32 %tmp, i32 %tmp3 )                ; <i32> [#uses=1]
+        ret i32 %tmp4
+}
+
+define i32 @t2() {
+        %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2)            ; <i32> [#uses=1]
+        %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3)           ; <i32> [#uses=1]
+        %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 4)           ; <i32> [#uses=1]
+        %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 )             ; <i32> [#uses=1]
+        ret i32 %tmp6
+}
+
+define i32 @t3() {
+        %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1)            ; <i32> [#uses=1]
+        %tmp3 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 2)           ; <i32> [#uses=1]
+        %tmp5 = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 3)           ; <i32> [#uses=1]
+        %tmp6 = tail call i32 @f2( i32 %tmp, i32 %tmp3, i32 %tmp5 )             ; <i32> [#uses=1]
+        ret i32 %tmp6
+}
+
+declare i32 @f1(i32, i32)
+
+declare i32 @f2(i32, i32, i32)
diff --git a/test/CodeGen/ARM/ldr.ll b/test/CodeGen/ARM/ldr.ll
new file mode 100644
index 0000000000000..23c0b99a86204
--- /dev/null
+++ b/test/CodeGen/ARM/ldr.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {ldr r0} | count 3
+
+define i32 @f1(i32* %v) {
+entry:
+        %tmp = load i32* %v             ; <i32> [#uses=1]
+        ret i32 %tmp
+}
+
+define i32 @f2(i32* %v) {
+entry:
+        %tmp2 = getelementptr i32* %v, i32 1023         ; <i32*> [#uses=1]
+        %tmp = load i32* %tmp2          ; <i32> [#uses=1]
+        ret i32 %tmp
+}
+
+define i32 @f3(i32* %v) {
+entry:
+        %tmp2 = getelementptr i32* %v, i32 1024         ; <i32*> [#uses=1]
+        %tmp = load i32* %tmp2          ; <i32> [#uses=1]
+        ret i32 %tmp
+}
+
diff --git a/test/CodeGen/ARM/ldr_ext.ll b/test/CodeGen/ARM/ldr_ext.ll
new file mode 100644
index 0000000000000..edb70d5396dfd
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_ext.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -march=arm | grep ldrb | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrh | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsb | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsh | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1
+
+define i32 @test1(i8* %v.pntr.s0.u1) {
+    %tmp.u = load i8* %v.pntr.s0.u1
+    %tmp1.s = zext i8 %tmp.u to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test2(i16* %v.pntr.s0.u1) {
+    %tmp.u = load i16* %v.pntr.s0.u1
+    %tmp1.s = zext i16 %tmp.u to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test3(i8* %v.pntr.s1.u0) {
+    %tmp.s = load i8* %v.pntr.s1.u0
+    %tmp1.s = sext i8 %tmp.s to i32
+    ret i32 %tmp1.s
+}
+
+define i32 @test4() {
+    %tmp.s = load i16* null
+    %tmp1.s = sext i16 %tmp.s to i32
+    ret i32 %tmp1.s
+}
diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll
new file mode 100644
index 0000000000000..56acc90097998
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_frame.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep mov
+; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2
+
+define i32 @f1() {
+	%buf = alloca [32 x i32], align 4
+	%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0
+	%tmp1 = load i32* %tmp
+	ret i32 %tmp1
+}
+
+define i32 @f2() {
+	%buf = alloca [32 x i8], align 4
+	%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0
+	%tmp1 = load i8* %tmp
+        %tmp2 = zext i8 %tmp1 to i32
+	ret i32 %tmp2
+}
+
+define i32 @f3() {
+	%buf = alloca [32 x i32], align 4
+	%tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32
+	%tmp1 = load i32* %tmp
+	ret i32 %tmp1
+}
+
+define i32 @f4() {
+	%buf = alloca [32 x i8], align 4
+	%tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2
+	%tmp1 = load i8* %tmp
+        %tmp2 = zext i8 %tmp1 to i32
+	ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/ldr_post.ll b/test/CodeGen/ARM/ldr_post.ll
new file mode 100644
index 0000000000000..0491563fc6a69
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_post.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {ldr.*\\\[.*\],} | count 1
+
+define i32 @test(i32 %a, i32 %b, i32 %c) {
+        %tmp1 = mul i32 %a, %b          ; <i32> [#uses=2]
+        %tmp2 = inttoptr i32 %tmp1 to i32*              ; <i32*> [#uses=1]
+        %tmp3 = load i32* %tmp2         ; <i32> [#uses=1]
+        %tmp4 = sub i32 %tmp1, %c               ; <i32> [#uses=1]
+        %tmp5 = mul i32 %tmp4, %tmp3            ; <i32> [#uses=1]
+        ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/ldr_pre.ll b/test/CodeGen/ARM/ldr_pre.ll
new file mode 100644
index 0000000000000..7e447422361ea
--- /dev/null
+++ b/test/CodeGen/ARM/ldr_pre.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {ldr.*\\!} | count 2
+
+define i32* @test1(i32* %X, i32* %dest) {
+        %Y = getelementptr i32* %X, i32 4               ; <i32*> [#uses=2]
+        %A = load i32* %Y               ; <i32> [#uses=1]
+        store i32 %A, i32* %dest
+        ret i32* %Y
+}
+
+define i32 @test2(i32 %a, i32 %b, i32 %c) {
+        %tmp1 = sub i32 %a, %b          ; <i32> [#uses=2]
+        %tmp2 = inttoptr i32 %tmp1 to i32*              ; <i32*> [#uses=1]
+        %tmp3 = load i32* %tmp2         ; <i32> [#uses=1]
+        %tmp4 = sub i32 %tmp1, %c               ; <i32> [#uses=1]
+        %tmp5 = add i32 %tmp4, %tmp3            ; <i32> [#uses=1]
+        ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/load-global.ll b/test/CodeGen/ARM/load-global.ll
new file mode 100644
index 0000000000000..8896ead5a51cd
--- /dev/null
+++ b/test/CodeGen/ARM/load-global.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -mtriple=arm-apple-darwin -relocation-model=static | \
+; RUN:   not grep {L_G\$non_lazy_ptr}
+; RUN: llvm-as < %s | \
+; RUN:   llc -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \
+; RUN:   grep {L_G\$non_lazy_ptr} | count 2
+; RUN: llvm-as < %s | \
+; RUN:   llc -mtriple=arm-apple-darwin -relocation-model=pic | \
+; RUN:   grep {ldr.*pc} | count 1
+; RUN: llvm-as < %s | \
+; RUN:   llc -mtriple=arm-linux-gnueabi -relocation-model=pic | \
+; RUN:   grep {GOT} | count 1
+
+@G = external global i32
+
+define i32 @test1() {
+	%tmp = load i32* @G
+	ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/load.ll b/test/CodeGen/ARM/load.ll
new file mode 100644
index 0000000000000..05097328102c1
--- /dev/null
+++ b/test/CodeGen/ARM/load.ll
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep ldrsb %t
+; RUN: grep ldrb %t
+; RUN: grep ldrsh %t
+; RUN: grep ldrh %t
+
+
+define i32 @f1(i8* %p) {
+entry:
+        %tmp = load i8* %p              ; <i8> [#uses=1]
+        %tmp1 = sext i8 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp1
+}
+
+define i32 @f2(i8* %p) {
+entry:
+        %tmp = load i8* %p              ; <i8> [#uses=1]
+        %tmp2 = zext i8 %tmp to i32              ; <i32> [#uses=1]
+        ret i32 %tmp2
+}
+
+define i32 @f3(i16* %p) {
+entry:
+        %tmp = load i16* %p             ; <i16> [#uses=1]
+        %tmp3 = sext i16 %tmp to i32             ; <i32> [#uses=1]
+        ret i32 %tmp3
+}
+
+define i32 @f4(i16* %p) {
+entry:
+        %tmp = load i16* %p             ; <i16> [#uses=1]
+        %tmp4 = zext i16 %tmp to i32             ; <i32> [#uses=1]
+        ret i32 %tmp4
+}
diff --git a/test/CodeGen/ARM/long-setcc.ll b/test/CodeGen/ARM/long-setcc.ll
new file mode 100644
index 0000000000000..12af8b8d11fd9
--- /dev/null
+++ b/test/CodeGen/ARM/long-setcc.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep cmp | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1
+
+
+define i1 @t1(i64 %x) {
+	%B = icmp slt i64 %x, 0
+	ret i1 %B
+}
+
+define i1 @t2(i64 %x) {
+	%tmp = icmp ult i64 %x, 4294967296
+	ret i1 %tmp
+}
+
+define i1 @t3(i32 %x) {
+	%tmp = icmp ugt i32 %x, -1
+	ret i1 %tmp
+}
diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll
new file mode 100644
index 0000000000000..c7bb3866a5d30
--- /dev/null
+++ b/test/CodeGen/ARM/long.ll
@@ -0,0 +1,87 @@
+; RUN: llvm-as < %s | llc -march=arm -asm-verbose | \
+; RUN:   grep -- {-2147483648} | count 3
+; RUN: llvm-as < %s | llc -march=arm | grep mvn | count 3
+; RUN: llvm-as < %s | llc -march=arm | grep adds | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep adc | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep {subs } | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep sbc | count 1
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep smull | count 1
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep umull | count 1
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep mvn | count 1
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep adc | count 1
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep sbc | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3
+
+define i64 @f1() {
+entry:
+        ret i64 0
+}
+
+define i64 @f2() {
+entry:
+        ret i64 1
+}
+
+define i64 @f3() {
+entry:
+        ret i64 2147483647
+}
+
+define i64 @f4() {
+entry:
+        ret i64 2147483648
+}
+
+define i64 @f5() {
+entry:
+        ret i64 9223372036854775807
+}
+
+define i64 @f6(i64 %x, i64 %y) {
+entry:
+        %tmp1 = add i64 %y, 1           ; <i64> [#uses=1]
+        ret i64 %tmp1
+}
+
+define void @f7() {
+entry:
+        %tmp = call i64 @f8( )          ; <i64> [#uses=0]
+        ret void
+}
+
+declare i64 @f8()
+
+define i64 @f9(i64 %a, i64 %b) {
+entry:
+        %tmp = sub i64 %a, %b           ; <i64> [#uses=1]
+        ret i64 %tmp
+}
+
+define i64 @f(i32 %a, i32 %b) {
+entry:
+        %tmp = sext i32 %a to i64               ; <i64> [#uses=1]
+        %tmp1 = sext i32 %b to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        ret i64 %tmp2
+}
+
+define i64 @g(i32 %a, i32 %b) {
+entry:
+        %tmp = zext i32 %a to i64               ; <i64> [#uses=1]
+        %tmp1 = zext i32 %b to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        ret i64 %tmp2
+}
+
+define i64 @f10() {
+entry:
+        %a = alloca i64, align 8                ; <i64*> [#uses=1]
+        %retval = load i64* %a          ; <i64> [#uses=1]
+        ret i64 %retval
+}
+
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll
new file mode 100644
index 0000000000000..8d5d2f387973b
--- /dev/null
+++ b/test/CodeGen/ARM/long_shift.ll
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep rrx %t | count 1
+; RUN: grep __ashldi3 %t
+; RUN: grep __ashrdi3 %t
+; RUN: grep __lshrdi3 %t
+
+define i64 @f0(i64 %A, i64 %B) {
+	%tmp = bitcast i64 %A to i64
+	%tmp2 = lshr i64 %B, 1
+	%tmp3 = sub i64 %tmp, %tmp2
+	ret i64 %tmp3
+}
+
+define i32 @f1(i64 %x, i64 %y) {
+	%a = shl i64 %x, %y
+	%b = trunc i64 %a to i32
+	ret i32 %b
+}
+
+define i32 @f2(i64 %x, i64 %y) {
+	%a = ashr i64 %x, %y
+	%b = trunc i64 %a to i32
+	ret i32 %b
+}
+
+define i32 @f3(i64 %x, i64 %y) {
+	%a = lshr i64 %x, %y
+	%b = trunc i64 %a to i32
+	ret i32 %b
+}
diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll
new file mode 100644
index 0000000000000..0a9227982d4d4
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-code-insertion.ll
@@ -0,0 +1,60 @@
+; RUN: llvm-as < %s | llc -stats |& grep {40.*Number of machine instrs printed}
+; RUN: llvm-as < %s | llc -stats |& grep {.*Number of re-materialization}
+; This test really wants to check that the resultant "cond_true" block only 
+; has a single store in it, and that cond_true55 only has code to materialize 
+; the constant and do a store.  We do *not* want something like this:
+;
+;LBB1_3: @cond_true
+;        add r8, r0, r6
+;        str r10, [r8, #+4]
+;
+target triple = "arm-apple-darwin8"
+
+define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) {
+entry:
+	%tmp6584 = icmp slt i32 %M, 1		; <i1> [#uses=1]
+	br i1 %tmp6584, label %return, label %bb
+
+bb:		; preds = %cond_next59, %entry
+	%indvar = phi i32 [ 0, %entry ], [ %k.069.0, %cond_next59 ]		; <i32> [#uses=6]
+	%k.069.0 = add i32 %indvar, 1		; <i32> [#uses=3]
+	%tmp3 = getelementptr i32* %mpp, i32 %indvar		; <i32*> [#uses=1]
+	%tmp4 = load i32* %tmp3		; <i32> [#uses=1]
+	%tmp8 = getelementptr i32* %tpmm, i32 %indvar		; <i32*> [#uses=1]
+	%tmp9 = load i32* %tmp8		; <i32> [#uses=1]
+	%tmp10 = add i32 %tmp9, %tmp4		; <i32> [#uses=2]
+	%tmp13 = getelementptr i32* %mc, i32 %k.069.0		; <i32*> [#uses=5]
+	store i32 %tmp10, i32* %tmp13
+	%tmp17 = getelementptr i32* %ip, i32 %indvar		; <i32*> [#uses=1]
+	%tmp18 = load i32* %tmp17		; <i32> [#uses=1]
+	%tmp22 = getelementptr i32* %tpim, i32 %indvar		; <i32*> [#uses=1]
+	%tmp23 = load i32* %tmp22		; <i32> [#uses=1]
+	%tmp24 = add i32 %tmp23, %tmp18		; <i32> [#uses=2]
+	%tmp30 = icmp sgt i32 %tmp24, %tmp10		; <i1> [#uses=1]
+	br i1 %tmp30, label %cond_true, label %cond_next
+
+cond_true:		; preds = %bb
+	store i32 %tmp24, i32* %tmp13
+	br label %cond_next
+
+cond_next:		; preds = %cond_true, %bb
+	%tmp39 = load i32* %tmp13		; <i32> [#uses=1]
+	%tmp42 = getelementptr i32* %ms, i32 %k.069.0		; <i32*> [#uses=1]
+	%tmp43 = load i32* %tmp42		; <i32> [#uses=1]
+	%tmp44 = add i32 %tmp43, %tmp39		; <i32> [#uses=2]
+	store i32 %tmp44, i32* %tmp13
+	%tmp52 = icmp slt i32 %tmp44, -987654321		; <i1> [#uses=1]
+	br i1 %tmp52, label %cond_true55, label %cond_next59
+
+cond_true55:		; preds = %cond_next
+	store i32 -987654321, i32* %tmp13
+	br label %cond_next59
+
+cond_next59:		; preds = %cond_true55, %cond_next
+	%tmp61 = add i32 %indvar, 2		; <i32> [#uses=1]
+	%tmp65 = icmp sgt i32 %tmp61, %M		; <i1> [#uses=1]
+	br i1 %tmp65, label %return, label %bb
+
+return:		; preds = %cond_next59, %entry
+	ret void
+}
diff --git a/test/CodeGen/ARM/lsr-scale-addr-mode.ll b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
new file mode 100644
index 0000000000000..6db0d43e8343f
--- /dev/null
+++ b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | grep -F {str r2, \[r0, +r3, lsl #2\]}
+; Should use scaled addressing mode.
+
+define void @sintzero(i32* %a) nounwind {
+entry:
+	store i32 0, i32* %a
+	br label %cond_next
+
+cond_next:		; preds = %cond_next, %entry
+	%indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ]		; <i32> [#uses=1]
+	%tmp25 = add i32 %indvar, 1		; <i32> [#uses=3]
+	%tmp36 = getelementptr i32* %a, i32 %tmp25		; <i32*> [#uses=1]
+	store i32 0, i32* %tmp36
+	icmp eq i32 %tmp25, -1		; <i1>:0 [#uses=1]
+	br i1 %0, label %return, label %cond_next
+
+return:		; preds = %cond_next
+	ret void
+}
diff --git a/test/CodeGen/ARM/mem.ll b/test/CodeGen/ARM/mem.ll
new file mode 100644
index 0000000000000..e98316576d8a1
--- /dev/null
+++ b/test/CodeGen/ARM/mem.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=arm | grep strb
+; RUN: llvm-as < %s | llc -march=arm | grep strh
+
+define void @f1() {
+entry:
+        store i8 0, i8* null
+        ret void
+}
+
+define void @f2() {
+entry:
+        store i16 0, i16* null
+        ret void
+}
diff --git a/test/CodeGen/ARM/memcpy-inline.ll b/test/CodeGen/ARM/memcpy-inline.ll
new file mode 100644
index 0000000000000..5d1beea5fc258
--- /dev/null
+++ b/test/CodeGen/ARM/memcpy-inline.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrb
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrh
+; This used to look for ldmia. But it's no longer lucky enough to
+; have the load / store instructions lined up just right after
+; scheduler change for pr3457. We'll look for a robust solution
+; later.
+
+	%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+@src = external global %struct.x
+@dst = external global %struct.x
+
+define i32 @t() {
+entry:
+	call void @llvm.memcpy.i32( i8* getelementptr (%struct.x* @dst, i32 0, i32 0), i8* getelementptr (%struct.x* @src, i32 0, i32 0), i32 11, i32 8 )
+	ret i32 0
+}
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
diff --git a/test/CodeGen/ARM/memfunc.ll b/test/CodeGen/ARM/memfunc.ll
new file mode 100644
index 0000000000000..0b58bf680157a
--- /dev/null
+++ b/test/CodeGen/ARM/memfunc.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @f() {
+entry:
+        call void @llvm.memmove.i32( i8* null, i8* null, i32 64, i32 0 )
+        call void @llvm.memcpy.i32( i8* null, i8* null, i32 64, i32 0 )
+        call void @llvm.memset.i32( i8* null, i8 64, i32 0, i32 0 )
+        unreachable
+}
+
+declare void @llvm.memmove.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memcpy.i32(i8*, i8*, i32, i32)
+
+declare void @llvm.memset.i32(i8*, i8, i32, i32)
+
diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll
new file mode 100644
index 0000000000000..f4f0a04266c2e
--- /dev/null
+++ b/test/CodeGen/ARM/mul.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2
+; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2
+; RUN: llvm-as < %s | llc -march=thumb | grep mul | count 3
+; RUN: llvm-as < %s | llc -march=thumb | grep lsl | count 1
+
+define i32 @f1(i32 %u) {
+    %tmp = mul i32 %u, %u
+    ret i32 %tmp
+}
+
+define i32 @f2(i32 %u, i32 %v) {
+    %tmp = mul i32 %u, %v
+    ret i32 %tmp
+}
+
+define i32 @f3(i32 %u) {
+	%tmp = mul i32 %u, 5
+        ret i32 %tmp
+}
+
+define i32 @f4(i32 %u) {
+	%tmp = mul i32 %u, 4
+        ret i32 %tmp
+}
diff --git a/test/CodeGen/ARM/mulhi.ll b/test/CodeGen/ARM/mulhi.ll
new file mode 100644
index 0000000000000..de75e96b87046
--- /dev/null
+++ b/test/CodeGen/ARM/mulhi.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN:   grep smmul | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep umull | count 1
+
+define i32 @smulhi(i32 %x, i32 %y) {
+        %tmp = sext i32 %x to i64               ; <i64> [#uses=1]
+        %tmp1 = sext i32 %y to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        %tmp3 = lshr i64 %tmp2, 32              ; <i64> [#uses=1]
+        %tmp3.upgrd.1 = trunc i64 %tmp3 to i32          ; <i32> [#uses=1]
+        ret i32 %tmp3.upgrd.1
+}
+
+define i32 @umulhi(i32 %x, i32 %y) {
+        %tmp = zext i32 %x to i64               ; <i64> [#uses=1]
+        %tmp1 = zext i32 %y to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        %tmp3 = lshr i64 %tmp2, 32              ; <i64> [#uses=1]
+        %tmp3.upgrd.2 = trunc i64 %tmp3 to i32          ; <i32> [#uses=1]
+        ret i32 %tmp3.upgrd.2
+}
diff --git a/test/CodeGen/ARM/mvn.ll b/test/CodeGen/ARM/mvn.ll
new file mode 100644
index 0000000000000..a7ef907033de3
--- /dev/null
+++ b/test/CodeGen/ARM/mvn.ll
@@ -0,0 +1,74 @@
+; RUN: llvm-as < %s | llc -march=arm | grep mvn | count 8
+
+define i32 @f1() {
+entry:
+	ret i32 -1
+}
+
+define i32 @f2(i32 %a) {
+entry:
+	%tmpnot = xor i32 %a, -1		; <i32> [#uses=1]
+	ret i32 %tmpnot
+}
+
+define i32 @f3(i32 %a) {
+entry:
+	%tmp1 = shl i32 %a, 2		; <i32> [#uses=1]
+	%tmp1not = xor i32 %tmp1, -1		; <i32> [#uses=1]
+	ret i32 %tmp1not
+}
+
+define i32 @f4(i32 %a, i8 %b) {
+entry:
+	%shift.upgrd.1 = zext i8 %b to i32		; <i32> [#uses=1]
+	%tmp3 = shl i32 %a, %shift.upgrd.1		; <i32> [#uses=1]
+	%tmp3not = xor i32 %tmp3, -1		; <i32> [#uses=1]
+	ret i32 %tmp3not
+}
+
+define i32 @f5(i32 %a) {
+entry:
+	%tmp1 = lshr i32 %a, 2		; <i32> [#uses=1]
+	%tmp1not = xor i32 %tmp1, -1		; <i32> [#uses=1]
+	ret i32 %tmp1not
+}
+
+define i32 @f6(i32 %a, i8 %b) {
+entry:
+	%shift.upgrd.2 = zext i8 %b to i32		; <i32> [#uses=1]
+	%tmp2 = lshr i32 %a, %shift.upgrd.2		; <i32> [#uses=1]
+	%tmp2not = xor i32 %tmp2, -1		; <i32> [#uses=1]
+	ret i32 %tmp2not
+}
+
+define i32 @f7(i32 %a) {
+entry:
+	%tmp1 = ashr i32 %a, 2		; <i32> [#uses=1]
+	%tmp1not = xor i32 %tmp1, -1		; <i32> [#uses=1]
+	ret i32 %tmp1not
+}
+
+define i32 @f8(i32 %a, i8 %b) {
+entry:
+	%shift.upgrd.3 = zext i8 %b to i32		; <i32> [#uses=1]
+	%tmp3 = ashr i32 %a, %shift.upgrd.3		; <i32> [#uses=1]
+	%tmp3not = xor i32 %tmp3, -1		; <i32> [#uses=1]
+	ret i32 %tmp3not
+}
+
+define i32 @f9() {
+entry:
+	%tmp4845 = add i32 0, 0		; <i32> [#uses=1]
+	br label %cond_true4848
+
+cond_true4848:		; preds = %entry
+	%tmp4851 = sub i32 -3, 0		; <i32> [#uses=1]
+	%abc = add i32 %tmp4851, %tmp4845		; <i32> [#uses=1]
+	ret i32 %abc
+}
+
+define i1 @f10(i32 %a) {
+entry:
+	%tmp102 = icmp eq i32 -2, %a		; <i1> [#uses=1]
+	ret i1 %tmp102
+}
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll
new file mode 100644
index 0000000000000..151beac3efce0
--- /dev/null
+++ b/test/CodeGen/ARM/pack.ll
@@ -0,0 +1,73 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN:   grep pkhbt | count 5
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN:   grep pkhtb | count 4
+
+define i32 @test1(i32 %X, i32 %Y) {
+	%tmp1 = and i32 %X, 65535		; <i32> [#uses=1]
+	%tmp4 = shl i32 %Y, 16		; <i32> [#uses=1]
+	%tmp5 = or i32 %tmp4, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp5
+}
+
+define i32 @test1a(i32 %X, i32 %Y) {
+	%tmp19 = and i32 %X, 65535		; <i32> [#uses=1]
+	%tmp37 = shl i32 %Y, 16		; <i32> [#uses=1]
+	%tmp5 = or i32 %tmp37, %tmp19		; <i32> [#uses=1]
+	ret i32 %tmp5
+}
+
+define i32 @test2(i32 %X, i32 %Y) {
+	%tmp1 = and i32 %X, 65535		; <i32> [#uses=1]
+	%tmp3 = shl i32 %Y, 12		; <i32> [#uses=1]
+	%tmp4 = and i32 %tmp3, -65536		; <i32> [#uses=1]
+	%tmp57 = or i32 %tmp4, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp57
+}
+
+define i32 @test3(i32 %X, i32 %Y) {
+	%tmp19 = and i32 %X, 65535		; <i32> [#uses=1]
+	%tmp37 = shl i32 %Y, 18		; <i32> [#uses=1]
+	%tmp5 = or i32 %tmp37, %tmp19		; <i32> [#uses=1]
+	ret i32 %tmp5
+}
+
+define i32 @test4(i32 %X, i32 %Y) {
+	%tmp1 = and i32 %X, 65535		; <i32> [#uses=1]
+	%tmp3 = and i32 %Y, -65536		; <i32> [#uses=1]
+	%tmp46 = or i32 %tmp3, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp46
+}
+
+define i32 @test5(i32 %X, i32 %Y) {
+	%tmp17 = and i32 %X, -65536		; <i32> [#uses=1]
+	%tmp2 = bitcast i32 %Y to i32		; <i32> [#uses=1]
+	%tmp4 = lshr i32 %tmp2, 16		; <i32> [#uses=2]
+	%tmp5 = or i32 %tmp4, %tmp17		; <i32> [#uses=1]
+	ret i32 %tmp5
+}
+
+define i32 @test5a(i32 %X, i32 %Y) {
+	%tmp110 = and i32 %X, -65536		; <i32> [#uses=1]
+	%tmp37 = lshr i32 %Y, 16		; <i32> [#uses=1]
+	%tmp39 = bitcast i32 %tmp37 to i32		; <i32> [#uses=1]
+	%tmp5 = or i32 %tmp39, %tmp110		; <i32> [#uses=1]
+	ret i32 %tmp5
+}
+
+define i32 @test6(i32 %X, i32 %Y) {
+	%tmp1 = and i32 %X, -65536		; <i32> [#uses=1]
+	%tmp37 = lshr i32 %Y, 12		; <i32> [#uses=1]
+	%tmp38 = bitcast i32 %tmp37 to i32		; <i32> [#uses=1]
+	%tmp4 = and i32 %tmp38, 65535		; <i32> [#uses=1]
+	%tmp59 = or i32 %tmp4, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp59
+}
+
+define i32 @test7(i32 %X, i32 %Y) {
+	%tmp1 = and i32 %X, -65536		; <i32> [#uses=1]
+	%tmp3 = ashr i32 %Y, 18		; <i32> [#uses=1]
+	%tmp4 = and i32 %tmp3, 65535		; <i32> [#uses=1]
+	%tmp57 = or i32 %tmp4, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp57
+}
diff --git a/test/CodeGen/ARM/pr3502.ll b/test/CodeGen/ARM/pr3502.ll
new file mode 100644
index 0000000000000..dee3fc43f9733
--- /dev/null
+++ b/test/CodeGen/ARM/pr3502.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-none-linux-gnueabi
+;pr3502
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+	%struct.ArmPTD = type { i32 }
+	%struct.RegisterSave = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.SHARED_AREA = type { i32, %struct.SHARED_AREA*, %struct.SHARED_AREA*, %struct.SHARED_AREA*, %struct.ArmPTD, void (%struct.RegisterSave*)*, void (%struct.RegisterSave*)*, i32, [1024 x i8], i32, i32, i32, i32, i32, i8, i8, i16, i32, i32, i32, i32, [16 x i8], i32, i32, i32, i8, i8, i8, i32, i16, i32, i64, i32, i32, i32, i32, i32, i32, i8*, i32, [256 x i8], i32, i32, i32, [20 x i8], %struct.RegisterSave, { %struct.WorldSwitchV5 }, [4 x i32] }
+	%struct.WorldSwitchV5 = type { i32, i32, i32, i32, i32, i32, i32 }
+
+define void @SomeCall(i32 %num) nounwind {
+entry:
+	tail call void asm sideeffect "mcr p15, 0, $0, c7, c10, 4 \0A\09", "r,~{memory}"(i32 0) nounwind
+	tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
+	%0 = load %struct.SHARED_AREA** null, align 4		; <%struct.SHARED_AREA*> [#uses=1]
+	%1 = ptrtoint %struct.SHARED_AREA* %0 to i32		; <i32> [#uses=1]
+	%2 = lshr i32 %1, 20		; <i32> [#uses=1]
+	%3 = tail call i32 @SetCurrEntry(i32 %2, i32 0) nounwind		; <i32> [#uses=0]
+	tail call void @ClearStuff(i32 0) nounwind
+	ret void
+}
+
+declare i32 @SetCurrEntry(i32, i32)
+
+declare void @ClearStuff(i32)
diff --git a/test/CodeGen/ARM/private.ll b/test/CodeGen/ARM/private.ll
new file mode 100644
index 0000000000000..e5eeccb356a5b
--- /dev/null
+++ b/test/CodeGen/ARM/private.ll
@@ -0,0 +1,22 @@
+; Test to make sure that the 'private' is used correctly.
+;
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi > %t
+; RUN: grep .Lfoo: %t
+; RUN: egrep bl.*\.Lfoo %t
+; RUN: grep .Lbaz: %t
+; RUN: grep long.*\.Lbaz %t
+
+declare void @foo()
+
+define private void @foo() {
+        ret void
+}
+
+@baz = private global i32 4;
+
+define i32 @bar() {
+        call void @foo()
+	%1 = load i32* @baz, align 4
+        ret i32 %1
+}
+
diff --git a/test/CodeGen/ARM/remat.ll b/test/CodeGen/ARM/remat.ll
new file mode 100644
index 0000000000000..454d36b46f29d
--- /dev/null
+++ b/test/CodeGen/ARM/remat.ll
@@ -0,0 +1,119 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin 
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 2
+
+	%struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
+	%struct.LOCBOX = type { i32, i32, i32, i32 }
+	%struct.SIDEBOX = type { i32, i32 }
+	%struct.UNCOMBOX = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
+	%struct.cellbox = type { i8*, i32, i32, i32, [9 x i32], i32, i32, i32, i32, i32, i32, i32, double, double, double, double, double, i32, i32, %struct.CONTENTBOX*, %struct.UNCOMBOX*, [8 x %struct.tilebox*], %struct.SIDEBOX* }
+	%struct.termbox = type { %struct.termbox*, i32, i32, i32, i32, i32 }
+	%struct.tilebox = type { %struct.tilebox*, double, double, double, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.termbox*, %struct.LOCBOX* }
+@numcells = external global i32		; <i32*> [#uses=1]
+@cellarray = external global %struct.cellbox**		; <%struct.cellbox***> [#uses=1]
+@numBinsY = external global i32		; <i32*> [#uses=1]
+
+define fastcc void @fixpenal() {
+entry:
+	%tmp491 = load i32* @numcells, align 4		; <i32> [#uses=1]
+	%tmp9 = load %struct.cellbox*** @cellarray, align 4		; <%struct.cellbox**> [#uses=1]
+	%tmp77.i = load i32* @numBinsY, align 4		; <i32> [#uses=2]
+	br label %bb490
+
+bb8:		; preds = %bb490, %cond_false428
+  %foo3 = phi i1 [ 0, %bb490 ], [ 1, %cond_false428 ]
+	br i1 %foo3, label %cond_false58.i, label %cond_false.i
+
+cond_false.i:		; preds = %bb8
+	ret void
+
+cond_false58.i:		; preds = %bb8
+	%highBinX.0.i = select i1 false, i32 1, i32 0		; <i32> [#uses=2]
+	br i1 %foo3, label %cond_next85.i, label %cond_false76.i
+
+cond_false76.i:		; preds = %cond_false58.i
+	ret void
+
+cond_next85.i:		; preds = %cond_false58.i
+	br i1 %foo3, label %cond_next105.i, label %cond_false98.i
+
+cond_false98.i:		; preds = %cond_next85.i
+	ret void
+
+cond_next105.i:		; preds = %cond_next85.i
+	%tmp108.i = icmp eq i32 1, %highBinX.0.i		; <i1> [#uses=1]
+	%tmp115.i = icmp eq i32 1, %tmp77.i		; <i1> [#uses=1]
+	%bothcond.i = and i1 %tmp115.i, %tmp108.i		; <i1> [#uses=1]
+	%storemerge.i = select i1 %bothcond.i, i32 1, i32 0		; <i32> [#uses=2]
+	br i1 %bothcond.i, label %whoOverlaps.exit, label %bb503.preheader.i
+
+bb503.preheader.i:		; preds = %bb513.i, %cond_next105.i
+	%i.022.0.i = phi i32 [ %tmp512.i, %bb513.i ], [ 0, %cond_next105.i ]		; <i32> [#uses=2]
+	%tmp165.i = getelementptr i32*** null, i32 %i.022.0.i		; <i32***> [#uses=0]
+	br label %bb503.i
+
+bb137.i:		; preds = %bb503.i
+	br i1 %tmp506.i, label %bb162.i, label %bb148.i
+
+bb148.i:		; preds = %bb137.i
+	ret void
+
+bb162.i:		; preds = %bb137.i
+	%tmp49435.i = load i32* null		; <i32> [#uses=1]
+	br label %bb170.i
+
+bb170.i:		; preds = %bb491.i, %bb162.i
+	%indvar.i = phi i32 [ %k.032.0.i, %bb491.i ], [ 0, %bb162.i ]		; <i32> [#uses=2]
+	%k.032.0.i = add i32 %indvar.i, 1		; <i32> [#uses=2]
+	%tmp173.i = getelementptr i32* null, i32 %k.032.0.i		; <i32*> [#uses=1]
+	%tmp174.i = load i32* %tmp173.i		; <i32> [#uses=4]
+	%tmp177.i = icmp eq i32 %tmp174.i, %cell.1		; <i1> [#uses=1]
+	%tmp184.i = icmp sgt i32 %tmp174.i, %tmp491		; <i1> [#uses=1]
+	%bothcond = or i1 %tmp177.i, %tmp184.i		; <i1> [#uses=1]
+	br i1 %bothcond, label %bb491.i, label %cond_next188.i
+
+cond_next188.i:		; preds = %bb170.i
+	%tmp191.i = getelementptr %struct.cellbox** %tmp9, i32 %tmp174.i		; <%struct.cellbox**> [#uses=1]
+	%tmp192.i = load %struct.cellbox** %tmp191.i		; <%struct.cellbox*> [#uses=1]
+	%tmp195.i = icmp eq i32 %tmp174.i, 0		; <i1> [#uses=1]
+	br i1 %tmp195.i, label %bb491.i, label %cond_true198.i
+
+cond_true198.i:		; preds = %cond_next188.i
+	%tmp210.i = getelementptr %struct.cellbox* %tmp192.i, i32 0, i32 3		; <i32*> [#uses=0]
+	ret void
+
+bb491.i:		; preds = %cond_next188.i, %bb170.i
+	%tmp490.i = add i32 %indvar.i, 2		; <i32> [#uses=1]
+	%tmp496.i = icmp slt i32 %tmp49435.i, %tmp490.i		; <i1> [#uses=1]
+	br i1 %tmp496.i, label %bb500.i, label %bb170.i
+
+bb500.i:		; preds = %bb491.i
+	%indvar.next82.i = add i32 %j.0.i, 1		; <i32> [#uses=1]
+	br label %bb503.i
+
+bb503.i:		; preds = %bb500.i, %bb503.preheader.i
+	%j.0.i = phi i32 [ 0, %bb503.preheader.i ], [ %indvar.next82.i, %bb500.i ]		; <i32> [#uses=2]
+	%tmp506.i = icmp sgt i32 %j.0.i, %tmp77.i		; <i1> [#uses=1]
+	br i1 %tmp506.i, label %bb513.i, label %bb137.i
+
+bb513.i:		; preds = %bb503.i
+	%tmp512.i = add i32 %i.022.0.i, 1		; <i32> [#uses=2]
+	%tmp516.i = icmp sgt i32 %tmp512.i, %highBinX.0.i		; <i1> [#uses=1]
+	br i1 %tmp516.i, label %whoOverlaps.exit, label %bb503.preheader.i
+
+whoOverlaps.exit:		; preds = %bb513.i, %cond_next105.i
+  %foo = phi i1 [ 1, %bb513.i], [0, %cond_next105.i]
+	br i1 %foo, label %cond_false428, label %bb490
+
+cond_false428:		; preds = %whoOverlaps.exit
+	br i1 %foo, label %bb497, label %bb8
+
+bb490:		; preds = %whoOverlaps.exit, %entry
+	%binY.tmp.2 = phi i32 [ 0, %entry ], [ %storemerge.i, %whoOverlaps.exit ]		; <i32> [#uses=1]
+	%cell.1 = phi i32 [ 1, %entry ], [ 0, %whoOverlaps.exit ]		; <i32> [#uses=1]
+	%foo2 = phi i1 [ 1, %entry], [0, %whoOverlaps.exit]
+	br i1 %foo2, label %bb497, label %bb8
+
+bb497:		; preds = %bb490, %cond_false428
+	%binY.tmp.3 = phi i32 [ %binY.tmp.2, %bb490 ], [ %storemerge.i, %cond_false428 ]		; <i32> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/ret0.ll b/test/CodeGen/ARM/ret0.ll
new file mode 100644
index 0000000000000..792b1690add28
--- /dev/null
+++ b/test/CodeGen/ARM/ret0.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define i32 @test() {
+        ret i32 0
+}
diff --git a/test/CodeGen/ARM/ret_arg1.ll b/test/CodeGen/ARM/ret_arg1.ll
new file mode 100644
index 0000000000000..48a1fda35b331
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg1.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define i32 @test(i32 %a1) {
+        ret i32 %a1
+}
diff --git a/test/CodeGen/ARM/ret_arg2.ll b/test/CodeGen/ARM/ret_arg2.ll
new file mode 100644
index 0000000000000..a74870f85870a
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define i32 @test(i32 %a1, i32 %a2) {
+        ret i32 %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_arg3.ll b/test/CodeGen/ARM/ret_arg3.ll
new file mode 100644
index 0000000000000..9210e7b09f58c
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg3.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=arm
+define i32 @test(i32 %a1, i32 %a2, i32 %a3) {
+        ret i32 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_arg4.ll b/test/CodeGen/ARM/ret_arg4.ll
new file mode 100644
index 0000000000000..a9c66e9e98d1a
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg4.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
+        ret i32 %a4
+}
diff --git a/test/CodeGen/ARM/ret_arg5.ll b/test/CodeGen/ARM/ret_arg5.ll
new file mode 100644
index 0000000000000..620a0175e0728
--- /dev/null
+++ b/test/CodeGen/ARM/ret_arg5.ll
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define i32 @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
+        ret i32 %a5
+}
diff --git a/test/CodeGen/ARM/ret_f32_arg2.ll b/test/CodeGen/ARM/ret_f32_arg2.ll
new file mode 100644
index 0000000000000..287d92b9eb6e3
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f32_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define float @test_f32(float %a1, float %a2) {
+        ret float %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f32_arg5.ll b/test/CodeGen/ARM/ret_f32_arg5.ll
new file mode 100644
index 0000000000000..3418be93e1e87
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f32_arg5.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define float @test_f32_arg5(float %a1, float %a2, float %a3, float %a4, float %a5) {
+        ret float %a5
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg2.ll b/test/CodeGen/ARM/ret_f64_arg2.ll
new file mode 100644
index 0000000000000..66848d5fb49b1
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define double @test_f64(double %a1, double %a2) {
+        ret double %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_reg_split.ll b/test/CodeGen/ARM/ret_f64_arg_reg_split.ll
new file mode 100644
index 0000000000000..626ee6fb13749
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_reg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mcpu=arm8 -mattr=+vfp2
+
+define double @test_double_arg_reg_split(i32 %a1, double %a2) {
+        ret double %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_split.ll b/test/CodeGen/ARM/ret_f64_arg_split.ll
new file mode 100644
index 0000000000000..b03b604beee75
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define double @test_double_arg_split(i64 %a1, i32 %a2, double %a3) {
+        ret double %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_f64_arg_stack.ll b/test/CodeGen/ARM/ret_f64_arg_stack.ll
new file mode 100644
index 0000000000000..ba3ec7fb75173
--- /dev/null
+++ b/test/CodeGen/ARM/ret_f64_arg_stack.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define double @test_double_arg_stack(i64 %a1, i32 %a2, i32 %a3, double %a4) {
+        ret double %a4
+}
+
diff --git a/test/CodeGen/ARM/ret_i128_arg2.ll b/test/CodeGen/ARM/ret_i128_arg2.ll
new file mode 100644
index 0000000000000..0fe98e6b70fc4
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i128_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define i128 @test_i128(i128 %a1, i128 %a2, i128 %a3) {
+        ret i128 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg2.ll b/test/CodeGen/ARM/ret_i64_arg2.ll
new file mode 100644
index 0000000000000..b015a96e0bf0a
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg2.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define i64 @test_i64(i64 %a1, i64 %a2) {
+        ret i64 %a2
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg3.ll b/test/CodeGen/ARM/ret_i64_arg3.ll
new file mode 100644
index 0000000000000..5dfecca319a17
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg3.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define i64 @test_i64_arg3(i64 %a1, i64 %a2, i64 %a3) {
+        ret i64 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_i64_arg_split.ll b/test/CodeGen/ARM/ret_i64_arg_split.ll
new file mode 100644
index 0000000000000..5bd5cb2a230be
--- /dev/null
+++ b/test/CodeGen/ARM/ret_i64_arg_split.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2
+
+define i64 @test_i64_arg_split(i64 %a1, i32 %a2, i64 %a3) {
+        ret i64 %a3
+}
+
diff --git a/test/CodeGen/ARM/ret_void.ll b/test/CodeGen/ARM/ret_void.ll
new file mode 100644
index 0000000000000..68db8c423461e
--- /dev/null
+++ b/test/CodeGen/ARM/ret_void.ll
@@ -0,0 +1,6 @@
+; RUN: llvm-as < %s | llc -march=arm
+
+define void @test() {
+        ret void
+}
+
diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll
new file mode 100644
index 0000000000000..68f6264e8a063
--- /dev/null
+++ b/test/CodeGen/ARM/rev.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep rev16
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep revsh
+
+define i32 @test1(i32 %X) {
+        %tmp1 = lshr i32 %X, 8          ; <i32> [#uses=3]
+        %X15 = bitcast i32 %X to i32            ; <i32> [#uses=1]
+        %tmp4 = shl i32 %X15, 8         ; <i32> [#uses=2]
+        %tmp2 = and i32 %tmp1, 16711680         ; <i32> [#uses=1]
+        %tmp5 = and i32 %tmp4, -16777216                ; <i32> [#uses=1]
+        %tmp9 = and i32 %tmp1, 255              ; <i32> [#uses=1]
+        %tmp13 = and i32 %tmp4, 65280           ; <i32> [#uses=1]
+        %tmp6 = or i32 %tmp5, %tmp2             ; <i32> [#uses=1]
+        %tmp10 = or i32 %tmp6, %tmp13           ; <i32> [#uses=1]
+        %tmp14 = or i32 %tmp10, %tmp9           ; <i32> [#uses=1]
+        ret i32 %tmp14
+}
+
+define i32 @test2(i32 %X) {
+        %tmp1 = lshr i32 %X, 8          ; <i32> [#uses=1]
+        %tmp1.upgrd.1 = trunc i32 %tmp1 to i16          ; <i16> [#uses=1]
+        %tmp3 = trunc i32 %X to i16             ; <i16> [#uses=1]
+        %tmp2 = and i16 %tmp1.upgrd.1, 255              ; <i16> [#uses=1]
+        %tmp4 = shl i16 %tmp3, 8                ; <i16> [#uses=1]
+        %tmp5 = or i16 %tmp2, %tmp4             ; <i16> [#uses=1]
+        %tmp5.upgrd.2 = sext i16 %tmp5 to i32           ; <i32> [#uses=1]
+        ret i32 %tmp5.upgrd.2
+}
diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll
new file mode 100644
index 0000000000000..aa658451675bc
--- /dev/null
+++ b/test/CodeGen/ARM/section.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux | \
+; RUN:   grep {__DTOR_END__:}
+; RUN: llvm-as < %s | llc -mtriple=arm-linux | \
+; RUN:   grep {\\.section.\\.dtors,"aw",.progbits}
+
+@__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors"       ; <[1 x i32]*> [#uses=0]
+
diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll
new file mode 100644
index 0000000000000..ba29c30af5b60
--- /dev/null
+++ b/test/CodeGen/ARM/select.ll
@@ -0,0 +1,63 @@
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep movgt | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep movlt | count 3
+; RUN: llvm-as < %s | llc -march=arm | grep movle | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep movls | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep movhi | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fcpydmi | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3
+; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2
+
+define i32 @f1(i32 %a.s) {
+entry:
+    %tmp = icmp eq i32 %a.s, 4
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f2(i32 %a.s) {
+entry:
+    %tmp = icmp sgt i32 %a.s, 4
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f3(i32 %a.s, i32 %b.s) {
+entry:
+    %tmp = icmp slt i32 %a.s, %b.s
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f4(i32 %a.s, i32 %b.s) {
+entry:
+    %tmp = icmp sle i32 %a.s, %b.s
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f5(i32 %a.u, i32 %b.u) {
+entry:
+    %tmp = icmp ule i32 %a.u, %b.u
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define i32 @f6(i32 %a.u, i32 %b.u) {
+entry:
+    %tmp = icmp ugt i32 %a.u, %b.u
+    %tmp1.s = select i1 %tmp, i32 2, i32 3
+    ret i32 %tmp1.s
+}
+
+define double @f7(double %a, double %b) {
+    %tmp = fcmp olt double %a, 1.234e+00
+    %tmp1 = select i1 %tmp, double -1.000e+00, double %b
+    ret double %tmp1
+}
diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll
new file mode 100644
index 0000000000000..6855e3227b991
--- /dev/null
+++ b/test/CodeGen/ARM/select_xform.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm | grep mov | count 2
+
+define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
+        %tmp1 = icmp sgt i32 %c, 10
+        %tmp2 = select i1 %tmp1, i32 0, i32 2147483647
+        %tmp3 = add i32 %tmp2, %b
+        ret i32 %tmp3
+}
+
+define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
+        %tmp1 = icmp sgt i32 %c, 10
+        %tmp2 = select i1 %tmp1, i32 0, i32 10
+        %tmp3 = sub i32 %b, %tmp2
+        ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll
new file mode 100644
index 0000000000000..cae1c44a729d2
--- /dev/null
+++ b/test/CodeGen/ARM/shifter_operand.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep add | grep lsl
+; RUN: llvm-as < %s | llc -march=arm | grep bic | grep asr
+
+
+define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
+        %shift.upgrd.1 = zext i8 %sh to i32             ; <i32> [#uses=1]
+        %A = shl i32 %Y, %shift.upgrd.1         ; <i32> [#uses=1]
+        %B = add i32 %X, %A             ; <i32> [#uses=1]
+        ret i32 %B
+}
+
+define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
+        %shift.upgrd.2 = zext i8 %sh to i32             ; <i32> [#uses=1]
+        %A = ashr i32 %Y, %shift.upgrd.2                ; <i32> [#uses=1]
+        %B = xor i32 %A, -1             ; <i32> [#uses=1]
+        %C = and i32 %X, %B             ; <i32> [#uses=1]
+        ret i32 %C
+}
diff --git a/test/CodeGen/ARM/smul.ll b/test/CodeGen/ARM/smul.ll
new file mode 100644
index 0000000000000..7a4e4887cc7b6
--- /dev/null
+++ b/test/CodeGen/ARM/smul.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
+; RUN:   grep smulbt | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
+; RUN:   grep smultt | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v5TE | \
+; RUN:   grep smlabt | count 1
+
+@x = weak global i16 0          ; <i16*> [#uses=1]
+@y = weak global i16 0          ; <i16*> [#uses=0]
+
+define i32 @f1(i32 %y) {
+        %tmp = load i16* @x             ; <i16> [#uses=1]
+        %tmp1 = add i16 %tmp, 2         ; <i16> [#uses=1]
+        %tmp2 = sext i16 %tmp1 to i32           ; <i32> [#uses=1]
+        %tmp3 = ashr i32 %y, 16         ; <i32> [#uses=1]
+        %tmp4 = mul i32 %tmp2, %tmp3            ; <i32> [#uses=1]
+        ret i32 %tmp4
+}
+
+define i32 @f2(i32 %x, i32 %y) {
+        %tmp1 = ashr i32 %x, 16         ; <i32> [#uses=1]
+        %tmp3 = ashr i32 %y, 16         ; <i32> [#uses=1]
+        %tmp4 = mul i32 %tmp3, %tmp1            ; <i32> [#uses=1]
+        ret i32 %tmp4
+}
+
+define i32 @f3(i32 %a, i16 %x, i32 %y) {
+        %tmp = sext i16 %x to i32               ; <i32> [#uses=1]
+        %tmp2 = ashr i32 %y, 16         ; <i32> [#uses=1]
+        %tmp3 = mul i32 %tmp2, %tmp             ; <i32> [#uses=1]
+        %tmp5 = add i32 %tmp3, %a               ; <i32> [#uses=1]
+        ret i32 %tmp5
+}
+
diff --git a/test/CodeGen/ARM/stack-frame.ll b/test/CodeGen/ARM/stack-frame.ll
new file mode 100644
index 0000000000000..73ae11b973c20
--- /dev/null
+++ b/test/CodeGen/ARM/stack-frame.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep add | count 1
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1
+
+define void @f1() {
+	%c = alloca i8, align 1
+	ret void
+}
+
+define i32 @f2() {
+	ret i32 1
+}
+
+
diff --git a/test/CodeGen/ARM/str_post.ll b/test/CodeGen/ARM/str_post.ll
new file mode 100644
index 0000000000000..ba813805bacc1
--- /dev/null
+++ b/test/CodeGen/ARM/str_post.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {strh .*\\\[.*\], #-4} | count 1
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {str .*\\\[.*\],} | count 1
+
+define i16 @test1(i32* %X, i16* %A) {
+        %Y = load i32* %X               ; <i32> [#uses=1]
+        %tmp1 = trunc i32 %Y to i16             ; <i16> [#uses=1]
+        store i16 %tmp1, i16* %A
+        %tmp2 = ptrtoint i16* %A to i16         ; <i16> [#uses=1]
+        %tmp3 = sub i16 %tmp2, 4                ; <i16> [#uses=1]
+        ret i16 %tmp3
+}
+
+define i32 @test2(i32* %X, i32* %A) {
+        %Y = load i32* %X               ; <i32> [#uses=1]
+        store i32 %Y, i32* %A
+        %tmp1 = ptrtoint i32* %A to i32         ; <i32> [#uses=1]
+        %tmp2 = sub i32 %tmp1, 4                ; <i32> [#uses=1]
+        ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/str_pre.ll b/test/CodeGen/ARM/str_pre.ll
new file mode 100644
index 0000000000000..c02663fa4040e
--- /dev/null
+++ b/test/CodeGen/ARM/str_pre.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep {str.*\\!} | count 2
+
+define void @test1(i32* %X, i32* %A, i32** %dest) {
+        %B = load i32* %A               ; <i32> [#uses=1]
+        %Y = getelementptr i32* %X, i32 4               ; <i32*> [#uses=2]
+        store i32 %B, i32* %Y
+        store i32* %Y, i32** %dest
+        ret void
+}
+
+define i16* @test2(i16* %X, i32* %A) {
+        %B = load i32* %A               ; <i32> [#uses=1]
+        %Y = getelementptr i16* %X, i32 4               ; <i16*> [#uses=2]
+        %tmp = trunc i32 %B to i16              ; <i16> [#uses=1]
+        store i16 %tmp, i16* %Y
+        ret i16* %Y
+}
diff --git a/test/CodeGen/ARM/str_trunc.ll b/test/CodeGen/ARM/str_trunc.ll
new file mode 100644
index 0000000000000..77c66ec2c7e0c
--- /dev/null
+++ b/test/CodeGen/ARM/str_trunc.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep strb | count 1
+; RUN: llvm-as < %s | llc -march=arm | \
+; RUN:   grep strh | count 1
+
+define void @test1(i32 %v, i16* %ptr) {
+        %tmp = trunc i32 %v to i16              ; <i16> [#uses=1]
+        store i16 %tmp, i16* %ptr
+        ret void
+}
+
+define void @test2(i32 %v, i8* %ptr) {
+        %tmp = trunc i32 %v to i8               ; <i8> [#uses=1]
+        store i8 %tmp, i8* %ptr
+        ret void
+}
diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll
new file mode 100644
index 0000000000000..bfecce8bde227
--- /dev/null
+++ b/test/CodeGen/ARM/sxt_rot.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN:   grep sxtb | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | \
+; RUN:   grep sxtab | count 1
+
+define i8 @test1(i32 %A) signext {
+	%B = lshr i32 %A, 8
+	%C = shl i32 %A, 24
+	%D = or i32 %B, %C
+	%E = trunc i32 %D to i8
+	ret i8 %E
+}
+
+define i32 @test2(i32 %A, i32 %X) signext {
+	%B = lshr i32 %A, 8
+	%C = shl i32 %A, 24
+	%D = or i32 %B, %C
+	%E = trunc i32 %D to i8
+        %F = sext i8 %E to i32
+        %G = add i32 %F, %X
+	ret i32 %G
+}
diff --git a/test/CodeGen/ARM/thread_pointer.ll b/test/CodeGen/ARM/thread_pointer.ll
new file mode 100644
index 0000000000000..6476b483d7d9e
--- /dev/null
+++ b/test/CodeGen/ARM/thread_pointer.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {__aeabi_read_tp}
+
+define i8* @test() {
+entry:
+	%tmp1 = call i8* @llvm.arm.thread.pointer( )		; <i8*> [#uses=0]
+	ret i8* %tmp1
+}
+
+declare i8* @llvm.arm.thread.pointer()
diff --git a/test/CodeGen/ARM/thumb-imm.ll b/test/CodeGen/ARM/thumb-imm.ll
new file mode 100644
index 0000000000000..2be393a95cacb
--- /dev/null
+++ b/test/CodeGen/ARM/thumb-imm.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=thumb | not grep CPI
+
+
+define i32 @test1() {
+  ret i32 1000
+}
+
+define i32 @test2() {
+  ret i32 -256
+}
diff --git a/test/CodeGen/ARM/tls1.ll b/test/CodeGen/ARM/tls1.ll
new file mode 100644
index 0000000000000..6866a42db4951
--- /dev/null
+++ b/test/CodeGen/ARM/tls1.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {i(tpoff)}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {__aeabi_read_tp}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
+; RUN:     -relocation-model=pic | grep {__tls_get_addr}
+
+
+@i = thread_local global i32 15		; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+	%tmp1 = load i32* @i		; <i32> [#uses=1]
+	ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+	ret i32* @i
+}
diff --git a/test/CodeGen/ARM/tls2.ll b/test/CodeGen/ARM/tls2.ll
new file mode 100644
index 0000000000000..90e3bcf9040b5
--- /dev/null
+++ b/test/CodeGen/ARM/tls2.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {i(gottpoff)}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {ldr r., \[pc, r.\]}
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi \
+; RUN:     -relocation-model=pic | grep {__tls_get_addr}
+
+@i = external thread_local global i32		; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+	%tmp1 = load i32* @i		; <i32> [#uses=1]
+	ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+	ret i32* @i
+}
diff --git a/test/CodeGen/ARM/tls3.ll b/test/CodeGen/ARM/tls3.ll
new file mode 100644
index 0000000000000..df2913b61cda9
--- /dev/null
+++ b/test/CodeGen/ARM/tls3.ll
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:     grep {tbss}
+
+%struct.anon = type { i32, i32 }
+@teste = internal thread_local global %struct.anon zeroinitializer		; <%struct.anon*> [#uses=1]
+
+define i32 @main() {
+entry:
+	%tmp2 = load i32* getelementptr (%struct.anon* @teste, i32 0, i32 0), align 8		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
diff --git a/test/CodeGen/ARM/trunc_ldr.ll b/test/CodeGen/ARM/trunc_ldr.ll
new file mode 100644
index 0000000000000..6111ec9d2f48b
--- /dev/null
+++ b/test/CodeGen/ARM/trunc_ldr.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm | grep ldrb.*7 | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep ldrsb.*7 | count 1
+
+	%struct.A = type { i8, i8, i8, i8, i16, i8, i8, %struct.B** }
+	%struct.B = type { float, float, i32, i32, i32, [0 x i8] }
+
+define i8 @f1(%struct.A* %d) {
+	%tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+	%tmp23 = bitcast i16* %tmp2 to i32*
+	%tmp4 = load i32* %tmp23
+	%tmp512 = lshr i32 %tmp4, 24
+	%tmp56 = trunc i32 %tmp512 to i8
+	ret i8 %tmp56
+}
+
+define i32 @f2(%struct.A* %d) {
+	%tmp2 = getelementptr %struct.A* %d, i32 0, i32 4
+	%tmp23 = bitcast i16* %tmp2 to i32*
+	%tmp4 = load i32* %tmp23
+	%tmp512 = lshr i32 %tmp4, 24
+	%tmp56 = trunc i32 %tmp512 to i8
+        %tmp57 = sext i8 %tmp56 to i32
+	ret i32 %tmp57
+}
diff --git a/test/CodeGen/ARM/truncstore-dag-combine.ll b/test/CodeGen/ARM/truncstore-dag-combine.ll
new file mode 100644
index 0000000000000..0e85fb69eb3ae
--- /dev/null
+++ b/test/CodeGen/ARM/truncstore-dag-combine.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | not grep orr
+; RUN: llvm-as < %s | llc -march=arm | not grep mov
+
+define void @bar(i8* %P, i16* %Q) {
+entry:
+	%P1 = bitcast i8* %P to i16*		; <i16*> [#uses=1]
+	%tmp = load i16* %Q, align 1		; <i16> [#uses=1]
+	store i16 %tmp, i16* %P1, align 1
+	ret void
+}
+
+define void @foo(i8* %P, i32* %Q) {
+entry:
+	%P1 = bitcast i8* %P to i32*		; <i32*> [#uses=1]
+	%tmp = load i32* %Q, align 1		; <i32> [#uses=1]
+	store i32 %tmp, i32* %P1, align 1
+	ret void
+}
diff --git a/test/CodeGen/ARM/tst_teq.ll b/test/CodeGen/ARM/tst_teq.ll
new file mode 100644
index 0000000000000..e5aa029d2c1e0
--- /dev/null
+++ b/test/CodeGen/ARM/tst_teq.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -march=arm | grep tst
+; RUN: llvm-as < %s | llc -march=arm | grep teq
+; RUN: llvm-as < %s | llc -march=thumb | grep tst
+
+define i32 @f(i32 %a) {
+entry:
+	%tmp2 = and i32 %a, 255		; <i32> [#uses=1]
+	icmp eq i32 %tmp2, 0		; <i1>:0 [#uses=1]
+	%retval = select i1 %0, i32 20, i32 10		; <i32> [#uses=1]
+	ret i32 %retval
+}
+
+define i32 @g(i32 %a) {
+entry:
+        %tmp2 = xor i32 %a, 255
+	icmp eq i32 %tmp2, 0		; <i1>:0 [#uses=1]
+	%retval = select i1 %0, i32 20, i32 10		; <i32> [#uses=1]
+	ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/uint64tof64.ll b/test/CodeGen/ARM/uint64tof64.ll
new file mode 100644
index 0000000000000..055c3c370ee69
--- /dev/null
+++ b/test/CodeGen/ARM/uint64tof64.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+vfp2
+
+	%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+	%struct.__sFILEX = type opaque
+	%struct.__sbuf = type { i8*, i32 }
+@"\01LC10" = external constant [54 x i8]		; <[54 x i8]*> [#uses=1]
+
+define fastcc void @t() {
+entry:
+	%0 = load i64* null, align 4		; <i64> [#uses=1]
+	%1 = uitofp i64 %0 to double		; <double> [#uses=1]
+	%2 = fdiv double 0.000000e+00, %1		; <double> [#uses=1]
+	%3 = call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([54 x i8]* @"\01LC10", i32 0, i32 0), i64 0, double %2)		; <i32> [#uses=0]
+	ret void
+}
+
+declare i32 @fprintf(%struct.FILE*, i8*, ...)
diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll
new file mode 100644
index 0000000000000..dad1897463a68
--- /dev/null
+++ b/test/CodeGen/ARM/unaligned_load_store.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | \
+; RUN:   llc -march=arm -o %t -f
+; RUN: grep ldrb %t | count 4
+; RUN: grep strb %t | count 4
+
+
+	%struct.p = type <{ i8, i32 }>
+@t = global %struct.p <{ i8 1, i32 10 }>		; <%struct.p*> [#uses=1]
+@u = weak global %struct.p zeroinitializer		; <%struct.p*> [#uses=1]
+
+define i32 @main() {
+entry:
+	%tmp3 = load i32* getelementptr (%struct.p* @t, i32 0, i32 1), align 1		; <i32> [#uses=2]
+	store i32 %tmp3, i32* getelementptr (%struct.p* @u, i32 0, i32 1), align 1
+	ret i32 %tmp3
+}
diff --git a/test/CodeGen/ARM/unord.ll b/test/CodeGen/ARM/unord.ll
new file mode 100644
index 0000000000000..e1774232d1599
--- /dev/null
+++ b/test/CodeGen/ARM/unord.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm | grep movne | count 1
+; RUN: llvm-as < %s | llc -march=arm | grep moveq | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1
+; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1
+
+define i32 @f1(float %X, float %Y) {
+	%tmp = fcmp uno float %X, %Y
+	%retval = select i1 %tmp, i32 1, i32 -1
+	ret i32 %retval
+}
+
+define i32 @f2(float %X, float %Y) {
+	%tmp = fcmp ord float %X, %Y
+	%retval = select i1 %tmp, i32 1, i32 -1
+	ret i32 %retval
+}
diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll
new file mode 100644
index 0000000000000..09c74ebbb7765
--- /dev/null
+++ b/test/CodeGen/ARM/uxt_rot.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtb | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | count 1
+
+define i8 @test1(i32 %A.u) zeroext {
+    %B.u = trunc i32 %A.u to i8
+    ret i8 %B.u
+}
+
+define i32 @test2(i32 %A.u, i32 %B.u) zeroext {
+    %C.u = trunc i32 %B.u to i8
+    %D.u = zext i8 %C.u to i32
+    %E.u = add i32 %A.u, %D.u
+    ret i32 %E.u
+}
+
+define i32 @test3(i32 %A.u) zeroext {
+    %B.u = lshr i32 %A.u, 8
+    %C.u = shl i32 %A.u, 24
+    %D.u = or i32 %B.u, %C.u
+    %E.u = trunc i32 %D.u to i16
+    %F.u = zext i16 %E.u to i32
+    ret i32 %F.u
+}
diff --git a/test/CodeGen/ARM/uxtb.ll b/test/CodeGen/ARM/uxtb.ll
new file mode 100644
index 0000000000000..73e918b7a5d3b
--- /dev/null
+++ b/test/CodeGen/ARM/uxtb.ll
@@ -0,0 +1,74 @@
+; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin | \
+; RUN:   grep uxt | count 10
+
+define i32 @test1(i32 %x) {
+	%tmp1 = and i32 %x, 16711935		; <i32> [#uses=1]
+	ret i32 %tmp1
+}
+
+define i32 @test2(i32 %x) {
+	%tmp1 = lshr i32 %x, 8		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 16711935		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @test3(i32 %x) {
+	%tmp1 = lshr i32 %x, 8		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 16711935		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @test4(i32 %x) {
+	%tmp1 = lshr i32 %x, 8		; <i32> [#uses=1]
+	%tmp6 = and i32 %tmp1, 16711935		; <i32> [#uses=1]
+	ret i32 %tmp6
+}
+
+define i32 @test5(i32 %x) {
+	%tmp1 = lshr i32 %x, 8		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 16711935		; <i32> [#uses=1]
+	ret i32 %tmp2
+}
+
+define i32 @test6(i32 %x) {
+	%tmp1 = lshr i32 %x, 16		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 255		; <i32> [#uses=1]
+	%tmp4 = shl i32 %x, 16		; <i32> [#uses=1]
+	%tmp5 = and i32 %tmp4, 16711680		; <i32> [#uses=1]
+	%tmp6 = or i32 %tmp2, %tmp5		; <i32> [#uses=1]
+	ret i32 %tmp6
+}
+
+define i32 @test7(i32 %x) {
+	%tmp1 = lshr i32 %x, 16		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 255		; <i32> [#uses=1]
+	%tmp4 = shl i32 %x, 16		; <i32> [#uses=1]
+	%tmp5 = and i32 %tmp4, 16711680		; <i32> [#uses=1]
+	%tmp6 = or i32 %tmp2, %tmp5		; <i32> [#uses=1]
+	ret i32 %tmp6
+}
+
+define i32 @test8(i32 %x) {
+	%tmp1 = shl i32 %x, 8		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 16711680		; <i32> [#uses=1]
+	%tmp5 = lshr i32 %x, 24		; <i32> [#uses=1]
+	%tmp6 = or i32 %tmp2, %tmp5		; <i32> [#uses=1]
+	ret i32 %tmp6
+}
+
+define i32 @test9(i32 %x) {
+	%tmp1 = lshr i32 %x, 24		; <i32> [#uses=1]
+	%tmp4 = shl i32 %x, 8		; <i32> [#uses=1]
+	%tmp5 = and i32 %tmp4, 16711680		; <i32> [#uses=1]
+	%tmp6 = or i32 %tmp5, %tmp1		; <i32> [#uses=1]
+	ret i32 %tmp6
+}
+
+define i32 @test10(i32 %p0) {
+	%tmp1 = lshr i32 %p0, 7		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 16253176		; <i32> [#uses=2]
+	%tmp4 = lshr i32 %tmp2, 5		; <i32> [#uses=1]
+	%tmp5 = and i32 %tmp4, 458759		; <i32> [#uses=1]
+	%tmp7 = or i32 %tmp5, %tmp2		; <i32> [#uses=1]
+	ret i32 %tmp7
+}
diff --git a/test/CodeGen/ARM/vargs.ll b/test/CodeGen/ARM/vargs.ll
new file mode 100644
index 0000000000000..4bf79c0419225
--- /dev/null
+++ b/test/CodeGen/ARM/vargs.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=arm
+@str = internal constant [43 x i8] c"Hello World %d %d %d %d %d %d %d %d %d %d\0A\00"           ; <[43 x i8]*> [#uses=1]
+
+define i32 @main() {
+entry:
+        %tmp = call i32 (i8*, ...)* @printf( i8* getelementptr ([43 x i8]* @str, i32 0, i64 0), i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 )         ; <i32> [#uses=0]
+        %tmp2 = call i32 (i8*, ...)* @printf( i8* getelementptr ([43 x i8]* @str, i32 0, i64 0), i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1 )                ; <i32> [#uses=0]
+        ret i32 11
+}
+
+declare i32 @printf(i8*, ...)
+
diff --git a/test/CodeGen/ARM/vargs2.ll b/test/CodeGen/ARM/vargs2.ll
new file mode 100644
index 0000000000000..fb0b8d8ef7cb4
--- /dev/null
+++ b/test/CodeGen/ARM/vargs2.ll
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s | llc -march=thumb
+; RUN: llvm-as < %s | llc -march=thumb | \
+; RUN:   grep pop | count 2
+
+@str = internal constant [4 x i8] c"%d\0A\00"           ; <[4 x i8]*> [#uses=1]
+
+define void @f(i32 %a, ...) {
+entry:
+        %va = alloca i8*, align 4               ; <i8**> [#uses=4]
+        %va.upgrd.1 = bitcast i8** %va to i8*           ; <i8*> [#uses=1]
+        call void @llvm.va_start( i8* %va.upgrd.1 )
+        br label %bb
+
+bb:             ; preds = %bb, %entry
+        %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ]              ; <i32> [#uses=2]
+        %tmp = volatile load i8** %va           ; <i8*> [#uses=2]
+        %tmp2 = getelementptr i8* %tmp, i32 4           ; <i8*> [#uses=1]
+        volatile store i8* %tmp2, i8** %va
+        %tmp5 = add i32 %a_addr.0, -1           ; <i32> [#uses=1]
+        %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1         ; <i1> [#uses=1]
+        br i1 %tmp.upgrd.2, label %bb7, label %bb
+
+bb7:            ; preds = %bb
+        %tmp3 = bitcast i8* %tmp to i32*                ; <i32*> [#uses=1]
+        %tmp.upgrd.3 = load i32* %tmp3          ; <i32> [#uses=1]
+        %tmp10 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 )                ; <i32> [#uses=0]
+        %va.upgrd.4 = bitcast i8** %va to i8*           ; <i8*> [#uses=1]
+        call void @llvm.va_end( i8* %va.upgrd.4 )
+        ret void
+}
+
+declare void @llvm.va_start(i8*)
+
+declare i32 @printf(i8*, ...)
+
+declare void @llvm.va_end(i8*)
diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
new file mode 100644
index 0000000000000..1f2f05bd6086f
--- /dev/null
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi | \
+; RUN:   grep {add sp, sp, #16} | count 1
+; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
+; RUN:   grep {add sp, sp, #12} | count 2
+
+define i32 @f(i32 %a, ...) {
+entry:
+	%a_addr = alloca i32		; <i32*> [#uses=1]
+	%retval = alloca i32, align 4		; <i32*> [#uses=2]
+	%tmp = alloca i32, align 4		; <i32*> [#uses=2]
+	"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	store i32 %a, i32* %a_addr
+	store i32 0, i32* %tmp
+	%tmp1 = load i32* %tmp		; <i32> [#uses=1]
+	store i32 %tmp1, i32* %retval
+	br label %return
+
+return:		; preds = %entry
+	%retval2 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval2
+}
diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll
new file mode 100644
index 0000000000000..2acb33f9aebf4
--- /dev/null
+++ b/test/CodeGen/ARM/vfp.ll
@@ -0,0 +1,144 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fabs | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fmscs | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fcvt | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fuito | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fto.i | count 4
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep bmi | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep bgt | count 1
+; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | \
+; RUN:   grep fcmpezs | count 1
+
+define void @test(float* %P, double* %D) {
+	%A = load float* %P		; <float> [#uses=1]
+	%B = load double* %D		; <double> [#uses=1]
+	store float %A, float* %P
+	store double %B, double* %D
+	ret void
+}
+
+declare float @fabsf(float)
+
+declare double @fabs(double)
+
+define void @test_abs(float* %P, double* %D) {
+	%a = load float* %P		; <float> [#uses=1]
+	%b = call float @fabsf( float %a )		; <float> [#uses=1]
+	store float %b, float* %P
+	%A = load double* %D		; <double> [#uses=1]
+	%B = call double @fabs( double %A )		; <double> [#uses=1]
+	store double %B, double* %D
+	ret void
+}
+
+define void @test_add(float* %P, double* %D) {
+	%a = load float* %P		; <float> [#uses=2]
+	%b = add float %a, %a		; <float> [#uses=1]
+	store float %b, float* %P
+	%A = load double* %D		; <double> [#uses=2]
+	%B = add double %A, %A		; <double> [#uses=1]
+	store double %B, double* %D
+	ret void
+}
+
+define void @test_ext_round(float* %P, double* %D) {
+	%a = load float* %P		; <float> [#uses=1]
+	%b = fpext float %a to double		; <double> [#uses=1]
+	%A = load double* %D		; <double> [#uses=1]
+	%B = fptrunc double %A to float		; <float> [#uses=1]
+	store double %b, double* %D
+	store float %B, float* %P
+	ret void
+}
+
+define void @test_fma(float* %P1, float* %P2, float* %P3) {
+	%a1 = load float* %P1		; <float> [#uses=1]
+	%a2 = load float* %P2		; <float> [#uses=1]
+	%a3 = load float* %P3		; <float> [#uses=1]
+	%X = mul float %a1, %a2		; <float> [#uses=1]
+	%Y = sub float %X, %a3		; <float> [#uses=1]
+	store float %Y, float* %P1
+	ret void
+}
+
+define i32 @test_ftoi(float* %P1) {
+	%a1 = load float* %P1		; <float> [#uses=1]
+	%b1 = fptosi float %a1 to i32		; <i32> [#uses=1]
+	ret i32 %b1
+}
+
+define i32 @test_ftou(float* %P1) {
+	%a1 = load float* %P1		; <float> [#uses=1]
+	%b1 = fptoui float %a1 to i32		; <i32> [#uses=1]
+	ret i32 %b1
+}
+
+define i32 @test_dtoi(double* %P1) {
+	%a1 = load double* %P1		; <double> [#uses=1]
+	%b1 = fptosi double %a1 to i32		; <i32> [#uses=1]
+	ret i32 %b1
+}
+
+define i32 @test_dtou(double* %P1) {
+	%a1 = load double* %P1		; <double> [#uses=1]
+	%b1 = fptoui double %a1 to i32		; <i32> [#uses=1]
+	ret i32 %b1
+}
+
+define void @test_utod(double* %P1, i32 %X) {
+	%b1 = uitofp i32 %X to double		; <double> [#uses=1]
+	store double %b1, double* %P1
+	ret void
+}
+
+define void @test_utod2(double* %P1, i8 %X) {
+	%b1 = uitofp i8 %X to double		; <double> [#uses=1]
+	store double %b1, double* %P1
+	ret void
+}
+
+define void @test_cmp(float* %glob, i32 %X) {
+entry:
+	%tmp = load float* %glob		; <float> [#uses=2]
+	%tmp3 = getelementptr float* %glob, i32 2		; <float*> [#uses=1]
+	%tmp4 = load float* %tmp3		; <float> [#uses=2]
+	%tmp.upgrd.1 = fcmp oeq float %tmp, %tmp4		; <i1> [#uses=1]
+	%tmp5 = fcmp uno float %tmp, %tmp4		; <i1> [#uses=1]
+	%tmp6 = or i1 %tmp.upgrd.1, %tmp5		; <i1> [#uses=1]
+	br i1 %tmp6, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	%tmp.upgrd.2 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	ret void
+
+cond_false:		; preds = %entry
+	%tmp7 = tail call i32 (...)* @baz( )		; <i32> [#uses=0]
+	ret void
+}
+
+declare i1 @llvm.isunordered.f32(float, float)
+
+declare i32 @bar(...)
+
+declare i32 @baz(...)
+
+define void @test_cmpfp0(float* %glob, i32 %X) {
+entry:
+	%tmp = load float* %glob		; <float> [#uses=1]
+	%tmp.upgrd.3 = fcmp ogt float %tmp, 0.000000e+00		; <i1> [#uses=1]
+	br i1 %tmp.upgrd.3, label %cond_true, label %cond_false
+
+cond_true:		; preds = %entry
+	%tmp.upgrd.4 = tail call i32 (...)* @bar( )		; <i32> [#uses=0]
+	ret void
+
+cond_false:		; preds = %entry
+	%tmp1 = tail call i32 (...)* @baz( )		; <i32> [#uses=0]
+	ret void
+}
diff --git a/test/CodeGen/ARM/weak.ll b/test/CodeGen/ARM/weak.ll
new file mode 100644
index 0000000000000..dadd1b9767985
--- /dev/null
+++ b/test/CodeGen/ARM/weak.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=arm | grep .weak.*f
+; RUN: llvm-as < %s | llc -march=arm | grep .weak.*h
+
+define weak i32 @f() {
+entry:
+        unreachable
+}
+
+define void @g() {
+entry:
+        tail call void @h( )
+        ret void
+}
+
+declare extern_weak void @h()
+
diff --git a/test/CodeGen/ARM/weak2.ll b/test/CodeGen/ARM/weak2.ll
new file mode 100644
index 0000000000000..a57a76707ce69
--- /dev/null
+++ b/test/CodeGen/ARM/weak2.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=arm | grep .weak
+
+define i32 @f(i32 %a) {
+entry:
+	%tmp2 = icmp eq i32 %a, 0		; <i1> [#uses=1]
+	%t.0 = select i1 %tmp2, i32 (...)* null, i32 (...)* @test_weak		; <i32 (...)*> [#uses=2]
+	%tmp5 = icmp eq i32 (...)* %t.0, null		; <i1> [#uses=1]
+	br i1 %tmp5, label %UnifiedReturnBlock, label %cond_true8
+
+cond_true8:		; preds = %entry
+	%tmp10 = tail call i32 (...)* %t.0( )		; <i32> [#uses=1]
+	ret i32 %tmp10
+
+UnifiedReturnBlock:		; preds = %entry
+	ret i32 250
+}
+
+declare extern_weak i32 @test_weak(...)