diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
commit | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch) | |
tree | 5343938942df402b49ec7300a1c25a2d4ccd5821 /test/CodeGen/MSP430/cc_args.ll | |
parent | 31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff) |
Notes
Diffstat (limited to 'test/CodeGen/MSP430/cc_args.ll')
-rw-r--r-- | test/CodeGen/MSP430/cc_args.ll | 63 |
1 files changed, 42 insertions, 21 deletions
diff --git a/test/CodeGen/MSP430/cc_args.ll b/test/CodeGen/MSP430/cc_args.ll index 39e99e2637449..70ac901f7e4e2 100644 --- a/test/CodeGen/MSP430/cc_args.ll +++ b/test/CodeGen/MSP430/cc_args.ll @@ -7,12 +7,12 @@ define void @test() #0 { entry: ; CHECK: test: -; CHECK: mov.w #1, r15 +; CHECK: mov.w #1, r12 ; CHECK: call #f_i16 call void @f_i16(i16 1) -; CHECK: mov.w #772, r14 -; CHECK: mov.w #258, r15 +; CHECK: mov.w #772, r12 +; CHECK: mov.w #258, r13 ; CHECK: call #f_i32 call void @f_i32(i32 16909060) @@ -23,26 +23,34 @@ entry: ; CHECK: call #f_i64 call void @f_i64(i64 72623859790382856) -; CHECK: mov.w #772, r14 -; CHECK: mov.w #258, r15 -; CHECK: mov.w #1800, r12 -; CHECK: mov.w #1286, r13 +; CHECK: mov.w #772, r12 +; CHECK: mov.w #258, r13 +; CHECK: mov.w #1800, r14 +; CHECK: mov.w #1286, r15 ; CHECK: call #f_i32_i32 call void @f_i32_i32(i32 16909060, i32 84281096) -; CHECK: mov.w #1, r15 +; CHECK: mov.w #1, r12 ; CHECK: mov.w #772, r13 ; CHECK: mov.w #258, r14 -; CHECK: mov.w #2, r12 +; CHECK: mov.w #2, r15 ; CHECK: call #f_i16_i32_i16 call void @f_i16_i32_i16(i16 1, i32 16909060, i16 2) -; CHECK: mov.w #2, 8(r1) +; CHECK: mov.w #1286, 0(r1) +; CHECK: mov.w #1, r12 +; CHECK: mov.w #772, r13 +; CHECK: mov.w #258, r14 +; CHECK: mov.w #1800, r15 +; CHECK: call #f_i16_i32_i32 + call void @f_i16_i32_i32(i16 1, i32 16909060, i32 84281096) + ; CHECK: mov.w #258, 6(r1) ; CHECK: mov.w #772, 4(r1) ; CHECK: mov.w #1286, 2(r1) ; CHECK: mov.w #1800, 0(r1) -; CHECK: mov.w #1, r15 +; CHECK: mov.w #1, r12 +; CHECK: mov.w #2, r13 ; CHECK: call #f_i16_i64_i16 call void @f_i16_i64_i16(i16 1, i64 72623859790382856, i16 2) @@ -55,15 +63,15 @@ entry: define void @f_i16(i16 %a) #0 { ; CHECK: f_i16: -; CHECK: mov.w r15, &g_i16 +; CHECK: mov.w r12, &g_i16 store volatile i16 %a, i16* @g_i16, align 2 ret void } define void @f_i32(i32 %a) #0 { ; CHECK: f_i32: -; CHECK: mov.w r15, &g_i32+2 -; CHECK: mov.w r14, &g_i32 +; CHECK: mov.w r13, &g_i32+2 +; CHECK: mov.w r12, &g_i32 store volatile i32 %a, i32* @g_i32, align 2 ret void } @@ -80,37 +88,50 @@ define void @f_i64(i64 %a) #0 { define void @f_i32_i32(i32 %a, i32 %b) #0 { ; CHECK: f_i32_i32: -; CHECK: mov.w r15, &g_i32+2 -; CHECK: mov.w r14, &g_i32 - store volatile i32 %a, i32* @g_i32, align 2 ; CHECK: mov.w r13, &g_i32+2 ; CHECK: mov.w r12, &g_i32 + store volatile i32 %a, i32* @g_i32, align 2 +; CHECK: mov.w r15, &g_i32+2 +; CHECK: mov.w r14, &g_i32 store volatile i32 %b, i32* @g_i32, align 2 ret void } +define void @f_i16_i32_i32(i16 %a, i32 %b, i32 %c) #0 { +; CHECK: f_i16_i32_i32: +; CHECK: mov.w r12, &g_i16 + store volatile i16 %a, i16* @g_i16, align 2 +; CHECK: mov.w r14, &g_i32+2 +; CHECK: mov.w r13, &g_i32 + store volatile i32 %b, i32* @g_i32, align 2 +; CHECK: mov.w r15, &g_i32 +; CHECK: mov.w 4(r4), &g_i32+2 + store volatile i32 %c, i32* @g_i32, align 2 + ret void +} + define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 { ; CHECK: f_i16_i32_i16: -; CHECK: mov.w r15, &g_i16 +; CHECK: mov.w r12, &g_i16 store volatile i16 %a, i16* @g_i16, align 2 ; CHECK: mov.w r14, &g_i32+2 ; CHECK: mov.w r13, &g_i32 store volatile i32 %b, i32* @g_i32, align 2 -; CHECK: mov.w r12, &g_i16 +; CHECK: mov.w r15, &g_i16 store volatile i16 %c, i16* @g_i16, align 2 ret void } define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 { ; CHECK: f_i16_i64_i16: -; CHECK: mov.w r15, &g_i16 +; CHECK: mov.w r12, &g_i16 store volatile i16 %a, i16* @g_i16, align 2 ;CHECK: mov.w 10(r4), &g_i64+6 ;CHECK: mov.w 8(r4), &g_i64+4 ;CHECK: mov.w 6(r4), &g_i64+2 ;CHECK: mov.w 4(r4), &g_i64 store volatile i64 %b, i64* @g_i64, align 2 -;CHECK: mov.w 12(r4), &g_i16 +;CHECK: mov.w r13, &g_i16 store volatile i16 %c, i16* @g_i16, align 2 ret void } |