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| author | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
| commit | 044eb2f6afba375a914ac9d8024f8f5142bb912e (patch) | |
| tree | 1475247dc9f9fe5be155ebd4c9069c75aadf8c20 /test/CodeGen/X86/add-ext.ll | |
| parent | eb70dddbd77e120e5d490bd8fbe7ff3f8fa81c6b (diff) | |
| download | src-test-044eb2f6afba375a914ac9d8024f8f5142bb912e.tar.gz src-test-044eb2f6afba375a914ac9d8024f8f5142bb912e.zip | |
Notes
Diffstat (limited to 'test/CodeGen/X86/add-ext.ll')
| -rw-r--r-- | test/CodeGen/X86/add-ext.ll | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/test/CodeGen/X86/add-ext.ll b/test/CodeGen/X86/add-ext.ll index 7a157ecd3fe64..16646fa71ca23 100644 --- a/test/CodeGen/X86/add-ext.ll +++ b/test/CodeGen/X86/add-ext.ll @@ -8,7 +8,7 @@ define i64 @add_nsw_consts(i32 %i) { ; CHECK-LABEL: add_nsw_consts: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: addq $12, %rax ; CHECK-NEXT: retq @@ -24,7 +24,7 @@ define i64 @add_nsw_consts(i32 %i) { define i64 @add_nsw_sext_add(i32 %i, i64 %x) { ; CHECK-LABEL: add_nsw_sext_add: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq 5(%rsi,%rax), %rax ; CHECK-NEXT: retq @@ -40,7 +40,7 @@ define i64 @add_nsw_sext_add(i32 %i, i64 %x) { define i64 @add_nsw_sext_lsh_add(i32 %i, i64 %x) { ; CHECK-LABEL: add_nsw_sext_lsh_add: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq -40(%rsi,%rax,8), %rax ; CHECK-NEXT: retq @@ -57,7 +57,7 @@ define i64 @add_nsw_sext_lsh_add(i32 %i, i64 %x) { define i64 @add_nsw_sext(i32 %i, i64 %x) { ; CHECK-LABEL: add_nsw_sext: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: addl $5, %edi ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: retq @@ -71,7 +71,7 @@ define i64 @add_nsw_sext(i32 %i, i64 %x) { define i8* @gep8(i32 %i, i8* %x) { ; CHECK-LABEL: gep8: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq 5(%rsi,%rax), %rax ; CHECK-NEXT: retq @@ -84,7 +84,7 @@ define i8* @gep8(i32 %i, i8* %x) { define i16* @gep16(i32 %i, i16* %x) { ; CHECK-LABEL: gep16: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq -10(%rsi,%rax,2), %rax ; CHECK-NEXT: retq @@ -97,7 +97,7 @@ define i16* @gep16(i32 %i, i16* %x) { define i32* @gep32(i32 %i, i32* %x) { ; CHECK-LABEL: gep32: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq 20(%rsi,%rax,4), %rax ; CHECK-NEXT: retq @@ -110,7 +110,7 @@ define i32* @gep32(i32 %i, i32* %x) { define i64* @gep64(i32 %i, i64* %x) { ; CHECK-LABEL: gep64: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: leaq -40(%rsi,%rax,8), %rax ; CHECK-NEXT: retq @@ -125,7 +125,7 @@ define i64* @gep64(i32 %i, i64* %x) { define i128* @gep128(i32 %i, i128* %x) { ; CHECK-LABEL: gep128: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %edi, %rax ; CHECK-NEXT: shlq $4, %rax ; CHECK-NEXT: leaq 80(%rsi,%rax), %rax @@ -143,7 +143,7 @@ define i128* @gep128(i32 %i, i128* %x) { define void @PR20134(i32* %a, i32 %i) { ; CHECK-LABEL: PR20134: -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movslq %esi, %rax ; CHECK-NEXT: movl 4(%rdi,%rax,4), %ecx ; CHECK-NEXT: addl 8(%rdi,%rax,4), %ecx @@ -169,7 +169,7 @@ define void @PR20134(i32* %a, i32 %i) { ; The same as @PR20134 but sign extension is replaced with zero extension define void @PR20134_zext(i32* %a, i32 %i) { -; CHECK: # BB#0: +; CHECK: # %bb.0: ; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl 4(%rdi,%rax,4), %ecx ; CHECK-NEXT: addl 8(%rdi,%rax,4), %ecx |