diff options
| author | Roman Divacky <rdivacky@FreeBSD.org> | 2009-10-14 17:57:32 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@FreeBSD.org> | 2009-10-14 17:57:32 +0000 |
| commit | 59850d0874429601812bc13408cb1f776649027c (patch) | |
| tree | b21f6de4e08b89bb7931806bab798fc2a5e3a686 /test/CodeGen/X86 | |
| parent | 18f153bdb9db52e7089a2d5293b96c45a3124a26 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/X86')
1016 files changed, 16295 insertions, 1626 deletions
diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll index 2b4242aaa15e5..24848602baf84 100644 --- a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll +++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll @@ -3,7 +3,7 @@ ; it makes a ton of annoying overlapping live ranges. This code should not ; cause spills! ; -; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep spilled +; RUN: llc < %s -march=x86 -stats |& not grep spilled target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll b/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll index a4d558949e307..5c40eeaa1eade 100644 --- a/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll +++ b/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @test() { entry: diff --git a/test/CodeGen/X86/2003-11-03-GlobalBool.ll b/test/CodeGen/X86/2003-11-03-GlobalBool.ll index 4de3c79fdcbb6..8b0a18550da15 100644 --- a/test/CodeGen/X86/2003-11-03-GlobalBool.ll +++ b/test/CodeGen/X86/2003-11-03-GlobalBool.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | \ +; RUN: llc < %s -march=x86 | \ ; RUN: not grep {.byte\[\[:space:\]\]*true} @X = global i1 true ; <i1*> [#uses=0] diff --git a/test/CodeGen/X86/2004-02-12-Memcpy.ll b/test/CodeGen/X86/2004-02-12-Memcpy.ll index 56bb21caf3ca9..f15a1b441816c 100644 --- a/test/CodeGen/X86/2004-02-12-Memcpy.ll +++ b/test/CodeGen/X86/2004-02-12-Memcpy.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1 +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1 @A = global [32 x i32] zeroinitializer @B = global [32 x i32] zeroinitializer diff --git a/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll index f48b1d3adf015..fea2b54d76305 100644 --- a/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll +++ b/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll @@ -1,4 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp} +; RUN: llc < %s -march=x86 | grep {(%esp} +; RUN: llc < %s -march=x86 | grep {pushl %ebp} | count 1 +; RUN: llc < %s -march=x86 | grep {popl %ebp} | count 1 declare i8* @llvm.returnaddress(i32) diff --git a/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll index b25dfaf5d90e8..f986ebd35f85e 100644 --- a/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll +++ b/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep -i ESP | not grep sub +; RUN: llc < %s -march=x86 | grep -i ESP | not grep sub define i32 @test(i32 %X) { ret i32 %X diff --git a/test/CodeGen/X86/2004-02-22-Casts.ll b/test/CodeGen/X86/2004-02-22-Casts.ll index 40d5f39df642f..dabf7d3c15b6c 100644 --- a/test/CodeGen/X86/2004-02-22-Casts.ll +++ b/test/CodeGen/X86/2004-02-22-Casts.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i1 @test1(double %X) { %V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1] ret i1 %V diff --git a/test/CodeGen/X86/2004-03-30-Select-Max.ll b/test/CodeGen/X86/2004-03-30-Select-Max.ll index 5021fd89dfe4c..b6631b62118ab 100644 --- a/test/CodeGen/X86/2004-03-30-Select-Max.ll +++ b/test/CodeGen/X86/2004-03-30-Select-Max.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep {j\[lgbe\]} +; RUN: llc < %s -march=x86 | not grep {j\[lgbe\]} define i32 @max(i32 %A, i32 %B) { %gt = icmp sgt i32 %A, %B ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll index 633a61564558c..c62fee1bd263e 100644 --- a/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll +++ b/test/CodeGen/X86/2004-04-09-SameValueCoalescing.ll @@ -2,7 +2,7 @@ ; overlapping live intervals. When two overlapping intervals have the same ; value, they can be joined though. ; -; RUN: llvm-as < %s | llc -march=x86 -regalloc=linearscan | \ +; RUN: llc < %s -march=x86 -regalloc=linearscan | \ ; RUN: not grep {mov %\[A-Z\]\\\{2,3\\\}, %\[A-Z\]\\\{2,3\\\}} define i64 @test(i64 %x) { diff --git a/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll index 858605c231bc4..f8ed016f99b69 100644 --- a/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll +++ b/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define double @test(double %d) { %X = select i1 false, double %d, double %d ; <double> [#uses=1] diff --git a/test/CodeGen/X86/2004-06-10-StackifierCrash.ll b/test/CodeGen/X86/2004-06-10-StackifierCrash.ll index 1a51bee404d06..036aa6a77f407 100644 --- a/test/CodeGen/X86/2004-06-10-StackifierCrash.ll +++ b/test/CodeGen/X86/2004-06-10-StackifierCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i1 @T(double %X) { %V = fcmp oeq double %X, %X ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll index 9ee773c91a24f..db3af0139cee2 100644 --- a/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll +++ b/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) { %E = icmp slt i32 %X, %Y ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll index 37cff57f30e23..32fafc61e8de3 100644 --- a/test/CodeGen/X86/2005-01-17-CycleInDAG.ll +++ b/test/CodeGen/X86/2005-01-17-CycleInDAG.ll @@ -3,7 +3,7 @@ ; is invalid code (there is no correct way to order the instruction). Check ; that we do not fold the load into the sub. -; RUN: llvm-as < %s | llc -march=x86 | not grep sub.*GLOBAL +; RUN: llc < %s -march=x86 | not grep sub.*GLOBAL @GLOBAL = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll index 762047b7d8c43..30a6ac6fbdf1d 100644 --- a/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll +++ b/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep 18446744073709551612 +; RUN: llc < %s -march=x86 | not grep 18446744073709551612 @A = external global i32 ; <i32*> [#uses=1] @Y = global i32* getelementptr (i32* @A, i32 -1) ; <i32**> [#uses=0] diff --git a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll index 04035aca998fa..5266009c55a5d 100644 --- a/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll +++ b/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=generic +; RUN: llc < %s -march=x86 -mcpu=generic ; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes. define void @radfg_() { diff --git a/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll index 817b281243e76..d906da43fe11c 100644 --- a/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll +++ b/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | \ +; RUN: llc < %s -march=x86 | \ ; RUN: grep shld | count 1 ; ; Check that the isel does not fold the shld, which already folds a load diff --git a/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll index 51d2fb2fe27bc..dc69ef83103f7 100644 --- a/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll +++ b/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep {subl.*%esp} +; RUN: llc < %s -march=x86 | not grep {subl.*%esp} define i32 @f(i32 %a, i32 %b) { %tmp.2 = mul i32 %a, %a ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll index c410c4668a9be..0421896922b9e 100644 --- a/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll +++ b/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& \ +; RUN: llc < %s -march=x86 -stats |& \ ; RUN: grep asm-printer | grep 7 define i32 @g(i32 %a, i32 %b) nounwind { diff --git a/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll index 743790cad0339..c106f57e93843 100644 --- a/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll +++ b/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah ; END. target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll index 4a0b5c37e2617..8783a11c060b1 100644 --- a/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll +++ b/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t ; RUN: grep {movl _last} %t | count 1 ; RUN: grep {cmpl.*_last} %t | count 1 diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll index f28366699c3d4..49f3a95705ad0 100644 --- a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll +++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stats |& \ +; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \ ; RUN: not grep {Number of register spills} ; END. diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll index 72dab39888f18..7d0a6ab0a04c2 100644 --- a/test/CodeGen/X86/2006-05-02-InstrSched1.ll +++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -relocation-model=static -stats |& \ +; RUN: llc < %s -march=x86 -relocation-model=static -stats |& \ ; RUN: grep asm-printer | grep 14 ; @size20 = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/test/CodeGen/X86/2006-05-02-InstrSched2.ll index 48ed2b9cb498d..23954d76a5d6a 100644 --- a/test/CodeGen/X86/2006-05-02-InstrSched2.ll +++ b/test/CodeGen/X86/2006-05-02-InstrSched2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& \ +; RUN: llc < %s -march=x86 -stats |& \ ; RUN: grep asm-printer | grep 13 define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind { diff --git a/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll index 900abe55cd213..8421483ecb556 100644 --- a/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll +++ b/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll @@ -1,7 +1,7 @@ ; Coalescing from R32 to a subset R32_. Once another register coalescer bug is ; fixed, the movb should go away as well. -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \ +; RUN: llc < %s -march=x86 -relocation-model=static | \ ; RUN: grep movl @B = external global i32 ; <i32*> [#uses=2] diff --git a/test/CodeGen/X86/2006-05-08-InstrSched.ll b/test/CodeGen/X86/2006-05-08-InstrSched.ll index c39b377cc733e..d58d638562c9a 100644 --- a/test/CodeGen/X86/2006-05-08-InstrSched.ll +++ b/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -relocation-model=static | not grep {subl.*%esp} +; RUN: llc < %s -march=x86 -relocation-model=static | not grep {subl.*%esp} @A = external global i16* ; <i16**> [#uses=1] @B = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll index 6c0e76b34ade2..89b127cccf82a 100644 --- a/test/CodeGen/X86/2006-05-11-InstrSched.ll +++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\ +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\ ; RUN: grep {asm-printer} | grep 31 target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2006-05-17-VectorArg.ll b/test/CodeGen/X86/2006-05-17-VectorArg.ll index 217cbe1059f28..b36d61e0f31b1 100644 --- a/test/CodeGen/X86/2006-05-17-VectorArg.ll +++ b/test/CodeGen/X86/2006-05-17-VectorArg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define <4 x float> @opRSQ(<4 x float> %a) nounwind { entry: diff --git a/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll index ae18c90d8c17c..083d06805f2f6 100644 --- a/test/CodeGen/X86/2006-05-22-FPSetEQ.ll +++ b/test/CodeGen/X86/2006-05-22-FPSetEQ.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep setnp -; RUN: llvm-as < %s | llc -march=x86 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 | grep setnp +; RUN: llc < %s -march=x86 -enable-unsafe-fp-math | \ ; RUN: not grep setnp define i32 @test(float %f) { diff --git a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll index 78838d1141a4d..0288278d626eb 100644 --- a/test/CodeGen/X86/2006-05-25-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-05-25-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @test() { br i1 false, label %cond_next33, label %cond_true12 diff --git a/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll index 760fe3650e902..4ea364d57e515 100644 --- a/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll +++ b/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR825 define i64 @test() { diff --git a/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll index 1db3921ecdb10..568fbbcc4f4ff 100644 --- a/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll +++ b/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR828 target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2006-07-19-ATTAsm.ll b/test/CodeGen/X86/2006-07-19-ATTAsm.ll index 78167f631e1bd..c8fd10f7009c0 100644 --- a/test/CodeGen/X86/2006-07-19-ATTAsm.ll +++ b/test/CodeGen/X86/2006-07-19-ATTAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att +; RUN: llc < %s -march=x86 -x86-asm-syntax=att ; PR834 ; END. diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll index 08510a8a65283..cac47cdab6dee 100644 --- a/test/CodeGen/X86/2006-07-20-InlineAsm.ll +++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR833 @G = weak global i32 0 ; <i32*> [#uses=3] diff --git a/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll index a82612b5a62a0..deae086cf76c7 100644 --- a/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll +++ b/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep -- 4294967240 +; RUN: llc < %s -march=x86 | grep -- 4294967240 ; PR853 @X = global i32* inttoptr (i64 -56 to i32*) ; <i32**> [#uses=0] diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll index 2a521ad73885b..3159cec8553e4 100644 --- a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll +++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -1,5 +1,5 @@ ; PR850 -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att > %t +; RUN: llc < %s -march=x86 -x86-asm-syntax=att > %t ; RUN: grep {movl 4(%eax),%ebp} %t ; RUN: grep {movl 0(%eax), %ebx} %t diff --git a/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll index 194cd6681bfaa..aea707ee8fe49 100644 --- a/test/CodeGen/X86/2006-08-07-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-08-07-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 %struct.foo = type opaque define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) { diff --git a/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll index f2a8855245cc3..5fee326d530d9 100644 --- a/test/CodeGen/X86/2006-08-16-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-08-16-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* } %struct.hash_table = type { %struct.expr**, i32, i32, i32 } %struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 } diff --git a/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll index c1d81d52b932b..a19d8f7092c34 100644 --- a/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll +++ b/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | \ +; RUN: llc < %s -march=x86 -mcpu=i386 | \ ; RUN: not grep {movl %eax, %edx} define i32 @foo(i32 %t, i32 %C) { diff --git a/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll index dd21c0455d6d3..1e890bbc02e54 100644 --- a/test/CodeGen/X86/2006-09-01-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-09-01-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8" %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll index cc988f26618cf..795d4647a3f66 100644 --- a/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll +++ b/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR933 define fastcc i1 @test() { diff --git a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll index e8055f5f901f5..bf9fa5782b06b 100644 --- a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll +++ b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse | grep movaps +; RUN: llc < %s -march=x86 -mattr=sse | grep movaps ; Test that the load is NOT folded into the intrinsic, which would zero the top ; elts of the loaded vector. diff --git a/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll index d627d1bf214ca..fbb14ee161512 100644 --- a/test/CodeGen/X86/2006-10-09-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-10-09-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define void @_ZN13QFSFileEngine4readEPcx() { %tmp201 = load i32* null ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll index 5dc1cb3d9a2d3..b1f04518acaab 100644 --- a/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll +++ b/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep shrl +; RUN: llc < %s -march=x86 | grep shrl ; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31 ; is then optimized away. @tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=1] diff --git a/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll index 31eb070e85b9d..3b987ac79f946 100644 --- a/test/CodeGen/X86/2006-10-12-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-10-12-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %struct.function = type opaque %struct.lang_decl = type opaque %struct.location_t = type { i8*, i32 } diff --git a/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll index 2b53f26f578e4..6ed2e7bb57512 100644 --- a/test/CodeGen/X86/2006-10-13-CycleInDAG.ll +++ b/test/CodeGen/X86/2006-10-13-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 @str = external global [18 x i8] ; <[18 x i8]*> [#uses=1] define void @test() { diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll index 1ff687a1b8b79..88e8b4a4fd924 100644 --- a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll +++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -1,11 +1,14 @@ -; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | %prcontext je 1 | \ -; RUN: grep BB1_1: +; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s @str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1] @str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1] -define i32 @main(i32 %argc, i8** %argv) { +define i32 @test(i32 %argc, i8** %argv) nounwind { entry: +; CHECK: cmpl $2 +; CHECK-NEXT: je +; CHECK-NEXT: %entry + switch i32 %argc, label %UnifiedReturnBlock [ i32 1, label %bb i32 2, label %bb2 diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll index 1a92852f06fe5..91210ea90c69d 100644 --- a/test/CodeGen/X86/2006-11-12-CSRetCC.ll +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {subl \$4, %esp} +; RUN: llc < %s -march=x86 | grep {subl \$4, %esp} target triple = "i686-pc-linux-gnu" @str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/test/CodeGen/X86/2006-11-17-IllegalMove.ll index f0067c7e489ce..e839d7295adc6 100644 --- a/test/CodeGen/X86/2006-11-17-IllegalMove.ll +++ b/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -1,9 +1,9 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep movb %t | count 2 ; RUN: grep {movzb\[wl\]} %t -define void @handle_vector_size_attribute() { +define void @handle_vector_size_attribute() nounwind { entry: %tmp69 = load i32* null ; <i32> [#uses=1] switch i32 %tmp69, label %bb84 [ diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll index 1222a37436862..ea2e6db61e1af 100644 --- a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll +++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep test.*1 +; RUN: llc < %s -march=x86 | grep test.*1 ; PR1016 define i32 @test(i32 %A, i32 %B, i32 %C) { diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll index a58bedc28d758..8c1573f130ba1 100644 --- a/test/CodeGen/X86/2006-11-28-Memcpy.ll +++ b/test/CodeGen/X86/2006-11-28-Memcpy.ll @@ -1,8 +1,6 @@ ; PR1022, PR1023 -; RUN: llvm-as < %s | llc -march=x86 | \ -; RUN: grep 3721182122 | count 2 -; RUN: llvm-as < %s | llc -march=x86 | \ -; RUN: grep -E {movl _?bytes2} | count 1 +; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2 +; RUN: llc < %s -march=x86 | grep -E {movl _?bytes2} | count 1 @fmt = constant [4 x i8] c"%x\0A\00" ; <[4 x i8]*> [#uses=2] @bytes = constant [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll index 17234b827e4c5..f81b303e3b80e 100644 --- a/test/CodeGen/X86/2006-12-19-IntelSyntax.ll +++ b/test/CodeGen/X86/2006-12-19-IntelSyntax.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel ; PR1061 target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2007-01-08-InstrSched.ll b/test/CodeGen/X86/2007-01-08-InstrSched.ll index 3b365f35cb221..e1bae3251a22f 100644 --- a/test/CodeGen/X86/2007-01-08-InstrSched.ll +++ b/test/CodeGen/X86/2007-01-08-InstrSched.ll @@ -1,8 +1,7 @@ ; PR1075 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | \ -; RUN: %prcontext {mulss LCPI1_3} 1 | grep mulss | count 1 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -define float @foo(float %x) { +define float @foo(float %x) nounwind { %tmp1 = fmul float %x, 3.000000e+00 %tmp3 = fmul float %x, 5.000000e+00 %tmp5 = fmul float %x, 7.000000e+00 @@ -11,4 +10,10 @@ define float @foo(float %x) { %tmp12 = fadd float %tmp10, %tmp5 %tmp14 = fadd float %tmp12, %tmp7 ret float %tmp14 + +; CHECK: mulss LCPI1_2(%rip) +; CHECK-NEXT: addss +; CHECK-NEXT: mulss LCPI1_3(%rip) +; CHECK-NEXT: addss +; CHECK-NEXT: ret } diff --git a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll index c03d982aeb15c..5e7c0a7ee2b73 100644 --- a/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll +++ b/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep leaq %t ; RUN: not grep {,%rsp)} %t ; PR1103 diff --git a/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll index b1c86f4138a3c..e83e2e54e4556 100644 --- a/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll +++ b/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; Test 'ri' constraint. define void @run_init_process() { diff --git a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll index 26d3e367195c5..93e8808549857 100644 --- a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll +++ b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1, %eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {leal 3(,%eax,8)} +; RUN: llc < %s -march=x86 | grep {orl \$1, %eax} +; RUN: llc < %s -march=x86 | grep {leal 3(,%eax,8)} ;; This example can't fold the or into an LEA. define i32 @test(float ** %tmp2, i32 %tmp12) { diff --git a/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll index 365768afe794a..954c95d696117 100644 --- a/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll +++ b/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic ; PR1027 %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } diff --git a/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/test/CodeGen/X86/2007-02-25-FastCCStack.ll index 3b1eb1fdb66b4..2e2b56d04a25c 100644 --- a/test/CodeGen/X86/2007-02-25-FastCCStack.ll +++ b/test/CodeGen/X86/2007-02-25-FastCCStack.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium3 +; RUN: llc < %s -march=x86 -mcpu=pentium3 define internal fastcc double @ggc_rlimit_bound(double %limit) { ret double %limit diff --git a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll index 721b6e7e20949..112d1ab65e7b8 100644 --- a/test/CodeGen/X86/2007-03-01-SpillerCrash.ll +++ b/test/CodeGen/X86/2007-03-01-SpillerCrash.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps +; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 +; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | not grep movhlps define void @test() nounwind { test.exit: diff --git a/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll index 4c69ec733dd48..4cac9b4c4a216 100644 --- a/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll +++ b/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-darwin | \ +; RUN: llc < %s -march=x86 -mtriple=i686-darwin | \ ; RUN: grep push | count 3 define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) { diff --git a/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/test/CodeGen/X86/2007-03-16-InlineAsm.ll index c98c89a537a3e..9580726ce02a2 100644 --- a/test/CodeGen/X86/2007-03-16-InlineAsm.ll +++ b/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; ModuleID = 'a.bc' diff --git a/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll index 6965849e32310..70936fbc92812 100644 --- a/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll +++ b/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR1259 define void @test() { diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll index babcf6a0e8059..44d68dd0493ef 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @test(i16 %tmp40414244) { %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 ) diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll index 9bdb2493508da..3312e01b3d8ef 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {mov %gs:72, %eax} +; RUN: llc < %s -march=x86 | grep {mov %gs:72, %eax} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll index 6e1adf8346243..c1b1ad1c730d8 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah -march=x86 | \ +; RUN: llc < %s -mcpu=yonah -march=x86 | \ ; RUN: grep {cmpltsd %xmm0, %xmm0} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll index e440cdb6cfd7c..30453d5266b9f 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {psrlw \$8, %xmm0} +; RUN: llc < %s -march=x86 | grep {psrlw \$8, %xmm0} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-03-26-CoalescerBug.ll b/test/CodeGen/X86/2007-03-26-CoalescerBug.ll index 7ce0584c5450e..9676f143bca6c 100644 --- a/test/CodeGen/X86/2007-03-26-CoalescerBug.ll +++ b/test/CodeGen/X86/2007-03-26-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 @data = external global [339 x i64] diff --git a/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll index 840fc7d513a02..9f09e88664c69 100644 --- a/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll +++ b/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR1314 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" @@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu" %struct.bc_struct = type { i32, i32, i32, i32, %struct.bc_struct*, i8*, i8* } @_programStartTime = external global %struct.CycleCount ; <%struct.CycleCount*> [#uses=1] -define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) { +define fastcc i32 @bc_divide(%struct.bc_struct* %n1, %struct.bc_struct* %n2, %struct.bc_struct** %quot, i32 %scale) nounwind { entry: %tmp7.i46 = tail call i64 asm sideeffect ".byte 0x0f,0x31", "={dx},=*{ax},~{dirflag},~{fpsr},~{flags}"( i64* getelementptr (%struct.CycleCount* @_programStartTime, i32 0, i32 1) ) ; <i64> [#uses=0] %tmp221 = sdiv i32 10, 0 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll index 514d6656cd2aa..f48c13259c423 100644 --- a/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll +++ b/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll index f9671a4daaed1..4604f46c533f1 100644 --- a/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll +++ b/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim +; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic --disable-fp-elim %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.__sFILEX = type opaque diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll index 74e6e72a4aa68..7528129971ab1 100644 --- a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll +++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep 4294967112 +; RUN: llc < %s -march=x86-64 | not grep 4294967112 ; PR1348 %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } diff --git a/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/test/CodeGen/X86/2007-04-24-VectorCrash.ll index 3e08e50f09de0..e38992d8b3044 100644 --- a/test/CodeGen/X86/2007-04-24-VectorCrash.ll +++ b/test/CodeGen/X86/2007-04-24-VectorCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah +; RUN: llc < %s -mcpu=yonah target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll index ac85a9d72bbd1..113d0eb8647fc 100644 --- a/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll +++ b/test/CodeGen/X86/2007-04-25-MMX-PADDQ.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep paddq | count 2 -; RUN: llvm-as < %s | llc -o - -march=x86 -mattr=+mmx | grep movq | count 2 +; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep paddq | count 2 +; RUN: llc < %s -o - -march=x86 -mattr=+mmx | grep movq | count 2 define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) { entry: diff --git a/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll index cbd6a73dbee7f..85a2ecc959ab7 100644 --- a/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll +++ b/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | not grep {bsrl.*10} +; RUN: llc < %s | not grep {bsrl.*10} ; PR1356 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll index b0bcf5c155aaf..e58b1932197de 100644 --- a/test/CodeGen/X86/2007-05-05-VecCastExpand.ll +++ b/test/CodeGen/X86/2007-05-05-VecCastExpand.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse +; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse ; PR1371 @str = external global [18 x i8] ; <[18 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll index ff7aac0239d8d..a3ff2f60c8d70 100644 --- a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll +++ b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .12, %esp} +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -enable-eh -disable-fp-elim | not grep {addl .12, %esp} ; PR1398 %struct.S = type { i32, i32 } diff --git a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll index 61f8b2ce58f29..8ef253822bd9e 100644 --- a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll +++ b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> %struct.OpaqueXDataStorageType = type opaque diff --git a/test/CodeGen/X86/2007-05-15-maskmovq.ll b/test/CodeGen/X86/2007-05-15-maskmovq.ll index d9836e4a8d5da..2093b8f687443 100644 --- a/test/CodeGen/X86/2007-05-15-maskmovq.ll +++ b/test/CodeGen/X86/2007-05-15-maskmovq.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah +; RUN: llc < %s -mcpu=yonah target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll index 64ccef3917a38..989dfc5bdb2cd 100644 --- a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll +++ b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpckhwd +; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpckhwd declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) diff --git a/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll index 5d090759092ee..321e11651b60d 100644 --- a/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll +++ b/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep GOTPCREL -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep ".align.*3" +; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep GOTPCREL +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep ".align.*3" %struct.A = type { [1024 x i8] } @_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <%struct.A*> [#uses=1] diff --git a/test/CodeGen/X86/2007-06-04-tailmerge4.ll b/test/CodeGen/X86/2007-06-04-tailmerge4.ll index 0ad539664c990..baf2377c5a02a 100644 --- a/test/CodeGen/X86/2007-06-04-tailmerge4.ll +++ b/test/CodeGen/X86/2007-06-04-tailmerge4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -enable-eh -asm-verbose | grep invcont131 +; RUN: llc < %s -enable-eh -asm-verbose | grep invcont131 ; PR 1496: tail merge was incorrectly removing this block ; ModuleID = 'report.1.bc' diff --git a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll index 3e7776a62ab13..36a97ef9c3cf0 100644 --- a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll +++ b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll @@ -1,5 +1,5 @@ ; PR1495 -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2007-06-14-branchfold.ll b/test/CodeGen/X86/2007-06-14-branchfold.ll index 7756d060ff259..2680b1543fbb4 100644 --- a/test/CodeGen/X86/2007-06-14-branchfold.ll +++ b/test/CodeGen/X86/2007-06-14-branchfold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i686 | not grep jmp +; RUN: llc < %s -march=x86 -mcpu=i686 | not grep jmp ; check that branch folding understands FP_REG_KILL is not a branch target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll index e608ac3ecb97e..6128d8b92d11a 100644 --- a/test/CodeGen/X86/2007-06-15-IntToMMX.ll +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw @R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) { diff --git a/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll index af11f127cfb5e..9d42c49317fdd 100644 --- a/test/CodeGen/X86/2007-06-28-X86-64-isel.ll +++ b/test/CodeGen/X86/2007-06-28-X86-64-isel.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 define void @test() { %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) ) diff --git a/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll index bcd265aeddaa2..d2d6388c07827 100644 --- a/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll +++ b/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define void @test() { entry: diff --git a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll index 66a58c73e824a..dc11eec9c17f9 100644 --- a/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll +++ b/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define void @test(<4 x float>* %arg) { %tmp89 = getelementptr <4 x float>* %arg, i64 3 diff --git a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll index 18850b135ccf5..2c513f17811a7 100644 --- a/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll +++ b/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0} -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1} -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1} +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rsi, %mm0} +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {movd %rdi, %mm1} +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | grep {paddusw %mm0, %mm1} @R = external global <1 x i64> ; <<1 x i64>*> [#uses=1] diff --git a/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/test/CodeGen/X86/2007-07-10-StackerAssert.ll index 7f09b5275a050..d611677942c24 100644 --- a/test/CodeGen/X86/2007-07-10-StackerAssert.ll +++ b/test/CodeGen/X86/2007-07-10-StackerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic ; PR1545 @.str97 = external constant [56 x i8] ; <[56 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2007-07-18-Vector-Extract.ll b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll index c0bd282e01915..8625b27717382 100644 --- a/test/CodeGen/X86/2007-07-18-Vector-Extract.ll +++ b/test/CodeGen/X86/2007-07-18-Vector-Extract.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax} -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax} +; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq (%rdi), %rax} +; RUN: llc < %s -march=x86-64 -mattr=+sse | grep {movq 8(%rdi), %rax} define i64 @foo_0(<2 x i64>* %val) { entry: %val12 = getelementptr <2 x i64>* %val, i32 0, i32 0 ; <i64*> [#uses=1] diff --git a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll index 8eda0ab9bc4ea..3cd8052a732c7 100644 --- a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep movl +; RUN: llc < %s -march=x86 | not grep movl define i8 @t(i8 zeroext %x, i8 zeroext %y) zeroext { %tmp2 = add i8 %x, 2 diff --git a/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll b/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll index e9ea843ba3c36..7768f36efae5e 100644 --- a/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll +++ b/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r" +; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep "movb %ah, %r" %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 } %struct.PyBoolScalarObject = type { i64, %struct._typeobject*, i8 } diff --git a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll index b62d2c61bba7a..e93092f355c5c 100644 --- a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll +++ b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {movsbl} +; RUN: llc < %s -march=x86 | grep {movsbl} @X = global i32 0 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll b/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll index f6ed0fe7a5ffe..c90a85f16949e 100644 --- a/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll +++ b/test/CodeGen/X86/2007-08-13-AppendingLinkage.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep drectve +; RUN: llc < %s -march=x86 | not grep drectve ; PR1607 %hlvm_programs_element = type { i8*, i32 (i32, i8**)* } diff --git a/test/CodeGen/X86/2007-08-13-SpillerReuse.ll b/test/CodeGen/X86/2007-08-13-SpillerReuse.ll index edcb8232fde1a..d6ea5109d1fb6 100644 --- a/test/CodeGen/X86/2007-08-13-SpillerReuse.ll +++ b/test/CodeGen/X86/2007-08-13-SpillerReuse.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep "48(%esp)" | count 5 +; RUN: llc < %s -mtriple=i686-apple-darwin | grep "48(%esp)" | count 5 %struct..0anon = type { i32 } %struct.rtvec_def = type { i32, [1 x %struct..0anon] } diff --git a/test/CodeGen/X86/2007-09-05-InvalidAsm.ll b/test/CodeGen/X86/2007-09-05-InvalidAsm.ll index b6a5fc97b4bb2..5acb05134c7cb 100644 --- a/test/CodeGen/X86/2007-09-05-InvalidAsm.ll +++ b/test/CodeGen/X86/2007-09-05-InvalidAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | not grep {lea\[\[:space:\]\]R} +; RUN: llc < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | not grep {lea\[\[:space:\]\]R} %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* } %struct.AGenericManager = type <{ i8 }> diff --git a/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll index 4f95b7603bae6..c5d2a46f92c27 100644 --- a/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll +++ b/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep weak | count 2 +; RUN: llc < %s -march=x86 | grep weak | count 2 @__gthrw_pthread_once = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0] declare extern_weak i32 @pthread_once(i32*, void ()*) diff --git a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll index 6a313be188851..56ee2a3149903 100644 --- a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll +++ b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin -enable-eh | grep {isNullOrNil].eh"} | count 2 %struct.NSString = type { } %struct._objc__method_prototype_list = type opaque diff --git a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll index 835e4caf0aafc..0ae1897e60e98 100644 --- a/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll +++ b/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep 170 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -- -86 define i16 @f(<4 x float>* %tmp116117.i1061.i) nounwind { entry: diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll index be51c04a38371..4a56ee446a0fb 100644 --- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll +++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc | grep powixf2 -; RUN: llvm-as < %s | llc | grep fsqrt +; RUN: llc < %s | grep powixf2 +; RUN: llc < %s | grep fsqrt ; ModuleID = 'yyy.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll b/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll index a733bb31646c7..6fc8ec907eacc 100644 --- a/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll +++ b/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep pushf +; RUN: llc < %s -march=x86 | not grep pushf %struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* } %struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* } diff --git a/test/CodeGen/X86/2007-10-05-3AddrConvert.ll b/test/CodeGen/X86/2007-10-05-3AddrConvert.ll index e9fbe797f5bca..67323e87eff57 100644 --- a/test/CodeGen/X86/2007-10-05-3AddrConvert.ll +++ b/test/CodeGen/X86/2007-10-05-3AddrConvert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep lea +; RUN: llc < %s -march=x86 | grep lea %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] } %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* } diff --git a/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll index e2fdbb32bde34..fc11347224bea 100644 --- a/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll +++ b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep movb +; RUN: llc < %s -march=x86 | not grep movb define i16 @f(i32* %bp, i32* %ss) signext { entry: diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll index fd914a1687b77..ea1bbc464693e 100644 --- a/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll +++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep addss | not grep esp +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep addss | not grep esp define fastcc void @fht(float* %fz, i16 signext %n) { entry: diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll index 3016a013f2c90..a3872ad47e981 100644 --- a/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll +++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep sarl | not grep esp +; RUN: llc < %s -march=x86 | grep sarl | not grep esp define i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) signext { entry: diff --git a/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll index 6cac558e427d0..8a55935cc1f88 100644 --- a/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll +++ b/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin +; RUN: llc < %s -mtriple=x86_64-apple-darwin %struct._Unwind_Context = type { } diff --git a/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll index 4ea42440e1e2f..1e4ae84645869 100644 --- a/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll +++ b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu +; RUN: llc < %s -mtriple=x86_64-linux-gnu ; PR1729 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll index a414ef0d8626b..fbcac50875c27 100644 --- a/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll +++ b/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin +; RUN: llc < %s -mtriple=x86_64-apple-darwin define i64 @__ashldi3(i64 %u, i64 %b) { entry: diff --git a/test/CodeGen/X86/2007-10-16-IllegalAsm.ll b/test/CodeGen/X86/2007-10-16-IllegalAsm.ll index 5332fa1007ed1..6d0cb475b1f18 100644 --- a/test/CodeGen/X86/2007-10-16-IllegalAsm.ll +++ b/test/CodeGen/X86/2007-10-16-IllegalAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep movb | not grep x +; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep movb | not grep x ; PR1734 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2007-10-16-fp80_select.ll b/test/CodeGen/X86/2007-10-16-fp80_select.ll index 2fcf76be5c78d..3f9845c3c3ecb 100644 --- a/test/CodeGen/X86/2007-10-16-fp80_select.ll +++ b/test/CodeGen/X86/2007-10-16-fp80_select.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-10-17-IllegalAsm.ll b/test/CodeGen/X86/2007-10-17-IllegalAsm.ll index f3cdfee7545f7..c0bb55ed14ef0 100644 --- a/test/CodeGen/X86/2007-10-17-IllegalAsm.ll +++ b/test/CodeGen/X86/2007-10-17-IllegalAsm.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep addb | not grep x -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux-gnu | grep cmpb | not grep x +; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep addb | not grep x +; RUN: llc < %s -mtriple=x86_64-linux-gnu | grep cmpb | not grep x ; PR1734 target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index e649999bb0a8d..600bd1f178497 100644 --- a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR define i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) signext { entry: diff --git a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll index 450911ae81991..984094d86a275 100644 --- a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll +++ b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR1748 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll index 9013e9020efa4..86d3bbf4f4e3b 100644 --- a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll +++ b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1 +; RUN: llc < %s -march=x86 | grep mov | count 1 define i16 @t() signext { entry: diff --git a/test/CodeGen/X86/2007-10-30-LSRCrash.ll b/test/CodeGen/X86/2007-10-30-LSRCrash.ll index 1c912a014049e..42db98b447502 100644 --- a/test/CodeGen/X86/2007-10-30-LSRCrash.ll +++ b/test/CodeGen/X86/2007-10-30-LSRCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) { entry: diff --git a/test/CodeGen/X86/2007-10-31-extractelement-i64.ll b/test/CodeGen/X86/2007-10-31-extractelement-i64.ll index f73a9105cef40..1b8e67dcc9b3e 100644 --- a/test/CodeGen/X86/2007-10-31-extractelement-i64.ll +++ b/test/CodeGen/X86/2007-10-31-extractelement-i64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 +; RUN: llc < %s -march=x86 -mattr=sse2 ; ModuleID = 'yyy.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2007-11-01-ISelCrash.ll b/test/CodeGen/X86/2007-11-01-ISelCrash.ll index 704efd0ef8008..019c6a8cc0d90 100644 --- a/test/CodeGen/X86/2007-11-01-ISelCrash.ll +++ b/test/CodeGen/X86/2007-11-01-ISelCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %"struct.K::JL" = type <{ i8 }> %struct.jv = type { i64 } diff --git a/test/CodeGen/X86/2007-11-02-BadAsm.ll b/test/CodeGen/X86/2007-11-02-BadAsm.ll index 4ae4d2f9e8d90..4e11cda92e6d3 100644 --- a/test/CodeGen/X86/2007-11-02-BadAsm.ll +++ b/test/CodeGen/X86/2007-11-02-BadAsm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl | not grep rax +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl | not grep rax %struct.color_sample = type { i64 } %struct.gs_matrix = type { float, i64, float, i64, float, i64, float, i64, float, i64, float, i64 } diff --git a/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll b/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll index ffa6e44d1cb66..27ec8260d06b7 100644 --- a/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll +++ b/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR1763 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll b/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll index 889b122bb066b..404561848b711 100644 --- a/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll +++ b/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR1766 %struct.dentry = type { %struct.dentry_operations* } diff --git a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll index 7e41f36790638..6b871aa3a4d4f 100644 --- a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR1767 define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) { diff --git a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll index de33c617d050b..8e586a7059eb6 100644 --- a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll +++ b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=static | grep {foo _str$} +; RUN: llc < %s -relocation-model=static | grep {foo _str$} ; PR1761 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/2007-11-06-InstrSched.ll b/test/CodeGen/X86/2007-11-06-InstrSched.ll index a4e44e1f4e1d1..f6db0d0379e76 100644 --- a/test/CodeGen/X86/2007-11-06-InstrSched.ll +++ b/test/CodeGen/X86/2007-11-06-InstrSched.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep lea +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lea define float @foo(i32* %x, float* %y, i32 %c) nounwind { entry: diff --git a/test/CodeGen/X86/2007-11-07-MulBy4.ll b/test/CodeGen/X86/2007-11-07-MulBy4.ll index d7fb684a6ba46..d5b630b59d9f5 100644 --- a/test/CodeGen/X86/2007-11-07-MulBy4.ll +++ b/test/CodeGen/X86/2007-11-07-MulBy4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep imul +; RUN: llc < %s -march=x86 | not grep imul %struct.eebb = type { %struct.eebb*, i16* } %struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* } diff --git a/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll index b5635b38cfc95..9c004f946b4af 100644 --- a/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll +++ b/test/CodeGen/X86/2007-11-14-Coalescer-Bug.ll @@ -1,4 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att | grep movl | count 1 +; RUN: llc < %s -march=x86 -x86-asm-syntax=att | grep movl | count 2 +; RUN: llc < %s -march=x86 -x86-asm-syntax=att | not grep movb %struct.double_int = type { i64, i64 } %struct.tree_common = type <{ i8, [3 x i8] }> @@ -6,7 +7,7 @@ %struct.tree_node = type { %struct.tree_int_cst } @tree_code_type = external constant [0 x i32] ; <[0 x i32]*> [#uses=1] -define i32 @simple_cst_equal(%struct.tree_node* %t1, %struct.tree_node* %t2) { +define i32 @simple_cst_equal(%struct.tree_node* %t1, %struct.tree_node* %t2) nounwind { entry: %tmp2526 = bitcast %struct.tree_node* %t1 to i32* ; <i32*> [#uses=1] br i1 false, label %UnifiedReturnBlock, label %bb21 diff --git a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll index 46422bcf2c506..0626d28eefee4 100644 --- a/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll +++ b/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \ ; RUN: grep {1 .*folded into instructions} ; Increment in loop bb.128.i adjusted to 2, to prevent loop reversal from ; kicking in. diff --git a/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll b/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll index 0d43a6e73f873..debb46121698f 100644 --- a/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll +++ b/test/CodeGen/X86/2007-11-30-TestLoadFolding.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& \ +; RUN: llc < %s -march=x86 -stats |& \ ; RUN: grep {1 .*folded into instructions} -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 4 +; RUN: llc < %s -march=x86 | grep cmp | count 4 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } diff --git a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll index cb7a3dcd33cb3..ca995cc3f65e4 100644 --- a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll +++ b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF +; RUN: llc < %s -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF %struct.__sbuf = type { i8*, i32 } %struct.ggBRDF = type { i32 (...)** } diff --git a/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll b/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll index 8ad77051beddb..455de91d30abf 100644 --- a/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll +++ b/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu +; RUN: llc < %s -mtriple=i686-pc-linux-gnu ; PR1799 %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll b/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll index 6309f3c510526..265d968548516 100644 --- a/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll +++ b/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp)} | count 2 +; RUN: llc < %s -march=x86 | grep {(%esp)} | count 2 ; PR1872 %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2008-01-08-IllegalCMP.ll b/test/CodeGen/X86/2008-01-08-IllegalCMP.ll index fddfd4f3a4863..7aec613e2abbc 100644 --- a/test/CodeGen/X86/2008-01-08-IllegalCMP.ll +++ b/test/CodeGen/X86/2008-01-08-IllegalCMP.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll index 8a1520c1fe413..b040095195c8f 100644 --- a/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll +++ b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep pushf +; RUN: llc < %s -march=x86 | not grep pushf %struct.indexentry = type { i32, i8*, i8*, i8*, i8*, i8* } diff --git a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll index 962d6ecc24e9c..6997d535ff92b 100644 --- a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll +++ b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -o - | grep sinl +; RUN: llc < %s -o - | grep sinl target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll index 38020c1e3ea88..d795610607ee6 100644 --- a/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll +++ b/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -regalloc=local +; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=local define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) { entry: diff --git a/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll b/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll index 4feb078671fb4..e91f52ef05696 100644 --- a/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll +++ b/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep IMPLICIT_DEF +; RUN: llc < %s -march=x86 | not grep IMPLICIT_DEF %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 } diff --git a/test/CodeGen/X86/2008-01-16-Trampoline.ll b/test/CodeGen/X86/2008-01-16-Trampoline.ll index 4510edb9d7dbf..704b2bab4a266 100644 --- a/test/CodeGen/X86/2008-01-16-Trampoline.ll +++ b/test/CodeGen/X86/2008-01-16-Trampoline.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 %struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, void (i32, i32)*, i8 (i32, i32)* } diff --git a/test/CodeGen/X86/2008-01-25-EmptyFunction.ll b/test/CodeGen/X86/2008-01-25-EmptyFunction.ll index ffb82ae7f2b86..b936686798f03 100644 --- a/test/CodeGen/X86/2008-01-25-EmptyFunction.ll +++ b/test/CodeGen/X86/2008-01-25-EmptyFunction.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep nop +; RUN: llc < %s -march=x86 | grep nop target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/2008-02-05-ISelCrash.ll b/test/CodeGen/X86/2008-02-05-ISelCrash.ll index 6885cf14cf111..443a32de3b426 100644 --- a/test/CodeGen/X86/2008-02-05-ISelCrash.ll +++ b/test/CodeGen/X86/2008-02-05-ISelCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR1975 @nodes = external global i64 ; <i64*> [#uses=2] diff --git a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll index 6db6537aed26e..d2d5149de3aaa 100644 --- a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll +++ b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xor | grep CPI +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xor | grep CPI define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind { entry: diff --git a/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll index 230af57fea8ca..b772d77f6405f 100644 --- a/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll +++ b/test/CodeGen/X86/2008-02-08-LoadFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep andpd | not grep esp +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep andpd | not grep esp declare double @llvm.sqrt.f64(double) nounwind readnone diff --git a/test/CodeGen/X86/2008-02-14-BitMiscompile.ll b/test/CodeGen/X86/2008-02-14-BitMiscompile.ll index 5bf84560a37c5..1983f1d19c6f8 100644 --- a/test/CodeGen/X86/2008-02-14-BitMiscompile.ll +++ b/test/CodeGen/X86/2008-02-14-BitMiscompile.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep and +; RUN: llc < %s -march=x86 | grep and define i32 @test(i1 %A) { %B = zext i1 %A to i32 ; <i32> [#uses=1] %C = sub i32 0, %B ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll index 47c8677d385b6..9b52c5c06990c 100644 --- a/test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ b/test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9 +; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& grep {Number of block tails merged} | grep 9 ; PR1909 @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll index 557d00c62937c..5115e48365fcc 100644 --- a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll +++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc | grep {a:} | not grep ax -; RUN: llvm-as < %s | llc | grep {b:} | not grep ax +; RUN: llc < %s | grep {a:} | not grep ax +; RUN: llc < %s | grep {b:} | not grep ax ; PR2078 ; The clobber list says that "ax" is clobbered. Make sure that eax isn't ; allocated to the input/output register. diff --git a/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll index 8cf36425f22d6..6b1eefe5750a0 100644 --- a/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll +++ b/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -regalloc=local -march=x86 -mattr=+mmx | grep esi +; RUN: llc < %s -regalloc=local -march=x86 -mattr=+mmx | grep esi ; PR2082 ; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of ; registers. diff --git a/test/CodeGen/X86/2008-02-22-ReMatBug.ll b/test/CodeGen/X86/2008-02-22-ReMatBug.ll index f78d52651ded8..8d6bb0df1f6d0 100644 --- a/test/CodeGen/X86/2008-02-22-ReMatBug.ll +++ b/test/CodeGen/X86/2008-02-22-ReMatBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of re-materialization} | grep 3 -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of dead spill slots removed} +; RUN: llc < %s -march=x86 -stats |& grep {Number of re-materialization} | grep 3 ; rdar://5761454 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } diff --git a/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll b/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll index ff7cf5e94e258..1d31859f46cc2 100644 --- a/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll +++ b/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2 ; PR2076 define void @h264_h_loop_filter_luma_mmx2(i8* %pix, i32 %stride, i32 %alpha, i32 %beta, i8* %tc0) nounwind { diff --git a/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll index 5d60bde85614c..6615b8c620759 100644 --- a/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 %struct.XX = type <{ i8 }> %struct.YY = type { i64 } diff --git a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll index 3ba31f4ad9000..0b4eb3a3b9b20 100644 --- a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll +++ b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll index fe0ee8a8faaf6..ad7950ccd8e3c 100644 --- a/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll +++ b/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %struct.CompAtom = type <{ %struct.Position, float, i32 }> %struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 } diff --git a/test/CodeGen/X86/2008-02-27-PEICrash.ll b/test/CodeGen/X86/2008-02-27-PEICrash.ll index 055eabb43a63c..d842967561abd 100644 --- a/test/CodeGen/X86/2008-02-27-PEICrash.ll +++ b/test/CodeGen/X86/2008-02-27-PEICrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone { entry: diff --git a/test/CodeGen/X86/2008-03-06-frem-fpstack.ll b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll index 2d7182e733fb1..70a83b5c9f57b 100644 --- a/test/CodeGen/X86/2008-03-06-frem-fpstack.ll +++ b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 +; RUN: llc < %s -march=x86 -mcpu=i386 ; PR2122 define float @func(float %a, float %b) nounwind { entry: diff --git a/test/CodeGen/X86/2008-03-07-APIntBug.ll b/test/CodeGen/X86/2008-03-07-APIntBug.ll index 5d1ccad745ade..84e4827d04162 100644 --- a/test/CodeGen/X86/2008-03-07-APIntBug.ll +++ b/test/CodeGen/X86/2008-03-07-APIntBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | not grep 255 +; RUN: llc < %s -march=x86 -mcpu=i386 | not grep 255 %struct.CONSTRAINT = type { i32, i32, i32, i32 } %struct.FIRST_UNION = type { %struct.anon } diff --git a/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll index 10989885f0f1e..cd2d609b53560 100644 --- a/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll +++ b/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills} +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -disable-fp-elim -schedule-livein-copies | not grep {Number of register spills} ; PR2134 declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind diff --git a/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll b/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll index 0f83b399ad7c9..e673d315a4356 100644 --- a/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll +++ b/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=pic | grep TLSGD | count 2 +; RUN: llc < %s -relocation-model=pic | grep TLSGD | count 2 ; PR2137 ; ModuleID = '1.c' diff --git a/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll index 4a896e9f33e16..c6ba22ea3da60 100644 --- a/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll +++ b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i16 @t(i32 %depth) signext nounwind { entry: diff --git a/test/CodeGen/X86/2008-03-14-SpillerCrash.ll b/test/CodeGen/X86/2008-03-14-SpillerCrash.ll index 544c9b5819ece..8946415108f4a 100644 --- a/test/CodeGen/X86/2008-03-14-SpillerCrash.ll +++ b/test/CodeGen/X86/2008-03-14-SpillerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu +; RUN: llc < %s -mtriple=i386-pc-linux-gnu ; PR2138 %struct.__locale_struct = type { [13 x %struct.locale_data*], i16*, i32*, i32*, [13 x i8*] } diff --git a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll index 4b6758d6833ca..ccc4d754c1f56 100644 --- a/test/CodeGen/X86/2008-03-18-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-03-18-CoalescerBug.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1 -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep movss | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim -stats |& grep {Number of re-materialization} | grep 1 %struct..0objc_object = type opaque %struct.OhBoy = type { } diff --git a/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll b/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll index 2fad32a36c3f6..eaa883c963f2b 100644 --- a/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll +++ b/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @t() nounwind { entry: diff --git a/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll b/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll index 6cf731b0e9b75..4dc3a10f46479 100644 --- a/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll +++ b/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##} +; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose | grep {#} | not grep -v {##} %struct.AGenericCall = type { %struct.AGenericManager*, %struct.ComponentParameters*, i32* } %struct.AGenericManager = type <{ i8 }> diff --git a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll index 53bb054795ec1..2d868e0f612a6 100644 --- a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll +++ b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define void @t() { entry: diff --git a/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll b/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll index 83e1d60fcbafd..305968ac37785 100644 --- a/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll +++ b/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | grep add | grep 12 | not grep non_lazy_ptr +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim | grep add | grep 12 | not grep non_lazy_ptr ; Don't fold re-materialized load into a two address instruction %"struct.Smarts::Runnable" = type { i32 (...)**, i32 } diff --git a/test/CodeGen/X86/2008-04-02-unnamedEH.ll b/test/CodeGen/X86/2008-04-02-unnamedEH.ll index fff75ff660a7b..a9f368b6eaa5b 100644 --- a/test/CodeGen/X86/2008-04-02-unnamedEH.ll +++ b/test/CodeGen/X86/2008-04-02-unnamedEH.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | llc | grep unnamed_1_0.eh -; ModuleID = '<stdin>' +; RUN: llc < %s | grep unnamed_1.eh target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll index f5de113b9ea9f..dc8c097efc506 100644 --- a/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll +++ b/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx +; RUN: llc < %s -march=x86 -mattr=+mmx define i32 @t2() nounwind { entry: diff --git a/test/CodeGen/X86/2008-04-09-BranchFolding.ll b/test/CodeGen/X86/2008-04-09-BranchFolding.ll index fea54c4e5ecff..41fbdd19f2b20 100644 --- a/test/CodeGen/X86/2008-04-09-BranchFolding.ll +++ b/test/CodeGen/X86/2008-04-09-BranchFolding.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep jmp +; RUN: llc < %s -march=x86 | not grep jmp %struct..0anon = type { i32 } %struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* } diff --git a/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll b/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll index 4bb8c6d27a71c..83eb61aed433c 100644 --- a/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll +++ b/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local +; RUN: llc < %s -mtriple=x86_64-apple-darwin +; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -disable-fp-elim -O0 -regalloc=local %struct.CGPoint = type { double, double } %struct.NSArray = type { %struct.NSObject } diff --git a/test/CodeGen/X86/2008-04-16-CoalescerBug.ll b/test/CodeGen/X86/2008-04-16-CoalescerBug.ll index 30accad5863b3..3ccc0fe163400 100644 --- a/test/CodeGen/X86/2008-04-16-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-04-16-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind { entry: diff --git a/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/test/CodeGen/X86/2008-04-16-ReMatBug.ll index 3e0662aed88d7..6e8891bfd5b8b 100644 --- a/test/CodeGen/X86/2008-04-16-ReMatBug.ll +++ b/test/CodeGen/X86/2008-04-16-ReMatBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep movw | not grep {, %e} +; RUN: llc < %s -mtriple=i386-apple-darwin | grep movw | not grep {, %e} %struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 } %struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* } diff --git a/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll index c69ff332c2c5e..ac482850b8312 100644 --- a/test/CodeGen/X86/2008-04-17-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep xorl | grep {%e} +; RUN: llc < %s -mtriple=i386-apple-darwin | grep xorl | grep {%e} ; Make sure xorl operands are 32-bit registers. %struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* } diff --git a/test/CodeGen/X86/2008-04-24-MemCpyBug.ll b/test/CodeGen/X86/2008-04-24-MemCpyBug.ll index 09fdc707b854b..6389267aa4e88 100644 --- a/test/CodeGen/X86/2008-04-24-MemCpyBug.ll +++ b/test/CodeGen/X86/2008-04-24-MemCpyBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep 120 +; RUN: llc < %s -march=x86 | not grep 120 ; Don't accidentally add the offset twice for trailing bytes. %struct.S63 = type { [63 x i8] } diff --git a/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll b/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll index 838c2ea579873..4eaca17c88616 100644 --- a/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll +++ b/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mattr=+sse41 +; RUN: llc < %s -mattr=+sse41 ; rdar://5886601 ; gcc testsuite: gcc.target/i386/sse4_1-pblendw.c target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll index 82721a53b8b49..38d6aa6d172ac 100644 --- a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll +++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {1 \$2 3} +; RUN: llc < %s | grep {1 \$2 3} ; rdar://5720231 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/2008-04-28-CoalescerBug.ll b/test/CodeGen/X86/2008-04-28-CoalescerBug.ll index f93ad9ae7151f..5b97eb71cbfdf 100644 --- a/test/CodeGen/X86/2008-04-28-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-04-28-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl > %t +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl > %t ; RUN: not grep {r\[abcd\]x} %t ; RUN: not grep {r\[ds\]i} %t ; RUN: not grep {r\[bs\]p} %t diff --git a/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll b/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll index 6613fafcce825..6e8e98d865bd2 100644 --- a/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll +++ b/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i64 @t(i64 %maxIdleDuration) nounwind { call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind diff --git a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll index d7b5f25de6c9a..a708224dd0d99 100644 --- a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll +++ b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86 | grep jnp +; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp ; rdar://5902801 declare void @test2() diff --git a/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll index c0b196113137a..cea0076076d68 100644 --- a/test/CodeGen/X86/2008-05-09-PHIElimBug.ll +++ b/test/CodeGen/X86/2008-05-09-PHIElimBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll b/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll index 9bcd1f374dd64..5ceb5464d2b02 100644 --- a/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll +++ b/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define fastcc void @glgVectorFloatConversion() nounwind { %tmp12745 = load <4 x float>* null, align 16 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/2008-05-12-tailmerge-5.ll b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll index 8751328249d52..1f95a2409fe74 100644 --- a/test/CodeGen/X86/2008-05-12-tailmerge-5.ll +++ b/test/CodeGen/X86/2008-05-12-tailmerge-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep abort | count 1 +; RUN: llc < %s | grep abort | count 1 ; Calls to abort should all be merged ; ModuleID = '5898899.c' diff --git a/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/test/CodeGen/X86/2008-05-21-CoalescerBug.ll index 9ecd5814de4f7..9cf50f4bfc586 100644 --- a/test/CodeGen/X86/2008-05-21-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-05-21-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -O0 -fast-isel=false | grep mov | count 5 +; RUN: llc < %s -march=x86 -O0 -fast-isel=false | grep mov | count 5 ; PR2343 %llvm.dbg.anchor.type = type { i32, i32 } diff --git a/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll index c9e30d8f80a20..19a73543c65e6 100644 --- a/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll +++ b/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movups | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movups | count 2 define void @a(<4 x float>* %x) nounwind { entry: diff --git a/test/CodeGen/X86/2008-05-28-CoalescerBug.ll b/test/CodeGen/X86/2008-05-28-CoalescerBug.ll index 68f6ccea4ee66..32bf8d494165a 100644 --- a/test/CodeGen/X86/2008-05-28-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-05-28-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR2289 define void @_ada_ca11001() { diff --git a/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll b/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll index 02db2ed93cd29..f1a19ec147a89 100644 --- a/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll +++ b/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -regalloc=local +; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=local @_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x i32 (...)*] ; <[5 x i32 (...)*]*> [#uses=1] diff --git a/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll b/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll index d28276141689f..236b7cd6121f2 100644 --- a/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll +++ b/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24 %struct.argument_t = type { i8*, %struct.argument_t*, i32, %struct.ipc_type_t*, i32, void (...)*, void (...)*, void (...)*, void (...)*, void (...)*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, %struct.routine*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, i32, i32, i32, i32, i32, i32 } %struct.ipc_type_t = type { i8*, %struct.ipc_type_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, %struct.ipc_type_t*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* } diff --git a/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll index 0cde7cf269eaf..90af3870bd441 100644 --- a/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll +++ b/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep movsd -; RUN: llvm-as < %s | llc -march=x86 | grep movw -; RUN: llvm-as < %s | llc -march=x86 | grep addw +; RUN: llc < %s -march=x86 | not grep movsd +; RUN: llc < %s -march=x86 | grep movw +; RUN: llc < %s -march=x86 | grep addw ; These transforms are turned off for volatile loads and stores. ; Check that they weren't turned off for all loads and stores! diff --git a/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll index 2b64212dfb879..500cd1f08cfa9 100644 --- a/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll +++ b/test/CodeGen/X86/2008-06-13-VolatileLoadStore.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 5 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movl | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 5 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movl | count 2 @atomic = global double 0.000000e+00 ; <double*> [#uses=1] @atomic2 = global double 0.000000e+00 ; <double*> [#uses=1] diff --git a/test/CodeGen/X86/2008-06-16-SubregsBug.ll b/test/CodeGen/X86/2008-06-16-SubregsBug.ll index 75513b665a0b6..4d4819ab05d59 100644 --- a/test/CodeGen/X86/2008-06-16-SubregsBug.ll +++ b/test/CodeGen/X86/2008-06-16-SubregsBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 4 +; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 4 define i16 @test(i16* %tmp179) nounwind { %tmp180 = load i16* %tmp179, align 2 ; <i16> [#uses=2] diff --git a/test/CodeGen/X86/2008-06-18-BadShuffle.ll b/test/CodeGen/X86/2008-06-18-BadShuffle.ll index ba0a1f90ab923..66f9065799e58 100644 --- a/test/CodeGen/X86/2008-06-18-BadShuffle.ll +++ b/test/CodeGen/X86/2008-06-18-BadShuffle.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw +; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw ; Test to make sure we actually insert the bottom element of the vector define <8 x i16> @a(<8 x i16> %a) nounwind { diff --git a/test/CodeGen/X86/2008-06-25-VecISelBug.ll b/test/CodeGen/X86/2008-06-25-VecISelBug.ll index f369986fbcea0..72d190758f8d9 100644 --- a/test/CodeGen/X86/2008-06-25-VecISelBug.ll +++ b/test/CodeGen/X86/2008-06-25-VecISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep pslldq +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep pslldq define void @t() nounwind { entry: diff --git a/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll b/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll index 3586f87776a36..46341fc871038 100644 --- a/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll +++ b/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 +; RUN: llc < %s -mtriple=i386-apple-darwin9 %struct.ogg_stream_state = type { i8*, i32, i32, i32, i32*, i64*, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 } %struct.res_state = type { i32, i32, i32, i32, float*, float*, i32, i32 } diff --git a/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll b/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll index 5fb3e5780b94e..1a786ef7a90fd 100644 --- a/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll +++ b/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep ax +; RUN: llc < %s | grep ax ; PR2024 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/CodeGen/X86/2008-07-11-SHLBy1.ll b/test/CodeGen/X86/2008-07-11-SHLBy1.ll index 5b94a351cff9d..ff2b05fb08ebd 100644 --- a/test/CodeGen/X86/2008-07-11-SHLBy1.ll +++ b/test/CodeGen/X86/2008-07-11-SHLBy1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -o - | not grep shr +; RUN: llc < %s -march=x86-64 -o - | not grep shr define i128 @sl(i128 %x) { %t = shl i128 %x, 1 ret i128 %t diff --git a/test/CodeGen/X86/2008-07-11-SpillerBug.ll b/test/CodeGen/X86/2008-07-11-SpillerBug.ll index 1d94638865019..f75e605168ec7 100644 --- a/test/CodeGen/X86/2008-07-11-SpillerBug.ll +++ b/test/CodeGen/X86/2008-07-11-SpillerBug.ll @@ -1,7 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static -disable-fp-elim |\ -; RUN: %prcontext 65534 1 | grep movl | count 1 +; RUN: llc < %s -march=x86 -relocation-model=static -disable-fp-elim | FileCheck %s ; PR2536 + +; CHECK: movw %cx +; CHECK-NEXT: andl $65534, % +; CHECK-NEXT: movl % +; CHECK-NEXT: movl $17 + @g_5 = external global i16 ; <i16*> [#uses=2] @g_107 = external global i16 ; <i16*> [#uses=1] @g_229 = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll b/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll index aa9ee507f80c0..f56604b75bd71 100644 --- a/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll +++ b/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin +; RUN: llc < %s -mtriple=x86_64-apple-darwin %struct.SV = type { i8*, i64, i64 } @"\01LC25" = external constant [8 x i8] ; <[8 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll index ae30385e13e68..98919ee5221ab 100644 --- a/test/CodeGen/X86/2008-07-19-movups-spills.ll +++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 +; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 1 ; PR2539 external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] diff --git a/test/CodeGen/X86/2008-07-22-CombinerCrash.ll b/test/CodeGen/X86/2008-07-22-CombinerCrash.ll index a18564f4f979d..0f6714579bcce 100644 --- a/test/CodeGen/X86/2008-07-22-CombinerCrash.ll +++ b/test/CodeGen/X86/2008-07-22-CombinerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 ; PR2566 external global i16 ; <i16*>:0 [#uses=1] diff --git a/test/CodeGen/X86/2008-07-23-VSetCC.ll b/test/CodeGen/X86/2008-07-23-VSetCC.ll index da6c089c460fb..684ca5c89fd2e 100644 --- a/test/CodeGen/X86/2008-07-23-VSetCC.ll +++ b/test/CodeGen/X86/2008-07-23-VSetCC.ll @@ -1,11 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium +; RUN: llc < %s -march=x86 -mcpu=pentium ; PR2575 define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind { br i1 false, label %bb.nph, label %._crit_edge bb.nph: ; preds = %bb.nph, %0 - vicmp sgt <4 x i32> zeroinitializer, < i32 -128, i32 -128, i32 -128, i32 -128 > ; <<4 x i32>>:1 [#uses=1] + %X = icmp sgt <4 x i32> zeroinitializer, < i32 -128, i32 -128, i32 -128, i32 -128 > ; <<4 x i32>>:1 [#uses=1] + sext <4 x i1> %X to <4 x i32> extractelement <4 x i32> %1, i32 3 ; <i32>:2 [#uses=1] lshr i32 %2, 31 ; <i32>:3 [#uses=1] trunc i32 %3 to i1 ; <i1>:4 [#uses=1] @@ -27,4 +28,5 @@ bb.nph: ; preds = %bb.nph, %0 ret void } + declare float @fmaxf(float, float) diff --git a/test/CodeGen/X86/2008-08-05-SpillerBug.ll b/test/CodeGen/X86/2008-08-05-SpillerBug.ll index 2ebbe6ea52260..1d166f4881586 100644 --- a/test/CodeGen/X86/2008-08-05-SpillerBug.ll +++ b/test/CodeGen/X86/2008-08-05-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 56 +; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim -stats |& grep asm-printer | grep 59 ; PR2568 @g_3 = external global i16 ; <i16*> [#uses=1] diff --git a/test/CodeGen/X86/2008-08-06-RewriterBug.ll b/test/CodeGen/X86/2008-08-06-RewriterBug.ll index 9371c2a6383b0..4428035cc8277 100644 --- a/test/CodeGen/X86/2008-08-06-RewriterBug.ll +++ b/test/CodeGen/X86/2008-08-06-RewriterBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2596 @data = external global [400 x i64] ; <[400 x i64]*> [#uses=5] diff --git a/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll index b09211d9efe0a..32f6ca0ce086b 100644 --- a/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll +++ b/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movzbl +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movzbl define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind { entry: diff --git a/test/CodeGen/X86/2008-08-19-SubAndFetch.ll b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll index 00bcdf82e8ddd..8475e8d354e58 100644 --- a/test/CodeGen/X86/2008-08-19-SubAndFetch.ll +++ b/test/CodeGen/X86/2008-08-19-SubAndFetch.ll @@ -1,9 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep xadd +; RUN: llc < %s -march=x86-64 | FileCheck %s @var = external global i64 ; <i64*> [#uses=1] define i32 @main() nounwind { entry: +; CHECK: main: +; CHECK: lock +; CHECK: decq tail call i64 @llvm.atomic.load.sub.i64.p0i64( i64* @var, i64 1 ) ; <i64>:0 [#uses=0] unreachable } diff --git a/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll index 2c6828bbd0aa9..c76dd7de12560 100644 --- a/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll +++ b/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* } %struct.QBasicAtomic = type { i32 } diff --git a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll index 4e3533287dbce..eacb4a51c2154 100644 --- a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll +++ b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll @@ -1,7 +1,8 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movd | count 1 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq ; PR2677 + %struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] } define double @_Z7qstrtodPKcPS0_Pb(i8* %s00, i8** %se, i8* %ok) nounwind { diff --git a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll index f793b524e61fc..101b3c5cfdbbd 100644 --- a/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll +++ b/test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mcpu=core2 | grep pxor | count 2 -; RUN: llvm-as < %s | llc -mcpu=core2 | not grep movapd +; RUN: llc < %s -mcpu=core2 | grep pxor | count 2 +; RUN: llc < %s -mcpu=core2 | not grep movapd ; PR2715 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll index e22b647a13f0a..b92c789a30c72 100644 --- a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll +++ b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll @@ -1,6 +1,6 @@ ; Check that eh_return & unwind_init were properly lowered -; RUN: llvm-as < %s | llc | grep %ebp | count 9 -; RUN: llvm-as < %s | llc | grep %ecx | count 5 +; RUN: llc < %s | grep %ebp | count 7 +; RUN: llc < %s | grep %ecx | count 5 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i386-pc-linux" diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll index 7d01824400c8e..00ab73569c4bb 100644 --- a/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll +++ b/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll @@ -1,6 +1,6 @@ ; Check that eh_return & unwind_init were properly lowered -; RUN: llvm-as < %s | llc | grep %rbp | count 7 -; RUN: llvm-as < %s | llc | grep %rcx | count 3 +; RUN: llc < %s | grep %rbp | count 5 +; RUN: llc < %s | grep %rcx | count 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll index ffe10d439bc70..60be0d51e7e74 100644 --- a/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll +++ b/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvttpd2pi | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep cvtpi2pd | count 1 ; PR2687 define <2 x double> @a(<2 x i32> %x) nounwind { diff --git a/test/CodeGen/X86/2008-09-09-LinearScanBug.ll b/test/CodeGen/X86/2008-09-09-LinearScanBug.ll index 30a2b15c8dea4..b3312d9464d14 100644 --- a/test/CodeGen/X86/2008-09-09-LinearScanBug.ll +++ b/test/CodeGen/X86/2008-09-09-LinearScanBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin +; RUN: llc < %s -mtriple=i386-apple-darwin ; PR2757 @g_3 = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug.ll index 02dd04dc133c4..108f24307ea9c 100644 --- a/test/CodeGen/X86/2008-09-11-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-09-11-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2783 @g_15 = external global i16 ; <i16*> [#uses=2] diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll index 94033449114f5..534f990333727 100644 --- a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll +++ b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2748 @g_73 = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll index ed8d345aad3d0..74429c382e71e 100644 --- a/test/CodeGen/X86/2008-09-17-inline-asm-1.ll +++ b/test/CodeGen/X86/2008-09-17-inline-asm-1.ll @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep "movl %eax, %eax" -; RUN: llvm-as < %s | llc -march=x86 | not grep "movl %edx, %edx" -; RUN: llvm-as < %s | llc -march=x86 | not grep "movl (%eax), %eax" -; RUN: llvm-as < %s | llc -march=x86 | not grep "movl (%edx), %edx" -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl %eax, %eax" -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl %edx, %edx" -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl (%eax), %eax" -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | not grep "movl (%edx), %edx" +; RUN: llc < %s -march=x86 | not grep "movl %eax, %eax" +; RUN: llc < %s -march=x86 | not grep "movl %edx, %edx" +; RUN: llc < %s -march=x86 | not grep "movl (%eax), %eax" +; RUN: llc < %s -march=x86 | not grep "movl (%edx), %edx" +; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %eax, %eax" +; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl %edx, %edx" +; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%eax), %eax" +; RUN: llc < %s -march=x86 -regalloc=local | not grep "movl (%edx), %edx" ; %0 must not be put in EAX or EDX. ; In the first asm, $0 and $2 must not be put in EAX. diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index 62e3233f9b3a0..f5bd307139d60 100644 --- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "#%ebp %edi %esi 8(%edx) %eax (%ebx)" -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep "#%edi %edx %ebp 8(%ebx) %eax (%esi)" +; RUN: llc < %s -march=x86 | grep "#%ebp %edi %esi 8(%edx) %eax (%ebx)" +; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %edx %ebp 8(%ebx) %eax (%esi)" ; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th ; operand. There are many combinations that work; this is what llc puts out now. diff --git a/test/CodeGen/X86/2008-09-19-RegAllocBug.ll b/test/CodeGen/X86/2008-09-19-RegAllocBug.ll index 47feb83c92725..a8f2912a70af4 100644 --- a/test/CodeGen/X86/2008-09-19-RegAllocBug.ll +++ b/test/CodeGen/X86/2008-09-19-RegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin +; RUN: llc < %s -mtriple=i386-apple-darwin ; PR2808 @g_3 = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2008-09-25-sseregparm-1.ll b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll index d103f144e284f..c92a8f4635713 100644 --- a/test/CodeGen/X86/2008-09-25-sseregparm-1.ll +++ b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movs | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep fld | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2 ; check 'inreg' attribute for sse_regparm define double @foo1() inreg nounwind { diff --git a/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll b/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll index b1f5ab5907176..f1ada28bcfcb1 100644 --- a/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll +++ b/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 +; RUN: llc < %s -mtriple=i386-apple-darwin9 %struct._Unwind_Context = type { [18 x i8*], i8*, i8*, i8*, %struct.dwarf_eh_bases, i32, i32, i32, [18 x i8] } %struct._Unwind_Exception = type { i64, void (i32, %struct._Unwind_Exception*)*, i32, i32, [3 x i32] } diff --git a/test/CodeGen/X86/2008-09-29-ReMatBug.ll b/test/CodeGen/X86/2008-09-29-ReMatBug.ll index d4da01a508fd6..c36cf39fb3418 100644 --- a/test/CodeGen/X86/2008-09-29-ReMatBug.ll +++ b/test/CodeGen/X86/2008-09-29-ReMatBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim %struct..0objc_selector = type opaque %struct.NSString = type opaque diff --git a/test/CodeGen/X86/2008-09-29-VolatileBug.ll b/test/CodeGen/X86/2008-09-29-VolatileBug.ll index 4f6eb59773fb0..935c4c55f046d 100644 --- a/test/CodeGen/X86/2008-09-29-VolatileBug.ll +++ b/test/CodeGen/X86/2008-09-29-VolatileBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep movz +; RUN: llc < %s -march=x86 | not grep movz ; PR2835 @g_407 = internal global i32 0 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/2008-10-02-Atomics32-2.ll b/test/CodeGen/X86/2008-10-02-Atomics32-2.ll index e74280cd3a178..b48c4adaa26cd 100644 --- a/test/CodeGen/X86/2008-10-02-Atomics32-2.ll +++ b/test/CodeGen/X86/2008-10-02-Atomics32-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ;; This version includes 64-bit version of binary operators (in 32-bit mode). ;; Swap, cmp-and-swap not supported yet in this mode. ; ModuleID = 'Atomics.c' diff --git a/test/CodeGen/X86/2008-10-06-MMXISelBug.ll b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll index bd1ad59797aba..7f7b1a436d24a 100644 --- a/test/CodeGen/X86/2008-10-06-MMXISelBug.ll +++ b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2 +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 ; PR2850 @tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2] diff --git a/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll b/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll index 837aad5304075..a135cd4978761 100644 --- a/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll +++ b/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll @@ -1,7 +1,7 @@ ; ModuleID = 'nan.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl ; This NaN should be shortened to a double (not a float). declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f) diff --git a/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll b/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll index d2e9b457517e3..bd48105f129ae 100644 --- a/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll +++ b/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll @@ -1,7 +1,7 @@ ; ModuleID = 'nan.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3 +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3 ; it is not safe to shorten any of these NaNs. declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f) diff --git a/test/CodeGen/X86/2008-10-07-SSEISelBug.ll b/test/CodeGen/X86/2008-10-07-SSEISelBug.ll index 48089861bc321..bc5761288c9b5 100644 --- a/test/CodeGen/X86/2008-10-07-SSEISelBug.ll +++ b/test/CodeGen/X86/2008-10-07-SSEISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 +; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 define <4 x float> @f(float %w) nounwind { entry: diff --git a/test/CodeGen/X86/2008-10-11-CallCrash.ll b/test/CodeGen/X86/2008-10-11-CallCrash.ll index 979b7875fec67..efc6125cfc2d7 100644 --- a/test/CodeGen/X86/2008-10-11-CallCrash.ll +++ b/test/CodeGen/X86/2008-10-11-CallCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2735 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" diff --git a/test/CodeGen/X86/2008-10-13-CoalescerBug.ll b/test/CodeGen/X86/2008-10-13-CoalescerBug.ll index 608372e5a8905..4d3f8c2071b5b 100644 --- a/test/CodeGen/X86/2008-10-13-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-10-13-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2775 define i32 @func_77(i8 zeroext %p_79) nounwind { diff --git a/test/CodeGen/X86/2008-10-16-SpillerBug.ll b/test/CodeGen/X86/2008-10-16-SpillerBug.ll index 4318f1d28c72b..b8ca364d1798d 100644 --- a/test/CodeGen/X86/2008-10-16-SpillerBug.ll +++ b/test/CodeGen/X86/2008-10-16-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edx} +; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*edi} %struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 } %struct.XXDAlphaTest = type { float, i16, i8, i8 } diff --git a/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll b/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll index e1dc7b6bb27c1..de4c1e70b8d85 100644 --- a/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll +++ b/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 ; PR2762 define void @foo(<4 x i32>* %p, <4 x double>* %q) { %n = load <4 x i32>* %p diff --git a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll index eb2ec3760b9e5..b2e6061ff91cb 100644 --- a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll +++ b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 define void @test(i64 %x) nounwind { entry: diff --git a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll index 33e8c49277f47..353d1c75216b3 100644 --- a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll +++ b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 ; from gcc.c-torture/compile/920520-1.c diff --git a/test/CodeGen/X86/2008-10-24-FlippedCompare.ll b/test/CodeGen/X86/2008-10-24-FlippedCompare.ll index d6ae05e3798e3..421b931ecd5a2 100644 --- a/test/CodeGen/X86/2008-10-24-FlippedCompare.ll +++ b/test/CodeGen/X86/2008-10-24-FlippedCompare.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp} +; RUN: llc < %s -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp} define void @f(float %wt) { entry: diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll index ad13b8528372b..afeb358da5725 100644 --- a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills} +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep {Number of register spills} define fastcc void @fourn(double* %data, i32 %isign) nounwind { entry: diff --git a/test/CodeGen/X86/2008-10-27-StackRealignment.ll b/test/CodeGen/X86/2008-10-27-StackRealignment.ll index d8b0e706d2ab4..784bc72f42e90 100644 --- a/test/CodeGen/X86/2008-10-27-StackRealignment.ll +++ b/test/CodeGen/X86/2008-10-27-StackRealignment.ll @@ -2,8 +2,8 @@ ; Until it does, we shouldn't use movaps to access the stack. On targets with ; sufficiently aligned stack (e.g. darwin) we should. -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2 +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mcpu=yonah | not grep movaps +; RUN: llc < %s -mtriple=i686-apple-darwin9 -mcpu=yonah | grep movaps | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll b/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll index 41776b2a38e9b..7ad94f149e1fd 100644 --- a/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll +++ b/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2977 define i8* @ap_php_conv_p2(){ entry: diff --git a/test/CodeGen/X86/2008-11-03-F80VAARG.ll b/test/CodeGen/X86/2008-11-03-F80VAARG.ll index 36a054a3e6f8e..507799b7304fb 100644 --- a/test/CodeGen/X86/2008-11-03-F80VAARG.ll +++ b/test/CodeGen/X86/2008-11-03-F80VAARG.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -o - | not grep 10 +; RUN: llc < %s -march=x86 -o - | not grep 10 declare void @llvm.va_start(i8*) nounwind diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll index 7acc7cad3cfdf..f8f317c2dd46e 100644 --- a/test/CodeGen/X86/2008-11-06-testb.ll +++ b/test/CodeGen/X86/2008-11-06-testb.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep testb +; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2008-11-13-inlineasm-3.ll b/test/CodeGen/X86/2008-11-13-inlineasm-3.ll index 7487548e820b8..1dc97fc52a46d 100644 --- a/test/CodeGen/X86/2008-11-13-inlineasm-3.ll +++ b/test/CodeGen/X86/2008-11-13-inlineasm-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu +; RUN: llc < %s -mtriple=i686-pc-linux-gnu ; PR 1779 ; Using 'A' constraint and a tied constraint together used to crash. ; ModuleID = '<stdin>' diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll index fe1870e1d84c5..2e114ab5ae885 100644 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll +++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551 | count 1 -; ModuleID = '<stdin>' +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll index faf7cd4b22040..7c811afa51d3e 100644 --- a/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll +++ b/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551 -; ModuleID = '<stdin>' +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-11-29-ULT-Sign.ll b/test/CodeGen/X86/2008-11-29-ULT-Sign.ll index 6c26b6818e4f8..6dca141639e4a 100644 --- a/test/CodeGen/X86/2008-11-29-ULT-Sign.ll +++ b/test/CodeGen/X86/2008-11-29-ULT-Sign.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep "jns" | count 1 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep "jns" | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-12-01-SpillerAssert.ll b/test/CodeGen/X86/2008-12-01-SpillerAssert.ll index 81b25da8a8dea..d96d806388c9a 100644 --- a/test/CodeGen/X86/2008-12-01-SpillerAssert.ll +++ b/test/CodeGen/X86/2008-12-01-SpillerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR3124 %struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, i8, i8, i8, i32, i32, [9 x i32], [16 x i8], [64 x i8], i32, i32, i32, i64, %struct.cpumask_t, i16, i16, i16, i16, i16, i16, i16, i16, i32 } diff --git a/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll b/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll index ca5a80ccd82b5..1f8bd45da14d5 100644 --- a/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll +++ b/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep lea +; RUN: llc < %s -mtriple=i386-apple-darwin | not grep lea ; The inner loop should use [reg] addressing, not [reg+reg] addressing. ; rdar://6403965 diff --git a/test/CodeGen/X86/2008-12-02-IllegalResultType.ll b/test/CodeGen/X86/2008-12-02-IllegalResultType.ll index 01e0f7eb81de2..4b72cb919ffa3 100644 --- a/test/CodeGen/X86/2008-12-02-IllegalResultType.ll +++ b/test/CodeGen/X86/2008-12-02-IllegalResultType.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR3117 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-1.ll b/test/CodeGen/X86/2008-12-02-dagcombine-1.ll index 48bb4e438328a..fe5bff3e3459b 100644 --- a/test/CodeGen/X86/2008-12-02-dagcombine-1.ll +++ b/test/CodeGen/X86/2008-12-02-dagcombine-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-2.ll b/test/CodeGen/X86/2008-12-02-dagcombine-2.ll index ba7dfbbcecc1c..4cb1b42693b97 100644 --- a/test/CodeGen/X86/2008-12-02-dagcombine-2.ll +++ b/test/CodeGen/X86/2008-12-02-dagcombine-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/test/CodeGen/X86/2008-12-02-dagcombine-3.ll b/test/CodeGen/X86/2008-12-02-dagcombine-3.ll index 5fb639d5fc33c..d5a676a7dbba6 100644 --- a/test/CodeGen/X86/2008-12-02-dagcombine-3.ll +++ b/test/CodeGen/X86/2008-12-02-dagcombine-3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep add | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep sub | grep -v subsections | count 1 +; RUN: llc < %s -march=x86 | grep add | count 2 +; RUN: llc < %s -march=x86 | grep sub | grep -v subsections | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; this should be rearranged to have two +s and one - diff --git a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll index b6b5cbda4bd1c..7fd2e6f2948f6 100644 --- a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll +++ b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic +; RUN: llc < %s -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic %struct.XXActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 } %struct.XXAlphaTest = type { float, i16, i8, i8 } diff --git a/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll new file mode 100644 index 0000000000000..e97b63db14d97 --- /dev/null +++ b/test/CodeGen/X86/2008-12-12-PrivateEHSymbol.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu | grep ^.L_Z1fv.eh +; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu | grep ^.L_Z1fv.eh +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin9 | grep ^__Z1fv.eh +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 | grep ^__Z1fv.eh + +define void @_Z1fv() { +entry: + br label %return + +return: + ret void +} diff --git a/test/CodeGen/X86/2008-12-16-BadShift.ll b/test/CodeGen/X86/2008-12-16-BadShift.ll index 46b70188c8fef..6c70c5ba53227 100644 --- a/test/CodeGen/X86/2008-12-16-BadShift.ll +++ b/test/CodeGen/X86/2008-12-16-BadShift.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | not grep shrl +; RUN: llc < %s | not grep shrl ; Note: this test is really trying to make sure that the shift ; returns the right result; shrl is most likely wrong, ; but if CodeGen starts legitimately using an shrl here, diff --git a/test/CodeGen/X86/2008-12-16-dagcombine-4.ll b/test/CodeGen/X86/2008-12-16-dagcombine-4.ll index 193d290e33ffc..3080d08557274 100644 --- a/test/CodeGen/X86/2008-12-16-dagcombine-4.ll +++ b/test/CodeGen/X86/2008-12-16-dagcombine-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll b/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll index c7fdfb269207d..13a9080c1401f 100644 --- a/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll +++ b/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll @@ -1,7 +1,12 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | %prcontext End 2 | grep mov +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s ; PR3149 ; Make sure the copy after inline asm is not coalesced away. +; CHECK: ## InlineAsm End +; CHECK-NEXT: BB1_2: +; CHECK-NEXT: movl %esi, %eax + + @"\01LC" = internal constant [7 x i8] c"n0=%d\0A\00" ; <[7 x i8]*> [#uses=1] @llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 (i64, i64)* @umoddi3 to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] diff --git a/test/CodeGen/X86/2008-12-22-dagcombine-5.ll b/test/CodeGen/X86/2008-12-22-dagcombine-5.ll index 24be521842f0b..75773e0959c27 100644 --- a/test/CodeGen/X86/2008-12-22-dagcombine-5.ll +++ b/test/CodeGen/X86/2008-12-22-dagcombine-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; -(-a) - a should be found and removed, leaving refs to only L and P diff --git a/test/CodeGen/X86/2008-12-23-crazy-address.ll b/test/CodeGen/X86/2008-12-23-crazy-address.ll index e53a91ec3a119..2edcaea80ce70 100644 --- a/test/CodeGen/X86/2008-12-23-crazy-address.ll +++ b/test/CodeGen/X86/2008-12-23-crazy-address.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | grep {lea.*X.*esp} | count 2 +; RUN: llc < %s -march=x86 -relocation-model=static | grep {lea.*X.*esp} | count 2 @X = external global [0 x i32] diff --git a/test/CodeGen/X86/2008-12-23-dagcombine-6.ll b/test/CodeGen/X86/2008-12-23-dagcombine-6.ll index 13cb9db8eeb8c..bae928336baaa 100644 --- a/test/CodeGen/X86/2008-12-23-dagcombine-6.ll +++ b/test/CodeGen/X86/2008-12-23-dagcombine-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "(%esp)" | count 4 +; RUN: llc < %s -march=x86 | grep "(%esp)" | count 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/test/CodeGen/X86/2009-01-12-CoalescerBug.ll b/test/CodeGen/X86/2009-01-12-CoalescerBug.ll index 7c800d4e287c3..27a7113ffd56c 100644 --- a/test/CodeGen/X86/2009-01-12-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-01-12-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu | grep movq | count 2 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | grep movq | count 2 ; PR3311 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll index ecf71f64cf999..9c71469b5b202 100644 --- a/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll +++ b/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx -enable-legalize-types-checking declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone diff --git a/test/CodeGen/X86/2009-01-16-SchedulerBug.ll b/test/CodeGen/X86/2009-01-16-SchedulerBug.ll index ff20dc1e30049..99bef6ce3fc9d 100644 --- a/test/CodeGen/X86/2009-01-16-SchedulerBug.ll +++ b/test/CodeGen/X86/2009-01-16-SchedulerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin +; RUN: llc < %s -mtriple=i386-apple-darwin ; rdar://6501631 %CF = type { %Register } diff --git a/test/CodeGen/X86/2009-01-16-UIntToFP.ll b/test/CodeGen/X86/2009-01-16-UIntToFP.ll index 340608af35a8b..2eab5f1773ac4 100644 --- a/test/CodeGen/X86/2009-01-16-UIntToFP.ll +++ b/test/CodeGen/X86/2009-01-16-UIntToFP.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll b/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll index 8857df38926d7..f895336491e22 100644 --- a/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll +++ b/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; rdar://6505632 ; reduced from 483.xalancbmk diff --git a/test/CodeGen/X86/2009-01-25-NoSSE.ll b/test/CodeGen/X86/2009-01-25-NoSSE.ll index b12e4137dbd5b..0583ef1909197 100644 --- a/test/CodeGen/X86/2009-01-25-NoSSE.ll +++ b/test/CodeGen/X86/2009-01-25-NoSSE.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=-sse,-sse2 | not grep xmm +; RUN: llc < %s -march=x86-64 -mattr=-sse,-sse2 | not grep xmm ; PR3402 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-01-26-WrongCheck.ll b/test/CodeGen/X86/2009-01-26-WrongCheck.ll index db9dbb67def4a..117ff47657f4c 100644 --- a/test/CodeGen/X86/2009-01-26-WrongCheck.ll +++ b/test/CodeGen/X86/2009-01-26-WrongCheck.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -enable-legalize-types-checking +; RUN: llc < %s -march=x86 -enable-legalize-types-checking ; PR3393 define void @foo(i32 inreg %x) { diff --git a/test/CodeGen/X86/2009-01-27-NullStrings.ll b/test/CodeGen/X86/2009-01-27-NullStrings.ll index b0c27d8903e75..8684f4a19ca42 100644 --- a/test/CodeGen/X86/2009-01-27-NullStrings.ll +++ b/test/CodeGen/X86/2009-01-27-NullStrings.ll @@ -1,38 +1,7 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep {\\.cstring} | count 1 - %struct.A = type { } - %struct.NSString = type opaque - %struct.__builtin_CFString = type { i32*, i32, i8*, i32 } - %struct._objc_module = type { i32, i32, i8*, %struct._objc_symtab* } - %struct._objc_symtab = type { i32, %struct.objc_selector**, i16, i16 } - %struct.objc_object = type opaque - %struct.objc_selector = type opaque -@"\01L_unnamed_cfstring_0" = internal constant %struct.__builtin_CFString { i32* getelementptr ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr ([1 x i8]* @"\01LC", i32 0, i32 0), i32 0 }, section "__DATA, __cfstring" ; <%struct.__builtin_CFString*> [#uses=1] -@__CFConstantStringClassReference = external global [0 x i32] ; <[0 x i32]*> [#uses=1] -@"\01LC" = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] -@"\01L_OBJC_SELECTOR_REFERENCES_0" = internal global %struct.objc_selector* bitcast ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_0" to %struct.objc_selector*), section "__OBJC,__message_refs,literal_pointers,no_dead_strip", align 4 ; <%struct.objc_selector**> [#uses=2] -@"\01L_OBJC_SYMBOLS" = internal global %struct._objc_symtab zeroinitializer, section "__OBJC,__symbols,regular,no_dead_strip", align 4 ; <%struct._objc_symtab*> [#uses=2] -@"\01L_OBJC_METH_VAR_NAME_0" = internal global [6 x i8] c"bork:\00", section "__TEXT,__cstring,cstring_literals", align 1 ; <[6 x i8]*> [#uses=2] -@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] zeroinitializer, section "__OBJC, __image_info,regular" ; <[2 x i32]*> [#uses=1] -@"\01L_OBJC_CLASS_NAME_0" = internal global [1 x i8] zeroinitializer, section "__TEXT,__cstring,cstring_literals", align 1 ; <[1 x i8]*> [#uses=1] -@"\01L_OBJC_MODULES" = internal global %struct._objc_module { i32 7, i32 16, i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), %struct._objc_symtab* @"\01L_OBJC_SYMBOLS" }, section "__OBJC,__module_info,regular,no_dead_strip", align 4 ; <%struct._objc_module*> [#uses=1] -@llvm.used = appending global [6 x i8*] [ i8* bitcast (%struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0" to i8*), i8* bitcast (%struct._objc_symtab* @"\01L_OBJC_SYMBOLS" to i8*), i8* getelementptr ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_0", i32 0, i32 0), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*), i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i8* bitcast (%struct._objc_module* @"\01L_OBJC_MODULES" to i8*) ], section "llvm.metadata" ; <[6 x i8*]*> [#uses=0] +; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s +; CHECK: .section __TEXT,__cstring,cstring_literals -define void @func(%struct.A* %a) nounwind { -entry: - %a_addr = alloca %struct.A* ; <%struct.A**> [#uses=2] - %a.0 = alloca %struct.objc_object* ; <%struct.objc_object**> [#uses=2] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - store %struct.A* %a, %struct.A** %a_addr - %0 = load %struct.A** %a_addr, align 4 ; <%struct.A*> [#uses=1] - %1 = bitcast %struct.A* %0 to %struct.objc_object* ; <%struct.objc_object*> [#uses=1] - store %struct.objc_object* %1, %struct.objc_object** %a.0, align 4 - %2 = load %struct.objc_selector** @"\01L_OBJC_SELECTOR_REFERENCES_0", align 4 ; <%struct.objc_selector*> [#uses=1] - %3 = load %struct.objc_object** %a.0, align 4 ; <%struct.objc_object*> [#uses=1] - call void bitcast (%struct.objc_object* (%struct.objc_object*, %struct.objc_selector*, ...)* @objc_msgSend to void (%struct.objc_object*, %struct.objc_selector*, %struct.NSString*)*)(%struct.objc_object* %3, %struct.objc_selector* %2, %struct.NSString* bitcast (%struct.__builtin_CFString* @"\01L_unnamed_cfstring_0" to %struct.NSString*)) nounwind - br label %return +@x = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1] -return: ; preds = %entry - ret void -} +@y = global [1 x i8]* @x -declare %struct.objc_object* @objc_msgSend(%struct.objc_object*, %struct.objc_selector*, ...) diff --git a/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll b/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll index b7f37c9d3102f..ce3ea828ec0c5 100644 --- a/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll +++ b/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim +; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=local -disable-fp-elim ; rdar://6538384 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/test/CodeGen/X86/2009-01-31-BigShift.ll b/test/CodeGen/X86/2009-01-31-BigShift.ll index 360b4f0e46bfe..4eb0ec1485b75 100644 --- a/test/CodeGen/X86/2009-01-31-BigShift.ll +++ b/test/CodeGen/X86/2009-01-31-BigShift.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and +; RUN: llc < %s -march=x86 | not grep and ; PR3401 define void @x(i288 %i) nounwind { diff --git a/test/CodeGen/X86/2009-01-31-BigShift2.ll b/test/CodeGen/X86/2009-01-31-BigShift2.ll index 2b5b189578300..9d240844afba1 100644 --- a/test/CodeGen/X86/2009-01-31-BigShift2.ll +++ b/test/CodeGen/X86/2009-01-31-BigShift2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {mov.*56} +; RUN: llc < %s -march=x86 | grep {mov.*56} ; PR3449 define void @test(<8 x double>* %P, i64* %Q) nounwind { diff --git a/test/CodeGen/X86/2009-01-31-BigShift3.ll b/test/CodeGen/X86/2009-01-31-BigShift3.ll index c92c86a092a10..1b531e370437b 100644 --- a/test/CodeGen/X86/2009-01-31-BigShift3.ll +++ b/test/CodeGen/X86/2009-01-31-BigShift3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3450 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-02-01-LargeMask.ll b/test/CodeGen/X86/2009-02-01-LargeMask.ll index f2a964f208ce1..c4042e6c9c682 100644 --- a/test/CodeGen/X86/2009-02-01-LargeMask.ll +++ b/test/CodeGen/X86/2009-02-01-LargeMask.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3453 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll b/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll index 5f97ee7a70cd1..e75af13a600b8 100644 --- a/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll +++ b/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3411 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll b/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll index 1f29bdbe37eb7..6ba046a80c228 100644 --- a/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll +++ b/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep { - 92} +; RUN: llc < %s | grep { - 92} ; PR3481 ; The offset should print as -92, not +17179869092 diff --git a/test/CodeGen/X86/2009-02-05-CoalescerBug.ll b/test/CodeGen/X86/2009-02-05-CoalescerBug.ll index 39cad73d4c093..0ffa8fdc30dd7 100644 --- a/test/CodeGen/X86/2009-02-05-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-02-05-CoalescerBug.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movss | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movaps | count 4 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movaps | count 4 define i1 @t([2 x float]* %y, [2 x float]* %w, i32, [2 x float]* %x.pn59, i32 %smax190, i32 %j.1180, <4 x float> %wu.2179, <4 x float> %wr.2178, <4 x float>* %tmp89.out, <4 x float>* %tmp107.out, i32* %indvar.next218.out) nounwind { newFuncRoot: diff --git a/test/CodeGen/X86/2009-02-07-CoalescerBug.ll b/test/CodeGen/X86/2009-02-07-CoalescerBug.ll index 784c97a226194..2d0bbe607279f 100644 --- a/test/CodeGen/X86/2009-02-07-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-02-07-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1 +; RUN: llc < %s -march=x86 -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1 ; rdar://6566708 target triple = "i386-apple-darwin9.6" diff --git a/test/CodeGen/X86/2009-02-08-CoalescerBug.ll b/test/CodeGen/X86/2009-02-08-CoalescerBug.ll index cd30c1e7e40e0..908cc08991d89 100644 --- a/test/CodeGen/X86/2009-02-08-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-02-08-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3486 define i32 @foo(i8 signext %p_26) nounwind { diff --git a/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll b/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll index 7b73a86a72ec6..1284b0d1b7b20 100644 --- a/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll +++ b/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR3537 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.6" diff --git a/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll index b0c4449610ac5..72c7ee93a9d25 100644 --- a/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll +++ b/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s +; RUN: llc < %s -march=x86-64 ; PR3538 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9" diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll index ddd15f7c81e8b..2e148ad6b18cc 100644 --- a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll +++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {\$-81920} | count 3 -; RUN: llvm-as < %s | llc -march=x86 | grep {\$4294885376} | count 1 +; RUN: llc < %s -march=x86 | grep {\$-81920} | count 3 +; RUN: llc < %s -march=x86 | grep {\$4294885376} | count 1 ; ModuleID = 'shant.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/test/CodeGen/X86/2009-02-12-SpillerBug.ll index 1d10319e86d94..4f8a5e7b3e30f 100644 --- a/test/CodeGen/X86/2009-02-12-SpillerBug.ll +++ b/test/CodeGen/X86/2009-02-12-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin8 +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 ; PR3561 define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind { diff --git a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll index 54fcd430e98c0..58a7f9fb75936 100644 --- a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll +++ b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split +; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split define i32 @main() nounwind { bb4.i.thread: diff --git a/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll b/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll index a6bb7b8615fd1..b3dd13c50f927 100644 --- a/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll +++ b/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep weak | count 3 +; RUN: llc < %s | grep weak | count 3 ; PR3629 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll index 3dbfa80e00e62..7ea699833ba86 100644 --- a/test/CodeGen/X86/2009-02-25-CommuteBug.ll +++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& not grep commuted +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& not grep commuted ; rdar://6608609 define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone { diff --git a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index 8bf6c23d59db3..cb1b1efae3e2a 100644 --- a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse3 -stats |& not grep {machine-licm} +; RUN: llc < %s -march=x86-64 -mattr=+sse3 -stats |& not grep {machine-licm} ; rdar://6627786 target triple = "x86_64-apple-darwin10.0" diff --git a/test/CodeGen/X86/2009-03-03-BTHang.ll b/test/CodeGen/X86/2009-03-03-BTHang.ll index 0f338d8eadffd..bb95925774357 100644 --- a/test/CodeGen/X86/2009-03-03-BTHang.ll +++ b/test/CodeGen/X86/2009-03-03-BTHang.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; rdar://6642541 %struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer } diff --git a/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll index 6f16ced1c674d..9deecebe94535 100644 --- a/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll +++ b/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3686 ; rdar://6661799 diff --git a/test/CodeGen/X86/2009-03-05-burr-list-crash.ll b/test/CodeGen/X86/2009-03-05-burr-list-crash.ll index ccedaae9322db..411a0c92830af 100644 --- a/test/CodeGen/X86/2009-03-05-burr-list-crash.ll +++ b/test/CodeGen/X86/2009-03-05-burr-list-crash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2009-03-07-FPConstSelect.ll b/test/CodeGen/X86/2009-03-07-FPConstSelect.ll index 28302c0f7b0be..39caddcf9342f 100644 --- a/test/CodeGen/X86/2009-03-07-FPConstSelect.ll +++ b/test/CodeGen/X86/2009-03-07-FPConstSelect.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep xmm +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm ; This should do a single load into the fp stack for the return, not diddle with xmm registers. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-03-09-APIntCrash.ll b/test/CodeGen/X86/2009-03-09-APIntCrash.ll index d7b5269eaeb90..896c9686cc4e3 100644 --- a/test/CodeGen/X86/2009-03-09-APIntCrash.ll +++ b/test/CodeGen/X86/2009-03-09-APIntCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 ; PR3763 %struct.__block_descriptor = type { i64, i64 } diff --git a/test/CodeGen/X86/2009-03-09-SpillerBug.ll b/test/CodeGen/X86/2009-03-09-SpillerBug.ll index 2ccd7714233e9..4224210e58f01 100644 --- a/test/CodeGen/X86/2009-03-09-SpillerBug.ll +++ b/test/CodeGen/X86/2009-03-09-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu +; RUN: llc < %s -mtriple=i386-pc-linux-gnu ; PR3706 define void @__mulxc3(x86_fp80 %b) nounwind { diff --git a/test/CodeGen/X86/2009-03-10-CoalescerBug.ll b/test/CodeGen/X86/2009-03-10-CoalescerBug.ll index 3d979e9d73975..90dff8878a784 100644 --- a/test/CodeGen/X86/2009-03-10-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-03-10-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin +; RUN: llc < %s -mtriple=x86_64-apple-darwin ; rdar://r6661945 %struct.WINDOW = type { i16, i16, i16, i16, i16, i16, i16, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.ldat*, i16, i16, i32, i32, %struct.WINDOW*, %struct.pdat, i16, %struct.cchar_t } diff --git a/test/CodeGen/X86/2009-03-11-CoalescerBug.ll b/test/CodeGen/X86/2009-03-11-CoalescerBug.ll index 1f5631764b57b..d5ba93e10495f 100644 --- a/test/CodeGen/X86/2009-03-11-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-03-11-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting +; RUN: llc < %s -mtriple=i386-apple-darwin9 -stats |& grep regcoalescing | grep commuting @lookupTable5B = external global [64 x i32], align 32 ; <[64 x i32]*> [#uses=1] @lookupTable3B = external global [16 x i32], align 32 ; <[16 x i32]*> [#uses=1] diff --git a/test/CodeGen/X86/2009-03-12-CPAlignBug.ll b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll index ec060e4ef4a58..3564f01a7c433 100644 --- a/test/CodeGen/X86/2009-03-12-CPAlignBug.ll +++ b/test/CodeGen/X86/2009-03-12-CPAlignBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 | not grep {.space} +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | not grep {.space} ; rdar://6668548 declare double @llvm.sqrt.f64(double) nounwind readonly diff --git a/test/CodeGen/X86/2009-03-13-PHIElimBug.ll b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll index b01556de4828f..878fa51d5dc31 100644 --- a/test/CodeGen/X86/2009-03-13-PHIElimBug.ll +++ b/test/CodeGen/X86/2009-03-13-PHIElimBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep -A 2 {call.*f} | grep movl +; RUN: llc < %s -march=x86 | grep -A 2 {call.*f} | grep movl ; Check the register copy comes after the call to f and before the call to g ; PR3784 diff --git a/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll index 091aab41d291e..adbd241cd98fa 100644 --- a/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll +++ b/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel +; RUN: llc < %s -march=x86 -asm-verbose | grep -A 1 lpad | grep Llabel ; Check that register copies in the landing pad come after the EH_LABEL declare i32 @f() diff --git a/test/CodeGen/X86/2009-03-16-SpillerBug.ll b/test/CodeGen/X86/2009-03-16-SpillerBug.ll index 09782a26fec98..80e7639e7c295 100644 --- a/test/CodeGen/X86/2009-03-16-SpillerBug.ll +++ b/test/CodeGen/X86/2009-03-16-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded} +; RUN: llc < %s -mtriple=i386-apple-darwin -stats |& grep virtregrewriter | not grep {stores unfolded} ; rdar://6682365 ; Do not clobber a register if another spill slot is available in it and it's marked "do not clobber". diff --git a/test/CodeGen/X86/2009-03-23-LinearScanBug.ll b/test/CodeGen/X86/2009-03-23-LinearScanBug.ll index b5298aee30654..06dfdc0c767f4 100644 --- a/test/CodeGen/X86/2009-03-23-LinearScanBug.ll +++ b/test/CodeGen/X86/2009-03-23-LinearScanBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -O0 +; RUN: llc < %s -mtriple=i386-apple-darwin -O0 define fastcc void @optimize_bit_field() nounwind { bb4: diff --git a/test/CodeGen/X86/2009-03-23-MultiUseSched.ll b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll index b30d41eb05ba2..b5873bae5f05f 100644 --- a/test/CodeGen/X86/2009-03-23-MultiUseSched.ll +++ b/test/CodeGen/X86/2009-03-23-MultiUseSched.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static -stats -info-output-file - > %t +; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static -stats -info-output-file - > %t ; RUN: not grep spill %t ; RUN: not grep {%rsp} %t ; RUN: not grep {%rbp} %t diff --git a/test/CodeGen/X86/2009-03-23-i80-fp80.ll b/test/CodeGen/X86/2009-03-23-i80-fp80.ll index 0619e12039681..e542325b63697 100644 --- a/test/CodeGen/X86/2009-03-23-i80-fp80.ll +++ b/test/CodeGen/X86/2009-03-23-i80-fp80.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep 302245289961712575840256 -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep K40018000000000000000 +; RUN: opt < %s -instcombine -S | grep 302245289961712575840256 +; RUN: opt < %s -instcombine -S | grep K40018000000000000000 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2009-03-25-TestBug.ll b/test/CodeGen/X86/2009-03-25-TestBug.ll index 2c330db713e80..f40fddc5a36d0 100644 --- a/test/CodeGen/X86/2009-03-25-TestBug.ll +++ b/test/CodeGen/X86/2009-03-25-TestBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -o %t -f +; RUN: llc < %s -march=x86 -o %t ; RUN: not grep and %t ; RUN: not grep shr %t ; rdar://6661955 diff --git a/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll b/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll index 0e31942e468df..f4864793ba2f3 100644 --- a/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll +++ b/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -no-implicit-float +; RUN: llc < %s -march=x86 -mattr=+sse2 -define double @t(double %x) nounwind ssp { +define double @t(double %x) nounwind ssp noimplicitfloat { entry: br i1 false, label %return, label %bb3 diff --git a/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll b/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll index 1d4d2b67783c2..97bbd93f83f1f 100644 --- a/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll +++ b/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; rdar://6774324 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin10.0" diff --git a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll index bf1c8df377db7..27f11cf6bc6ed 100644 --- a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll +++ b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel +; RUN: llc < %s -fast-isel ; radr://6772169 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin10" diff --git a/test/CodeGen/X86/2009-04-12-picrel.ll b/test/CodeGen/X86/2009-04-12-picrel.ll index 73062ab6263e9..f1942801c7af2 100644 --- a/test/CodeGen/X86/2009-04-12-picrel.ll +++ b/test/CodeGen/X86/2009-04-12-picrel.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t ; RUN: grep leaq %t | count 1 @dst = external global [131072 x i32] diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll index d6f4b9444b596..ff8cf0ac229ec 100644 --- a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll +++ b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin +; RUN: llc < %s -mtriple=i386-apple-darwin ; rdar://6781755 ; PR3934 diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert.ll index 7f94c6ca947e6..4362ba4375411 100644 --- a/test/CodeGen/X86/2009-04-13-2AddrAssert.ll +++ b/test/CodeGen/X86/2009-04-13-2AddrAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; rdar://6781755 ; PR3934 diff --git a/test/CodeGen/X86/2009-04-14-IllegalRegs.ll b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll index 0d66f6984fe22..bfa3eaa565dfa 100644 --- a/test/CodeGen/X86/2009-04-14-IllegalRegs.ll +++ b/test/CodeGen/X86/2009-04-14-IllegalRegs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil +; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=local | not grep sil ; rdar://6787136 %struct.X = type { i8, [32 x i8] } diff --git a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll index 3e60f6bbac8e0..f46eed4769f7e 100644 --- a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll +++ b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of modref unfolded} +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of modref unfolded} ; XFAIL: * ; 69408 removed the opportunity for this optimization to work diff --git a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll index 985eb2147247f..4d25b0f983192 100644 --- a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll +++ b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of registers downgraded} +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 84 ; rdar://6802189 ; Test if linearscan is unfavoring registers for allocation to allow more reuse diff --git a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll index 750dba7721425..c6e6e50641c5c 100644 --- a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll +++ b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll @@ -1,7 +1,13 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -mattr=-sse41,-sse3,+sse2 | \ -; RUN: %prcontext {14} 2 | grep {(%ebp)} | count 1 +; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic \ +; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 < %s | \ +; RUN: FileCheck %s ; rdar://6808032 +; CHECK: pextrw $14 +; CHECK-NEXT: movzbl +; CHECK-NEXT: (%ebp) +; CHECK-NEXT: pinsrw + define void @update(i8** %args_list) nounwind { entry: %cmp.i = icmp eq i32 0, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index 2835c2decfcac..c1ec45fc007e5 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -regalloc=local -relocation-model=pic > %t ; RUN: grep {leal.*TLSGD.*___tls_get_addr} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=local -relocation-model=pic > %t2 ; RUN: grep {leaq.*TLSGD.*__tls_get_addr} %t2 ; PR4004 diff --git a/test/CodeGen/X86/2009-04-25-CoalescerBug.ll b/test/CodeGen/X86/2009-04-25-CoalescerBug.ll index 981d3277d3430..94d3eb21cecca 100644 --- a/test/CodeGen/X86/2009-04-25-CoalescerBug.ll +++ b/test/CodeGen/X86/2009-04-25-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2 +; RUN: llc < %s -march=x86-64 | grep mov | count 2 ; rdar://6806252 define i64 @test(i32* %tmp13) nounwind { diff --git a/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll b/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll index b804a5b40a85f..7981a52e740a0 100644 --- a/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll +++ b/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu ; PR4034 %struct.BiContextType = type { i16, i8 } diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll index 1b757b16d73e2..d77e528fa7c11 100644 --- a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll +++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 +; RUN: llc < %s -mtriple=i386-apple-darwin9 ; PR4056 define void @int163(i32 %p_4, i32 %p_5) nounwind { diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll index 70cb4ff3c825a..f02565403e879 100644 --- a/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll +++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 +; RUN: llc < %s -mtriple=i386-apple-darwin9 ; PR4051 define void @int163(i32 %p_4, i32 %p_5) nounwind { diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll index 0fb000c3a0730..0a2fcdbf6c082 100644 --- a/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll +++ b/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax ; PR4076 type { i8, i8, i8 } ; type %0 diff --git a/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll b/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll index fc31c0b416d07..a2fd2e4c51c95 100644 --- a/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll +++ b/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {movl.*%ebx, 8(%esi)} +; RUN: llc < %s | grep {movl.*%ebx, 8(%esi)} target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.0" diff --git a/test/CodeGen/X86/2009-04-29-LinearScanBug.ll b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll index 767eb3118d96e..6843723052c13 100644 --- a/test/CodeGen/X86/2009-04-29-LinearScanBug.ll +++ b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 +; RUN: llc < %s -mtriple=i386-apple-darwin10 ; rdar://6837009 type { %struct.pf_state*, %struct.pf_state*, %struct.pf_state*, i32 } ; type %0 diff --git a/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll index c02c045ba5de4..d1f9cf83307cd 100644 --- a/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll +++ b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic ; PR4099 type { [62 x %struct.Bitvec*] } ; type %0 diff --git a/test/CodeGen/X86/2009-04-scale.ll b/test/CodeGen/X86/2009-04-scale.ll index 0766dc79e0203..e4c756cfdd441 100644 --- a/test/CodeGen/X86/2009-04-scale.ll +++ b/test/CodeGen/X86/2009-04-scale.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-unknown-linux-gnu +; RUN: llc < %s -march=x86 -mtriple=i386-unknown-linux-gnu ; PR3995 %struct.vtable = type { i32 (...)** } diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll index 284c6e250d793..738b5fbb7048a 100644 --- a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll +++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=static > %t +; RUN: llc < %s -relocation-model=static > %t ; RUN: grep "1: ._pv_cpu_ops+8" %t ; RUN: grep "2: ._G" %t ; PR4152 diff --git a/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll index 817872598eaf0..a5e28c0748678 100644 --- a/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll +++ b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR4188 ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll b/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll index 42bf9e991e6e9..6e062fb25089e 100644 --- a/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll +++ b/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 ; PR3886 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { diff --git a/test/CodeGen/X86/2009-05-23-available_externally.ll b/test/CodeGen/X86/2009-05-23-available_externally.ll index f4881bab45cf1..94773d91ea17d 100644 --- a/test/CodeGen/X86/2009-05-23-available_externally.ll +++ b/test/CodeGen/X86/2009-05-23-available_externally.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=pic | grep atoi | grep PLT +; RUN: llc < %s -relocation-model=pic | grep atoi | grep PLT ; PR4253 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll index 6f2bef4fca10e..8a0b244a23fae 100644 --- a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll +++ b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep -E {sar|shl|mov|or} | count 4 +; RUN: llc < %s | grep -E {sar|shl|mov|or} | count 4 ; Check that the shr(shl X, 56), 48) is not mistakenly turned into ; a shr (X, -8) that gets subsequently "optimized away" as undef ; PR4254 diff --git a/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll b/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll index 7bdfcb31035c8..2fd42f40d8915 100644 --- a/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll +++ b/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 %struct.tempsym_t = type { i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/2009-05-30-ISelBug.ll b/test/CodeGen/X86/2009-05-30-ISelBug.ll index 373f91f06f611..af552d4ce20d4 100644 --- a/test/CodeGen/X86/2009-05-30-ISelBug.ll +++ b/test/CodeGen/X86/2009-05-30-ISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep {movzbl %\[abcd\]h,} +; RUN: llc < %s -march=x86-64 | not grep {movzbl %\[abcd\]h,} define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind { newFuncRoot: diff --git a/test/CodeGen/X86/2009-06-02-RewriterBug.ll b/test/CodeGen/X86/2009-06-02-RewriterBug.ll index ea33b16f823fe..779f9857de7f7 100644 --- a/test/CodeGen/X86/2009-06-02-RewriterBug.ll +++ b/test/CodeGen/X86/2009-06-02-RewriterBug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -disable-fp-elim +; RUN: llc < %s -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -disable-fp-elim ; PR4225 define void @sha256_block1(i32* nocapture %arr, i8* nocapture %in, i64 %num) nounwind { diff --git a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll index c628b8affdd91..e6f3008c24761 100644 --- a/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll +++ b/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep "subq.*\\\$8, \\\%rsp" +; RUN: llc < %s | grep "subq.*\\\$40, \\\%rsp" target triple = "x86_64-mingw64" define x86_fp80 @a(i64 %x) nounwind readnone { diff --git a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll index 33d797297be82..cb64bf22c9819 100644 --- a/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll +++ b/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -o %t1 -f -; RUN: grep "subq.*\\\$40, \\\%rsp" %t1 -; RUN: grep "movaps \\\%xmm8, \\\(\\\%rsp\\\)" %t1 -; RUN: grep "movaps \\\%xmm7, 16\\\(\\\%rsp\\\)" %t1 +; RUN: llc < %s -o %t1 +; RUN: grep "subq.*\\\$72, \\\%rsp" %t1 +; RUN: grep "movaps \\\%xmm8, 32\\\(\\\%rsp\\\)" %t1 +; RUN: grep "movaps \\\%xmm7, 48\\\(\\\%rsp\\\)" %t1 target triple = "x86_64-mingw64" define i32 @a() nounwind { diff --git a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll index fa90fa9426d6f..9415732de0257 100644 --- a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll +++ b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 type { %struct.GAP } ; type %0 type { i16, i8, i8 } ; type %1 diff --git a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll index 94df530ec0e6b..336f17e2a3253 100644 --- a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll +++ b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | not grep movl +; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl define <8 x i8> @a(i8 zeroext %x) nounwind { %r = insertelement <8 x i8> undef, i8 %x, i32 0 diff --git a/test/CodeGen/X86/2009-06-05-VZextByteShort.ll b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll index 220423aa986a7..5c514805e485c 100644 --- a/test/CodeGen/X86/2009-06-05-VZextByteShort.ll +++ b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2 > %t1 +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 > %t1 ; RUN: grep movzwl %t1 | count 2 ; RUN: grep movzbl %t1 | count 2 ; RUN: grep movd %t1 | count 4 diff --git a/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll b/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll index 2e3f195ff9478..8bb3dc63a3b9a 100644 --- a/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll +++ b/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s define <2 x i64> @_mm_insert_epi16(<2 x i64> %a, i32 %b, i32 %imm) nounwind readnone { entry: diff --git a/test/CodeGen/X86/2009-06-05-sitofpCrash.ll b/test/CodeGen/X86/2009-06-05-sitofpCrash.ll index 589a8800ede7c..e361804d61ba7 100644 --- a/test/CodeGen/X86/2009-06-05-sitofpCrash.ll +++ b/test/CodeGen/X86/2009-06-05-sitofpCrash.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse +; RUN: llc < %s -march=x86 -mattr=+sse ; PR2598 define <2 x float> @a(<2 x i32> %i) nounwind { diff --git a/test/CodeGen/X86/2009-06-06-ConcatVectors.ll b/test/CodeGen/X86/2009-06-06-ConcatVectors.ll index a46fd1a2e76f0..92419fcb8b81d 100644 --- a/test/CodeGen/X86/2009-06-06-ConcatVectors.ll +++ b/test/CodeGen/X86/2009-06-06-ConcatVectors.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s define <2 x i64> @_mm_movpi64_pi64(<1 x i64> %a, <1 x i64> %b) nounwind readnone { entry: diff --git a/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll index c3687a533e053..07ef53e09d8ea 100644 --- a/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll +++ b/test/CodeGen/X86/2009-06-07-ExpandMMXBitcast.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep movl | count 2 +; RUN: llc < %s -march=x86 -mattr=+mmx | grep movl | count 2 define i64 @a(i32 %a, i32 %b) nounwind readnone { entry: diff --git a/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll b/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll index 001b7fc5a4af6..673e936e21788 100644 --- a/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll +++ b/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm +; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt +; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm ; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call ; calling convention out of sync with standard c calling convention on x86_64) diff --git a/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll b/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll index 095e6a1036218..feb578098caee 100644 --- a/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll +++ b/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | not grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | not grep TAILCALL ; Bug 4396. This tail call can NOT be optimized. diff --git a/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll b/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll index d6ff5b6803e33..228cd48119e3d 100644 --- a/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll +++ b/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 +; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 ; PR2484 define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind { diff --git a/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll b/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll new file mode 100644 index 0000000000000..fcc71aef23aed --- /dev/null +++ b/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll @@ -0,0 +1,137 @@ +; RUN: llc < %s -march=x86 -mtriple=x86_64-unknown-freebsd7.2 +; PR4478 + + %struct.sockaddr = type <{ i8, i8, [14 x i8] }> + +define i32 @main(i32 %argc, i8** %argv) nounwind { +entry: + br label %while.cond + +while.cond: ; preds = %sw.bb6, %entry + switch i32 undef, label %sw.default [ + i32 -1, label %while.end + i32 119, label %sw.bb6 + ] + +sw.bb6: ; preds = %while.cond + br i1 undef, label %if.then, label %while.cond + +if.then: ; preds = %sw.bb6 + ret i32 1 + +sw.default: ; preds = %while.cond + ret i32 1 + +while.end: ; preds = %while.cond + br i1 undef, label %if.then15, label %if.end16 + +if.then15: ; preds = %while.end + ret i32 1 + +if.end16: ; preds = %while.end + br i1 undef, label %lor.lhs.false, label %if.then21 + +lor.lhs.false: ; preds = %if.end16 + br i1 undef, label %if.end22, label %if.then21 + +if.then21: ; preds = %lor.lhs.false, %if.end16 + ret i32 1 + +if.end22: ; preds = %lor.lhs.false + br i1 undef, label %lor.lhs.false27, label %if.then51 + +lor.lhs.false27: ; preds = %if.end22 + br i1 undef, label %lor.lhs.false39, label %if.then51 + +lor.lhs.false39: ; preds = %lor.lhs.false27 + br i1 undef, label %if.end52, label %if.then51 + +if.then51: ; preds = %lor.lhs.false39, %lor.lhs.false27, %if.end22 + ret i32 1 + +if.end52: ; preds = %lor.lhs.false39 + br i1 undef, label %if.then57, label %if.end58 + +if.then57: ; preds = %if.end52 + ret i32 1 + +if.end58: ; preds = %if.end52 + br i1 undef, label %if.then64, label %if.end65 + +if.then64: ; preds = %if.end58 + ret i32 1 + +if.end65: ; preds = %if.end58 + br i1 undef, label %if.then71, label %if.end72 + +if.then71: ; preds = %if.end65 + ret i32 1 + +if.end72: ; preds = %if.end65 + br i1 undef, label %if.then83, label %if.end84 + +if.then83: ; preds = %if.end72 + ret i32 1 + +if.end84: ; preds = %if.end72 + br i1 undef, label %if.then101, label %if.end102 + +if.then101: ; preds = %if.end84 + ret i32 1 + +if.end102: ; preds = %if.end84 + br i1 undef, label %if.then113, label %if.end114 + +if.then113: ; preds = %if.end102 + ret i32 1 + +if.end114: ; preds = %if.end102 + br i1 undef, label %if.then209, label %if.end210 + +if.then209: ; preds = %if.end114 + ret i32 1 + +if.end210: ; preds = %if.end114 + br i1 undef, label %if.then219, label %if.end220 + +if.then219: ; preds = %if.end210 + ret i32 1 + +if.end220: ; preds = %if.end210 + br i1 undef, label %if.end243, label %lor.lhs.false230 + +lor.lhs.false230: ; preds = %if.end220 + unreachable + +if.end243: ; preds = %if.end220 + br i1 undef, label %if.then249, label %if.end250 + +if.then249: ; preds = %if.end243 + ret i32 1 + +if.end250: ; preds = %if.end243 + br i1 undef, label %if.end261, label %if.then260 + +if.then260: ; preds = %if.end250 + ret i32 1 + +if.end261: ; preds = %if.end250 + br i1 undef, label %if.then270, label %if.end271 + +if.then270: ; preds = %if.end261 + ret i32 1 + +if.end271: ; preds = %if.end261 + %call.i = call i32 @arc4random() nounwind ; <i32> [#uses=1] + %rem.i = urem i32 %call.i, 16383 ; <i32> [#uses=1] + %rem1.i = trunc i32 %rem.i to i16 ; <i16> [#uses=1] + %conv2.i = or i16 %rem1.i, -16384 ; <i16> [#uses=1] + %0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwind ; <i16> [#uses=1] + store i16 %0, i16* undef + %call281 = call i32 @bind(i32 undef, %struct.sockaddr* undef, i32 16) nounwind ; <i32> [#uses=0] + unreachable +} + +declare i32 @bind(i32, %struct.sockaddr*, i32) + +declare i32 @arc4random() diff --git a/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/test/CodeGen/X86/2009-07-07-SplitICmp.ll new file mode 100644 index 0000000000000..eb9378b9527b6 --- /dev/null +++ b/test/CodeGen/X86/2009-07-07-SplitICmp.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86 -disable-mmx + +define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind { + %D = icmp sgt <2 x i32> %A, %B + %E = zext <2 x i1> %D to <2 x i32> + store <2 x i32> %E, <2 x i32>* %C + ret void +} diff --git a/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll b/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll new file mode 100644 index 0000000000000..0fdfdcb8a30af --- /dev/null +++ b/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=x86 +; PR3037 + +define void @entry(<4 x i8>* %dest) { + %1 = xor <4 x i1> zeroinitializer, < i1 true, i1 true, i1 true, i1 true > + %2 = extractelement <4 x i1> %1, i32 3 + %3 = zext i1 %2 to i8 + %4 = insertelement <4 x i8> zeroinitializer, i8 %3, i32 3 + store <4 x i8> %4, <4 x i8>* %dest, align 1 + ret void +} diff --git a/test/CodeGen/X86/2009-07-15-CoalescerBug.ll b/test/CodeGen/X86/2009-07-15-CoalescerBug.ll new file mode 100644 index 0000000000000..eabaf775edefc --- /dev/null +++ b/test/CodeGen/X86/2009-07-15-CoalescerBug.ll @@ -0,0 +1,958 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 + + %struct.ANY = type { i8* } + %struct.AV = type { %struct.XPVAV*, i32, i32 } + %struct.CLONE_PARAMS = type { %struct.AV*, i64, %struct.PerlInterpreter* } + %struct.CV = type { %struct.XPVCV*, i32, i32 } + %struct.DIR = type { i32, i64, i64, i8*, i32, i64, i64, i32, %struct.__darwin_pthread_mutex_t, %struct._telldir* } + %struct.GP = type { %struct.SV*, i32, %struct.io*, %struct.CV*, %struct.AV*, %struct.HV*, %struct.GV*, %struct.CV*, i32, i32, i32, i8* } + %struct.GV = type { %struct.XPVGV*, i32, i32 } + %struct.HE = type { %struct.HE*, %struct.HEK*, %struct.SV* } + %struct.HEK = type { i32, i32, [1 x i8] } + %struct.HV = type { %struct.XPVHV*, i32, i32 } + %struct.MAGIC = type { %struct.MAGIC*, %struct.MGVTBL*, i16, i8, i8, %struct.SV*, i8*, i32 } + %struct.MGVTBL = type { i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*)*, i32 (%struct.SV*, %struct.MAGIC*, %struct.SV*, i8*, i32)*, i32 (%struct.MAGIC*, %struct.CLONE_PARAMS*)* } + %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8 } + %struct.PMOP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i64, i16, i16, i8, i8, %struct.OP*, %struct.OP*, %struct.OP*, %struct.OP*, %struct.PMOP*, %struct.REGEXP*, i32, i32, i8, %struct.HV* } + %struct.PerlIO_funcs = type { i64, i8*, i64, i32, i64 (%struct.PerlIOl**, i8*, %struct.SV*, %struct.PerlIO_funcs*)*, i64 (%struct.PerlIOl**)*, %struct.PerlIOl** (%struct.PerlIO_funcs*, %struct.PerlIO_list_t*, i64, i8*, i32, i32, i32, %struct.PerlIOl**, i32, %struct.SV**)*, i64 (%struct.PerlIOl**)*, %struct.SV* (%struct.PerlIOl**, %struct.CLONE_PARAMS*, i32)*, i64 (%struct.PerlIOl**)*, %struct.PerlIOl** (%struct.PerlIOl**, %struct.PerlIOl**, %struct.CLONE_PARAMS*, i32)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i8*, i64)*, i64 (%struct.PerlIOl**, i64, i32)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, void (%struct.PerlIOl**)*, void (%struct.PerlIOl**)*, i8* (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, i8* (%struct.PerlIOl**)*, i64 (%struct.PerlIOl**)*, void (%struct.PerlIOl**, i8*, i64)* } + %struct.PerlIO_list_t = type { i64, i64, i64, %struct.PerlIO_pair_t* } + %struct.PerlIO_pair_t = type { %struct.PerlIO_funcs*, %struct.SV* } + %struct.PerlIOl = type { %struct.PerlIOl*, %struct.PerlIO_funcs*, i32 } + %struct.PerlInterpreter = type { i8 } + %struct.REGEXP = type { i32*, i32*, %struct.regnode*, %struct.reg_substr_data*, i8*, %struct.reg_data*, i8*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, [1 x %struct.regnode] } + %struct.SV = type { i8*, i32, i32 } + %struct.XPVAV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.SV**, %struct.SV*, i8 } + %struct.XPVCV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.HV*, %struct.OP*, %struct.OP*, void (%struct.CV*)*, %struct.ANY, %struct.GV*, i8*, i64, %struct.AV*, %struct.CV*, i16, i32 } + %struct.XPVGV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.GP*, i8*, i64, %struct.HV*, i8 } + %struct.XPVHV = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, i32, %struct.HE*, %struct.PMOP*, i8* } + %struct.XPVIO = type { i8*, i64, i64, i64, double, %struct.MAGIC*, %struct.HV*, %struct.PerlIOl**, %struct.PerlIOl**, %struct.anon, i64, i64, i64, i64, i8*, %struct.GV*, i8*, %struct.GV*, i8*, %struct.GV*, i16, i8, i8 } + %struct.__darwin_pthread_mutex_t = type { i64, [56 x i8] } + %struct._telldir = type opaque + %struct.anon = type { %struct.DIR* } + %struct.io = type { %struct.XPVIO*, i32, i32 } + %struct.reg_data = type { i32, i8*, [1 x i8*] } + %struct.reg_substr_data = type { [3 x %struct.reg_substr_datum] } + %struct.reg_substr_datum = type { i32, i32, %struct.SV*, %struct.SV* } + %struct.regnode = type { i8, i8, i16 } + +define i32 @Perl_yylex() nounwind ssp { +entry: + br i1 undef, label %bb21, label %bb + +bb: ; preds = %entry + unreachable + +bb21: ; preds = %entry + switch i32 undef, label %bb103 [ + i32 1, label %bb101 + i32 4, label %bb75 + i32 6, label %bb68 + i32 7, label %bb67 + i32 8, label %bb25 + ] + +bb25: ; preds = %bb21 + ret i32 41 + +bb67: ; preds = %bb21 + ret i32 40 + +bb68: ; preds = %bb21 + br i1 undef, label %bb69, label %bb70 + +bb69: ; preds = %bb68 + ret i32 undef + +bb70: ; preds = %bb68 + unreachable + +bb75: ; preds = %bb21 + unreachable + +bb101: ; preds = %bb21 + unreachable + +bb103: ; preds = %bb21 + switch i32 undef, label %bb104 [ + i32 0, label %bb126 + i32 4, label %fake_eof + i32 26, label %fake_eof + i32 34, label %bb1423 + i32 36, label %bb1050 + i32 37, label %bb534 + i32 39, label %bb1412 + i32 41, label %bb643 + i32 44, label %bb544 + i32 48, label %bb1406 + i32 49, label %bb1406 + i32 50, label %bb1406 + i32 51, label %bb1406 + i32 52, label %bb1406 + i32 53, label %bb1406 + i32 54, label %bb1406 + i32 55, label %bb1406 + i32 56, label %bb1406 + i32 57, label %bb1406 + i32 59, label %bb639 + i32 65, label %keylookup + i32 66, label %keylookup + i32 67, label %keylookup + i32 68, label %keylookup + i32 69, label %keylookup + i32 70, label %keylookup + i32 71, label %keylookup + i32 72, label %keylookup + i32 73, label %keylookup + i32 74, label %keylookup + i32 75, label %keylookup + i32 76, label %keylookup + i32 77, label %keylookup + i32 78, label %keylookup + i32 79, label %keylookup + i32 80, label %keylookup + i32 81, label %keylookup + i32 82, label %keylookup + i32 83, label %keylookup + i32 84, label %keylookup + i32 85, label %keylookup + i32 86, label %keylookup + i32 87, label %keylookup + i32 88, label %keylookup + i32 89, label %keylookup + i32 90, label %keylookup + i32 92, label %bb1455 + i32 95, label %keylookup + i32 96, label %bb1447 + i32 97, label %keylookup + i32 98, label %keylookup + i32 99, label %keylookup + i32 100, label %keylookup + i32 101, label %keylookup + i32 102, label %keylookup + i32 103, label %keylookup + i32 104, label %keylookup + i32 105, label %keylookup + i32 106, label %keylookup + i32 107, label %keylookup + i32 108, label %keylookup + i32 109, label %keylookup + i32 110, label %keylookup + i32 111, label %keylookup + i32 112, label %keylookup + i32 113, label %keylookup + i32 114, label %keylookup + i32 115, label %keylookup + i32 116, label %keylookup + i32 117, label %keylookup + i32 118, label %keylookup + i32 119, label %keylookup + i32 120, label %keylookup + i32 121, label %keylookup + i32 122, label %keylookup + i32 126, label %bb544 + ] + +bb104: ; preds = %bb103 + unreachable + +bb126: ; preds = %bb103 + ret i32 0 + +fake_eof: ; preds = %bb1841, %bb103, %bb103 + unreachable + +bb534: ; preds = %bb103 + unreachable + +bb544: ; preds = %bb103, %bb103 + ret i32 undef + +bb639: ; preds = %bb103 + unreachable + +bb643: ; preds = %bb103 + unreachable + +bb1050: ; preds = %bb103 + unreachable + +bb1406: ; preds = %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103 + unreachable + +bb1412: ; preds = %bb103 + unreachable + +bb1423: ; preds = %bb103 + unreachable + +bb1447: ; preds = %bb103 + unreachable + +bb1455: ; preds = %bb103 + unreachable + +keylookup: ; preds = %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103, %bb103 + br i1 undef, label %bb1498, label %bb1496 + +bb1496: ; preds = %keylookup + br i1 undef, label %bb1498, label %bb1510.preheader + +bb1498: ; preds = %bb1496, %keylookup + unreachable + +bb1510.preheader: ; preds = %bb1496 + br i1 undef, label %bb1511, label %bb1518 + +bb1511: ; preds = %bb1510.preheader + br label %bb1518 + +bb1518: ; preds = %bb1511, %bb1510.preheader + switch i32 undef, label %bb741.i4285 [ + i32 95, label %bb744.i4287 + i32 115, label %bb852.i4394 + ] + +bb741.i4285: ; preds = %bb1518 + br label %Perl_keyword.exit4735 + +bb744.i4287: ; preds = %bb1518 + br label %Perl_keyword.exit4735 + +bb852.i4394: ; preds = %bb1518 + br i1 undef, label %bb861.i4404, label %bb856.i4399 + +bb856.i4399: ; preds = %bb852.i4394 + br label %Perl_keyword.exit4735 + +bb861.i4404: ; preds = %bb852.i4394 + br label %Perl_keyword.exit4735 + +Perl_keyword.exit4735: ; preds = %bb861.i4404, %bb856.i4399, %bb744.i4287, %bb741.i4285 + br i1 undef, label %bb1544, label %reserved_word + +bb1544: ; preds = %Perl_keyword.exit4735 + br i1 undef, label %bb1565, label %bb1545 + +bb1545: ; preds = %bb1544 + br i1 undef, label %bb1563, label %bb1558 + +bb1558: ; preds = %bb1545 + %0 = load %struct.SV** undef ; <%struct.SV*> [#uses=1] + %1 = bitcast %struct.SV* %0 to %struct.GV* ; <%struct.GV*> [#uses=5] + br i1 undef, label %bb1563, label %bb1559 + +bb1559: ; preds = %bb1558 + br i1 undef, label %bb1560, label %bb1563 + +bb1560: ; preds = %bb1559 + br i1 undef, label %bb1563, label %bb1561 + +bb1561: ; preds = %bb1560 + br i1 undef, label %bb1562, label %bb1563 + +bb1562: ; preds = %bb1561 + br label %bb1563 + +bb1563: ; preds = %bb1562, %bb1561, %bb1560, %bb1559, %bb1558, %bb1545 + %gv19.3 = phi %struct.GV* [ %1, %bb1562 ], [ undef, %bb1545 ], [ %1, %bb1558 ], [ %1, %bb1559 ], [ %1, %bb1560 ], [ %1, %bb1561 ] ; <%struct.GV*> [#uses=0] + br i1 undef, label %bb1565, label %reserved_word + +bb1565: ; preds = %bb1563, %bb1544 + br i1 undef, label %bb1573, label %bb1580 + +bb1573: ; preds = %bb1565 + br label %bb1580 + +bb1580: ; preds = %bb1573, %bb1565 + br i1 undef, label %bb1595, label %reserved_word + +bb1595: ; preds = %bb1580 + br i1 undef, label %reserved_word, label %bb1597 + +bb1597: ; preds = %bb1595 + br i1 undef, label %reserved_word, label %bb1602 + +bb1602: ; preds = %bb1597 + br label %reserved_word + +reserved_word: ; preds = %bb1602, %bb1597, %bb1595, %bb1580, %bb1563, %Perl_keyword.exit4735 + switch i32 undef, label %bb2012 [ + i32 1, label %bb1819 + i32 2, label %bb1830 + i32 4, label %bb1841 + i32 5, label %bb1841 + i32 8, label %bb1880 + i32 14, label %bb1894 + i32 16, label %bb1895 + i32 17, label %bb1896 + i32 18, label %bb1897 + i32 19, label %bb1898 + i32 20, label %bb1899 + i32 22, label %bb1906 + i32 23, label %bb1928 + i32 24, label %bb2555 + i32 26, label %bb1929 + i32 31, label %bb1921 + i32 32, label %bb1930 + i32 33, label %bb1905 + i32 34, label %bb1936 + i32 35, label %bb1927 + i32 37, label %bb1962 + i32 40, label %bb1951 + i32 41, label %bb1946 + i32 42, label %bb1968 + i32 44, label %bb1969 + i32 45, label %bb1970 + i32 46, label %bb2011 + i32 47, label %bb2006 + i32 48, label %bb2007 + i32 49, label %bb2009 + i32 50, label %bb2010 + i32 51, label %bb2008 + i32 53, label %bb1971 + i32 54, label %bb1982 + i32 55, label %bb2005 + i32 59, label %bb2081 + i32 61, label %bb2087 + i32 64, label %bb2080 + i32 65, label %really_sub + i32 66, label %bb2079 + i32 67, label %bb2089 + i32 69, label %bb2155 + i32 72, label %bb2137 + i32 74, label %bb2138 + i32 75, label %bb2166 + i32 76, label %bb2144 + i32 78, label %bb2145 + i32 81, label %bb2102 + i32 82, label %bb2108 + i32 84, label %bb2114 + i32 85, label %bb2115 + i32 86, label %bb2116 + i32 89, label %bb2146 + i32 90, label %bb2147 + i32 91, label %bb2148 + i32 93, label %bb2154 + i32 94, label %bb2167 + i32 96, label %bb2091 + i32 97, label %bb2090 + i32 98, label %bb2088 + i32 100, label %bb2173 + i32 101, label %bb2174 + i32 102, label %bb2175 + i32 103, label %bb2180 + i32 104, label %bb2181 + i32 106, label %bb2187 + i32 107, label %bb2188 + i32 110, label %bb2206 + i32 112, label %bb2217 + i32 113, label %bb2218 + i32 114, label %bb2199 + i32 119, label %bb2205 + i32 120, label %bb2229 + i32 121, label %bb2233 + i32 122, label %bb2234 + i32 123, label %bb2235 + i32 124, label %bb2236 + i32 125, label %bb2237 + i32 126, label %bb2238 + i32 127, label %bb2239 + i32 128, label %bb2268 + i32 129, label %bb2267 + i32 133, label %bb2276 + i32 134, label %bb2348 + i32 135, label %bb2337 + i32 137, label %bb2239 + i32 138, label %bb2367 + i32 139, label %bb2368 + i32 140, label %bb2369 + i32 141, label %bb2357 + i32 143, label %bb2349 + i32 144, label %bb2350 + i32 146, label %bb2356 + i32 147, label %bb2370 + i32 148, label %bb2445 + i32 149, label %bb2453 + i32 151, label %bb2381 + i32 152, label %bb2457 + i32 154, label %bb2516 + i32 156, label %bb2522 + i32 158, label %bb2527 + i32 159, label %bb2537 + i32 160, label %bb2503 + i32 162, label %bb2504 + i32 163, label %bb2464 + i32 165, label %bb2463 + i32 166, label %bb2538 + i32 168, label %bb2515 + i32 170, label %bb2549 + i32 172, label %bb2566 + i32 173, label %bb2595 + i32 174, label %bb2565 + i32 175, label %bb2567 + i32 176, label %bb2568 + i32 177, label %bb2569 + i32 178, label %bb2570 + i32 179, label %bb2594 + i32 182, label %bb2571 + i32 183, label %bb2572 + i32 185, label %bb2593 + i32 186, label %bb2583 + i32 187, label %bb2596 + i32 189, label %bb2602 + i32 190, label %bb2603 + i32 191, label %bb2604 + i32 192, label %bb2605 + i32 193, label %bb2606 + i32 196, label %bb2617 + i32 197, label %bb2618 + i32 198, label %bb2619 + i32 199, label %bb2627 + i32 200, label %bb2625 + i32 201, label %bb2626 + i32 206, label %really_sub + i32 207, label %bb2648 + i32 208, label %bb2738 + i32 209, label %bb2739 + i32 210, label %bb2740 + i32 211, label %bb2742 + i32 212, label %bb2741 + i32 213, label %bb2737 + i32 214, label %bb2743 + i32 217, label %bb2758 + i32 219, label %bb2764 + i32 220, label %bb2765 + i32 221, label %bb2744 + i32 222, label %bb2766 + i32 226, label %bb2785 + i32 227, label %bb2783 + i32 228, label %bb2784 + i32 229, label %bb2790 + i32 230, label %bb2797 + i32 232, label %bb2782 + i32 234, label %bb2791 + i32 236, label %bb2815 + i32 237, label %bb2818 + i32 238, label %bb2819 + i32 239, label %bb2820 + i32 240, label %bb2817 + i32 241, label %bb2816 + i32 242, label %bb2821 + i32 243, label %bb2826 + i32 244, label %bb2829 + i32 245, label %bb2830 + ] + +bb1819: ; preds = %reserved_word + unreachable + +bb1830: ; preds = %reserved_word + unreachable + +bb1841: ; preds = %reserved_word, %reserved_word + br i1 undef, label %fake_eof, label %bb1842 + +bb1842: ; preds = %bb1841 + unreachable + +bb1880: ; preds = %reserved_word + unreachable + +bb1894: ; preds = %reserved_word + ret i32 undef + +bb1895: ; preds = %reserved_word + ret i32 301 + +bb1896: ; preds = %reserved_word + ret i32 undef + +bb1897: ; preds = %reserved_word + ret i32 undef + +bb1898: ; preds = %reserved_word + ret i32 undef + +bb1899: ; preds = %reserved_word + ret i32 undef + +bb1905: ; preds = %reserved_word + ret i32 278 + +bb1906: ; preds = %reserved_word + unreachable + +bb1921: ; preds = %reserved_word + ret i32 288 + +bb1927: ; preds = %reserved_word + ret i32 undef + +bb1928: ; preds = %reserved_word + ret i32 undef + +bb1929: ; preds = %reserved_word + ret i32 undef + +bb1930: ; preds = %reserved_word + ret i32 undef + +bb1936: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb1937 + +bb1937: ; preds = %bb1936 + ret i32 undef + +bb1946: ; preds = %reserved_word + unreachable + +bb1951: ; preds = %reserved_word + ret i32 undef + +bb1962: ; preds = %reserved_word + ret i32 undef + +bb1968: ; preds = %reserved_word + ret i32 280 + +bb1969: ; preds = %reserved_word + ret i32 276 + +bb1970: ; preds = %reserved_word + ret i32 277 + +bb1971: ; preds = %reserved_word + ret i32 288 + +bb1982: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb1986 + +bb1986: ; preds = %bb1982 + ret i32 undef + +bb2005: ; preds = %reserved_word + ret i32 undef + +bb2006: ; preds = %reserved_word + ret i32 282 + +bb2007: ; preds = %reserved_word + ret i32 282 + +bb2008: ; preds = %reserved_word + ret i32 282 + +bb2009: ; preds = %reserved_word + ret i32 282 + +bb2010: ; preds = %reserved_word + ret i32 282 + +bb2011: ; preds = %reserved_word + ret i32 282 + +bb2012: ; preds = %reserved_word + unreachable + +bb2079: ; preds = %reserved_word + ret i32 undef + +bb2080: ; preds = %reserved_word + ret i32 282 + +bb2081: ; preds = %reserved_word + ret i32 undef + +bb2087: ; preds = %reserved_word + ret i32 undef + +bb2088: ; preds = %reserved_word + ret i32 287 + +bb2089: ; preds = %reserved_word + ret i32 287 + +bb2090: ; preds = %reserved_word + ret i32 undef + +bb2091: ; preds = %reserved_word + ret i32 280 + +bb2102: ; preds = %reserved_word + ret i32 282 + +bb2108: ; preds = %reserved_word + ret i32 undef + +bb2114: ; preds = %reserved_word + ret i32 undef + +bb2115: ; preds = %reserved_word + ret i32 282 + +bb2116: ; preds = %reserved_word + ret i32 282 + +bb2137: ; preds = %reserved_word + ret i32 undef + +bb2138: ; preds = %reserved_word + ret i32 282 + +bb2144: ; preds = %reserved_word + ret i32 undef + +bb2145: ; preds = %reserved_word + ret i32 282 + +bb2146: ; preds = %reserved_word + ret i32 undef + +bb2147: ; preds = %reserved_word + ret i32 undef + +bb2148: ; preds = %reserved_word + ret i32 282 + +bb2154: ; preds = %reserved_word + ret i32 undef + +bb2155: ; preds = %reserved_word + ret i32 282 + +bb2166: ; preds = %reserved_word + ret i32 282 + +bb2167: ; preds = %reserved_word + ret i32 undef + +bb2173: ; preds = %reserved_word + ret i32 274 + +bb2174: ; preds = %reserved_word + ret i32 undef + +bb2175: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb2176 + +bb2176: ; preds = %bb2175 + ret i32 undef + +bb2180: ; preds = %reserved_word + ret i32 undef + +bb2181: ; preds = %reserved_word + ret i32 undef + +bb2187: ; preds = %reserved_word + ret i32 undef + +bb2188: ; preds = %reserved_word + ret i32 280 + +bb2199: ; preds = %reserved_word + ret i32 295 + +bb2205: ; preds = %reserved_word + ret i32 287 + +bb2206: ; preds = %reserved_word + ret i32 287 + +bb2217: ; preds = %reserved_word + ret i32 undef + +bb2218: ; preds = %reserved_word + ret i32 undef + +bb2229: ; preds = %reserved_word + unreachable + +bb2233: ; preds = %reserved_word + ret i32 undef + +bb2234: ; preds = %reserved_word + ret i32 undef + +bb2235: ; preds = %reserved_word + ret i32 undef + +bb2236: ; preds = %reserved_word + ret i32 undef + +bb2237: ; preds = %reserved_word + ret i32 undef + +bb2238: ; preds = %reserved_word + ret i32 undef + +bb2239: ; preds = %reserved_word, %reserved_word + unreachable + +bb2267: ; preds = %reserved_word + ret i32 280 + +bb2268: ; preds = %reserved_word + ret i32 288 + +bb2276: ; preds = %reserved_word + unreachable + +bb2337: ; preds = %reserved_word + ret i32 300 + +bb2348: ; preds = %reserved_word + ret i32 undef + +bb2349: ; preds = %reserved_word + ret i32 undef + +bb2350: ; preds = %reserved_word + ret i32 undef + +bb2356: ; preds = %reserved_word + ret i32 undef + +bb2357: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb2358 + +bb2358: ; preds = %bb2357 + ret i32 undef + +bb2367: ; preds = %reserved_word + ret i32 undef + +bb2368: ; preds = %reserved_word + ret i32 270 + +bb2369: ; preds = %reserved_word + ret i32 undef + +bb2370: ; preds = %reserved_word + unreachable + +bb2381: ; preds = %reserved_word + unreachable + +bb2445: ; preds = %reserved_word + unreachable + +bb2453: ; preds = %reserved_word + unreachable + +bb2457: ; preds = %reserved_word + unreachable + +bb2463: ; preds = %reserved_word + ret i32 286 + +bb2464: ; preds = %reserved_word + unreachable + +bb2503: ; preds = %reserved_word + ret i32 280 + +bb2504: ; preds = %reserved_word + ret i32 undef + +bb2515: ; preds = %reserved_word + ret i32 undef + +bb2516: ; preds = %reserved_word + ret i32 undef + +bb2522: ; preds = %reserved_word + unreachable + +bb2527: ; preds = %reserved_word + unreachable + +bb2537: ; preds = %reserved_word + ret i32 undef + +bb2538: ; preds = %reserved_word + ret i32 undef + +bb2549: ; preds = %reserved_word + unreachable + +bb2555: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb2556 + +bb2556: ; preds = %bb2555 + ret i32 undef + +bb2565: ; preds = %reserved_word + ret i32 undef + +bb2566: ; preds = %reserved_word + ret i32 undef + +bb2567: ; preds = %reserved_word + ret i32 undef + +bb2568: ; preds = %reserved_word + ret i32 undef + +bb2569: ; preds = %reserved_word + ret i32 undef + +bb2570: ; preds = %reserved_word + ret i32 undef + +bb2571: ; preds = %reserved_word + ret i32 undef + +bb2572: ; preds = %reserved_word + ret i32 undef + +bb2583: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb2584 + +bb2584: ; preds = %bb2583 + ret i32 undef + +bb2593: ; preds = %reserved_word + ret i32 282 + +bb2594: ; preds = %reserved_word + ret i32 282 + +bb2595: ; preds = %reserved_word + ret i32 undef + +bb2596: ; preds = %reserved_word + ret i32 undef + +bb2602: ; preds = %reserved_word + ret i32 undef + +bb2603: ; preds = %reserved_word + ret i32 undef + +bb2604: ; preds = %reserved_word + ret i32 undef + +bb2605: ; preds = %reserved_word + ret i32 undef + +bb2606: ; preds = %reserved_word + ret i32 undef + +bb2617: ; preds = %reserved_word + ret i32 undef + +bb2618: ; preds = %reserved_word + ret i32 undef + +bb2619: ; preds = %reserved_word + unreachable + +bb2625: ; preds = %reserved_word + ret i32 undef + +bb2626: ; preds = %reserved_word + ret i32 undef + +bb2627: ; preds = %reserved_word + ret i32 undef + +bb2648: ; preds = %reserved_word + ret i32 undef + +really_sub: ; preds = %reserved_word, %reserved_word + unreachable + +bb2737: ; preds = %reserved_word + ret i32 undef + +bb2738: ; preds = %reserved_word + ret i32 undef + +bb2739: ; preds = %reserved_word + ret i32 undef + +bb2740: ; preds = %reserved_word + ret i32 undef + +bb2741: ; preds = %reserved_word + ret i32 undef + +bb2742: ; preds = %reserved_word + ret i32 undef + +bb2743: ; preds = %reserved_word + ret i32 undef + +bb2744: ; preds = %reserved_word + unreachable + +bb2758: ; preds = %reserved_word + ret i32 undef + +bb2764: ; preds = %reserved_word + ret i32 282 + +bb2765: ; preds = %reserved_word + ret i32 282 + +bb2766: ; preds = %reserved_word + ret i32 undef + +bb2782: ; preds = %reserved_word + ret i32 273 + +bb2783: ; preds = %reserved_word + ret i32 275 + +bb2784: ; preds = %reserved_word + ret i32 undef + +bb2785: ; preds = %reserved_word + br i1 undef, label %bb2834, label %bb2786 + +bb2786: ; preds = %bb2785 + ret i32 undef + +bb2790: ; preds = %reserved_word + ret i32 undef + +bb2791: ; preds = %reserved_word + ret i32 undef + +bb2797: ; preds = %reserved_word + ret i32 undef + +bb2815: ; preds = %reserved_word + ret i32 undef + +bb2816: ; preds = %reserved_word + ret i32 272 + +bb2817: ; preds = %reserved_word + ret i32 undef + +bb2818: ; preds = %reserved_word + ret i32 282 + +bb2819: ; preds = %reserved_word + ret i32 undef + +bb2820: ; preds = %reserved_word + ret i32 282 + +bb2821: ; preds = %reserved_word + unreachable + +bb2826: ; preds = %reserved_word + unreachable + +bb2829: ; preds = %reserved_word + ret i32 300 + +bb2830: ; preds = %reserved_word + unreachable + +bb2834: ; preds = %bb2785, %bb2583, %bb2555, %bb2357, %bb2175, %bb1982, %bb1936 + ret i32 283 +} diff --git a/test/CodeGen/X86/2009-07-16-CoalescerBug.ll b/test/CodeGen/X86/2009-07-16-CoalescerBug.ll new file mode 100644 index 0000000000000..48af440df2d6d --- /dev/null +++ b/test/CodeGen/X86/2009-07-16-CoalescerBug.ll @@ -0,0 +1,210 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; rdar://7059496 + + %struct.brinfo = type <{ %struct.brinfo*, %struct.brinfo*, i8*, i32, i32, i32, i8, i8, i8, i8 }> + %struct.cadata = type <{ i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, %struct.cmatcher*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8, i8, i8, i8 }> + %struct.cline = type <{ %struct.cline*, i32, i8, i8, i8, i8, i8*, i32, i8, i8, i8, i8, i8*, i32, i8, i8, i8, i8, i8*, i32, i32, %struct.cline*, %struct.cline*, i32, i32 }> + %struct.cmatch = type <{ i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8, i8, i8, i8, i32*, i32*, i8*, i8*, i32, i32, i32, i32, i16, i8, i8, i16, i8, i8 }> + %struct.cmatcher = type <{ i32, i8, i8, i8, i8, %struct.cmatcher*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8, %struct.cpattern*, i32, i8, i8, i8, i8 }> + %struct.cpattern = type <{ %struct.cpattern*, i32, i8, i8, i8, i8, %union.anon }> + %struct.patprog = type <{ i64, i64, i64, i64, i32, i32, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8 }> + %union.anon = type <{ [8 x i8] }> + +define i32 @addmatches(%struct.cadata* %dat, i8** nocapture %argv) nounwind ssp { +entry: + br i1 undef, label %if.else, label %if.then91 + +if.then91: ; preds = %entry + br label %if.end96 + +if.else: ; preds = %entry + br label %if.end96 + +if.end96: ; preds = %if.else, %if.then91 + br i1 undef, label %lor.lhs.false, label %if.then105 + +lor.lhs.false: ; preds = %if.end96 + br i1 undef, label %if.else139, label %if.then105 + +if.then105: ; preds = %lor.lhs.false, %if.end96 + unreachable + +if.else139: ; preds = %lor.lhs.false + br i1 undef, label %land.end, label %land.rhs + +land.rhs: ; preds = %if.else139 + unreachable + +land.end: ; preds = %if.else139 + br i1 undef, label %land.lhs.true285, label %if.then315 + +land.lhs.true285: ; preds = %land.end + br i1 undef, label %if.end324, label %if.then322 + +if.then315: ; preds = %land.end + unreachable + +if.then322: ; preds = %land.lhs.true285 + unreachable + +if.end324: ; preds = %land.lhs.true285 + br i1 undef, label %if.end384, label %if.then358 + +if.then358: ; preds = %if.end324 + unreachable + +if.end384: ; preds = %if.end324 + br i1 undef, label %if.end394, label %land.lhs.true387 + +land.lhs.true387: ; preds = %if.end384 + unreachable + +if.end394: ; preds = %if.end384 + br i1 undef, label %if.end498, label %land.lhs.true399 + +land.lhs.true399: ; preds = %if.end394 + br i1 undef, label %if.end498, label %if.then406 + +if.then406: ; preds = %land.lhs.true399 + unreachable + +if.end498: ; preds = %land.lhs.true399, %if.end394 + br i1 undef, label %if.end514, label %if.then503 + +if.then503: ; preds = %if.end498 + unreachable + +if.end514: ; preds = %if.end498 + br i1 undef, label %if.end585, label %if.then520 + +if.then520: ; preds = %if.end514 + br i1 undef, label %lor.lhs.false547, label %if.then560 + +lor.lhs.false547: ; preds = %if.then520 + unreachable + +if.then560: ; preds = %if.then520 + br i1 undef, label %if.end585, label %land.lhs.true566 + +land.lhs.true566: ; preds = %if.then560 + br i1 undef, label %if.end585, label %if.then573 + +if.then573: ; preds = %land.lhs.true566 + unreachable + +if.end585: ; preds = %land.lhs.true566, %if.then560, %if.end514 + br i1 undef, label %cond.true593, label %cond.false599 + +cond.true593: ; preds = %if.end585 + unreachable + +cond.false599: ; preds = %if.end585 + br i1 undef, label %if.end647, label %if.then621 + +if.then621: ; preds = %cond.false599 + br i1 undef, label %cond.true624, label %cond.false630 + +cond.true624: ; preds = %if.then621 + br label %if.end647 + +cond.false630: ; preds = %if.then621 + unreachable + +if.end647: ; preds = %cond.true624, %cond.false599 + br i1 undef, label %if.end723, label %if.then701 + +if.then701: ; preds = %if.end647 + br label %if.end723 + +if.end723: ; preds = %if.then701, %if.end647 + br i1 undef, label %if.else1090, label %if.then729 + +if.then729: ; preds = %if.end723 + br i1 undef, label %if.end887, label %if.then812 + +if.then812: ; preds = %if.then729 + unreachable + +if.end887: ; preds = %if.then729 + br i1 undef, label %if.end972, label %if.then893 + +if.then893: ; preds = %if.end887 + br i1 undef, label %if.end919, label %if.then903 + +if.then903: ; preds = %if.then893 + unreachable + +if.end919: ; preds = %if.then893 + br label %if.end972 + +if.end972: ; preds = %if.end919, %if.end887 + %sline.0 = phi %struct.cline* [ undef, %if.end919 ], [ null, %if.end887 ] ; <%struct.cline*> [#uses=5] + %bcs.0 = phi i32 [ undef, %if.end919 ], [ 0, %if.end887 ] ; <i32> [#uses=5] + br i1 undef, label %if.end1146, label %land.lhs.true975 + +land.lhs.true975: ; preds = %if.end972 + br i1 undef, label %if.end1146, label %if.then980 + +if.then980: ; preds = %land.lhs.true975 + br i1 undef, label %cond.false1025, label %cond.false1004 + +cond.false1004: ; preds = %if.then980 + unreachable + +cond.false1025: ; preds = %if.then980 + br i1 undef, label %if.end1146, label %if.then1071 + +if.then1071: ; preds = %cond.false1025 + br i1 undef, label %if.then1074, label %if.end1081 + +if.then1074: ; preds = %if.then1071 + br label %if.end1081 + +if.end1081: ; preds = %if.then1074, %if.then1071 + %call1083 = call %struct.patprog* @patcompile(i8* undef, i32 0, i8** null) nounwind ssp ; <%struct.patprog*> [#uses=2] + br i1 undef, label %if.end1146, label %if.then1086 + +if.then1086: ; preds = %if.end1081 + br label %if.end1146 + +if.else1090: ; preds = %if.end723 + br i1 undef, label %if.end1146, label %land.lhs.true1093 + +land.lhs.true1093: ; preds = %if.else1090 + br i1 undef, label %if.end1146, label %if.then1098 + +if.then1098: ; preds = %land.lhs.true1093 + unreachable + +if.end1146: ; preds = %land.lhs.true1093, %if.else1090, %if.then1086, %if.end1081, %cond.false1025, %land.lhs.true975, %if.end972 + %cp.0 = phi %struct.patprog* [ %call1083, %if.then1086 ], [ null, %if.end972 ], [ null, %land.lhs.true975 ], [ null, %cond.false1025 ], [ %call1083, %if.end1081 ], [ null, %if.else1090 ], [ null, %land.lhs.true1093 ] ; <%struct.patprog*> [#uses=1] + %sline.1 = phi %struct.cline* [ %sline.0, %if.then1086 ], [ %sline.0, %if.end972 ], [ %sline.0, %land.lhs.true975 ], [ %sline.0, %cond.false1025 ], [ %sline.0, %if.end1081 ], [ null, %if.else1090 ], [ null, %land.lhs.true1093 ] ; <%struct.cline*> [#uses=1] + %bcs.1 = phi i32 [ %bcs.0, %if.then1086 ], [ %bcs.0, %if.end972 ], [ %bcs.0, %land.lhs.true975 ], [ %bcs.0, %cond.false1025 ], [ %bcs.0, %if.end1081 ], [ 0, %if.else1090 ], [ 0, %land.lhs.true1093 ] ; <i32> [#uses=1] + br i1 undef, label %if.end1307, label %do.body1270 + +do.body1270: ; preds = %if.end1146 + unreachable + +if.end1307: ; preds = %if.end1146 + br i1 undef, label %if.end1318, label %if.then1312 + +if.then1312: ; preds = %if.end1307 + unreachable + +if.end1318: ; preds = %if.end1307 + br i1 undef, label %for.cond1330.preheader, label %if.then1323 + +if.then1323: ; preds = %if.end1318 + unreachable + +for.cond1330.preheader: ; preds = %if.end1318 + %call1587 = call i8* @comp_match(i8* undef, i8* undef, i8* undef, %struct.patprog* %cp.0, %struct.cline** undef, i32 0, %struct.brinfo** undef, i32 0, %struct.brinfo** undef, i32 %bcs.1, i32* undef) nounwind ssp ; <i8*> [#uses=0] + %call1667 = call %struct.cmatch* @add_match_data(i32 0, i8* undef, i8* undef, %struct.cline* undef, i8* undef, i8* null, i8* undef, i8* undef, i8* undef, i8* undef, %struct.cline* null, i8* undef, %struct.cline* %sline.1, i8* undef, i32 undef, i32 undef) ssp ; <%struct.cmatch*> [#uses=0] + unreachable +} + +declare %struct.patprog* @patcompile(i8*, i32, i8**) ssp + +declare i8* @comp_match(i8*, i8*, i8*, %struct.patprog*, %struct.cline**, i32, %struct.brinfo**, i32, %struct.brinfo**, i32, i32*) ssp + +declare %struct.cmatch* @add_match_data(i32, i8*, i8*, %struct.cline*, i8*, i8*, i8*, i8*, i8*, i8*, %struct.cline*, i8*, %struct.cline*, i8*, i32, i32) nounwind ssp diff --git a/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll b/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll new file mode 100644 index 0000000000000..e21c8923df4a0 --- /dev/null +++ b/test/CodeGen/X86/2009-07-16-LoadFoldingBug.ll @@ -0,0 +1,102 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s + +; CHECK: _foo: +; CHECK: pavgw LCPI1_4(%rip) + +; rdar://7057804 + +define void @foo(i16* %out8x8, i16* %in8x8, i32 %lastrow) optsize ssp { +entry: + %0 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2] + %1 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %0, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %2 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %3 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %2, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i10 = add <8 x i16> %0, %3 ; <<8 x i16>> [#uses=1] + %4 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> zeroinitializer, <8 x i16> %1) nounwind readnone ; <<8 x i16>> [#uses=1] + %5 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i10, <8 x i16> %4) nounwind readnone ; <<8 x i16>> [#uses=3] + %6 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %7 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518, i16 6518>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2] + %8 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %7, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %9 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %10 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %9, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i8 = add <8 x i16> %7, %10 ; <<8 x i16>> [#uses=1] + %11 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %8) nounwind readnone ; <<8 x i16>> [#uses=1] + %12 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i8, <8 x i16> %11) nounwind readnone ; <<8 x i16>> [#uses=1] + %13 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> undef, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %14 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %15 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %5, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %16 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %6, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %17 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %12, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=1] + %18 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %13, <8 x i16> %15) nounwind readnone ; <<8 x i16>> [#uses=1] + %19 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %14) nounwind readnone ; <<8 x i16>> [#uses=2] + %20 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=4] + %21 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %17) nounwind readnone ; <<8 x i16>> [#uses=1] + %22 = bitcast <8 x i16> %21 to <2 x i64> ; <<2 x i64>> [#uses=1] + %23 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2] + %24 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %23, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %25 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %26 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %25, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i6 = add <8 x i16> %23, %26 ; <<8 x i16>> [#uses=1] + %27 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %24) nounwind readnone ; <<8 x i16>> [#uses=1] + %28 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i6, <8 x i16> %27) nounwind readnone ; <<8 x i16>> [#uses=1] + %29 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170>, <8 x i16> undef) nounwind readnone ; <<8 x i16>> [#uses=2] + %30 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %29, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %31 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> zeroinitializer, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %32 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %31, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i4 = add <8 x i16> %29, %32 ; <<8 x i16>> [#uses=1] + %33 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> undef, <8 x i16> %30) nounwind readnone ; <<8 x i16>> [#uses=1] + %34 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i4, <8 x i16> %33) nounwind readnone ; <<8 x i16>> [#uses=1] + %35 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170>, <8 x i16> %20) nounwind readnone ; <<8 x i16>> [#uses=2] + %tmp.i2.i1 = mul <8 x i16> %20, <i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170, i16 23170> ; <<8 x i16>> [#uses=1] + %36 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %35, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %37 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %tmp.i2.i1, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %38 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %37, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i2 = add <8 x i16> %35, %38 ; <<8 x i16>> [#uses=1] + %39 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %19, <8 x i16> %36) nounwind readnone ; <<8 x i16>> [#uses=1] + %40 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i2, <8 x i16> %39) nounwind readnone ; <<8 x i16>> [#uses=1] + %41 = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170>, <8 x i16> %20) nounwind readnone ; <<8 x i16>> [#uses=2] + %tmp.i2.i = mul <8 x i16> %20, <i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170, i16 -23170> ; <<8 x i16>> [#uses=1] + %42 = call <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16> %41, <8 x i16> <i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384, i16 16384>) nounwind readnone ; <<8 x i16>> [#uses=1] + %43 = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %tmp.i2.i, i32 14) nounwind readnone ; <<8 x i16>> [#uses=1] + %44 = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %43, <8 x i16> zeroinitializer) nounwind readnone ; <<8 x i16>> [#uses=1] + %tmp.i.i = add <8 x i16> %41, %44 ; <<8 x i16>> [#uses=1] + %45 = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %19, <8 x i16> %42) nounwind readnone ; <<8 x i16>> [#uses=1] + %46 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %tmp.i.i, <8 x i16> %45) nounwind readnone ; <<8 x i16>> [#uses=1] + %47 = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %18, <8 x i16> %16) nounwind readnone ; <<8 x i16>> [#uses=1] + %48 = bitcast <8 x i16> %47 to <2 x i64> ; <<2 x i64>> [#uses=1] + %49 = bitcast <8 x i16> %28 to <2 x i64> ; <<2 x i64>> [#uses=1] + %50 = getelementptr i16* %out8x8, i64 8 ; <i16*> [#uses=1] + %51 = bitcast i16* %50 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %49, <2 x i64>* %51, align 16 + %52 = bitcast <8 x i16> %40 to <2 x i64> ; <<2 x i64>> [#uses=1] + %53 = getelementptr i16* %out8x8, i64 16 ; <i16*> [#uses=1] + %54 = bitcast i16* %53 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %52, <2 x i64>* %54, align 16 + %55 = getelementptr i16* %out8x8, i64 24 ; <i16*> [#uses=1] + %56 = bitcast i16* %55 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %48, <2 x i64>* %56, align 16 + %57 = bitcast <8 x i16> %46 to <2 x i64> ; <<2 x i64>> [#uses=1] + %58 = getelementptr i16* %out8x8, i64 40 ; <i16*> [#uses=1] + %59 = bitcast i16* %58 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %57, <2 x i64>* %59, align 16 + %60 = bitcast <8 x i16> %34 to <2 x i64> ; <<2 x i64>> [#uses=1] + %61 = getelementptr i16* %out8x8, i64 48 ; <i16*> [#uses=1] + %62 = bitcast i16* %61 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %60, <2 x i64>* %62, align 16 + %63 = getelementptr i16* %out8x8, i64 56 ; <i16*> [#uses=1] + %64 = bitcast i16* %63 to <2 x i64>* ; <<2 x i64>*> [#uses=1] + store <2 x i64> %22, <2 x i64>* %64, align 16 + ret void +} + +declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone + +declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone + +declare <8 x i16> @llvm.x86.sse2.pcmpeq.w(<8 x i16>, <8 x i16>) nounwind readnone + +declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone + +declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone + +declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone diff --git a/test/CodeGen/X86/2009-07-17-StackColoringBug.ll b/test/CodeGen/X86/2009-07-17-StackColoringBug.ll new file mode 100644 index 0000000000000..3e5bd348ecd97 --- /dev/null +++ b/test/CodeGen/X86/2009-07-17-StackColoringBug.ll @@ -0,0 +1,55 @@ +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -disable-fp-elim -color-ss-with-regs | not grep dil +; PR4552 + +target triple = "i386-pc-linux-gnu" +@g_8 = internal global i32 0 ; <i32*> [#uses=1] +@g_72 = internal global i32 0 ; <i32*> [#uses=1] +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i32, i8, i8)* @uint84 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define i32 @uint84(i32 %p_15, i8 signext %p_17, i8 signext %p_19) nounwind { +entry: + %g_72.promoted = load i32* @g_72 ; <i32> [#uses=1] + %g_8.promoted = load i32* @g_8 ; <i32> [#uses=1] + br label %bb + +bb: ; preds = %func_40.exit, %entry + %g_8.tmp.1 = phi i32 [ %g_8.promoted, %entry ], [ %g_8.tmp.0, %func_40.exit ] ; <i32> [#uses=3] + %g_72.tmp.1 = phi i32 [ %g_72.promoted, %entry ], [ %g_72.tmp.0, %func_40.exit ] ; <i32> [#uses=3] + %retval12.i4.i.i = trunc i32 %g_8.tmp.1 to i8 ; <i8> [#uses=2] + %0 = trunc i32 %g_72.tmp.1 to i8 ; <i8> [#uses=2] + %1 = mul i8 %retval12.i4.i.i, %0 ; <i8> [#uses=1] + %2 = icmp eq i8 %1, 0 ; <i1> [#uses=1] + br i1 %2, label %bb2.i.i, label %bb.i.i + +bb.i.i: ; preds = %bb + %3 = sext i8 %0 to i32 ; <i32> [#uses=1] + %4 = and i32 %3, 50295 ; <i32> [#uses=1] + %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1] + br i1 %5, label %bb2.i.i, label %func_55.exit.i + +bb2.i.i: ; preds = %bb.i.i, %bb + br label %func_55.exit.i + +func_55.exit.i: ; preds = %bb2.i.i, %bb.i.i + %g_72.tmp.2 = phi i32 [ 1, %bb2.i.i ], [ %g_72.tmp.1, %bb.i.i ] ; <i32> [#uses=1] + %6 = phi i32 [ 1, %bb2.i.i ], [ %g_72.tmp.1, %bb.i.i ] ; <i32> [#uses=1] + %7 = trunc i32 %6 to i8 ; <i8> [#uses=2] + %8 = mul i8 %7, %retval12.i4.i.i ; <i8> [#uses=1] + %9 = icmp eq i8 %8, 0 ; <i1> [#uses=1] + br i1 %9, label %bb2.i4.i, label %bb.i3.i + +bb.i3.i: ; preds = %func_55.exit.i + %10 = sext i8 %7 to i32 ; <i32> [#uses=1] + %11 = and i32 %10, 50295 ; <i32> [#uses=1] + %12 = icmp eq i32 %11, 0 ; <i1> [#uses=1] + br i1 %12, label %bb2.i4.i, label %func_40.exit + +bb2.i4.i: ; preds = %bb.i3.i, %func_55.exit.i + br label %func_40.exit + +func_40.exit: ; preds = %bb2.i4.i, %bb.i3.i + %g_72.tmp.0 = phi i32 [ 1, %bb2.i4.i ], [ %g_72.tmp.2, %bb.i3.i ] ; <i32> [#uses=1] + %phitmp = icmp sgt i32 %g_8.tmp.1, 0 ; <i1> [#uses=1] + %g_8.tmp.0 = select i1 %phitmp, i32 %g_8.tmp.1, i32 1 ; <i32> [#uses=1] + br label %bb +} diff --git a/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll b/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll new file mode 100644 index 0000000000000..a0095ab2064c4 --- /dev/null +++ b/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=x86-64 +; PR4583 + +define i32 @atomic_cmpset_long(i64* %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat { +entry: + %0 = call i8 asm sideeffect "\09lock ; \09\09\09cmpxchgq $2,$1 ;\09 sete\09$0 ;\09\091:\09\09\09\09# atomic_cmpset_long", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* undef, i64 undef, i64 undef, i64* undef) nounwind ; <i8> [#uses=0] + br label %1 + +; <label>:1 ; preds = %entry + ret i32 undef +} diff --git a/test/CodeGen/X86/2009-07-20-CoalescerBug.ll b/test/CodeGen/X86/2009-07-20-CoalescerBug.ll new file mode 100644 index 0000000000000..e99edd60bd5e3 --- /dev/null +++ b/test/CodeGen/X86/2009-07-20-CoalescerBug.ll @@ -0,0 +1,165 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; PR4587 +; rdar://7072590 + + %struct.re_pattern_buffer = type <{ i8*, i64, i64, i64, i8*, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8 }> + +define fastcc i32 @regex_compile(i8* %pattern, i64 %size, i64 %syntax, %struct.re_pattern_buffer* nocapture %bufp) nounwind ssp { +entry: + br i1 undef, label %return, label %if.end + +if.end: ; preds = %entry + %tmp35 = getelementptr %struct.re_pattern_buffer* %bufp, i64 0, i32 3 ; <i64*> [#uses=1] + store i64 %syntax, i64* %tmp35 + store i32 undef, i32* undef + br i1 undef, label %if.then66, label %if.end102 + +if.then66: ; preds = %if.end + br i1 false, label %if.else, label %if.then70 + +if.then70: ; preds = %if.then66 + %call74 = call i8* @xrealloc(i8* undef, i64 32) nounwind ssp ; <i8*> [#uses=0] + unreachable + +if.else: ; preds = %if.then66 + br i1 false, label %do.body86, label %if.end99 + +do.body86: ; preds = %if.else + br i1 false, label %do.end, label %if.then90 + +if.then90: ; preds = %do.body86 + unreachable + +do.end: ; preds = %do.body86 + ret i32 12 + +if.end99: ; preds = %if.else + br label %if.end102 + +if.end102: ; preds = %if.end99, %if.end + br label %while.body + +while.body: ; preds = %if.end1126, %sw.bb532, %while.body, %if.end102 + %laststart.2 = phi i8* [ null, %if.end102 ], [ %laststart.7.ph, %if.end1126 ], [ %laststart.2, %sw.bb532 ], [ %laststart.2, %while.body ] ; <i8*> [#uses=6] + %b.1 = phi i8* [ undef, %if.end102 ], [ %ctg29688, %if.end1126 ], [ %b.1, %sw.bb532 ], [ %b.1, %while.body ] ; <i8*> [#uses=5] + br i1 undef, label %while.body, label %if.end127 + +if.end127: ; preds = %while.body + switch i32 undef, label %sw.bb532 [ + i32 123, label %handle_interval + i32 92, label %do.body3527 + ] + +sw.bb532: ; preds = %if.end127 + br i1 undef, label %while.body, label %if.end808 + +if.end808: ; preds = %sw.bb532 + br i1 undef, label %while.cond1267.preheader, label %if.then811 + +while.cond1267.preheader: ; preds = %if.end808 + br i1 false, label %return, label %if.end1294 + +if.then811: ; preds = %if.end808 + %call817 = call fastcc i8* @skip_one_char(i8* %laststart.2) ssp ; <i8*> [#uses=0] + br i1 undef, label %cond.end834, label %lor.lhs.false827 + +lor.lhs.false827: ; preds = %if.then811 + br label %cond.end834 + +cond.end834: ; preds = %lor.lhs.false827, %if.then811 + br i1 undef, label %land.lhs.true838, label %while.cond979.preheader + +land.lhs.true838: ; preds = %cond.end834 + br i1 undef, label %if.then842, label %while.cond979.preheader + +if.then842: ; preds = %land.lhs.true838 + %conv851 = trunc i64 undef to i32 ; <i32> [#uses=1] + br label %while.cond979.preheader + +while.cond979.preheader: ; preds = %if.then842, %land.lhs.true838, %cond.end834 + %startoffset.0.ph = phi i32 [ 0, %cond.end834 ], [ 0, %land.lhs.true838 ], [ %conv851, %if.then842 ] ; <i32> [#uses=2] + %laststart.7.ph = phi i8* [ %laststart.2, %cond.end834 ], [ %laststart.2, %land.lhs.true838 ], [ %laststart.2, %if.then842 ] ; <i8*> [#uses=3] + %b.4.ph = phi i8* [ %b.1, %cond.end834 ], [ %b.1, %land.lhs.true838 ], [ %b.1, %if.then842 ] ; <i8*> [#uses=3] + %ctg29688 = getelementptr i8* %b.4.ph, i64 6 ; <i8*> [#uses=1] + br label %while.cond979 + +while.cond979: ; preds = %if.end1006, %while.cond979.preheader + %cmp991 = icmp ugt i64 undef, 0 ; <i1> [#uses=1] + br i1 %cmp991, label %do.body994, label %while.end1088 + +do.body994: ; preds = %while.cond979 + br i1 undef, label %return, label %if.end1006 + +if.end1006: ; preds = %do.body994 + %cmp1014 = icmp ugt i64 undef, 32768 ; <i1> [#uses=1] + %storemerge10953 = select i1 %cmp1014, i64 32768, i64 undef ; <i64> [#uses=1] + store i64 %storemerge10953, i64* undef + br i1 false, label %return, label %while.cond979 + +while.end1088: ; preds = %while.cond979 + br i1 undef, label %if.then1091, label %if.else1101 + +if.then1091: ; preds = %while.end1088 + store i8 undef, i8* undef + %idx.ext1132.pre = zext i32 %startoffset.0.ph to i64 ; <i64> [#uses=1] + %add.ptr1133.pre = getelementptr i8* %laststart.7.ph, i64 %idx.ext1132.pre ; <i8*> [#uses=1] + %sub.ptr.lhs.cast1135.pre = ptrtoint i8* %add.ptr1133.pre to i64 ; <i64> [#uses=1] + br label %if.end1126 + +if.else1101: ; preds = %while.end1088 + %cond1109 = select i1 undef, i32 18, i32 14 ; <i32> [#uses=1] + %idx.ext1112 = zext i32 %startoffset.0.ph to i64 ; <i64> [#uses=1] + %add.ptr1113 = getelementptr i8* %laststart.7.ph, i64 %idx.ext1112 ; <i8*> [#uses=2] + %sub.ptr.rhs.cast1121 = ptrtoint i8* %add.ptr1113 to i64 ; <i64> [#uses=1] + call fastcc void @insert_op1(i32 %cond1109, i8* %add.ptr1113, i32 undef, i8* %b.4.ph) ssp + br label %if.end1126 + +if.end1126: ; preds = %if.else1101, %if.then1091 + %sub.ptr.lhs.cast1135.pre-phi = phi i64 [ %sub.ptr.rhs.cast1121, %if.else1101 ], [ %sub.ptr.lhs.cast1135.pre, %if.then1091 ] ; <i64> [#uses=1] + %add.ptr1128 = getelementptr i8* %b.4.ph, i64 3 ; <i8*> [#uses=1] + %sub.ptr.rhs.cast1136 = ptrtoint i8* %add.ptr1128 to i64 ; <i64> [#uses=1] + %sub.ptr.sub1137 = sub i64 %sub.ptr.lhs.cast1135.pre-phi, %sub.ptr.rhs.cast1136 ; <i64> [#uses=1] + %sub.ptr.sub11378527 = trunc i64 %sub.ptr.sub1137 to i32 ; <i32> [#uses=1] + %conv1139 = add i32 %sub.ptr.sub11378527, -3 ; <i32> [#uses=1] + store i8 undef, i8* undef + %shr10.i8599 = lshr i32 %conv1139, 8 ; <i32> [#uses=1] + %conv6.i8600 = trunc i32 %shr10.i8599 to i8 ; <i8> [#uses=1] + store i8 %conv6.i8600, i8* undef + br label %while.body + +if.end1294: ; preds = %while.cond1267.preheader + ret i32 12 + +do.body3527: ; preds = %if.end127 + br i1 undef, label %do.end3536, label %if.then3531 + +if.then3531: ; preds = %do.body3527 + unreachable + +do.end3536: ; preds = %do.body3527 + ret i32 5 + +handle_interval: ; preds = %if.end127 + br i1 undef, label %do.body4547, label %cond.false4583 + +do.body4547: ; preds = %handle_interval + br i1 undef, label %do.end4556, label %if.then4551 + +if.then4551: ; preds = %do.body4547 + unreachable + +do.end4556: ; preds = %do.body4547 + ret i32 9 + +cond.false4583: ; preds = %handle_interval + unreachable + +return: ; preds = %if.end1006, %do.body994, %while.cond1267.preheader, %entry + ret i32 undef +} + +declare i8* @xrealloc(i8*, i64) ssp + +declare fastcc i8* @skip_one_char(i8*) nounwind readonly ssp + +declare fastcc void @insert_op1(i32, i8*, i32, i8*) nounwind ssp diff --git a/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll b/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll new file mode 100644 index 0000000000000..e83b3a7db5921 --- /dev/null +++ b/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -march=x86 + +@bsBuff = internal global i32 0 ; <i32*> [#uses=1] +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define fastcc i32 @bsGetUInt32() nounwind ssp { +entry: + %bsBuff.promoted44 = load i32* @bsBuff ; <i32> [#uses=1] + %0 = add i32 0, -8 ; <i32> [#uses=1] + %1 = lshr i32 %bsBuff.promoted44, %0 ; <i32> [#uses=1] + %2 = shl i32 %1, 8 ; <i32> [#uses=1] + br label %bb3.i17 + +bb3.i9: ; preds = %bb3.i17 + br i1 false, label %bb2.i16, label %bb1.i15 + +bb1.i15: ; preds = %bb3.i9 + unreachable + +bb2.i16: ; preds = %bb3.i9 + br label %bb3.i17 + +bb3.i17: ; preds = %bb2.i16, %entry + br i1 false, label %bb3.i9, label %bsR.exit18 + +bsR.exit18: ; preds = %bb3.i17 + %3 = or i32 0, %2 ; <i32> [#uses=0] + ret i32 0 +} diff --git a/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll new file mode 100644 index 0000000000000..b9b09a3f00042 --- /dev/null +++ b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -march=x86-64 +; PR4669 +declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) + +define <1 x i64> @test(i64 %t) { +entry: + %t1 = insertelement <1 x i64> undef, i64 %t, i32 0 + %t2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %t1, i32 48) + ret <1 x i64> %t2 +} diff --git a/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll new file mode 100644 index 0000000000000..b329c9163c9f5 --- /dev/null +++ b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll @@ -0,0 +1,142 @@ +; RUN: llc < %s -O3 +; PR4626 +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" +@g_3 = common global i8 0, align 1 ; <i8*> [#uses=2] + +define signext i8 @safe_mul_func_int16_t_s_s(i32 %_si1, i8 signext %_si2) nounwind readnone { +entry: + %tobool = icmp eq i32 %_si1, 0 ; <i1> [#uses=1] + %cmp = icmp sgt i8 %_si2, 0 ; <i1> [#uses=2] + %or.cond = or i1 %cmp, %tobool ; <i1> [#uses=1] + br i1 %or.cond, label %lor.rhs, label %land.lhs.true3 + +land.lhs.true3: ; preds = %entry + %conv5 = sext i8 %_si2 to i32 ; <i32> [#uses=1] + %cmp7 = icmp slt i32 %conv5, %_si1 ; <i1> [#uses=1] + br i1 %cmp7, label %cond.end, label %lor.rhs + +lor.rhs: ; preds = %land.lhs.true3, %entry + %cmp10.not = icmp slt i32 %_si1, 1 ; <i1> [#uses=1] + %or.cond23 = and i1 %cmp, %cmp10.not ; <i1> [#uses=1] + br i1 %or.cond23, label %lor.end, label %cond.false + +lor.end: ; preds = %lor.rhs + %tobool19 = icmp ne i8 %_si2, 0 ; <i1> [#uses=2] + %lor.ext = zext i1 %tobool19 to i32 ; <i32> [#uses=1] + br i1 %tobool19, label %cond.end, label %cond.false + +cond.false: ; preds = %lor.end, %lor.rhs + %conv21 = sext i8 %_si2 to i32 ; <i32> [#uses=1] + br label %cond.end + +cond.end: ; preds = %cond.false, %lor.end, %land.lhs.true3 + %cond = phi i32 [ %conv21, %cond.false ], [ 1, %land.lhs.true3 ], [ %lor.ext, %lor.end ] ; <i32> [#uses=1] + %conv22 = trunc i32 %cond to i8 ; <i8> [#uses=1] + ret i8 %conv22 +} + +define i32 @func_34(i8 signext %p_35) nounwind readonly { +entry: + %tobool = icmp eq i8 %p_35, 0 ; <i1> [#uses=1] + br i1 %tobool, label %lor.lhs.false, label %if.then + +lor.lhs.false: ; preds = %entry + %tmp1 = load i8* @g_3 ; <i8> [#uses=1] + %tobool3 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1] + br i1 %tobool3, label %return, label %if.then + +if.then: ; preds = %lor.lhs.false, %entry + %tmp4 = load i8* @g_3 ; <i8> [#uses=1] + %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1] + ret i32 %conv5 + +return: ; preds = %lor.lhs.false + ret i32 0 +} + +define void @foo(i32 %p_5) noreturn nounwind { +entry: + %cmp = icmp sgt i32 %p_5, 0 ; <i1> [#uses=2] + %call = tail call i32 @safe() nounwind ; <i32> [#uses=1] + %conv1 = trunc i32 %call to i8 ; <i8> [#uses=3] + %tobool.i = xor i1 %cmp, true ; <i1> [#uses=3] + %cmp.i = icmp sgt i8 %conv1, 0 ; <i1> [#uses=3] + %or.cond.i = or i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + br i1 %or.cond.i, label %lor.rhs.i, label %land.lhs.true3.i + +land.lhs.true3.i: ; preds = %entry + %xor = zext i1 %cmp to i32 ; <i32> [#uses=1] + %conv5.i = sext i8 %conv1 to i32 ; <i32> [#uses=1] + %cmp7.i = icmp slt i32 %conv5.i, %xor ; <i1> [#uses=1] + %cmp7.i.not = xor i1 %cmp7.i, true ; <i1> [#uses=1] + %or.cond23.i = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + %or.cond = and i1 %cmp7.i.not, %or.cond23.i ; <i1> [#uses=1] + br i1 %or.cond, label %lor.end.i, label %for.inc + +lor.rhs.i: ; preds = %entry + %or.cond23.i.old = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + br i1 %or.cond23.i.old, label %lor.end.i, label %for.inc + +lor.end.i: ; preds = %lor.rhs.i, %land.lhs.true3.i + %tobool19.i = icmp eq i8 %conv1, 0 ; <i1> [#uses=0] + br label %for.inc + +for.inc: ; preds = %for.inc, %lor.end.i, %lor.rhs.i, %land.lhs.true3.i + br label %for.inc +} + +declare i32 @safe() + +define i32 @func_35(i8 signext %p_35) nounwind readonly { +entry: + %tobool = icmp eq i8 %p_35, 0 ; <i1> [#uses=1] + br i1 %tobool, label %lor.lhs.false, label %if.then + +lor.lhs.false: ; preds = %entry + %tmp1 = load i8* @g_3 ; <i8> [#uses=1] + %tobool3 = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1] + br i1 %tobool3, label %return, label %if.then + +if.then: ; preds = %lor.lhs.false, %entry + %tmp4 = load i8* @g_3 ; <i8> [#uses=1] + %conv5 = sext i8 %tmp4 to i32 ; <i32> [#uses=1] + ret i32 %conv5 + +return: ; preds = %lor.lhs.false + ret i32 0 +} + +define void @bar(i32 %p_5) noreturn nounwind { +entry: + %cmp = icmp sgt i32 %p_5, 0 ; <i1> [#uses=2] + %call = tail call i32 @safe() nounwind ; <i32> [#uses=1] + %conv1 = trunc i32 %call to i8 ; <i8> [#uses=3] + %tobool.i = xor i1 %cmp, true ; <i1> [#uses=3] + %cmp.i = icmp sgt i8 %conv1, 0 ; <i1> [#uses=3] + %or.cond.i = or i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + br i1 %or.cond.i, label %lor.rhs.i, label %land.lhs.true3.i + +land.lhs.true3.i: ; preds = %entry + %xor = zext i1 %cmp to i32 ; <i32> [#uses=1] + %conv5.i = sext i8 %conv1 to i32 ; <i32> [#uses=1] + %cmp7.i = icmp slt i32 %conv5.i, %xor ; <i1> [#uses=1] + %cmp7.i.not = xor i1 %cmp7.i, true ; <i1> [#uses=1] + %or.cond23.i = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + %or.cond = and i1 %cmp7.i.not, %or.cond23.i ; <i1> [#uses=1] + br i1 %or.cond, label %lor.end.i, label %for.inc + +lor.rhs.i: ; preds = %entry + %or.cond23.i.old = and i1 %cmp.i, %tobool.i ; <i1> [#uses=1] + br i1 %or.cond23.i.old, label %lor.end.i, label %for.inc + +lor.end.i: ; preds = %lor.rhs.i, %land.lhs.true3.i + %tobool19.i = icmp eq i8 %conv1, 0 ; <i1> [#uses=0] + br label %for.inc + +for.inc: ; preds = %for.inc, %lor.end.i, %lor.rhs.i, %land.lhs.true3.i + br label %for.inc +} + +declare i32 @safe() diff --git a/test/CodeGen/X86/2009-08-06-inlineasm.ll b/test/CodeGen/X86/2009-08-06-inlineasm.ll new file mode 100644 index 0000000000000..cc2f3d824bbe7 --- /dev/null +++ b/test/CodeGen/X86/2009-08-06-inlineasm.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s +; PR4668 +; ModuleID = '<stdin>' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" + +define i32 @x(i32 %qscale) nounwind { +entry: + %temp_block = alloca [64 x i16], align 16 ; <[64 x i16]*> [#uses=0] + %tmp = call i32 asm sideeffect "xor %edx, %edx", "={dx},~{dirflag},~{fpsr},~{flags}"() nounwind ; <i32> [#uses=1] + br i1 undef, label %if.end78, label %if.then28 + +if.then28: ; preds = %entry + br label %if.end78 + +if.end78: ; preds = %if.then28, %entry + %level.1 = phi i32 [ %tmp, %if.then28 ], [ 0, %entry ] ; <i32> [#uses=1] + %add.ptr1 = getelementptr [64 x i16]* null, i32 0, i32 %qscale ; <i16*> [#uses=1] + %add.ptr2 = getelementptr [64 x i16]* null, i32 1, i32 %qscale ; <i16*> [#uses=1] + %add.ptr3 = getelementptr [64 x i16]* null, i32 2, i32 %qscale ; <i16*> [#uses=1] + %add.ptr4 = getelementptr [64 x i16]* null, i32 3, i32 %qscale ; <i16*> [#uses=1] + %add.ptr5 = getelementptr [64 x i16]* null, i32 4, i32 %qscale ; <i16*> [#uses=1] + %add.ptr6 = getelementptr [64 x i16]* null, i32 5, i32 %qscale ; <i16*> [#uses=1] + %tmp1 = call i32 asm sideeffect "nop", "={ax},r,r,r,r,r,0,~{dirflag},~{fpsr},~{flags}"(i16* %add.ptr6, i16* %add.ptr5, i16* %add.ptr4, i16* %add.ptr3, i16* %add.ptr2, i16* %add.ptr1) nounwind ; <i32> [#uses=0] + ret i32 %level.1 +} diff --git a/test/CodeGen/X86/2009-08-08-CastError.ll b/test/CodeGen/X86/2009-08-08-CastError.ll new file mode 100644 index 0000000000000..9456d91efaaba --- /dev/null +++ b/test/CodeGen/X86/2009-08-08-CastError.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=x86_64-mingw64 | grep movabsq + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +define <4 x float> @RecursiveTestFunc1(i8*) { +EntryBlock: + %1 = call <4 x float> inttoptr (i64 5367207198 to <4 x float> (i8*, float, float, float, float)*)(i8* %0, float 8.000000e+00, float 5.000000e+00, float 3.000000e+00, float 4.000000e+00) ; <<4 x float>> [#uses=1] + ret <4 x float> %1 +} diff --git a/test/CodeGen/X86/2009-08-12-badswitch.ll b/test/CodeGen/X86/2009-08-12-badswitch.ll new file mode 100644 index 0000000000000..a94fce04ee019 --- /dev/null +++ b/test/CodeGen/X86/2009-08-12-badswitch.ll @@ -0,0 +1,176 @@ +; RUN: llc < %s | grep LJT +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10" + +declare void @f1() nounwind readnone +declare void @f2() nounwind readnone +declare void @f3() nounwind readnone +declare void @f4() nounwind readnone +declare void @f5() nounwind readnone +declare void @f6() nounwind readnone +declare void @f7() nounwind readnone +declare void @f8() nounwind readnone +declare void @f9() nounwind readnone +declare void @f10() nounwind readnone +declare void @f11() nounwind readnone +declare void @f12() nounwind readnone +declare void @f13() nounwind readnone +declare void @f14() nounwind readnone +declare void @f15() nounwind readnone +declare void @f16() nounwind readnone +declare void @f17() nounwind readnone +declare void @f18() nounwind readnone +declare void @f19() nounwind readnone +declare void @f20() nounwind readnone +declare void @f21() nounwind readnone +declare void @f22() nounwind readnone +declare void @f23() nounwind readnone +declare void @f24() nounwind readnone +declare void @f25() nounwind readnone +declare void @f26() nounwind readnone + +define internal fastcc i32 @foo(i64 %bar) nounwind ssp { +entry: + br label %bb49 + +bb49: + switch i64 %bar, label %RETURN [ + i64 2, label %RRETURN_2 + i64 3, label %RRETURN_6 + i64 4, label %RRETURN_7 + i64 5, label %RRETURN_14 + i64 6, label %RRETURN_15 + i64 7, label %RRETURN_16 + i64 8, label %RRETURN_17 + i64 9, label %RRETURN_18 + i64 10, label %RRETURN_19 + i64 11, label %RRETURN_20 + i64 12, label %RRETURN_21 + i64 13, label %RRETURN_22 + i64 14, label %RRETURN_24 + i64 15, label %RRETURN_26 + i64 16, label %RRETURN_27 + i64 17, label %RRETURN_28 + i64 18, label %RRETURN_29 + i64 19, label %RRETURN_30 + i64 20, label %RRETURN_31 + i64 21, label %RRETURN_38 + i64 22, label %RRETURN_40 + i64 23, label %RRETURN_42 + i64 24, label %RRETURN_44 + i64 25, label %RRETURN_48 + i64 26, label %RRETURN_52 + i64 27, label %RRETURN_1 + ] + +RETURN: + call void @f1() + br label %EXIT + +RRETURN_2: ; preds = %bb49 + call void @f2() + br label %EXIT + +RRETURN_6: ; preds = %bb49 + call void @f2() + br label %EXIT + +RRETURN_7: ; preds = %bb49 + call void @f3() + br label %EXIT + +RRETURN_14: ; preds = %bb49 + call void @f4() + br label %EXIT + +RRETURN_15: ; preds = %bb49 + call void @f5() + br label %EXIT + +RRETURN_16: ; preds = %bb49 + call void @f6() + br label %EXIT + +RRETURN_17: ; preds = %bb49 + call void @f7() + br label %EXIT + +RRETURN_18: ; preds = %bb49 + call void @f8() + br label %EXIT + +RRETURN_19: ; preds = %bb49 + call void @f9() + br label %EXIT + +RRETURN_20: ; preds = %bb49 + call void @f10() + br label %EXIT + +RRETURN_21: ; preds = %bb49 + call void @f11() + br label %EXIT + +RRETURN_22: ; preds = %bb49 + call void @f12() + br label %EXIT + +RRETURN_24: ; preds = %bb49 + call void @f13() + br label %EXIT + +RRETURN_26: ; preds = %bb49 + call void @f14() + br label %EXIT + +RRETURN_27: ; preds = %bb49 + call void @f15() + br label %EXIT + +RRETURN_28: ; preds = %bb49 + call void @f16() + br label %EXIT + +RRETURN_29: ; preds = %bb49 + call void @f17() + br label %EXIT + +RRETURN_30: ; preds = %bb49 + call void @f18() + br label %EXIT + +RRETURN_31: ; preds = %bb49 + call void @f19() + br label %EXIT + +RRETURN_38: ; preds = %bb49 + call void @f20() + br label %EXIT + +RRETURN_40: ; preds = %bb49 + call void @f21() + br label %EXIT + +RRETURN_42: ; preds = %bb49 + call void @f22() + br label %EXIT + +RRETURN_44: ; preds = %bb49 + call void @f23() + br label %EXIT + +RRETURN_48: ; preds = %bb49 + call void @f24() + br label %EXIT + +RRETURN_52: ; preds = %bb49 + call void @f25() + br label %EXIT + +RRETURN_1: ; preds = %bb49 + call void @f26() + br label %EXIT + +EXIT: + ret i32 0 +} diff --git a/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll new file mode 100644 index 0000000000000..6b0d6d9790de4 --- /dev/null +++ b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll @@ -0,0 +1,57 @@ +; RUN: llc < %s +target triple = "x86_64-mingw" + +; ModuleID = 'mm.bc' + type opaque ; type %0 + type opaque ; type %1 + +define internal fastcc float @computeMipmappingRho(%0* %shaderExecutionStatePtr, i32 %index, <4 x float> %texCoord, <4 x float> %texCoordDX, <4 x float> %texCoordDY) readonly { +indexCheckBlock: + %indexCmp = icmp ugt i32 %index, 16 ; <i1> [#uses=1] + br i1 %indexCmp, label %zeroReturnBlock, label %primitiveTextureFetchBlock + +primitiveTextureFetchBlock: ; preds = %indexCheckBlock + %pointerArithmeticTmp = bitcast %0* %shaderExecutionStatePtr to i8* ; <i8*> [#uses=1] + %pointerArithmeticTmp1 = getelementptr i8* %pointerArithmeticTmp, i64 1808 ; <i8*> [#uses=1] + %pointerArithmeticTmp2 = bitcast i8* %pointerArithmeticTmp1 to %1** ; <%1**> [#uses=1] + %primitivePtr = load %1** %pointerArithmeticTmp2 ; <%1*> [#uses=1] + %pointerArithmeticTmp3 = bitcast %1* %primitivePtr to i8* ; <i8*> [#uses=1] + %pointerArithmeticTmp4 = getelementptr i8* %pointerArithmeticTmp3, i64 19408 ; <i8*> [#uses=1] + %pointerArithmeticTmp5 = bitcast i8* %pointerArithmeticTmp4 to %1** ; <%1**> [#uses=1] + %primitiveTexturePtr = getelementptr %1** %pointerArithmeticTmp5, i32 %index ; <%1**> [#uses=1] + %primitiveTexturePtr6 = load %1** %primitiveTexturePtr ; <%1*> [#uses=2] + br label %textureCheckBlock + +textureCheckBlock: ; preds = %primitiveTextureFetchBlock + %texturePtrInt = ptrtoint %1* %primitiveTexturePtr6 to i64 ; <i64> [#uses=1] + %testTextureNULL = icmp eq i64 %texturePtrInt, 0 ; <i1> [#uses=1] + br i1 %testTextureNULL, label %zeroReturnBlock, label %rhoCalculateBlock + +rhoCalculateBlock: ; preds = %textureCheckBlock + %pointerArithmeticTmp7 = bitcast %1* %primitiveTexturePtr6 to i8* ; <i8*> [#uses=1] + %pointerArithmeticTmp8 = getelementptr i8* %pointerArithmeticTmp7, i64 640 ; <i8*> [#uses=1] + %pointerArithmeticTmp9 = bitcast i8* %pointerArithmeticTmp8 to <4 x float>* ; <<4 x float>*> [#uses=1] + %dimensionsPtr = load <4 x float>* %pointerArithmeticTmp9, align 1 ; <<4 x float>> [#uses=2] + %texDiffDX = fsub <4 x float> %texCoordDX, %texCoord ; <<4 x float>> [#uses=1] + %texDiffDY = fsub <4 x float> %texCoordDY, %texCoord ; <<4 x float>> [#uses=1] + %ddx = fmul <4 x float> %texDiffDX, %dimensionsPtr ; <<4 x float>> [#uses=2] + %ddx10 = fmul <4 x float> %texDiffDY, %dimensionsPtr ; <<4 x float>> [#uses=2] + %ddxSquared = fmul <4 x float> %ddx, %ddx ; <<4 x float>> [#uses=3] + %0 = shufflevector <4 x float> %ddxSquared, <4 x float> %ddxSquared, <4 x i32> <i32 1, i32 0, i32 0, i32 0> ; <<4 x float>> [#uses=1] + %dxSquared = fadd <4 x float> %ddxSquared, %0 ; <<4 x float>> [#uses=1] + %1 = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %dxSquared) ; <<4 x float>> [#uses=1] + %ddySquared = fmul <4 x float> %ddx10, %ddx10 ; <<4 x float>> [#uses=3] + %2 = shufflevector <4 x float> %ddySquared, <4 x float> %ddySquared, <4 x i32> <i32 1, i32 0, i32 0, i32 0> ; <<4 x float>> [#uses=1] + %dySquared = fadd <4 x float> %ddySquared, %2 ; <<4 x float>> [#uses=1] + %3 = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %dySquared) ; <<4 x float>> [#uses=1] + %4 = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %1, <4 x float> %3) ; <<4 x float>> [#uses=1] + %rho = extractelement <4 x float> %4, i32 0 ; <float> [#uses=1] + ret float %rho + +zeroReturnBlock: ; preds = %textureCheckBlock, %indexCheckBlock + ret float 0.000000e+00 +} + +declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone + +declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone diff --git a/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll b/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll new file mode 100644 index 0000000000000..5f6cf3b9e0bbc --- /dev/null +++ b/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-pc-linux | FileCheck %s + +@a = external global i96, align 4 +@b = external global i64, align 8 + +define void @c() nounwind { +; CHECK: movl a+8, %eax + %srcval1 = load i96* @a, align 4 + %sroa.store.elt2 = lshr i96 %srcval1, 64 + %tmp = trunc i96 %sroa.store.elt2 to i64 +; CHECK: movl %eax, b +; CHECK: movl $0, b+4 + store i64 %tmp, i64* @b, align 8 + ret void +} diff --git a/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll b/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll new file mode 100644 index 0000000000000..790fd88c46dd1 --- /dev/null +++ b/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86 +; PR4753 + +; This function has a sub-register reuse undone. + +@uint8 = external global i32 ; <i32*> [#uses=3] + +declare signext i8 @foo(i32, i8 signext) nounwind readnone + +declare signext i8 @bar(i32, i8 signext) nounwind readnone + +define i32 @uint80(i8 signext %p_52) nounwind { +entry: + %0 = sext i8 %p_52 to i16 ; <i16> [#uses=1] + %1 = tail call i32 @func_24(i16 zeroext %0, i8 signext ptrtoint (i8 (i32, i8)* @foo to i8)) nounwind; <i32> [#uses=1] + %2 = trunc i32 %1 to i8 ; <i8> [#uses=1] + %3 = or i8 %2, 1 ; <i8> [#uses=1] + %4 = tail call i32 @safe(i32 1) nounwind ; <i32> [#uses=0] + %5 = tail call i32 @func_24(i16 zeroext 0, i8 signext undef) nounwind; <i32> [#uses=1] + %6 = trunc i32 %5 to i8 ; <i8> [#uses=1] + %7 = xor i8 %3, %p_52 ; <i8> [#uses=1] + %8 = xor i8 %7, %6 ; <i8> [#uses=1] + %9 = icmp ne i8 %p_52, 0 ; <i1> [#uses=1] + %10 = zext i1 %9 to i8 ; <i8> [#uses=1] + %11 = tail call i32 @func_24(i16 zeroext ptrtoint (i8 (i32, i8)* @bar to i16), i8 signext %10) nounwind; <i32> [#uses=1] + %12 = tail call i32 @func_24(i16 zeroext 0, i8 signext 1) nounwind; <i32> [#uses=0] + br i1 undef, label %bb2, label %bb + +bb: ; preds = %entry + br i1 undef, label %bb2, label %bb3 + +bb2: ; preds = %bb, %entry + br label %bb3 + +bb3: ; preds = %bb2, %bb + %iftmp.2.0 = phi i32 [ 0, %bb2 ], [ 1, %bb ] ; <i32> [#uses=1] + %13 = icmp ne i32 %11, %iftmp.2.0 ; <i1> [#uses=1] + %14 = tail call i32 @safe(i32 -2) nounwind ; <i32> [#uses=0] + %15 = zext i1 %13 to i8 ; <i8> [#uses=1] + %16 = tail call signext i8 @func_53(i8 signext undef, i8 signext 1, i8 signext %15, i8 signext %8) nounwind; <i8> [#uses=0] + br i1 undef, label %bb5, label %bb4 + +bb4: ; preds = %bb3 + %17 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0] + br label %bb5 + +bb5: ; preds = %bb4, %bb3 + %18 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0] + %19 = sext i8 undef to i16 ; <i16> [#uses=1] + %20 = tail call i32 @func_24(i16 zeroext %19, i8 signext 1) nounwind; <i32> [#uses=0] + br i1 undef, label %return, label %bb6.preheader + +bb6.preheader: ; preds = %bb5 + %21 = sext i8 %p_52 to i32 ; <i32> [#uses=1] + %22 = volatile load i32* @uint8, align 4 ; <i32> [#uses=0] + %23 = tail call i32 (...)* @safefuncts(i32 %21, i32 1) nounwind; <i32> [#uses=0] + unreachable + +return: ; preds = %bb5 + ret i32 undef +} + +declare i32 @func_24(i16 zeroext, i8 signext) + +declare i32 @safe(i32) + +declare signext i8 @func_53(i8 signext, i8 signext, i8 signext, i8 signext) + +declare i32 @safefuncts(...) diff --git a/test/CodeGen/X86/2009-08-23-linkerprivate.ll b/test/CodeGen/X86/2009-08-23-linkerprivate.ll new file mode 100644 index 0000000000000..3da8f00a60437 --- /dev/null +++ b/test/CodeGen/X86/2009-08-23-linkerprivate.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s + +; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm' + +@"\01l_objc_msgSend_fixup_alloc" = linker_private hidden global i32 0, section "__DATA, __objc_msgrefs, coalesced", align 16 ; <i32*> [#uses=0] + +; CHECK: .globl l_objc_msgSend_fixup_alloc +; CHECK: .weak_definition l_objc_msgSend_fixup_alloc diff --git a/test/CodeGen/X86/2009-09-07-CoalescerBug.ll b/test/CodeGen/X86/2009-09-07-CoalescerBug.ll new file mode 100644 index 0000000000000..55432be1c2c98 --- /dev/null +++ b/test/CodeGen/X86/2009-09-07-CoalescerBug.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2 -code-model=kernel | FileCheck %s +; PR4689 + +%struct.__s = type { [8 x i8] } +%struct.pcb = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i16, i8* } +%struct.pcpu = type { i32*, i32*, i32*, i32*, %struct.pcb*, i64, i32, i32, i32, i32 } + +define i64 @hammer_time(i64 %modulep, i64 %physfree) nounwind ssp noredzone noimplicitfloat { +; CHECK: hammer_time: +; CHECK: movq $Xrsvd, %rax +; CHECK: movq $Xrsvd, %rdi +; CHECK: movq $Xrsvd, %r8 +entry: + br i1 undef, label %if.then, label %if.end + +if.then: ; preds = %entry + br label %if.end + +if.end: ; preds = %if.then, %entry + br label %for.body + +for.body: ; preds = %for.inc, %if.end + switch i32 undef, label %if.then76 [ + i32 9, label %for.inc + i32 10, label %for.inc + i32 11, label %for.inc + i32 12, label %for.inc + ] + +if.then76: ; preds = %for.body + unreachable + +for.inc: ; preds = %for.body, %for.body, %for.body, %for.body + br i1 undef, label %for.end, label %for.body + +for.end: ; preds = %for.inc + call void asm sideeffect "mov $1,%gs:$0", "=*m,r,~{dirflag},~{fpsr},~{flags}"(%struct.__s* bitcast (%struct.pcb** getelementptr (%struct.pcpu* null, i32 0, i32 4) to %struct.__s*), i64 undef) nounwind + br label %for.body170 + +for.body170: ; preds = %for.body170, %for.end + store i64 or (i64 and (i64 or (i64 ptrtoint (void (i32, i32, i32, i32)* @Xrsvd to i64), i64 2097152), i64 2162687), i64 or (i64 or (i64 and (i64 shl (i64 ptrtoint (void (i32, i32, i32, i32)* @Xrsvd to i64), i64 32), i64 -281474976710656), i64 140737488355328), i64 15393162788864)), i64* undef + br i1 undef, label %for.end175, label %for.body170 + +for.end175: ; preds = %for.body170 + unreachable +} + +declare void @Xrsvd(i32, i32, i32, i32) ssp noredzone noimplicitfloat diff --git a/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll new file mode 100644 index 0000000000000..9e58872b73c85 --- /dev/null +++ b/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim | FileCheck %s + +; It's not legal to fold a load from 32-bit stack slot into a 64-bit +; instruction. If done, the instruction does a 64-bit load and that's not +; safe. This can happen we a subreg_to_reg 0 has been coalesced. One +; exception is when the instruction that folds the load is a move, then we +; can simply turn it into a 32-bit load from the stack slot. +; rdar://7170444 + +%struct.ComplexType = type { i32 } + +define i32 @t(i32 %clientPort, i32 %pluginID, i32 %requestID, i32 %objectID, i64 %serverIdentifier, i64 %argumentsData, i32 %argumentsLength) ssp { +entry: +; CHECK: _t: +; CHECK: movl 16(%rbp), +; CHECK: movl 16(%rbp), %edx + %0 = zext i32 %argumentsLength to i64 ; <i64> [#uses=1] + %1 = zext i32 %clientPort to i64 ; <i64> [#uses=1] + %2 = inttoptr i64 %1 to %struct.ComplexType* ; <%struct.ComplexType*> [#uses=1] + %3 = invoke i8* @pluginInstance(i8* undef, i32 %pluginID) + to label %invcont unwind label %lpad ; <i8*> [#uses=1] + +invcont: ; preds = %entry + %4 = add i32 %requestID, %pluginID ; <i32> [#uses=0] + %5 = invoke zeroext i8 @invoke(i8* %3, i32 %objectID, i8* undef, i64 %argumentsData, i32 %argumentsLength, i64* undef, i32* undef) + to label %invcont1 unwind label %lpad ; <i8> [#uses=0] + +invcont1: ; preds = %invcont + %6 = getelementptr inbounds %struct.ComplexType* %2, i64 0, i32 0 ; <i32*> [#uses=1] + %7 = load i32* %6, align 4 ; <i32> [#uses=1] + invoke void @booleanAndDataReply(i32 %7, i32 undef, i32 %requestID, i32 undef, i64 undef, i32 undef) + to label %invcont2 unwind label %lpad + +invcont2: ; preds = %invcont1 + ret i32 0 + +lpad: ; preds = %invcont1, %invcont, %entry + %8 = call i32 @vm_deallocate(i32 undef, i64 0, i64 %0) ; <i32> [#uses=0] + unreachable +} + +declare i32 @vm_deallocate(i32, i64, i64) + +declare i8* @pluginInstance(i8*, i32) + +declare zeroext i8 @invoke(i8*, i32, i8*, i64, i32, i64*, i32*) + +declare void @booleanAndDataReply(i32, i32, i32, i32, i64, i32) diff --git a/test/CodeGen/X86/2009-09-16-CoalescerBug.ll b/test/CodeGen/X86/2009-09-16-CoalescerBug.ll new file mode 100644 index 0000000000000..18b5a179c9ef3 --- /dev/null +++ b/test/CodeGen/X86/2009-09-16-CoalescerBug.ll @@ -0,0 +1,64 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 +; PR4910 + +%0 = type { i32, i32, i32, i32 } + +@boot_cpu_id = external global i32 ; <i32*> [#uses=1] +@cpu_logical = common global i32 0, align 4 ; <i32*> [#uses=1] + +define void @topo_probe_0xb() nounwind ssp { +entry: + br label %for.cond + +for.cond: ; preds = %for.inc38, %entry + %0 = phi i32 [ 0, %entry ], [ %inc40, %for.inc38 ] ; <i32> [#uses=3] + %cmp = icmp slt i32 %0, 3 ; <i1> [#uses=1] + br i1 %cmp, label %for.body, label %for.end41 + +for.body: ; preds = %for.cond + %1 = tail call %0 asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i32 %0) nounwind ; <%0> [#uses=3] + %asmresult.i = extractvalue %0 %1, 0 ; <i32> [#uses=1] + %asmresult10.i = extractvalue %0 %1, 2 ; <i32> [#uses=1] + %and = and i32 %asmresult.i, 31 ; <i32> [#uses=2] + %shr42 = lshr i32 %asmresult10.i, 8 ; <i32> [#uses=1] + %and12 = and i32 %shr42, 255 ; <i32> [#uses=2] + %cmp14 = icmp eq i32 %and12, 0 ; <i1> [#uses=1] + br i1 %cmp14, label %for.end41, label %lor.lhs.false + +lor.lhs.false: ; preds = %for.body + %asmresult9.i = extractvalue %0 %1, 1 ; <i32> [#uses=1] + %and7 = and i32 %asmresult9.i, 65535 ; <i32> [#uses=1] + %cmp16 = icmp eq i32 %and7, 0 ; <i1> [#uses=1] + br i1 %cmp16, label %for.end41, label %for.cond17.preheader + +for.cond17.preheader: ; preds = %lor.lhs.false + %tmp24 = load i32* @boot_cpu_id ; <i32> [#uses=1] + %shr26 = ashr i32 %tmp24, %and ; <i32> [#uses=1] + br label %for.body20 + +for.body20: ; preds = %for.body20, %for.cond17.preheader + %2 = phi i32 [ 0, %for.cond17.preheader ], [ %inc32, %for.body20 ] ; <i32> [#uses=2] + %cnt.143 = phi i32 [ 0, %for.cond17.preheader ], [ %inc.cnt.1, %for.body20 ] ; <i32> [#uses=1] + %shr23 = ashr i32 %2, %and ; <i32> [#uses=1] + %cmp27 = icmp eq i32 %shr23, %shr26 ; <i1> [#uses=1] + %inc = zext i1 %cmp27 to i32 ; <i32> [#uses=1] + %inc.cnt.1 = add i32 %inc, %cnt.143 ; <i32> [#uses=2] + %inc32 = add nsw i32 %2, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %inc32, 255 ; <i1> [#uses=1] + br i1 %exitcond, label %for.end, label %for.body20 + +for.end: ; preds = %for.body20 + %cmp34 = icmp eq i32 %and12, 1 ; <i1> [#uses=1] + br i1 %cmp34, label %if.then35, label %for.inc38 + +if.then35: ; preds = %for.end + store i32 %inc.cnt.1, i32* @cpu_logical + br label %for.inc38 + +for.inc38: ; preds = %for.end, %if.then35 + %inc40 = add nsw i32 %0, 1 ; <i32> [#uses=1] + br label %for.cond + +for.end41: ; preds = %lor.lhs.false, %for.body, %for.cond + ret void +} diff --git a/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll b/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll new file mode 100644 index 0000000000000..646806e5dbb28 --- /dev/null +++ b/test/CodeGen/X86/2009-09-19-SchedCustomLoweringBug.ll @@ -0,0 +1,30 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s + +; PR4958 + +define i32 @main() nounwind ssp { +entry: +; CHECK: main: + %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + br label %bb + +bb: ; preds = %bb1, %entry +; CHECK: movl %e +; CHECK-NEXT: addl $1 +; CHECK-NEXT: movl %e +; CHECK-NEXT: adcl $0 + %i.0 = phi i64 [ 0, %entry ], [ %0, %bb1 ] ; <i64> [#uses=1] + %0 = add nsw i64 %i.0, 1 ; <i64> [#uses=2] + %1 = icmp sgt i32 0, 0 ; <i1> [#uses=1] + br i1 %1, label %bb2, label %bb1 + +bb1: ; preds = %bb + %2 = icmp sle i64 %0, 1 ; <i1> [#uses=1] + br i1 %2, label %bb, label %bb2 + +bb2: ; preds = %bb1, %bb + br label %return + +return: ; preds = %bb2 + ret i32 0 +} diff --git a/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/test/CodeGen/X86/2009-09-19-earlyclobber.ll new file mode 100644 index 0000000000000..4f44caea74c94 --- /dev/null +++ b/test/CodeGen/X86/2009-09-19-earlyclobber.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s | FileCheck %s +; ModuleID = '4964.c' +; PR 4964 +; Registers other than RAX, RCX are OK, but they must be different. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" + type { i64, i64 } ; type %0 + +define i64 @flsst(i64 %find) nounwind ssp { +entry: +; CHECK: FOO %rax %rcx + %asmtmp = tail call %0 asm sideeffect "FOO $0 $1 $2", "=r,=&r,rm,~{dirflag},~{fpsr},~{flags},~{cc}"(i64 %find) nounwind ; <%0> [#uses=1] + %asmresult = extractvalue %0 %asmtmp, 0 ; <i64> [#uses=1] + ret i64 %asmresult +} diff --git a/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll new file mode 100644 index 0000000000000..80b883582ce53 --- /dev/null +++ b/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -relocation-model=pic | FileCheck %s + +define void @dot(i16* nocapture %A, i32 %As, i16* nocapture %B, i32 %Bs, i16* nocapture %C, i32 %N) nounwind ssp { +; CHECK: dot: +; CHECK: decl % +; CHECK-NEXT: jne +entry: + %0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1] + br i1 %0, label %bb, label %bb2 + +bb: ; preds = %bb, %entry + %i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=3] + %sum.04 = phi i32 [ 0, %entry ], [ %10, %bb ] ; <i32> [#uses=1] + %1 = mul i32 %i.03, %As ; <i32> [#uses=1] + %2 = getelementptr i16* %A, i32 %1 ; <i16*> [#uses=1] + %3 = load i16* %2, align 2 ; <i16> [#uses=1] + %4 = sext i16 %3 to i32 ; <i32> [#uses=1] + %5 = mul i32 %i.03, %Bs ; <i32> [#uses=1] + %6 = getelementptr i16* %B, i32 %5 ; <i16*> [#uses=1] + %7 = load i16* %6, align 2 ; <i16> [#uses=1] + %8 = sext i16 %7 to i32 ; <i32> [#uses=1] + %9 = mul i32 %8, %4 ; <i32> [#uses=1] + %10 = add i32 %9, %sum.04 ; <i32> [#uses=2] + %indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2] + %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1] + br i1 %exitcond, label %bb1.bb2_crit_edge, label %bb + +bb1.bb2_crit_edge: ; preds = %bb + %phitmp = trunc i32 %10 to i16 ; <i16> [#uses=1] + br label %bb2 + +bb2: ; preds = %entry, %bb1.bb2_crit_edge + %sum.0.lcssa = phi i16 [ %phitmp, %bb1.bb2_crit_edge ], [ 0, %entry ] ; <i16> [#uses=1] + store i16 %sum.0.lcssa, i16* %C, align 2 + ret void +} diff --git a/test/CodeGen/X86/2009-09-22-CoalescerBug.ll b/test/CodeGen/X86/2009-09-22-CoalescerBug.ll new file mode 100644 index 0000000000000..33f35f881e853 --- /dev/null +++ b/test/CodeGen/X86/2009-09-22-CoalescerBug.ll @@ -0,0 +1,124 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { +entry: + br i1 undef, label %bb, label %bb1 + +bb: ; preds = %entry + ret i32 3 + +bb1: ; preds = %entry + br i1 undef, label %bb3, label %bb2 + +bb2: ; preds = %bb1 + ret i32 3 + +bb3: ; preds = %bb1 + br i1 undef, label %bb.i18, label %quantum_getwidth.exit + +bb.i18: ; preds = %bb.i18, %bb3 + br i1 undef, label %bb.i18, label %quantum_getwidth.exit + +quantum_getwidth.exit: ; preds = %bb.i18, %bb3 + br i1 undef, label %bb4, label %bb6.preheader + +bb4: ; preds = %quantum_getwidth.exit + unreachable + +bb6.preheader: ; preds = %quantum_getwidth.exit + br i1 undef, label %bb.i1, label %bb1.i2 + +bb.i1: ; preds = %bb6.preheader + unreachable + +bb1.i2: ; preds = %bb6.preheader + br i1 undef, label %bb2.i, label %bb3.i4 + +bb2.i: ; preds = %bb1.i2 + unreachable + +bb3.i4: ; preds = %bb1.i2 + br i1 undef, label %quantum_new_qureg.exit, label %bb4.i + +bb4.i: ; preds = %bb3.i4 + unreachable + +quantum_new_qureg.exit: ; preds = %bb3.i4 + br i1 undef, label %bb9, label %bb11.thread + +bb11.thread: ; preds = %quantum_new_qureg.exit + %.cast.i = zext i32 undef to i64 ; <i64> [#uses=1] + br label %bb.i37 + +bb9: ; preds = %quantum_new_qureg.exit + unreachable + +bb.i37: ; preds = %bb.i37, %bb11.thread + %0 = load i64* undef, align 8 ; <i64> [#uses=1] + %1 = shl i64 %0, %.cast.i ; <i64> [#uses=1] + store i64 %1, i64* undef, align 8 + br i1 undef, label %bb.i37, label %quantum_addscratch.exit + +quantum_addscratch.exit: ; preds = %bb.i37 + br i1 undef, label %bb12.preheader, label %bb14 + +bb12.preheader: ; preds = %quantum_addscratch.exit + unreachable + +bb14: ; preds = %quantum_addscratch.exit + br i1 undef, label %bb17, label %bb.nph + +bb.nph: ; preds = %bb14 + unreachable + +bb17: ; preds = %bb14 + br i1 undef, label %bb1.i7, label %quantum_measure.exit + +bb1.i7: ; preds = %bb17 + br label %quantum_measure.exit + +quantum_measure.exit: ; preds = %bb1.i7, %bb17 + switch i32 undef, label %bb21 [ + i32 -1, label %bb18 + i32 0, label %bb20 + ] + +bb18: ; preds = %quantum_measure.exit + unreachable + +bb20: ; preds = %quantum_measure.exit + unreachable + +bb21: ; preds = %quantum_measure.exit + br i1 undef, label %quantum_frac_approx.exit, label %bb1.i + +bb1.i: ; preds = %bb21 + unreachable + +quantum_frac_approx.exit: ; preds = %bb21 + br i1 undef, label %bb25, label %bb26 + +bb25: ; preds = %quantum_frac_approx.exit + unreachable + +bb26: ; preds = %quantum_frac_approx.exit + br i1 undef, label %quantum_gcd.exit, label %bb.i + +bb.i: ; preds = %bb.i, %bb26 + br i1 undef, label %quantum_gcd.exit, label %bb.i + +quantum_gcd.exit: ; preds = %bb.i, %bb26 + br i1 undef, label %bb32, label %bb33 + +bb32: ; preds = %quantum_gcd.exit + br i1 undef, label %bb.i.i, label %quantum_delete_qureg.exit + +bb.i.i: ; preds = %bb32 + ret i32 0 + +quantum_delete_qureg.exit: ; preds = %bb32 + ret i32 0 + +bb33: ; preds = %quantum_gcd.exit + unreachable +} diff --git a/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll b/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll new file mode 100644 index 0000000000000..d37d4b8bd427c --- /dev/null +++ b/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll @@ -0,0 +1,91 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 + +; rdar://7247745 + +%struct._lck_mtx_ = type { %union.anon } +%struct._lck_rw_t_internal_ = type <{ i16, i8, i8, i32, i32, i32 }> +%struct.anon = type { i64, i64, [2 x i8], i8, i8, i32 } +%struct.memory_object = type { i32, i32, %struct.memory_object_pager_ops* } +%struct.memory_object_control = type { i32, i32, %struct.vm_object* } +%struct.memory_object_pager_ops = type { void (%struct.memory_object*)*, void (%struct.memory_object*)*, i32 (%struct.memory_object*, %struct.memory_object_control*, i32)*, i32 (%struct.memory_object*)*, i32 (%struct.memory_object*, i64, i32, i32, i32*)*, i32 (%struct.memory_object*, i64, i32, i64*, i32*, i32, i32, i32)*, i32 (%struct.memory_object*, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i32)*, i32 (%struct.memory_object*)*, i8* } +%struct.queue_entry = type { %struct.queue_entry*, %struct.queue_entry* } +%struct.upl = type { %struct._lck_mtx_, i32, i32, %struct.vm_object*, i64, i32, i64, %struct.vm_object*, i32, i8* } +%struct.upl_page_info = type <{ i32, i8, [3 x i8] }> +%struct.vm_object = type { %struct.queue_entry, %struct._lck_rw_t_internal_, i64, %struct.vm_page*, i32, i32, i32, i32, %struct.vm_object*, %struct.vm_object*, i64, %struct.memory_object*, i64, %struct.memory_object_control*, i32, i16, i16, [2 x i8], i8, i8, %struct.queue_entry, %struct.queue_entry, i64, i32, i32, i32, i8*, i64, i8, i8, [2 x i8], %struct.queue_entry } +%struct.vm_page = type { %struct.queue_entry, %struct.queue_entry, %struct.vm_page*, %struct.vm_object*, i64, [2 x i8], i8, i8, i32, i8, i8, i8, i8, i32 } +%union.anon = type { %struct.anon } + +declare i64 @OSAddAtomic64(i64, i64*) noredzone noimplicitfloat + +define i32 @upl_commit_range(%struct.upl* %upl, i32 %offset, i32 %size, i32 %flags, %struct.upl_page_info* %page_list, i32 %count, i32* nocapture %empty) nounwind noredzone noimplicitfloat { +entry: + br i1 undef, label %if.then, label %if.end + +if.end: ; preds = %entry + br i1 undef, label %if.end143, label %if.then136 + +if.then136: ; preds = %if.end + unreachable + +if.end143: ; preds = %if.end + br i1 undef, label %if.else155, label %if.then153 + +if.then153: ; preds = %if.end143 + br label %while.cond + +if.else155: ; preds = %if.end143 + unreachable + +while.cond: ; preds = %if.end1039, %if.then153 + br i1 undef, label %if.then1138, label %while.body + +while.body: ; preds = %while.cond + br i1 undef, label %if.end260, label %if.then217 + +if.then217: ; preds = %while.body + br i1 undef, label %if.end260, label %if.then230 + +if.then230: ; preds = %if.then217 + br i1 undef, label %if.then246, label %if.end260 + +if.then246: ; preds = %if.then230 + br label %if.end260 + +if.end260: ; preds = %if.then246, %if.then230, %if.then217, %while.body + br i1 undef, label %if.end296, label %if.then266 + +if.then266: ; preds = %if.end260 + unreachable + +if.end296: ; preds = %if.end260 + br i1 undef, label %if.end1039, label %if.end306 + +if.end306: ; preds = %if.end296 + br i1 undef, label %if.end796, label %if.then616 + +if.then616: ; preds = %if.end306 + br i1 undef, label %commit_next_page, label %do.body716 + +do.body716: ; preds = %if.then616 + %call721 = call i64 @OSAddAtomic64(i64 1, i64* undef) nounwind noredzone noimplicitfloat ; <i64> [#uses=0] + call void asm sideeffect "movq\090x0($0),%rdi\0A\09movq\090x8($0),%rsi\0A\09.section __DATA, __data\0A\09.globl __dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec\0A\09__dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec:.quad 1f\0A\09.text\0A\091:nop\0A\09nop\0A\09nop\0A\09", "r,~{memory},~{di},~{si},~{dirflag},~{fpsr},~{flags}"(i64* undef) nounwind + br label %commit_next_page + +if.end796: ; preds = %if.end306 + unreachable + +commit_next_page: ; preds = %do.body716, %if.then616 + br i1 undef, label %if.end1039, label %if.then1034 + +if.then1034: ; preds = %commit_next_page + br label %if.end1039 + +if.end1039: ; preds = %if.then1034, %commit_next_page, %if.end296 + br label %while.cond + +if.then1138: ; preds = %while.cond + unreachable + +if.then: ; preds = %entry + ret i32 4 +} diff --git a/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll b/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll new file mode 100644 index 0000000000000..ef10ae59ab6b2 --- /dev/null +++ b/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll @@ -0,0 +1,264 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -stats |& grep {machine-licm} | grep 1 +; rdar://7274692 + +%0 = type { [125 x i32] } +%1 = type { i32 } +%struct..5sPragmaType = type { i8*, i32 } +%struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 } +%struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* } +%struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 } +%struct.AuxData = type { i8*, void (i8*)* } +%struct.Bitvec = type { i32, i32, i32, %0 } +%struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* } +%struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* } +%struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* } +%struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* } +%struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] } +%struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 } +%struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 } +%struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* } +%struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 } +%struct.Context = type { i64, i32, %struct.Fifo } +%struct.CountCtx = type { i64 } +%struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* } +%struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* } +%struct.DbPage = type { %struct.Pager*, i32, %struct.DbPage*, %struct.DbPage*, %struct.PagerLruLink, %struct.DbPage*, i8, i8, i8, i8, i8, i16, %struct.DbPage*, %struct.DbPage*, i8* } +%struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..5sPragmaType, %struct..5sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 } +%struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* } +%struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 } +%struct.FILE = type { i8*, i32, i32, i16, i16, %struct..5sPragmaType, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct..5sPragmaType, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct..5sPragmaType, i32, i64 } +%struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 } +%struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* } +%struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] } +%struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] } +%struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* } +%struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 } +%struct.IdList = type { %struct..5sPragmaType*, i32, i32 } +%struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** } +%struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] } +%struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* } +%struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.DbPage*, i32, %struct.MemPage* } +%struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* } +%struct.Op = type { i8, i8, i8, i8, i32, i32, i32, %1 } +%struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.DbPage*, %struct.DbPage*, %struct.DbPage*, i64, i64, i64, i64, i64, i32, void (%struct.DbPage*, i32)*, void (%struct.DbPage*, i32)*, i32, %struct.DbPage**, i8*, [16 x i8] } +%struct.PagerLruLink = type { %struct.DbPage*, %struct.DbPage* } +%struct.PagerLruList = type { %struct.DbPage*, %struct.DbPage*, %struct.DbPage* } +%struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* } +%struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] } +%struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] } +%struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 } +%struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* } +%struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..5sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* } +%struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..5sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* } +%struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 } +%struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] } +%struct._OvflCell = type { i8*, i16 } +%struct._RuneCharClass = type { [14 x i8], i32 } +%struct._RuneEntry = type { i32, i32, i32, i32* } +%struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32, i32, %struct._RuneCharClass* } +%struct._RuneRange = type { i32, %struct._RuneEntry* } +%struct.__sFILEX = type opaque +%struct._ht = type { i32, %struct.HashElem* } +%struct.callback_data = type { %struct.sqlite3*, i32, i32, %struct.FILE*, i32, i32, i32, i8*, [20 x i8], [100 x i32], [100 x i32], [20 x i8], %struct.previous_mode_data, [1024 x i8], i8* } +%struct.previous_mode_data = type { i32, i32, i32, [100 x i32] } +%struct.sColMap = type { i32, i8* } +%struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %union.anon, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 } +%struct.sqlite3InitInfo = type { i32, i32, i8 } +%struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* } +%struct.sqlite3_file = type { %struct.sqlite3_io_methods* } +%struct.sqlite3_index_constraint = type { i32, i8, i8, i32 } +%struct.sqlite3_index_constraint_usage = type { i32, i8 } +%struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double } +%struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* } +%struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* } +%struct.sqlite3_mutex = type opaque +%struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* } +%struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* } +%struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* } +%union.anon = type { double } + +@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=2] +@__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1] +@.str10 = internal constant [16 x i8] c"Out of memory!\0A\00", align 1 ; <[16 x i8]*> [#uses=1] +@llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.callback_data*, i8*)* @set_table_name to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define fastcc void @set_table_name(%struct.callback_data* nocapture %p, i8* %zName) nounwind ssp { +entry: + %0 = getelementptr inbounds %struct.callback_data* %p, i32 0, i32 7 ; <i8**> [#uses=3] + %1 = load i8** %0, align 4 ; <i8*> [#uses=2] + %2 = icmp eq i8* %1, null ; <i1> [#uses=1] + br i1 %2, label %bb1, label %bb + +bb: ; preds = %entry + free i8* %1 + store i8* null, i8** %0, align 4 + br label %bb1 + +bb1: ; preds = %bb, %entry + %3 = icmp eq i8* %zName, null ; <i1> [#uses=1] + br i1 %3, label %return, label %bb2 + +bb2: ; preds = %bb1 + %4 = load i8* %zName, align 1 ; <i8> [#uses=2] + %5 = zext i8 %4 to i32 ; <i32> [#uses=2] + %6 = icmp sgt i8 %4, -1 ; <i1> [#uses=1] + br i1 %6, label %bb.i.i, label %bb1.i.i + +bb.i.i: ; preds = %bb2 + %7 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %5 ; <i32*> [#uses=1] + %8 = load i32* %7, align 4 ; <i32> [#uses=1] + %9 = and i32 %8, 256 ; <i32> [#uses=1] + br label %isalpha.exit + +bb1.i.i: ; preds = %bb2 + %10 = tail call i32 @__maskrune(i32 %5, i32 256) nounwind ; <i32> [#uses=1] + br label %isalpha.exit + +isalpha.exit: ; preds = %bb1.i.i, %bb.i.i + %storemerge.in.in.i.i = phi i32 [ %9, %bb.i.i ], [ %10, %bb1.i.i ] ; <i32> [#uses=1] + %storemerge.in.i.i = icmp eq i32 %storemerge.in.in.i.i, 0 ; <i1> [#uses=1] + br i1 %storemerge.in.i.i, label %bb3, label %bb5 + +bb3: ; preds = %isalpha.exit + %11 = load i8* %zName, align 1 ; <i8> [#uses=2] + %12 = icmp eq i8 %11, 95 ; <i1> [#uses=1] + br i1 %12, label %bb5, label %bb12.preheader + +bb5: ; preds = %bb3, %isalpha.exit + %.pre = load i8* %zName, align 1 ; <i8> [#uses=1] + br label %bb12.preheader + +bb12.preheader: ; preds = %bb5, %bb3 + %13 = phi i8 [ %.pre, %bb5 ], [ %11, %bb3 ] ; <i8> [#uses=1] + %needQuote.1.ph = phi i32 [ 0, %bb5 ], [ 1, %bb3 ] ; <i32> [#uses=2] + %14 = icmp eq i8 %13, 0 ; <i1> [#uses=1] + br i1 %14, label %bb13, label %bb7 + +bb7: ; preds = %bb11, %bb12.preheader + %i.011 = phi i32 [ %tmp17, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=2] + %n.110 = phi i32 [ %26, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=3] + %needQuote.19 = phi i32 [ %needQuote.0, %bb11 ], [ %needQuote.1.ph, %bb12.preheader ] ; <i32> [#uses=2] + %scevgep16 = getelementptr i8* %zName, i32 %i.011 ; <i8*> [#uses=2] + %tmp17 = add i32 %i.011, 1 ; <i32> [#uses=2] + %scevgep18 = getelementptr i8* %zName, i32 %tmp17 ; <i8*> [#uses=1] + %15 = load i8* %scevgep16, align 1 ; <i8> [#uses=2] + %16 = zext i8 %15 to i32 ; <i32> [#uses=2] + %17 = icmp sgt i8 %15, -1 ; <i1> [#uses=1] + br i1 %17, label %bb.i.i2, label %bb1.i.i3 + +bb.i.i2: ; preds = %bb7 + %18 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %16 ; <i32*> [#uses=1] + %19 = load i32* %18, align 4 ; <i32> [#uses=1] + %20 = and i32 %19, 1280 ; <i32> [#uses=1] + br label %isalnum.exit + +bb1.i.i3: ; preds = %bb7 + %21 = tail call i32 @__maskrune(i32 %16, i32 1280) nounwind ; <i32> [#uses=1] + br label %isalnum.exit + +isalnum.exit: ; preds = %bb1.i.i3, %bb.i.i2 + %storemerge.in.in.i.i4 = phi i32 [ %20, %bb.i.i2 ], [ %21, %bb1.i.i3 ] ; <i32> [#uses=1] + %storemerge.in.i.i5 = icmp eq i32 %storemerge.in.in.i.i4, 0 ; <i1> [#uses=1] + br i1 %storemerge.in.i.i5, label %bb8, label %bb11 + +bb8: ; preds = %isalnum.exit + %22 = load i8* %scevgep16, align 1 ; <i8> [#uses=2] + %23 = icmp eq i8 %22, 95 ; <i1> [#uses=1] + br i1 %23, label %bb11, label %bb9 + +bb9: ; preds = %bb8 + %24 = icmp eq i8 %22, 39 ; <i1> [#uses=1] + %25 = zext i1 %24 to i32 ; <i32> [#uses=1] + %.n.1 = add i32 %n.110, %25 ; <i32> [#uses=1] + br label %bb11 + +bb11: ; preds = %bb9, %bb8, %isalnum.exit + %needQuote.0 = phi i32 [ 1, %bb9 ], [ %needQuote.19, %isalnum.exit ], [ %needQuote.19, %bb8 ] ; <i32> [#uses=2] + %n.0 = phi i32 [ %.n.1, %bb9 ], [ %n.110, %isalnum.exit ], [ %n.110, %bb8 ] ; <i32> [#uses=1] + %26 = add nsw i32 %n.0, 1 ; <i32> [#uses=2] + %27 = load i8* %scevgep18, align 1 ; <i8> [#uses=1] + %28 = icmp eq i8 %27, 0 ; <i1> [#uses=1] + br i1 %28, label %bb13, label %bb7 + +bb13: ; preds = %bb11, %bb12.preheader + %n.1.lcssa = phi i32 [ 0, %bb12.preheader ], [ %26, %bb11 ] ; <i32> [#uses=2] + %needQuote.1.lcssa = phi i32 [ %needQuote.1.ph, %bb12.preheader ], [ %needQuote.0, %bb11 ] ; <i32> [#uses=1] + %29 = add nsw i32 %n.1.lcssa, 2 ; <i32> [#uses=1] + %30 = icmp eq i32 %needQuote.1.lcssa, 0 ; <i1> [#uses=3] + %n.1. = select i1 %30, i32 %n.1.lcssa, i32 %29 ; <i32> [#uses=1] + %31 = add nsw i32 %n.1., 1 ; <i32> [#uses=1] + %32 = malloc i8, i32 %31 ; <i8*> [#uses=7] + store i8* %32, i8** %0, align 4 + %33 = icmp eq i8* %32, null ; <i1> [#uses=1] + br i1 %33, label %bb16, label %bb17 + +bb16: ; preds = %bb13 + %34 = load %struct.FILE** @__stderrp, align 4 ; <%struct.FILE*> [#uses=1] + %35 = bitcast %struct.FILE* %34 to i8* ; <i8*> [#uses=1] + %36 = tail call i32 @"\01_fwrite$UNIX2003"(i8* getelementptr inbounds ([16 x i8]* @.str10, i32 0, i32 0), i32 1, i32 15, i8* %35) nounwind ; <i32> [#uses=0] + tail call void @exit(i32 1) noreturn nounwind + unreachable + +bb17: ; preds = %bb13 + br i1 %30, label %bb23.preheader, label %bb18 + +bb18: ; preds = %bb17 + store i8 39, i8* %32, align 4 + br label %bb23.preheader + +bb23.preheader: ; preds = %bb18, %bb17 + %n.3.ph = phi i32 [ 1, %bb18 ], [ 0, %bb17 ] ; <i32> [#uses=2] + %37 = load i8* %zName, align 1 ; <i8> [#uses=1] + %38 = icmp eq i8 %37, 0 ; <i1> [#uses=1] + br i1 %38, label %bb24, label %bb20 + +bb20: ; preds = %bb22, %bb23.preheader + %storemerge18 = phi i32 [ %tmp, %bb22 ], [ 0, %bb23.preheader ] ; <i32> [#uses=2] + %n.37 = phi i32 [ %n.4, %bb22 ], [ %n.3.ph, %bb23.preheader ] ; <i32> [#uses=3] + %scevgep = getelementptr i8* %zName, i32 %storemerge18 ; <i8*> [#uses=1] + %tmp = add i32 %storemerge18, 1 ; <i32> [#uses=2] + %scevgep15 = getelementptr i8* %zName, i32 %tmp ; <i8*> [#uses=1] + %39 = load i8* %scevgep, align 1 ; <i8> [#uses=2] + %40 = getelementptr inbounds i8* %32, i32 %n.37 ; <i8*> [#uses=1] + store i8 %39, i8* %40, align 1 + %41 = add nsw i32 %n.37, 1 ; <i32> [#uses=2] + %42 = icmp eq i8 %39, 39 ; <i1> [#uses=1] + br i1 %42, label %bb21, label %bb22 + +bb21: ; preds = %bb20 + %43 = getelementptr inbounds i8* %32, i32 %41 ; <i8*> [#uses=1] + store i8 39, i8* %43, align 1 + %44 = add nsw i32 %n.37, 2 ; <i32> [#uses=1] + br label %bb22 + +bb22: ; preds = %bb21, %bb20 + %n.4 = phi i32 [ %44, %bb21 ], [ %41, %bb20 ] ; <i32> [#uses=2] + %45 = load i8* %scevgep15, align 1 ; <i8> [#uses=1] + %46 = icmp eq i8 %45, 0 ; <i1> [#uses=1] + br i1 %46, label %bb24, label %bb20 + +bb24: ; preds = %bb22, %bb23.preheader + %n.3.lcssa = phi i32 [ %n.3.ph, %bb23.preheader ], [ %n.4, %bb22 ] ; <i32> [#uses=3] + br i1 %30, label %bb26, label %bb25 + +bb25: ; preds = %bb24 + %47 = getelementptr inbounds i8* %32, i32 %n.3.lcssa ; <i8*> [#uses=1] + store i8 39, i8* %47, align 1 + %48 = add nsw i32 %n.3.lcssa, 1 ; <i32> [#uses=1] + br label %bb26 + +bb26: ; preds = %bb25, %bb24 + %n.5 = phi i32 [ %48, %bb25 ], [ %n.3.lcssa, %bb24 ] ; <i32> [#uses=1] + %49 = getelementptr inbounds i8* %32, i32 %n.5 ; <i8*> [#uses=1] + store i8 0, i8* %49, align 1 + ret void + +return: ; preds = %bb1 + ret void +} + +declare i32 @"\01_fwrite$UNIX2003"(i8*, i32, i32, i8*) + +declare void @exit(i32) noreturn nounwind + +declare i32 @__maskrune(i32, i32) diff --git a/test/CodeGen/X86/20090313-signext.ll b/test/CodeGen/X86/20090313-signext.ll index 7313670a1c331..de930d5126782 100644 --- a/test/CodeGen/X86/20090313-signext.ll +++ b/test/CodeGen/X86/20090313-signext.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=pic > %t +; RUN: llc < %s -march=x86-64 -relocation-model=pic > %t ; RUN: grep {movswl %ax, %edi} %t ; RUN: grep {movw (%rax), %ax} %t ; XFAIL: * diff --git a/test/CodeGen/X86/Atomics-32.ll b/test/CodeGen/X86/Atomics-32.ll index 2a3e2285800fb..0e9b73ea10903 100644 --- a/test/CodeGen/X86/Atomics-32.ll +++ b/test/CodeGen/X86/Atomics-32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ;; Note the 64-bit variants are not supported yet (in 32-bit mode). ; ModuleID = 'Atomics.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/Atomics-64.ll b/test/CodeGen/X86/Atomics-64.ll index 37b2e338eff60..ac174b9f9a3fa 100644 --- a/test/CodeGen/X86/Atomics-64.ll +++ b/test/CodeGen/X86/Atomics-64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; ModuleID = 'Atomics.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/abi-isel.ll b/test/CodeGen/X86/abi-isel.ll index 513599c58bcd6..a6fd2d8fe1348 100644 --- a/test/CodeGen/X86/abi-isel.ll +++ b/test/CodeGen/X86/abi-isel.ll @@ -1,186 +1,16 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small > %t -; RUN: grep leal %t | count 33 -; RUN: grep movl %t | count 239 -; RUN: grep addl %t | count 20 -; RUN: grep subl %t | count 14 -; RUN: not grep leaq %t -; RUN: not grep movq %t -; RUN: not grep addq %t -; RUN: not grep subq %t -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: not grep @GOT %t -; RUN: not grep @GOTOFF %t -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: not grep %rip %t -; RUN: llvm-as < %s | llc -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=pic -code-model=small > %t -; RUN: grep leal %t | count 43 -; RUN: grep movl %t | count 377 -; RUN: grep addl %t | count 179 -; RUN: grep subl %t | count 6 -; RUN: not grep leaq %t -; RUN: not grep movq %t -; RUN: not grep addq %t -; RUN: not grep subq %t -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: grep _GLOBAL_OFFSET_TABLE_ %t | count 148 -; RUN: grep @GOT %t | count 207 -; RUN: grep @GOTOFF %t | count 58 -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: grep @PLT %t | count 20 -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: not grep {%rip} %t -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t -; RUN: not grep leal %t -; RUN: grep movl %t | count 91 -; RUN: not grep addl %t -; RUN: not grep subl %t -; RUN: grep leaq %t | count 70 -; RUN: grep movq %t | count 56 -; RUN: grep addq %t | count 20 -; RUN: grep subq %t | count 14 -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: not grep @GOT %t -; RUN: not grep @GOTOFF %t -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: grep {%rip} %t | count 139 -; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small > %t -; RUN: not grep leal %t -; RUN: grep movl %t | count 98 -; RUN: not grep addl %t -; RUN: not grep subl %t -; RUN: grep leaq %t | count 59 -; RUN: grep movq %t | count 195 -; RUN: grep addq %t | count 36 -; RUN: grep subq %t | count 11 -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep @GOT %t | count 149 -; RUN: not grep @GOTOFF %t -; RUN: grep @GOTPCREL %t | count 149 -; RUN: not grep @GOTPLT %t -; RUN: grep @PLT %t | count 20 -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: grep {%rip} %t | count 207 - - - -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small > %t -; RUN: grep leal %t | count 33 -; RUN: grep movl %t | count 239 -; RUN: grep addl %t | count 20 -; RUN: grep subl %t | count 14 -; RUN: not grep leaq %t -; RUN: not grep movq %t -; RUN: not grep addq %t -; RUN: not grep subq %t -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: not grep @GOT %t -; RUN: not grep @GOTOFF %t -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: not grep %rip %t -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small > %t -; RUN: grep leal %t | count 31 -; RUN: grep movl %t | count 312 -; RUN: grep addl %t | count 32 -; RUN: grep subl %t | count 14 -; RUN: not grep leaq %t -; RUN: not grep movq %t -; RUN: not grep addq %t -; RUN: not grep subq %t -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: not grep @GOT %t -; RUN: not grep @GOTOFF %t -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: not grep {%rip} %t -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small > %t -; RUN: grep leal %t | count 57 -; RUN: grep movl %t | count 292 -; RUN: grep addl %t | count 32 -; RUN: grep subl %t | count 14 -; RUN: not grep leaq %t -; RUN: not grep movq %t -; RUN: not grep addq %t -; RUN: not grep subq %t -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: not grep @GOT %t -; RUN: not grep @GOTOFF %t -; RUN: not grep @GOTPCREL %t -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: not grep {%rip} %t -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small > %t -; RUN: not grep leal %t -; RUN: grep movl %t | count 95 -; RUN: not grep addl %t -; RUN: not grep subl %t -; RUN: grep leaq %t | count 89 -; RUN: grep movq %t | count 142 -; RUN: grep addq %t | count 30 -; RUN: grep subq %t | count 12 -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep @GOT %t | count 92 -; RUN: not grep @GOTOFF %t -; RUN: grep @GOTPCREL %t | count 92 -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: grep {%rip} %t | count 208 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small > %t -; RUN: not grep leal %t -; RUN: grep movl %t | count 95 -; RUN: not grep addl %t -; RUN: not grep subl %t -; RUN: grep leaq %t | count 89 -; RUN: grep movq %t | count 142 -; RUN: grep addq %t | count 30 -; RUN: grep subq %t | count 12 -; RUN: not grep movabs %t -; RUN: not grep largecomm %t -; RUN: not grep _GLOBAL_OFFSET_TABLE_ %t -; RUN: grep @GOT %t | count 92 -; RUN: not grep @GOTOFF %t -; RUN: grep @GOTPCREL %t | count 92 -; RUN: not grep @GOTPLT %t -; RUN: not grep @PLT %t -; RUN: not grep @PLTOFF %t -; RUN: grep {call \\\*} %t | count 10 -; RUN: grep {%rip} %t | count 208 +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-32-PIC + +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=LINUX-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=LINUX-64-PIC + +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=i686-apple-darwin -march=x86 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-32-PIC + +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small | FileCheck %s -check-prefix=DARWIN-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small | FileCheck %s -check-prefix=DARWIN-64-PIC @src = external global [131072 x i32] @dst = external global [131072 x i32] @@ -206,6 +36,71 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 0), align 4 ret void + +; LINUX-64-STATIC: foo00: +; LINUX-64-STATIC: movl src(%rip), %eax +; LINUX-64-STATIC: movl %eax, dst +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo00: +; LINUX-32-STATIC: movl src, %eax +; LINUX-32-STATIC-NEXT: movl %eax, dst +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo00: +; LINUX-32-PIC: movl src, %eax +; LINUX-32-PIC-NEXT: movl %eax, dst +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo00: +; DARWIN-32-STATIC: movl _src, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dst +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo00: +; DARWIN-32-PIC: call L1$pb +; DARWIN-32-PIC-NEXT: L1$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L1$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L1$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @fxo00() nounwind { @@ -213,18 +108,191 @@ entry: %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4 store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 0), align 4 ret void + +; LINUX-64-STATIC: fxo00: +; LINUX-64-STATIC: movl xsrc(%rip), %eax +; LINUX-64-STATIC: movl %eax, xdst +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: fxo00: +; LINUX-32-STATIC: movl xsrc, %eax +; LINUX-32-STATIC-NEXT: movl %eax, xdst +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: fxo00: +; LINUX-32-PIC: movl xsrc, %eax +; LINUX-32-PIC-NEXT: movl %eax, xdst +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: fxo00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _fxo00: +; DARWIN-32-STATIC: movl _xsrc, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _xdst +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _fxo00: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _fxo00: +; DARWIN-32-PIC: call L2$pb +; DARWIN-32-PIC-NEXT: L2$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L2$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L2$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _fxo00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _fxo00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _fxo00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax), %eax +; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @foo01() nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i32 0), i32** @ptr, align 8 ret void +; LINUX-64-STATIC: foo01: +; LINUX-64-STATIC: movq $dst, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo01: +; LINUX-32-STATIC: movl $dst, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo01: +; LINUX-32-PIC: movl $dst, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo01: +; DARWIN-32-STATIC: movl $_dst, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo01: +; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo01: +; DARWIN-32-PIC: call L3$pb +; DARWIN-32-PIC-NEXT: L3$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L3$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L3$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @fxo01() nounwind { entry: store i32* getelementptr ([32 x i32]* @xdst, i32 0, i32 0), i32** @ptr, align 8 ret void +; LINUX-64-STATIC: fxo01: +; LINUX-64-STATIC: movq $xdst, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: fxo01: +; LINUX-32-STATIC: movl $xdst, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: fxo01: +; LINUX-32-PIC: movl $xdst, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: fxo01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _fxo01: +; DARWIN-32-STATIC: movl $_xdst, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _fxo01: +; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _fxo01: +; DARWIN-32-PIC: call L4$pb +; DARWIN-32-PIC-NEXT: L4$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L4$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L4$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _fxo01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _fxo01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _fxo01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @foo02() nounwind { @@ -233,6 +301,80 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 ret void +; LINUX-64-STATIC: foo02: +; LINUX-64-STATIC: movl src(%rip), % +; LINUX-64-STATIC: movq ptr(%rip), % +; LINUX-64-STATIC: movl +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo02: +; LINUX-32-STATIC: movl src, %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, (%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo02: +; LINUX-32-PIC: movl src, %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, (%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo02: +; DARWIN-32-STATIC: movl _src, %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo02: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo02: +; DARWIN-32-PIC: call L5$pb +; DARWIN-32-PIC-NEXT: L5$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L5$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L5$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @fxo02() nounwind { @@ -240,7 +382,81 @@ entry: %0 = load i32** @ptr, align 8 %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 +; LINUX-64-STATIC: fxo02: +; LINUX-64-STATIC: movl xsrc(%rip), % +; LINUX-64-STATIC: movq ptr(%rip), % +; LINUX-64-STATIC: movl +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: fxo02: +; LINUX-32-STATIC: movl xsrc, %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, (%ecx) +; LINUX-32-STATIC-NEXT: ret ret void + +; LINUX-32-PIC: fxo02: +; LINUX-32-PIC: movl xsrc, %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, (%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: fxo02: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _fxo02: +; DARWIN-32-STATIC: movl _xsrc, %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _fxo02: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _fxo02: +; DARWIN-32-PIC: call L6$pb +; DARWIN-32-PIC-NEXT: L6$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L6$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L6$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _fxo02: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _fxo02: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _fxo02: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @foo03() nounwind { @@ -248,12 +464,114 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 0), align 32 ret void +; LINUX-64-STATIC: foo03: +; LINUX-64-STATIC: movl dsrc(%rip), %eax +; LINUX-64-STATIC: movl %eax, ddst +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo03: +; LINUX-32-STATIC: movl dsrc, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ddst +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo03: +; LINUX-32-PIC: movl dsrc, %eax +; LINUX-32-PIC-NEXT: movl %eax, ddst +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo03: +; DARWIN-32-STATIC: movl _dsrc, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ddst +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo03: +; DARWIN-32-DYNAMIC: movl _dsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo03: +; DARWIN-32-PIC: call L7$pb +; DARWIN-32-PIC-NEXT: L7$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _dsrc-L7$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _ddst-L7$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo03: +; DARWIN-64-STATIC: movl _dsrc(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ddst(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo03: +; DARWIN-64-DYNAMIC: movl _dsrc(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo03: +; DARWIN-64-PIC: movl _dsrc(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ddst(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @foo04() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i32 0), i32** @dptr, align 8 ret void +; LINUX-64-STATIC: foo04: +; LINUX-64-STATIC: movq $ddst, dptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo04: +; LINUX-32-STATIC: movl $ddst, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo04: +; LINUX-32-PIC: movl $ddst, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo04: +; DARWIN-32-STATIC: movl $_ddst, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo04: +; DARWIN-32-DYNAMIC: movl $_ddst, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo04: +; DARWIN-32-PIC: call L8$pb +; DARWIN-32-PIC-NEXT: L8$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ddst-L8$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L8$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @foo05() nounwind { @@ -262,6 +580,70 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 0), align 32 store i32 %1, i32* %0, align 4 ret void +; LINUX-64-STATIC: foo05: +; LINUX-64-STATIC: movl dsrc(%rip), % +; LINUX-64-STATIC: movq dptr(%rip), % +; LINUX-64-STATIC: movl +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo05: +; LINUX-32-STATIC: movl dsrc, %eax +; LINUX-32-STATIC-NEXT: movl dptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, (%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo05: +; LINUX-32-PIC: movl dsrc, %eax +; LINUX-32-PIC-NEXT: movl dptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, (%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo05: +; DARWIN-32-STATIC: movl _dsrc, %eax +; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo05: +; DARWIN-32-DYNAMIC: movl _dsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo05: +; DARWIN-32-PIC: call L9$pb +; DARWIN-32-PIC-NEXT: L9$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _dsrc-L9$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _dptr-L9$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo05: +; DARWIN-64-STATIC: movl _dsrc(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo05: +; DARWIN-64-DYNAMIC: movl _dsrc(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo05: +; DARWIN-64-PIC: movl _dsrc(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @foo06() nounwind { @@ -269,12 +651,111 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 0), align 4 ret void +; LINUX-64-STATIC: foo06: +; LINUX-64-STATIC: movl lsrc(%rip), %eax +; LINUX-64-STATIC: movl %eax, ldst(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo06: +; LINUX-32-STATIC: movl lsrc, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ldst +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo06: +; LINUX-32-PIC: movl lsrc, %eax +; LINUX-32-PIC-NEXT: movl %eax, ldst +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo06: +; LINUX-64-PIC: movl lsrc(%rip), %eax +; LINUX-64-PIC-NEXT: movl %eax, ldst(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo06: +; DARWIN-32-STATIC: movl _lsrc, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ldst +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo06: +; DARWIN-32-DYNAMIC: movl _lsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo06: +; DARWIN-32-PIC: call L10$pb +; DARWIN-32-PIC-NEXT: L10$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _lsrc-L10$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _ldst-L10$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo06: +; DARWIN-64-STATIC: movl _lsrc(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ldst(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo06: +; DARWIN-64-DYNAMIC: movl _lsrc(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo06: +; DARWIN-64-PIC: movl _lsrc(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ldst(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @foo07() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i32 0), i32** @lptr, align 8 ret void +; LINUX-64-STATIC: foo07: +; LINUX-64-STATIC: movq $ldst, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo07: +; LINUX-32-STATIC: movl $ldst, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo07: +; LINUX-32-PIC: movl $ldst, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo07: +; DARWIN-32-STATIC: movl $_ldst, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo07: +; DARWIN-32-DYNAMIC: movl $_ldst, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo07: +; DARWIN-32-PIC: call L11$pb +; DARWIN-32-PIC-NEXT: L11$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ldst-L11$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L11$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @foo08() nounwind { @@ -283,6 +764,68 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 0), align 4 store i32 %1, i32* %0, align 4 ret void +; LINUX-64-STATIC: foo08: +; LINUX-64-STATIC: movl lsrc(%rip), % +; LINUX-64-STATIC: movq lptr(%rip), % +; LINUX-64-STATIC: movl +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: foo08: +; LINUX-32-STATIC: movl lsrc, %eax +; LINUX-32-STATIC-NEXT: movl lptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, (%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: foo08: +; LINUX-32-PIC: movl lsrc, %eax +; LINUX-32-PIC-NEXT: movl lptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, (%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: foo08: +; LINUX-64-PIC: movl lsrc(%rip), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _foo08: +; DARWIN-32-STATIC: movl _lsrc, %eax +; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _foo08: +; DARWIN-32-DYNAMIC: movl _lsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _foo08: +; DARWIN-32-PIC: call L12$pb +; DARWIN-32-PIC-NEXT: L12$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _lsrc-L12$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _lptr-L12$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _foo08: +; DARWIN-64-STATIC: movl _lsrc(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _foo08: +; DARWIN-64-DYNAMIC: movl _lsrc(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _foo08: +; DARWIN-64-PIC: movl _lsrc(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qux00() nounwind { @@ -290,6 +833,70 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), align 4 ret void +; LINUX-64-STATIC: qux00: +; LINUX-64-STATIC: movl src+64(%rip), %eax +; LINUX-64-STATIC: movl %eax, dst+64(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux00: +; LINUX-32-STATIC: movl src+64, %eax +; LINUX-32-STATIC-NEXT: movl %eax, dst+64 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux00: +; LINUX-32-PIC: movl src+64, %eax +; LINUX-32-PIC-NEXT: movl %eax, dst+64 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux00: +; DARWIN-32-STATIC: movl _src+64, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dst+64 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux00: +; DARWIN-32-PIC: call L13$pb +; DARWIN-32-PIC-NEXT: L13$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L13$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L13$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qxx00() nounwind { @@ -297,18 +904,202 @@ entry: %0 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), align 4 ret void +; LINUX-64-STATIC: qxx00: +; LINUX-64-STATIC: movl xsrc+64(%rip), %eax +; LINUX-64-STATIC: movl %eax, xdst+64(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qxx00: +; LINUX-32-STATIC: movl xsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl %eax, xdst+64 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qxx00: +; LINUX-32-PIC: movl xsrc+64, %eax +; LINUX-32-PIC-NEXT: movl %eax, xdst+64 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qxx00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qxx00: +; DARWIN-32-STATIC: movl _xsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _xdst+64 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qxx00: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qxx00: +; DARWIN-32-PIC: call L14$pb +; DARWIN-32-PIC-NEXT: L14$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L14$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L14$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qxx00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qxx00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qxx00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qux01() nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16), i32** @ptr, align 8 ret void +; LINUX-64-STATIC: qux01: +; LINUX-64-STATIC: movq $dst+64, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux01: +; LINUX-32-STATIC: movl $dst+64, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux01: +; LINUX-32-PIC: movl $dst+64, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux01: +; DARWIN-32-STATIC: movl $_dst+64, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux01: +; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux01: +; DARWIN-32-PIC: call L15$pb +; DARWIN-32-PIC-NEXT: L15$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L15$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: addl $64, %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L15$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qxx01() nounwind { entry: store i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16), i32** @ptr, align 8 ret void +; LINUX-64-STATIC: qxx01: +; LINUX-64-STATIC: movq $xdst+64, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qxx01: +; LINUX-32-STATIC: movl $xdst+64, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qxx01: +; LINUX-32-PIC: movl $xdst+64, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qxx01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qxx01: +; DARWIN-32-STATIC: movl $_xdst+64, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qxx01: +; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qxx01: +; DARWIN-32-PIC: call L16$pb +; DARWIN-32-PIC-NEXT: L16$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L16$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: addl $64, %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L16$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qxx01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qxx01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qxx01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qux02() nounwind { @@ -317,7 +1108,81 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 +; LINUX-64-STATIC: qux02: +; LINUX-64-STATIC: movl src+64(%rip), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux02: +; LINUX-32-STATIC: movl src+64, %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-STATIC-NEXT: ret ret void + +; LINUX-32-PIC: qux02: +; LINUX-32-PIC: movl src+64, %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux02: +; DARWIN-32-STATIC: movl _src+64, %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux02: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux02: +; DARWIN-32-PIC: call L17$pb +; DARWIN-32-PIC-NEXT: L17$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L17$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L17$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qxx02() nounwind { @@ -326,7 +1191,81 @@ entry: %1 = load i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 +; LINUX-64-STATIC: qxx02: +; LINUX-64-STATIC: movl xsrc+64(%rip), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qxx02: +; LINUX-32-STATIC: movl xsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-STATIC-NEXT: ret ret void + +; LINUX-32-PIC: qxx02: +; LINUX-32-PIC: movl xsrc+64, %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qxx02: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qxx02: +; DARWIN-32-STATIC: movl _xsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qxx02: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 64(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qxx02: +; DARWIN-32-PIC: call L18$pb +; DARWIN-32-PIC-NEXT: L18$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L18$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 64(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L18$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qxx02: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qxx02: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qxx02: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qux03() nounwind { @@ -334,12 +1273,115 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), align 32 ret void +; LINUX-64-STATIC: qux03: +; LINUX-64-STATIC: movl dsrc+64(%rip), %eax +; LINUX-64-STATIC: movl %eax, ddst+64(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux03: +; LINUX-32-STATIC: movl dsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ddst+64 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux03: +; LINUX-32-PIC: movl dsrc+64, %eax +; LINUX-32-PIC-NEXT: movl %eax, ddst+64 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux03: +; DARWIN-32-STATIC: movl _dsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ddst+64 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux03: +; DARWIN-32-DYNAMIC: movl _dsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst+64 +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux03: +; DARWIN-32-PIC: call L19$pb +; DARWIN-32-PIC-NEXT: L19$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_dsrc-L19$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, (_ddst-L19$pb)+64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux03: +; DARWIN-64-STATIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ddst+64(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux03: +; DARWIN-64-DYNAMIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst+64(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux03: +; DARWIN-64-PIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ddst+64(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @qux04() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16), i32** @dptr, align 8 ret void +; LINUX-64-STATIC: qux04: +; LINUX-64-STATIC: movq $ddst+64, dptr(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux04: +; LINUX-32-STATIC: movl $ddst+64, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux04: +; LINUX-32-PIC: movl $ddst+64, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux04: +; DARWIN-32-STATIC: movl $_ddst+64, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux04: +; DARWIN-32-DYNAMIC: movl $_ddst+64, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux04: +; DARWIN-32-PIC: call L20$pb +; DARWIN-32-PIC-NEXT: L20$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ddst-L20$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L20$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux04: +; DARWIN-64-STATIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux04: +; DARWIN-64-DYNAMIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux04: +; DARWIN-64-PIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @qux05() nounwind { @@ -348,7 +1390,71 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16), align 32 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 +; LINUX-64-STATIC: qux05: +; LINUX-64-STATIC: movl dsrc+64(%rip), %eax +; LINUX-64-STATIC: movq dptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux05: +; LINUX-32-STATIC: movl dsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl dptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-STATIC-NEXT: ret ret void + +; LINUX-32-PIC: qux05: +; LINUX-32-PIC: movl dsrc+64, %eax +; LINUX-32-PIC-NEXT: movl dptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux05: +; DARWIN-32-STATIC: movl _dsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux05: +; DARWIN-32-DYNAMIC: movl _dsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux05: +; DARWIN-32-PIC: call L21$pb +; DARWIN-32-PIC-NEXT: L21$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_dsrc-L21$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _dptr-L21$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux05: +; DARWIN-64-STATIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux05: +; DARWIN-64-DYNAMIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux05: +; DARWIN-64-PIC: movl _dsrc+64(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @qux06() nounwind { @@ -356,12 +1462,111 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), align 4 ret void +; LINUX-64-STATIC: qux06: +; LINUX-64-STATIC: movl lsrc+64(%rip), %eax +; LINUX-64-STATIC: movl %eax, ldst+64 +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux06: +; LINUX-32-STATIC: movl lsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ldst+64 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux06: +; LINUX-32-PIC: movl lsrc+64, %eax +; LINUX-32-PIC-NEXT: movl %eax, ldst+64 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux06: +; LINUX-64-PIC: movl lsrc+64(%rip), %eax +; LINUX-64-PIC-NEXT: movl %eax, ldst+64(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux06: +; DARWIN-32-STATIC: movl _lsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ldst+64 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux06: +; DARWIN-32-DYNAMIC: movl _lsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst+64 +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux06: +; DARWIN-32-PIC: call L22$pb +; DARWIN-32-PIC-NEXT: L22$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_lsrc-L22$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, (_ldst-L22$pb)+64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux06: +; DARWIN-64-STATIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ldst+64(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux06: +; DARWIN-64-DYNAMIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst+64(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux06: +; DARWIN-64-PIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ldst+64(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @qux07() nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16), i32** @lptr, align 8 ret void +; LINUX-64-STATIC: qux07: +; LINUX-64-STATIC: movq $ldst+64, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux07: +; LINUX-32-STATIC: movl $ldst+64, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: qux07: +; LINUX-32-PIC: movl $ldst+64, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux07: +; LINUX-64-PIC: leaq ldst+64(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux07: +; DARWIN-32-STATIC: movl $_ldst+64, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux07: +; DARWIN-32-DYNAMIC: movl $_ldst+64, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux07: +; DARWIN-32-PIC: call L23$pb +; DARWIN-32-PIC-NEXT: L23$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ldst-L23$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L23$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux07: +; DARWIN-64-STATIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux07: +; DARWIN-64-DYNAMIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux07: +; DARWIN-64-PIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @qux08() nounwind { @@ -370,7 +1575,69 @@ entry: %1 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16), align 4 %2 = getelementptr i32* %0, i64 16 store i32 %1, i32* %2, align 4 +; LINUX-64-STATIC: qux08: +; LINUX-64-STATIC: movl lsrc+64(%rip), %eax +; LINUX-64-STATIC: movq lptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: qux08: +; LINUX-32-STATIC: movl lsrc+64, %eax +; LINUX-32-STATIC-NEXT: movl lptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-STATIC-NEXT: ret ret void + +; LINUX-32-PIC: qux08: +; LINUX-32-PIC: movl lsrc+64, %eax +; LINUX-32-PIC-NEXT: movl lptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 64(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: qux08: +; LINUX-64-PIC: movl lsrc+64(%rip), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _qux08: +; DARWIN-32-STATIC: movl _lsrc+64, %eax +; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _qux08: +; DARWIN-32-DYNAMIC: movl _lsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 64(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _qux08: +; DARWIN-32-PIC: call L24$pb +; DARWIN-32-PIC-NEXT: L24$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_lsrc-L24$pb)+64(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _lptr-L24$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 64(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _qux08: +; DARWIN-64-STATIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _qux08: +; DARWIN-64-DYNAMIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _qux08: +; DARWIN-64-PIC: movl _lsrc+64(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @ind00(i64 %i) nounwind { @@ -380,6 +1647,75 @@ entry: %2 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: ind00: +; LINUX-64-STATIC: movl src(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, dst(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, dst(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, dst(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _dst(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind00: +; DARWIN-32-PIC: call L25$pb +; DARWIN-32-PIC-NEXT: L25$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L25$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L25$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ixd00(i64 %i) nounwind { @@ -389,6 +1725,75 @@ entry: %2 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: ixd00: +; LINUX-64-STATIC: movl xsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, xdst(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ixd00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl xsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, xdst(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ixd00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl xsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, xdst(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ixd00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ixd00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _xsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _xdst(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ixd00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ixd00: +; DARWIN-32-PIC: call L26$pb +; DARWIN-32-PIC-NEXT: L26$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L26$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L26$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ixd00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ixd00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ixd00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ind01(i64 %i) nounwind { @@ -396,6 +1801,75 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %i store i32* %0, i32** @ptr, align 8 ret void +; LINUX-64-STATIC: ind01: +; LINUX-64-STATIC: leaq dst(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dst(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dst(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind01: +; LINUX-64-PIC: shlq $2, %rdi +; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rdi +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rdi, (%rax) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dst(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: shll $2, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind01: +; DARWIN-32-PIC: call L27$pb +; DARWIN-32-PIC-NEXT: L27$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: shll $2, %ecx +; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L27$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L27$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind01: +; DARWIN-64-STATIC: shlq $2, %rdi +; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind01: +; DARWIN-64-DYNAMIC: shlq $2, %rdi +; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind01: +; DARWIN-64-PIC: shlq $2, %rdi +; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rdi +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-PIC-NEXT: ret } define void @ixd01(i64 %i) nounwind { @@ -403,6 +1877,75 @@ entry: %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %i store i32* %0, i32** @ptr, align 8 ret void +; LINUX-64-STATIC: ixd01: +; LINUX-64-STATIC: leaq xdst(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ixd01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xdst(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ixd01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xdst(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ixd01: +; LINUX-64-PIC: shlq $2, %rdi +; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rdi +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rdi, (%rax) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ixd01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xdst(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ixd01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: shll $2, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ixd01: +; DARWIN-32-PIC: call L28$pb +; DARWIN-32-PIC-NEXT: L28$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: shll $2, %ecx +; DARWIN-32-PIC-NEXT: addl L_xdst$non_lazy_ptr-L28$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L28$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ixd01: +; DARWIN-64-STATIC: shlq $2, %rdi +; DARWIN-64-STATIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ixd01: +; DARWIN-64-DYNAMIC: shlq $2, %rdi +; DARWIN-64-DYNAMIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ixd01: +; DARWIN-64-PIC: shlq $2, %rdi +; DARWIN-64-PIC-NEXT: addq _xdst@GOTPCREL(%rip), %rdi +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rdi, (%rax) +; DARWIN-64-PIC-NEXT: ret } define void @ind02(i64 %i) nounwind { @@ -413,6 +1956,85 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: ind02: +; LINUX-64-STATIC: movl src(,%rdi,4), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl ptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl ptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _ptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind02: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind02: +; DARWIN-32-PIC: call L29$pb +; DARWIN-32-PIC-NEXT: L29$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L29$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L29$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ixd02(i64 %i) nounwind { @@ -423,6 +2045,85 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: ixd02: +; LINUX-64-STATIC: movl xsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ixd02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl xsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl ptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ixd02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl xsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl ptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ixd02: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ixd02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _xsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _ptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ixd02: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ixd02: +; DARWIN-32-PIC: call L30$pb +; DARWIN-32-PIC-NEXT: L30$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L30$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl (%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L30$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ixd02: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ixd02: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ixd02: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ind03(i64 %i) nounwind { @@ -432,6 +2133,71 @@ entry: %2 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: ind03: +; LINUX-64-STATIC: movl dsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ddst(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind03: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ddst(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind03: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ddst(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind03: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind03: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind03: +; DARWIN-32-PIC: call L31$pb +; DARWIN-32-PIC-NEXT: L31$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _dsrc-L31$pb(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, _ddst-L31$pb(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ind04(i64 %i) nounwind { @@ -439,6 +2205,68 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %i store i32* %0, i32** @dptr, align 8 ret void +; LINUX-64-STATIC: ind04: +; LINUX-64-STATIC: leaq ddst(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, dptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind04: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ddst(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind04: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ddst(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind04: +; LINUX-64-PIC: shlq $2, %rdi +; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rdi +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rdi, (%rax) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind04: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ddst(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind04: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ddst(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind04: +; DARWIN-32-PIC: call L32$pb +; DARWIN-32-PIC-NEXT: L32$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal _ddst-L32$pb(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L32$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @ind05(i64 %i) nounwind { @@ -449,6 +2277,78 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: ind05: +; LINUX-64-STATIC: movl dsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movq dptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind05: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl dptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind05: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl dptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind05: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _dptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind05: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind05: +; DARWIN-32-PIC: call L33$pb +; DARWIN-32-PIC-NEXT: L33$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _dsrc-L33$pb(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _dptr-L33$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind05: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind05: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind05: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ind06(i64 %i) nounwind { @@ -458,6 +2358,71 @@ entry: %2 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: ind06: +; LINUX-64-STATIC: movl lsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ldst(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind06: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ldst(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind06: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ldst(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind06: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind06: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind06: +; DARWIN-32-PIC: call L34$pb +; DARWIN-32-PIC-NEXT: L34$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _lsrc-L34$pb(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, _ldst-L34$pb(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @ind07(i64 %i) nounwind { @@ -465,6 +2430,67 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %i store i32* %0, i32** @lptr, align 8 ret void +; LINUX-64-STATIC: ind07: +; LINUX-64-STATIC: leaq ldst(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind07: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ldst(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind07: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ldst(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind07: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ldst(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind07: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ldst(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind07: +; DARWIN-32-PIC: call L35$pb +; DARWIN-32-PIC-NEXT: L35$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal _ldst-L35$pb(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L35$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq (%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @ind08(i64 %i) nounwind { @@ -475,6 +2501,77 @@ entry: %3 = getelementptr i32* %0, i64 %i store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: ind08: +; LINUX-64-STATIC: movl lsrc(,%rdi,4), %eax +; LINUX-64-STATIC: movq lptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, (%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ind08: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl lptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ind08: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl lptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, (%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ind08: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ind08: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _lptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ind08: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, (%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ind08: +; DARWIN-32-PIC: call L36$pb +; DARWIN-32-PIC-NEXT: L36$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _lsrc-L36$pb(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _lptr-L36$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, (%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ind08: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ind08: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ind08: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl (%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, (%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off00(i64 %i) nounwind { @@ -485,6 +2582,75 @@ entry: %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: off00: +; LINUX-64-STATIC: movl src+64(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, dst+64(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, dst+64(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, dst+64(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _dst+64(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off00: +; DARWIN-32-PIC: call L37$pb +; DARWIN-32-PIC-NEXT: L37$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L37$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L37$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @oxf00(i64 %i) nounwind { @@ -495,6 +2661,75 @@ entry: %3 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: oxf00: +; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, xdst+64(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: oxf00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl xsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, xdst+64(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: oxf00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl xsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, xdst+64(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: oxf00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _oxf00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _xsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _xdst+64(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _oxf00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _oxf00: +; DARWIN-32-PIC: call L38$pb +; DARWIN-32-PIC-NEXT: L38$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L38$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L38$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _oxf00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _oxf00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _oxf00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _xdst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off01(i64 %i) nounwind { @@ -503,6 +2738,75 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void +; LINUX-64-STATIC: off01: +; LINUX-64-STATIC: leaq dst+64(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off01: +; DARWIN-32-PIC: call L39$pb +; DARWIN-32-PIC-NEXT: L39$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L39$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: leal 64(%edx,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L39$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @oxf01(i64 %i) nounwind { @@ -511,6 +2815,75 @@ entry: %0 = getelementptr [32 x i32]* @xdst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void +; LINUX-64-STATIC: oxf01: +; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, ptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: oxf01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xdst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: oxf01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xdst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: oxf01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _oxf01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xdst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _oxf01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _oxf01: +; DARWIN-32-PIC: call L40$pb +; DARWIN-32-PIC-NEXT: L40$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L40$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: leal 64(%edx,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L40$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _oxf01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _oxf01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _oxf01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @off02(i64 %i) nounwind { @@ -522,6 +2895,85 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: off02: +; LINUX-64-STATIC: movl src+64(,%rdi,4), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl ptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl ptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _ptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off02: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off02: +; DARWIN-32-PIC: call L41$pb +; DARWIN-32-PIC-NEXT: L41$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L41$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L41$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @oxf02(i64 %i) nounwind { @@ -533,6 +2985,85 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: oxf02: +; LINUX-64-STATIC: movl xsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: oxf02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl xsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl ptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: oxf02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl xsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl ptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: oxf02: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _oxf02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _xsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _ptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _oxf02: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 64(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _oxf02: +; DARWIN-32-PIC: call L42$pb +; DARWIN-32-PIC-NEXT: L42$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L42$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 64(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L42$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _oxf02: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _oxf02: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _oxf02: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off03(i64 %i) nounwind { @@ -543,6 +3074,71 @@ entry: %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: off03: +; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ddst+64(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off03: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ddst+64(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off03: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ddst+64(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off03: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst+64(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off03: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+64(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst+64(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off03: +; DARWIN-32-PIC: call L43$pb +; DARWIN-32-PIC-NEXT: L43$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_dsrc-L43$pb)+64(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, (_ddst-L43$pb)+64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off04(i64 %i) nounwind { @@ -551,6 +3147,68 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum store i32* %0, i32** @dptr, align 8 ret void +; LINUX-64-STATIC: off04: +; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, dptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off04: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ddst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off04: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ddst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off04: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ddst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off04: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ddst+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off04: +; DARWIN-32-PIC: call L44$pb +; DARWIN-32-PIC-NEXT: L44$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ddst-L44$pb)+64(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L44$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @off05(i64 %i) nounwind { @@ -562,6 +3220,78 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: off05: +; LINUX-64-STATIC: movl dsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movq dptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off05: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl dptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off05: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl dptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off05: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _dptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off05: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+64(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off05: +; DARWIN-32-PIC: call L45$pb +; DARWIN-32-PIC-NEXT: L45$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_dsrc-L45$pb)+64(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _dptr-L45$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off05: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off05: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off05: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off06(i64 %i) nounwind { @@ -572,6 +3302,71 @@ entry: %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: off06: +; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ldst+64(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off06: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ldst+64(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off06: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ldst+64(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off06: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst+64(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off06: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+64(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst+64(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off06: +; DARWIN-32-PIC: call L46$pb +; DARWIN-32-PIC-NEXT: L46$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_lsrc-L46$pb)+64(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, (_ldst-L46$pb)+64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @off07(i64 %i) nounwind { @@ -580,6 +3375,67 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum store i32* %0, i32** @lptr, align 8 ret void +; LINUX-64-STATIC: off07: +; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off07: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ldst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off07: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ldst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off07: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ldst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off07: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ldst+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off07: +; DARWIN-32-PIC: call L47$pb +; DARWIN-32-PIC-NEXT: L47$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ldst-L47$pb)+64(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L47$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @off08(i64 %i) nounwind { @@ -591,6 +3447,77 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: off08: +; LINUX-64-STATIC: movl lsrc+64(,%rdi,4), %eax +; LINUX-64-STATIC: movq lptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: off08: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc+64(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl lptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: off08: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc+64(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl lptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: off08: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _off08: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc+64(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _lptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _off08: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+64(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 64(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _off08: +; DARWIN-32-PIC: call L48$pb +; DARWIN-32-PIC-NEXT: L48$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_lsrc-L48$pb)+64(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _lptr-L48$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 64(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _off08: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _off08: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _off08: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 64(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 64(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @moo00(i64 %i) nounwind { @@ -598,12 +3525,136 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), align 4 ret void +; LINUX-64-STATIC: moo00: +; LINUX-64-STATIC: movl src+262144(%rip), %eax +; LINUX-64-STATIC: movl %eax, dst+262144(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo00: +; LINUX-32-STATIC: movl src+262144, %eax +; LINUX-32-STATIC-NEXT: movl %eax, dst+262144 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo00: +; LINUX-32-PIC: movl src+262144, %eax +; LINUX-32-PIC-NEXT: movl %eax, dst+262144 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo00: +; DARWIN-32-STATIC: movl _src+262144, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dst+262144 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 262144(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo00: +; DARWIN-32-PIC: call L49$pb +; DARWIN-32-PIC-NEXT: L49$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L49$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 262144(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L49$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @moo01(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536), i32** @ptr, align 8 ret void +; LINUX-64-STATIC: moo01: +; LINUX-64-STATIC: movq $dst+262144, ptr(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo01: +; LINUX-32-STATIC: movl $dst+262144, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo01: +; LINUX-32-PIC: movl $dst+262144, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo01: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo01: +; DARWIN-32-STATIC: movl $_dst+262144, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo01: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo01: +; DARWIN-32-PIC: call L50$pb +; DARWIN-32-PIC-NEXT: L50$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl $262144, %ecx +; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L50$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L50$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo01: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo01: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo01: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @moo02(i64 %i) nounwind { @@ -613,6 +3664,80 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: moo02: +; LINUX-64-STATIC: movl src+262144(%rip), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo02: +; LINUX-32-STATIC: movl src+262144, %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo02: +; LINUX-32-PIC: movl src+262144, %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo02: +; DARWIN-32-STATIC: movl _src+262144, %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo02: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl 262144(%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl (%ecx), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo02: +; DARWIN-32-PIC: call L51$pb +; DARWIN-32-PIC-NEXT: L51$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L51$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl 262144(%ecx), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L51$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @moo03(i64 %i) nounwind { @@ -620,12 +3745,115 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536), align 32 store i32 %0, i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), align 32 ret void +; LINUX-64-STATIC: moo03: +; LINUX-64-STATIC: movl dsrc+262144(%rip), %eax +; LINUX-64-STATIC: movl %eax, ddst+262144(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo03: +; LINUX-32-STATIC: movl dsrc+262144, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ddst+262144 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo03: +; LINUX-32-PIC: movl dsrc+262144, %eax +; LINUX-32-PIC-NEXT: movl %eax, ddst+262144 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo03: +; DARWIN-32-STATIC: movl _dsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ddst+262144 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo03: +; DARWIN-32-DYNAMIC: movl _dsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ddst+262144 +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo03: +; DARWIN-32-PIC: call L52$pb +; DARWIN-32-PIC-NEXT: L52$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_dsrc-L52$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, (_ddst-L52$pb)+262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo03: +; DARWIN-64-STATIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ddst+262144(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo03: +; DARWIN-64-DYNAMIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ddst+262144(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo03: +; DARWIN-64-PIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ddst+262144(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @moo04(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536), i32** @dptr, align 8 ret void +; LINUX-64-STATIC: moo04: +; LINUX-64-STATIC: movq $ddst+262144, dptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo04: +; LINUX-32-STATIC: movl $ddst+262144, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo04: +; LINUX-32-PIC: movl $ddst+262144, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo04: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo04: +; DARWIN-32-STATIC: movl $_ddst+262144, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo04: +; DARWIN-32-DYNAMIC: movl $_ddst+262144, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo04: +; DARWIN-32-PIC: call L53$pb +; DARWIN-32-PIC-NEXT: L53$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ddst-L53$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L53$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo04: +; DARWIN-64-STATIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo04: +; DARWIN-64-DYNAMIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo04: +; DARWIN-64-PIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @moo05(i64 %i) nounwind { @@ -635,6 +3863,70 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: moo05: +; LINUX-64-STATIC: movl dsrc+262144(%rip), %eax +; LINUX-64-STATIC: movq dptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo05: +; LINUX-32-STATIC: movl dsrc+262144, %eax +; LINUX-32-STATIC-NEXT: movl dptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo05: +; LINUX-32-PIC: movl dsrc+262144, %eax +; LINUX-32-PIC-NEXT: movl dptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo05: +; DARWIN-32-STATIC: movl _dsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo05: +; DARWIN-32-DYNAMIC: movl _dsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo05: +; DARWIN-32-PIC: call L54$pb +; DARWIN-32-PIC-NEXT: L54$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_dsrc-L54$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _dptr-L54$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo05: +; DARWIN-64-STATIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo05: +; DARWIN-64-DYNAMIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo05: +; DARWIN-64-PIC: movl _dsrc+262144(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @moo06(i64 %i) nounwind { @@ -642,12 +3934,111 @@ entry: %0 = load i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536), align 4 store i32 %0, i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), align 4 ret void +; LINUX-64-STATIC: moo06: +; LINUX-64-STATIC: movl lsrc+262144(%rip), %eax +; LINUX-64-STATIC: movl %eax, ldst+262144(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo06: +; LINUX-32-STATIC: movl lsrc+262144, %eax +; LINUX-32-STATIC-NEXT: movl %eax, ldst+262144 +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo06: +; LINUX-32-PIC: movl lsrc+262144, %eax +; LINUX-32-PIC-NEXT: movl %eax, ldst+262144 +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo06: +; LINUX-64-PIC: movl lsrc+262144(%rip), %eax +; LINUX-64-PIC-NEXT: movl %eax, ldst+262144(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo06: +; DARWIN-32-STATIC: movl _lsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ldst+262144 +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo06: +; DARWIN-32-DYNAMIC: movl _lsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _ldst+262144 +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo06: +; DARWIN-32-PIC: call L55$pb +; DARWIN-32-PIC-NEXT: L55$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_lsrc-L55$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, (_ldst-L55$pb)+262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo06: +; DARWIN-64-STATIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-STATIC-NEXT: movl %eax, _ldst+262144(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo06: +; DARWIN-64-DYNAMIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movl %eax, _ldst+262144(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo06: +; DARWIN-64-PIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-PIC-NEXT: movl %eax, _ldst+262144(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @moo07(i64 %i) nounwind { entry: store i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536), i32** @lptr, align 8 ret void +; LINUX-64-STATIC: moo07: +; LINUX-64-STATIC: movq $ldst+262144, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo07: +; LINUX-32-STATIC: movl $ldst+262144, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo07: +; LINUX-32-PIC: movl $ldst+262144, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo07: +; LINUX-64-PIC: leaq ldst+262144(%rip), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo07: +; DARWIN-32-STATIC: movl $_ldst+262144, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo07: +; DARWIN-32-DYNAMIC: movl $_ldst+262144, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo07: +; DARWIN-32-PIC: call L56$pb +; DARWIN-32-PIC-NEXT: L56$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ldst-L56$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L56$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo07: +; DARWIN-64-STATIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo07: +; DARWIN-64-DYNAMIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo07: +; DARWIN-64-PIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @moo08(i64 %i) nounwind { @@ -657,6 +4048,68 @@ entry: %2 = getelementptr i32* %0, i64 65536 store i32 %1, i32* %2, align 4 ret void +; LINUX-64-STATIC: moo08: +; LINUX-64-STATIC: movl lsrc+262144(%rip), %eax +; LINUX-64-STATIC: movq lptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: moo08: +; LINUX-32-STATIC: movl lsrc+262144, %eax +; LINUX-32-STATIC-NEXT: movl lptr, %ecx +; LINUX-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: moo08: +; LINUX-32-PIC: movl lsrc+262144, %eax +; LINUX-32-PIC-NEXT: movl lptr, %ecx +; LINUX-32-PIC-NEXT: movl %eax, 262144(%ecx) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: moo08: +; LINUX-64-PIC: movl lsrc+262144(%rip), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _moo08: +; DARWIN-32-STATIC: movl _lsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx +; DARWIN-32-STATIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _moo08: +; DARWIN-32-DYNAMIC: movl _lsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, 262144(%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _moo08: +; DARWIN-32-PIC: call L57$pb +; DARWIN-32-PIC-NEXT: L57$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl (_lsrc-L57$pb)+262144(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl _lptr-L57$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, 262144(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _moo08: +; DARWIN-64-STATIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _moo08: +; DARWIN-64-DYNAMIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _moo08: +; DARWIN-64-PIC: movl _lsrc+262144(%rip), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @big00(i64 %i) nounwind { @@ -667,6 +4120,75 @@ entry: %3 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: big00: +; LINUX-64-STATIC: movl src+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, dst+262144(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, dst+262144(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, dst+262144(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _dst+262144(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 262144(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big00: +; DARWIN-32-PIC: call L58$pb +; DARWIN-32-PIC-NEXT: L58$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L58$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 262144(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L58$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @big01(i64 %i) nounwind { @@ -675,6 +4197,75 @@ entry: %0 = getelementptr [131072 x i32]* @dst, i64 0, i64 %.sum store i32* %0, i32** @ptr, align 8 ret void +; LINUX-64-STATIC: big01: +; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, ptr(%rip) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, ptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, ptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _ptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %eax, (%ecx) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big01: +; DARWIN-32-PIC: call L59$pb +; DARWIN-32-PIC-NEXT: L59$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L59$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: leal 262144(%edx,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L59$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %ecx, (%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq %rax, (%rcx) +; DARWIN-64-PIC-NEXT: ret } define void @big02(i64 %i) nounwind { @@ -686,6 +4277,85 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: big02: +; LINUX-64-STATIC: movl src+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movq ptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl src+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl ptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl src+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl ptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big02: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _src+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _ptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big02: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl 262144(%ecx,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl L_ptr$non_lazy_ptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl (%edx), %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big02: +; DARWIN-32-PIC: call L60$pb +; DARWIN-32-PIC-NEXT: L60$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L60$pb(%eax), %edx +; DARWIN-32-PIC-NEXT: movl 262144(%edx,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L60$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big02: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big02: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big02: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movq (%rcx), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @big03(i64 %i) nounwind { @@ -696,6 +4366,71 @@ entry: %3 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: big03: +; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ddst+262144(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big03: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ddst+262144(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big03: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ddst+262144(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq ddst@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big03: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ddst+262144(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big03: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ddst+262144(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big03: +; DARWIN-32-PIC: call L61$pb +; DARWIN-32-PIC-NEXT: L61$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_dsrc-L61$pb)+262144(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, (_ddst-L61$pb)+262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ddst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @big04(i64 %i) nounwind { @@ -704,6 +4439,68 @@ entry: %0 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %.sum store i32* %0, i32** @dptr, align 8 ret void +; LINUX-64-STATIC: big04: +; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, dptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big04: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ddst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, dptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big04: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ddst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, dptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq %rax, (%rcx) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big04: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ddst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _dptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big04: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ddst+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _dptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big04: +; DARWIN-32-PIC: call L62$pb +; DARWIN-32-PIC-NEXT: L62$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ddst-L62$pb)+262144(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _dptr-L62$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _dptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @big05(i64 %i) nounwind { @@ -715,6 +4512,78 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: big05: +; LINUX-64-STATIC: movl dsrc+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movq dptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big05: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dsrc+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl dptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big05: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dsrc+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl dptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big05: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movq (%rcx), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big05: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _dptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big05: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dsrc+262144(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big05: +; DARWIN-32-PIC: call L63$pb +; DARWIN-32-PIC-NEXT: L63$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_dsrc-L63$pb)+262144(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _dptr-L63$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big05: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big05: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big05: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _dptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @big06(i64 %i) nounwind { @@ -725,6 +4594,71 @@ entry: %3 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 store i32 %2, i32* %3, align 4 ret void +; LINUX-64-STATIC: big06: +; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movl %eax, ldst+262144(,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big06: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl %ecx, ldst+262144(,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big06: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl %ecx, ldst+262144(,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: leaq ldst(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big06: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl %ecx, _ldst+262144(,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big06: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, _ldst+262144(,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big06: +; DARWIN-32-PIC: call L64$pb +; DARWIN-32-PIC-NEXT: L64$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_lsrc-L64$pb)+262144(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl %edx, (_ldst-L64$pb)+262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: leaq _ldst(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define void @big07(i64 %i) nounwind { @@ -733,6 +4667,67 @@ entry: %0 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %.sum store i32* %0, i32** @lptr, align 8 ret void +; LINUX-64-STATIC: big07: +; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: movq %rax, lptr +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big07: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ldst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: movl %eax, lptr +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big07: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ldst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: movl %eax, lptr +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: movq %rax, lptr(%rip) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big07: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ldst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: movl %eax, _lptr +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big07: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ldst+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: movl %eax, _lptr +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big07: +; DARWIN-32-PIC: call L65$pb +; DARWIN-32-PIC-NEXT: L65$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ldst-L65$pb)+262144(%eax,%ecx,4), %ecx +; DARWIN-32-PIC-NEXT: movl %ecx, _lptr-L65$pb(%eax) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: movq %rax, _lptr(%rip) +; DARWIN-64-PIC-NEXT: ret } define void @big08(i64 %i) nounwind { @@ -744,81 +4739,782 @@ entry: %4 = getelementptr i32* %0, i64 %1 store i32 %3, i32* %4, align 4 ret void +; LINUX-64-STATIC: big08: +; LINUX-64-STATIC: movl lsrc+262144(,%rdi,4), %eax +; LINUX-64-STATIC: movq lptr(%rip), %rcx +; LINUX-64-STATIC: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: big08: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lsrc+262144(,%eax,4), %ecx +; LINUX-32-STATIC-NEXT: movl lptr, %edx +; LINUX-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: big08: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lsrc+262144(,%eax,4), %ecx +; LINUX-32-PIC-NEXT: movl lptr, %edx +; LINUX-32-PIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: big08: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; LINUX-64-PIC-NEXT: movq lptr(%rip), %rcx +; LINUX-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _big08: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx +; DARWIN-32-STATIC-NEXT: movl _lptr, %edx +; DARWIN-32-STATIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _big08: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lsrc+262144(,%eax,4), %ecx +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %edx +; DARWIN-32-DYNAMIC-NEXT: movl %ecx, 262144(%edx,%eax,4) +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _big08: +; DARWIN-32-PIC: call L66$pb +; DARWIN-32-PIC-NEXT: L66$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl (_lsrc-L66$pb)+262144(%eax,%ecx,4), %edx +; DARWIN-32-PIC-NEXT: movl _lptr-L66$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl %edx, 262144(%eax,%ecx,4) +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _big08: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-STATIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _big08: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-DYNAMIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _big08: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: movl 262144(%rax,%rdi,4), %eax +; DARWIN-64-PIC-NEXT: movq _lptr(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl %eax, 262144(%rcx,%rdi,4) +; DARWIN-64-PIC-NEXT: ret } define i8* @bar00() nounwind { entry: ret i8* bitcast ([131072 x i32]* @src to i8*) +; LINUX-64-STATIC: bar00: +; LINUX-64-STATIC: movl $src, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar00: +; LINUX-32-STATIC: movl $src, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar00: +; LINUX-32-PIC: movl $src, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar00: +; DARWIN-32-STATIC: movl $_src, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar00: +; DARWIN-32-PIC: call L67$pb +; DARWIN-32-PIC-NEXT: L67$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L67$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bxr00() nounwind { entry: ret i8* bitcast ([32 x i32]* @xsrc to i8*) +; LINUX-64-STATIC: bxr00: +; LINUX-64-STATIC: movl $xsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bxr00: +; LINUX-32-STATIC: movl $xsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bxr00: +; LINUX-32-PIC: movl $xsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bxr00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bxr00: +; DARWIN-32-STATIC: movl $_xsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bxr00: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bxr00: +; DARWIN-32-PIC: call L68$pb +; DARWIN-32-PIC-NEXT: L68$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L68$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bxr00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bxr00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bxr00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar01() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dst to i8*) +; LINUX-64-STATIC: bar01: +; LINUX-64-STATIC: movl $dst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar01: +; LINUX-32-STATIC: movl $dst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar01: +; LINUX-32-PIC: movl $dst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar01: +; DARWIN-32-STATIC: movl $_dst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar01: +; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar01: +; DARWIN-32-PIC: call L69$pb +; DARWIN-32-PIC-NEXT: L69$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L69$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bxr01() nounwind { entry: ret i8* bitcast ([32 x i32]* @xdst to i8*) +; LINUX-64-STATIC: bxr01: +; LINUX-64-STATIC: movl $xdst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bxr01: +; LINUX-32-STATIC: movl $xdst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bxr01: +; LINUX-32-PIC: movl $xdst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bxr01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bxr01: +; DARWIN-32-STATIC: movl $_xdst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bxr01: +; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bxr01: +; DARWIN-32-PIC: call L70$pb +; DARWIN-32-PIC-NEXT: L70$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L70$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bxr01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bxr01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bxr01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar02() nounwind { entry: ret i8* bitcast (i32** @ptr to i8*) +; LINUX-64-STATIC: bar02: +; LINUX-64-STATIC: movl $ptr, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar02: +; LINUX-32-STATIC: movl $ptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar02: +; LINUX-32-PIC: movl $ptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar02: +; DARWIN-32-STATIC: movl $_ptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar02: +; DARWIN-32-PIC: call L71$pb +; DARWIN-32-PIC-NEXT: L71$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L71$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar03() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dsrc to i8*) +; LINUX-64-STATIC: bar03: +; LINUX-64-STATIC: movl $dsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar03: +; LINUX-32-STATIC: movl $dsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar03: +; LINUX-32-PIC: movl $dsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar03: +; DARWIN-32-STATIC: movl $_dsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar03: +; DARWIN-32-DYNAMIC: movl $_dsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar03: +; DARWIN-32-PIC: call L72$pb +; DARWIN-32-PIC-NEXT: L72$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _dsrc-L72$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar04() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ddst to i8*) +; LINUX-64-STATIC: bar04: +; LINUX-64-STATIC: movl $ddst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar04: +; LINUX-32-STATIC: movl $ddst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar04: +; LINUX-32-PIC: movl $ddst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar04: +; DARWIN-32-STATIC: movl $_ddst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar04: +; DARWIN-32-DYNAMIC: movl $_ddst, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar04: +; DARWIN-32-PIC: call L73$pb +; DARWIN-32-PIC-NEXT: L73$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ddst-L73$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar05() nounwind { entry: ret i8* bitcast (i32** @dptr to i8*) +; LINUX-64-STATIC: bar05: +; LINUX-64-STATIC: movl $dptr, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar05: +; LINUX-32-STATIC: movl $dptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar05: +; LINUX-32-PIC: movl $dptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar05: +; DARWIN-32-STATIC: movl $_dptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar05: +; DARWIN-32-DYNAMIC: movl $_dptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar05: +; DARWIN-32-PIC: call L74$pb +; DARWIN-32-PIC-NEXT: L74$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _dptr-L74$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar05: +; DARWIN-64-STATIC: leaq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar05: +; DARWIN-64-DYNAMIC: leaq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar05: +; DARWIN-64-PIC: leaq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar06() nounwind { entry: ret i8* bitcast ([131072 x i32]* @lsrc to i8*) +; LINUX-64-STATIC: bar06: +; LINUX-64-STATIC: movl $lsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar06: +; LINUX-32-STATIC: movl $lsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar06: +; LINUX-32-PIC: movl $lsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar06: +; DARWIN-32-STATIC: movl $_lsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar06: +; DARWIN-32-DYNAMIC: movl $_lsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar06: +; DARWIN-32-PIC: call L75$pb +; DARWIN-32-PIC-NEXT: L75$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _lsrc-L75$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar07() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ldst to i8*) +; LINUX-64-STATIC: bar07: +; LINUX-64-STATIC: movl $ldst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar07: +; LINUX-32-STATIC: movl $ldst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar07: +; LINUX-32-PIC: movl $ldst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar07: +; DARWIN-32-STATIC: movl $_ldst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar07: +; DARWIN-32-DYNAMIC: movl $_ldst, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar07: +; DARWIN-32-PIC: call L76$pb +; DARWIN-32-PIC-NEXT: L76$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ldst-L76$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bar08() nounwind { entry: ret i8* bitcast (i32** @lptr to i8*) +; LINUX-64-STATIC: bar08: +; LINUX-64-STATIC: movl $lptr, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bar08: +; LINUX-32-STATIC: movl $lptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bar08: +; LINUX-32-PIC: movl $lptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bar08: +; LINUX-64-PIC: leaq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bar08: +; DARWIN-32-STATIC: movl $_lptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bar08: +; DARWIN-32-DYNAMIC: movl $_lptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bar08: +; DARWIN-32-PIC: call L77$pb +; DARWIN-32-PIC-NEXT: L77$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _lptr-L77$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bar08: +; DARWIN-64-STATIC: leaq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bar08: +; DARWIN-64-DYNAMIC: leaq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bar08: +; DARWIN-64-PIC: leaq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har00() nounwind { entry: ret i8* bitcast ([131072 x i32]* @src to i8*) +; LINUX-64-STATIC: har00: +; LINUX-64-STATIC: movl $src, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har00: +; LINUX-32-STATIC: movl $src, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har00: +; LINUX-32-PIC: movl $src, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har00: +; DARWIN-32-STATIC: movl $_src, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har00: +; DARWIN-32-PIC: call L78$pb +; DARWIN-32-PIC-NEXT: L78$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L78$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @hxr00() nounwind { entry: ret i8* bitcast ([32 x i32]* @xsrc to i8*) +; LINUX-64-STATIC: hxr00: +; LINUX-64-STATIC: movl $xsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: hxr00: +; LINUX-32-STATIC: movl $xsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: hxr00: +; LINUX-32-PIC: movl $xsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: hxr00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _hxr00: +; DARWIN-32-STATIC: movl $_xsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _hxr00: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _hxr00: +; DARWIN-32-PIC: call L79$pb +; DARWIN-32-PIC-NEXT: L79$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L79$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _hxr00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _hxr00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _hxr00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har01() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dst to i8*) +; LINUX-64-STATIC: har01: +; LINUX-64-STATIC: movl $dst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har01: +; LINUX-32-STATIC: movl $dst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har01: +; LINUX-32-PIC: movl $dst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har01: +; DARWIN-32-STATIC: movl $_dst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har01: +; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har01: +; DARWIN-32-PIC: call L80$pb +; DARWIN-32-PIC-NEXT: L80$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L80$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @hxr01() nounwind { entry: ret i8* bitcast ([32 x i32]* @xdst to i8*) +; LINUX-64-STATIC: hxr01: +; LINUX-64-STATIC: movl $xdst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: hxr01: +; LINUX-32-STATIC: movl $xdst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: hxr01: +; LINUX-32-PIC: movl $xdst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: hxr01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _hxr01: +; DARWIN-32-STATIC: movl $_xdst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _hxr01: +; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _hxr01: +; DARWIN-32-PIC: call L81$pb +; DARWIN-32-PIC-NEXT: L81$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L81$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _hxr01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _hxr01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _hxr01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har02() nounwind { @@ -826,16 +5522,148 @@ entry: %0 = load i32** @ptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 +; LINUX-64-STATIC: har02: +; LINUX-64-STATIC: movq ptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har02: +; LINUX-32-STATIC: movl ptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har02: +; LINUX-32-PIC: movl ptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har02: +; DARWIN-32-STATIC: movl _ptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har02: +; DARWIN-32-PIC: call L82$pb +; DARWIN-32-PIC-NEXT: L82$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L82$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq (%rax), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq (%rax), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har03() nounwind { entry: ret i8* bitcast ([131072 x i32]* @dsrc to i8*) +; LINUX-64-STATIC: har03: +; LINUX-64-STATIC: movl $dsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har03: +; LINUX-32-STATIC: movl $dsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har03: +; LINUX-32-PIC: movl $dsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har03: +; DARWIN-32-STATIC: movl $_dsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har03: +; DARWIN-32-DYNAMIC: movl $_dsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har03: +; DARWIN-32-PIC: call L83$pb +; DARWIN-32-PIC-NEXT: L83$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _dsrc-L83$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har04() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ddst to i8*) +; LINUX-64-STATIC: har04: +; LINUX-64-STATIC: movl $ddst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har04: +; LINUX-32-STATIC: movl $ddst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har04: +; LINUX-32-PIC: movl $ddst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har04: +; DARWIN-32-STATIC: movl $_ddst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har04: +; DARWIN-32-DYNAMIC: movl $_ddst, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har04: +; DARWIN-32-PIC: call L84$pb +; DARWIN-32-PIC-NEXT: L84$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ddst-L84$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har05() nounwind { @@ -843,16 +5671,143 @@ entry: %0 = load i32** @dptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 +; LINUX-64-STATIC: har05: +; LINUX-64-STATIC: movq dptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har05: +; LINUX-32-STATIC: movl dptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har05: +; LINUX-32-PIC: movl dptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har05: +; DARWIN-32-STATIC: movl _dptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har05: +; DARWIN-32-DYNAMIC: movl _dptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har05: +; DARWIN-32-PIC: call L85$pb +; DARWIN-32-PIC-NEXT: L85$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _dptr-L85$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har05: +; DARWIN-64-STATIC: movq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har05: +; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har05: +; DARWIN-64-PIC: movq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har06() nounwind { entry: ret i8* bitcast ([131072 x i32]* @lsrc to i8*) +; LINUX-64-STATIC: har06: +; LINUX-64-STATIC: movl $lsrc, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har06: +; LINUX-32-STATIC: movl $lsrc, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har06: +; LINUX-32-PIC: movl $lsrc, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har06: +; DARWIN-32-STATIC: movl $_lsrc, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har06: +; DARWIN-32-DYNAMIC: movl $_lsrc, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har06: +; DARWIN-32-PIC: call L86$pb +; DARWIN-32-PIC-NEXT: L86$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _lsrc-L86$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har07() nounwind { entry: ret i8* bitcast ([131072 x i32]* @ldst to i8*) +; LINUX-64-STATIC: har07: +; LINUX-64-STATIC: movl $ldst, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har07: +; LINUX-32-STATIC: movl $ldst, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har07: +; LINUX-32-PIC: movl $ldst, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har07: +; DARWIN-32-STATIC: movl $_ldst, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har07: +; DARWIN-32-DYNAMIC: movl $_ldst, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har07: +; DARWIN-32-PIC: call L87$pb +; DARWIN-32-PIC-NEXT: L87$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _ldst-L87$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @har08() nounwind { @@ -860,26 +5815,260 @@ entry: %0 = load i32** @lptr, align 8 %1 = bitcast i32* %0 to i8* ret i8* %1 +; LINUX-64-STATIC: har08: +; LINUX-64-STATIC: movq lptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: har08: +; LINUX-32-STATIC: movl lptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: har08: +; LINUX-32-PIC: movl lptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: har08: +; LINUX-64-PIC: movq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _har08: +; DARWIN-32-STATIC: movl _lptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _har08: +; DARWIN-32-DYNAMIC: movl _lptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _har08: +; DARWIN-32-PIC: call L88$pb +; DARWIN-32-PIC-NEXT: L88$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _lptr-L88$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _har08: +; DARWIN-64-STATIC: movq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _har08: +; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _har08: +; DARWIN-64-PIC: movq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat00: +; LINUX-64-STATIC: movl $src+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat00: +; LINUX-32-STATIC: movl $src+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat00: +; LINUX-32-PIC: movl $src+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat00: +; DARWIN-32-STATIC: movl $_src+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat00: +; DARWIN-32-DYNAMIC: movl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat00: +; DARWIN-32-PIC: call L89$pb +; DARWIN-32-PIC-NEXT: L89$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L89$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bxt00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xsrc, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bxt00: +; LINUX-64-STATIC: movl $xsrc+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bxt00: +; LINUX-32-STATIC: movl $xsrc+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bxt00: +; LINUX-32-PIC: movl $xsrc+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bxt00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bxt00: +; DARWIN-32-STATIC: movl $_xsrc+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bxt00: +; DARWIN-32-DYNAMIC: movl L_xsrc$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bxt00: +; DARWIN-32-PIC: call L90$pb +; DARWIN-32-PIC-NEXT: L90$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L90$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bxt00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bxt00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bxt00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat01: +; LINUX-64-STATIC: movl $dst+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat01: +; LINUX-32-STATIC: movl $dst+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat01: +; LINUX-32-PIC: movl $dst+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat01: +; DARWIN-32-STATIC: movl $_dst+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat01: +; DARWIN-32-DYNAMIC: movl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat01: +; DARWIN-32-PIC: call L91$pb +; DARWIN-32-PIC-NEXT: L91$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L91$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bxt01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bxt01: +; LINUX-64-STATIC: movl $xdst+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bxt01: +; LINUX-32-STATIC: movl $xdst+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bxt01: +; LINUX-32-PIC: movl $xdst+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bxt01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bxt01: +; DARWIN-32-STATIC: movl $_xdst+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bxt01: +; DARWIN-32-DYNAMIC: movl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bxt01: +; DARWIN-32-PIC: call L92$pb +; DARWIN-32-PIC-NEXT: L92$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L92$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bxt01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bxt01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bxt01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat02() nounwind { @@ -888,16 +6077,160 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bat02: +; LINUX-64-STATIC: movq ptr(%rip), %rax +; LINUX-64-STATIC: addq $64, %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat02: +; LINUX-32-STATIC: movl ptr, %eax +; LINUX-32-STATIC-NEXT: addl $64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat02: +; LINUX-32-PIC: movl ptr, %eax +; LINUX-32-PIC-NEXT: addl $64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat02: +; DARWIN-32-STATIC: movl _ptr, %eax +; DARWIN-32-STATIC-NEXT: addl $64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat02: +; DARWIN-32-PIC: call L93$pb +; DARWIN-32-PIC-NEXT: L93$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L93$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq (%rax), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq (%rax), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat03() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat03: +; LINUX-64-STATIC: movl $dsrc+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat03: +; LINUX-32-STATIC: movl $dsrc+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat03: +; LINUX-32-PIC: movl $dsrc+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat03: +; DARWIN-32-STATIC: movl $_dsrc+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat03: +; DARWIN-32-DYNAMIC: movl $_dsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat03: +; DARWIN-32-PIC: call L94$pb +; DARWIN-32-PIC-NEXT: L94$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_dsrc-L94$pb)+64(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat03: +; DARWIN-64-STATIC: leaq _dsrc+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat03: +; DARWIN-64-DYNAMIC: leaq _dsrc+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat03: +; DARWIN-64-PIC: leaq _dsrc+64(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat04() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat04: +; LINUX-64-STATIC: movl $ddst+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat04: +; LINUX-32-STATIC: movl $ddst+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat04: +; LINUX-32-PIC: movl $ddst+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat04: +; DARWIN-32-STATIC: movl $_ddst+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat04: +; DARWIN-32-DYNAMIC: movl $_ddst+64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat04: +; DARWIN-32-PIC: call L95$pb +; DARWIN-32-PIC-NEXT: L95$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ddst-L95$pb)+64(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat04: +; DARWIN-64-STATIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat04: +; DARWIN-64-DYNAMIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat04: +; DARWIN-64-PIC: leaq _ddst+64(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat05() nounwind { @@ -906,16 +6239,153 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bat05: +; LINUX-64-STATIC: movq dptr(%rip), %rax +; LINUX-64-STATIC: addq $64, %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat05: +; LINUX-32-STATIC: movl dptr, %eax +; LINUX-32-STATIC-NEXT: addl $64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat05: +; LINUX-32-PIC: movl dptr, %eax +; LINUX-32-PIC-NEXT: addl $64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat05: +; DARWIN-32-STATIC: movl _dptr, %eax +; DARWIN-32-STATIC-NEXT: addl $64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat05: +; DARWIN-32-DYNAMIC: movl _dptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat05: +; DARWIN-32-PIC: call L96$pb +; DARWIN-32-PIC-NEXT: L96$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _dptr-L96$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat05: +; DARWIN-64-STATIC: movq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat05: +; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat05: +; DARWIN-64-PIC: movq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat06() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat06: +; LINUX-64-STATIC: movl $lsrc+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat06: +; LINUX-32-STATIC: movl $lsrc+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat06: +; LINUX-32-PIC: movl $lsrc+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat06: +; LINUX-64-PIC: leaq lsrc+64(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat06: +; DARWIN-32-STATIC: movl $_lsrc+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat06: +; DARWIN-32-DYNAMIC: movl $_lsrc+64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat06: +; DARWIN-32-PIC: call L97$pb +; DARWIN-32-PIC-NEXT: L97$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_lsrc-L97$pb)+64(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat06: +; DARWIN-64-STATIC: leaq _lsrc+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat06: +; DARWIN-64-DYNAMIC: leaq _lsrc+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat06: +; DARWIN-64-PIC: leaq _lsrc+64(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat07() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 16) to i8*) +; LINUX-64-STATIC: bat07: +; LINUX-64-STATIC: movl $ldst+64, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat07: +; LINUX-32-STATIC: movl $ldst+64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat07: +; LINUX-32-PIC: movl $ldst+64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat07: +; LINUX-64-PIC: leaq ldst+64(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat07: +; DARWIN-32-STATIC: movl $_ldst+64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat07: +; DARWIN-32-DYNAMIC: movl $_ldst+64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat07: +; DARWIN-32-PIC: call L98$pb +; DARWIN-32-PIC-NEXT: L98$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ldst-L98$pb)+64(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat07: +; DARWIN-64-STATIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat07: +; DARWIN-64-DYNAMIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat07: +; DARWIN-64-PIC: leaq _ldst+64(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bat08() nounwind { @@ -924,21 +6394,217 @@ entry: %1 = getelementptr i32* %0, i64 16 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bat08: +; LINUX-64-STATIC: movq lptr(%rip), %rax +; LINUX-64-STATIC: addq $64, %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bat08: +; LINUX-32-STATIC: movl lptr, %eax +; LINUX-32-STATIC-NEXT: addl $64, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bat08: +; LINUX-32-PIC: movl lptr, %eax +; LINUX-32-PIC-NEXT: addl $64, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bat08: +; LINUX-64-PIC: movq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: addq $64, %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bat08: +; DARWIN-32-STATIC: movl _lptr, %eax +; DARWIN-32-STATIC-NEXT: addl $64, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bat08: +; DARWIN-32-DYNAMIC: movl _lptr, %eax +; DARWIN-32-DYNAMIC-NEXT: addl $64, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bat08: +; DARWIN-32-PIC: call L99$pb +; DARWIN-32-PIC-NEXT: L99$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl _lptr-L99$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: addl $64, %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bat08: +; DARWIN-64-STATIC: movq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: addq $64, %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bat08: +; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: addq $64, %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bat08: +; DARWIN-64-PIC: movq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: addq $64, %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam00() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @src, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam00: +; LINUX-64-STATIC: movl $src+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam00: +; LINUX-32-STATIC: movl $src+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam00: +; LINUX-32-PIC: movl $src+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam00: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam00: +; DARWIN-32-STATIC: movl $_src+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam00: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_src$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam00: +; DARWIN-32-PIC: call L100$pb +; DARWIN-32-PIC-NEXT: L100$pb: +; DARWIN-32-PIC-NEXT: popl %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl L_src$non_lazy_ptr-L100$pb(%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam00: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam00: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam00: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dst, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam01: +; LINUX-64-STATIC: movl $dst+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam01: +; LINUX-32-STATIC: movl $dst+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam01: +; LINUX-32-PIC: movl $dst+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam01: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam01: +; DARWIN-32-STATIC: movl $_dst+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam01: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_dst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam01: +; DARWIN-32-PIC: call L101$pb +; DARWIN-32-PIC-NEXT: L101$pb: +; DARWIN-32-PIC-NEXT: popl %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl L_dst$non_lazy_ptr-L101$pb(%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam01: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam01: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam01: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bxm01() nounwind { entry: ret i8* bitcast (i32* getelementptr ([32 x i32]* @xdst, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bxm01: +; LINUX-64-STATIC: movl $xdst+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bxm01: +; LINUX-32-STATIC: movl $xdst+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bxm01: +; LINUX-32-PIC: movl $xdst+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bxm01: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bxm01: +; DARWIN-32-STATIC: movl $_xdst+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bxm01: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl L_xdst$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bxm01: +; DARWIN-32-PIC: call L102$pb +; DARWIN-32-PIC-NEXT: L102$pb: +; DARWIN-32-PIC-NEXT: popl %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl L_xdst$non_lazy_ptr-L102$pb(%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bxm01: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bxm01: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bxm01: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam02() nounwind { @@ -947,16 +6613,160 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bam02: +; LINUX-64-STATIC: movl $262144, %eax +; LINUX-64-STATIC: addq ptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam02: +; LINUX-32-STATIC: movl $262144, %eax +; LINUX-32-STATIC-NEXT: addl ptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam02: +; LINUX-32-PIC: movl $262144, %eax +; LINUX-32-PIC-NEXT: addl ptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq (%rcx), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam02: +; DARWIN-32-STATIC: movl $262144, %eax +; DARWIN-32-STATIC-NEXT: addl _ptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl (%ecx), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam02: +; DARWIN-32-PIC: call L103$pb +; DARWIN-32-PIC-NEXT: L103$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L103$pb(%eax), %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl (%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-STATIC-NEXT: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq (%rcx), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-DYNAMIC-NEXT: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq (%rcx), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rcx +; DARWIN-64-PIC-NEXT: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq (%rcx), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam03() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @dsrc, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam03: +; LINUX-64-STATIC: movl $dsrc+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam03: +; LINUX-32-STATIC: movl $dsrc+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam03: +; LINUX-32-PIC: movl $dsrc+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam03: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam03: +; DARWIN-32-STATIC: movl $_dsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam03: +; DARWIN-32-DYNAMIC: movl $_dsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam03: +; DARWIN-32-PIC: call L104$pb +; DARWIN-32-PIC-NEXT: L104$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_dsrc-L104$pb)+262144(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam03: +; DARWIN-64-STATIC: leaq _dsrc+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam03: +; DARWIN-64-DYNAMIC: leaq _dsrc+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam03: +; DARWIN-64-PIC: leaq _dsrc+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam04() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ddst, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam04: +; LINUX-64-STATIC: movl $ddst+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam04: +; LINUX-32-STATIC: movl $ddst+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam04: +; LINUX-32-PIC: movl $ddst+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam04: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam04: +; DARWIN-32-STATIC: movl $_ddst+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam04: +; DARWIN-32-DYNAMIC: movl $_ddst+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam04: +; DARWIN-32-PIC: call L105$pb +; DARWIN-32-PIC-NEXT: L105$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ddst-L105$pb)+262144(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam04: +; DARWIN-64-STATIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam04: +; DARWIN-64-DYNAMIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam04: +; DARWIN-64-PIC: leaq _ddst+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam05() nounwind { @@ -965,16 +6775,153 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bam05: +; LINUX-64-STATIC: movl $262144, %eax +; LINUX-64-STATIC: addq dptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam05: +; LINUX-32-STATIC: movl $262144, %eax +; LINUX-32-STATIC-NEXT: addl dptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam05: +; LINUX-32-PIC: movl $262144, %eax +; LINUX-32-PIC-NEXT: addl dptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rcx +; LINUX-64-PIC-NEXT: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq (%rcx), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam05: +; DARWIN-32-STATIC: movl $262144, %eax +; DARWIN-32-STATIC-NEXT: addl _dptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam05: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl _dptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam05: +; DARWIN-32-PIC: call L106$pb +; DARWIN-32-PIC-NEXT: L106$pb: +; DARWIN-32-PIC-NEXT: popl %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl _dptr-L106$pb(%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam05: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam05: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam05: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam06() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @lsrc, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam06: +; LINUX-64-STATIC: movl $lsrc+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam06: +; LINUX-32-STATIC: movl $lsrc+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam06: +; LINUX-32-PIC: movl $lsrc+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam06: +; LINUX-64-PIC: leaq lsrc+262144(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam06: +; DARWIN-32-STATIC: movl $_lsrc+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam06: +; DARWIN-32-DYNAMIC: movl $_lsrc+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam06: +; DARWIN-32-PIC: call L107$pb +; DARWIN-32-PIC-NEXT: L107$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_lsrc-L107$pb)+262144(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam06: +; DARWIN-64-STATIC: leaq _lsrc+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam06: +; DARWIN-64-DYNAMIC: leaq _lsrc+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam06: +; DARWIN-64-PIC: leaq _lsrc+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam07() nounwind { entry: ret i8* bitcast (i32* getelementptr ([131072 x i32]* @ldst, i32 0, i64 65536) to i8*) +; LINUX-64-STATIC: bam07: +; LINUX-64-STATIC: movl $ldst+262144, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam07: +; LINUX-32-STATIC: movl $ldst+262144, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam07: +; LINUX-32-PIC: movl $ldst+262144, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam07: +; LINUX-64-PIC: leaq ldst+262144(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam07: +; DARWIN-32-STATIC: movl $_ldst+262144, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam07: +; DARWIN-32-DYNAMIC: movl $_ldst+262144, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam07: +; DARWIN-32-PIC: call L108$pb +; DARWIN-32-PIC-NEXT: L108$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal (_ldst-L108$pb)+262144(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam07: +; DARWIN-64-STATIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam07: +; DARWIN-64-DYNAMIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam07: +; DARWIN-64-PIC: leaq _ldst+262144(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @bam08() nounwind { @@ -983,6 +6930,58 @@ entry: %1 = getelementptr i32* %0, i64 65536 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: bam08: +; LINUX-64-STATIC: movl $262144, %eax +; LINUX-64-STATIC: addq lptr(%rip), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: bam08: +; LINUX-32-STATIC: movl $262144, %eax +; LINUX-32-STATIC-NEXT: addl lptr, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: bam08: +; LINUX-32-PIC: movl $262144, %eax +; LINUX-32-PIC-NEXT: addl lptr, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: bam08: +; LINUX-64-PIC: movl $262144, %eax +; LINUX-64-PIC-NEXT: addq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _bam08: +; DARWIN-32-STATIC: movl $262144, %eax +; DARWIN-32-STATIC-NEXT: addl _lptr, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _bam08: +; DARWIN-32-DYNAMIC: movl $262144, %eax +; DARWIN-32-DYNAMIC-NEXT: addl _lptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _bam08: +; DARWIN-32-PIC: call L109$pb +; DARWIN-32-PIC-NEXT: L109$pb: +; DARWIN-32-PIC-NEXT: popl %ecx +; DARWIN-32-PIC-NEXT: movl $262144, %eax +; DARWIN-32-PIC-NEXT: addl _lptr-L109$pb(%ecx), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _bam08: +; DARWIN-64-STATIC: movl $262144, %eax +; DARWIN-64-STATIC-NEXT: addq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _bam08: +; DARWIN-64-DYNAMIC: movl $262144, %eax +; DARWIN-64-DYNAMIC-NEXT: addq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _bam08: +; DARWIN-64-PIC: movl $262144, %eax +; DARWIN-64-PIC-NEXT: addq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat00(i64 %i) nounwind { @@ -991,6 +6990,59 @@ entry: %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat00: +; LINUX-64-STATIC: leaq src+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal src+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal src+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _src+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat00: +; DARWIN-32-PIC: call L110$pb +; DARWIN-32-PIC-NEXT: L110$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L110$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cxt00(i64 %i) nounwind { @@ -999,6 +7051,59 @@ entry: %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cxt00: +; LINUX-64-STATIC: leaq xsrc+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cxt00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xsrc+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cxt00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xsrc+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cxt00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cxt00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xsrc+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cxt00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cxt00: +; DARWIN-32-PIC: call L111$pb +; DARWIN-32-PIC-NEXT: L111$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L111$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cxt00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cxt00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cxt00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat01(i64 %i) nounwind { @@ -1007,6 +7112,59 @@ entry: %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat01: +; LINUX-64-STATIC: leaq dst+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat01: +; DARWIN-32-PIC: call L112$pb +; DARWIN-32-PIC-NEXT: L112$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L112$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cxt01(i64 %i) nounwind { @@ -1015,6 +7173,59 @@ entry: %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cxt01: +; LINUX-64-STATIC: leaq xdst+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cxt01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xdst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cxt01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xdst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cxt01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cxt01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xdst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cxt01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cxt01: +; DARWIN-32-PIC: call L113$pb +; DARWIN-32-PIC-NEXT: L113$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L113$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cxt01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cxt01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cxt01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat02(i64 %i) nounwind { @@ -1024,6 +7235,69 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cat02: +; LINUX-64-STATIC: movq ptr(%rip), %rax +; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat02: +; DARWIN-32-PIC: call L114$pb +; DARWIN-32-PIC-NEXT: L114$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L114$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq (%rax), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq (%rax), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat03(i64 %i) nounwind { @@ -1032,6 +7306,57 @@ entry: %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat03: +; LINUX-64-STATIC: leaq dsrc+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat03: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dsrc+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat03: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dsrc+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat03: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dsrc+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat03: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _dsrc+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat03: +; DARWIN-32-PIC: call L115$pb +; DARWIN-32-PIC-NEXT: L115$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_dsrc-L115$pb)+64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat04(i64 %i) nounwind { @@ -1040,6 +7365,57 @@ entry: %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat04: +; LINUX-64-STATIC: leaq ddst+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat04: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ddst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat04: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ddst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat04: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ddst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat04: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ddst+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat04: +; DARWIN-32-PIC: call L116$pb +; DARWIN-32-PIC-NEXT: L116$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ddst-L116$pb)+64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat05(i64 %i) nounwind { @@ -1049,6 +7425,64 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cat05: +; LINUX-64-STATIC: movq dptr(%rip), %rax +; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat05: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dptr, %ecx +; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat05: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dptr, %ecx +; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat05: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat05: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat05: +; DARWIN-32-PIC: call L117$pb +; DARWIN-32-PIC-NEXT: L117$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _dptr-L117$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat05: +; DARWIN-64-STATIC: movq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat05: +; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat05: +; DARWIN-64-PIC: movq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat06(i64 %i) nounwind { @@ -1057,6 +7491,57 @@ entry: %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat06: +; LINUX-64-STATIC: leaq lsrc+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat06: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal lsrc+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat06: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal lsrc+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat06: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _lsrc+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat06: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _lsrc+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat06: +; DARWIN-32-PIC: call L118$pb +; DARWIN-32-PIC-NEXT: L118$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_lsrc-L118$pb)+64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat07(i64 %i) nounwind { @@ -1065,6 +7550,57 @@ entry: %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cat07: +; LINUX-64-STATIC: leaq ldst+64(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat07: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ldst+64(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat07: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ldst+64(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat07: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ldst+64(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat07: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ldst+64(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat07: +; DARWIN-32-PIC: call L119$pb +; DARWIN-32-PIC-NEXT: L119$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ldst-L119$pb)+64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cat08(i64 %i) nounwind { @@ -1074,6 +7610,63 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cat08: +; LINUX-64-STATIC: movq lptr(%rip), %rax +; LINUX-64-STATIC: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cat08: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lptr, %ecx +; LINUX-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cat08: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lptr, %ecx +; LINUX-32-PIC-NEXT: leal 64(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cat08: +; LINUX-64-PIC: movq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cat08: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cat08: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 64(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cat08: +; DARWIN-32-PIC: call L120$pb +; DARWIN-32-PIC-NEXT: L120$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _lptr-L120$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 64(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cat08: +; DARWIN-64-STATIC: movq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cat08: +; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cat08: +; DARWIN-64-PIC: movq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 64(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam00(i64 %i) nounwind { @@ -1082,6 +7675,59 @@ entry: %1 = getelementptr [131072 x i32]* @src, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam00: +; LINUX-64-STATIC: leaq src+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal src+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal src+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam00: +; LINUX-64-PIC: movq src@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _src+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_src$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam00: +; DARWIN-32-PIC: call L121$pb +; DARWIN-32-PIC-NEXT: L121$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L121$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam00: +; DARWIN-64-STATIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam00: +; DARWIN-64-DYNAMIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam00: +; DARWIN-64-PIC: movq _src@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cxm00(i64 %i) nounwind { @@ -1090,6 +7736,59 @@ entry: %1 = getelementptr [32 x i32]* @xsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cxm00: +; LINUX-64-STATIC: leaq xsrc+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cxm00: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xsrc+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cxm00: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xsrc+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cxm00: +; LINUX-64-PIC: movq xsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cxm00: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xsrc+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cxm00: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xsrc$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cxm00: +; DARWIN-32-PIC: call L122$pb +; DARWIN-32-PIC-NEXT: L122$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L122$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cxm00: +; DARWIN-64-STATIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cxm00: +; DARWIN-64-DYNAMIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cxm00: +; DARWIN-64-PIC: movq _xsrc@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam01(i64 %i) nounwind { @@ -1098,6 +7797,59 @@ entry: %1 = getelementptr [131072 x i32]* @dst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam01: +; LINUX-64-STATIC: leaq dst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam01: +; LINUX-64-PIC: movq dst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam01: +; DARWIN-32-PIC: call L123$pb +; DARWIN-32-PIC-NEXT: L123$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_dst$non_lazy_ptr-L123$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam01: +; DARWIN-64-STATIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam01: +; DARWIN-64-DYNAMIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam01: +; DARWIN-64-PIC: movq _dst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cxm01(i64 %i) nounwind { @@ -1106,6 +7858,59 @@ entry: %1 = getelementptr [32 x i32]* @xdst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cxm01: +; LINUX-64-STATIC: leaq xdst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cxm01: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal xdst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cxm01: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal xdst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cxm01: +; LINUX-64-PIC: movq xdst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cxm01: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _xdst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cxm01: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cxm01: +; DARWIN-32-PIC: call L124$pb +; DARWIN-32-PIC-NEXT: L124$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl L_xdst$non_lazy_ptr-L124$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cxm01: +; DARWIN-64-STATIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cxm01: +; DARWIN-64-DYNAMIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cxm01: +; DARWIN-64-PIC: movq _xdst@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam02(i64 %i) nounwind { @@ -1115,6 +7920,69 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cam02: +; LINUX-64-STATIC: movq ptr(%rip), %rax +; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam02: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl ptr, %ecx +; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam02: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl ptr, %ecx +; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam02: +; LINUX-64-PIC: movq ptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam02: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _ptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam02: +; DARWIN-32-DYNAMIC: movl L_ptr$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: movl (%eax), %eax +; DARWIN-32-DYNAMIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam02: +; DARWIN-32-PIC: call L125$pb +; DARWIN-32-PIC-NEXT: L125$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ptr$non_lazy_ptr-L125$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: movl (%eax), %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam02: +; DARWIN-64-STATIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: movq (%rax), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam02: +; DARWIN-64-DYNAMIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: movq (%rax), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam02: +; DARWIN-64-PIC: movq _ptr@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: movq (%rax), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam03(i64 %i) nounwind { @@ -1123,6 +7991,57 @@ entry: %1 = getelementptr [131072 x i32]* @dsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam03: +; LINUX-64-STATIC: leaq dsrc+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam03: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal dsrc+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam03: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal dsrc+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam03: +; LINUX-64-PIC: movq dsrc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam03: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _dsrc+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam03: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _dsrc+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam03: +; DARWIN-32-PIC: call L126$pb +; DARWIN-32-PIC-NEXT: L126$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_dsrc-L126$pb)+262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam03: +; DARWIN-64-STATIC: leaq _dsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam03: +; DARWIN-64-DYNAMIC: leaq _dsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam03: +; DARWIN-64-PIC: leaq _dsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam04(i64 %i) nounwind { @@ -1131,6 +8050,57 @@ entry: %1 = getelementptr [131072 x i32]* @ddst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam04: +; LINUX-64-STATIC: leaq ddst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam04: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ddst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam04: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ddst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam04: +; LINUX-64-PIC: movq ddst@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam04: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ddst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam04: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ddst+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam04: +; DARWIN-32-PIC: call L127$pb +; DARWIN-32-PIC-NEXT: L127$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ddst-L127$pb)+262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam04: +; DARWIN-64-STATIC: leaq _ddst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam04: +; DARWIN-64-DYNAMIC: leaq _ddst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam04: +; DARWIN-64-PIC: leaq _ddst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam05(i64 %i) nounwind { @@ -1140,6 +8110,64 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cam05: +; LINUX-64-STATIC: movq dptr(%rip), %rax +; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam05: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl dptr, %ecx +; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam05: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl dptr, %ecx +; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam05: +; LINUX-64-PIC: movq dptr@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: movq (%rax), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam05: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _dptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam05: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _dptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam05: +; DARWIN-32-PIC: call L128$pb +; DARWIN-32-PIC-NEXT: L128$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _dptr-L128$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam05: +; DARWIN-64-STATIC: movq _dptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam05: +; DARWIN-64-DYNAMIC: movq _dptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam05: +; DARWIN-64-PIC: movq _dptr(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam06(i64 %i) nounwind { @@ -1148,6 +8176,57 @@ entry: %1 = getelementptr [131072 x i32]* @lsrc, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam06: +; LINUX-64-STATIC: leaq lsrc+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam06: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal lsrc+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam06: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal lsrc+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam06: +; LINUX-64-PIC: leaq lsrc(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam06: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _lsrc+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam06: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _lsrc+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam06: +; DARWIN-32-PIC: call L129$pb +; DARWIN-32-PIC-NEXT: L129$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_lsrc-L129$pb)+262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam06: +; DARWIN-64-STATIC: leaq _lsrc(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam06: +; DARWIN-64-DYNAMIC: leaq _lsrc(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam06: +; DARWIN-64-PIC: leaq _lsrc(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam07(i64 %i) nounwind { @@ -1156,6 +8235,57 @@ entry: %1 = getelementptr [131072 x i32]* @ldst, i64 0, i64 %0 %2 = bitcast i32* %1 to i8* ret i8* %2 +; LINUX-64-STATIC: cam07: +; LINUX-64-STATIC: leaq ldst+262144(,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam07: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: leal ldst+262144(,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam07: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: leal ldst+262144(,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam07: +; LINUX-64-PIC: leaq ldst(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam07: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: leal _ldst+262144(,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam07: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: leal _ldst+262144(,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam07: +; DARWIN-32-PIC: call L130$pb +; DARWIN-32-PIC-NEXT: L130$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: leal (_ldst-L130$pb)+262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam07: +; DARWIN-64-STATIC: leaq _ldst(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam07: +; DARWIN-64-DYNAMIC: leaq _ldst(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam07: +; DARWIN-64-PIC: leaq _ldst(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define i8* @cam08(i64 %i) nounwind { @@ -1165,6 +8295,63 @@ entry: %2 = getelementptr i32* %0, i64 %1 %3 = bitcast i32* %2 to i8* ret i8* %3 +; LINUX-64-STATIC: cam08: +; LINUX-64-STATIC: movq lptr(%rip), %rax +; LINUX-64-STATIC: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: cam08: +; LINUX-32-STATIC: movl 4(%esp), %eax +; LINUX-32-STATIC-NEXT: movl lptr, %ecx +; LINUX-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: cam08: +; LINUX-32-PIC: movl 4(%esp), %eax +; LINUX-32-PIC-NEXT: movl lptr, %ecx +; LINUX-32-PIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: cam08: +; LINUX-64-PIC: movq lptr(%rip), %rax +; LINUX-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _cam08: +; DARWIN-32-STATIC: movl 4(%esp), %eax +; DARWIN-32-STATIC-NEXT: movl _lptr, %ecx +; DARWIN-32-STATIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _cam08: +; DARWIN-32-DYNAMIC: movl 4(%esp), %eax +; DARWIN-32-DYNAMIC-NEXT: movl _lptr, %ecx +; DARWIN-32-DYNAMIC-NEXT: leal 262144(%ecx,%eax,4), %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _cam08: +; DARWIN-32-PIC: call L131$pb +; DARWIN-32-PIC-NEXT: L131$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl 4(%esp), %ecx +; DARWIN-32-PIC-NEXT: movl _lptr-L131$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: leal 262144(%eax,%ecx,4), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _cam08: +; DARWIN-64-STATIC: movq _lptr(%rip), %rax +; DARWIN-64-STATIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _cam08: +; DARWIN-64-DYNAMIC: movq _lptr(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _cam08: +; DARWIN-64-PIC: movq _lptr(%rip), %rax +; DARWIN-64-PIC-NEXT: leaq 262144(%rax,%rdi,4), %rax +; DARWIN-64-PIC-NEXT: ret } define void @lcallee() nounwind { @@ -1177,6 +8364,123 @@ entry: tail call void @x() nounwind tail call void @x() nounwind ret void +; LINUX-64-STATIC: lcallee: +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: call x +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: lcallee: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: call x +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: lcallee: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: call x +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: lcallee: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: call x@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _lcallee: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: call _x +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _lcallee: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: call L_x$stub +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _lcallee: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: call L_x$stub +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _lcallee: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: call _x +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _lcallee: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: call _x +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _lcallee: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: call _x +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } declare void @x() @@ -1191,6 +8495,123 @@ entry: tail call void @y() nounwind tail call void @y() nounwind ret void +; LINUX-64-STATIC: dcallee: +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: call y +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: dcallee: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: call y +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: dcallee: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: call y +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: dcallee: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: call y@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _dcallee: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: call _y +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _dcallee: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: call L_y$stub +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _dcallee: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: call L_y$stub +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _dcallee: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: call _y +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _dcallee: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: call _y +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _dcallee: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: call _y +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } declare void @y() @@ -1198,6 +8619,48 @@ declare void @y() define void ()* @address() nounwind { entry: ret void ()* @callee +; LINUX-64-STATIC: address: +; LINUX-64-STATIC: movl $callee, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: address: +; LINUX-32-STATIC: movl $callee, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: address: +; LINUX-32-PIC: movl $callee, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: address: +; LINUX-64-PIC: movq callee@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _address: +; DARWIN-32-STATIC: movl $_callee, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _address: +; DARWIN-32-DYNAMIC: movl L_callee$non_lazy_ptr, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _address: +; DARWIN-32-PIC: call L134$pb +; DARWIN-32-PIC-NEXT: L134$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_callee$non_lazy_ptr-L134$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _address: +; DARWIN-64-STATIC: movq _callee@GOTPCREL(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _address: +; DARWIN-64-DYNAMIC: movq _callee@GOTPCREL(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _address: +; DARWIN-64-PIC: movq _callee@GOTPCREL(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } declare void @callee() @@ -1205,11 +8668,95 @@ declare void @callee() define void ()* @laddress() nounwind { entry: ret void ()* @lcallee +; LINUX-64-STATIC: laddress: +; LINUX-64-STATIC: movl $lcallee, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: laddress: +; LINUX-32-STATIC: movl $lcallee, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: laddress: +; LINUX-32-PIC: movl $lcallee, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: laddress: +; LINUX-64-PIC: movq lcallee@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _laddress: +; DARWIN-32-STATIC: movl $_lcallee, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _laddress: +; DARWIN-32-DYNAMIC: movl $_lcallee, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _laddress: +; DARWIN-32-PIC: call L135$pb +; DARWIN-32-PIC-NEXT: L135$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _lcallee-L135$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _laddress: +; DARWIN-64-STATIC: leaq _lcallee(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _laddress: +; DARWIN-64-DYNAMIC: leaq _lcallee(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _laddress: +; DARWIN-64-PIC: leaq _lcallee(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define void ()* @daddress() nounwind { entry: ret void ()* @dcallee +; LINUX-64-STATIC: daddress: +; LINUX-64-STATIC: movl $dcallee, %eax +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: daddress: +; LINUX-32-STATIC: movl $dcallee, %eax +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: daddress: +; LINUX-32-PIC: movl $dcallee, %eax +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: daddress: +; LINUX-64-PIC: leaq dcallee(%rip), %rax +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _daddress: +; DARWIN-32-STATIC: movl $_dcallee, %eax +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _daddress: +; DARWIN-32-DYNAMIC: movl $_dcallee, %eax +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _daddress: +; DARWIN-32-PIC: call L136$pb +; DARWIN-32-PIC-NEXT: L136$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: leal _dcallee-L136$pb(%eax), %eax +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _daddress: +; DARWIN-64-STATIC: leaq _dcallee(%rip), %rax +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _daddress: +; DARWIN-64-DYNAMIC: leaq _dcallee(%rip), %rax +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _daddress: +; DARWIN-64-PIC: leaq _dcallee(%rip), %rax +; DARWIN-64-PIC-NEXT: ret } define void @caller() nounwind { @@ -1217,6 +8764,73 @@ entry: tail call void @callee() nounwind tail call void @callee() nounwind ret void +; LINUX-64-STATIC: caller: +; LINUX-64-STATIC: call callee +; LINUX-64-STATIC: call callee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: caller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call callee +; LINUX-32-STATIC-NEXT: call callee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: caller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call callee +; LINUX-32-PIC-NEXT: call callee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: caller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call callee@PLT +; LINUX-64-PIC-NEXT: call callee@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _caller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _callee +; DARWIN-32-STATIC-NEXT: call _callee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _caller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _caller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L_callee$stub +; DARWIN-32-PIC-NEXT: call L_callee$stub +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _caller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _callee +; DARWIN-64-STATIC-NEXT: call _callee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _caller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _callee +; DARWIN-64-DYNAMIC-NEXT: call _callee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _caller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _callee +; DARWIN-64-PIC-NEXT: call _callee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @dcaller() nounwind { @@ -1224,6 +8838,73 @@ entry: tail call void @dcallee() nounwind tail call void @dcallee() nounwind ret void +; LINUX-64-STATIC: dcaller: +; LINUX-64-STATIC: call dcallee +; LINUX-64-STATIC: call dcallee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: dcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call dcallee +; LINUX-32-STATIC-NEXT: call dcallee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: dcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call dcallee +; LINUX-32-PIC-NEXT: call dcallee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: dcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call dcallee +; LINUX-64-PIC-NEXT: call dcallee +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _dcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _dcallee +; DARWIN-32-STATIC-NEXT: call _dcallee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _dcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call _dcallee +; DARWIN-32-DYNAMIC-NEXT: call _dcallee +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _dcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call _dcallee +; DARWIN-32-PIC-NEXT: call _dcallee +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _dcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _dcallee +; DARWIN-64-STATIC-NEXT: call _dcallee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _dcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _dcallee +; DARWIN-64-DYNAMIC-NEXT: call _dcallee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _dcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _dcallee +; DARWIN-64-PIC-NEXT: call _dcallee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @lcaller() nounwind { @@ -1231,24 +8912,262 @@ entry: tail call void @lcallee() nounwind tail call void @lcallee() nounwind ret void +; LINUX-64-STATIC: lcaller: +; LINUX-64-STATIC: call lcallee +; LINUX-64-STATIC: call lcallee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: lcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call lcallee +; LINUX-32-STATIC-NEXT: call lcallee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: lcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call lcallee +; LINUX-32-PIC-NEXT: call lcallee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: lcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call lcallee@PLT +; LINUX-64-PIC-NEXT: call lcallee@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _lcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _lcallee +; DARWIN-32-STATIC-NEXT: call _lcallee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _lcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call _lcallee +; DARWIN-32-DYNAMIC-NEXT: call _lcallee +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _lcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call _lcallee +; DARWIN-32-PIC-NEXT: call _lcallee +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _lcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _lcallee +; DARWIN-64-STATIC-NEXT: call _lcallee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _lcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _lcallee +; DARWIN-64-DYNAMIC-NEXT: call _lcallee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _lcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _lcallee +; DARWIN-64-PIC-NEXT: call _lcallee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @tailcaller() nounwind { entry: tail call void @callee() nounwind ret void +; LINUX-64-STATIC: tailcaller: +; LINUX-64-STATIC: call callee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: tailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call callee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: tailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call callee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: tailcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call callee@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _tailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _callee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _tailcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call L_callee$stub +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _tailcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L_callee$stub +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _tailcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _callee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _tailcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _callee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _tailcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _callee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @dtailcaller() nounwind { entry: tail call void @dcallee() nounwind ret void +; LINUX-64-STATIC: dtailcaller: +; LINUX-64-STATIC: call dcallee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: dtailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call dcallee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: dtailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call dcallee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: dtailcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call dcallee +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _dtailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _dcallee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _dtailcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call _dcallee +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _dtailcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call _dcallee +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _dtailcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _dcallee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _dtailcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _dcallee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _dtailcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _dcallee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @ltailcaller() nounwind { entry: tail call void @lcallee() nounwind ret void +; LINUX-64-STATIC: ltailcaller: +; LINUX-64-STATIC: call lcallee +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ltailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call lcallee +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ltailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call lcallee +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ltailcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call lcallee@PLT +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ltailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call _lcallee +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ltailcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call _lcallee +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ltailcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call _lcallee +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ltailcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call _lcallee +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ltailcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call _lcallee +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ltailcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call _lcallee +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @icaller() nounwind { @@ -1258,6 +9177,86 @@ entry: %1 = load void ()** @ifunc, align 8 tail call void %1() nounwind ret void +; LINUX-64-STATIC: icaller: +; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: icaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *ifunc +; LINUX-32-STATIC-NEXT: call *ifunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: icaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *ifunc +; LINUX-32-PIC-NEXT: call *ifunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: icaller: +; LINUX-64-PIC: pushq %rbx +; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: popq %rbx +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _icaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _icaller: +; DARWIN-32-DYNAMIC: pushl %esi +; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp +; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi +; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp +; DARWIN-32-DYNAMIC-NEXT: popl %esi +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _icaller: +; DARWIN-32-PIC: pushl %esi +; DARWIN-32-PIC-NEXT: subl $8, %esp +; DARWIN-32-PIC-NEXT: call L143$pb +; DARWIN-32-PIC-NEXT: L143$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L143$pb(%eax), %esi +; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: addl $8, %esp +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _icaller: +; DARWIN-64-STATIC: pushq %rbx +; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: popq %rbx +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _icaller: +; DARWIN-64-DYNAMIC: pushq %rbx +; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: popq %rbx +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _icaller: +; DARWIN-64-PIC: pushq %rbx +; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: popq %rbx +; DARWIN-64-PIC-NEXT: ret } define void @dicaller() nounwind { @@ -1267,6 +9266,79 @@ entry: %1 = load void ()** @difunc, align 8 tail call void %1() nounwind ret void +; LINUX-64-STATIC: dicaller: +; LINUX-64-STATIC: call *difunc +; LINUX-64-STATIC: call *difunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: dicaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *difunc +; LINUX-32-STATIC-NEXT: call *difunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: dicaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *difunc +; LINUX-32-PIC-NEXT: call *difunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: dicaller: +; LINUX-64-PIC: pushq %rbx +; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rbx +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: popq %rbx +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _dicaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_difunc +; DARWIN-32-STATIC-NEXT: call *_difunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _dicaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call *_difunc +; DARWIN-32-DYNAMIC-NEXT: call *_difunc +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _dicaller: +; DARWIN-32-PIC: pushl %esi +; DARWIN-32-PIC-NEXT: subl $8, %esp +; DARWIN-32-PIC-NEXT: call L144$pb +; DARWIN-32-PIC-NEXT: L144$pb: +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: call *_difunc-L144$pb(%esi) +; DARWIN-32-PIC-NEXT: call *_difunc-L144$pb(%esi) +; DARWIN-32-PIC-NEXT: addl $8, %esp +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _dicaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _dicaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _dicaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call *_difunc(%rip) +; DARWIN-64-PIC-NEXT: call *_difunc(%rip) +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @licaller() nounwind { @@ -1276,6 +9348,78 @@ entry: %1 = load void ()** @lifunc, align 8 tail call void %1() nounwind ret void +; LINUX-64-STATIC: licaller: +; LINUX-64-STATIC: call *lifunc +; LINUX-64-STATIC: call *lifunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: licaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *lifunc +; LINUX-32-STATIC-NEXT: call *lifunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: licaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *lifunc +; LINUX-32-PIC-NEXT: call *lifunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: licaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call *lifunc(%rip) +; LINUX-64-PIC-NEXT: call *lifunc(%rip) +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _licaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_lifunc +; DARWIN-32-STATIC-NEXT: call *_lifunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _licaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call *_lifunc +; DARWIN-32-DYNAMIC-NEXT: call *_lifunc +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _licaller: +; DARWIN-32-PIC: pushl %esi +; DARWIN-32-PIC-NEXT: subl $8, %esp +; DARWIN-32-PIC-NEXT: call L145$pb +; DARWIN-32-PIC-NEXT: L145$pb: +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: call *_lifunc-L145$pb(%esi) +; DARWIN-32-PIC-NEXT: call *_lifunc-L145$pb(%esi) +; DARWIN-32-PIC-NEXT: addl $8, %esp +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _licaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _licaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _licaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @itailcaller() nounwind { @@ -1285,6 +9429,86 @@ entry: %1 = load void ()** @ifunc, align 8 tail call void %1() nounwind ret void +; LINUX-64-STATIC: itailcaller: +; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: call *ifunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: itailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *ifunc +; LINUX-32-STATIC-NEXT: call *ifunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: itailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *ifunc +; LINUX-32-PIC-NEXT: call *ifunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: itailcaller: +; LINUX-64-PIC: pushq %rbx +; LINUX-64-PIC-NEXT: movq ifunc@GOTPCREL(%rip), %rbx +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: call *(%rbx) +; LINUX-64-PIC-NEXT: popq %rbx +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _itailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: call *_ifunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _itailcaller: +; DARWIN-32-DYNAMIC: pushl %esi +; DARWIN-32-DYNAMIC-NEXT: subl $8, %esp +; DARWIN-32-DYNAMIC-NEXT: movl L_ifunc$non_lazy_ptr, %esi +; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: call *(%esi) +; DARWIN-32-DYNAMIC-NEXT: addl $8, %esp +; DARWIN-32-DYNAMIC-NEXT: popl %esi +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _itailcaller: +; DARWIN-32-PIC: pushl %esi +; DARWIN-32-PIC-NEXT: subl $8, %esp +; DARWIN-32-PIC-NEXT: call L146$pb +; DARWIN-32-PIC-NEXT: L146$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: movl L_ifunc$non_lazy_ptr-L146$pb(%eax), %esi +; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: call *(%esi) +; DARWIN-32-PIC-NEXT: addl $8, %esp +; DARWIN-32-PIC-NEXT: popl %esi +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _itailcaller: +; DARWIN-64-STATIC: pushq %rbx +; DARWIN-64-STATIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: call *(%rbx) +; DARWIN-64-STATIC-NEXT: popq %rbx +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _itailcaller: +; DARWIN-64-DYNAMIC: pushq %rbx +; DARWIN-64-DYNAMIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: call *(%rbx) +; DARWIN-64-DYNAMIC-NEXT: popq %rbx +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _itailcaller: +; DARWIN-64-PIC: pushq %rbx +; DARWIN-64-PIC-NEXT: movq _ifunc@GOTPCREL(%rip), %rbx +; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: call *(%rbx) +; DARWIN-64-PIC-NEXT: popq %rbx +; DARWIN-64-PIC-NEXT: ret } define void @ditailcaller() nounwind { @@ -1292,6 +9516,66 @@ entry: %0 = load void ()** @difunc, align 8 tail call void %0() nounwind ret void +; LINUX-64-STATIC: ditailcaller: +; LINUX-64-STATIC: call *difunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: ditailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *difunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: ditailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *difunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: ditailcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: movq difunc@GOTPCREL(%rip), %rax +; LINUX-64-PIC-NEXT: call *(%rax) +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _ditailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_difunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _ditailcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call *_difunc +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _ditailcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L147$pb +; DARWIN-32-PIC-NEXT: L147$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: call *_difunc-L147$pb(%eax) +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _ditailcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call *_difunc(%rip) +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _ditailcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call *_difunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _ditailcaller: +; DARWIN-64-PIC: call *_difunc(%rip) +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } define void @litailcaller() nounwind { @@ -1299,4 +9583,64 @@ entry: %0 = load void ()** @lifunc, align 8 tail call void %0() nounwind ret void +; LINUX-64-STATIC: litailcaller: +; LINUX-64-STATIC: call *lifunc +; LINUX-64-STATIC: ret + +; LINUX-32-STATIC: litailcaller: +; LINUX-32-STATIC: subl $4, %esp +; LINUX-32-STATIC-NEXT: call *lifunc +; LINUX-32-STATIC-NEXT: addl $4, %esp +; LINUX-32-STATIC-NEXT: ret + +; LINUX-32-PIC: litailcaller: +; LINUX-32-PIC: subl $4, %esp +; LINUX-32-PIC-NEXT: call *lifunc +; LINUX-32-PIC-NEXT: addl $4, %esp +; LINUX-32-PIC-NEXT: ret + +; LINUX-64-PIC: litailcaller: +; LINUX-64-PIC: subq $8, %rsp +; LINUX-64-PIC-NEXT: call *lifunc(%rip) +; LINUX-64-PIC-NEXT: addq $8, %rsp +; LINUX-64-PIC-NEXT: ret + +; DARWIN-32-STATIC: _litailcaller: +; DARWIN-32-STATIC: subl $12, %esp +; DARWIN-32-STATIC-NEXT: call *_lifunc +; DARWIN-32-STATIC-NEXT: addl $12, %esp +; DARWIN-32-STATIC-NEXT: ret + +; DARWIN-32-DYNAMIC: _litailcaller: +; DARWIN-32-DYNAMIC: subl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: call *_lifunc +; DARWIN-32-DYNAMIC-NEXT: addl $12, %esp +; DARWIN-32-DYNAMIC-NEXT: ret + +; DARWIN-32-PIC: _litailcaller: +; DARWIN-32-PIC: subl $12, %esp +; DARWIN-32-PIC-NEXT: call L148$pb +; DARWIN-32-PIC-NEXT: L148$pb: +; DARWIN-32-PIC-NEXT: popl %eax +; DARWIN-32-PIC-NEXT: call *_lifunc-L148$pb(%eax) +; DARWIN-32-PIC-NEXT: addl $12, %esp +; DARWIN-32-PIC-NEXT: ret + +; DARWIN-64-STATIC: _litailcaller: +; DARWIN-64-STATIC: subq $8, %rsp +; DARWIN-64-STATIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-STATIC-NEXT: addq $8, %rsp +; DARWIN-64-STATIC-NEXT: ret + +; DARWIN-64-DYNAMIC: _litailcaller: +; DARWIN-64-DYNAMIC: subq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-DYNAMIC-NEXT: addq $8, %rsp +; DARWIN-64-DYNAMIC-NEXT: ret + +; DARWIN-64-PIC: _litailcaller: +; DARWIN-64-PIC: subq $8, %rsp +; DARWIN-64-PIC-NEXT: call *_lifunc(%rip) +; DARWIN-64-PIC-NEXT: addq $8, %rsp +; DARWIN-64-PIC-NEXT: ret } diff --git a/test/CodeGen/X86/add-trick32.ll b/test/CodeGen/X86/add-trick32.ll index 42909b4b5874a..e86045db0abb0 100644 --- a/test/CodeGen/X86/add-trick32.ll +++ b/test/CodeGen/X86/add-trick32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: not grep add %t ; RUN: grep subl %t | count 1 diff --git a/test/CodeGen/X86/add-trick64.ll b/test/CodeGen/X86/add-trick64.ll index 5466d9d441b16..2f1fceea5ea49 100644 --- a/test/CodeGen/X86/add-trick64.ll +++ b/test/CodeGen/X86/add-trick64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep add %t ; RUN: grep subq %t | count 2 diff --git a/test/CodeGen/X86/add-with-overflow.ll b/test/CodeGen/X86/add-with-overflow.ll index d015cebbbdf22..0f705dc020883 100644 --- a/test/CodeGen/X86/add-with-overflow.ll +++ b/test/CodeGen/X86/add-with-overflow.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep {jb} | count 2 -; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {jo} | count 2 -; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {jb} | count 2 +; RUN: llc < %s -march=x86 | grep {jo} | count 2 +; RUN: llc < %s -march=x86 | grep {jb} | count 2 +; RUN: llc < %s -march=x86 -O0 | grep {jo} | count 2 +; RUN: llc < %s -march=x86 -O0 | grep {jb} | count 2 @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" diff --git a/test/CodeGen/X86/aliases.ll b/test/CodeGen/X86/aliases.ll index 3aadd05d05e91..0b26859b04c73 100644 --- a/test/CodeGen/X86/aliases.ll +++ b/test/CodeGen/X86/aliases.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t -f +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t ; RUN: grep set %t | count 7 ; RUN: grep globl %t | count 6 ; RUN: grep weak %t | count 1 diff --git a/test/CodeGen/X86/aligned-comm.ll b/test/CodeGen/X86/aligned-comm.ll index b2dc77d8be123..c0f3a81c4d67e 100644 --- a/test/CodeGen/X86/aligned-comm.ll +++ b/test/CodeGen/X86/aligned-comm.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 | grep {array,16512,7} -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep {array,16512,7} -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin8 | not grep {7} +; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep {array,16512,7} +; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep {array,16512,7} +; RUN: llc < %s -mtriple=i386-apple-darwin8 | not grep {7} ; Darwin 9+ should get alignment on common symbols. Darwin8 does ; not support this. diff --git a/test/CodeGen/X86/all-ones-vector.ll b/test/CodeGen/X86/all-ones-vector.ll index 01c0e36ea244b..10fecadaa0238 100644 --- a/test/CodeGen/X86/all-ones-vector.ll +++ b/test/CodeGen/X86/all-ones-vector.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 | grep pcmpeqd | count 4 +; RUN: llc < %s -march=x86 -mattr=sse2 | grep pcmpeqd | count 4 define <4 x i32> @ioo() nounwind { ret <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> diff --git a/test/CodeGen/X86/alloca-align-rounding.ll b/test/CodeGen/X86/alloca-align-rounding.ll index 0bd97c23e87bb..f45e9b84b2640 100644 --- a/test/CodeGen/X86/alloca-align-rounding.ll +++ b/test/CodeGen/X86/alloca-align-rounding.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin | grep and | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | grep and | count 1 +; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux | grep and | count 1 declare void @bar(<2 x i64>* %n) diff --git a/test/CodeGen/X86/and-or-fold.ll b/test/CodeGen/X86/and-or-fold.ll index 3501047abc165..7733b8a5baaa4 100644 --- a/test/CodeGen/X86/and-or-fold.ll +++ b/test/CodeGen/X86/and-or-fold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep and | count 1 +; RUN: llc < %s -march=x86 | grep and | count 1 ; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1 ; in this case. diff --git a/test/CodeGen/X86/and-su.ll b/test/CodeGen/X86/and-su.ll index bdc845448f5ff..b5ac23b241289 100644 --- a/test/CodeGen/X86/and-su.ll +++ b/test/CodeGen/X86/and-su.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {(%} | count 1 +; RUN: llc < %s -march=x86 | grep {(%} | count 1 ; Don't duplicate the load. diff --git a/test/CodeGen/X86/anyext-uses.ll b/test/CodeGen/X86/anyext-uses.ll index e8c3cf0e71b25..0cf169eb28d8d 100644 --- a/test/CodeGen/X86/anyext-uses.ll +++ b/test/CodeGen/X86/anyext-uses.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep mov %t | count 8 ; RUN: not grep implicit %t diff --git a/test/CodeGen/X86/anyext.ll b/test/CodeGen/X86/anyext.ll new file mode 100644 index 0000000000000..106fe83661b41 --- /dev/null +++ b/test/CodeGen/X86/anyext.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -march=x86-64 | grep movzbl | count 2 + +; Use movzbl to avoid partial-register updates. + +define i32 @foo(i32 %p, i8 zeroext %x) nounwind { + %q = trunc i32 %p to i8 + %r = udiv i8 %q, %x + %s = zext i8 %r to i32 + %t = and i32 %s, 1 + ret i32 %t +} +define i32 @bar(i32 %p, i16 zeroext %x) nounwind { + %q = trunc i32 %p to i16 + %r = udiv i16 %q, %x + %s = zext i16 %r to i32 + %t = and i32 %s, 1 + ret i32 %t +} diff --git a/test/CodeGen/X86/arg-cast.ll b/test/CodeGen/X86/arg-cast.ll index 2e2bc3cc8f21d..c11151446bc5d 100644 --- a/test/CodeGen/X86/arg-cast.ll +++ b/test/CodeGen/X86/arg-cast.ll @@ -1,7 +1,7 @@ ; This should compile to movl $2147483647, %eax + andl only. -; RUN: llvm-as < %s | llc | grep andl -; RUN: llvm-as < %s | llc | not grep movsd -; RUN: llvm-as < %s | llc | grep esp | not grep add +; RUN: llc < %s | grep andl +; RUN: llc < %s | not grep movsd +; RUN: llc < %s | grep esp | not grep add ; rdar://5736574 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/asm-block-labels.ll b/test/CodeGen/X86/asm-block-labels.ll index 284a9fb00fde7..a43d43023196d 100644 --- a/test/CodeGen/X86/asm-block-labels.ll +++ b/test/CodeGen/X86/asm-block-labels.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -std-compile-opts | llc +; RUN: opt < %s -std-compile-opts | llc ; ModuleID = 'block12.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll index 333c7689ab4ab..96da224c8521f 100644 --- a/test/CodeGen/X86/asm-global-imm.ll +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \ +; RUN: llc < %s -march=x86 -relocation-model=static | \ ; RUN: grep {test1 \$_GV} -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \ +; RUN: llc < %s -march=x86 -relocation-model=static | \ ; RUN: grep {test2 _GV} ; PR882 diff --git a/test/CodeGen/X86/asm-indirect-mem.ll b/test/CodeGen/X86/asm-indirect-mem.ll index 7f3353f6be657..c57aa995e8a8d 100644 --- a/test/CodeGen/X86/asm-indirect-mem.ll +++ b/test/CodeGen/X86/asm-indirect-mem.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2267 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/asm-modifier-P.ll b/test/CodeGen/X86/asm-modifier-P.ll new file mode 100644 index 0000000000000..6139da8c3685c --- /dev/null +++ b/test/CodeGen/X86/asm-modifier-P.ll @@ -0,0 +1,79 @@ +; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32 +; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32 +; RUN: llc < %s -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64 +; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64 +; PR3379 +; XFAIL: * + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" +@G = external global i32 ; <i32*> [#uses=1] + +declare void @bar(...) + +; extern int G; +; void test1() { +; asm("frob %0 x" : : "m"(G)); +; asm("frob %P0 x" : : "m"(G)); +;} + +define void @test1() nounwind { +entry: +; P suffix removes (rip) in -static 64-bit mode. + +; CHECK-PIC-64: test1: +; CHECK-PIC-64: movq G@GOTPCREL(%rip), %rax +; CHECK-PIC-64: frob (%rax) x +; CHECK-PIC-64: frob (%rax) x + +; CHECK-STATIC-64: test1: +; CHECK-STATIC-64: frob G(%rip) x +; CHECK-STATIC-64: frob G x + +; CHECK-PIC-32: test1: +; CHECK-PIC-32: frob G x +; CHECK-PIC-32: frob G x + +; CHECK-STATIC-32: test1: +; CHECK-STATIC-32: frob G x +; CHECK-STATIC-32: frob G x + + call void asm "frob $0 x", "*m"(i32* @G) nounwind + call void asm "frob ${0:P} x", "*m"(i32* @G) nounwind + ret void +} + +define void @test3() nounwind { +entry: +; CHECK-STATIC-64: test3: +; CHECK-STATIC-64: call bar +; CHECK-STATIC-64: call test3 +; CHECK-STATIC-64: call $bar +; CHECK-STATIC-64: call $test3 + +; CHECK-STATIC-32: test3: +; CHECK-STATIC-32: call bar +; CHECK-STATIC-32: call test3 +; CHECK-STATIC-32: call $bar +; CHECK-STATIC-32: call $test3 + +; CHECK-PIC-64: test3: +; CHECK-PIC-64: call bar@PLT +; CHECK-PIC-64: call test3@PLT +; CHECK-PIC-64: call $bar +; CHECK-PIC-64: call $test3 + +; CHECK-PIC-32: test3: +; CHECK-PIC-32: call bar@PLT +; CHECK-PIC-32: call test3@PLT +; CHECK-PIC-32: call $bar +; CHECK-PIC-32: call $test3 + + +; asm(" blah %P0" : : "X"(bar)); + tail call void asm sideeffect "call ${0:P}", "X"(void (...)* @bar) nounwind + tail call void asm sideeffect "call ${0:P}", "X"(void (...)* bitcast (void ()* @test3 to void (...)*)) nounwind + tail call void asm sideeffect "call $0", "X"(void (...)* @bar) nounwind + tail call void asm sideeffect "call $0", "X"(void (...)* bitcast (void ()* @test3 to void (...)*)) nounwind + ret void +} diff --git a/test/CodeGen/X86/asm-modifier.ll b/test/CodeGen/X86/asm-modifier.ll new file mode 100644 index 0000000000000..44f972ec7198c --- /dev/null +++ b/test/CodeGen/X86/asm-modifier.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s | FileCheck %s +; ModuleID = 'asm.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin9.6" + +define i32 @test1() nounwind { +entry: +; CHECK: test1: +; CHECK: movw %gs:6, %ax + %asmtmp.i = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 6) nounwind ; <i16> [#uses=1] + %0 = zext i16 %asmtmp.i to i32 ; <i32> [#uses=1] + ret i32 %0 +} + +define zeroext i16 @test2(i32 %address) nounwind { +entry: +; CHECK: test2: +; CHECK: movw %gs:(%eax), %ax + %asmtmp = tail call i16 asm "movw\09%gs:${1:a}, ${0:w}", "=r,ir,~{dirflag},~{fpsr},~{flags}"(i32 %address) nounwind ; <i16> [#uses=1] + ret i16 %asmtmp +} + +@n = global i32 42 ; <i32*> [#uses=3] +@y = common global i32 0 ; <i32*> [#uses=3] + +define void @test3() nounwind { +entry: +; CHECK: test3: +; CHECK: movl _n, %eax + call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(i32* @n) nounwind + ret void +} + +define void @test4() nounwind { +entry: +; CHECK: test4: +; CHECK: movl L_y$non_lazy_ptr, %ecx +; CHECK: movl (%ecx), %eax + call void asm sideeffect "movl ${0:a}, %eax", "ir,~{dirflag},~{fpsr},~{flags},~{eax}"(i32* @y) nounwind + ret void +} diff --git a/test/CodeGen/X86/atomic_add.ll b/test/CodeGen/X86/atomic_add.ll new file mode 100644 index 0000000000000..d00f8e861c21e --- /dev/null +++ b/test/CodeGen/X86/atomic_add.ll @@ -0,0 +1,217 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; rdar://7103704 + +define void @sub1(i32* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: sub1: +; CHECK: subl + %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 %v) ; <i32> [#uses=0] + ret void +} + +define void @inc4(i64* nocapture %p) nounwind ssp { +entry: +; CHECK: inc4: +; CHECK: incq + %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0] + ret void +} + +declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind + +define void @add8(i64* nocapture %p) nounwind ssp { +entry: +; CHECK: add8: +; CHECK: addq $2 + %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 2) ; <i64> [#uses=0] + ret void +} + +define void @add4(i64* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: add4: +; CHECK: addq + %0 = sext i32 %v to i64 ; <i64> [#uses=1] + %1 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 %0) ; <i64> [#uses=0] + ret void +} + +define void @inc3(i8* nocapture %p) nounwind ssp { +entry: +; CHECK: inc3: +; CHECK: incb + %0 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 1) ; <i8> [#uses=0] + ret void +} + +declare i8 @llvm.atomic.load.add.i8.p0i8(i8* nocapture, i8) nounwind + +define void @add7(i8* nocapture %p) nounwind ssp { +entry: +; CHECK: add7: +; CHECK: addb $2 + %0 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 2) ; <i8> [#uses=0] + ret void +} + +define void @add3(i8* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: add3: +; CHECK: addb + %0 = trunc i32 %v to i8 ; <i8> [#uses=1] + %1 = tail call i8 @llvm.atomic.load.add.i8.p0i8(i8* %p, i8 %0) ; <i8> [#uses=0] + ret void +} + +define void @inc2(i16* nocapture %p) nounwind ssp { +entry: +; CHECK: inc2: +; CHECK: incw + %0 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 1) ; <i16> [#uses=0] + ret void +} + +declare i16 @llvm.atomic.load.add.i16.p0i16(i16* nocapture, i16) nounwind + +define void @add6(i16* nocapture %p) nounwind ssp { +entry: +; CHECK: add6: +; CHECK: addw $2 + %0 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 2) ; <i16> [#uses=0] + ret void +} + +define void @add2(i16* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: add2: +; CHECK: addw + %0 = trunc i32 %v to i16 ; <i16> [#uses=1] + %1 = tail call i16 @llvm.atomic.load.add.i16.p0i16(i16* %p, i16 %0) ; <i16> [#uses=0] + ret void +} + +define void @inc1(i32* nocapture %p) nounwind ssp { +entry: +; CHECK: inc1: +; CHECK: incl + %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 1) ; <i32> [#uses=0] + ret void +} + +declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind + +define void @add5(i32* nocapture %p) nounwind ssp { +entry: +; CHECK: add5: +; CHECK: addl $2 + %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 2) ; <i32> [#uses=0] + ret void +} + +define void @add1(i32* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: add1: +; CHECK: addl + %0 = tail call i32 @llvm.atomic.load.add.i32.p0i32(i32* %p, i32 %v) ; <i32> [#uses=0] + ret void +} + +define void @dec4(i64* nocapture %p) nounwind ssp { +entry: +; CHECK: dec4: +; CHECK: decq + %0 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0] + ret void +} + +declare i64 @llvm.atomic.load.sub.i64.p0i64(i64* nocapture, i64) nounwind + +define void @sub8(i64* nocapture %p) nounwind ssp { +entry: +; CHECK: sub8: +; CHECK: subq $2 + %0 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 2) ; <i64> [#uses=0] + ret void +} + +define void @sub4(i64* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: sub4: +; CHECK: subq + %0 = sext i32 %v to i64 ; <i64> [#uses=1] + %1 = tail call i64 @llvm.atomic.load.sub.i64.p0i64(i64* %p, i64 %0) ; <i64> [#uses=0] + ret void +} + +define void @dec3(i8* nocapture %p) nounwind ssp { +entry: +; CHECK: dec3: +; CHECK: decb + %0 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 1) ; <i8> [#uses=0] + ret void +} + +declare i8 @llvm.atomic.load.sub.i8.p0i8(i8* nocapture, i8) nounwind + +define void @sub7(i8* nocapture %p) nounwind ssp { +entry: +; CHECK: sub7: +; CHECK: subb $2 + %0 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 2) ; <i8> [#uses=0] + ret void +} + +define void @sub3(i8* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: sub3: +; CHECK: subb + %0 = trunc i32 %v to i8 ; <i8> [#uses=1] + %1 = tail call i8 @llvm.atomic.load.sub.i8.p0i8(i8* %p, i8 %0) ; <i8> [#uses=0] + ret void +} + +define void @dec2(i16* nocapture %p) nounwind ssp { +entry: +; CHECK: dec2: +; CHECK: decw + %0 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 1) ; <i16> [#uses=0] + ret void +} + +declare i16 @llvm.atomic.load.sub.i16.p0i16(i16* nocapture, i16) nounwind + +define void @sub6(i16* nocapture %p) nounwind ssp { +entry: +; CHECK: sub6: +; CHECK: subw $2 + %0 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 2) ; <i16> [#uses=0] + ret void +} + +define void @sub2(i16* nocapture %p, i32 %v) nounwind ssp { +entry: +; CHECK: sub2: +; CHECK: subw + %0 = trunc i32 %v to i16 ; <i16> [#uses=1] + %1 = tail call i16 @llvm.atomic.load.sub.i16.p0i16(i16* %p, i16 %0) ; <i16> [#uses=0] + ret void +} + +define void @dec1(i32* nocapture %p) nounwind ssp { +entry: +; CHECK: dec1: +; CHECK: decl + %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 1) ; <i32> [#uses=0] + ret void +} + +declare i32 @llvm.atomic.load.sub.i32.p0i32(i32* nocapture, i32) nounwind + +define void @sub5(i32* nocapture %p) nounwind ssp { +entry: +; CHECK: sub5: +; CHECK: subl $2 + %0 = tail call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %p, i32 2) ; <i32> [#uses=0] + ret void +} diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index 6871a08b29e6a..3ef1887083d02 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -o %t1 -f +; RUN: llc < %s -march=x86 -o %t1 ; RUN: grep "lock" %t1 | count 17 ; RUN: grep "xaddl" %t1 | count 4 ; RUN: grep "cmpxchgl" %t1 | count 13 diff --git a/test/CodeGen/X86/attribute-sections.ll b/test/CodeGen/X86/attribute-sections.ll new file mode 100644 index 0000000000000..30353346b5c96 --- /dev/null +++ b/test/CodeGen/X86/attribute-sections.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX + +declare i32 @foo() +@G0 = global i32 ()* @foo, section ".init_array" + +; LINUX: .section .init_array,"aw" +; LINUX: .globl G0 + +@G1 = global i32 ()* @foo, section ".fini_array" + +; LINUX: .section .fini_array,"aw" +; LINUX: .globl G1 + +@G2 = global i32 ()* @foo, section ".preinit_array" + +; LINUX: .section .preinit_array,"aw" +; LINUX: .globl G2 + diff --git a/test/CodeGen/X86/avoid-lea-scale2.ll b/test/CodeGen/X86/avoid-lea-scale2.ll new file mode 100644 index 0000000000000..8003de262d2cf --- /dev/null +++ b/test/CodeGen/X86/avoid-lea-scale2.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86-64 | grep {leal.*-2(\[%\]rdi,\[%\]rdi)} + +define i32 @foo(i32 %x) nounwind readnone { + %t0 = shl i32 %x, 1 + %t1 = add i32 %t0, -2 + ret i32 %t1 +} + diff --git a/test/CodeGen/X86/avoid-loop-align-2.ll b/test/CodeGen/X86/avoid-loop-align-2.ll index 9f0aeb32c417f..03e69e7a1a499 100644 --- a/test/CodeGen/X86/avoid-loop-align-2.ll +++ b/test/CodeGen/X86/avoid-loop-align-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep align | count 3 +; RUN: llc < %s -march=x86 | grep align | count 3 @x = external global i32* ; <i32**> [#uses=1] diff --git a/test/CodeGen/X86/avoid-loop-align.ll b/test/CodeGen/X86/avoid-loop-align.ll index dfc58181d9040..3e68f9486cfa4 100644 --- a/test/CodeGen/X86/avoid-loop-align.ll +++ b/test/CodeGen/X86/avoid-loop-align.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep align | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin | grep align | count 1 @A = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=1] diff --git a/test/CodeGen/X86/bitcast-int-to-vector.ll b/test/CodeGen/X86/bitcast-int-to-vector.ll index 370bec09848fc..4c25979dcd5e7 100644 --- a/test/CodeGen/X86/bitcast-int-to-vector.ll +++ b/test/CodeGen/X86/bitcast-int-to-vector.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i1 @foo(i64 %a) { diff --git a/test/CodeGen/X86/bitcast.ll b/test/CodeGen/X86/bitcast.ll index f575409f2149b..c34c6753bfedc 100644 --- a/test/CodeGen/X86/bitcast.ll +++ b/test/CodeGen/X86/bitcast.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 ; PR1033 define i64 @test1(double %t) { diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll index 3e26931578023..48922b5f5a132 100644 --- a/test/CodeGen/X86/bitcast2.ll +++ b/test/CodeGen/X86/bitcast2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 | not grep rsp +; RUN: llc < %s -march=x86-64 | grep movd | count 2 +; RUN: llc < %s -march=x86-64 | not grep rsp define i64 @test1(double %A) { %B = bitcast double %A to i64 diff --git a/test/CodeGen/X86/break-anti-dependencies.ll b/test/CodeGen/X86/break-anti-dependencies.ll index b9ce10f44198d..6b245c103e204 100644 --- a/test/CodeGen/X86/break-anti-dependencies.ll +++ b/test/CodeGen/X86/break-anti-dependencies.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies=false > %t +; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=false > %t ; RUN: grep {%xmm0} %t | count 14 ; RUN: not grep {%xmm1} %t -; RUN: llvm-as < %s | llc -march=x86-64 -disable-post-RA-scheduler=false -break-anti-dependencies > %t +; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies > %t ; RUN: grep {%xmm0} %t | count 7 ; RUN: grep {%xmm1} %t | count 7 diff --git a/test/CodeGen/X86/bss_pagealigned.ll b/test/CodeGen/X86/bss_pagealigned.ll new file mode 100644 index 0000000000000..4a1049bc560d4 --- /dev/null +++ b/test/CodeGen/X86/bss_pagealigned.ll @@ -0,0 +1,21 @@ +; RUN: llc --code-model=kernel -march=x86-64 <%s | FileCheck %s +; PR4933 +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" +%struct.kmem_cache_order_objects = type { i64 } +declare i8* @memset(i8*, i32, i64) +define void @unxlate_dev_mem_ptr(i64 %phis, i8* %addr) nounwind { + %pte.addr.i = alloca %struct.kmem_cache_order_objects* + %call8 = call i8* @memset(i8* bitcast ([512 x %struct.kmem_cache_order_objects]* @bm_pte to i8*), i32 0, i64 4096) +; CHECK: movq $bm_pte, %rdi +; CHECK-NEXT: xorl %esi, %esi +; CHECK-NEXT: movl $4096, %edx +; CHECK-NEXT: call memset + ret void +} +@bm_pte = internal global [512 x %struct.kmem_cache_order_objects] zeroinitializer, section ".bss.page_aligned", align 4096 +; CHECK: .section .bss.page_aligned,"aw",@nobits +; CHECK-NEXT: .align 4096 +; CHECK-NEXT: bm_pte: +; CHECK-NEXT: .zero 4096 +; CHECK-NEXT: .size bm_pte, 4096 diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index 91f8310361ad5..5bf58fa1d5054 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep APP %t ; RUN: grep bswapq %t | count 2 ; RUN: grep bswapl %t | count 1 diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll index 592e25bae331a..0a72c1c47845b 100644 --- a/test/CodeGen/X86/bswap.ll +++ b/test/CodeGen/X86/bswap.ll @@ -1,8 +1,8 @@ ; bswap should be constant folded when it is passed a constant argument -; RUN: llvm-as < %s | llc -march=x86 | \ +; RUN: llc < %s -march=x86 | \ ; RUN: grep bswapl | count 3 -; RUN: llvm-as < %s | llc -march=x86 | grep rolw | count 1 +; RUN: llc < %s -march=x86 | grep rolw | count 1 declare i16 @llvm.bswap.i16(i16) diff --git a/test/CodeGen/X86/bt.ll b/test/CodeGen/X86/bt.ll index a76242c977ced..ec447e5e9c813 100644 --- a/test/CodeGen/X86/bt.ll +++ b/test/CodeGen/X86/bt.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep btl | count 28 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium4 | grep btl | not grep esp -; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn | grep btl | not grep esp +; RUN: llc < %s -march=x86 | grep btl | count 28 +; RUN: llc < %s -march=x86 -mcpu=pentium4 | grep btl | not grep esp +; RUN: llc < %s -march=x86 -mcpu=penryn | grep btl | not grep esp ; PR3253 ; The register+memory form of the BT instruction should be usable on diff --git a/test/CodeGen/X86/byval.ll b/test/CodeGen/X86/byval.ll index a75214a6b084b..af36e1bb8cb4c 100644 --- a/test/CodeGen/X86/byval.ll +++ b/test/CodeGen/X86/byval.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rsp), %rax} -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86-64 | grep {movq 8(%rsp), %rax} +; RUN: llc < %s -march=x86 > %t ; RUN: grep {movl 8(%esp), %edx} %t ; RUN: grep {movl 4(%esp), %eax} %t diff --git a/test/CodeGen/X86/byval2.ll b/test/CodeGen/X86/byval2.ll index f85c8ffbe4fe7..71129f5f6c9bc 100644 --- a/test/CodeGen/X86/byval2.ll +++ b/test/CodeGen/X86/byval2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, diff --git a/test/CodeGen/X86/byval3.ll b/test/CodeGen/X86/byval3.ll index 707a4c5d2785d..504e0bed79168 100644 --- a/test/CodeGen/X86/byval3.ll +++ b/test/CodeGen/X86/byval3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, diff --git a/test/CodeGen/X86/byval4.ll b/test/CodeGen/X86/byval4.ll index 5576c361ae163..4db9d650b439c 100644 --- a/test/CodeGen/X86/byval4.ll +++ b/test/CodeGen/X86/byval4.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, diff --git a/test/CodeGen/X86/byval5.ll b/test/CodeGen/X86/byval5.ll index c6f4588dd45df..69c115b97326e 100644 --- a/test/CodeGen/X86/byval5.ll +++ b/test/CodeGen/X86/byval5.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsq | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep rep.movsl | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, diff --git a/test/CodeGen/X86/byval6.ll b/test/CodeGen/X86/byval6.ll index 47269d21d930d..b060369a182ec 100644 --- a/test/CodeGen/X86/byval6.ll +++ b/test/CodeGen/X86/byval6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep add | not grep 16 +; RUN: llc < %s -march=x86 | grep add | not grep 16 %struct.W = type { x86_fp80, x86_fp80 } @B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32 diff --git a/test/CodeGen/X86/byval7.ll b/test/CodeGen/X86/byval7.ll index 6b64c6ce4dabd..0da93bad04e10 100644 --- a/test/CodeGen/X86/byval7.ll +++ b/test/CodeGen/X86/byval7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | egrep {add|lea} | grep 16 +; RUN: llc < %s -march=x86 -mcpu=yonah | egrep {add|lea} | grep 16 %struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } diff --git a/test/CodeGen/X86/call-imm.ll b/test/CodeGen/X86/call-imm.ll index 6e9c70dd42fe8..87785bc3f3f40 100644 --- a/test/CodeGen/X86/call-imm.ll +++ b/test/CodeGen/X86/call-imm.ll @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678} -; RUN: llvm-as < %s | llc -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678} -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678} +; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=static | grep {call.*12345678} +; RUN: llc < %s -mtriple=i386-darwin-apple -relocation-model=pic | not grep {call.*12345678} +; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep {call.*12345678} ; Call to immediate is not safe on x86-64 unless we *know* that the ; call will be within 32-bits pcrel from the dest immediate. -; RUN: llvm-as < %s | llc -march=x86-64 | grep {call.*\*%rax} +; RUN: llc < %s -march=x86-64 | grep {call.*\*%rax} ; PR3666 ; PR3773 diff --git a/test/CodeGen/X86/call-push.ll b/test/CodeGen/X86/call-push.ll index ad9b796a85d01..7bae5cd2464d5 100644 --- a/test/CodeGen/X86/call-push.ll +++ b/test/CodeGen/X86/call-push.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -disable-fp-elim | grep subl | count 1 +; RUN: llc < %s -march=x86 -disable-fp-elim | grep subl | count 1 %struct.decode_t = type { i8, i8, i8, i8, i16, i8, i8, %struct.range_t** } %struct.range_t = type { float, float, i32, i32, i32, [0 x i8] } diff --git a/test/CodeGen/X86/change-compare-stride-0.ll b/test/CodeGen/X86/change-compare-stride-0.ll index 87194d61c37a6..d520a6ff13b24 100644 --- a/test/CodeGen/X86/change-compare-stride-0.ll +++ b/test/CodeGen/X86/change-compare-stride-0.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t -; RUN: grep {cmpl \$4294966818,} %t +; RUN: llc < %s -march=x86 > %t +; RUN: grep {cmpl \$-478,} %t ; RUN: not grep inc %t ; RUN: not grep {leal 1(} %t ; RUN: not grep {leal -1(} %t diff --git a/test/CodeGen/X86/change-compare-stride-1.ll b/test/CodeGen/X86/change-compare-stride-1.ll index 49b691f4a75bf..a9ddbdb7f745a 100644 --- a/test/CodeGen/X86/change-compare-stride-1.ll +++ b/test/CodeGen/X86/change-compare-stride-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep {cmpq \$-478,} %t ; RUN: not grep inc %t ; RUN: not grep {leal 1(} %t diff --git a/test/CodeGen/X86/clz.ll b/test/CodeGen/X86/clz.ll index c3b3b412f2a9d..3f27187d44a89 100644 --- a/test/CodeGen/X86/clz.ll +++ b/test/CodeGen/X86/clz.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep bsr | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep bsf -; RUN: llvm-as < %s | llc -march=x86 | grep cmov | count 3 +; RUN: llc < %s -march=x86 | grep bsr | count 2 +; RUN: llc < %s -march=x86 | grep bsf +; RUN: llc < %s -march=x86 | grep cmov | count 3 define i32 @t1(i32 %x) nounwind { %tmp = tail call i32 @llvm.ctlz.i32( i32 %x ) diff --git a/test/CodeGen/X86/cmov.ll b/test/CodeGen/X86/cmov.ll new file mode 100644 index 0000000000000..f3c9a7addf83b --- /dev/null +++ b/test/CodeGen/X86/cmov.ll @@ -0,0 +1,157 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + +define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone { +entry: +; CHECK: test1: +; CHECK: btl +; CHECK-NEXT: movl $12, %eax +; CHECK-NEXT: cmovae (%rcx), %eax +; CHECK-NEXT: ret + + %0 = lshr i32 %x, %n ; <i32> [#uses=1] + %1 = and i32 %0, 1 ; <i32> [#uses=1] + %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1] + %v = load i32* %vp + %.0 = select i1 %toBool, i32 %v, i32 12 ; <i32> [#uses=1] + ret i32 %.0 +} +define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone { +entry: +; CHECK: test2: +; CHECK: btl +; CHECK-NEXT: movl $12, %eax +; CHECK-NEXT: cmovb (%rcx), %eax +; CHECK-NEXT: ret + + %0 = lshr i32 %x, %n ; <i32> [#uses=1] + %1 = and i32 %0, 1 ; <i32> [#uses=1] + %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1] + %v = load i32* %vp + %.0 = select i1 %toBool, i32 12, i32 %v ; <i32> [#uses=1] + ret i32 %.0 +} + + +; x86's 32-bit cmov doesn't clobber the high 32 bits of the destination +; if the condition is false. An explicit zero-extend (movl) is needed +; after the cmov. + +declare void @bar(i64) nounwind + +define void @test3(i64 %a, i64 %b, i1 %p) nounwind { +; CHECK: test3: +; CHECK: cmovne %edi, %esi +; CHECK-NEXT: movl %esi, %edi + + %c = trunc i64 %a to i32 + %d = trunc i64 %b to i32 + %e = select i1 %p, i32 %c, i32 %d + %f = zext i32 %e to i64 + call void @bar(i64 %f) + ret void +} + + + +; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional +; move without recomputing EFLAGS, because the expansion of the conditional +; move with control flow may clobber EFLAGS (e.g., with xor, to set the +; register to zero). + +; The test is a little awkward; the important part is that there's a test before the +; setne. +; PR4814 + + +@g_3 = external global i8 ; <i8*> [#uses=1] +@g_96 = external global i8 ; <i8*> [#uses=2] +@g_100 = external global i8 ; <i8*> [#uses=2] +@_2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1] + +define i32 @test4() nounwind { +entry: + %0 = load i8* @g_3, align 1 ; <i8> [#uses=2] + %1 = sext i8 %0 to i32 ; <i32> [#uses=1] + %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1] + %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1] + %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1] + %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1] + %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1] + %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2] + %g_96.promoted.i = load i8* @g_96 ; <i8> [#uses=3] + %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2] + br i1 %3, label %func_4.exit.i, label %bb.i.i.i + +bb.i.i.i: ; preds = %entry + %4 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0] + br label %func_4.exit.i + +; CHECK: test4: +; CHECK: g_100 +; CHECK: testb +; CHECK: testb %al, %al +; CHECK-NEXT: setne %al +; CHECK-NEXT: testb + +func_4.exit.i: ; preds = %bb.i.i.i, %entry + %.not.i = xor i1 %2, true ; <i1> [#uses=1] + %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1] + %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1] + br i1 %brmerge.i, label %func_1.exit, label %bb.i.i + +bb.i.i: ; preds = %func_4.exit.i + %5 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0] + br label %func_1.exit + +func_1.exit: ; preds = %bb.i.i, %func_4.exit.i + %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2] + store i8 %g_96.tmp.0.i, i8* @g_96 + %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1] + %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0] + ret i32 0 +} + +declare i32 @printf(i8* nocapture, ...) nounwind + + +; Should compile to setcc | -2. +; rdar://6668608 +define i32 @test5(i32* nocapture %P) nounwind readonly { +entry: +; CHECK: test5: +; CHECK: setg %al +; CHECK: movzbl %al, %eax +; CHECK: orl $-2, %eax +; CHECK: ret + + %0 = load i32* %P, align 4 ; <i32> [#uses=1] + %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1] + ret i32 %iftmp.0.0 +} + +define i32 @test6(i32* nocapture %P) nounwind readonly { +entry: +; CHECK: test6: +; CHECK: setl %al +; CHECK: movzbl %al, %eax +; CHECK: leal 4(%rax,%rax,8), %eax +; CHECK: ret + %0 = load i32* %P, align 4 ; <i32> [#uses=1] + %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1] + %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1] + ret i32 %iftmp.0.0 +} + + +; Don't try to use a 16-bit conditional move to do an 8-bit select, +; because it isn't worth it. Just use a branch instead. +define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind { +; CHECK: test7: +; CHECK: testb $1, %dil +; CHECK-NEXT: jne LBB + + %d = select i1 %c, i8 %a, i8 %b + ret i8 %d +} diff --git a/test/CodeGen/X86/cmp-test.ll b/test/CodeGen/X86/cmp-test.ll index 91c8a87ea5419..898c09b82f5e2 100644 --- a/test/CodeGen/X86/cmp-test.ll +++ b/test/CodeGen/X86/cmp-test.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep test | count 1 +; RUN: llc < %s -march=x86 | grep cmp | count 1 +; RUN: llc < %s -march=x86 | grep test | count 1 define i32 @f1(i32 %X, i32* %y) { %tmp = load i32* %y ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/cmp0.ll b/test/CodeGen/X86/cmp0.ll index f66f90c0b0f3a..de893745bae9c 100644 --- a/test/CodeGen/X86/cmp0.ll +++ b/test/CodeGen/X86/cmp0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep -v cmp +; RUN: llc < %s -march=x86-64 | grep -v cmp define i64 @foo(i64 %x) { %t = icmp eq i64 %x, 0 diff --git a/test/CodeGen/X86/cmp1.ll b/test/CodeGen/X86/cmp1.ll index 241618c531ab5..d4aa399ae95d5 100644 --- a/test/CodeGen/X86/cmp1.ll +++ b/test/CodeGen/X86/cmp1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep -v cmp +; RUN: llc < %s -march=x86-64 | grep -v cmp define i64 @foo(i64 %x) { %t = icmp slt i64 %x, 1 diff --git a/test/CodeGen/X86/cmp2.ll b/test/CodeGen/X86/cmp2.ll index 2c046ffc08413..9a8e00c8bca09 100644 --- a/test/CodeGen/X86/cmp2.ll +++ b/test/CodeGen/X86/cmp2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep ucomisd | grep CPI | count 2 define i32 @test(double %A) nounwind { entry: diff --git a/test/CodeGen/X86/coalesce-esp.ll b/test/CodeGen/X86/coalesce-esp.ll new file mode 100644 index 0000000000000..0fe4e56c97cab --- /dev/null +++ b/test/CodeGen/X86/coalesce-esp.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s | grep {movl %esp, %eax} +; PR4572 + +; Don't coalesce with %esp if it would end up putting %esp in +; the index position of an address, because that can't be +; encoded on x86. It would actually be slightly better to +; swap the address operands though, since there's no scale. + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-mingw32" + %"struct.std::valarray<unsigned int>" = type { i32, i32* } + +define void @_ZSt17__gslice_to_indexjRKSt8valarrayIjES2_RS0_(i32 %__o, %"struct.std::valarray<unsigned int>"* nocapture %__l, %"struct.std::valarray<unsigned int>"* nocapture %__s, %"struct.std::valarray<unsigned int>"* nocapture %__i) nounwind { +entry: + %0 = alloca i32, i32 undef, align 4 ; <i32*> [#uses=1] + br i1 undef, label %return, label %bb4 + +bb4: ; preds = %bb7.backedge, %entry + %indvar = phi i32 [ %indvar.next, %bb7.backedge ], [ 0, %entry ] ; <i32> [#uses=2] + %scevgep24.sum = sub i32 undef, %indvar ; <i32> [#uses=2] + %scevgep25 = getelementptr i32* %0, i32 %scevgep24.sum ; <i32*> [#uses=1] + %scevgep27 = getelementptr i32* undef, i32 %scevgep24.sum ; <i32*> [#uses=1] + %1 = load i32* %scevgep27, align 4 ; <i32> [#uses=0] + br i1 undef, label %bb7.backedge, label %bb5 + +bb5: ; preds = %bb4 + store i32 0, i32* %scevgep25, align 4 + br label %bb7.backedge + +bb7.backedge: ; preds = %bb5, %bb4 + %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] + br label %bb4 + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/coalescer-commute1.ll b/test/CodeGen/X86/coalescer-commute1.ll index 99394240c7c81..8aa0bfdd51fbd 100644 --- a/test/CodeGen/X86/coalescer-commute1.ll +++ b/test/CodeGen/X86/coalescer-commute1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps ; PR1877 @NNTOT = weak global i32 0 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/coalescer-commute2.ll b/test/CodeGen/X86/coalescer-commute2.ll index c67e0f582496a..5d10bbad09ef0 100644 --- a/test/CodeGen/X86/coalescer-commute2.ll +++ b/test/CodeGen/X86/coalescer-commute2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep paddw | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov +; RUN: llc < %s -march=x86-64 | grep paddw | count 2 +; RUN: llc < %s -march=x86-64 | not grep mov ; The 2-addr pass should ensure that identical code is produced for these functions ; no extra copy should be generated. diff --git a/test/CodeGen/X86/coalescer-commute3.ll b/test/CodeGen/X86/coalescer-commute3.ll index 7d4a80ab70f23..e5bd448a4158a 100644 --- a/test/CodeGen/X86/coalescer-commute3.ll +++ b/test/CodeGen/X86/coalescer-commute3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6 +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 6 %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } diff --git a/test/CodeGen/X86/coalescer-commute4.ll b/test/CodeGen/X86/coalescer-commute4.ll index 9628f93e7916f..02a97813fdcd0 100644 --- a/test/CodeGen/X86/coalescer-commute4.ll +++ b/test/CodeGen/X86/coalescer-commute4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps ; PR1501 define float @foo(i32* %x, float* %y, i32 %c) nounwind { diff --git a/test/CodeGen/X86/coalescer-commute5.ll b/test/CodeGen/X86/coalescer-commute5.ll index c730ea76e9837..510d115f4ad76 100644 --- a/test/CodeGen/X86/coalescer-commute5.ll +++ b/test/CodeGen/X86/coalescer-commute5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps define i32 @t() { entry: diff --git a/test/CodeGen/X86/coalescer-cross.ll b/test/CodeGen/X86/coalescer-cross.ll new file mode 100644 index 0000000000000..7d6f399930fd4 --- /dev/null +++ b/test/CodeGen/X86/coalescer-cross.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 | not grep movaps +; rdar://6509240 + + type { %struct.TValue } ; type %0 + type { %struct.L_Umaxalign, i32, %struct.Node* } ; type %1 + %struct.CallInfo = type { %struct.TValue*, %struct.TValue*, %struct.TValue*, i32*, i32, i32 } + %struct.GCObject = type { %struct.lua_State } + %struct.L_Umaxalign = type { double } + %struct.Mbuffer = type { i8*, i32, i32 } + %struct.Node = type { %struct.TValue, %struct.TKey } + %struct.TKey = type { %1 } + %struct.TString = type { %struct.anon } + %struct.TValue = type { %struct.L_Umaxalign, i32 } + %struct.Table = type { %struct.GCObject*, i8, i8, i8, i8, %struct.Table*, %struct.TValue*, %struct.Node*, %struct.Node*, %struct.GCObject*, i32 } + %struct.UpVal = type { %struct.GCObject*, i8, i8, %struct.TValue*, %0 } + %struct.anon = type { %struct.GCObject*, i8, i8, i8, i32, i32 } + %struct.global_State = type { %struct.stringtable, i8* (i8*, i8*, i32, i32)*, i8*, i8, i8, i32, %struct.GCObject*, %struct.GCObject**, %struct.GCObject*, %struct.GCObject*, %struct.GCObject*, %struct.GCObject*, %struct.Mbuffer, i32, i32, i32, i32, i32, i32, i32 (%struct.lua_State*)*, %struct.TValue, %struct.lua_State*, %struct.UpVal, [9 x %struct.Table*], [17 x %struct.TString*] } + %struct.lua_Debug = type { i32, i8*, i8*, i8*, i8*, i32, i32, i32, i32, [60 x i8], i32 } + %struct.lua_State = type { %struct.GCObject*, i8, i8, i8, %struct.TValue*, %struct.TValue*, %struct.global_State*, %struct.CallInfo*, i32*, %struct.TValue*, %struct.TValue*, %struct.CallInfo*, %struct.CallInfo*, i32, i32, i16, i16, i8, i8, i32, i32, void (%struct.lua_State*, %struct.lua_Debug*)*, %struct.TValue, %struct.TValue, %struct.GCObject*, %struct.GCObject*, %struct.lua_longjmp*, i32 } + %struct.lua_longjmp = type { %struct.lua_longjmp*, [18 x i32], i32 } + %struct.stringtable = type { %struct.GCObject**, i32, i32 } +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.lua_State*)* @os_clock to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define i32 @os_clock(%struct.lua_State* nocapture %L) nounwind ssp { +entry: + %0 = tail call i32 @"\01_clock$UNIX2003"() nounwind ; <i32> [#uses=1] + %1 = uitofp i32 %0 to double ; <double> [#uses=1] + %2 = fdiv double %1, 1.000000e+06 ; <double> [#uses=1] + %3 = getelementptr %struct.lua_State* %L, i32 0, i32 4 ; <%struct.TValue**> [#uses=3] + %4 = load %struct.TValue** %3, align 4 ; <%struct.TValue*> [#uses=2] + %5 = getelementptr %struct.TValue* %4, i32 0, i32 0, i32 0 ; <double*> [#uses=1] + store double %2, double* %5, align 4 + %6 = getelementptr %struct.TValue* %4, i32 0, i32 1 ; <i32*> [#uses=1] + store i32 3, i32* %6, align 4 + %7 = load %struct.TValue** %3, align 4 ; <%struct.TValue*> [#uses=1] + %8 = getelementptr %struct.TValue* %7, i32 1 ; <%struct.TValue*> [#uses=1] + store %struct.TValue* %8, %struct.TValue** %3, align 4 + ret i32 1 +} + +declare i32 @"\01_clock$UNIX2003"() diff --git a/test/CodeGen/X86/coalescer-remat.ll b/test/CodeGen/X86/coalescer-remat.ll index ab029f45658ce..4db520fee7477 100644 --- a/test/CodeGen/X86/coalescer-remat.ll +++ b/test/CodeGen/X86/coalescer-remat.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep xor | count 3 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xor | count 3 @val = internal global i64 0 ; <i64*> [#uses=1] @"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00" ; <[7 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/code_placement.ll b/test/CodeGen/X86/code_placement.ll index 55167950d1a01..97471835a4c9e 100644 --- a/test/CodeGen/X86/code_placement.ll +++ b/test/CodeGen/X86/code_placement.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | %prcontext jmp 1 | grep align +; RUN: llc -march=x86 < %s | FileCheck %s @Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5] @Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4] @@ -12,6 +12,8 @@ entry: %tmp15 = add i32 %r, -1 ; <i32> [#uses=1] %tmp.16 = zext i32 %tmp15 to i64 ; <i64> [#uses=2] br label %bb +; CHECK: jmp +; CHECK-NEXT: align bb: ; preds = %bb1, %entry %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; <i64> [#uses=3] diff --git a/test/CodeGen/X86/codegen-prepare-cast.ll b/test/CodeGen/X86/codegen-prepare-cast.ll index ae3eb5f6d68d5..2a8ead8c49097 100644 --- a/test/CodeGen/X86/codegen-prepare-cast.ll +++ b/test/CodeGen/X86/codegen-prepare-cast.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 ; PR4297 target datalayout = diff --git a/test/CodeGen/X86/codemodel.ll b/test/CodeGen/X86/codemodel.ll new file mode 100644 index 0000000000000..b6ca1cedc22ee --- /dev/null +++ b/test/CodeGen/X86/codemodel.ll @@ -0,0 +1,67 @@ +; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s +; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" +@data = external global [0 x i32] ; <[0 x i32]*> [#uses=5] + +define i32 @foo() nounwind readonly { +entry: +; CHECK-SMALL: foo: +; CHECK-SMALL: movl data(%rip), %eax +; CHECK-KERNEL: foo: +; CHECK-KERNEL: movl data, %eax + %0 = load i32* getelementptr ([0 x i32]* @data, i64 0, i64 0), align 4 ; <i32> [#uses=1] + ret i32 %0 +} + +define i32 @foo2() nounwind readonly { +entry: +; CHECK-SMALL: foo2: +; CHECK-SMALL: movl data+40(%rip), %eax +; CHECK-KERNEL: foo2: +; CHECK-KERNEL: movl data+40, %eax + %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 10), align 4 ; <i32> [#uses=1] + ret i32 %0 +} + +define i32 @foo3() nounwind readonly { +entry: +; CHECK-SMALL: foo3: +; CHECK-SMALL: movl data-40(%rip), %eax +; CHECK-KERNEL: foo3: +; CHECK-KERNEL: movq $-40, %rax + %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -10), align 4 ; <i32> [#uses=1] + ret i32 %0 +} + +define i32 @foo4() nounwind readonly { +entry: +; FIXME: We really can use movabsl here! +; CHECK-SMALL: foo4: +; CHECK-SMALL: movl $16777216, %eax +; CHECK-SMALL: movl data(%rax), %eax +; CHECK-KERNEL: foo4: +; CHECK-KERNEL: movl data+16777216, %eax + %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194304), align 4 ; <i32> [#uses=1] + ret i32 %0 +} + +define i32 @foo1() nounwind readonly { +entry: +; CHECK-SMALL: foo1: +; CHECK-SMALL: movl data+16777212(%rip), %eax +; CHECK-KERNEL: foo1: +; CHECK-KERNEL: movl data+16777212, %eax + %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 4194303), align 4 ; <i32> [#uses=1] + ret i32 %0 +} +define i32 @foo5() nounwind readonly { +entry: +; CHECK-SMALL: foo5: +; CHECK-SMALL: movl data-16777216(%rip), %eax +; CHECK-KERNEL: foo5: +; CHECK-KERNEL: movq $-16777216, %rax + %0 = load i32* getelementptr ([0 x i32]* @data, i32 0, i64 -4194304), align 4 ; <i32> [#uses=1] + ret i32 %0 +} diff --git a/test/CodeGen/X86/combine-lds.ll b/test/CodeGen/X86/combine-lds.ll index a78a042d7ec37..b49d081a64f15 100644 --- a/test/CodeGen/X86/combine-lds.ll +++ b/test/CodeGen/X86/combine-lds.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep fldl | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1 define double @doload64(i64 %x) nounwind { %tmp717 = bitcast i64 %x to double diff --git a/test/CodeGen/X86/combiner-aa-0.ll b/test/CodeGen/X86/combiner-aa-0.ll new file mode 100644 index 0000000000000..a61ef7acd13c7 --- /dev/null +++ b/test/CodeGen/X86/combiner-aa-0.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=x86-64 -combiner-global-alias-analysis -combiner-alias-analysis + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" + %struct.Hash_Key = type { [4 x i32], i32 } +@g_flipV_hashkey = external global %struct.Hash_Key, align 16 ; <%struct.Hash_Key*> [#uses=1] + +define void @foo() nounwind { + %t0 = load i32* undef, align 16 ; <i32> [#uses=1] + %t1 = load i32* null, align 4 ; <i32> [#uses=1] + %t2 = srem i32 %t0, 32 ; <i32> [#uses=1] + %t3 = shl i32 1, %t2 ; <i32> [#uses=1] + %t4 = xor i32 %t3, %t1 ; <i32> [#uses=1] + store i32 %t4, i32* null, align 4 + %t5 = getelementptr %struct.Hash_Key* @g_flipV_hashkey, i64 0, i32 0, i64 0 ; <i32*> [#uses=2] + %t6 = load i32* %t5, align 4 ; <i32> [#uses=1] + %t7 = shl i32 1, undef ; <i32> [#uses=1] + %t8 = xor i32 %t7, %t6 ; <i32> [#uses=1] + store i32 %t8, i32* %t5, align 4 + unreachable +} diff --git a/test/CodeGen/X86/combiner-aa-1.ll b/test/CodeGen/X86/combiner-aa-1.ll new file mode 100644 index 0000000000000..58a7129b6005f --- /dev/null +++ b/test/CodeGen/X86/combiner-aa-1.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s --combiner-alias-analysis --combiner-global-alias-analysis +; PR4880 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" +target triple = "i386-pc-linux-gnu" + +%struct.alst_node = type { %struct.node } +%struct.arg_node = type { %struct.node, i8*, %struct.alst_node* } +%struct.arglst_node = type { %struct.alst_node, %struct.arg_node*, %struct.arglst_node* } +%struct.lam_node = type { %struct.alst_node, %struct.arg_node*, %struct.alst_node* } +%struct.node = type { i32 (...)**, %struct.node* } + +define i32 @._ZN8lam_node18resolve_name_clashEP8arg_nodeP9alst_node._ZNK8lam_nodeeqERK8exp_node._ZN11arglst_nodeD0Ev(%struct.lam_node* %this.this, %struct.arg_node* %outer_arg, %struct.alst_node* %env.cmp, %struct.arglst_node* %this, i32 %functionID) { +comb_entry: + %.SV59 = alloca %struct.node* ; <%struct.node**> [#uses=1] + %0 = load i32 (...)*** null, align 4 ; <i32 (...)**> [#uses=1] + %1 = getelementptr inbounds i32 (...)** %0, i32 3 ; <i32 (...)**> [#uses=1] + %2 = load i32 (...)** %1, align 4 ; <i32 (...)*> [#uses=1] + store %struct.node* undef, %struct.node** %.SV59 + %3 = bitcast i32 (...)* %2 to i32 (%struct.node*)* ; <i32 (%struct.node*)*> [#uses=1] + %4 = tail call i32 %3(%struct.node* undef) ; <i32> [#uses=0] + unreachable +} diff --git a/test/CodeGen/X86/commute-intrinsic.ll b/test/CodeGen/X86/commute-intrinsic.ll index 12c0e03f6f481..d810cb1eff784 100644 --- a/test/CodeGen/X86/commute-intrinsic.ll +++ b/test/CodeGen/X86/commute-intrinsic.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps @a = external global <2 x i64> ; <<2 x i64>*> [#uses=1] diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll index 224f5d5e5c54c..56ea26b658d81 100644 --- a/test/CodeGen/X86/commute-two-addr.ll +++ b/test/CodeGen/X86/commute-two-addr.ll @@ -2,7 +2,7 @@ ; insertion of register-register copies. ; Make sure there are only 3 mov's for each testcase -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {\\\<mov\\\>} | count 6 diff --git a/test/CodeGen/X86/compare-add.ll b/test/CodeGen/X86/compare-add.ll index aa69a31a48fc2..358ee59c95a51 100644 --- a/test/CodeGen/X86/compare-add.ll +++ b/test/CodeGen/X86/compare-add.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep add +; RUN: llc < %s -march=x86 | not grep add define i1 @X(i32 %X) { %Y = add i32 %X, 14 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/compare-inf.ll b/test/CodeGen/X86/compare-inf.ll new file mode 100644 index 0000000000000..2be90c9764c2b --- /dev/null +++ b/test/CodeGen/X86/compare-inf.ll @@ -0,0 +1,76 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; Convert oeq and une to ole/oge/ule/uge when comparing with infinity +; and negative infinity, because those are more efficient on x86. + +; CHECK: oeq_inff: +; CHECK: ucomiss +; CHECK: jae +define float @oeq_inff(float %x, float %y) nounwind readonly { + %t0 = fcmp oeq float %x, 0x7FF0000000000000 + %t1 = select i1 %t0, float 1.0, float %y + ret float %t1 +} + +; CHECK: oeq_inf: +; CHECK: ucomisd +; CHECK: jae +define double @oeq_inf(double %x, double %y) nounwind readonly { + %t0 = fcmp oeq double %x, 0x7FF0000000000000 + %t1 = select i1 %t0, double 1.0, double %y + ret double %t1 +} + +; CHECK: une_inff: +; CHECK: ucomiss +; CHECK: jb +define float @une_inff(float %x, float %y) nounwind readonly { + %t0 = fcmp une float %x, 0x7FF0000000000000 + %t1 = select i1 %t0, float 1.0, float %y + ret float %t1 +} + +; CHECK: une_inf: +; CHECK: ucomisd +; CHECK: jb +define double @une_inf(double %x, double %y) nounwind readonly { + %t0 = fcmp une double %x, 0x7FF0000000000000 + %t1 = select i1 %t0, double 1.0, double %y + ret double %t1 +} + +; CHECK: oeq_neg_inff: +; CHECK: ucomiss +; CHECK: jae +define float @oeq_neg_inff(float %x, float %y) nounwind readonly { + %t0 = fcmp oeq float %x, 0xFFF0000000000000 + %t1 = select i1 %t0, float 1.0, float %y + ret float %t1 +} + +; CHECK: oeq_neg_inf: +; CHECK: ucomisd +; CHECK: jae +define double @oeq_neg_inf(double %x, double %y) nounwind readonly { + %t0 = fcmp oeq double %x, 0xFFF0000000000000 + %t1 = select i1 %t0, double 1.0, double %y + ret double %t1 +} + +; CHECK: une_neg_inff: +; CHECK: ucomiss +; CHECK: jb +define float @une_neg_inff(float %x, float %y) nounwind readonly { + %t0 = fcmp une float %x, 0xFFF0000000000000 + %t1 = select i1 %t0, float 1.0, float %y + ret float %t1 +} + +; CHECK: une_neg_inf: +; CHECK: ucomisd +; CHECK: jb +define double @une_neg_inf(double %x, double %y) nounwind readonly { + %t0 = fcmp une double %x, 0xFFF0000000000000 + %t1 = select i1 %t0, double 1.0, double %y + ret double %t1 +} diff --git a/test/CodeGen/X86/compare_folding.ll b/test/CodeGen/X86/compare_folding.ll index c6cda4a5b9792..84c152d77215a 100644 --- a/test/CodeGen/X86/compare_folding.ll +++ b/test/CodeGen/X86/compare_folding.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | \ +; RUN: llc < %s -march=x86 -mcpu=yonah | \ ; RUN: grep movsd | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | \ +; RUN: llc < %s -march=x86 -mcpu=yonah | \ ; RUN: grep ucomisd declare i1 @llvm.isunordered.f64(double, double) diff --git a/test/CodeGen/X86/compiler_used.ll b/test/CodeGen/X86/compiler_used.ll new file mode 100644 index 0000000000000..be8de5e09f8a0 --- /dev/null +++ b/test/CodeGen/X86/compiler_used.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep no_dead_strip | count 1 +; We should have a .no_dead_strip directive for Z but not for X/Y. + +@X = internal global i8 4 +@Y = internal global i32 123 +@Z = internal global i8 4 + +@llvm.used = appending global [1 x i8*] [ i8* @Z ], section "llvm.metadata" +@llvm.compiler_used = appending global [2 x i8*] [ i8* @X, i8* bitcast (i32* @Y to i8*)], section "llvm.metadata" diff --git a/test/CodeGen/X86/complex-fca.ll b/test/CodeGen/X86/complex-fca.ll index 05adb50b294f2..7e7acaa98a764 100644 --- a/test/CodeGen/X86/complex-fca.ll +++ b/test/CodeGen/X86/complex-fca.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2 +; RUN: llc < %s -march=x86 | grep mov | count 2 define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind { entry: diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll index 6e3156beb0f61..ca8cc1464c770 100644 --- a/test/CodeGen/X86/const-select.ll +++ b/test/CodeGen/X86/const-select.ll @@ -2,7 +2,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin7" -; RUN: llvm-as < %s | llc | grep {LCPI1_0(,%eax,4)} +; RUN: llc < %s | grep {LCPI1_0(,%eax,4)} define float @f(i32 %x) nounwind readnone { entry: %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] @@ -10,7 +10,7 @@ entry: ret float %iftmp.0.0 } -; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax} +; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax} define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly { entry: %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/constant-pool-remat-0.ll b/test/CodeGen/X86/constant-pool-remat-0.ll index 80be8545d59c8..05388f9b2a96e 100644 --- a/test/CodeGen/X86/constant-pool-remat-0.ll +++ b/test/CodeGen/X86/constant-pool-remat-0.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep LCPI | count 3 -; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep LCPI | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12 +; RUN: llc < %s -march=x86-64 | grep LCPI | count 3 +; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 6 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep LCPI | count 3 +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats -info-output-file - | grep asm-printer | grep 12 declare float @qux(float %y) diff --git a/test/CodeGen/X86/constpool.ll b/test/CodeGen/X86/constpool.ll index 60d51e56c3b40..2aac486323a84 100644 --- a/test/CodeGen/X86/constpool.ll +++ b/test/CodeGen/X86/constpool.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -; RUN: llvm-as < %s | llc -fast-isel -; RUN: llvm-as < %s | llc -march=x86-64 -; RUN: llvm-as < %s | llc -fast-isel -march=x86-64 +; RUN: llc < %s +; RUN: llc < %s -fast-isel +; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -fast-isel -march=x86-64 ; PR4466 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll index 579e30ceadd09..2b4b83259b82a 100644 --- a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll +++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -o %t -f -stats -info-output-file - | \ +; RUN: llc < %s -march=x86-64 -o %t -stats -info-output-file - | \ ; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5 ; RUN: grep {leal 1(\%rsi),} %t diff --git a/test/CodeGen/X86/copysign-zero.ll b/test/CodeGen/X86/copysign-zero.ll index a08fa6519d71b..47522d8080587 100644 --- a/test/CodeGen/X86/copysign-zero.ll +++ b/test/CodeGen/X86/copysign-zero.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc | not grep orpd -; RUN: llvm-as < %s | llc | grep andpd | count 1 +; RUN: llc < %s | not grep orpd +; RUN: llc < %s | grep andpd | count 1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll index 4539ef623de57..4fe554de75a02 100644 --- a/test/CodeGen/X86/critical-edge-split.ll +++ b/test/CodeGen/X86/critical-edge-split.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31 +; RUN: llc < %s -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31 %CC = type { %Register } %II = type { %"struct.XX::II::$_74" } diff --git a/test/CodeGen/X86/cstring.ll b/test/CodeGen/X86/cstring.ll index 27d6181db8bc7..5b5a7662ffff9 100644 --- a/test/CodeGen/X86/cstring.ll +++ b/test/CodeGen/X86/cstring.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep comm +; RUN: llc < %s -mtriple=i386-apple-darwin | not grep comm ; rdar://6479858 @str1 = internal constant [1 x i8] zeroinitializer diff --git a/test/CodeGen/X86/dag-rauw-cse.ll b/test/CodeGen/X86/dag-rauw-cse.ll index ba84711c03eb1..edcfeb78a4d0c 100644 --- a/test/CodeGen/X86/dag-rauw-cse.ll +++ b/test/CodeGen/X86/dag-rauw-cse.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {orl \$1} +; RUN: llc < %s -march=x86 | grep {orl \$1} ; PR3018 define i32 @test(i32 %A) nounwind { diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll index b96fdfc03c68d..c0ee2ac3386b1 100644 --- a/test/CodeGen/X86/dagcombine-buildvector.ll +++ b/test/CodeGen/X86/dagcombine-buildvector.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mcpu=penryn -disable-mmx -o %t ; RUN: grep unpcklpd %t | count 1 ; RUN: grep movapd %t | count 1 ; RUN: grep movaps %t | count 1 diff --git a/test/CodeGen/X86/dagcombine-cse.ll b/test/CodeGen/X86/dagcombine-cse.ll index a673ebf47de5d..c3c7990d19ebb 100644 --- a/test/CodeGen/X86/dagcombine-cse.ll +++ b/test/CodeGen/X86/dagcombine-cse.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats |& grep asm-printer | grep 14 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -stats |& grep asm-printer | grep 14 define i32 @t(i8* %ref_frame_ptr, i32 %ref_frame_stride, i32 %idxX, i32 %idxY) nounwind { entry: diff --git a/test/CodeGen/X86/darwin-bzero.ll b/test/CodeGen/X86/darwin-bzero.ll index c292140e108de..a3c1e6f0c5549 100644 --- a/test/CodeGen/X86/darwin-bzero.ll +++ b/test/CodeGen/X86/darwin-bzero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 | grep __bzero +; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep __bzero declare void @llvm.memset.i32(i8*, i8, i32, i32) diff --git a/test/CodeGen/X86/darwin-no-dead-strip.ll b/test/CodeGen/X86/darwin-no-dead-strip.ll index 63325b7a6ae0b..452d1f8ce3922 100644 --- a/test/CodeGen/X86/darwin-no-dead-strip.ll +++ b/test/CodeGen/X86/darwin-no-dead-strip.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep no_dead_strip +; RUN: llc < %s | grep no_dead_strip target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8.7.2" diff --git a/test/CodeGen/X86/darwin-quote.ll b/test/CodeGen/X86/darwin-quote.ll new file mode 100644 index 0000000000000..8fddc118f61ec --- /dev/null +++ b/test/CodeGen/X86/darwin-quote.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s + + +define internal i64 @baz() nounwind { + %tmp = load i64* @"+x" + ret i64 %tmp +; CHECK: _baz: +; CHECK: movl "L_+x$non_lazy_ptr", %ecx +} + + +@"+x" = external global i64 + +; CHECK: "L_+x$non_lazy_ptr": +; CHECK: .indirect_symbol "_+x" diff --git a/test/CodeGen/X86/darwin-stub.ll b/test/CodeGen/X86/darwin-stub.ll index 79eb31ac0fd47..b4d2e1aa566dd 100644 --- a/test/CodeGen/X86/darwin-stub.ll +++ b/test/CodeGen/X86/darwin-stub.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep stub -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | not grep stub +; RUN: llc < %s -mtriple=i386-apple-darwin | grep stub +; RUN: llc < %s -mtriple=i386-apple-darwin9 | not grep stub @"\01LC" = internal constant [13 x i8] c"Hello World!\00" ; <[13 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/div_const.ll b/test/CodeGen/X86/div_const.ll index aa690f7f48575..f0ada41338b27 100644 --- a/test/CodeGen/X86/div_const.ll +++ b/test/CodeGen/X86/div_const.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep 365384439 +; RUN: llc < %s -march=x86 | grep 365384439 define i32 @f9188_mul365384439_shift27(i32 %A) { %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/divrem.ll b/test/CodeGen/X86/divrem.ll index a611eddc7682e..e86b52fe82d59 100644 --- a/test/CodeGen/X86/divrem.ll +++ b/test/CodeGen/X86/divrem.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 8 +; RUN: llc < %s -march=x86-64 | grep div | count 8 define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) { %r = sdiv i64 %x, %y diff --git a/test/CodeGen/X86/dll-linkage.ll b/test/CodeGen/X86/dll-linkage.ll new file mode 100644 index 0000000000000..c634c7e1fd427 --- /dev/null +++ b/test/CodeGen/X86/dll-linkage.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s + +declare dllimport void @foo() + +define void @bar() nounwind { +; CHECK: call *__imp__foo + call void @foo() + ret void +} diff --git a/test/CodeGen/X86/dollar-name.ll b/test/CodeGen/X86/dollar-name.ll index 885700ef82a53..3b263194a5a8d 100644 --- a/test/CodeGen/X86/dollar-name.ll +++ b/test/CodeGen/X86/dollar-name.ll @@ -1,12 +1,13 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux | grep {(\$bar)} | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux | grep {(\$qux)} | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux | grep {(\$hen)} | count 1 +; RUN: llc < %s -march=x86 -mtriple=i386-linux | FileCheck %s ; PR1339 @"$bar" = global i32 zeroinitializer @"$qux" = external global i32 define i32 @"$foo"() nounwind { +; CHECK: movl ($bar), +; CHECK: addl ($qux), +; CHECK: call ($hen) %m = load i32* @"$bar" %n = load i32* @"$qux" %t = add i32 %m, %n diff --git a/test/CodeGen/X86/dyn-stackalloc.ll b/test/CodeGen/X86/dyn-stackalloc.ll index 049a32cea717a..1df092018dd83 100644 --- a/test/CodeGen/X86/dyn-stackalloc.ll +++ b/test/CodeGen/X86/dyn-stackalloc.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 | not egrep {\\\$4294967289|-7\\(} -; RUN: llvm-as < %s | llc -march=x86 | egrep {\\\$4294967280|-16\\(} -; RUN: llvm-as < %s | llc -march=x86-64 | grep {\\-16} +; RUN: llc < %s -march=x86 | not egrep {\\\$4294967289|-7} +; RUN: llc < %s -march=x86 | egrep {\\\$4294967280|-16} +; RUN: llc < %s -march=x86-64 | grep {\\-16} -define void @t() { +define void @t() nounwind { A: br label %entry diff --git a/test/CodeGen/X86/empty-struct-return-type.ll b/test/CodeGen/X86/empty-struct-return-type.ll new file mode 100644 index 0000000000000..34cd5d925052f --- /dev/null +++ b/test/CodeGen/X86/empty-struct-return-type.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86-64 | grep call +; PR4688 + +; Return types can be empty structs, which can be awkward. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @_ZN15QtSharedPointer22internalSafetyCheckAddEPVKv(i8* %ptr) { +entry: + %0 = call { } @_ZNK5QHashIPv15QHashDummyValueE5valueERKS0_(i8** undef) ; <{ }> [#uses=0] + ret void +} + +declare hidden { } @_ZNK5QHashIPv15QHashDummyValueE5valueERKS0_(i8** nocapture) nounwind diff --git a/test/CodeGen/X86/epilogue.ll b/test/CodeGen/X86/epilogue.ll index 5a378e19c49a8..52dcb61d87f8f 100644 --- a/test/CodeGen/X86/epilogue.ll +++ b/test/CodeGen/X86/epilogue.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep lea -; RUN: llvm-as < %s | llc -march=x86 | grep {movl %ebp} +; RUN: llc < %s -march=x86 | not grep lea +; RUN: llc < %s -march=x86 | grep {movl %ebp} declare void @bar(<2 x i64>* %n) diff --git a/test/CodeGen/X86/extend.ll b/test/CodeGen/X86/extend.ll index a54b6f112d88e..9553b1b578b15 100644 --- a/test/CodeGen/X86/extend.ll +++ b/test/CodeGen/X86/extend.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep movzx | count 1 -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep movsx | count 1 +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1 +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1 @G1 = internal global i8 0 ; <i8*> [#uses=1] @G2 = internal global i8 0 ; <i8*> [#uses=1] diff --git a/test/CodeGen/X86/extern_weak.ll b/test/CodeGen/X86/extern_weak.ll index 0cc56302b70fc..01e32aae08ca4 100644 --- a/test/CodeGen/X86/extern_weak.ll +++ b/test/CodeGen/X86/extern_weak.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin | grep weak_reference | count 2 +; RUN: llc < %s -mtriple=i686-apple-darwin | grep weak_reference | count 2 @Y = global i32 (i8*)* @X ; <i32 (i8*)**> [#uses=0] diff --git a/test/CodeGen/X86/extmul128.ll b/test/CodeGen/X86/extmul128.ll index df487659edb52..9b598299e5360 100644 --- a/test/CodeGen/X86/extmul128.ll +++ b/test/CodeGen/X86/extmul128.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mul | count 2 +; RUN: llc < %s -march=x86-64 | grep mul | count 2 define i128 @i64_sext_i128(i64 %a, i64 %b) { %aa = sext i64 %a to i128 diff --git a/test/CodeGen/X86/extmul64.ll b/test/CodeGen/X86/extmul64.ll index 635da48133b63..9e20ded1111f4 100644 --- a/test/CodeGen/X86/extmul64.ll +++ b/test/CodeGen/X86/extmul64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 2 +; RUN: llc < %s -march=x86 | grep mul | count 2 define i64 @i32_sext_i64(i32 %a, i32 %b) { %aa = sext i32 %a to i64 diff --git a/test/CodeGen/X86/extract-combine.ll b/test/CodeGen/X86/extract-combine.ll index 842ec24e0ec86..2040e872f7fe3 100644 --- a/test/CodeGen/X86/extract-combine.ll +++ b/test/CodeGen/X86/extract-combine.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=core2 -o %t -f +; RUN: llc < %s -march=x86-64 -mcpu=core2 -o %t ; RUN: not grep unpcklps %t define i32 @foo() nounwind { diff --git a/test/CodeGen/X86/extract-extract.ll b/test/CodeGen/X86/extract-extract.ll new file mode 100644 index 0000000000000..ad79ab9ae20ff --- /dev/null +++ b/test/CodeGen/X86/extract-extract.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -march=x86 >/dev/null +; PR4699 + +; Handle this extractvalue-of-extractvalue case without getting in +; trouble with CSE in DAGCombine. + + %cc = type { %crd } + %cr = type { i32 } + %crd = type { i64, %cr* } + %pp = type { %cc } + +define fastcc void @foo(%pp* nocapture byval %p_arg) { +entry: + %tmp2 = getelementptr %pp* %p_arg, i64 0, i32 0 ; <%cc*> [#uses= + %tmp3 = load %cc* %tmp2 ; <%cc> [#uses=1] + %tmp34 = extractvalue %cc %tmp3, 0 ; <%crd> [#uses=1] + %tmp345 = extractvalue %crd %tmp34, 0 ; <i64> [#uses=1] + %.ptr.i = load %cr** undef ; <%cr*> [#uses=0] + %tmp15.i = shl i64 %tmp345, 3 ; <i64> [#uses=0] + store %cr* undef, %cr** undef + ret void +} + + diff --git a/test/CodeGen/X86/extractelement-from-arg.ll b/test/CodeGen/X86/extractelement-from-arg.ll index 44704b6adb396..4ea37f0c46d3e 100644 --- a/test/CodeGen/X86/extractelement-from-arg.ll +++ b/test/CodeGen/X86/extractelement-from-arg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc -march=x86-64 -mattr=+sse2 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 define void @test(float* %R, <4 x float> %X) nounwind { %tmp = extractelement <4 x float> %X, i32 3 diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll index 601690ef7cabb..ee57d9b762952 100644 --- a/test/CodeGen/X86/extractelement-load.ll +++ b/test/CodeGen/X86/extractelement-load.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as %s -o - | llc -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd -; RUN: llvm-as %s -o - | llc -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd +; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd define i32 @t(<2 x i64>* %val) nounwind { %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/extractelement-shuffle.ll b/test/CodeGen/X86/extractelement-shuffle.ll index b00c8e49e1c85..12a2ef30e17ed 100644 --- a/test/CodeGen/X86/extractelement-shuffle.ll +++ b/test/CodeGen/X86/extractelement-shuffle.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; Examples that exhibits a bug in DAGCombine. The case is triggered by the ; following program. The bug is DAGCombine assumes that the bit convert diff --git a/test/CodeGen/X86/extractps.ll b/test/CodeGen/X86/extractps.ll index 484d2c4e5e100..14778f097ef53 100644 --- a/test/CodeGen/X86/extractps.ll +++ b/test/CodeGen/X86/extractps.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn > %t +; RUN: llc < %s -march=x86 -mcpu=penryn > %t ; RUN: not grep movd %t ; RUN: grep {movss %xmm} %t | count 1 ; RUN: grep {extractps \\\$1, %xmm0, } %t | count 1 diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll index 7ac8e048edbc4..54947c394b5e8 100644 --- a/test/CodeGen/X86/fabs.ll +++ b/test/CodeGen/X86/fabs.ll @@ -1,8 +1,7 @@ ; Make sure this testcase codegens to the fabs instruction, not a call to fabsf -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \ +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \ ; RUN: count 2 -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep fabs\$ | count 3 declare float @fabsf(float) diff --git a/test/CodeGen/X86/fast-cc-callee-pops.ll b/test/CodeGen/X86/fast-cc-callee-pops.ll index 941f7087f6241..5e88ed7f00d6f 100644 --- a/test/CodeGen/X86/fast-cc-callee-pops.ll +++ b/test/CodeGen/X86/fast-cc-callee-pops.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} ; Check that a fastcc function pops its stack variables before returning. diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll index 3f3aa468675b3..e15182120094b 100644 --- a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {add ESP, 8} target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll index c8621a7780bd8..fe96c0c8be2a1 100644 --- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll +++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {mov EDX, 1} ; check that fastcc is passing stuff in regs. diff --git a/test/CodeGen/X86/fast-isel-bail.ll b/test/CodeGen/X86/fast-isel-bail.ll index fb4f37ef90be9..9072c5c7b5937 100644 --- a/test/CodeGen/X86/fast-isel-bail.ll +++ b/test/CodeGen/X86/fast-isel-bail.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -O0 +; RUN: llc < %s -march=x86 -O0 ; This file is for regression tests for cases where FastISel needs ; to gracefully bail out and let SelectionDAGISel take over. diff --git a/test/CodeGen/X86/fast-isel-bc.ll b/test/CodeGen/X86/fast-isel-bc.ll new file mode 100644 index 0000000000000..f2696ce814da1 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-bc.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -O0 -march=x86-64 -mattr=+mmx | FileCheck %s +; PR4684 + +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin9.8" + +declare void @func2(<1 x i64>) + +define void @func1() nounwind { + +; This isn't spectacular, but it's MMX code at -O0... +; CHECK: movl $2, %eax +; CHECK: movd %rax, %mm0 +; CHECK: movd %mm0, %rdi + + call void @func2(<1 x i64> <i64 2>) + ret void +} diff --git a/test/CodeGen/X86/fast-isel-call.ll b/test/CodeGen/X86/fast-isel-call.ll index 9945746807cfa..5fcdbbbe53b25 100644 --- a/test/CodeGen/X86/fast-isel-call.ll +++ b/test/CodeGen/X86/fast-isel-call.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel -march=x86 | grep and +; RUN: llc < %s -fast-isel -march=x86 | grep and define i32 @t() nounwind { tak: diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll index ac2595a7461d7..84d10f32c294c 100644 --- a/test/CodeGen/X86/fast-isel-constpool.ll +++ b/test/CodeGen/X86/fast-isel-constpool.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)} +; RUN: llc < %s -fast-isel | grep {LCPI1_0(%rip)} ; Make sure fast isel uses rip-relative addressing when required. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.0" diff --git a/test/CodeGen/X86/fast-isel-fneg.ll b/test/CodeGen/X86/fast-isel-fneg.ll new file mode 100644 index 0000000000000..5ffd48bce6553 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-fneg.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86-64 | FileCheck %s +; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | grep xor | count 2 + +; CHECK: doo: +; CHECK: xor +define double @doo(double %x) nounwind { + %y = fsub double -0.0, %x + ret double %y +} + +; CHECK: foo: +; CHECK: xor +define float @foo(float %x) nounwind { + %y = fsub float -0.0, %x + ret float %y +} diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll new file mode 100644 index 0000000000000..5b8acecc3c18c --- /dev/null +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -0,0 +1,53 @@ +; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32 + +; GEP indices are interpreted as signed integers, so they +; should be sign-extended to 64 bits on 64-bit targets. +; PR3181 +define i32 @test1(i32 %t3, i32* %t1) nounwind { + %t9 = getelementptr i32* %t1, i32 %t3 ; <i32*> [#uses=1] + %t15 = load i32* %t9 ; <i32> [#uses=1] + ret i32 %t15 +; X32: test1: +; X32: movl (%ecx,%eax,4), %eax +; X32: ret + +; X64: test1: +; X64: movslq %edi, %rax +; X64: movl (%rsi,%rax,4), %eax +; X64: ret + +} +define i32 @test2(i64 %t3, i32* %t1) nounwind { + %t9 = getelementptr i32* %t1, i64 %t3 ; <i32*> [#uses=1] + %t15 = load i32* %t9 ; <i32> [#uses=1] + ret i32 %t15 +; X32: test2: +; X32: movl (%eax,%ecx,4), %eax +; X32: ret + +; X64: test2: +; X64: movl (%rsi,%rdi,4), %eax +; X64: ret +} + + + +; PR4984 +define i8 @test3(i8* %start) nounwind { +entry: + %A = getelementptr i8* %start, i64 -2 ; <i8*> [#uses=1] + %B = load i8* %A, align 1 ; <i8> [#uses=1] + ret i8 %B + + +; X32: test3: +; X32: movl 4(%esp), %eax +; X32: movb -2(%eax), %al +; X32: ret + +; X64: test3: +; X64: movb -2(%rdi), %al +; X64: ret + +} diff --git a/test/CodeGen/X86/fast-isel-gv.ll b/test/CodeGen/X86/fast-isel-gv.ll index b2f885095eceb..34f8b382522fc 100644 --- a/test/CodeGen/X86/fast-isel-gv.ll +++ b/test/CodeGen/X86/fast-isel-gv.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel | grep {_kill@GOTPCREL(%rip)} +; RUN: llc < %s -fast-isel | grep {_kill@GOTPCREL(%rip)} target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin10.0" @f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1] diff --git a/test/CodeGen/X86/fast-isel-i1.ll b/test/CodeGen/X86/fast-isel-i1.ll index e1ff7921a11a8..d0665783ce646 100644 --- a/test/CodeGen/X86/fast-isel-i1.ll +++ b/test/CodeGen/X86/fast-isel-i1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -fast-isel | grep {andb \$1, %} +; RUN: llc < %s -march=x86 -fast-isel | grep {andb \$1, %} declare i64 @bar(i64) diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll index dfee4f2a11ea1..35ec1e7115b24 100644 --- a/test/CodeGen/X86/fast-isel-mem.ll +++ b/test/CodeGen/X86/fast-isel-mem.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin | \ +; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | \ ; RUN: grep lazy_ptr, | count 2 -; RUN: llvm-as < %s | llc -fast-isel -march=x86 -relocation-model=static | \ +; RUN: llc < %s -fast-isel -march=x86 -relocation-model=static | \ ; RUN: grep lea @src = external global i32 diff --git a/test/CodeGen/X86/fast-isel-phys.ll b/test/CodeGen/X86/fast-isel-phys.ll index 91dcca57cc2b7..158ef551ce42d 100644 --- a/test/CodeGen/X86/fast-isel-phys.ll +++ b/test/CodeGen/X86/fast-isel-phys.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86 +; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86 define i8 @t2(i8 %a, i8 %c) nounwind { %tmp = shl i8 %a, %c diff --git a/test/CodeGen/X86/fast-isel-shift-imm.ll b/test/CodeGen/X86/fast-isel-shift-imm.ll index 7d8c9f5e002c5..35f7a72a285c0 100644 --- a/test/CodeGen/X86/fast-isel-shift-imm.ll +++ b/test/CodeGen/X86/fast-isel-shift-imm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -O0 | grep {sarl \$80, %eax} +; RUN: llc < %s -march=x86 -O0 | grep {sarl \$80, %eax} ; PR3242 define i32 @foo(i32 %x) nounwind { diff --git a/test/CodeGen/X86/fast-isel-tailcall.ll b/test/CodeGen/X86/fast-isel-tailcall.ll index 6f4d2026814f9..c3e527c4e5b48 100644 --- a/test/CodeGen/X86/fast-isel-tailcall.ll +++ b/test/CodeGen/X86/fast-isel-tailcall.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel -tailcallopt -march=x86 | not grep add +; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add ; PR4154 ; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust diff --git a/test/CodeGen/X86/fast-isel-tls.ll b/test/CodeGen/X86/fast-isel-tls.ll index 4dd14e6b21631..a5e6642e09c13 100644 --- a/test/CodeGen/X86/fast-isel-tls.ll +++ b/test/CodeGen/X86/fast-isel-tls.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr +; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | grep __tls_get_addr ; PR3654 @v = thread_local global i32 0 diff --git a/test/CodeGen/X86/fast-isel-trunc.ll b/test/CodeGen/X86/fast-isel-trunc.ll index 039f114737bb1..69b26c5442e4d 100644 --- a/test/CodeGen/X86/fast-isel-trunc.ll +++ b/test/CodeGen/X86/fast-isel-trunc.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -fast-isel -fast-isel-abort -; RUN: llvm-as < %s | llc -march=x86-64 -fast-isel -fast-isel-abort +; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort +; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort define i8 @t1(i32 %x) signext nounwind { %tmp1 = trunc i32 %x to i8 diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll index a9a016b7d0f34..3dcd736a14047 100644 --- a/test/CodeGen/X86/fast-isel.ll +++ b/test/CodeGen/X86/fast-isel.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86 -mattr=sse2 +; RUN: llc < %s -fast-isel -fast-isel-abort -march=x86 -mattr=sse2 ; This tests very minimal fast-isel functionality. @@ -64,3 +64,12 @@ define i8* @inttoptr_i32(i32 %p) nounwind { %t = inttoptr i32 %p to i8* ret i8* %t } + +define void @store_i1(i1* %p, i1 %t) nounwind { + store i1 %t, i1* %p + ret void +} +define i1 @load_i1(i1* %p) nounwind { + %t = load i1* %p + ret i1 %t +} diff --git a/test/CodeGen/X86/fastcall-correct-mangling.ll b/test/CodeGen/X86/fastcall-correct-mangling.ll index d2db2795512d1..2b48f5f371d9d 100644 --- a/test/CodeGen/X86/fastcall-correct-mangling.ll +++ b/test/CodeGen/X86/fastcall-correct-mangling.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=mingw32 | \ +; RUN: llc < %s -mtriple=i386-unknown-mingw32 | \ ; RUN: grep {@12} ; Check that a fastcall function gets correct mangling diff --git a/test/CodeGen/X86/fastcc-2.ll b/test/CodeGen/X86/fastcc-2.ll index 40c753ee3041a..d044a2ad9e840 100644 --- a/test/CodeGen/X86/fastcc-2.ll +++ b/test/CodeGen/X86/fastcc-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1 +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1 define i32 @foo() nounwind { entry: diff --git a/test/CodeGen/X86/fastcc-byval.ll b/test/CodeGen/X86/fastcc-byval.ll index 94da50584c7b6..52b3e57b96bc5 100644 --- a/test/CodeGen/X86/fastcc-byval.ll +++ b/test/CodeGen/X86/fastcc-byval.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2 +; RUN: llc < %s -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2 ; PR3122 ; rdar://6400815 diff --git a/test/CodeGen/X86/fastcc-sret.ll b/test/CodeGen/X86/fastcc-sret.ll index 7fc111bbc2997..d45741884c7db 100644 --- a/test/CodeGen/X86/fastcc-sret.ll +++ b/test/CodeGen/X86/fastcc-sret.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt=false | grep ret | not grep 4 +; RUN: llc < %s -march=x86 -tailcallopt=false | grep ret | not grep 4 %struct.foo = type { [4 x i32] } diff --git a/test/CodeGen/X86/fastcc.ll b/test/CodeGen/X86/fastcc.ll index f18f34deb1907..d538264c6d7c0 100644 --- a/test/CodeGen/X86/fastcc.ll +++ b/test/CodeGen/X86/fastcc.ll @@ -1,5 +1,6 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep ecx | grep 0 -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | grep xmm0 | grep 8 +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s +; CHECK: movsd %xmm0, 8(%esp) +; CHECK: xorl %ecx, %ecx @d = external global double ; <double*> [#uses=1] @c = external global double ; <double*> [#uses=1] diff --git a/test/CodeGen/X86/field-extract-use-trunc.ll b/test/CodeGen/X86/field-extract-use-trunc.ll index c4f9587335e79..60205305a977f 100644 --- a/test/CodeGen/X86/field-extract-use-trunc.ll +++ b/test/CodeGen/X86/field-extract-use-trunc.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep sar | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | not grep sar +; RUN: llc < %s -march=x86 | grep sar | count 1 +; RUN: llc < %s -march=x86-64 | not grep sar define i32 @test(i32 %f12) { %tmp7.25 = lshr i32 %f12, 16 diff --git a/test/CodeGen/X86/fildll.ll b/test/CodeGen/X86/fildll.ll index 65944fdaee4ce..c5a3765c717b6 100644 --- a/test/CodeGen/X86/fildll.ll +++ b/test/CodeGen/X86/fildll.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2 +; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2 define fastcc double @sint64_to_fp(i64 %X) { %R = sitofp i64 %X to double ; <double> [#uses=1] diff --git a/test/CodeGen/X86/fmul-zero.ll b/test/CodeGen/X86/fmul-zero.ll index 73aa713de52ef..03bad6594128b 100644 --- a/test/CodeGen/X86/fmul-zero.ll +++ b/test/CodeGen/X86/fmul-zero.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -enable-unsafe-fp-math | not grep mulps -; RUN: llvm-as < %s | llc -march=x86-64 | grep mulps +; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps +; RUN: llc < %s -march=x86-64 | grep mulps define void @test14(<4 x float>*) nounwind { load <4 x float>* %0, align 1 diff --git a/test/CodeGen/X86/fold-add.ll b/test/CodeGen/X86/fold-add.ll index 2828ad22efbd2..5e80ea5478909 100644 --- a/test/CodeGen/X86/fold-add.ll +++ b/test/CodeGen/X86/fold-add.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)} +; RUN: llc < %s -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)} target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.6" diff --git a/test/CodeGen/X86/fold-and-shift.ll b/test/CodeGen/X86/fold-and-shift.ll index 705b795496446..9f79f7723b33d 100644 --- a/test/CodeGen/X86/fold-and-shift.ll +++ b/test/CodeGen/X86/fold-and-shift.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and +; RUN: llc < %s -march=x86 | not grep and define i32 @t1(i8* %X, i32 %i) { entry: diff --git a/test/CodeGen/X86/fold-call-2.ll b/test/CodeGen/X86/fold-call-2.ll index 349f986830a05..7a2b03833ae9c 100644 --- a/test/CodeGen/X86/fold-call-2.ll +++ b/test/CodeGen/X86/fold-call-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin | grep mov | count 1 @f = external global void ()* ; <void ()**> [#uses=1] diff --git a/test/CodeGen/X86/fold-call-3.ll b/test/CodeGen/X86/fold-call-3.ll index 824ae003da25f..337a7edb17360 100644 --- a/test/CodeGen/X86/fold-call-3.ll +++ b/test/CodeGen/X86/fold-call-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep call | grep 560 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep call | grep 560 ; rdar://6522427 %"struct.clang::Action" = type { %"struct.clang::ActionBase" } diff --git a/test/CodeGen/X86/fold-call.ll b/test/CodeGen/X86/fold-call.ll index 53991717c6746..603e9ad66caaf 100644 --- a/test/CodeGen/X86/fold-call.ll +++ b/test/CodeGen/X86/fold-call.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep mov -; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov +; RUN: llc < %s -march=x86 | not grep mov +; RUN: llc < %s -march=x86-64 | not grep mov declare void @bar() diff --git a/test/CodeGen/X86/fold-imm.ll b/test/CodeGen/X86/fold-imm.ll index 1623f31d74024..f1fcbcfd13b45 100644 --- a/test/CodeGen/X86/fold-imm.ll +++ b/test/CodeGen/X86/fold-imm.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep inc -; RUN: llvm-as < %s | llc -march=x86 | grep add | grep 4 +; RUN: llc < %s -march=x86 | grep inc +; RUN: llc < %s -march=x86 | grep add | grep 4 define i32 @test(i32 %X) nounwind { entry: diff --git a/test/CodeGen/X86/fold-load.ll b/test/CodeGen/X86/fold-load.ll index 6e3da5c5ee827..eb182da10129e 100644 --- a/test/CodeGen/X86/fold-load.ll +++ b/test/CodeGen/X86/fold-load.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 } @stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1] diff --git a/test/CodeGen/X86/fold-mul-lohi.ll b/test/CodeGen/X86/fold-mul-lohi.ll index 312427af7096e..0351ecab117b2 100644 --- a/test/CodeGen/X86/fold-mul-lohi.ll +++ b/test/CodeGen/X86/fold-mul-lohi.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep lea -; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea +; RUN: llc < %s -march=x86 | not grep lea +; RUN: llc < %s -march=x86-64 | not grep lea @B = external global [1000 x i8], align 32 @A = external global [1000 x i8], align 32 diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll index f558aca420059..ef5202f554c59 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-0.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI1_2 | count 2 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI1_2 | count 2 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1 ; This testcase shouldn't need to spill the -1 value, ; so it should just use pcmpeqd to materialize an all-ones vector. diff --git a/test/CodeGen/X86/fold-pcmpeqd-1.ll b/test/CodeGen/X86/fold-pcmpeqd-1.ll index e2141ebf68515..cc4198d7caf00 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-1.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: grep pcmpeqd %t | count 1 ; RUN: grep xor %t | count 1 ; RUN: not grep LCP %t diff --git a/test/CodeGen/X86/fold-pcmpeqd-2.ll b/test/CodeGen/X86/fold-pcmpeqd-2.ll index 2b75781218bcf..49f879504e063 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-2.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1 ; This testcase should need to spill the -1 value on x86-32, ; so it shouldn't use pcmpeqd to materialize an all-ones vector; it diff --git a/test/CodeGen/X86/fold-sext-trunc.ll b/test/CodeGen/X86/fold-sext-trunc.ll index 1016b1081aaeb..2605123d6dd49 100644 --- a/test/CodeGen/X86/fold-sext-trunc.ll +++ b/test/CodeGen/X86/fold-sext-trunc.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movslq | count 1 +; RUN: llc < %s -march=x86-64 | grep movslq | count 1 ; PR4050 type { i64 } ; type %0 diff --git a/test/CodeGen/X86/fp-immediate-shorten.ll b/test/CodeGen/X86/fp-immediate-shorten.ll index 32ba2171450be..cafc61a41ff29 100644 --- a/test/CodeGen/X86/fp-immediate-shorten.ll +++ b/test/CodeGen/X86/fp-immediate-shorten.ll @@ -1,6 +1,6 @@ ;; Test that this FP immediate is stored in the constant pool as a float. -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3 | \ +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | \ ; RUN: grep {.long.1123418112} define double @D() { diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll index 15606c34886b9..08ea77d75f26c 100644 --- a/test/CodeGen/X86/fp-in-intregs.ll +++ b/test/CodeGen/X86/fp-in-intregs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)} +; RUN: llc < %s -march=x86 -mcpu=yonah | not egrep {\(\(xor\|and\)ps\|movd\)} ; These operations should be done in integer registers, eliminating constant ; pool loads, movd's etc. diff --git a/test/CodeGen/X86/fp-stack-2results.ll b/test/CodeGen/X86/fp-stack-2results.ll index f47fd7472ecb4..321e267cb2fa0 100644 --- a/test/CodeGen/X86/fp-stack-2results.ll +++ b/test/CodeGen/X86/fp-stack-2results.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep fldz -; RUN: llvm-as < %s | llc -march=x86-64 | grep fld1 +; RUN: llc < %s -march=x86 | grep fldz +; RUN: llc < %s -march=x86-64 | grep fld1 ; This is basically this code on x86-64: ; _Complex long double test() { return 1.0; } diff --git a/test/CodeGen/X86/fp-stack-O0-crash.ll b/test/CodeGen/X86/fp-stack-O0-crash.ll new file mode 100644 index 0000000000000..4768ea2019d17 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-O0-crash.ll @@ -0,0 +1,30 @@ +; RUN: llc %s -O0 -fast-isel -regalloc=local -o - +; PR4767 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin10" + +define void @fn(x86_fp80 %x) nounwind ssp { +entry: + %x.addr = alloca x86_fp80 ; <x86_fp80*> [#uses=5] + store x86_fp80 %x, x86_fp80* %x.addr + br i1 false, label %cond.true, label %cond.false + +cond.true: ; preds = %entry + %tmp = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1] + %tmp1 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1] + %cmp = fcmp oeq x86_fp80 %tmp, %tmp1 ; <i1> [#uses=1] + br i1 %cmp, label %if.then, label %if.end + +cond.false: ; preds = %entry + %tmp2 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1] + %tmp3 = load x86_fp80* %x.addr ; <x86_fp80> [#uses=1] + %cmp4 = fcmp une x86_fp80 %tmp2, %tmp3 ; <i1> [#uses=1] + br i1 %cmp4, label %if.then, label %if.end + +if.then: ; preds = %cond.false, %cond.true + br label %if.end + +if.end: ; preds = %if.then, %cond.false, %cond.true + ret void +} diff --git a/test/CodeGen/X86/fp-stack-compare.ll b/test/CodeGen/X86/fp-stack-compare.ll index 4e61d0fbe7dcb..4bdf4590b07c5 100644 --- a/test/CodeGen/X86/fp-stack-compare.ll +++ b/test/CodeGen/X86/fp-stack-compare.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 | \ +; RUN: llc < %s -march=x86 -mcpu=i386 | \ ; RUN: grep {fucomi.*st.\[12\]} ; PR1012 diff --git a/test/CodeGen/X86/fp-stack-direct-ret.ll b/test/CodeGen/X86/fp-stack-direct-ret.ll index 78be2a39defb1..5a28bb50a3435 100644 --- a/test/CodeGen/X86/fp-stack-direct-ret.ll +++ b/test/CodeGen/X86/fp-stack-direct-ret.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep fstp -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep movsd +; RUN: llc < %s -march=x86 | not grep fstp +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movsd declare double @foo() diff --git a/test/CodeGen/X86/fp-stack-ret-conv.ll b/test/CodeGen/X86/fp-stack-ret-conv.ll index 5254e1c89f612..f220b24f90b07 100644 --- a/test/CodeGen/X86/fp-stack-ret-conv.ll +++ b/test/CodeGen/X86/fp-stack-ret-conv.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah | grep cvtss2sd -; RUN: llvm-as < %s | llc -mcpu=yonah | grep fstps -; RUN: llvm-as < %s | llc -mcpu=yonah | not grep cvtsd2ss +; RUN: llc < %s -mcpu=yonah | grep cvtss2sd +; RUN: llc < %s -mcpu=yonah | grep fstps +; RUN: llc < %s -mcpu=yonah | not grep cvtsd2ss target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/fp-stack-ret-store.ll b/test/CodeGen/X86/fp-stack-ret-store.ll index 56392deb300d2..05dfc545db17b 100644 --- a/test/CodeGen/X86/fp-stack-ret-store.ll +++ b/test/CodeGen/X86/fp-stack-ret-store.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah | not grep movss +; RUN: llc < %s -mcpu=yonah | not grep movss target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/fp-stack-ret.ll b/test/CodeGen/X86/fp-stack-ret.ll index 3e6ad54e73b3d..c83a0cbf69e0c 100644 --- a/test/CodeGen/X86/fp-stack-ret.ll +++ b/test/CodeGen/X86/fp-stack-ret.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t +; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t ; RUN: grep fldl %t | count 1 ; RUN: not grep xmm %t ; RUN: grep {sub.*esp} %t | count 1 diff --git a/test/CodeGen/X86/fp-stack-retcopy.ll b/test/CodeGen/X86/fp-stack-retcopy.ll index 997f8df20fea6..67dcb1871df49 100644 --- a/test/CodeGen/X86/fp-stack-retcopy.ll +++ b/test/CodeGen/X86/fp-stack-retcopy.ll @@ -1,5 +1,5 @@ ; This should not copy the result of foo into an xmm register. -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm ; rdar://5689903 declare double @foo() diff --git a/test/CodeGen/X86/fp-stack-set-st1.ll b/test/CodeGen/X86/fp-stack-set-st1.ll index 00a73aeb416f9..894897a2a5f0f 100644 --- a/test/CodeGen/X86/fp-stack-set-st1.ll +++ b/test/CodeGen/X86/fp-stack-set-st1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep fxch | count 2 +; RUN: llc < %s -march=x86 | grep fxch | count 2 define i32 @main() nounwind { entry: diff --git a/test/CodeGen/X86/fp2sint.ll b/test/CodeGen/X86/fp2sint.ll index 80f7efbe4dec0..1675444887138 100644 --- a/test/CodeGen/X86/fp2sint.ll +++ b/test/CodeGen/X86/fp2sint.ll @@ -1,6 +1,6 @@ ;; LowerFP_TO_SINT should not create a stack object if it's not needed. -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep add +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep add define i32 @main(i32 %argc, i8** %argv) { cond_false.i.i.i: ; preds = %bb.i5 diff --git a/test/CodeGen/X86/fp_constant_op.ll b/test/CodeGen/X86/fp_constant_op.ll index f2017b961fb57..8e823ede56a03 100644 --- a/test/CodeGen/X86/fp_constant_op.ll +++ b/test/CodeGen/X86/fp_constant_op.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | \ ; RUN: grep {fadd\\|fsub\\|fdiv\\|fmul} | not grep -i ST ; Test that the load of the constant is folded into the operation. diff --git a/test/CodeGen/X86/fp_load_cast_fold.ll b/test/CodeGen/X86/fp_load_cast_fold.ll index 54523265e91e9..a160ac6944292 100644 --- a/test/CodeGen/X86/fp_load_cast_fold.ll +++ b/test/CodeGen/X86/fp_load_cast_fold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep fild | not grep ESP +; RUN: llc < %s -march=x86 | grep fild | not grep ESP define double @short(i16* %P) { %V = load i16* %P ; <i16> [#uses=1] diff --git a/test/CodeGen/X86/fp_load_fold.ll b/test/CodeGen/X86/fp_load_fold.ll index 655ad3df32386..0145069b8cd63 100644 --- a/test/CodeGen/X86/fp_load_fold.ll +++ b/test/CodeGen/X86/fp_load_fold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep -i ST | not grep {fadd\\|fsub\\|fdiv\\|fmul} ; Test that the load of the memory location is folded into the operation. diff --git a/test/CodeGen/X86/fsxor-alignment.ll b/test/CodeGen/X86/fsxor-alignment.ll index 4d25fca1eb11b..6a8dbcfaa7c3b 100644 --- a/test/CodeGen/X86/fsxor-alignment.ll +++ b/test/CodeGen/X86/fsxor-alignment.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \ ; RUN: grep -v sp | grep xorps | count 2 ; Don't fold the incoming stack arguments into the xorps instructions used diff --git a/test/CodeGen/X86/full-lsr.ll b/test/CodeGen/X86/full-lsr.ll index 4a85779ebf0a7..68575bc401d75 100644 --- a/test/CodeGen/X86/full-lsr.ll +++ b/test/CodeGen/X86/full-lsr.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -enable-full-lsr >%t +; RUN: llc < %s -march=x86 -enable-full-lsr >%t ; RUN: grep {addl \\\$4,} %t | count 3 ; RUN: not grep {,%} %t diff --git a/test/CodeGen/X86/ga-offset.ll b/test/CodeGen/X86/ga-offset.ll index aaa2f84b88c94..9f6d3f75cf843 100644 --- a/test/CodeGen/X86/ga-offset.ll +++ b/test/CodeGen/X86/ga-offset.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: not grep lea %t ; RUN: not grep add %t ; RUN: grep mov %t | count 1 -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static > %t +; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static > %t ; RUN: not grep lea %t ; RUN: not grep add %t ; RUN: grep mov %t | count 1 diff --git a/test/CodeGen/X86/global-sections-tls.ll b/test/CodeGen/X86/global-sections-tls.ll new file mode 100644 index 0000000000000..2c2303042bc45 --- /dev/null +++ b/test/CodeGen/X86/global-sections-tls.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX + +; PR4639 +@G1 = internal thread_local global i32 0 ; <i32*> [#uses=1] +; LINUX: .section .tbss,"awT",@nobits +; LINUX: G1: + + +define i32* @foo() nounwind readnone { +entry: + ret i32* @G1 +} + + diff --git a/test/CodeGen/X86/global-sections.ll b/test/CodeGen/X86/global-sections.ll new file mode 100644 index 0000000000000..38948a7dc9124 --- /dev/null +++ b/test/CodeGen/X86/global-sections.ll @@ -0,0 +1,123 @@ +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN + + +; int G1; +@G1 = common global i32 0 + +; LINUX: .type G1,@object +; LINUX: .section .gnu.linkonce.b.G1,"aw",@nobits +; LINUX: .comm G1,4,4 + +; DARWIN: .comm _G1,4,2 + + + + +; const int G2 __attribute__((weak)) = 42; +@G2 = weak_odr constant i32 42 + + +; TODO: linux drops this into .rodata, we drop it into ".gnu.linkonce.r.G2" + +; DARWIN: .section __TEXT,__const_coal,coalesced +; DARWIN: _G2: +; DARWIN: .long 42 + + +; int * const G3 = &G1; +@G3 = constant i32* @G1 + +; DARWIN: .section __DATA,__const +; DARWIN: .globl _G3 +; DARWIN: _G3: +; DARWIN: .long _G1 + + +; _Complex long long const G4 = 34; +@G4 = constant {i64,i64} { i64 34, i64 0 } + +; DARWIN: .section __TEXT,__const +; DARWIN: _G4: +; DARWIN: .long 34 + + +; int G5 = 47; +@G5 = global i32 47 + +; LINUX: .data +; LINUX: .globl G5 +; LINUX: G5: +; LINUX: .long 47 + +; DARWIN: .section __DATA,__data +; DARWIN: .globl _G5 +; DARWIN: _G5: +; DARWIN: .long 47 + + +; PR4584 +@"foo bar" = linkonce global i32 42 + +; LINUX: .type foo_20_bar,@object +; LINUX:.section .gnu.linkonce.d.foo_20_bar,"aw",@progbits +; LINUX: .weak foo_20_bar +; LINUX: foo_20_bar: + +; DARWIN: .section __DATA,__datacoal_nt,coalesced +; DARWIN: .globl "_foo bar" +; DARWIN: .weak_definition "_foo bar" +; DARWIN: "_foo bar": + +; PR4650 +@G6 = weak_odr constant [1 x i8] c"\01" + +; LINUX: .type G6,@object +; LINUX: .section .gnu.linkonce.r.G6,"a",@progbits +; LINUX: .weak G6 +; LINUX: G6: +; LINUX: .ascii "\001" +; LINUX: .size G6, 1 + +; DARWIN: .section __TEXT,__const_coal,coalesced +; DARWIN: .globl _G6 +; DARWIN: .weak_definition _G6 +; DARWIN:_G6: +; DARWIN: .ascii "\001" + + +@G7 = constant [10 x i8] c"abcdefghi\00" + +; DARWIN: __TEXT,__cstring,cstring_literals +; DARWIN: .globl _G7 +; DARWIN: _G7: +; DARWIN: .asciz "abcdefghi" + +; LINUX: .section .rodata.str1.1,"aMS",@progbits,1 +; LINUX: .globl G7 +; LINUX: G7: +; LINUX: .asciz "abcdefghi" + + +@G8 = constant [4 x i16] [ i16 1, i16 2, i16 3, i16 0 ] + +; DARWIN: .section __TEXT,__ustring +; DARWIN: .globl _G8 +; DARWIN: _G8: + +; LINUX: .section .rodata.str2.2,"aMS",@progbits,2 +; LINUX: .globl G8 +; LINUX:G8: + +@G9 = constant [4 x i32] [ i32 1, i32 2, i32 3, i32 0 ] + +; DARWIN: .section __TEXT,__const +; DARWIN: .globl _G9 +; DARWIN: _G9: + +; LINUX: .section .rodata.str4.4,"aMS",@progbits,4 +; LINUX: .globl G9 +; LINUX:G9 + + + diff --git a/test/CodeGen/X86/h-register-addressing-32.ll b/test/CodeGen/X86/h-register-addressing-32.ll index 41d91285ddbe1..76ffd66524b94 100644 --- a/test/CodeGen/X86/h-register-addressing-32.ll +++ b/test/CodeGen/X86/h-register-addressing-32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl %\[abcd\]h,} | count 7 +; RUN: llc < %s -march=x86 | grep {movzbl %\[abcd\]h,} | count 7 ; Use h-register extract and zero-extend. diff --git a/test/CodeGen/X86/h-register-addressing-64.ll b/test/CodeGen/X86/h-register-addressing-64.ll index b38e0e478e99b..98817f3fb59f5 100644 --- a/test/CodeGen/X86/h-register-addressing-64.ll +++ b/test/CodeGen/X86/h-register-addressing-64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 7 +; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 7 ; Use h-register extract and zero-extend. diff --git a/test/CodeGen/X86/h-register-store.ll b/test/CodeGen/X86/h-register-store.ll index e8672422a7b09..d30e6b334e8b1 100644 --- a/test/CodeGen/X86/h-register-store.ll +++ b/test/CodeGen/X86/h-register-store.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep mov %t | count 6 ; RUN: grep {movb %ah, (%rsi)} %t | count 3 -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep mov %t | count 3 ; RUN: grep {movb %ah, (%e} %t | count 3 diff --git a/test/CodeGen/X86/h-registers-0.ll b/test/CodeGen/X86/h-registers-0.ll index 2777be9cc3e0a..878fd93b737c7 100644 --- a/test/CodeGen/X86/h-registers-0.ll +++ b/test/CodeGen/X86/h-registers-0.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 4 -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86-64 | grep {movzbl %\[abcd\]h,} | count 4 +; RUN: llc < %s -march=x86 > %t ; RUN: grep {incb %ah} %t | count 3 ; RUN: grep {movzbl %ah,} %t | count 3 diff --git a/test/CodeGen/X86/h-registers-1.ll b/test/CodeGen/X86/h-registers-1.ll index 789f3dd18f08b..e97ebab69712b 100644 --- a/test/CodeGen/X86/h-registers-1.ll +++ b/test/CodeGen/X86/h-registers-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep {movzbl %\[abcd\]h,} %t | count 8 ; RUN: grep {%\[abcd\]h} %t | not grep {%r\[\[:digit:\]\]*d} diff --git a/test/CodeGen/X86/h-registers-2.ll b/test/CodeGen/X86/h-registers-2.ll index 5541583239742..16e13f8396645 100644 --- a/test/CodeGen/X86/h-registers-2.ll +++ b/test/CodeGen/X86/h-registers-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep {movzbl %\[abcd\]h,} %t | count 1 ; RUN: grep {shll \$3,} %t | count 1 diff --git a/test/CodeGen/X86/h-registers-3.ll b/test/CodeGen/X86/h-registers-3.ll index d353a2233797b..8a0b07b31c278 100644 --- a/test/CodeGen/X86/h-registers-3.ll +++ b/test/CodeGen/X86/h-registers-3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -march=x86 | grep mov | count 1 +; RUN: llc < %s -march=x86-64 | grep mov | count 1 define zeroext i8 @foo() nounwind ssp { entry: diff --git a/test/CodeGen/X86/hidden-vis-2.ll b/test/CodeGen/X86/hidden-vis-2.ll index e000547f44f2b..74554d15e2f6d 100644 --- a/test/CodeGen/X86/hidden-vis-2.ll +++ b/test/CodeGen/X86/hidden-vis-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep mov | count 1 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 | not grep GOT +; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep mov | count 1 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | not grep GOT @x = weak hidden global i32 0 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/hidden-vis-3.ll b/test/CodeGen/X86/hidden-vis-3.ll index 81dc76e14889a..4be881e84d682 100644 --- a/test/CodeGen/X86/hidden-vis-3.ll +++ b/test/CodeGen/X86/hidden-vis-3.ll @@ -1,13 +1,17 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep mov | count 3 -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep non_lazy_ptr -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep long | count 2 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 | not grep GOT +; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64 @x = external hidden global i32 ; <i32*> [#uses=1] @y = extern_weak hidden global i32 ; <i32*> [#uses=1] define i32 @t() nounwind readonly { entry: +; X32: _t: +; X32: movl _y, %eax + +; X64: _t: +; X64: movl _y(%rip), %eax + %0 = load i32* @x, align 4 ; <i32> [#uses=1] %1 = load i32* @y, align 4 ; <i32> [#uses=1] %2 = add i32 %1, %0 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/hidden-vis-4.ll b/test/CodeGen/X86/hidden-vis-4.ll index e6936de103607..a8aede52accdf 100644 --- a/test/CodeGen/X86/hidden-vis-4.ll +++ b/test/CodeGen/X86/hidden-vis-4.ll @@ -1,11 +1,12 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep non_lazy_ptr -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep long -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 | grep comm +; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s @x = common hidden global i32 0 ; <i32*> [#uses=1] define i32 @t() nounwind readonly { entry: +; CHECK: t: +; CHECK: movl _x, %eax +; CHECK: .comm _x,4 %0 = load i32* @x, align 4 ; <i32> [#uses=1] ret i32 %0 } diff --git a/test/CodeGen/X86/hidden-vis.ll b/test/CodeGen/X86/hidden-vis.ll index 058850c7b75ca..a948bdfe68757 100644 --- a/test/CodeGen/X86/hidden-vis.ll +++ b/test/CodeGen/X86/hidden-vis.ll @@ -1,20 +1,24 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | \ -; RUN: grep .hidden | count 2 -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin8.8.0 | \ -; RUN: grep .private_extern | count 2 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN -%struct.Person = type { i32 } @a = hidden global i32 0 @b = external global i32 +define weak hidden void @t1() nounwind { +; LINUX: .hidden t1 +; LINUX: t1: -define weak hidden void @_ZN6Person13privateMethodEv(%struct.Person* %this) { +; DARWIN: .private_extern _t1 +; DARWIN: t1: ret void } -declare void @function(i32) +define weak void @t2() nounwind { +; LINUX: t2: +; LINUX: .hidden a -define weak void @_ZN6PersonC1Ei(%struct.Person* %this, i32 %_c) { +; DARWIN: t2: +; DARWIN: .private_extern _a ret void } diff --git a/test/CodeGen/X86/i128-and-beyond.ll b/test/CodeGen/X86/i128-and-beyond.ll index db94b0ec05e6f..907a6b8de2fe2 100644 --- a/test/CodeGen/X86/i128-and-beyond.ll +++ b/test/CodeGen/X86/i128-and-beyond.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep 18446744073709551615 | count 14 +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep 18446744073709551615 | count 14 ; These static initializers are too big to hand off to assemblers ; as monolithic blobs. diff --git a/test/CodeGen/X86/i128-immediate.ll b/test/CodeGen/X86/i128-immediate.ll index 69399336e30e0..c47569e700f52 100644 --- a/test/CodeGen/X86/i128-immediate.ll +++ b/test/CodeGen/X86/i128-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 2 +; RUN: llc < %s -march=x86-64 | grep movq | count 2 define i128 @__addvti3() { ret i128 -1 diff --git a/test/CodeGen/X86/i128-mul.ll b/test/CodeGen/X86/i128-mul.ll index f8c732ec68e45..e9d30d67019e2 100644 --- a/test/CodeGen/X86/i128-mul.ll +++ b/test/CodeGen/X86/i128-mul.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 ; PR1198 define i64 @foo(i64 %x, i64 %y) { diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll index 179a0134331b1..277f4283328b6 100644 --- a/test/CodeGen/X86/i128-ret.ll +++ b/test/CodeGen/X86/i128-ret.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq 8(%rdi), %rdx} -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq (%rdi), %rax} +; RUN: llc < %s -march=x86-64 | grep {movq 8(%rdi), %rdx} +; RUN: llc < %s -march=x86-64 | grep {movq (%rdi), %rax} define i128 @test(i128 *%P) { %A = load i128* %P diff --git a/test/CodeGen/X86/i256-add.ll b/test/CodeGen/X86/i256-add.ll index 280ed6b1b33ba..5a7a7a7fe84a9 100644 --- a/test/CodeGen/X86/i256-add.ll +++ b/test/CodeGen/X86/i256-add.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep adcl %t | count 7 ; RUN: grep sbbl %t | count 7 diff --git a/test/CodeGen/X86/i2k.ll b/test/CodeGen/X86/i2k.ll index 712302da76d00..6116c2e716586 100644 --- a/test/CodeGen/X86/i2k.ll +++ b/test/CodeGen/X86/i2k.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind { %a = load i2011* %x diff --git a/test/CodeGen/X86/i64-mem-copy.ll b/test/CodeGen/X86/i64-mem-copy.ll index 0d2b29c0b4201..847e2095f4c53 100644 --- a/test/CodeGen/X86/i64-mem-copy.ll +++ b/test/CodeGen/X86/i64-mem-copy.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),} +; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.*(%eax),} ; Uses movsd to load / store i64 values if sse2 is available. diff --git a/test/CodeGen/X86/iabs.ll b/test/CodeGen/X86/iabs.ll index ca751ae1d2e4e..6a79ee879253f 100644 --- a/test/CodeGen/X86/iabs.ll +++ b/test/CodeGen/X86/iabs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -stats |& \ +; RUN: llc < %s -march=x86-64 -stats |& \ ; RUN: grep {6 .*Number of machine instrs printed} ;; Integer absolute value, should produce something at least as good as: diff --git a/test/CodeGen/X86/illegal-asm.ll b/test/CodeGen/X86/illegal-asm.ll index 03cc507f23f21..43128dcf010b6 100644 --- a/test/CodeGen/X86/illegal-asm.ll +++ b/test/CodeGen/X86/illegal-asm.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -disable-fp-elim -; RUN: llvm-as < %s | llc -mtriple=i386-linux -disable-fp-elim +; RUN: llc < %s -mtriple=i386-apple-darwin -disable-fp-elim +; RUN: llc < %s -mtriple=i386-linux -disable-fp-elim ; XFAIL: * ; Expected to run out of registers during allocation. ; PR3864 diff --git a/test/CodeGen/X86/illegal-insert.ll b/test/CodeGen/X86/illegal-insert.ll index 59773b2491049..dbf1b14684c23 100644 --- a/test/CodeGen/X86/illegal-insert.ll +++ b/test/CodeGen/X86/illegal-insert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 define <4 x double> @foo0(<4 x double> %t) { %r = insertelement <4 x double> %t, double 2.3, i32 0 diff --git a/test/CodeGen/X86/illegal-vector-args-return.ll b/test/CodeGen/X86/illegal-vector-args-return.ll index 5ed6ddb55129d..cecf77af4de12 100644 --- a/test/CodeGen/X86/illegal-vector-args-return.ll +++ b/test/CodeGen/X86/illegal-vector-args-return.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm3, %xmm1} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {mulpd %xmm2, %xmm0} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm3, %xmm1} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {addps %xmm2, %xmm0} define <4 x double> @foo(<4 x double> %x, <4 x double> %z) { %y = fmul <4 x double> %x, %z diff --git a/test/CodeGen/X86/imp-def-copies.ll b/test/CodeGen/X86/imp-def-copies.ll index 3d2f65653e7a4..91178403876f1 100644 --- a/test/CodeGen/X86/imp-def-copies.ll +++ b/test/CodeGen/X86/imp-def-copies.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep mov +; RUN: llc < %s -march=x86 | not grep mov %struct.active_line = type { %struct.gs_fixed_point, %struct.gs_fixed_point, i32, i32, i32, %struct.line_segment*, i32, i16, i16, %struct.active_line*, %struct.active_line* } %struct.gs_fixed_point = type { i32, i32 } diff --git a/test/CodeGen/X86/imul-lea-2.ll b/test/CodeGen/X86/imul-lea-2.ll index 0a2df1c977bcb..1cb54b37b0e1a 100644 --- a/test/CodeGen/X86/imul-lea-2.ll +++ b/test/CodeGen/X86/imul-lea-2.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 3 -; RUN: llvm-as < %s | llc -march=x86-64 | grep shl | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | not grep imul +; RUN: llc < %s -march=x86-64 | grep lea | count 3 +; RUN: llc < %s -march=x86-64 | grep shl | count 1 +; RUN: llc < %s -march=x86-64 | not grep imul define i64 @t1(i64 %a) nounwind readnone { entry: diff --git a/test/CodeGen/X86/imul-lea.ll b/test/CodeGen/X86/imul-lea.ll index 6403a2668a39e..4e8e2af0f2fec 100644 --- a/test/CodeGen/X86/imul-lea.ll +++ b/test/CodeGen/X86/imul-lea.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep lea +; RUN: llc < %s -march=x86 | grep lea declare i32 @foo() diff --git a/test/CodeGen/X86/inline-asm-2addr.ll b/test/CodeGen/X86/inline-asm-2addr.ll index 619629407fe6b..4a2c7fc5ebac5 100644 --- a/test/CodeGen/X86/inline-asm-2addr.ll +++ b/test/CodeGen/X86/inline-asm-2addr.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq +; RUN: llc < %s -march=x86-64 | not grep movq define i64 @t(i64 %a, i64 %b) nounwind ssp { entry: diff --git a/test/CodeGen/X86/inline-asm-R-constraint.ll b/test/CodeGen/X86/inline-asm-R-constraint.ll new file mode 100644 index 0000000000000..66c27ac877121 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-R-constraint.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=x86-64 < %s | FileCheck %s +; 7282062 +; ModuleID = '<stdin>' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin10.0" + +define void @udiv8(i8* %quotient, i16 zeroext %a, i8 zeroext %b, i8 zeroext %c, i8* %remainder) nounwind ssp { +entry: +; CHECK: udiv8: +; CHECK-NOT: movb %ah, (%r8) + %a_addr = alloca i16, align 2 ; <i16*> [#uses=2] + %b_addr = alloca i8, align 1 ; <i8*> [#uses=2] + store i16 %a, i16* %a_addr + store i8 %b, i8* %b_addr + call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\09\09movb %ah, ($4)", "=*m,=*m,*m,*m,R,~{dirflag},~{fpsr},~{flags},~{ax}"(i8* %quotient, i8* %remainder, i16* %a_addr, i8* %b_addr, i8* %remainder) nounwind + ret void +; CHECK: ret +} diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll index 3c536b716f624..51ea843712d19 100644 --- a/test/CodeGen/X86/inline-asm-flag-clobber.ll +++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext test 1 | grep j +; RUN: llc -march=x86-64 < %s | FileCheck %s ; PR3701 define i64 @t(i64* %arg) nounwind { @@ -7,6 +7,8 @@ define i64 @t(i64* %arg) nounwind { ; <label>:1 ; preds = %0 %2 = icmp eq i64* null, %arg ; <i1> [#uses=1] %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0] +; CHECK: test +; CHECK-NEXT: j br i1 %2, label %4, label %5 ; <label>:4 ; preds = %1 diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll index 31d94d89c3765..09b09295153ef 100644 --- a/test/CodeGen/X86/inline-asm-fpstack.ll +++ b/test/CodeGen/X86/inline-asm-fpstack.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define x86_fp80 @test1() { %tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"() diff --git a/test/CodeGen/X86/inline-asm-fpstack2.ll b/test/CodeGen/X86/inline-asm-fpstack2.ll index 968561826b5c8..ffa6ee6e019ef 100644 --- a/test/CodeGen/X86/inline-asm-fpstack2.ll +++ b/test/CodeGen/X86/inline-asm-fpstack2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep {fld %%st(0)} %t ; PR4185 diff --git a/test/CodeGen/X86/inline-asm-fpstack3.ll b/test/CodeGen/X86/inline-asm-fpstack3.ll index ac89a1d9ad51a..17945fe4149e8 100644 --- a/test/CodeGen/X86/inline-asm-fpstack3.ll +++ b/test/CodeGen/X86/inline-asm-fpstack3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep {fld %%st(0)} %t ; PR4459 diff --git a/test/CodeGen/X86/inline-asm-fpstack4.ll b/test/CodeGen/X86/inline-asm-fpstack4.ll index c9122fad6cf77..bae2970db4abc 100644 --- a/test/CodeGen/X86/inline-asm-fpstack4.ll +++ b/test/CodeGen/X86/inline-asm-fpstack4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR4484 declare x86_fp80 @ceil() diff --git a/test/CodeGen/X86/inline-asm-fpstack5.ll b/test/CodeGen/X86/inline-asm-fpstack5.ll index 64f3788f45dd4..8b219cf927733 100644 --- a/test/CodeGen/X86/inline-asm-fpstack5.ll +++ b/test/CodeGen/X86/inline-asm-fpstack5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR4485 define void @test(x86_fp80* %a) { diff --git a/test/CodeGen/X86/inline-asm-modifier-n.ll b/test/CodeGen/X86/inline-asm-modifier-n.ll index 97eac388677b3..5e76b6c0580e9 100644 --- a/test/CodeGen/X86/inline-asm-modifier-n.ll +++ b/test/CodeGen/X86/inline-asm-modifier-n.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep { 37} +; RUN: llc < %s -march=x86 | grep { 37} ; rdar://7008959 define void @bork() nounwind { diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll index ca39c120585a6..78d7e776cf227 100644 --- a/test/CodeGen/X86/inline-asm-mrv.ll +++ b/test/CodeGen/X86/inline-asm-mrv.ll @@ -1,8 +1,8 @@ ; PR2094 -; RUN: llvm-as < %s | llc -march=x86-64 | grep movslq -; RUN: llvm-as < %s | llc -march=x86-64 | grep addps -; RUN: llvm-as < %s | llc -march=x86-64 | grep paddd -; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq +; RUN: llc < %s -march=x86-64 | grep movslq +; RUN: llc < %s -march=x86-64 | grep addps +; RUN: llc < %s -march=x86-64 | grep paddd +; RUN: llc < %s -march=x86-64 | not grep movq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/inline-asm-out-regs.ll b/test/CodeGen/X86/inline-asm-out-regs.ll index 01f1397830a4b..46966f5370d38 100644 --- a/test/CodeGen/X86/inline-asm-out-regs.ll +++ b/test/CodeGen/X86/inline-asm-out-regs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-unknown-linux-gnu +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu ; PR3391 @pci_indirect = external global { } ; <{ }*> [#uses=1] diff --git a/test/CodeGen/X86/inline-asm-pic.ll b/test/CodeGen/X86/inline-asm-pic.ll index 04ad48d292115..0b5ff08c3f326 100644 --- a/test/CodeGen/X86/inline-asm-pic.ll +++ b/test/CodeGen/X86/inline-asm-pic.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic | grep lea -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic | grep call +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep lea +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | grep call @main_q = internal global i8* null ; <i8**> [#uses=1] diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll new file mode 100644 index 0000000000000..ab44206f8065a --- /dev/null +++ b/test/CodeGen/X86/inline-asm-q-regs.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -march=x86-64 +; rdar://7066579 + + type { i64, i64, i64, i64, i64 } ; type %0 + +define void @t() nounwind { +entry: + %asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $2 \0Amov %cr4, $3 \0Amov %cr8, $0 \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%0> [#uses=0] + ret void +} diff --git a/test/CodeGen/X86/inline-asm-tied.ll b/test/CodeGen/X86/inline-asm-tied.ll index 6df2c48415bc7..1f4a13f54b75d 100644 --- a/test/CodeGen/X86/inline-asm-tied.ll +++ b/test/CodeGen/X86/inline-asm-tied.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 4(%esp)} | count 2 +; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 12(%esp)} | count 2 ; rdar://6992609 target triple = "i386-apple-darwin9.0" diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll index aafbbd1fd0257..5a9628b3df74a 100644 --- a/test/CodeGen/X86/inline-asm-x-scalar.ll +++ b/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah define void @test1() { tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000) diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll index 02988fcc29f31..c66d7a8bd11bd 100644 --- a/test/CodeGen/X86/inline-asm.ll +++ b/test/CodeGen/X86/inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define i32 @test1() nounwind { ; Dest is AX, dest type = i32. diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll index 863cda94c5fcb..2243f93f3ddde 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-1.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2 +; RUN: llc < %s -march=x86 | grep mov | count 3 define fastcc i32 @sqlite3ExprResolveNames() nounwind { entry: diff --git a/test/CodeGen/X86/ins_subreg_coalesce-2.ll b/test/CodeGen/X86/ins_subreg_coalesce-2.ll index 5c0b0d3d3e954..f2c9cc72719c4 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-2.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep movw +; RUN: llc < %s -march=x86-64 | not grep movw define i16 @test5(i16 %f12) nounwind { %f11 = shl i16 %f12, 2 ; <i16> [#uses=1] diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll index ee3ac66abef1a..e44308583297c 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 11 +; RUN: llc < %s -march=x86-64 | grep mov | count 11 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } @@ -17,7 +17,7 @@ %struct.metrics = type { i16, i16, i16, i16, i16 } %struct.rec = type { %struct.head_type } -define void @FontChange(i1 %foo) { +define void @FontChange(i1 %foo) nounwind { entry: br i1 %foo, label %bb298, label %bb49 bb49: ; preds = %entry diff --git a/test/CodeGen/X86/insertelement-copytoregs.ll b/test/CodeGen/X86/insertelement-copytoregs.ll index 0eef5173b858f..34a29ca7d939c 100644 --- a/test/CodeGen/X86/insertelement-copytoregs.ll +++ b/test/CodeGen/X86/insertelement-copytoregs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep -v IMPLICIT_DEF +; RUN: llc < %s -march=x86-64 | grep -v IMPLICIT_DEF define void @foo(<2 x float>* %p) { %t = insertelement <2 x float> undef, float 0.0, i32 0 diff --git a/test/CodeGen/X86/insertelement-legalize.ll b/test/CodeGen/X86/insertelement-legalize.ll index 95e17b40bc8b3..18aade2bb3027 100644 --- a/test/CodeGen/X86/insertelement-legalize.ll +++ b/test/CodeGen/X86/insertelement-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -disable-mmx +; RUN: llc < %s -march=x86 -disable-mmx ; Test to check that we properly legalize an insert vector element define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind { diff --git a/test/CodeGen/X86/invalid-shift-immediate.ll b/test/CodeGen/X86/invalid-shift-immediate.ll index 5c47f5ee685f1..77a9f7eda783a 100644 --- a/test/CodeGen/X86/invalid-shift-immediate.ll +++ b/test/CodeGen/X86/invalid-shift-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2098 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/isel-sink.ll b/test/CodeGen/X86/isel-sink.ll index 4e68b7757ff5a..0f94b233bcfb5 100644 --- a/test/CodeGen/X86/isel-sink.ll +++ b/test/CodeGen/X86/isel-sink.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep lea -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin8 | \ +; RUN: llc < %s -march=x86 | not grep lea +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 | \ ; RUN: grep {movl \$4, (.*,.*,4)} define i32 @test(i32* %X, i32 %B) { diff --git a/test/CodeGen/X86/isel-sink2.ll b/test/CodeGen/X86/isel-sink2.ll index 9d9c747fa4959..5ed0e00fd8736 100644 --- a/test/CodeGen/X86/isel-sink2.ll +++ b/test/CodeGen/X86/isel-sink2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep {movb.7(%...)} %t ; RUN: not grep leal %t diff --git a/test/CodeGen/X86/isel-sink3.ll b/test/CodeGen/X86/isel-sink3.ll index 4e678c42cf771..8d3d97a930bef 100644 --- a/test/CodeGen/X86/isel-sink3.ll +++ b/test/CodeGen/X86/isel-sink3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc | grep {addl.\$4, %ecx} -; RUN: llvm-as < %s | llc | not grep leal +; RUN: llc < %s | grep {addl.\$4, %ecx} +; RUN: llc < %s | not grep leal ; this should not sink %1 into bb1, that would increase reg pressure. ; rdar://6399178 diff --git a/test/CodeGen/X86/isint.ll b/test/CodeGen/X86/isint.ll index 7acc5ccf20e7e..507a328c3ffd8 100644 --- a/test/CodeGen/X86/isint.ll +++ b/test/CodeGen/X86/isint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: not grep cmp %t ; RUN: not grep xor %t ; RUN: grep jne %t | count 1 diff --git a/test/CodeGen/X86/isnan.ll b/test/CodeGen/X86/isnan.ll index 65916ff577247..4d465c0c7aa8f 100644 --- a/test/CodeGen/X86/isnan.ll +++ b/test/CodeGen/X86/isnan.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep call +; RUN: llc < %s -march=x86 | not grep call declare i1 @llvm.isunordered.f64(double) diff --git a/test/CodeGen/X86/isnan2.ll b/test/CodeGen/X86/isnan2.ll index 18fe29a883e0b..7753346fd9402 100644 --- a/test/CodeGen/X86/isnan2.ll +++ b/test/CodeGen/X86/isnan2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep pxor +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep pxor ; This should not need to materialize 0.0 to evaluate the condition. diff --git a/test/CodeGen/X86/ispositive.ll b/test/CodeGen/X86/ispositive.ll index 3799b9c70b071..8adf723aabc38 100644 --- a/test/CodeGen/X86/ispositive.ll +++ b/test/CodeGen/X86/ispositive.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {shrl.*31} +; RUN: llc < %s -march=x86 | grep {shrl.*31} define i32 @test1(i32 %X) { entry: diff --git a/test/CodeGen/X86/iv-users-in-other-loops.ll b/test/CodeGen/X86/iv-users-in-other-loops.ll index a48f0616291fd..c695c29e068f5 100644 --- a/test/CodeGen/X86/iv-users-in-other-loops.ll +++ b/test/CodeGen/X86/iv-users-in-other-loops.ll @@ -1,10 +1,10 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -f -o %t +; RUN: llc < %s -march=x86-64 -o %t ; RUN: grep inc %t | count 1 ; RUN: grep dec %t | count 2 ; RUN: grep addq %t | count 13 ; RUN: not grep addb %t -; RUN: grep leaq %t | count 8 -; RUN: grep leal %t | count 4 +; RUN: grep leaq %t | count 9 +; RUN: grep leal %t | count 3 ; RUN: grep movq %t | count 5 ; IV users in each of the loops from other loops shouldn't cause LSR diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll index cb7d6271f9580..5e8e16217363e 100644 --- a/test/CodeGen/X86/jump_sign.ll +++ b/test/CodeGen/X86/jump_sign.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep jns +; RUN: llc < %s -march=x86 | grep jns define i32 @f(i32 %X) { entry: diff --git a/test/CodeGen/X86/ldzero.ll b/test/CodeGen/X86/ldzero.ll index 2db78a2145b6a..dab04bc353c66 100644 --- a/test/CodeGen/X86/ldzero.ll +++ b/test/CodeGen/X86/ldzero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; verify PR 1700 is still fixed ; ModuleID = 'hh.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/lea-2.ll b/test/CodeGen/X86/lea-2.ll index a33b71c851ecc..69303507d6e6c 100644 --- a/test/CodeGen/X86/lea-2.ll +++ b/test/CodeGen/X86/lea-2.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {lea EAX, DWORD PTR \\\[... + 4\\*... - 5\\\]} -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: not grep add define i32 @test1(i32 %A, i32 %B) { diff --git a/test/CodeGen/X86/lea-3.ll b/test/CodeGen/X86/lea-3.ll index 39122bbdf5f37..44413d60785ea 100644 --- a/test/CodeGen/X86/lea-3.ll +++ b/test/CodeGen/X86/lea-3.ll @@ -1,10 +1,10 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} +; RUN: llc < %s -march=x86-64 | grep {leal (%rdi,%rdi,2), %eax} define i32 @test(i32 %a) { %tmp2 = mul i32 %a, 3 ; <i32> [#uses=1] ret i32 %tmp2 } -; RUN: llvm-as < %s | llc -march=x86-64 | grep {leaq (,%rdi,4), %rax} +; RUN: llc < %s -march=x86-64 | grep {leaq (,%rdi,4), %rax} define i64 @test2(i64 %a) { %tmp2 = shl i64 %a, 2 %tmp3 = or i64 %tmp2, %a diff --git a/test/CodeGen/X86/lea-4.ll b/test/CodeGen/X86/lea-4.ll index 8f0835f642fd0..2171204c01d12 100644 --- a/test/CodeGen/X86/lea-4.ll +++ b/test/CodeGen/X86/lea-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 2 +; RUN: llc < %s -march=x86-64 | grep lea | count 2 define zeroext i16 @t1(i32 %on_off) nounwind { entry: diff --git a/test/CodeGen/X86/lea-recursion.ll b/test/CodeGen/X86/lea-recursion.ll index 390e35adfaf55..3f32fd27c5c11 100644 --- a/test/CodeGen/X86/lea-recursion.ll +++ b/test/CodeGen/X86/lea-recursion.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 12 +; RUN: llc < %s -march=x86-64 | grep lea | count 12 ; This testcase was written to demonstrate an instruction-selection problem, ; however it also happens to expose a limitation in the DAGCombiner's diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll index 30a477ad120cc..22a96448f029a 100644 --- a/test/CodeGen/X86/lea.ll +++ b/test/CodeGen/X86/lea.ll @@ -1,9 +1,34 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86 | not grep orl +; RUN: llc < %s -march=x86-64 | FileCheck %s -define i32 @test(i32 %x) { - %tmp1 = shl i32 %x, 3 ; <i32> [#uses=1] - %tmp2 = add i32 %tmp1, 7 ; <i32> [#uses=1] +define i32 @test1(i32 %x) nounwind { + %tmp1 = shl i32 %x, 3 + %tmp2 = add i32 %tmp1, 7 ret i32 %tmp2 +; CHECK: test1: +; CHECK: leal 7(,%rdi,8), %eax } + +; ISel the add of -4 with a neg and use an lea for the rest of the +; arithemtic. +define i32 @test2(i32 %x_offs) nounwind readnone { +entry: + %t0 = icmp sgt i32 %x_offs, 4 + br i1 %t0, label %bb.nph, label %bb2 + +bb.nph: + %tmp = add i32 %x_offs, -5 + %tmp6 = lshr i32 %tmp, 2 + %tmp7 = mul i32 %tmp6, -4 + %tmp8 = add i32 %tmp7, %x_offs + %tmp9 = add i32 %tmp8, -4 + ret i32 %tmp9 + +bb2: + ret i32 %x_offs +; CHECK: test2: +; CHECK: leal -5(%rdi), %eax +; CHECK: andl $-4, %eax +; CHECK: negl %eax +; CHECK: leal -4(%rdi,%rax), %eax +} diff --git a/test/CodeGen/X86/legalizedag_vec.ll b/test/CodeGen/X86/legalizedag_vec.ll index 97654b201ba01..574b46acea60c 100644 --- a/test/CodeGen/X86/legalizedag_vec.ll +++ b/test/CodeGen/X86/legalizedag_vec.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -disable-mmx -o %t -f -; RUN: grep divdi3 %t | count 2 +; RUN: llc < %s -march=x86 -mattr=sse2 -disable-mmx -o %t +; RUN: grep {call.*divdi3} %t | count 2 ; Test case for r63760 where we generate a legalization assert that an illegal @@ -12,4 +12,4 @@ define <2 x i64> @test_long_div(<2 x i64> %num, <2 x i64> %div) { %div.r = sdiv <2 x i64> %num, %div ret <2 x i64> %div.r -}
\ No newline at end of file +} diff --git a/test/CodeGen/X86/lfence.ll b/test/CodeGen/X86/lfence.ll index 0721d73054408..7a96ca30e7531 100644 --- a/test/CodeGen/X86/lfence.ll +++ b/test/CodeGen/X86/lfence.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep lfence +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep lfence declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1) diff --git a/test/CodeGen/X86/limited-prec.ll b/test/CodeGen/X86/limited-prec.ll index 6afaea429b867..7bf4ac28fdf96 100644 --- a/test/CodeGen/X86/limited-prec.ll +++ b/test/CodeGen/X86/limited-prec.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -limit-float-precision=6 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=6 -march=x86 | \ ; RUN: not grep exp | not grep log | not grep pow -; RUN: llvm-as < %s | llc -limit-float-precision=12 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=12 -march=x86 | \ ; RUN: not grep exp | not grep log | not grep pow -; RUN: llvm-as < %s | llc -limit-float-precision=18 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=18 -march=x86 | \ ; RUN: not grep exp | not grep log | not grep pow define float @f1(float %x) nounwind noinline { diff --git a/test/CodeGen/X86/live-out-reg-info.ll b/test/CodeGen/X86/live-out-reg-info.ll index b6fb7dfc72c65..7132777b697cb 100644 --- a/test/CodeGen/X86/live-out-reg-info.ll +++ b/test/CodeGen/X86/live-out-reg-info.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep testl +; RUN: llc < %s -march=x86-64 | grep {testb \[$\]1,} ; Make sure dagcombine doesn't eliminate the comparison due ; to an off-by-one bug with ComputeMaskedBits information. diff --git a/test/CodeGen/X86/local-liveness.ll b/test/CodeGen/X86/local-liveness.ll index 18d999b7d47eb..321f208e75caf 100644 --- a/test/CodeGen/X86/local-liveness.ll +++ b/test/CodeGen/X86/local-liveness.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %edx} +; RUN: llc < %s -march=x86 -regalloc=local | grep {subl %eax, %edx} ; Local regalloc shouldn't assume that both the uses of the ; sub instruction are kills, because one of them is tied diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll index 8d9ebfb276f1f..e0165fb01b536 100644 --- a/test/CodeGen/X86/long-setcc.ll +++ b/test/CodeGen/X86/long-setcc.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep shr | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep xor | count 1 +; RUN: llc < %s -march=x86 | grep cmp | count 1 +; RUN: llc < %s -march=x86 | grep shr | count 1 +; RUN: llc < %s -march=x86 | grep xor | count 1 define i1 @t1(i64 %x) nounwind { %B = icmp slt i64 %x, 0 diff --git a/test/CodeGen/X86/longlong-deadload.ll b/test/CodeGen/X86/longlong-deadload.ll index a8e2c31d9481f..9a4c8f21237b2 100644 --- a/test/CodeGen/X86/longlong-deadload.ll +++ b/test/CodeGen/X86/longlong-deadload.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep '4{(%...)} +; RUN: llc < %s -march=x86 | not grep '4{(%...)} ; This should not load or store the top part of *P. define void @test(i64* %P) nounwind { diff --git a/test/CodeGen/X86/loop-hoist.ll b/test/CodeGen/X86/loop-hoist.ll index 73284a488edeb..b52066dac62eb 100644 --- a/test/CodeGen/X86/loop-hoist.ll +++ b/test/CodeGen/X86/loop-hoist.ll @@ -1,10 +1,10 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ -; RUN: grep L_Arr.non_lazy_ptr -; RUN: llvm-as < %s | \ -; RUN: llc -disable-post-RA-scheduler=true \ -; RUN: -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 |\ -; RUN: %prcontext L_Arr.non_lazy_ptr 1 | grep {4(%esp)} +; LSR should hoist the load from the "Arr" stub out of the loop. + +; RUN: llc < %s -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s + +; CHECK: _foo: +; CHECK: L_Arr$non_lazy_ptr +; CHECK: LBB1_1: ## %cond_true @Arr = external global [0 x i32] ; <[0 x i32]*> [#uses=1] diff --git a/test/CodeGen/X86/loop-strength-reduce-2.ll b/test/CodeGen/X86/loop-strength-reduce-2.ll index 8ea5bdb208e3a..30b5114349480 100644 --- a/test/CodeGen/X86/loop-strength-reduce-2.ll +++ b/test/CodeGen/X86/loop-strength-reduce-2.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic | \ +; RUN: llc < %s -march=x86 -relocation-model=pic | \ ; RUN: grep {, 4} | count 1 -; RUN: llvm-as < %s | llc -march=x86 | not grep lea +; RUN: llc < %s -march=x86 | not grep lea ; ; Make sure the common loop invariant A is hoisted up to preheader, ; since too many registers are needed to subsume it into the addressing modes. diff --git a/test/CodeGen/X86/loop-strength-reduce-3.ll b/test/CodeGen/X86/loop-strength-reduce-3.ll index b6bb81471bcdb..70c91340c9488 100644 --- a/test/CodeGen/X86/loop-strength-reduce-3.ll +++ b/test/CodeGen/X86/loop-strength-reduce-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | \ +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | \ ; RUN: grep {A+} | count 2 ; ; Make sure the common loop invariant A is not hoisted up to preheader, diff --git a/test/CodeGen/X86/loop-strength-reduce.ll b/test/CodeGen/X86/loop-strength-reduce.ll index 873710112b680..4cb56ca9ed245 100644 --- a/test/CodeGen/X86/loop-strength-reduce.ll +++ b/test/CodeGen/X86/loop-strength-reduce.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | \ +; RUN: llc < %s -march=x86 -relocation-model=static | \ ; RUN: grep {A+} | count 2 ; ; Make sure the common loop invariant A is not hoisted up to preheader, diff --git a/test/CodeGen/X86/loop-strength-reduce2.ll b/test/CodeGen/X86/loop-strength-reduce2.ll index 507a9e5a2fa73..a1f38a7edc028 100644 --- a/test/CodeGen/X86/loop-strength-reduce2.ll +++ b/test/CodeGen/X86/loop-strength-reduce2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov +; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov ; ; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader. diff --git a/test/CodeGen/X86/loop-strength-reduce3.ll b/test/CodeGen/X86/loop-strength-reduce3.ll index 4e95bdddb5b2b..e340edd650609 100644 --- a/test/CodeGen/X86/loop-strength-reduce3.ll +++ b/test/CodeGen/X86/loop-strength-reduce3.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | grep 240 -; RUN: llvm-as < %s | llc -march=x86 | grep inc | count 1 +; RUN: llc < %s -march=x86 | grep cmp | grep 240 +; RUN: llc < %s -march=x86 | grep inc | count 1 define i32 @foo(i32 %A, i32 %B, i32 %C, i32 %D) { entry: diff --git a/test/CodeGen/X86/loop-strength-reduce4.ll b/test/CodeGen/X86/loop-strength-reduce4.ll index 711f223749ce8..87b606f558a45 100644 --- a/test/CodeGen/X86/loop-strength-reduce4.ll +++ b/test/CodeGen/X86/loop-strength-reduce4.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep cmp | grep 64 -; RUN: llvm-as < %s | llc -march=x86 | not grep inc +; RUN: llc < %s -march=x86 | grep cmp | grep 64 +; RUN: llc < %s -march=x86 | not grep inc @state = external global [0 x i32] ; <[0 x i32]*> [#uses=4] @S = external global [0 x i32] ; <[0 x i32]*> [#uses=4] diff --git a/test/CodeGen/X86/loop-strength-reduce5.ll b/test/CodeGen/X86/loop-strength-reduce5.ll index 6e037e2aca31d..4ec2a02992519 100644 --- a/test/CodeGen/X86/loop-strength-reduce5.ll +++ b/test/CodeGen/X86/loop-strength-reduce5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep inc | count 1 +; RUN: llc < %s -march=x86 | grep inc | count 1 @X = weak global i16 0 ; <i16*> [#uses=1] @Y = weak global i16 0 ; <i16*> [#uses=1] diff --git a/test/CodeGen/X86/loop-strength-reduce6.ll b/test/CodeGen/X86/loop-strength-reduce6.ll index fa8b57aababb1..81da82ec3f7c0 100644 --- a/test/CodeGen/X86/loop-strength-reduce6.ll +++ b/test/CodeGen/X86/loop-strength-reduce6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep inc +; RUN: llc < %s -march=x86-64 | not grep inc define fastcc i32 @decodeMP3(i32 %isize, i32* %done) { entry: diff --git a/test/CodeGen/X86/loop-strength-reduce7.ll b/test/CodeGen/X86/loop-strength-reduce7.ll index b6a130a861900..4b565a67fb2d7 100644 --- a/test/CodeGen/X86/loop-strength-reduce7.ll +++ b/test/CodeGen/X86/loop-strength-reduce7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep imul +; RUN: llc < %s -march=x86 | not grep imul target triple = "i386-apple-darwin9.6" %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] } diff --git a/test/CodeGen/X86/loop-strength-reduce8.ll b/test/CodeGen/X86/loop-strength-reduce8.ll index 1846c7d4467c2..e14cd8a99e35e 100644 --- a/test/CodeGen/X86/loop-strength-reduce8.ll +++ b/test/CodeGen/X86/loop-strength-reduce8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep leal | not grep 16 +; RUN: llc < %s -mtriple=i386-apple-darwin | grep leal | not grep 16 %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32 } %struct.bitmap_element = type { %struct.bitmap_element*, %struct.bitmap_element*, i32, [2 x i64] } diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll index c998268600cb4..474450acc9b00 100644 --- a/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -1,4 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext decq 1 | grep jne +; RUN: llc -march=x86-64 < %s | FileCheck %s + +; CHECK: decq +; CHECK-NEXT: jne @Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5] @Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4] diff --git a/test/CodeGen/X86/lsr-negative-stride.ll b/test/CodeGen/X86/lsr-negative-stride.ll index 28d041f0603f1..b08356c8d3097 100644 --- a/test/CodeGen/X86/lsr-negative-stride.ll +++ b/test/CodeGen/X86/lsr-negative-stride.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: not grep neg %t ; RUN: not grep sub.*esp %t ; RUN: not grep esi %t diff --git a/test/CodeGen/X86/lsr-sort.ll b/test/CodeGen/X86/lsr-sort.ll index 00e1d694ef402..40589892bb6f1 100644 --- a/test/CodeGen/X86/lsr-sort.ll +++ b/test/CodeGen/X86/lsr-sort.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep inc %t | count 1 ; RUN: not grep incw %t diff --git a/test/CodeGen/X86/masked-iv-safe.ll b/test/CodeGen/X86/masked-iv-safe.ll index 0bf347c64271e..bc493bd8f724f 100644 --- a/test/CodeGen/X86/masked-iv-safe.ll +++ b/test/CodeGen/X86/masked-iv-safe.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep and %t ; RUN: not grep movz %t ; RUN: not grep sar %t diff --git a/test/CodeGen/X86/masked-iv-unsafe.ll b/test/CodeGen/X86/masked-iv-unsafe.ll index 639a7a6a3bb0a..f23c020195489 100644 --- a/test/CodeGen/X86/masked-iv-unsafe.ll +++ b/test/CodeGen/X86/masked-iv-unsafe.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep and %t | count 6 ; RUN: grep movzb %t | count 6 ; RUN: grep sar %t | count 12 diff --git a/test/CodeGen/X86/maskmovdqu.ll b/test/CodeGen/X86/maskmovdqu.ll index 4d1ed1dc226f2..7796f0e9a19e2 100644 --- a/test/CodeGen/X86/maskmovdqu.ll +++ b/test/CodeGen/X86/maskmovdqu.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep -i EDI -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep -i RDI +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep -i EDI +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI ; rdar://6573467 define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind { diff --git a/test/CodeGen/X86/memcpy-2.ll b/test/CodeGen/X86/memcpy-2.ll index 0fccc35f3d273..2dc939e666fff 100644 --- a/test/CodeGen/X86/memcpy-2.ll +++ b/test/CodeGen/X86/memcpy-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 5 +; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7 +; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 5 %struct.ParmT = type { [25 x i8], i8, i8* } @.str12 = internal constant [25 x i8] c"image\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00" ; <[25 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll index 97a2dd57c7109..24530cd27e4b9 100644 --- a/test/CodeGen/X86/memcpy.ll +++ b/test/CodeGen/X86/memcpy.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep call.*memcpy | count 2 +; RUN: llc < %s -march=x86-64 | grep call.*memcpy | count 2 declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) diff --git a/test/CodeGen/X86/memmove-0.ll b/test/CodeGen/X86/memmove-0.ll index a2b452dbdfc57..d4050689f5946 100644 --- a/test/CodeGen/X86/memmove-0.ll +++ b/test/CodeGen/X86/memmove-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy} +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memcpy} declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) diff --git a/test/CodeGen/X86/memmove-1.ll b/test/CodeGen/X86/memmove-1.ll index 3b2debc247dd3..2057be88174db 100644 --- a/test/CodeGen/X86/memmove-1.ll +++ b/test/CodeGen/X86/memmove-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) diff --git a/test/CodeGen/X86/memmove-2.ll b/test/CodeGen/X86/memmove-2.ll index 37bbe0b54133f..68a9f4dfb9cb9 100644 --- a/test/CodeGen/X86/memmove-2.ll +++ b/test/CodeGen/X86/memmove-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | not grep call +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | not grep call declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) diff --git a/test/CodeGen/X86/memmove-3.ll b/test/CodeGen/X86/memmove-3.ll index 2e692c7f60b79..d8a419c07457a 100644 --- a/test/CodeGen/X86/memmove-3.ll +++ b/test/CodeGen/X86/memmove-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} +; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep {call memmove} declare void @llvm.memmove.i64(i8* %d, i8* %s, i64 %l, i32 %a) diff --git a/test/CodeGen/X86/memmove-4.ll b/test/CodeGen/X86/memmove-4.ll index f23c7d5cb8548..027db1f48395a 100644 --- a/test/CodeGen/X86/memmove-4.ll +++ b/test/CodeGen/X86/memmove-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | not grep call +; RUN: llc < %s | not grep call target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll index 2ad665cda75c4..7deb52f8078ed 100644 --- a/test/CodeGen/X86/memset-2.ll +++ b/test/CodeGen/X86/memset-2.ll @@ -1,5 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep rep -; RUN: llvm-as < %s | llc -march=x86 | grep memset +; RUN: llc < %s | not grep rep +; RUN: llc < %s | grep memset + +target triple = "i386" declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind diff --git a/test/CodeGen/X86/memset.ll b/test/CodeGen/X86/memset.ll index 564174c18880d..cf7464d03bf26 100644 --- a/test/CodeGen/X86/memset.ll +++ b/test/CodeGen/X86/memset.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 9 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 3 +; RUN: llc < %s -march=x86 -mattr=-sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 9 +; RUN: llc < %s -march=x86 -mattr=+sse -mtriple=i686-apple-darwin8.8.0 | grep mov | count 3 %struct.x = type { i16, i16 } diff --git a/test/CodeGen/X86/memset64-on-x86-32.ll b/test/CodeGen/X86/memset64-on-x86-32.ll index d76d4d4792463..da8fc51da8e1d 100644 --- a/test/CodeGen/X86/memset64-on-x86-32.ll +++ b/test/CodeGen/X86/memset64-on-x86-32.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep stosl -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq | count 10 +; RUN: llc < %s -mtriple=i386-apple-darwin | grep stosl +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq | count 10 define void @bork() nounwind { entry: diff --git a/test/CodeGen/X86/mfence.ll b/test/CodeGen/X86/mfence.ll index 6abdbcedf2661..a1b22834d1aa4 100644 --- a/test/CodeGen/X86/mfence.ll +++ b/test/CodeGen/X86/mfence.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep sfence -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep lfence -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mfence +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep sfence +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep lfence +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mfence declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1) diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll index 1df0e3a3e6b0b..7dcd84d8a1577 100644 --- a/test/CodeGen/X86/mingw-alloca.ll +++ b/test/CodeGen/X86/mingw-alloca.ll @@ -1,14 +1,12 @@ -; RUN: llvm-as < %s | llc -o %t -f -; RUN: grep __alloca %t | count 2 -; RUN: grep 4294967288 %t -; RUN: grep {pushl %eax} %t -; RUN: grep 8028 %t | count 2 +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "i386-mingw32" +target triple = "i386-pc-mingw32" -define void @foo1(i32 %N) { +define void @foo1(i32 %N) nounwind { entry: +; CHECK: _foo1: +; CHECK: call __alloca %tmp14 = alloca i32, i32 %N ; <i32*> [#uses=1] call void @bar1( i32* %tmp14 ) ret void @@ -16,8 +14,13 @@ entry: declare void @bar1(i32*) -define void @foo2(i32 inreg %N) { +define void @foo2(i32 inreg %N) nounwind { entry: +; CHECK: _foo2: +; CHECK: andl $-16, %esp +; CHECK: pushl %eax +; CHECK: call __alloca +; CHECK: movl 8028(%esp), %eax %A2 = alloca [2000 x i32], align 16 ; <[2000 x i32]*> [#uses=1] %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0 ; <i32*> [#uses=1] call void @bar2( i32* %A2.sub, i32 %N ) diff --git a/test/CodeGen/X86/mmx-arg-passing.ll b/test/CodeGen/X86/mmx-arg-passing.ll index 9496cbb8bbb83..426e98e019bcb 100644 --- a/test/CodeGen/X86/mmx-arg-passing.ll +++ b/test/CodeGen/X86/mmx-arg-passing.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3 -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep mm0 | count 3 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | grep esp | count 1 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep xmm0 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep rdi +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | not grep movups ; ; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2]. ; On Darwin x86-32, v1i64 values are passed in memory. diff --git a/test/CodeGen/X86/mmx-arg-passing2.ll b/test/CodeGen/X86/mmx-arg-passing2.ll index aac614aa7b110..c42af082364c0 100644 --- a/test/CodeGen/X86/mmx-arg-passing2.ll +++ b/test/CodeGen/X86/mmx-arg-passing2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movq2dq | count 1 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | grep movdq2q | count 2 @g_v8qi = external global <8 x i8> diff --git a/test/CodeGen/X86/mmx-arith.ll b/test/CodeGen/X86/mmx-arith.ll index 501786ebc2257..e4dfdbfe1bb1a 100644 --- a/test/CodeGen/X86/mmx-arith.ll +++ b/test/CodeGen/X86/mmx-arith.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx +; RUN: llc < %s -march=x86 -mattr=+mmx ;; A basic sanity check to make sure that MMX arithmetic actually compiles. diff --git a/test/CodeGen/X86/mmx-bitcast-to-i64.ll b/test/CodeGen/X86/mmx-bitcast-to-i64.ll index c6bb48927b694..1fd8f67a0cccd 100644 --- a/test/CodeGen/X86/mmx-bitcast-to-i64.ll +++ b/test/CodeGen/X86/mmx-bitcast-to-i64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4 +; RUN: llc < %s -march=x86-64 | grep movd | count 4 define i64 @foo(<1 x i64>* %p) { %t = load <1 x i64>* %p diff --git a/test/CodeGen/X86/mmx-copy-gprs.ll b/test/CodeGen/X86/mmx-copy-gprs.ll index 2047ce75e5705..3607043e94fcc 100644 --- a/test/CodeGen/X86/mmx-copy-gprs.ll +++ b/test/CodeGen/X86/mmx-copy-gprs.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax} -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movsd.(%eax),} +; RUN: llc < %s -march=x86-64 | grep {movq.*(%rsi), %rax} +; RUN: llc < %s -march=x86 -mattr=-sse2 | grep {movl.*4(%eax),} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movsd.(%eax),} ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs, ; increases the places that need to use emms. diff --git a/test/CodeGen/X86/mmx-emms.ll b/test/CodeGen/X86/mmx-emms.ll index 60ba84d8728df..5ff2588da6991 100644 --- a/test/CodeGen/X86/mmx-emms.ll +++ b/test/CodeGen/X86/mmx-emms.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms +; RUN: llc < %s -march=x86 -mattr=+mmx | grep emms define void @foo() { entry: call void @llvm.x86.mmx.emms( ) diff --git a/test/CodeGen/X86/mmx-insert-element.ll b/test/CodeGen/X86/mmx-insert-element.ll index 0aa476dba80e6..a063ee1d6cf40 100644 --- a/test/CodeGen/X86/mmx-insert-element.ll +++ b/test/CodeGen/X86/mmx-insert-element.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | not grep movq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psllq +; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movq +; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq define <2 x i32> @qux(i32 %A) nounwind { %tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1] diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll index f1d04fa46cadb..3af09f4998d39 100644 --- a/test/CodeGen/X86/mmx-pinsrw.ll +++ b/test/CodeGen/X86/mmx-pinsrw.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep pinsrw | count 1 +; RUN: llc < %s -march=x86 -mattr=+mmx | grep pinsrw | count 1 ; PR2562 external global i16 ; <i16*>:0 [#uses=1] diff --git a/test/CodeGen/X86/mmx-punpckhdq.ll b/test/CodeGen/X86/mmx-punpckhdq.ll index 126fc9d13be95..0af7e017b626b 100644 --- a/test/CodeGen/X86/mmx-punpckhdq.ll +++ b/test/CodeGen/X86/mmx-punpckhdq.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep punpckhdq | count 1 +; RUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1 define void @bork(<1 x i64>* %x) { entry: diff --git a/test/CodeGen/X86/mmx-s2v.ll b/test/CodeGen/X86/mmx-s2v.ll index 4ec2403e34176..c98023c0f4177 100644 --- a/test/CodeGen/X86/mmx-s2v.ll +++ b/test/CodeGen/X86/mmx-s2v.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx +; RUN: llc < %s -march=x86 -mattr=+mmx ; PR2574 define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) {; <label>:0 diff --git a/test/CodeGen/X86/mmx-shift.ll b/test/CodeGen/X86/mmx-shift.ll index 277cf075cb930..dd0aa2ca31f48 100644 --- a/test/CodeGen/X86/mmx-shift.ll +++ b/test/CodeGen/X86/mmx-shift.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psllq | grep 32 -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psllq | grep 32 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep psrad -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep psrlw +; RUN: llc < %s -march=x86 -mattr=+mmx | grep psllq | grep 32 +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psllq | grep 32 +; RUN: llc < %s -march=x86 -mattr=+mmx | grep psrad +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep psrlw define i64 @t1(<1 x i64> %mm1) nounwind { entry: diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll index 4b91cb9019393..e3125c7345b88 100644 --- a/test/CodeGen/X86/mmx-shuffle.ll +++ b/test/CodeGen/X86/mmx-shuffle.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah +; RUN: llc < %s -mcpu=yonah ; PR1427 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/X86/mmx-vzmovl-2.ll b/test/CodeGen/X86/mmx-vzmovl-2.ll index 4dd1e47394fdd..8253c200323c6 100644 --- a/test/CodeGen/X86/mmx-vzmovl-2.ll +++ b/test/CodeGen/X86/mmx-vzmovl-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep pxor -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep punpckldq +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq %struct.vS1024 = type { [8 x <4 x i32>] } %struct.vS512 = type { [4 x <4 x i32>] } diff --git a/test/CodeGen/X86/mmx-vzmovl.ll b/test/CodeGen/X86/mmx-vzmovl.ll index 95f95794531f3..d21e2404882d2 100644 --- a/test/CodeGen/X86/mmx-vzmovl.ll +++ b/test/CodeGen/X86/mmx-vzmovl.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movd -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep movq +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movd +; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind { entry: diff --git a/test/CodeGen/X86/movfs.ll b/test/CodeGen/X86/movfs.ll index af102d49569f8..823e98689e7d7 100644 --- a/test/CodeGen/X86/movfs.ll +++ b/test/CodeGen/X86/movfs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep fs +; RUN: llc < %s -march=x86 | grep fs define i32 @foo() nounwind readonly { entry: diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index f621849e5b06e..b04048b92c133 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep gs +; RUN: llc < %s -march=x86 | grep gs define i32 @foo() nounwind readonly { entry: diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll index 487614f74ddf0..eca9e6f436c29 100644 --- a/test/CodeGen/X86/mul-legalize.ll +++ b/test/CodeGen/X86/mul-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep 24576 +; RUN: llc < %s -march=x86 | grep 24576 ; PR2135 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/CodeGen/X86/mul-remat.ll b/test/CodeGen/X86/mul-remat.ll index ffc8cc0ba6bc4..3fa005079de7e 100644 --- a/test/CodeGen/X86/mul-remat.ll +++ b/test/CodeGen/X86/mul-remat.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1 +; RUN: llc < %s -march=x86 | grep mov | count 1 ; PR1874 define i32 @test(i32 %a, i32 %b) { diff --git a/test/CodeGen/X86/mul-shift-reassoc.ll b/test/CodeGen/X86/mul-shift-reassoc.ll index f0ecb5bd08ee2..3777d8b8cfb4f 100644 --- a/test/CodeGen/X86/mul-shift-reassoc.ll +++ b/test/CodeGen/X86/mul-shift-reassoc.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep lea -; RUN: llvm-as < %s | llc -march=x86 | not grep add +; RUN: llc < %s -march=x86 | grep lea +; RUN: llc < %s -march=x86 | not grep add define i32 @test(i32 %X, i32 %Y) { ; Push the shl through the mul to allow an LEA to be formed, instead diff --git a/test/CodeGen/X86/mul128.ll b/test/CodeGen/X86/mul128.ll index c0ce6b309315f..6825b99f2425e 100644 --- a/test/CodeGen/X86/mul128.ll +++ b/test/CodeGen/X86/mul128.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mul | count 3 +; RUN: llc < %s -march=x86-64 | grep mul | count 3 define i128 @foo(i128 %t, i128 %u) { %k = mul i128 %t, %u diff --git a/test/CodeGen/X86/mul64.ll b/test/CodeGen/X86/mul64.ll index cd0f802a711e4..5a25c5d0e9dea 100644 --- a/test/CodeGen/X86/mul64.ll +++ b/test/CodeGen/X86/mul64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 3 +; RUN: llc < %s -march=x86 | grep mul | count 3 define i64 @foo(i64 %t, i64 %u) { %k = mul i64 %t, %u diff --git a/test/CodeGen/X86/multiple-return-values-cross-block.ll b/test/CodeGen/X86/multiple-return-values-cross-block.ll index f632b8744335e..e9837d0ebbf5c 100644 --- a/test/CodeGen/X86/multiple-return-values-cross-block.ll +++ b/test/CodeGen/X86/multiple-return-values-cross-block.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 declare {x86_fp80, x86_fp80} @test() diff --git a/test/CodeGen/X86/multiple-return-values.ll b/test/CodeGen/X86/multiple-return-values.ll index 5f7a83f884585..018d997599a97 100644 --- a/test/CodeGen/X86/multiple-return-values.ll +++ b/test/CodeGen/X86/multiple-return-values.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 define {i64, float} @bar(i64 %a, float %b) { %y = add i64 %a, 7 diff --git a/test/CodeGen/X86/nancvt.ll b/test/CodeGen/X86/nancvt.ll index 96cac0dc329aa..0b56644f125a4 100644 --- a/test/CodeGen/X86/nancvt.ll +++ b/test/CodeGen/X86/nancvt.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -std-compile-opts | llc > %t +; RUN: opt < %s -std-compile-opts | llc > %t ; RUN: grep 2147027116 %t | count 3 ; RUN: grep 2147228864 %t | count 3 ; RUN: grep 2146502828 %t | count 3 diff --git a/test/CodeGen/X86/narrow_op-1.ll b/test/CodeGen/X86/narrow_op-1.ll index 0ee11b495585f..18f110821bd56 100644 --- a/test/CodeGen/X86/narrow_op-1.ll +++ b/test/CodeGen/X86/narrow_op-1.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep orb | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep orb | grep 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep orl | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep orl | grep 16842752 +; RUN: llc < %s -march=x86-64 | grep orb | count 1 +; RUN: llc < %s -march=x86-64 | grep orb | grep 1 +; RUN: llc < %s -march=x86-64 | grep orl | count 1 +; RUN: llc < %s -march=x86-64 | grep orl | grep 16842752 %struct.bf = type { i64, i16, i16, i32 } @bfi = common global %struct.bf zeroinitializer, align 16 diff --git a/test/CodeGen/X86/narrow_op-2.ll b/test/CodeGen/X86/narrow_op-2.ll index b441794f42f98..796ef7a29e498 100644 --- a/test/CodeGen/X86/narrow_op-2.ll +++ b/test/CodeGen/X86/narrow_op-2.ll @@ -1,12 +1,14 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 254 -; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 253 +; RUN: llc < %s -march=x86-64 | FileCheck %s %struct.bf = type { i64, i16, i16, i32 } @bfi = external global %struct.bf* define void @t1() nounwind ssp { entry: + +; CHECK: andb $-2, 10( +; CHECK: andb $-3, 10( + %0 = load %struct.bf** @bfi, align 8 %1 = getelementptr %struct.bf* %0, i64 0, i32 1 %2 = bitcast i16* %1 to i32* diff --git a/test/CodeGen/X86/neg_fp.ll b/test/CodeGen/X86/neg_fp.ll index 1a7ee085b5de2..57164f2bcaf9c 100644 --- a/test/CodeGen/X86/neg_fp.ll +++ b/test/CodeGen/X86/neg_fp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t ; RUN: grep xorps %t | count 1 ; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization @@ -9,4 +9,4 @@ entry: %sub = fsub float %a, %b ; <float> [#uses=1] %neg = fsub float -0.000000e+00, %sub ; <float> [#uses=1] ret float %neg -}
\ No newline at end of file +} diff --git a/test/CodeGen/X86/negate-add-zero.ll b/test/CodeGen/X86/negate-add-zero.ll index 689639f5f06db..c3f412e09ae86 100644 --- a/test/CodeGen/X86/negate-add-zero.ll +++ b/test/CodeGen/X86/negate-add-zero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86 | not grep xor +; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | not grep xor ; PR3374 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/negative-sin.ll b/test/CodeGen/X86/negative-sin.ll index 8cc1bec2d1f99..7842eb8456eb4 100644 --- a/test/CodeGen/X86/negative-sin.ll +++ b/test/CodeGen/X86/negative-sin.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -enable-unsafe-fp-math -march=x86-64 | \ +; RUN: llc < %s -enable-unsafe-fp-math -march=x86-64 | \ ; RUN: not egrep {addsd|subsd|xor} declare double @sin(double %f) @@ -6,7 +6,7 @@ declare double @sin(double %f) define double @foo(double %e) { %f = fsub double 0.0, %e - %g = call double @sin(double %f) + %g = call double @sin(double %f) readonly %h = fsub double 0.0, %g ret double %h } diff --git a/test/CodeGen/X86/negative-subscript.ll b/test/CodeGen/X86/negative-subscript.ll index f2bd315bd8679..28f7d6b2dbae9 100644 --- a/test/CodeGen/X86/negative-subscript.ll +++ b/test/CodeGen/X86/negative-subscript.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; rdar://6559995 @a = external global [255 x i8*], align 32 diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll index 3c47b8f1fddd3..29474c21f2444 100644 --- a/test/CodeGen/X86/negative_zero.ll +++ b/test/CodeGen/X86/negative_zero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=-sse2,-sse3 | grep fchs +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs define double @T() { diff --git a/test/CodeGen/X86/nobt.ll b/test/CodeGen/X86/nobt.ll index 55294280f5c85..35090e372916e 100644 --- a/test/CodeGen/X86/nobt.ll +++ b/test/CodeGen/X86/nobt.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep btl +; RUN: llc < %s -march=x86 | not grep btl ; This tests some cases where BT must not be generated. See also bt.ll. ; Fixes 20040709-[12].c in gcc testsuite. diff --git a/test/CodeGen/X86/nofence.ll b/test/CodeGen/X86/nofence.ll index 132ac9437da99..244d2e9780de9 100644 --- a/test/CodeGen/X86/nofence.ll +++ b/test/CodeGen/X86/nofence.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep fence +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep fence declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1) diff --git a/test/CodeGen/X86/omit-label.ll b/test/CodeGen/X86/omit-label.ll index 457b66b35dca4..0ec03ebace896 100644 --- a/test/CodeGen/X86/omit-label.ll +++ b/test/CodeGen/X86/omit-label.ll @@ -1,7 +1,11 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep BB1_1: +; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-linux-gnu | FileCheck %s ; PR4126 +; PR4732 -; Don't omit this label's definition. +; Don't omit these labels' definitions. + +; CHECK: bux: +; CHECK: LBB1_1: define void @bux(i32 %p_53) nounwind optsize { entry: @@ -21,3 +25,33 @@ bb3: ; preds = %bb.i, %entry } declare i32 @baz(...) + +; Don't omit this label in the assembly output. +; CHECK: int321: +; CHECK: LBB2_1 +; CHECK: LBB2_1 +; CHECK: LBB2_1: + +define void @int321(i8 signext %p_103, i32 %uint8p_104) nounwind readnone { +entry: + %tobool = icmp eq i8 %p_103, 0 ; <i1> [#uses=1] + %cmp.i = icmp sgt i8 %p_103, 0 ; <i1> [#uses=1] + %or.cond = and i1 %tobool, %cmp.i ; <i1> [#uses=1] + br i1 %or.cond, label %land.end.i, label %for.cond.preheader + +land.end.i: ; preds = %entry + %conv3.i = sext i8 %p_103 to i32 ; <i32> [#uses=1] + %div.i = sdiv i32 1, %conv3.i ; <i32> [#uses=1] + %tobool.i = icmp eq i32 %div.i, -2147483647 ; <i1> [#uses=0] + br label %for.cond.preheader + +for.cond.preheader: ; preds = %land.end.i, %entry + %cmp = icmp sgt i8 %p_103, 1 ; <i1> [#uses=1] + br i1 %cmp, label %for.end.split, label %for.cond + +for.cond: ; preds = %for.cond.preheader, %for.cond + br label %for.cond + +for.end.split: ; preds = %for.cond.preheader + ret void +} diff --git a/test/CodeGen/X86/opt-ext-uses.ll b/test/CodeGen/X86/opt-ext-uses.ll index 322850c5523f3..fa2aef517477b 100644 --- a/test/CodeGen/X86/opt-ext-uses.ll +++ b/test/CodeGen/X86/opt-ext-uses.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movw | count 1 +; RUN: llc < %s -march=x86 | grep movw | count 1 define i16 @t() signext { entry: diff --git a/test/CodeGen/X86/optimize-max-0.ll b/test/CodeGen/X86/optimize-max-0.ll index 90c14565e9a65..162c7a568fdf4 100644 --- a/test/CodeGen/X86/optimize-max-0.ll +++ b/test/CodeGen/X86/optimize-max-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep cmov +; RUN: llc < %s -march=x86 | not grep cmov ; LSR should be able to eliminate the max computations by ; making the loops use slt/ult comparisons instead of ne comparisons. diff --git a/test/CodeGen/X86/optimize-max-1.ll b/test/CodeGen/X86/optimize-max-1.ll index 084e1818f5ddd..ad6c24dce009b 100644 --- a/test/CodeGen/X86/optimize-max-1.ll +++ b/test/CodeGen/X86/optimize-max-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep cmov +; RUN: llc < %s -march=x86-64 | not grep cmov ; LSR should be able to eliminate both smax and umax expressions ; in loop trip counts. diff --git a/test/CodeGen/X86/optimize-max-2.ll b/test/CodeGen/X86/optimize-max-2.ll index effc3fc737d9e..8851c5b1a3056 100644 --- a/test/CodeGen/X86/optimize-max-2.ll +++ b/test/CodeGen/X86/optimize-max-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep cmov %t | count 2 ; RUN: grep jne %t | count 1 diff --git a/test/CodeGen/X86/or-branch.ll b/test/CodeGen/X86/or-branch.ll index 20886d5793cab..9ebf8901b77c0 100644 --- a/test/CodeGen/X86/or-branch.ll +++ b/test/CodeGen/X86/or-branch.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep set +; RUN: llc < %s -march=x86 | not grep set define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind { entry: diff --git a/test/CodeGen/X86/overlap-shift.ll b/test/CodeGen/X86/overlap-shift.ll index 7584a70b5a7d3..c1fc041e7d9b9 100644 --- a/test/CodeGen/X86/overlap-shift.ll +++ b/test/CodeGen/X86/overlap-shift.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: not grep {mov E.X, E.X} @G = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/packed_struct.ll b/test/CodeGen/X86/packed_struct.ll index 2a781e7e546be..da6e8f8745fef 100644 --- a/test/CodeGen/X86/packed_struct.ll +++ b/test/CodeGen/X86/packed_struct.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep foos+5 %t ; RUN: grep foos+1 %t ; RUN: grep foos+9 %t @@ -15,7 +15,7 @@ target triple = "i686-pc-linux-gnu" @foos = external global %struct.anon ; <%struct.anon*> [#uses=3] @bara = weak global [4 x <{ i32, i8 }>] zeroinitializer ; <[4 x <{ i32, i8 }>]*> [#uses=2] -define i32 @foo() { +define i32 @foo() nounwind { entry: %tmp = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 1) ; <i32> [#uses=1] %tmp3 = load i32* getelementptr (%struct.anon* @foos, i32 0, i32 2) ; <i32> [#uses=1] @@ -25,7 +25,7 @@ entry: ret i32 %tmp7 } -define i8 @bar() { +define i8 @bar() nounwind { entry: %tmp = load i8* getelementptr ([4 x <{ i32, i8 }>]* @bara, i32 0, i32 0, i32 1) ; <i8> [#uses=1] %tmp4 = load i8* getelementptr ([4 x <{ i32, i8 }>]* @bara, i32 0, i32 3, i32 1) ; <i8> [#uses=1] diff --git a/test/CodeGen/X86/peep-test-0.ll b/test/CodeGen/X86/peep-test-0.ll index 8dcd23ae735df..e521d8e37854c 100644 --- a/test/CodeGen/X86/peep-test-0.ll +++ b/test/CodeGen/X86/peep-test-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep cmp %t ; RUN: not grep test %t diff --git a/test/CodeGen/X86/peep-test-1.ll b/test/CodeGen/X86/peep-test-1.ll index 85e3bf251133f..f83f0f6aa6ff8 100644 --- a/test/CodeGen/X86/peep-test-1.ll +++ b/test/CodeGen/X86/peep-test-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep dec %t | count 1 ; RUN: not grep test %t ; RUN: not grep cmp %t diff --git a/test/CodeGen/X86/peep-test-2.ll b/test/CodeGen/X86/peep-test-2.ll index 788f610365cc0..274517297592b 100644 --- a/test/CodeGen/X86/peep-test-2.ll +++ b/test/CodeGen/X86/peep-test-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep testl +; RUN: llc < %s -march=x86 | grep testl ; It's tempting to eliminate the testl instruction here and just use the ; EFLAGS value from the incl, however it can't be known whether the add diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll new file mode 100644 index 0000000000000..13a69edea57f0 --- /dev/null +++ b/test/CodeGen/X86/peep-test-3.ll @@ -0,0 +1,89 @@ +; RUN: llc < %s -march=x86 | FileCheck %s +; rdar://7226797 + +; LLVM should omit the testl and use the flags result from the orl. + +; CHECK: or: +define void @or(float* %A, i32 %IA, i32 %N) nounwind { +entry: + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: orl %ecx, %edx +; CHECK-NEXT: je + %3 = or i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* %A, align 4 + ret void + +return: ; preds = %entry + ret void +} +; CHECK: xor: +define void @xor(float* %A, i32 %IA, i32 %N) nounwind { +entry: + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] +; CHECK: xorl $1, %e +; CHECK-NEXT: je + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] + %3 = xor i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* %A, align 4 + ret void + +return: ; preds = %entry + ret void +} +; CHECK: and: +define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { +entry: + store i8 0, i8* %p + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: andl $3, % +; CHECK-NEXT: movb % +; CHECK-NEXT: je + %3 = and i32 %2, %1 ; <i32> [#uses=1] + %t = trunc i32 %3 to i8 + store i8 %t, i8* %p + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* null, align 4 + ret void + +return: ; preds = %entry + ret void +} + +; Just like @and, but without the trunc+store. This should use a testl +; instead of an andl. +; CHECK: test: +define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind { +entry: + store i8 0, i8* %p + %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] + %1 = and i32 %0, 3 ; <i32> [#uses=1] + %2 = xor i32 %IA, 1 ; <i32> [#uses=1] +; CHECK: testb $3, % +; CHECK-NEXT: je + %3 = and i32 %2, %1 ; <i32> [#uses=1] + %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] + br i1 %4, label %return, label %bb + +bb: ; preds = %entry + store float 0.000000e+00, float* null, align 4 + ret void + +return: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/peep-vector-extract-concat.ll b/test/CodeGen/X86/peep-vector-extract-concat.ll index e6c88bbff9d5e..e4ab2b5e05a42 100644 --- a/test/CodeGen/X86/peep-vector-extract-concat.ll +++ b/test/CodeGen/X86/peep-vector-extract-concat.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0} +; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep {pshufd \$3, %xmm0, %xmm0} define float @foo(<8 x float> %a) nounwind { %c = extractelement <8 x float> %a, i32 3 diff --git a/test/CodeGen/X86/peep-vector-extract-insert.ll b/test/CodeGen/X86/peep-vector-extract-insert.ll index 77332d02a9338..5e18044e7e1b8 100644 --- a/test/CodeGen/X86/peep-vector-extract-insert.ll +++ b/test/CodeGen/X86/peep-vector-extract-insert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2 +; RUN: llc < %s -march=x86-64 | grep {pxor %xmm0, %xmm0} | count 2 define float @foo(<4 x float> %a) { %b = insertelement <4 x float> %a, float 0.0, i32 3 diff --git a/test/CodeGen/X86/personality.ll b/test/CodeGen/X86/personality.ll new file mode 100644 index 0000000000000..5acf04cc06c10 --- /dev/null +++ b/test/CodeGen/X86/personality.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32 +; PR1632 + +define void @_Z1fv() { +entry: + invoke void @_Z1gv( ) + to label %return unwind label %unwind + +unwind: ; preds = %entry + br i1 false, label %eh_then, label %cleanup20 + +eh_then: ; preds = %unwind + invoke void @__cxa_end_catch( ) + to label %return unwind label %unwind10 + +unwind10: ; preds = %eh_then + %eh_select13 = tail call i64 (i8*, i8*, ...)* @llvm.eh.selector.i64( i8* null, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i32 1 ) ; <i32> [#uses=2] + %tmp18 = icmp slt i64 %eh_select13, 0 ; <i1> [#uses=1] + br i1 %tmp18, label %filter, label %cleanup20 + +filter: ; preds = %unwind10 + unreachable + +cleanup20: ; preds = %unwind10, %unwind + %eh_selector.0 = phi i64 [ 0, %unwind ], [ %eh_select13, %unwind10 ] ; <i32> [#uses=0] + ret void + +return: ; preds = %eh_then, %entry + ret void +} + +declare void @_Z1gv() + +declare i64 @llvm.eh.selector.i64(i8*, i8*, ...) + +declare void @__gxx_personality_v0() + +declare void @__cxa_end_catch() + +; X64: Leh_frame_common_begin: +; X64: .long ___gxx_personality_v0@GOTPCREL+4 + +; X32: Leh_frame_common_begin: +; X32: .long L___gxx_personality_v0$non_lazy_ptr- +; .... + +; X32: .section __IMPORT,__pointers,non_lazy_symbol_pointers +; X32: L___gxx_personality_v0$non_lazy_ptr: +; X32: .indirect_symbol ___gxx_personality_v0 diff --git a/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/test/CodeGen/X86/phys_subreg_coalesce-2.ll index 7ca3ea8e91467..23c509c9936bd 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce-2.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 5 +; RUN: llc < %s -march=x86 | grep mov | count 5 ; PR2659 define i32 @binomial(i32 %n, i32 %k) nounwind { diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll index 3bbc55da16ab9..2c855ce8da637 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl %struct.dpoint = type { double, double } diff --git a/test/CodeGen/X86/pic-load-remat.ll b/test/CodeGen/X86/pic-load-remat.ll index cb4e64044deda..77297521cd0d8 100644 --- a/test/CodeGen/X86/pic-load-remat.ll +++ b/test/CodeGen/X86/pic-load-remat.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb define void @f() nounwind { entry: diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll new file mode 100644 index 0000000000000..3a547f95f83fa --- /dev/null +++ b/test/CodeGen/X86/pic.ll @@ -0,0 +1,208 @@ +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false | FileCheck %s -check-prefix=LINUX + +@ptr = external global i32* +@dst = external global i32 +@src = external global i32 + +define void @test1() nounwind { +entry: + store i32* @dst, i32** @ptr + %tmp.s = load i32* @src + store i32 %tmp.s, i32* @dst + ret void + +; LINUX: test1: +; LINUX: call .L1$pb +; LINUX-NEXT: .L1$pb: +; LINUX-NEXT: popl +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref1-.L1$pb), +; LINUX: movl dst@GOT(%eax), +; LINUX: movl ptr@GOT(%eax), +; LINUX: movl src@GOT(%eax), +; LINUX: ret +} + +@ptr2 = global i32* null +@dst2 = global i32 0 +@src2 = global i32 0 + +define void @test2() nounwind { +entry: + store i32* @dst2, i32** @ptr2 + %tmp.s = load i32* @src2 + store i32 %tmp.s, i32* @dst2 + ret void + +; LINUX: test2: +; LINUX: call .L2$pb +; LINUX-NEXT: .L2$pb: +; LINUX-NEXT: popl +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref2-.L2$pb), %eax +; LINUX: movl dst2@GOT(%eax), +; LINUX: movl ptr2@GOT(%eax), +; LINUX: movl src2@GOT(%eax), +; LINUX: ret + +} + +declare i8* @malloc(i32) + +define void @test3() nounwind { +entry: + %ptr = call i8* @malloc(i32 40) + ret void +; LINUX: test3: +; LINUX: pushl %ebx +; LINUX-NEXT: subl $8, %esp +; LINUX-NEXT: call .L3$pb +; LINUX-NEXT: .L3$pb: +; LINUX-NEXT: popl %ebx +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref3-.L3$pb), %ebx +; LINUX: movl $40, (%esp) +; LINUX: call malloc@PLT +; LINUX: addl $8, %esp +; LINUX: popl %ebx +; LINUX: ret +} + +@pfoo = external global void(...)* + +define void @test4() nounwind { +entry: + %tmp = call void(...)*(...)* @afoo() + store void(...)* %tmp, void(...)** @pfoo + %tmp1 = load void(...)** @pfoo + call void(...)* %tmp1() + ret void +; LINUX: test4: +; LINUX: call .L4$pb +; LINUX-NEXT: .L4$pb: +; LINUX: popl +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref4-.L4$pb), +; LINUX: movl pfoo@GOT(%esi), +; LINUX: call afoo@PLT +; LINUX: call * +} + +declare void(...)* @afoo(...) + +define void @test5() nounwind { +entry: + call void(...)* @foo() + ret void +; LINUX: test5: +; LINUX: call .L5$pb +; LINUX: popl %ebx +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref5-.L5$pb), %ebx +; LINUX: call foo@PLT +} + +declare void @foo(...) + + +@ptr6 = internal global i32* null +@dst6 = internal global i32 0 +@src6 = internal global i32 0 + +define void @test6() nounwind { +entry: + store i32* @dst6, i32** @ptr6 + %tmp.s = load i32* @src6 + store i32 %tmp.s, i32* @dst6 + ret void + +; LINUX: test6: +; LINUX: call .L6$pb +; LINUX-NEXT: .L6$pb: +; LINUX-NEXT: popl %eax +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref6-.L6$pb), %eax +; LINUX: leal dst6@GOTOFF(%eax), %ecx +; LINUX: movl %ecx, ptr6@GOTOFF(%eax) +; LINUX: movl src6@GOTOFF(%eax), %ecx +; LINUX: movl %ecx, dst6@GOTOFF(%eax) +; LINUX: ret +} + + +;; Test constant pool references. +define double @test7(i32 %a.u) nounwind { +entry: + %tmp = icmp eq i32 %a.u,0 + %retval = select i1 %tmp, double 4.561230e+02, double 1.234560e+02 + ret double %retval + +; LINUX: .LCPI7_0: + +; LINUX: test7: +; LINUX: call .L7$pb +; LINUX: .L7$pb: +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref7-.L7$pb), +; LINUX: fldl .LCPI7_0@GOTOFF( +} + + +;; Test jump table references. +define void @test8(i32 %n.u) nounwind { +entry: + switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ] +bb: + tail call void(...)* @foo1() + ret void +bb1: + tail call void(...)* @foo2() + ret void +bb2: + tail call void(...)* @foo6() + ret void +bb3: + tail call void(...)* @foo3() + ret void +bb4: + tail call void(...)* @foo4() + ret void +bb5: + tail call void(...)* @foo5() + ret void +bb6: + tail call void(...)* @foo1() + ret void +bb7: + tail call void(...)* @foo2() + ret void +bb8: + tail call void(...)* @foo6() + ret void +bb9: + tail call void(...)* @foo3() + ret void +bb10: + tail call void(...)* @foo4() + ret void +bb11: + tail call void(...)* @foo5() + ret void +bb12: + tail call void(...)* @foo6() + ret void + +; LINUX: test8: +; LINUX: call .L8$pb +; LINUX: .L8$pb: +; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.Lpicbaseref8-.L8$pb), +; LINUX: addl .LJTI8_0@GOTOFF( +; LINUX: jmpl *%ecx + +; LINUX: .LJTI8_0: +; LINUX: .long .LBB8_2@GOTOFF +; LINUX: .long .LBB8_2@GOTOFF +; LINUX: .long .LBB8_7@GOTOFF +; LINUX: .long .LBB8_3@GOTOFF +; LINUX: .long .LBB8_7@GOTOFF +} + +declare void @foo1(...) +declare void @foo2(...) +declare void @foo6(...) +declare void @foo3(...) +declare void @foo4(...) +declare void @foo5(...) diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll index 04245d149a8c7..b3750c1e8e676 100644 --- a/test/CodeGen/X86/pic_jumptable.ll +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text -; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea -; RUN: llvm-as < %s | llc -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2 -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep 'lJTI' +; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | not grep -F .text +; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | not grep lea +; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | grep add | count 2 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI' ; rdar://6971437 declare void @_Z3bari(i32) diff --git a/test/CodeGen/X86/pmul.ll b/test/CodeGen/X86/pmul.ll index e00d1e50e49b2..e2746a8c0638e 100644 --- a/test/CodeGen/X86/pmul.ll +++ b/test/CodeGen/X86/pmul.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -stack-alignment=16 > %t +; RUN: llc < %s -march=x86 -mattr=sse41 -stack-alignment=16 > %t ; RUN: grep pmul %t | count 12 ; RUN: grep mov %t | count 12 diff --git a/test/CodeGen/X86/postalloc-coalescing.ll b/test/CodeGen/X86/postalloc-coalescing.ll index 9c44a5a7075d1..a171436543c6c 100644 --- a/test/CodeGen/X86/postalloc-coalescing.ll +++ b/test/CodeGen/X86/postalloc-coalescing.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3 +; RUN: llc < %s -march=x86 | grep mov | count 3 define fastcc i32 @_Z18yy_get_next_bufferv() { entry: diff --git a/test/CodeGen/X86/pr1462.ll b/test/CodeGen/X86/pr1462.ll index 7f9037a137dfd..62549a50356a3 100644 --- a/test/CodeGen/X86/pr1462.ll +++ b/test/CodeGen/X86/pr1462.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR1462 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64- diff --git a/test/CodeGen/X86/pr1489.ll b/test/CodeGen/X86/pr1489.ll index 10fa96a3b81d9..c9e24bfb13fa8 100644 --- a/test/CodeGen/X86/pr1489.ll +++ b/test/CodeGen/X86/pr1489.ll @@ -1,12 +1,12 @@ -; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3 -; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 3058016715 | count 1 +; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3 +; RUN: llc < %s -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1 ;; magic constants are 3.999f and half of 3.999 ; ModuleID = '1489.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" @.str = internal constant [13 x i8] c"%d %d %d %d\0A\00" ; <[13 x i8]*> [#uses=1] -define i32 @quux() { +define i32 @quux() nounwind { entry: %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] @@ -16,7 +16,7 @@ entry: declare i32 @lrintf(float) -define i32 @foo() { +define i32 @foo() nounwind { entry: %tmp1 = tail call i32 @lrint( double 3.999000e+00 ) ; <i32> [#uses=1] %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] @@ -26,7 +26,7 @@ entry: declare i32 @lrint(double) -define i32 @bar() { +define i32 @bar() nounwind { entry: %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] @@ -34,7 +34,7 @@ entry: ret i32 %tmp23 } -define i32 @baz() { +define i32 @baz() nounwind { entry: %tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1] %tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1] @@ -42,7 +42,7 @@ entry: ret i32 %tmp23 } -define i32 @main() { +define i32 @main() nounwind { entry: %tmp = tail call i32 @baz( ) ; <i32> [#uses=1] %tmp1 = tail call i32 @bar( ) ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/pr1505.ll b/test/CodeGen/X86/pr1505.ll index e9e3d9060958d..883a806f38dec 100644 --- a/test/CodeGen/X86/pr1505.ll +++ b/test/CodeGen/X86/pr1505.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=i486 | not grep fldl +; RUN: llc < %s -mcpu=i486 | not grep fldl ; PR1505 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll index c70e32760216f..12736cda4cd28 100644 --- a/test/CodeGen/X86/pr1505b.ll +++ b/test/CodeGen/X86/pr1505b.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstpl | count 4 -; RUN: llvm-as < %s | llc -mcpu=i486 | grep fstps | count 3 +; RUN: llc < %s -mcpu=i486 | grep fstpl | count 4 +; RUN: llc < %s -mcpu=i486 | grep fstps | count 3 ; PR1505 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/X86/pr2177.ll b/test/CodeGen/X86/pr2177.ll index b03c99095725a..e941bf7fdabe2 100644 --- a/test/CodeGen/X86/pr2177.ll +++ b/test/CodeGen/X86/pr2177.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2177 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/pr2182.ll b/test/CodeGen/X86/pr2182.ll index f65725db8bdc5..f97663c6c1ffe 100644 --- a/test/CodeGen/X86/pr2182.ll +++ b/test/CodeGen/X86/pr2182.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {addl \$3, (%eax)} | count 4 +; RUN: llc < %s | grep {addl \$3, (%eax)} | count 4 ; PR2182 target datalayout = diff --git a/test/CodeGen/X86/pr2326.ll b/test/CodeGen/X86/pr2326.ll index 6cf750c6d4b06..f82dcb5d678ff 100644 --- a/test/CodeGen/X86/pr2326.ll +++ b/test/CodeGen/X86/pr2326.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep sete +; RUN: llc < %s -march=x86 | grep sete ; PR2326 define i32 @func_59(i32 %p_60) nounwind { diff --git a/test/CodeGen/X86/pr2623.ll b/test/CodeGen/X86/pr2623.ll index 51c86b75dd2d0..5d0eb5da2155b 100644 --- a/test/CodeGen/X86/pr2623.ll +++ b/test/CodeGen/X86/pr2623.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2623 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/pr2656.ll b/test/CodeGen/X86/pr2656.ll index 96976b8e466aa..afd71143c4588 100644 --- a/test/CodeGen/X86/pr2656.ll +++ b/test/CodeGen/X86/pr2656.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {xorps.\*sp} | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {xorps.\*sp} | count 1 ; PR2656 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/pr2659.ll b/test/CodeGen/X86/pr2659.ll index 00e6e7bd8303e..0760e4c7fd5b4 100644 --- a/test/CodeGen/X86/pr2659.ll +++ b/test/CodeGen/X86/pr2659.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5 +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 | grep movl | count 5 ; PR2659 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/pr2849.ll b/test/CodeGen/X86/pr2849.ll index 673598fe72493..0fec4813e1096 100644 --- a/test/CodeGen/X86/pr2849.ll +++ b/test/CodeGen/X86/pr2849.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2849 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/pr2924.ll b/test/CodeGen/X86/pr2924.ll index 2cab563116595..b9e8dc1740d96 100644 --- a/test/CodeGen/X86/pr2924.ll +++ b/test/CodeGen/X86/pr2924.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR2924 target datalayout = diff --git a/test/CodeGen/X86/pr2982.ll b/test/CodeGen/X86/pr2982.ll index f5dc1f4b9a410..3f9a5953153b6 100644 --- a/test/CodeGen/X86/pr2982.ll +++ b/test/CodeGen/X86/pr2982.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR2982 target datalayout = diff --git a/test/CodeGen/X86/pr3154.ll b/test/CodeGen/X86/pr3154.ll index 73f51018817ac..18df97c723027 100644 --- a/test/CodeGen/X86/pr3154.ll +++ b/test/CodeGen/X86/pr3154.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mattr=+sse2 -; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 +; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -disable-fp-elim ; PR3154 define void @ff_flac_compute_autocorr_sse2(i32* %data, i32 %len, i32 %lag, double* %autoc) nounwind { diff --git a/test/CodeGen/X86/pr3216.ll b/test/CodeGen/X86/pr3216.ll index fdc814ef33761..38c9f324ccac4 100644 --- a/test/CodeGen/X86/pr3216.ll +++ b/test/CodeGen/X86/pr3216.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {sar. \$5} +; RUN: llc < %s -march=x86 | grep {sar. \$5} @foo = global i8 127 diff --git a/test/CodeGen/X86/pr3241.ll b/test/CodeGen/X86/pr3241.ll index 665a763f34f1e..2f7917b77c392 100644 --- a/test/CodeGen/X86/pr3241.ll +++ b/test/CodeGen/X86/pr3241.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3241 @g_620 = external global i32 diff --git a/test/CodeGen/X86/pr3243.ll b/test/CodeGen/X86/pr3243.ll index 7be887b38e485..483b5bf3a2a69 100644 --- a/test/CodeGen/X86/pr3243.ll +++ b/test/CodeGen/X86/pr3243.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3243 declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize diff --git a/test/CodeGen/X86/pr3244.ll b/test/CodeGen/X86/pr3244.ll index 0765f86405c55..2598c2f976b2d 100644 --- a/test/CodeGen/X86/pr3244.ll +++ b/test/CodeGen/X86/pr3244.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3244 @g_62 = external global i16 ; <i16*> [#uses=1] diff --git a/test/CodeGen/X86/pr3250.ll b/test/CodeGen/X86/pr3250.ll index dce154f1855c9..cccbf54bcc6b4 100644 --- a/test/CodeGen/X86/pr3250.ll +++ b/test/CodeGen/X86/pr3250.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3250 declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind diff --git a/test/CodeGen/X86/pr3317.ll b/test/CodeGen/X86/pr3317.ll index aa5ee7ce7c8dc..9d6626b324d54 100644 --- a/test/CodeGen/X86/pr3317.ll +++ b/test/CodeGen/X86/pr3317.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 ; PR3317 %ArraySInt16 = type { %JavaObject, i8*, [0 x i16] } diff --git a/test/CodeGen/X86/pr3366.ll b/test/CodeGen/X86/pr3366.ll index a6f3e92676ae5..f813e2e58801a 100644 --- a/test/CodeGen/X86/pr3366.ll +++ b/test/CodeGen/X86/pr3366.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movzbl +; RUN: llc < %s -march=x86 | grep movzbl ; PR3366 define void @_ada_c34002a() nounwind { diff --git a/test/CodeGen/X86/pr3457.ll b/test/CodeGen/X86/pr3457.ll index d4a98103ecc58..f7af927d61364 100644 --- a/test/CodeGen/X86/pr3457.ll +++ b/test/CodeGen/X86/pr3457.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | not grep fstpt +; RUN: llc < %s -mtriple=i386-apple-darwin | not grep fstpt ; PR3457 ; rdar://6548010 diff --git a/test/CodeGen/X86/pr3495-2.ll b/test/CodeGen/X86/pr3495-2.ll index f67ff75d46ae8..1372a1522bd42 100644 --- a/test/CodeGen/X86/pr3495-2.ll +++ b/test/CodeGen/X86/pr3495-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of reloads omited} +; RUN: llc < %s -march=x86 -relocation-model=pic -disable-fp-elim -stats |& grep {Number of reloads omited} target triple = "i386-apple-darwin9.6" %struct.constraintVCGType = type { i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/pr3495.ll b/test/CodeGen/X86/pr3495.ll index ca6204c101e9a..4b62bf40da4bf 100644 --- a/test/CodeGen/X86/pr3495.ll +++ b/test/CodeGen/X86/pr3495.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of reloads omited} | grep 2 -; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep {Number of available reloads turned into copies} -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {Number of machine instrs printed} | grep 39 +; RUN: llc < %s -march=x86 -stats |& grep {Number of reloads omited} | grep 1 +; RUN: llc < %s -march=x86 -stats |& grep {Number of available reloads turned into copies} | grep 1 +; RUN: llc < %s -march=x86 -stats |& grep {Number of machine instrs printed} | grep 40 ; PR3495 ; The loop reversal kicks in once here, resulting in one fewer instruction. diff --git a/test/CodeGen/X86/pr3522.ll b/test/CodeGen/X86/pr3522.ll index f743700fd2516..7cdeaa099271b 100644 --- a/test/CodeGen/X86/pr3522.ll +++ b/test/CodeGen/X86/pr3522.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& not grep machine-sink +; RUN: llc < %s -march=x86 -stats |& not grep machine-sink ; PR3522 target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/pre-split1.ll b/test/CodeGen/X86/pre-split1.ll index 4f9a5820e043d..e89b507414eb6 100644 --- a/test/CodeGen/X86/pre-split1.ll +++ b/test/CodeGen/X86/pre-split1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 ; XFAIL: * diff --git a/test/CodeGen/X86/pre-split10.ll b/test/CodeGen/X86/pre-split10.ll index 60297e9a5dc67..db039bd97acdf 100644 --- a/test/CodeGen/X86/pre-split10.ll +++ b/test/CodeGen/X86/pre-split10.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split define i32 @main(i32 %argc, i8** %argv) nounwind { entry: diff --git a/test/CodeGen/X86/pre-split11.ll b/test/CodeGen/X86/pre-split11.ll new file mode 100644 index 0000000000000..0a9f4e33f34c1 --- /dev/null +++ b/test/CodeGen/X86/pre-split11.ll @@ -0,0 +1,34 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split | FileCheck %s + +@.str = private constant [28 x i8] c"\0A\0ADOUBLE D = %f\0A\00", align 1 ; <[28 x i8]*> [#uses=1] +@.str1 = private constant [37 x i8] c"double to long l1 = %ld\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1] +@.str2 = private constant [35 x i8] c"double to uint ui1 = %u\09\09(0x%x)\0A\00", align 8 ; <[35 x i8]*> [#uses=1] +@.str3 = private constant [37 x i8] c"double to ulong ul1 = %lu\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1] + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { +; CHECK: movsd %xmm0, (%rsp) +entry: + %0 = icmp sgt i32 %argc, 4 ; <i1> [#uses=1] + br i1 %0, label %bb, label %bb2 + +bb: ; preds = %entry + %1 = getelementptr inbounds i8** %argv, i64 4 ; <i8**> [#uses=1] + %2 = load i8** %1, align 8 ; <i8*> [#uses=1] + %3 = tail call double @atof(i8* %2) nounwind ; <double> [#uses=1] + br label %bb2 + +bb2: ; preds = %bb, %entry + %storemerge = phi double [ %3, %bb ], [ 2.000000e+00, %entry ] ; <double> [#uses=4] + %4 = fptoui double %storemerge to i32 ; <i32> [#uses=2] + %5 = fptoui double %storemerge to i64 ; <i64> [#uses=2] + %6 = fptosi double %storemerge to i64 ; <i64> [#uses=2] + %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i64 0, i64 0), double %storemerge) nounwind ; <i32> [#uses=0] + %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i64 0, i64 0), i64 %6, i64 %6) nounwind ; <i32> [#uses=0] + %9 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([35 x i8]* @.str2, i64 0, i64 0), i32 %4, i32 %4) nounwind ; <i32> [#uses=0] + %10 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str3, i64 0, i64 0), i64 %5, i64 %5) nounwind ; <i32> [#uses=0] + ret i32 0 +} + +declare double @atof(i8* nocapture) nounwind readonly + +declare i32 @printf(i8* nocapture, ...) nounwind diff --git a/test/CodeGen/X86/pre-split2.ll b/test/CodeGen/X86/pre-split2.ll index 2009ad8b66d89..ba902f95513d2 100644 --- a/test/CodeGen/X86/pre-split2.ll +++ b/test/CodeGen/X86/pre-split2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | count 2 define i32 @t(i32 %arg) { diff --git a/test/CodeGen/X86/pre-split3.ll b/test/CodeGen/X86/pre-split3.ll index f34f1447edda2..2e314207c3e34 100644 --- a/test/CodeGen/X86/pre-split3.ll +++ b/test/CodeGen/X86/pre-split3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 define i32 @t(i32 %arg) { diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll index a570f7304f372..10cef276c62f6 100644 --- a/test/CodeGen/X86/pre-split4.ll +++ b/test/CodeGen/X86/pre-split4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2 define i32 @main(i32 %argc, i8** %argv) nounwind { diff --git a/test/CodeGen/X86/pre-split5.ll b/test/CodeGen/X86/pre-split5.ll index b83003f30feab..8def460809f21 100644 --- a/test/CodeGen/X86/pre-split5.ll +++ b/test/CodeGen/X86/pre-split5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split target triple = "i386-apple-darwin9.5" %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/test/CodeGen/X86/pre-split6.ll b/test/CodeGen/X86/pre-split6.ll index e771b8067c21b..d38e63088d1c7 100644 --- a/test/CodeGen/X86/pre-split6.ll +++ b/test/CodeGen/X86/pre-split6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split | grep {divsd 8} | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split | grep {divsd 8} | count 1 @current_surfaces.b = external global i1 ; <i1*> [#uses=1] diff --git a/test/CodeGen/X86/pre-split7.ll b/test/CodeGen/X86/pre-split7.ll index cd9d205a7138f..0b81c0bc09fe6 100644 --- a/test/CodeGen/X86/pre-split7.ll +++ b/test/CodeGen/X86/pre-split7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split @object_distance = external global double, align 8 ; <double*> [#uses=1] @axis_slope_angle = external global double, align 8 ; <double*> [#uses=1] diff --git a/test/CodeGen/X86/pre-split8.ll b/test/CodeGen/X86/pre-split8.ll index 22598195ed122..ea4b9496b3c37 100644 --- a/test/CodeGen/X86/pre-split8.ll +++ b/test/CodeGen/X86/pre-split8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 @current_surfaces.b = external global i1 ; <i1*> [#uses=1] diff --git a/test/CodeGen/X86/pre-split9.ll b/test/CodeGen/X86/pre-split9.ll index 1be960f53a549..c27d925d43e4b 100644 --- a/test/CodeGen/X86/pre-split9.ll +++ b/test/CodeGen/X86/pre-split9.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats |& \ ; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 @current_surfaces.b = external global i1 ; <i1*> [#uses=1] diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index d6517f7ef5b13..fac5915aae887 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse > %t +; RUN: llc < %s -march=x86 -mattr=+sse > %t ; RUN: grep prefetchnta %t ; RUN: grep prefetcht0 %t ; RUN: grep prefetcht1 %t diff --git a/test/CodeGen/X86/private-2.ll b/test/CodeGen/X86/private-2.ll index 7478128567730..8aa744ead8caa 100644 --- a/test/CodeGen/X86/private-2.ll +++ b/test/CodeGen/X86/private-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 | grep L__ZZ20 +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20 ; Quote should be outside of private prefix. ; rdar://6855766x diff --git a/test/CodeGen/X86/private.ll b/test/CodeGen/X86/private.ll index caf1035c3433f..22b6f35a70ef1 100644 --- a/test/CodeGen/X86/private.ll +++ b/test/CodeGen/X86/private.ll @@ -1,9 +1,9 @@ ; Test to make sure that the 'private' is used correctly. ; -; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep .Lfoo: -; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep call.*\.Lfoo -; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep .Lbaz: -; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz +; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lfoo: +; RUN: llc < %s -mtriple=x86_64-pc-linux | grep call.*\.Lfoo +; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lbaz: +; RUN: llc < %s -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz declare void @foo() diff --git a/test/CodeGen/X86/ptrtoint-constexpr.ll b/test/CodeGen/X86/ptrtoint-constexpr.ll new file mode 100644 index 0000000000000..72a428ea32083 --- /dev/null +++ b/test/CodeGen/X86/ptrtoint-constexpr.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -mtriple=i386-linux | FileCheck %s + %union.x = type { i64 } + +; CHECK: .globl r +; CHECK: r: +; CHECK: .quad ((r) & 4294967295) + +@r = global %union.x { i64 ptrtoint (%union.x* @r to i64) }, align 4 diff --git a/test/CodeGen/X86/rdtsc.ll b/test/CodeGen/X86/rdtsc.ll index f5d947fcbabb5..f21a44c36073b 100644 --- a/test/CodeGen/X86/rdtsc.ll +++ b/test/CodeGen/X86/rdtsc.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep rdtsc -; RUN: llvm-as < %s | llc -march=x86-64 | grep rdtsc +; RUN: llc < %s -march=x86 | grep rdtsc +; RUN: llc < %s -march=x86-64 | grep rdtsc declare i64 @llvm.readcyclecounter() define i64 @foo() { diff --git a/test/CodeGen/X86/red-zone.ll b/test/CodeGen/X86/red-zone.ll index 60e16b05ca757..1ffb4e3c78f67 100644 --- a/test/CodeGen/X86/red-zone.ll +++ b/test/CodeGen/X86/red-zone.ll @@ -1,13 +1,25 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t -; RUN: not grep subq %t -; RUN: not grep addq %t -; RUN: grep {\\-4(%%rsp)} %t | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 -disable-red-zone > %t -; RUN: grep subq %t | count 1 -; RUN: grep addq %t | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s +; First without noredzone. +; CHECK: f0: +; CHECK: -4(%rsp) +; CHECK: -4(%rsp) +; CHECK: ret define x86_fp80 @f0(float %f) nounwind readnone { entry: %0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1] ret x86_fp80 %0 } + +; Then with noredzone. +; CHECK: f1: +; CHECK: subq $4, %rsp +; CHECK: (%rsp) +; CHECK: (%rsp) +; CHECK: addq $4, %rsp +; CHECK: ret +define x86_fp80 @f1(float %f) nounwind readnone noredzone { +entry: + %0 = fpext float %f to x86_fp80 ; <x86_fp80> [#uses=1] + ret x86_fp80 %0 +} diff --git a/test/CodeGen/X86/red-zone2.ll b/test/CodeGen/X86/red-zone2.ll index dea7d7eb0ea43..9557d17150ec4 100644 --- a/test/CodeGen/X86/red-zone2.ll +++ b/test/CodeGen/X86/red-zone2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep subq %t | count 1 ; RUN: grep addq %t | count 1 diff --git a/test/CodeGen/X86/regpressure.ll b/test/CodeGen/X86/regpressure.ll index 6d8cfbb781f9f..e0b5f7a870bb2 100644 --- a/test/CodeGen/X86/regpressure.ll +++ b/test/CodeGen/X86/regpressure.ll @@ -1,7 +1,7 @@ ;; Both functions in this testcase should codegen to the same function, and ;; neither of them should require spilling anything to the stack. -; RUN: llvm-as < %s | llc -march=x86 -stats |& \ +; RUN: llc < %s -march=x86 -stats |& \ ; RUN: not grep {Number of register spills} ;; This can be compiled to use three registers if the loads are not diff --git a/test/CodeGen/X86/rem-2.ll b/test/CodeGen/X86/rem-2.ll index 3e17fc0b43098..1b2af4b87a32e 100644 --- a/test/CodeGen/X86/rem-2.ll +++ b/test/CodeGen/X86/rem-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep cltd +; RUN: llc < %s -march=x86 | not grep cltd define i32 @test(i32 %X) nounwind readnone { entry: diff --git a/test/CodeGen/X86/rem.ll b/test/CodeGen/X86/rem.ll index bba1f9b96bb4e..394070ecdf235 100644 --- a/test/CodeGen/X86/rem.ll +++ b/test/CodeGen/X86/rem.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep div +; RUN: llc < %s -march=x86 | not grep div define i32 @test1(i32 %X) { %tmp1 = srem i32 %X, 255 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/remat-constant.ll b/test/CodeGen/X86/remat-constant.ll index 8dfed5ed52e25..3e813209d4103 100644 --- a/test/CodeGen/X86/remat-constant.ll +++ b/test/CodeGen/X86/remat-constant.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-linux -relocation-model=static | grep xmm | count 2 +; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static | grep xmm | count 2 declare void @bar() nounwind diff --git a/test/CodeGen/X86/remat-mov-1.ll b/test/CodeGen/X86/remat-mov-1.ll index 98b7bb45e9e71..d71b7a5b910a3 100644 --- a/test/CodeGen/X86/remat-mov-1.ll +++ b/test/CodeGen/X86/remat-mov-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep 4294967295 | grep mov | count 2 +; RUN: llc < %s -march=x86 | grep -- -1 | grep mov | count 2 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.ImgT = type { i8, i8*, i8*, %struct.FILE*, i32, i32, i32, i32, i8*, double*, float*, float*, float*, i32*, double, double, i32*, double*, i32*, i32* } diff --git a/test/CodeGen/X86/remat-scalar-zero.ll b/test/CodeGen/X86/remat-scalar-zero.ll new file mode 100644 index 0000000000000..790ae83c2b2bc --- /dev/null +++ b/test/CodeGen/X86/remat-scalar-zero.ll @@ -0,0 +1,95 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t +; RUN: not grep xor %t +; RUN: not grep movap %t +; RUN: grep {\\.zero} %t + +; Remat should be able to fold the zero constant into the div instructions +; as a constant-pool load. + +define void @foo(double* nocapture %x, double* nocapture %y) nounwind { +entry: + %tmp1 = load double* %x ; <double> [#uses=1] + %arrayidx4 = getelementptr inbounds double* %x, i64 1 ; <double*> [#uses=1] + %tmp5 = load double* %arrayidx4 ; <double> [#uses=1] + %arrayidx8 = getelementptr inbounds double* %x, i64 2 ; <double*> [#uses=1] + %tmp9 = load double* %arrayidx8 ; <double> [#uses=1] + %arrayidx12 = getelementptr inbounds double* %x, i64 3 ; <double*> [#uses=1] + %tmp13 = load double* %arrayidx12 ; <double> [#uses=1] + %arrayidx16 = getelementptr inbounds double* %x, i64 4 ; <double*> [#uses=1] + %tmp17 = load double* %arrayidx16 ; <double> [#uses=1] + %arrayidx20 = getelementptr inbounds double* %x, i64 5 ; <double*> [#uses=1] + %tmp21 = load double* %arrayidx20 ; <double> [#uses=1] + %arrayidx24 = getelementptr inbounds double* %x, i64 6 ; <double*> [#uses=1] + %tmp25 = load double* %arrayidx24 ; <double> [#uses=1] + %arrayidx28 = getelementptr inbounds double* %x, i64 7 ; <double*> [#uses=1] + %tmp29 = load double* %arrayidx28 ; <double> [#uses=1] + %arrayidx32 = getelementptr inbounds double* %x, i64 8 ; <double*> [#uses=1] + %tmp33 = load double* %arrayidx32 ; <double> [#uses=1] + %arrayidx36 = getelementptr inbounds double* %x, i64 9 ; <double*> [#uses=1] + %tmp37 = load double* %arrayidx36 ; <double> [#uses=1] + %arrayidx40 = getelementptr inbounds double* %x, i64 10 ; <double*> [#uses=1] + %tmp41 = load double* %arrayidx40 ; <double> [#uses=1] + %arrayidx44 = getelementptr inbounds double* %x, i64 11 ; <double*> [#uses=1] + %tmp45 = load double* %arrayidx44 ; <double> [#uses=1] + %arrayidx48 = getelementptr inbounds double* %x, i64 12 ; <double*> [#uses=1] + %tmp49 = load double* %arrayidx48 ; <double> [#uses=1] + %arrayidx52 = getelementptr inbounds double* %x, i64 13 ; <double*> [#uses=1] + %tmp53 = load double* %arrayidx52 ; <double> [#uses=1] + %arrayidx56 = getelementptr inbounds double* %x, i64 14 ; <double*> [#uses=1] + %tmp57 = load double* %arrayidx56 ; <double> [#uses=1] + %arrayidx60 = getelementptr inbounds double* %x, i64 15 ; <double*> [#uses=1] + %tmp61 = load double* %arrayidx60 ; <double> [#uses=1] + %arrayidx64 = getelementptr inbounds double* %x, i64 16 ; <double*> [#uses=1] + %tmp65 = load double* %arrayidx64 ; <double> [#uses=1] + %div = fdiv double %tmp1, 0.000000e+00 ; <double> [#uses=1] + store double %div, double* %y + %div70 = fdiv double %tmp5, 2.000000e-01 ; <double> [#uses=1] + %arrayidx72 = getelementptr inbounds double* %y, i64 1 ; <double*> [#uses=1] + store double %div70, double* %arrayidx72 + %div74 = fdiv double %tmp9, 2.000000e-01 ; <double> [#uses=1] + %arrayidx76 = getelementptr inbounds double* %y, i64 2 ; <double*> [#uses=1] + store double %div74, double* %arrayidx76 + %div78 = fdiv double %tmp13, 2.000000e-01 ; <double> [#uses=1] + %arrayidx80 = getelementptr inbounds double* %y, i64 3 ; <double*> [#uses=1] + store double %div78, double* %arrayidx80 + %div82 = fdiv double %tmp17, 2.000000e-01 ; <double> [#uses=1] + %arrayidx84 = getelementptr inbounds double* %y, i64 4 ; <double*> [#uses=1] + store double %div82, double* %arrayidx84 + %div86 = fdiv double %tmp21, 2.000000e-01 ; <double> [#uses=1] + %arrayidx88 = getelementptr inbounds double* %y, i64 5 ; <double*> [#uses=1] + store double %div86, double* %arrayidx88 + %div90 = fdiv double %tmp25, 2.000000e-01 ; <double> [#uses=1] + %arrayidx92 = getelementptr inbounds double* %y, i64 6 ; <double*> [#uses=1] + store double %div90, double* %arrayidx92 + %div94 = fdiv double %tmp29, 2.000000e-01 ; <double> [#uses=1] + %arrayidx96 = getelementptr inbounds double* %y, i64 7 ; <double*> [#uses=1] + store double %div94, double* %arrayidx96 + %div98 = fdiv double %tmp33, 2.000000e-01 ; <double> [#uses=1] + %arrayidx100 = getelementptr inbounds double* %y, i64 8 ; <double*> [#uses=1] + store double %div98, double* %arrayidx100 + %div102 = fdiv double %tmp37, 2.000000e-01 ; <double> [#uses=1] + %arrayidx104 = getelementptr inbounds double* %y, i64 9 ; <double*> [#uses=1] + store double %div102, double* %arrayidx104 + %div106 = fdiv double %tmp41, 2.000000e-01 ; <double> [#uses=1] + %arrayidx108 = getelementptr inbounds double* %y, i64 10 ; <double*> [#uses=1] + store double %div106, double* %arrayidx108 + %div110 = fdiv double %tmp45, 2.000000e-01 ; <double> [#uses=1] + %arrayidx112 = getelementptr inbounds double* %y, i64 11 ; <double*> [#uses=1] + store double %div110, double* %arrayidx112 + %div114 = fdiv double %tmp49, 2.000000e-01 ; <double> [#uses=1] + %arrayidx116 = getelementptr inbounds double* %y, i64 12 ; <double*> [#uses=1] + store double %div114, double* %arrayidx116 + %div118 = fdiv double %tmp53, 2.000000e-01 ; <double> [#uses=1] + %arrayidx120 = getelementptr inbounds double* %y, i64 13 ; <double*> [#uses=1] + store double %div118, double* %arrayidx120 + %div122 = fdiv double %tmp57, 2.000000e-01 ; <double> [#uses=1] + %arrayidx124 = getelementptr inbounds double* %y, i64 14 ; <double*> [#uses=1] + store double %div122, double* %arrayidx124 + %div126 = fdiv double %tmp61, 2.000000e-01 ; <double> [#uses=1] + %arrayidx128 = getelementptr inbounds double* %y, i64 15 ; <double*> [#uses=1] + store double %div126, double* %arrayidx128 + %div130 = fdiv double %tmp65, 0.000000e+00 ; <double> [#uses=1] + %arrayidx132 = getelementptr inbounds double* %y, i64 16 ; <double*> [#uses=1] + store double %div130, double* %arrayidx132 + ret void +} diff --git a/test/CodeGen/X86/ret-addr.ll b/test/CodeGen/X86/ret-addr.ll index 06a10c6a30f07..b7b57ab3b842f 100644 --- a/test/CodeGen/X86/ret-addr.ll +++ b/test/CodeGen/X86/ret-addr.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86 | not grep xor -; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86-64 | not grep xor +; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor +; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor define i8* @h() nounwind readnone optsize { entry: diff --git a/test/CodeGen/X86/ret-i64-0.ll b/test/CodeGen/X86/ret-i64-0.ll index c59e4cf9439eb..bca0f056b90de 100644 --- a/test/CodeGen/X86/ret-i64-0.ll +++ b/test/CodeGen/X86/ret-i64-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep xor | count 2 +; RUN: llc < %s -march=x86 | grep xor | count 2 define i64 @foo() nounwind { ret i64 0 diff --git a/test/CodeGen/X86/ret-mmx.ll b/test/CodeGen/X86/ret-mmx.ll index 178ff4e8f7e04..04b57dd8d6c0c 100644 --- a/test/CodeGen/X86/ret-mmx.ll +++ b/test/CodeGen/X86/ret-mmx.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx,+sse2 +; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 ; rdar://6602459 @g_v1di = external global <1 x i64> diff --git a/test/CodeGen/X86/rip-rel-address.ll b/test/CodeGen/X86/rip-rel-address.ll index 2c0926a654430..24ff07b4b2199 100644 --- a/test/CodeGen/X86/rip-rel-address.ll +++ b/test/CodeGen/X86/rip-rel-address.ll @@ -1,7 +1,14 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=static | grep {a(%rip)} +; RUN: llc < %s -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64 + +; Use %rip-relative addressing even in static mode on x86-64, because +; it has a smaller encoding. @a = internal global double 3.4 define double @foo() nounwind { %a = load double* @a ret double %a + +; PIC64: movsd _a(%rip), %xmm0 +; STATIC64: movsd a(%rip), %xmm0 } diff --git a/test/CodeGen/X86/rodata-relocs.ll b/test/CodeGen/X86/rodata-relocs.ll index b800e098ce25b..276f8bb48d06e 100644 --- a/test/CodeGen/X86/rodata-relocs.ll +++ b/test/CodeGen/X86/rodata-relocs.ll @@ -1,10 +1,10 @@ -; RUN: llvm-as < %s | llc -relocation-model=static | grep rodata | count 3 -; RUN: llvm-as < %s | llc -relocation-model=static | grep -F "rodata.cst" | count 2 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep rodata | count 2 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro" | count 2 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel" | count 4 -; RUN: llvm-as < %s | llc -relocation-model=pic | grep -F ".data.rel.local" | count 1 +; RUN: llc < %s -relocation-model=static | grep rodata | count 3 +; RUN: llc < %s -relocation-model=static | grep -F "rodata.cst" | count 2 +; RUN: llc < %s -relocation-model=pic | grep rodata | count 2 +; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro" | count 2 +; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.ro.local" | count 1 +; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel" | count 4 +; RUN: llc < %s -relocation-model=pic | grep -F ".data.rel.local" | count 1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/rot16.ll b/test/CodeGen/X86/rot16.ll index c196ce2cc139f..42ece47b03004 100644 --- a/test/CodeGen/X86/rot16.ll +++ b/test/CodeGen/X86/rot16.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep rol %t | count 3 ; RUN: grep ror %t | count 1 ; RUN: grep shld %t | count 2 diff --git a/test/CodeGen/X86/rot32.ll b/test/CodeGen/X86/rot32.ll index 7cebcb86ce120..655ed272837ac 100644 --- a/test/CodeGen/X86/rot32.ll +++ b/test/CodeGen/X86/rot32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep rol %t | count 3 ; RUN: grep ror %t | count 1 ; RUN: grep shld %t | count 2 diff --git a/test/CodeGen/X86/rot64.ll b/test/CodeGen/X86/rot64.ll index 2408359a141dd..4e082bb860b45 100644 --- a/test/CodeGen/X86/rot64.ll +++ b/test/CodeGen/X86/rot64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep rol %t | count 3 ; RUN: grep ror %t | count 1 ; RUN: grep shld %t | count 2 diff --git a/test/CodeGen/X86/rotate.ll b/test/CodeGen/X86/rotate.ll index c567c0d33cf26..1e20273194d58 100644 --- a/test/CodeGen/X86/rotate.ll +++ b/test/CodeGen/X86/rotate.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {ro\[rl\]} | count 12 define i32 @rotl32(i32 %A, i8 %Amt) { diff --git a/test/CodeGen/X86/rotate2.ll b/test/CodeGen/X86/rotate2.ll index 40e954cbdd015..2eea3999e7b8c 100644 --- a/test/CodeGen/X86/rotate2.ll +++ b/test/CodeGen/X86/rotate2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep rol | count 2 +; RUN: llc < %s -march=x86-64 | grep rol | count 2 define i64 @test1(i64 %x) nounwind { entry: diff --git a/test/CodeGen/X86/scalar-extract.ll b/test/CodeGen/X86/scalar-extract.ll index 172c424a782f1..2845838409333 100644 --- a/test/CodeGen/X86/scalar-extract.ll +++ b/test/CodeGen/X86/scalar-extract.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+mmx -o %t ; RUN: not grep movq %t ; Check that widening doesn't introduce a mmx register in this case when diff --git a/test/CodeGen/X86/scalar-min-max-fill-operand.ll b/test/CodeGen/X86/scalar-min-max-fill-operand.ll index 6a6283a10dab7..fe40758d8ecd9 100644 --- a/test/CodeGen/X86/scalar-min-max-fill-operand.ll +++ b/test/CodeGen/X86/scalar-min-max-fill-operand.ll @@ -1,20 +1,20 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep min | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep max | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2 +; RUN: llc < %s -march=x86-64 | grep min | count 1 +; RUN: llc < %s -march=x86-64 | grep max | count 1 +; RUN: llc < %s -march=x86-64 | grep mov | count 2 declare float @bar() -define float @foo(float %a) +define float @foo(float %a) nounwind { %s = call float @bar() %t = fcmp olt float %s, %a %u = select i1 %t, float %s, float %a ret float %u } -define float @hem(float %a) +define float @hem(float %a) nounwind { %s = call float @bar() - %t = fcmp uge float %s, %a + %t = fcmp ogt float %s, %a %u = select i1 %t, float %s, float %a ret float %u } diff --git a/test/CodeGen/X86/scalar_sse_minmax.ll b/test/CodeGen/X86/scalar_sse_minmax.ll index 8c030b88440d4..bc4ab5d836c78 100644 --- a/test/CodeGen/X86/scalar_sse_minmax.ll +++ b/test/CodeGen/X86/scalar_sse_minmax.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 | \ +; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \ ; RUN: grep mins | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 | \ +; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | \ ; RUN: grep maxs | count 2 declare i1 @llvm.isunordered.f64(double, double) diff --git a/test/CodeGen/X86/scalarize-bitcast.ll b/test/CodeGen/X86/scalarize-bitcast.ll index a07f9396040e0..f6b29ecfbb60d 100644 --- a/test/CodeGen/X86/scalarize-bitcast.ll +++ b/test/CodeGen/X86/scalarize-bitcast.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 ; PR3886 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/scev-interchange.ll b/test/CodeGen/X86/scev-interchange.ll index b253dd975ff0e..81c919f8dfffa 100644 --- a/test/CodeGen/X86/scev-interchange.ll +++ b/test/CodeGen/X86/scev-interchange.ll @@ -1,10 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" - %struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t } %"struct.DataOutBase::GmvFlags" = type { i32 } %"struct.FE_DGPNonparametric<3>" = type { [1156 x i8], i32, %"struct.PolynomialSpace<1>" } - %"struct.FE_Q<3>" = type { %"struct.FE_DGPNonparametric<3>", %"struct.std::vector<int,std::allocator<int> >" } %"struct.FiniteElementData<1>" = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.Line = type { [2 x i32] } %"struct.PolynomialSpace<1>" = type { %"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >", i32, %"struct.std::vector<int,std::allocator<int> >", %"struct.std::vector<int,std::allocator<int> >" } @@ -12,9 +10,6 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 %struct.Subscriptor = type { i32 (...)**, i32, %"struct.std::type_info"* } %"struct.TableBase<2,double>" = type { %struct.Subscriptor, double*, i32, %"struct.TableIndices<2>" } %"struct.TableIndices<2>" = type { %struct.Line } - %struct.__pthread_list_t = type { %struct.__pthread_list_t*, %struct.__pthread_list_t* } - %struct.pthread_attr_t = type { i64, [48 x i8] } - %struct.pthread_mutex_t = type { %struct..0__pthread_mutex_s } %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" } %"struct.std::_Bit_iterator_base" = type { i64*, i32 } %"struct.std::_Bvector_base<std::allocator<bool> >" = type { %"struct.std::_Bvector_base<std::allocator<bool> >::_Bvector_impl" } @@ -34,21 +29,6 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 %"struct.std::vector<int,std::allocator<int> >" = type { %"struct.std::_Vector_base<int,std::allocator<int> >" } %"struct.std::vector<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >" = type { %"struct.std::_Vector_base<std::vector<bool, std::allocator<bool> >,std::allocator<std::vector<bool, std::allocator<bool> > > >" } -@_ZL20__gthrw_pthread_oncePiPFvvE = alias weak i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0] -@_ZL27__gthrw_pthread_getspecificj = alias weak i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0] -@_ZL27__gthrw_pthread_setspecificjPKv = alias weak i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0] -@_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0] -@_ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0] -@_ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0] -@_ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0] -@_ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = alias weak i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0] -@_ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = alias weak i32 (%struct.pthread_mutex_t*, %"struct.DataOutBase::GmvFlags"*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %"struct.DataOutBase::GmvFlags"*)*> [#uses=0] -@_ZL26__gthrw_pthread_key_createPjPFvPvE = alias weak i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0] -@_ZL26__gthrw_pthread_key_deletej = alias weak i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0] -@_ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = alias weak i32 (%"struct.DataOutBase::GmvFlags"*)* @pthread_mutexattr_init ; <i32 (%"struct.DataOutBase::GmvFlags"*)*> [#uses=0] -@_ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = alias weak i32 (%"struct.DataOutBase::GmvFlags"*, i32)* @pthread_mutexattr_settype ; <i32 (%"struct.DataOutBase::GmvFlags"*, i32)*> [#uses=0] -@_ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = alias weak i32 (%"struct.DataOutBase::GmvFlags"*)* @pthread_mutexattr_destroy ; <i32 (%"struct.DataOutBase::GmvFlags"*)*> [#uses=0] - declare void @_Unwind_Resume(i8*) declare i8* @_Znwm(i64) @@ -71,7 +51,7 @@ declare fastcc void @_ZN11FE_Q_Helper12_GLOBAL__N_116invert_numberingERKSt6vecto declare fastcc void @_ZN4FE_QILi3EE14get_dpo_vectorEj(%"struct.std::vector<int,std::allocator<int> >"* noalias nocapture sret, i32) -define fastcc void @_ZN4FE_QILi3EEC1Ej(%"struct.FE_Q<3>"* %this, i32 %degree) { +define fastcc void @_ZN4FE_QILi3EEC1Ej(i32 %degree) { entry: invoke fastcc void @_ZNSt6vectorIbSaIbEEC1EmRKbRKS0_(%"struct.std::vector<bool,std::allocator<bool> >"* undef, i64 1, i8* undef) to label %invcont.i unwind label %lpad.i @@ -356,31 +336,3 @@ lpad204.i: ; preds = %invcont86.i } declare fastcc void @_ZN11Polynomials19LagrangeEquidistant23generate_complete_basisEj(%"struct.std::vector<Polynomials::Polynomial<double>,std::allocator<Polynomials::Polynomial<double> > >"* noalias nocapture sret, i32) - -declare i32 @pthread_once(i32*, void ()*) - -declare i8* @pthread_getspecific(i32) - -declare i32 @pthread_setspecific(i32, i8*) - -declare i32 @pthread_create(i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) - -declare i32 @pthread_cancel(i64) - -declare i32 @pthread_mutex_lock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) - -declare i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %"struct.DataOutBase::GmvFlags"*) - -declare i32 @pthread_key_create(i32*, void (i8*)*) - -declare i32 @pthread_key_delete(i32) - -declare i32 @pthread_mutexattr_init(%"struct.DataOutBase::GmvFlags"*) - -declare i32 @pthread_mutexattr_settype(%"struct.DataOutBase::GmvFlags"*, i32) - -declare i32 @pthread_mutexattr_destroy(%"struct.DataOutBase::GmvFlags"*) diff --git a/test/CodeGen/X86/select-zero-one.ll b/test/CodeGen/X86/select-zero-one.ll index 70785e9978fbc..c38a02080523a 100644 --- a/test/CodeGen/X86/select-zero-one.ll +++ b/test/CodeGen/X86/select-zero-one.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep cmov -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movzbl | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep cmov +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movzbl | count 1 @r1 = weak global i32 0 diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index e5d6101253727..95ed9e97cdfda 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep set +; RUN: llc < %s -march=x86 -mcpu=pentium +; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep set define i1 @boolSel(i1 %A, i1 %B, i1 %C) nounwind { %X = select i1 %A, i1 %B, i1 %C ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/setoeq.ll b/test/CodeGen/X86/setoeq.ll index 25a2b7e0b4936..4a9c1bacc5f2b 100644 --- a/test/CodeGen/X86/setoeq.ll +++ b/test/CodeGen/X86/setoeq.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep set | count 2 -; RUN: llvm-as < %s | llc -march=x86 | grep and +; RUN: llc < %s -march=x86 | grep set | count 2 +; RUN: llc < %s -march=x86 | grep and define zeroext i8 @t(double %x) nounwind readnone { entry: diff --git a/test/CodeGen/X86/setuge.ll b/test/CodeGen/X86/setuge.ll index 3f1d882754ee7..4ca2f1871c0f5 100644 --- a/test/CodeGen/X86/setuge.ll +++ b/test/CodeGen/X86/setuge.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep set +; RUN: llc < %s -march=x86 | not grep set declare i1 @llvm.isunordered.f32(float, float) diff --git a/test/CodeGen/X86/sext-load.ll b/test/CodeGen/X86/sext-load.ll index a6d1080bd84a9..c9b39d3a489e2 100644 --- a/test/CodeGen/X86/sext-load.ll +++ b/test/CodeGen/X86/sext-load.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movsbl +; RUN: llc < %s -march=x86 | grep movsbl define i32 @foo(i32 %X) nounwind { entry: diff --git a/test/CodeGen/X86/sext-ret-val.ll b/test/CodeGen/X86/sext-ret-val.ll index 946e6c78892ef..da1a1871e7e8c 100644 --- a/test/CodeGen/X86/sext-ret-val.ll +++ b/test/CodeGen/X86/sext-ret-val.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movzbl | count 1 +; RUN: llc < %s -march=x86 | grep movzbl | count 1 ; rdar://6699246 define signext i8 @t1(i8* %A) nounwind readnone ssp { diff --git a/test/CodeGen/X86/sext-select.ll b/test/CodeGen/X86/sext-select.ll index 839ebc2b6c178..4aca0407b36f3 100644 --- a/test/CodeGen/X86/sext-select.ll +++ b/test/CodeGen/X86/sext-select.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movsw +; RUN: llc < %s -march=x86 | grep movsw ; PR2139 declare void @abort() diff --git a/test/CodeGen/X86/sext-trunc.ll b/test/CodeGen/X86/sext-trunc.ll index 97b4666827023..2eaf42577c701 100644 --- a/test/CodeGen/X86/sext-trunc.ll +++ b/test/CodeGen/X86/sext-trunc.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 > %t +; RUN: llc < %s -march=x86 > %t ; RUN: grep movsbl %t ; RUN: not grep movz %t ; RUN: not grep and %t diff --git a/test/CodeGen/X86/sfence.ll b/test/CodeGen/X86/sfence.ll index fc75ccbcb6298..478287919ec49 100644 --- a/test/CodeGen/X86/sfence.ll +++ b/test/CodeGen/X86/sfence.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep sfence +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep sfence declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1) diff --git a/test/CodeGen/X86/shift-and.ll b/test/CodeGen/X86/shift-and.ll index b6d78a485783d..fd278c2239f07 100644 --- a/test/CodeGen/X86/shift-and.ll +++ b/test/CodeGen/X86/shift-and.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep and | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | not grep and +; RUN: llc < %s -march=x86 | grep and | count 1 +; RUN: llc < %s -march=x86-64 | not grep and define i32 @t1(i32 %t, i32 %val) nounwind { %shamt = and i32 %t, 31 diff --git a/test/CodeGen/X86/shift-coalesce.ll b/test/CodeGen/X86/shift-coalesce.ll index 4662628b672e2..d38f9a88fcd6c 100644 --- a/test/CodeGen/X86/shift-coalesce.ll +++ b/test/CodeGen/X86/shift-coalesce.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {shld.*CL} -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: not grep {mov CL, BL} ; PR687 diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll index deb4ed1f309b8..4cba1834bf6c2 100644 --- a/test/CodeGen/X86/shift-codegen.ll +++ b/test/CodeGen/X86/shift-codegen.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 | \ +; RUN: llc < %s -relocation-model=static -march=x86 | \ ; RUN: grep {shll \$3} | count 2 ; This should produce two shll instructions, not any lea's. diff --git a/test/CodeGen/X86/shift-combine.ll b/test/CodeGen/X86/shift-combine.ll index 543bb22378754..e443ac19a80f6 100644 --- a/test/CodeGen/X86/shift-combine.ll +++ b/test/CodeGen/X86/shift-combine.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | not grep shrl +; RUN: llc < %s | not grep shrl target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/shift-double.ll b/test/CodeGen/X86/shift-double.ll index 24017fe2178aa..5adee7c76941a 100644 --- a/test/CodeGen/X86/shift-double.ll +++ b/test/CodeGen/X86/shift-double.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {sh\[lr\]d} | count 5 define i64 @test1(i64 %X, i8 %C) { diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll index d26823220ff85..872817fd4953d 100644 --- a/test/CodeGen/X86/shift-folding.ll +++ b/test/CodeGen/X86/shift-folding.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | \ +; RUN: llc < %s -march=x86 | \ ; RUN: grep {s\[ah\]\[rl\]l} | count 1 define i32* @test1(i32* %P, i32 %X) { diff --git a/test/CodeGen/X86/shift-i128.ll b/test/CodeGen/X86/shift-i128.ll index fc22a3c69139d..c4d15ae9053ee 100644 --- a/test/CodeGen/X86/shift-i128.ll +++ b/test/CodeGen/X86/shift-i128.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 define void @t(i128 %x, i128 %a, i128* nocapture %r) nounwind { entry: diff --git a/test/CodeGen/X86/shift-i256.ll b/test/CodeGen/X86/shift-i256.ll index 4a29b8626c6e1..d5f65a6ed18cd 100644 --- a/test/CodeGen/X86/shift-i256.ll +++ b/test/CodeGen/X86/shift-i256.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86-64 define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone { entry: diff --git a/test/CodeGen/X86/shift-one.ll b/test/CodeGen/X86/shift-one.ll index dd49b7e04cf1d..0f80f90c773e0 100644 --- a/test/CodeGen/X86/shift-one.ll +++ b/test/CodeGen/X86/shift-one.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep leal +; RUN: llc < %s -march=x86 | not grep leal @x = external global i32 ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/shift-parts.ll b/test/CodeGen/X86/shift-parts.ll new file mode 100644 index 0000000000000..ce4f538f4de43 --- /dev/null +++ b/test/CodeGen/X86/shift-parts.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -march=x86-64 | grep shrdq +; PR4736 + +%0 = type { i32, i8, [35 x i8] } + +@g_144 = external global %0, align 8 ; <%0*> [#uses=1] + +define i32 @int87(i32 %uint64p_8) nounwind { +entry: + %srcval4 = load i320* bitcast (%0* @g_144 to i320*), align 8 ; <i320> [#uses=1] + br label %for.cond + +for.cond: ; preds = %for.cond, %entry + %call3.in.in.in.v = select i1 undef, i320 192, i320 128 ; <i320> [#uses=1] + %call3.in.in.in = lshr i320 %srcval4, %call3.in.in.in.v ; <i320> [#uses=1] + %call3.in = trunc i320 %call3.in.in.in to i32 ; <i32> [#uses=1] + %tobool = icmp eq i32 %call3.in, 0 ; <i1> [#uses=1] + br i1 %tobool, label %for.cond, label %if.then + +if.then: ; preds = %for.cond + ret i32 1 +} diff --git a/test/CodeGen/X86/shl_elim.ll b/test/CodeGen/X86/shl_elim.ll index d3616f4ac5de4..445889166bd5c 100644 --- a/test/CodeGen/X86/shl_elim.ll +++ b/test/CodeGen/X86/shl_elim.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {movl 8(.esp), %eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {shrl .eax} -; RUN: llvm-as < %s | llc -march=x86 | grep {movswl .ax, .eax} +; RUN: llc < %s -march=x86 | grep {movl 8(.esp), %eax} +; RUN: llc < %s -march=x86 | grep {shrl .eax} +; RUN: llc < %s -march=x86 | grep {movswl .ax, .eax} define i32 @test1(i64 %a) { %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] diff --git a/test/CodeGen/X86/shrink-fp-const1.ll b/test/CodeGen/X86/shrink-fp-const1.ll index 3406aeeeb5c5d..49b9fa3c4129a 100644 --- a/test/CodeGen/X86/shrink-fp-const1.ll +++ b/test/CodeGen/X86/shrink-fp-const1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | not grep cvtss2sd +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd ; PR1264 define double @foo(double %x) { diff --git a/test/CodeGen/X86/shrink-fp-const2.ll b/test/CodeGen/X86/shrink-fp-const2.ll index 7e48b1bba8f1e..3d5203be09a09 100644 --- a/test/CodeGen/X86/shrink-fp-const2.ll +++ b/test/CodeGen/X86/shrink-fp-const2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep flds +; RUN: llc < %s -march=x86 | grep flds ; This should be a flds, not fldt. define x86_fp80 @test2() nounwind { entry: diff --git a/test/CodeGen/X86/sincos.ll b/test/CodeGen/X86/sincos.ll index 27215956b64d8..13f932982f14c 100644 --- a/test/CodeGen/X86/sincos.ll +++ b/test/CodeGen/X86/sincos.ll @@ -1,50 +1,48 @@ ; Make sure this testcase codegens to the sin and cos instructions, not calls -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep sin\$ | count 3 -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep cos\$ | count 3 -declare float @sinf(float) +declare float @sinf(float) readonly -declare double @sin(double) +declare double @sin(double) readonly -declare x86_fp80 @sinl(x86_fp80) +declare x86_fp80 @sinl(x86_fp80) readonly define float @test1(float %X) { - %Y = call float @sinf(float %X) + %Y = call float @sinf(float %X) readonly ret float %Y } define double @test2(double %X) { - %Y = call double @sin(double %X) + %Y = call double @sin(double %X) readonly ret double %Y } define x86_fp80 @test3(x86_fp80 %X) { - %Y = call x86_fp80 @sinl(x86_fp80 %X) + %Y = call x86_fp80 @sinl(x86_fp80 %X) readonly ret x86_fp80 %Y } -declare float @cosf(float) +declare float @cosf(float) readonly -declare double @cos(double) +declare double @cos(double) readonly -declare x86_fp80 @cosl(x86_fp80) +declare x86_fp80 @cosl(x86_fp80) readonly define float @test4(float %X) { - %Y = call float @cosf(float %X) + %Y = call float @cosf(float %X) readonly ret float %Y } define double @test5(double %X) { - %Y = call double @cos(double %X) + %Y = call double @cos(double %X) readonly ret double %Y } define x86_fp80 @test6(x86_fp80 %X) { - %Y = call x86_fp80 @cosl(x86_fp80 %X) + %Y = call x86_fp80 @cosl(x86_fp80 %X) readonly ret x86_fp80 %Y } diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll new file mode 100644 index 0000000000000..0f4e63f9c674f --- /dev/null +++ b/test/CodeGen/X86/sink-hoist.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s + +; Currently, floating-point selects are lowered to CFG triangles. +; This means that one side of the select is always unconditionally +; evaluated, however with MachineSink we can sink the other side so +; that it's conditionally evaluated. + +; CHECK: foo: +; CHECK-NEXT: divsd +; CHECK: testb $1, %dil +; CHECK-NEXT: jne +; CHECK: divsd + +define double @foo(double %x, double %y, i1 %c) nounwind { + %a = fdiv double %x, 3.2 + %b = fdiv double %y, 3.3 + %z = select i1 %c, double %a, double %b + ret double %z +} + +; Hoist floating-point constant-pool loads out of loops. + +; CHECK: bar: +; CHECK: movsd +; CHECK: align +define void @bar(double* nocapture %p, i64 %n) nounwind { +entry: + %0 = icmp sgt i64 %n, 0 + br i1 %0, label %bb, label %return + +bb: + %i.03 = phi i64 [ 0, %entry ], [ %3, %bb ] + %scevgep = getelementptr double* %p, i64 %i.03 + %1 = load double* %scevgep, align 8 + %2 = fdiv double 3.200000e+00, %1 + store double %2, double* %scevgep, align 8 + %3 = add nsw i64 %i.03, 1 + %exitcond = icmp eq i64 %3, %n + br i1 %exitcond, label %return, label %bb + +return: + ret void +} diff --git a/test/CodeGen/X86/small-byval-memcpy.ll b/test/CodeGen/X86/small-byval-memcpy.ll index 8b87f7449cde4..9ec9182e5e3c2 100644 --- a/test/CodeGen/X86/small-byval-memcpy.ll +++ b/test/CodeGen/X86/small-byval-memcpy.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | not grep movs +; RUN: llc < %s | not grep movs target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/smul-with-overflow-2.ll b/test/CodeGen/X86/smul-with-overflow-2.ll index c3dbfd796f20b..7c23adba406cf 100644 --- a/test/CodeGen/X86/smul-with-overflow-2.ll +++ b/test/CodeGen/X86/smul-with-overflow-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep add | count 3 +; RUN: llc < %s -march=x86 | grep mul | count 1 +; RUN: llc < %s -march=x86 | grep add | count 3 define i32 @t1(i32 %a, i32 %b) nounwind readnone { entry: diff --git a/test/CodeGen/X86/smul-with-overflow-3.ll b/test/CodeGen/X86/smul-with-overflow-3.ll index aa5e67a02998a..49c31f56ae835 100644 --- a/test/CodeGen/X86/smul-with-overflow-3.ll +++ b/test/CodeGen/X86/smul-with-overflow-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {jno} | count 1 +; RUN: llc < %s -march=x86 | grep {jno} | count 1 @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" diff --git a/test/CodeGen/X86/smul-with-overflow.ll b/test/CodeGen/X86/smul-with-overflow.ll index 6aefc03a39205..6d125e415e04a 100644 --- a/test/CodeGen/X86/smul-with-overflow.ll +++ b/test/CodeGen/X86/smul-with-overflow.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1 +; RUN: llc < %s -march=x86 | grep {jo} | count 1 @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" diff --git a/test/CodeGen/X86/soft-fp.ll b/test/CodeGen/X86/soft-fp.ll index 0c697def1ec2a..a52135dc90878 100644 --- a/test/CodeGen/X86/soft-fp.ll +++ b/test/CodeGen/X86/soft-fp.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -soft-float | not grep xmm -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm +; RUN: llc < %s -march=x86 -mattr=+sse2 -soft-float | not grep xmm +; RUN: llc < %s -march=x86-64 -mattr=+sse2 -soft-float | not grep xmm %struct.__va_list_tag = type { i32, i32, i8*, i8* } diff --git a/test/CodeGen/X86/split-eh-lpad-edges.ll b/test/CodeGen/X86/split-eh-lpad-edges.ll index 281ee7782da1e..fd40a7f703789 100644 --- a/test/CodeGen/X86/split-eh-lpad-edges.ll +++ b/test/CodeGen/X86/split-eh-lpad-edges.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep jmp +; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep jmp ; rdar://6647639 %struct.FetchPlanHeader = type { i8*, i8*, i32, i8*, i8*, i8*, i8*, i8*, %struct.NSObject* (%struct.NSObject*, %struct.objc_selector*, ...)*, %struct.__attributeDescriptionFlags } diff --git a/test/CodeGen/X86/split-select.ll b/test/CodeGen/X86/split-select.ll index 0b7804da4e714..07d4d52f97a37 100644 --- a/test/CodeGen/X86/split-select.ll +++ b/test/CodeGen/X86/split-select.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep test | count 1 +; RUN: llc < %s -march=x86-64 | grep test | count 1 define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) { %x = select i1 %c, <2 x i16> %a, <2 x i16> %b diff --git a/test/CodeGen/X86/split-vector-rem.ll b/test/CodeGen/X86/split-vector-rem.ll index 8c88769be78f9..681c6b0beaa09 100644 --- a/test/CodeGen/X86/split-vector-rem.ll +++ b/test/CodeGen/X86/split-vector-rem.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 16 -; RUN: llvm-as < %s | llc -march=x86-64 | grep fmodf | count 8 +; RUN: llc < %s -march=x86-64 | grep div | count 16 +; RUN: llc < %s -march=x86-64 | grep fmodf | count 8 define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) { %m = srem <8 x i32> %t, %u diff --git a/test/CodeGen/X86/sret.ll b/test/CodeGen/X86/sret.ll index 30e5af41123dd..b9455300bdbb1 100644 --- a/test/CodeGen/X86/sret.ll +++ b/test/CodeGen/X86/sret.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep ret | grep 4 +; RUN: llc < %s -march=x86 | grep ret | grep 4 %struct.foo = type { [4 x i32] } diff --git a/test/CodeGen/X86/sse-align-0.ll b/test/CodeGen/X86/sse-align-0.ll index 5a888b2e784b7..b12a87d614d28 100644 --- a/test/CodeGen/X86/sse-align-0.ll +++ b/test/CodeGen/X86/sse-align-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep mov +; RUN: llc < %s -march=x86-64 | not grep mov define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind { %t = load <4 x float>* %p diff --git a/test/CodeGen/X86/sse-align-1.ll b/test/CodeGen/X86/sse-align-1.ll index 0edc6e094580d..c7a5cd5591207 100644 --- a/test/CodeGen/X86/sse-align-1.ll +++ b/test/CodeGen/X86/sse-align-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2 +; RUN: llc < %s -march=x86-64 | grep movap | count 2 define <4 x float> @foo(<4 x float>* %p) nounwind { %t = load <4 x float>* %p diff --git a/test/CodeGen/X86/sse-align-10.ll b/test/CodeGen/X86/sse-align-10.ll index 1a23eb2ae3d17..0f91697125567 100644 --- a/test/CodeGen/X86/sse-align-10.ll +++ b/test/CodeGen/X86/sse-align-10.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 +; RUN: llc < %s -march=x86-64 | grep movups | count 1 define <2 x i64> @bar(<2 x i64>* %p) nounwind { %t = load <2 x i64>* %p, align 8 diff --git a/test/CodeGen/X86/sse-align-11.ll b/test/CodeGen/X86/sse-align-11.ll index a10b102c6b952..aa1b4370bccfc 100644 --- a/test/CodeGen/X86/sse-align-11.ll +++ b/test/CodeGen/X86/sse-align-11.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -mtriple=linux | grep movups +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=linux | grep movups define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind { entry: diff --git a/test/CodeGen/X86/sse-align-12.ll b/test/CodeGen/X86/sse-align-12.ll index 297f1c458db91..4f025b916fd9c 100644 --- a/test/CodeGen/X86/sse-align-12.ll +++ b/test/CodeGen/X86/sse-align-12.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep unpck %t | count 2 ; RUN: grep shuf %t | count 2 ; RUN: grep ps %t | count 4 diff --git a/test/CodeGen/X86/sse-align-2.ll b/test/CodeGen/X86/sse-align-2.ll index ba693a2001515..102c3fb06cd7e 100644 --- a/test/CodeGen/X86/sse-align-2.ll +++ b/test/CodeGen/X86/sse-align-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 +; RUN: llc < %s -march=x86-64 | grep movup | count 2 define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind { %t = load <4 x float>* %p, align 4 diff --git a/test/CodeGen/X86/sse-align-3.ll b/test/CodeGen/X86/sse-align-3.ll index 5bbcd59e0e9f9..c42f7f0bad997 100644 --- a/test/CodeGen/X86/sse-align-3.ll +++ b/test/CodeGen/X86/sse-align-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movap | count 2 +; RUN: llc < %s -march=x86-64 | grep movap | count 2 define void @foo(<4 x float>* %p, <4 x float> %x) nounwind { store <4 x float> %x, <4 x float>* %p diff --git a/test/CodeGen/X86/sse-align-4.ll b/test/CodeGen/X86/sse-align-4.ll index f7e5fe3d684be..4c59934917f31 100644 --- a/test/CodeGen/X86/sse-align-4.ll +++ b/test/CodeGen/X86/sse-align-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 +; RUN: llc < %s -march=x86-64 | grep movup | count 2 define void @foo(<4 x float>* %p, <4 x float> %x) nounwind { store <4 x float> %x, <4 x float>* %p, align 4 diff --git a/test/CodeGen/X86/sse-align-5.ll b/test/CodeGen/X86/sse-align-5.ll index 19e0eaf8fff8a..21cd2311b9169 100644 --- a/test/CodeGen/X86/sse-align-5.ll +++ b/test/CodeGen/X86/sse-align-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1 +; RUN: llc < %s -march=x86-64 | grep movaps | count 1 define <2 x i64> @bar(<2 x i64>* %p) nounwind { %t = load <2 x i64>* %p diff --git a/test/CodeGen/X86/sse-align-6.ll b/test/CodeGen/X86/sse-align-6.ll index dace291730f7f..0bbf4228a40bb 100644 --- a/test/CodeGen/X86/sse-align-6.ll +++ b/test/CodeGen/X86/sse-align-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 +; RUN: llc < %s -march=x86-64 | grep movups | count 1 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind { %t = load <2 x i64>* %p, align 8 diff --git a/test/CodeGen/X86/sse-align-7.ll b/test/CodeGen/X86/sse-align-7.ll index 7fb65b5f9e85e..5784481c5ae9a 100644 --- a/test/CodeGen/X86/sse-align-7.ll +++ b/test/CodeGen/X86/sse-align-7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | count 1 +; RUN: llc < %s -march=x86-64 | grep movaps | count 1 define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind { store <2 x i64> %x, <2 x i64>* %p diff --git a/test/CodeGen/X86/sse-align-8.ll b/test/CodeGen/X86/sse-align-8.ll index 17a3d2987fff2..cfeff8161c5c0 100644 --- a/test/CodeGen/X86/sse-align-8.ll +++ b/test/CodeGen/X86/sse-align-8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1 +; RUN: llc < %s -march=x86-64 | grep movups | count 1 define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind { store <2 x i64> %x, <2 x i64>* %p, align 8 diff --git a/test/CodeGen/X86/sse-align-9.ll b/test/CodeGen/X86/sse-align-9.ll index 24b437ab3534e..cb26b9535a818 100644 --- a/test/CodeGen/X86/sse-align-9.ll +++ b/test/CodeGen/X86/sse-align-9.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movup | count 2 +; RUN: llc < %s -march=x86-64 | grep movup | count 2 define <4 x float> @foo(<4 x float>* %p) nounwind { %t = load <4 x float>* %p, align 4 diff --git a/test/CodeGen/X86/sse-fcopysign.ll b/test/CodeGen/X86/sse-fcopysign.ll index d8c32831a1e91..0e0e4a9a86cfc 100644 --- a/test/CodeGen/X86/sse-fcopysign.ll +++ b/test/CodeGen/X86/sse-fcopysign.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep test +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep test define float @tst1(float %a, float %b) { %tmp = tail call float @copysignf( float %b, float %a ) diff --git a/test/CodeGen/X86/sse-load-ret.ll b/test/CodeGen/X86/sse-load-ret.ll index cbf3eb0e5f0d8..1ebcb1a6fa646 100644 --- a/test/CodeGen/X86/sse-load-ret.ll +++ b/test/CodeGen/X86/sse-load-ret.ll @@ -1,7 +1,5 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mcpu=yonah | not grep movss -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mcpu=yonah | not grep xmm +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm define double @test1(double* %P) { %X = load double* %P ; <double> [#uses=1] diff --git a/test/CodeGen/X86/sse-minmax.ll b/test/CodeGen/X86/sse-minmax.ll new file mode 100644 index 0000000000000..17ffb5e464aa0 --- /dev/null +++ b/test/CodeGen/X86/sse-minmax.ll @@ -0,0 +1,392 @@ +; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s + +; Some of these patterns can be matched as SSE min or max. Some of +; then can be matched provided that the operands are swapped. +; Some of them can't be matched at all and require a comparison +; and a conditional branch. + +; The naming convention is {,x_}{o,u}{gt,lt,ge,le}{,_inverse} +; x_ : use 0.0 instead of %y +; _inverse : swap the arms of the select. + +; CHECK: ogt: +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @ogt(double %x, double %y) nounwind { + %c = fcmp ogt double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: olt: +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @olt(double %x, double %y) nounwind { + %c = fcmp olt double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: ogt_inverse: +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @ogt_inverse(double %x, double %y) nounwind { + %c = fcmp ogt double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: olt_inverse: +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @olt_inverse(double %x, double %y) nounwind { + %c = fcmp olt double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: oge: +; CHECK-NEXT: ucomisd %xmm1, %xmm0 +define double @oge(double %x, double %y) nounwind { + %c = fcmp oge double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: ole: +; CHECK-NEXT: ucomisd %xmm0, %xmm1 +define double @ole(double %x, double %y) nounwind { + %c = fcmp ole double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: oge_inverse: +; CHECK-NEXT: ucomisd %xmm1, %xmm0 +define double @oge_inverse(double %x, double %y) nounwind { + %c = fcmp oge double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: ole_inverse: +; CHECK-NEXT: ucomisd %xmm0, %xmm1 +define double @ole_inverse(double %x, double %y) nounwind { + %c = fcmp ole double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: x_ogt: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ogt(double %x) nounwind { + %c = fcmp ogt double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_olt: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_olt(double %x) nounwind { + %c = fcmp olt double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_ogt_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ogt_inverse(double %x) nounwind { + %c = fcmp ogt double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_olt_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_olt_inverse(double %x) nounwind { + %c = fcmp olt double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_oge: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_oge(double %x) nounwind { + %c = fcmp oge double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_ole: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ole(double %x) nounwind { + %c = fcmp ole double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_oge_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_oge_inverse(double %x) nounwind { + %c = fcmp oge double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_ole_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ole_inverse(double %x) nounwind { + %c = fcmp ole double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: ugt: +; CHECK-NEXT: ucomisd %xmm0, %xmm1 +define double @ugt(double %x, double %y) nounwind { + %c = fcmp ugt double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: ult: +; CHECK-NEXT: ucomisd %xmm1, %xmm0 +define double @ult(double %x, double %y) nounwind { + %c = fcmp ult double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: ugt_inverse: +; CHECK-NEXT: ucomisd %xmm0, %xmm1 +define double @ugt_inverse(double %x, double %y) nounwind { + %c = fcmp ugt double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: ult_inverse: +; CHECK-NEXT: ucomisd %xmm1, %xmm0 +define double @ult_inverse(double %x, double %y) nounwind { + %c = fcmp ult double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: uge: +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @uge(double %x, double %y) nounwind { + %c = fcmp uge double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: ule: +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @ule(double %x, double %y) nounwind { + %c = fcmp ule double %x, %y + %d = select i1 %c, double %x, double %y + ret double %d +} + +; CHECK: uge_inverse: +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @uge_inverse(double %x, double %y) nounwind { + %c = fcmp uge double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: ule_inverse: +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @ule_inverse(double %x, double %y) nounwind { + %c = fcmp ule double %x, %y + %d = select i1 %c, double %y, double %x + ret double %d +} + +; CHECK: x_ugt: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ugt(double %x) nounwind { + %c = fcmp ugt double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_ult: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ult(double %x) nounwind { + %c = fcmp ult double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_ugt_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ugt_inverse(double %x) nounwind { + %c = fcmp ugt double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_ult_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ult_inverse(double %x) nounwind { + %c = fcmp ult double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_uge: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_uge(double %x) nounwind { + %c = fcmp uge double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_ule: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm0, %xmm1 +; CHECK-NEXT: movapd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ule(double %x) nounwind { + %c = fcmp ule double %x, 0.000000e+00 + %d = select i1 %c, double %x, double 0.000000e+00 + ret double %d +} + +; CHECK: x_uge_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: minsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_uge_inverse(double %x) nounwind { + %c = fcmp uge double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; CHECK: x_ule_inverse: +; CHECK-NEXT: pxor %xmm1, %xmm1 +; CHECK-NEXT: maxsd %xmm1, %xmm0 +; CHECK-NEXT: ret +define double @x_ule_inverse(double %x) nounwind { + %c = fcmp ule double %x, 0.000000e+00 + %d = select i1 %c, double 0.000000e+00, double %x + ret double %d +} + +; Test a few more misc. cases. + +; CHECK: clampTo3k_a: +; CHECK: minsd +define double @clampTo3k_a(double %x) nounwind readnone { +entry: + %0 = fcmp ogt double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_b: +; CHECK: minsd +define double @clampTo3k_b(double %x) nounwind readnone { +entry: + %0 = fcmp uge double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_c: +; CHECK: maxsd +define double @clampTo3k_c(double %x) nounwind readnone { +entry: + %0 = fcmp olt double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_d: +; CHECK: maxsd +define double @clampTo3k_d(double %x) nounwind readnone { +entry: + %0 = fcmp ule double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_e: +; CHECK: maxsd +define double @clampTo3k_e(double %x) nounwind readnone { +entry: + %0 = fcmp olt double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_f: +; CHECK: maxsd +define double @clampTo3k_f(double %x) nounwind readnone { +entry: + %0 = fcmp ule double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_g: +; CHECK: minsd +define double @clampTo3k_g(double %x) nounwind readnone { +entry: + %0 = fcmp ogt double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} + +; CHECK: clampTo3k_h: +; CHECK: minsd +define double @clampTo3k_h(double %x) nounwind readnone { +entry: + %0 = fcmp uge double %x, 3.000000e+03 ; <i1> [#uses=1] + %x_addr.0 = select i1 %0, double 3.000000e+03, double %x ; <double> [#uses=1] + ret double %x_addr.0 +} diff --git a/test/CodeGen/X86/sse-varargs.ll b/test/CodeGen/X86/sse-varargs.ll index 806126da2faf4..da38f0e148f6d 100644 --- a/test/CodeGen/X86/sse-varargs.ll +++ b/test/CodeGen/X86/sse-varargs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xmm | grep esp +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xmm | grep esp define i32 @t() nounwind { entry: diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll new file mode 100644 index 0000000000000..9f926f2bee7b3 --- /dev/null +++ b/test/CodeGen/X86/sse2.ll @@ -0,0 +1,34 @@ +; Tests for SSE2 and below, without SSE3+. +; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 | FileCheck %s + +define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind { + %tmp3 = load <2 x double>* %A, align 16 + %tmp7 = insertelement <2 x double> undef, double %B, i32 0 + %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 2, i32 1 > + store <2 x double> %tmp9, <2 x double>* %r, align 16 + ret void + +; CHECK: t1: +; CHECK: movl 8(%esp), %eax +; CHECK-NEXT: movapd (%eax), %xmm0 +; CHECK-NEXT: movlpd 12(%esp), %xmm0 +; CHECK-NEXT: movl 4(%esp), %eax +; CHECK-NEXT: movapd %xmm0, (%eax) +; CHECK-NEXT: ret +} + +define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind { + %tmp3 = load <2 x double>* %A, align 16 + %tmp7 = insertelement <2 x double> undef, double %B, i32 0 + %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 > + store <2 x double> %tmp9, <2 x double>* %r, align 16 + ret void + +; CHECK: t2: +; CHECK: movl 8(%esp), %eax +; CHECK-NEXT: movapd (%eax), %xmm0 +; CHECK-NEXT: movhpd 12(%esp), %xmm0 +; CHECK-NEXT: movl 4(%esp), %eax +; CHECK-NEXT: movapd %xmm0, (%eax) +; CHECK-NEXT: ret +} diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll new file mode 100644 index 0000000000000..703635c0f53a5 --- /dev/null +++ b/test/CodeGen/X86/sse3.ll @@ -0,0 +1,273 @@ +; These are tests for SSE3 codegen. Yonah has SSE3 and earlier but not SSSE3+. + +; RUN: llc < %s -march=x86-64 -mcpu=yonah -mtriple=i686-apple-darwin9\ +; RUN: | FileCheck %s --check-prefix=X64 + +; Test for v8xi16 lowering where we extract the first element of the vector and +; placed it in the second element of the result. + +define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind { +entry: + %tmp3 = load <8 x i16>* %old + %tmp6 = shufflevector <8 x i16> %tmp3, + <8 x i16> < i16 0, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >, + <8 x i32> < i32 8, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > + store <8 x i16> %tmp6, <8 x i16>* %dest + ret void + +; X64: t0: +; X64: movddup (%rsi), %xmm0 +; X64: pshuflw $0, %xmm0, %xmm0 +; X64: xorl %eax, %eax +; X64: pinsrw $0, %eax, %xmm0 +; X64: movaps %xmm0, (%rdi) +; X64: ret +} + +define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind { + %tmp1 = load <8 x i16>* %A + %tmp2 = load <8 x i16>* %B + %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp3 + +; X64: t1: +; X64: movl (%rsi), %eax +; X64: movaps (%rdi), %xmm0 +; X64: pinsrw $0, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp +; X64: t2: +; X64: pextrw $1, %xmm1, %eax +; X64: pinsrw $0, %eax, %xmm0 +; X64: pinsrw $3, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 > + ret <8 x i16> %tmp +; X64: t3: +; X64: pextrw $5, %xmm0, %eax +; X64: pshuflw $44, %xmm0, %xmm0 +; X64: pshufhw $27, %xmm0, %xmm0 +; X64: pinsrw $3, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 > + ret <8 x i16> %tmp +; X64: t4: +; X64: pextrw $7, %xmm0, %eax +; X64: pshufhw $100, %xmm0, %xmm1 +; X64: pinsrw $1, %eax, %xmm1 +; X64: pextrw $1, %xmm0, %eax +; X64: movaps %xmm1, %xmm0 +; X64: pinsrw $4, %eax, %xmm0 +; X64: ret +} + +define <8 x i16> @t5(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 > + ret <8 x i16> %tmp +; X64: t5: +; X64: movlhps %xmm1, %xmm0 +; X64: pshufd $114, %xmm0, %xmm0 +; X64: ret +} + +define <8 x i16> @t6(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 > + ret <8 x i16> %tmp +; X64: t6: +; X64: movss %xmm1, %xmm0 +; X64: ret +} + +define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind { + %tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 > + ret <8 x i16> %tmp +; X64: t7: +; X64: pshuflw $-80, %xmm0, %xmm0 +; X64: pshufhw $-56, %xmm0, %xmm0 +; X64: ret +} + +define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind { + %tmp = load <2 x i64>* %A + %tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16> + %tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0 + %tmp1 = extractelement <8 x i16> %tmp.upgrd.1, i32 1 + %tmp2 = extractelement <8 x i16> %tmp.upgrd.1, i32 2 + %tmp3 = extractelement <8 x i16> %tmp.upgrd.1, i32 3 + %tmp4 = extractelement <8 x i16> %tmp.upgrd.1, i32 4 + %tmp5 = extractelement <8 x i16> %tmp.upgrd.1, i32 5 + %tmp6 = extractelement <8 x i16> %tmp.upgrd.1, i32 6 + %tmp7 = extractelement <8 x i16> %tmp.upgrd.1, i32 7 + %tmp8 = insertelement <8 x i16> undef, i16 %tmp2, i32 0 + %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1 + %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2 + %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 3 + %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp6, i32 4 + %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 5 + %tmp14 = insertelement <8 x i16> %tmp13, i16 %tmp4, i32 6 + %tmp15 = insertelement <8 x i16> %tmp14, i16 %tmp7, i32 7 + %tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64> + store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res + ret void +; X64: t8: +; X64: pshuflw $-58, (%rsi), %xmm0 +; X64: pshufhw $-58, %xmm0, %xmm0 +; X64: movaps %xmm0, (%rdi) +; X64: ret +} + +define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind { + %tmp = load <4 x float>* %r + %tmp.upgrd.3 = bitcast <2 x i32>* %A to double* + %tmp.upgrd.4 = load double* %tmp.upgrd.3 + %tmp.upgrd.5 = insertelement <2 x double> undef, double %tmp.upgrd.4, i32 0 + %tmp5 = insertelement <2 x double> %tmp.upgrd.5, double undef, i32 1 + %tmp6 = bitcast <2 x double> %tmp5 to <4 x float> + %tmp.upgrd.6 = extractelement <4 x float> %tmp, i32 0 + %tmp7 = extractelement <4 x float> %tmp, i32 1 + %tmp8 = extractelement <4 x float> %tmp6, i32 0 + %tmp9 = extractelement <4 x float> %tmp6, i32 1 + %tmp10 = insertelement <4 x float> undef, float %tmp.upgrd.6, i32 0 + %tmp11 = insertelement <4 x float> %tmp10, float %tmp7, i32 1 + %tmp12 = insertelement <4 x float> %tmp11, float %tmp8, i32 2 + %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 + store <4 x float> %tmp13, <4 x float>* %r + ret void +; X64: t9: +; X64: movsd (%rsi), %xmm0 +; X64: movhps %xmm0, (%rdi) +; X64: ret +} + + + +; FIXME: This testcase produces icky code. It can be made much better! +; PR2585 + +@g1 = external constant <4 x i32> +@g2 = external constant <4 x i16> + +define internal void @t10() nounwind { + load <4 x i32>* @g1, align 16 + bitcast <4 x i32> %1 to <8 x i16> + shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef > + bitcast <8 x i16> %3 to <2 x i64> + extractelement <2 x i64> %4, i32 0 + bitcast i64 %5 to <4 x i16> + store <4 x i16> %6, <4 x i16>* @g2, align 8 + ret void +; X64: t10: +; X64: movq _g1@GOTPCREL(%rip), %rax +; X64: movaps (%rax), %xmm0 +; X64: pextrw $4, %xmm0, %eax +; X64: movaps %xmm0, %xmm1 +; X64: movlhps %xmm1, %xmm1 +; X64: pshuflw $8, %xmm1, %xmm1 +; X64: pinsrw $2, %eax, %xmm1 +; X64: pextrw $6, %xmm0, %eax +; X64: pinsrw $3, %eax, %xmm1 +; X64: movq _g2@GOTPCREL(%rip), %rax +; X64: movq %xmm1, (%rax) +; X64: ret +} + + +; Pack various elements via shuffles. +define <8 x i16> @t11(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + ret <8 x i16> %tmp7 + +; X64: t11: +; X64: movd %xmm1, %eax +; X64: movlhps %xmm0, %xmm0 +; X64: pshuflw $1, %xmm0, %xmm0 +; X64: pinsrw $1, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t12(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef > + ret <8 x i16> %tmp9 + +; X64: t12: +; X64: pextrw $3, %xmm1, %eax +; X64: movlhps %xmm0, %xmm0 +; X64: pshufhw $3, %xmm0, %xmm0 +; X64: pinsrw $5, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef > + ret <8 x i16> %tmp9 +; X64: t13: +; X64: punpcklqdq %xmm0, %xmm1 +; X64: pextrw $3, %xmm1, %eax +; X64: pshufd $52, %xmm1, %xmm0 +; X64: pinsrw $4, %eax, %xmm0 +; X64: ret +} + + +define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef > + ret <8 x i16> %tmp9 +; X64: t14: +; X64: punpcklqdq %xmm0, %xmm1 +; X64: pshufhw $8, %xmm1, %xmm0 +; X64: ret +} + + + +define <8 x i16> @t15(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { +entry: + %tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef > + ret <8 x i16> %tmp8 +; X64: t15: +; X64: pextrw $7, %xmm0, %eax +; X64: punpcklqdq %xmm1, %xmm0 +; X64: pshuflw $-128, %xmm0, %xmm0 +; X64: pinsrw $2, %eax, %xmm0 +; X64: ret +} + + +; Test yonah where we convert a shuffle to pextrw and pinrsw +define <16 x i8> @t16(<16 x i8> %T0) nounwind readnone { +entry: + %tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + %tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef > + ret <16 x i8> %tmp9 +; X64: t16: +; X64: movaps LCPI17_0(%rip), %xmm1 +; X64: movd %xmm1, %eax +; X64: pinsrw $0, %eax, %xmm1 +; X64: pextrw $8, %xmm0, %eax +; X64: pinsrw $1, %eax, %xmm1 +; X64: pextrw $1, %xmm1, %ecx +; X64: movd %xmm1, %edx +; X64: pinsrw $0, %edx, %xmm1 +; X64: movzbl %cl, %ecx +; X64: andw $-256, %ax +; X64: orw %cx, %ax +; X64: movaps %xmm1, %xmm0 +; X64: pinsrw $1, %eax, %xmm0 +; X64: ret +} diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll new file mode 100644 index 0000000000000..a734c05b8686f --- /dev/null +++ b/test/CodeGen/X86/sse41.ll @@ -0,0 +1,226 @@ +; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse41 | FileCheck %s -check-prefix=X64 + +@g16 = external global i16 + +define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind { + %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1 + ret <4 x i32> %tmp1 +; X32: pinsrd_1: +; X32: pinsrd $1, 4(%esp), %xmm0 + +; X64: pinsrd_1: +; X64: pinsrd $1, %edi, %xmm0 +} + +define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind { + %tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1 + ret <16 x i8> %tmp1 +; X32: pinsrb_1: +; X32: pinsrb $1, 4(%esp), %xmm0 + +; X64: pinsrb_1: +; X64: pinsrb $1, %edi, %xmm0 +} + + +define <2 x i64> @pmovsxbd_1(i32* %p) nounwind { +entry: + %0 = load i32* %p, align 4 + %1 = insertelement <4 x i32> undef, i32 %0, i32 0 + %2 = insertelement <4 x i32> %1, i32 0, i32 1 + %3 = insertelement <4 x i32> %2, i32 0, i32 2 + %4 = insertelement <4 x i32> %3, i32 0, i32 3 + %5 = bitcast <4 x i32> %4 to <16 x i8> + %6 = tail call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %5) nounwind readnone + %7 = bitcast <4 x i32> %6 to <2 x i64> + ret <2 x i64> %7 + +; X32: _pmovsxbd_1: +; X32: movl 4(%esp), %eax +; X32: pmovsxbd (%eax), %xmm0 + +; X64: _pmovsxbd_1: +; X64: pmovsxbd (%rdi), %xmm0 +} + +define <2 x i64> @pmovsxwd_1(i64* %p) nounwind readonly { +entry: + %0 = load i64* %p ; <i64> [#uses=1] + %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0 ; <<2 x i64>> [#uses=1] + %1 = bitcast <2 x i64> %tmp2 to <8 x i16> ; <<8 x i16>> [#uses=1] + %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone ; <<4 x i32>> [#uses=1] + %3 = bitcast <4 x i32> %2 to <2 x i64> ; <<2 x i64>> [#uses=1] + ret <2 x i64> %3 + +; X32: _pmovsxwd_1: +; X32: movl 4(%esp), %eax +; X32: pmovsxwd (%eax), %xmm0 + +; X64: _pmovsxwd_1: +; X64: pmovsxwd (%rdi), %xmm0 +} + + + + +define <2 x i64> @pmovzxbq_1() nounwind { +entry: + %0 = load i16* @g16, align 2 ; <i16> [#uses=1] + %1 = insertelement <8 x i16> undef, i16 %0, i32 0 ; <<8 x i16>> [#uses=1] + %2 = bitcast <8 x i16> %1 to <16 x i8> ; <<16 x i8>> [#uses=1] + %3 = tail call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %2) nounwind readnone ; <<2 x i64>> [#uses=1] + ret <2 x i64> %3 + +; X32: _pmovzxbq_1: +; X32: movl L_g16$non_lazy_ptr, %eax +; X32: pmovzxbq (%eax), %xmm0 + +; X64: _pmovzxbq_1: +; X64: movq _g16@GOTPCREL(%rip), %rax +; X64: pmovzxbq (%rax), %xmm0 +} + +declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone +declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone +declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone + + + + +define i32 @extractps_1(<4 x float> %v) nounwind { + %s = extractelement <4 x float> %v, i32 3 + %i = bitcast float %s to i32 + ret i32 %i + +; X32: _extractps_1: +; X32: extractps $3, %xmm0, %eax + +; X64: _extractps_1: +; X64: extractps $3, %xmm0, %eax +} +define i32 @extractps_2(<4 x float> %v) nounwind { + %t = bitcast <4 x float> %v to <4 x i32> + %s = extractelement <4 x i32> %t, i32 3 + ret i32 %s + +; X32: _extractps_2: +; X32: extractps $3, %xmm0, %eax + +; X64: _extractps_2: +; X64: extractps $3, %xmm0, %eax +} + + +; The non-store form of extractps puts its result into a GPR. +; This makes it suitable for an extract from a <4 x float> that +; is bitcasted to i32, but unsuitable for much of anything else. + +define float @ext_1(<4 x float> %v) nounwind { + %s = extractelement <4 x float> %v, i32 3 + %t = fadd float %s, 1.0 + ret float %t + +; X32: _ext_1: +; X32: pshufd $3, %xmm0, %xmm0 +; X32: addss LCPI8_0, %xmm0 + +; X64: _ext_1: +; X64: pshufd $3, %xmm0, %xmm0 +; X64: addss LCPI8_0(%rip), %xmm0 +} +define float @ext_2(<4 x float> %v) nounwind { + %s = extractelement <4 x float> %v, i32 3 + ret float %s + +; X32: _ext_2: +; X32: pshufd $3, %xmm0, %xmm0 + +; X64: _ext_2: +; X64: pshufd $3, %xmm0, %xmm0 +} +define i32 @ext_3(<4 x i32> %v) nounwind { + %i = extractelement <4 x i32> %v, i32 3 + ret i32 %i + +; X32: _ext_3: +; X32: pextrd $3, %xmm0, %eax + +; X64: _ext_3: +; X64: pextrd $3, %xmm0, %eax +} + +define <4 x float> @insertps_1(<4 x float> %t1, <4 x float> %t2) nounwind { + %tmp1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %t1, <4 x float> %t2, i32 1) nounwind readnone + ret <4 x float> %tmp1 +; X32: _insertps_1: +; X32: insertps $1, %xmm1, %xmm0 + +; X64: _insertps_1: +; X64: insertps $1, %xmm1, %xmm0 +} + +declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) nounwind readnone + +define <4 x float> @insertps_2(<4 x float> %t1, float %t2) nounwind { + %tmp1 = insertelement <4 x float> %t1, float %t2, i32 0 + ret <4 x float> %tmp1 +; X32: _insertps_2: +; X32: insertps $0, 4(%esp), %xmm0 + +; X64: _insertps_2: +; X64: insertps $0, %xmm1, %xmm0 +} + +define <4 x float> @insertps_3(<4 x float> %t1, <4 x float> %t2) nounwind { + %tmp2 = extractelement <4 x float> %t2, i32 0 + %tmp1 = insertelement <4 x float> %t1, float %tmp2, i32 0 + ret <4 x float> %tmp1 +; X32: _insertps_3: +; X32: insertps $0, %xmm1, %xmm0 + +; X64: _insertps_3: +; X64: insertps $0, %xmm1, %xmm0 +} + +define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %t1, <4 x float> %t2) nounwind readnone + ret i32 %tmp1 +; X32: _ptestz_1: +; X32: ptest %xmm1, %xmm0 +; X32: sete %al + +; X64: _ptestz_1: +; X64: ptest %xmm1, %xmm0 +; X64: sete %al +} + +define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %t1, <4 x float> %t2) nounwind readnone + ret i32 %tmp1 +; X32: _ptestz_2: +; X32: ptest %xmm1, %xmm0 +; X32: setb %al + +; X64: _ptestz_2: +; X64: ptest %xmm1, %xmm0 +; X64: setb %al +} + +define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %t1, <4 x float> %t2) nounwind readnone + ret i32 %tmp1 +; X32: _ptestz_3: +; X32: ptest %xmm1, %xmm0 +; X32: seta %al + +; X64: _ptestz_3: +; X64: ptest %xmm1, %xmm0 +; X64: seta %al +} + + +declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone + diff --git a/test/CodeGen/X86/sse42.ll b/test/CodeGen/X86/sse42.ll new file mode 100644 index 0000000000000..c9c4d012102a3 --- /dev/null +++ b/test/CodeGen/X86/sse42.ll @@ -0,0 +1,38 @@ +; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64 + +declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind +declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind +declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind + +define i32 @crc32_8(i32 %a, i8 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b) + ret i32 %tmp +; X32: _crc32_8: +; X32: crc32 8(%esp), %eax + +; X64: _crc32_8: +; X64: crc32 %sil, %eax +} + + +define i32 @crc32_16(i32 %a, i16 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b) + ret i32 %tmp +; X32: _crc32_16: +; X32: crc32 8(%esp), %eax + +; X64: _crc32_16: +; X64: crc32 %si, %eax +} + + +define i32 @crc32_32(i32 %a, i32 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b) + ret i32 %tmp +; X32: _crc32_32: +; X32: crc32 8(%esp), %eax + +; X64: _crc32_32: +; X64: crc32 %esi, %eax +} diff --git a/test/CodeGen/X86/sse_reload_fold.ll b/test/CodeGen/X86/sse_reload_fold.ll index 547763e4a7935..dc3d6fe6797dd 100644 --- a/test/CodeGen/X86/sse_reload_fold.ll +++ b/test/CodeGen/X86/sse_reload_fold.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \ +; RUN: llc < %s -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \ ; RUN: grep fail | count 1 declare float @test_f(float %f) diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll index dda6f0d928c95..cb65e9b50fe2f 100644 --- a/test/CodeGen/X86/stack-align.ll +++ b/test/CodeGen/X86/stack-align.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=static -mcpu=yonah | grep {andpd.*4(%esp), %xmm} +; RUN: llc < %s -relocation-model=static -mcpu=yonah | grep {andpd.*4(%esp), %xmm} ; The double argument is at 4(esp) which is 16-byte aligned, allowing us to ; fold the load into the andpd. diff --git a/test/CodeGen/X86/stack-color-with-reg-2.ll b/test/CodeGen/X86/stack-color-with-reg-2.ll index bc4182f65dcb0..c1f2672293512 100644 --- a/test/CodeGen/X86/stack-color-with-reg-2.ll +++ b/test/CodeGen/X86/stack-color-with-reg-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs | grep {movl\[\[:space:\]\]%eax, %ebx} +; RUN: llc < %s -mtriple=i386-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs | grep {movl\[\[:space:\]\]%eax, %ebx} %"struct..0$_67" = type { i32, %"struct.llvm::MachineOperand"**, %"struct.llvm::MachineOperand"* } %"struct..1$_69" = type { i32 } diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll index 72a985a6c29bb..672f77eef02c9 100644 --- a/test/CodeGen/X86/stack-color-with-reg.ll +++ b/test/CodeGen/X86/stack-color-with-reg.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t -; RUN: grep stackcoloring %t | grep "loads eliminated" -; RUN: grep stackcoloring %t | grep "stores eliminated" +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t +; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 +; RUN: grep asm-printer %t | grep 179 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 diff --git a/test/CodeGen/X86/stdarg.ll b/test/CodeGen/X86/stdarg.ll new file mode 100644 index 0000000000000..9778fa1389486 --- /dev/null +++ b/test/CodeGen/X86/stdarg.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=x86-64 | grep {testb \[%\]al, \[%\]al} + +%struct.__va_list_tag = type { i32, i32, i8*, i8* } + +define void @foo(i32 %x, ...) nounwind { +entry: + %ap = alloca [1 x %struct.__va_list_tag], align 8; <[1 x %struct.__va_list_tag]*> [#uses=2] + %ap12 = bitcast [1 x %struct.__va_list_tag]* %ap to i8*; <i8*> [#uses=2] + call void @llvm.va_start(i8* %ap12) + %ap3 = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0; <%struct.__va_list_tag*> [#uses=1] + call void @bar(%struct.__va_list_tag* %ap3) nounwind + call void @llvm.va_end(i8* %ap12) + ret void +} + +declare void @llvm.va_start(i8*) nounwind + +declare void @bar(%struct.__va_list_tag*) + +declare void @llvm.va_end(i8*) nounwind diff --git a/test/CodeGen/X86/store-empty-member.ll b/test/CodeGen/X86/store-empty-member.ll new file mode 100644 index 0000000000000..37f86c60fae5f --- /dev/null +++ b/test/CodeGen/X86/store-empty-member.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +; Don't crash on an empty struct member. + +; CHECK: movl $2, 4(%esp) +; CHECK: movl $1, (%esp) + +%testType = type {i32, [0 x i32], i32} + +define void @foo() nounwind { + %1 = alloca %testType + volatile store %testType {i32 1, [0 x i32] zeroinitializer, i32 2}, %testType* %1 + ret void +} diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll index 70cb046600bc3..206886bb608fd 100644 --- a/test/CodeGen/X86/store-fp-constant.ll +++ b/test/CodeGen/X86/store-fp-constant.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep rodata -; RUN: llvm-as < %s | llc -march=x86 | not grep literal +; RUN: llc < %s -march=x86 | not grep rodata +; RUN: llc < %s -march=x86 | not grep literal ; ; Check that no FP constants in this testcase ends up in the ; constant pool. diff --git a/test/CodeGen/X86/store-global-address.ll b/test/CodeGen/X86/store-global-address.ll index 0695eee9a8883..c8d4cbceea3da 100644 --- a/test/CodeGen/X86/store-global-address.ll +++ b/test/CodeGen/X86/store-global-address.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep movl | count 1 +; RUN: llc < %s -march=x86 | grep movl | count 1 @dst = global i32 0 ; <i32*> [#uses=1] @ptr = global i32* null ; <i32**> [#uses=1] diff --git a/test/CodeGen/X86/store_op_load_fold.ll b/test/CodeGen/X86/store_op_load_fold.ll index acef174638786..66d0e47c6d489 100644 --- a/test/CodeGen/X86/store_op_load_fold.ll +++ b/test/CodeGen/X86/store_op_load_fold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep mov +; RUN: llc < %s -march=x86 | not grep mov ; ; Test the add and load are folded into the store instruction. diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll index 09aaba155d99b..0ccfe470db5f9 100644 --- a/test/CodeGen/X86/store_op_load_fold2.ll +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ ; RUN: grep {and DWORD PTR} | count 2 target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/storetrunc-fp.ll b/test/CodeGen/X86/storetrunc-fp.ll index 945cf48f9bde5..03ad093ba8607 100644 --- a/test/CodeGen/X86/storetrunc-fp.ll +++ b/test/CodeGen/X86/storetrunc-fp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep flds +; RUN: llc < %s -march=x86 | not grep flds define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) { %c = fadd x86_fp80 %a, %b diff --git a/test/CodeGen/X86/stride-nine-with-base-reg.ll b/test/CodeGen/X86/stride-nine-with-base-reg.ll index cc26487cf264b..7aae9eb1ab967 100644 --- a/test/CodeGen/X86/stride-nine-with-base-reg.ll +++ b/test/CodeGen/X86/stride-nine-with-base-reg.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -relocation-model=static | not grep lea -; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea +; RUN: llc < %s -march=x86 -relocation-model=static | not grep lea +; RUN: llc < %s -march=x86-64 | not grep lea ; P should be sunk into the loop and folded into the address mode. There ; shouldn't be any lea instructions inside the loop. diff --git a/test/CodeGen/X86/stride-reuse.ll b/test/CodeGen/X86/stride-reuse.ll index 277a4430acaad..a99a9c95a4cc9 100644 --- a/test/CodeGen/X86/stride-reuse.ll +++ b/test/CodeGen/X86/stride-reuse.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep lea -; RUN: llvm-as < %s | llc -march=x86-64 | not grep lea +; RUN: llc < %s -march=x86 | not grep lea +; RUN: llc < %s -march=x86-64 | not grep lea @B = external global [1000 x float], align 32 @A = external global [1000 x float], align 32 diff --git a/test/CodeGen/X86/sub-with-overflow.ll b/test/CodeGen/X86/sub-with-overflow.ll index 98f02524d7a18..19f4079abb5f7 100644 --- a/test/CodeGen/X86/sub-with-overflow.ll +++ b/test/CodeGen/X86/sub-with-overflow.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {jo} | count 1 -; RUN: llvm-as < %s | llc -march=x86 | grep {jb} | count 1 +; RUN: llc < %s -march=x86 | grep {jo} | count 1 +; RUN: llc < %s -march=x86 | grep {jb} | count 1 @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" diff --git a/test/CodeGen/X86/subreg-to-reg-0.ll b/test/CodeGen/X86/subreg-to-reg-0.ll index 6b60f6526595a..d718c85a1d1f4 100644 --- a/test/CodeGen/X86/subreg-to-reg-0.ll +++ b/test/CodeGen/X86/subreg-to-reg-0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -march=x86-64 | grep mov | count 1 ; Do eliminate the zero-extension instruction and rely on ; x86-64's implicit zero-extension! diff --git a/test/CodeGen/X86/subreg-to-reg-1.ll b/test/CodeGen/X86/subreg-to-reg-1.ll index aa26f06aba96a..a297728aee897 100644 --- a/test/CodeGen/X86/subreg-to-reg-1.ll +++ b/test/CodeGen/X86/subreg-to-reg-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {leal .*), %e.\*} | count 1 +; RUN: llc < %s -march=x86-64 | grep {leal .*), %e.\*} | count 1 ; Don't eliminate or coalesce away the explicit zero-extension! ; This is currently using an leal because of a 3-addressification detail, diff --git a/test/CodeGen/X86/subreg-to-reg-2.ll b/test/CodeGen/X86/subreg-to-reg-2.ll index d0b40cd5d4712..49d2e88d2c8d6 100644 --- a/test/CodeGen/X86/subreg-to-reg-2.ll +++ b/test/CodeGen/X86/subreg-to-reg-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movl +; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl ; rdar://6707985 %XXOO = type { %"struct.XXC::XXCC", i8*, %"struct.XXC::XXOO::$_71" } diff --git a/test/CodeGen/X86/subreg-to-reg-3.ll b/test/CodeGen/X86/subreg-to-reg-3.ll index 6634538c2afd0..931ae758ac5cc 100644 --- a/test/CodeGen/X86/subreg-to-reg-3.ll +++ b/test/CodeGen/X86/subreg-to-reg-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep imull +; RUN: llc < %s -march=x86-64 | grep imull ; Don't eliminate or coalesce away the explicit zero-extension! diff --git a/test/CodeGen/X86/subreg-to-reg-4.ll b/test/CodeGen/X86/subreg-to-reg-4.ll index bb6af3988c95c..0ea5541c89dca 100644 --- a/test/CodeGen/X86/subreg-to-reg-4.ll +++ b/test/CodeGen/X86/subreg-to-reg-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep leaq %t ; RUN: not grep incq %t ; RUN: not grep decq %t diff --git a/test/CodeGen/X86/subreg-to-reg-5.ll b/test/CodeGen/X86/subreg-to-reg-5.ll index 81b262ace84d1..ba4c307d1090a 100644 --- a/test/CodeGen/X86/subreg-to-reg-5.ll +++ b/test/CodeGen/X86/subreg-to-reg-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86-64 > %t ; RUN: grep addl %t ; RUN: not egrep {movl|movq} %t diff --git a/test/CodeGen/X86/subreg-to-reg-6.ll b/test/CodeGen/X86/subreg-to-reg-6.ll index f18eef7d1970e..76430cd783e36 100644 --- a/test/CodeGen/X86/subreg-to-reg-6.ll +++ b/test/CodeGen/X86/subreg-to-reg-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 define i64 @foo() nounwind { entry: diff --git a/test/CodeGen/X86/switch-zextload.ll b/test/CodeGen/X86/switch-zextload.ll index f3c701ff5f929..55425bc7da5cb 100644 --- a/test/CodeGen/X86/switch-zextload.ll +++ b/test/CodeGen/X86/switch-zextload.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1 +; RUN: llc < %s -march=x86 | grep mov | count 1 ; Do zextload, instead of a load and a separate zext. diff --git a/test/CodeGen/X86/swizzle.ll b/test/CodeGen/X86/swizzle.ll index d00bb9a0fadbd..23e0c2453d646 100644 --- a/test/CodeGen/X86/swizzle.ll +++ b/test/CodeGen/X86/swizzle.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movlps -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movups +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movlps +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movups ; rdar://6523650 %struct.vector4_t = type { <4 x float> } diff --git a/test/CodeGen/X86/tailcall-i1.ll b/test/CodeGen/X86/tailcall-i1.ll index 0ec6a77807220..8ef1f11383be9 100644 --- a/test/CodeGen/X86/tailcall-i1.ll +++ b/test/CodeGen/X86/tailcall-i1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL define fastcc i1 @i1test(i32, i32, i32, i32) { entry: %4 = tail call fastcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3) diff --git a/test/CodeGen/X86/tailcall-stackalign.ll b/test/CodeGen/X86/tailcall-stackalign.ll index ff960b8ce1ffa..110472c8b9f3b 100644 --- a/test/CodeGen/X86/tailcall-stackalign.ll +++ b/test/CodeGen/X86/tailcall-stackalign.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12 +; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | grep -A 1 call | grep -A 1 tailcaller | grep subl | grep 12 ; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt ; is enabled, ensure that a normal fastcc call has matching stack size diff --git a/test/CodeGen/X86/tailcall-structret.ll b/test/CodeGen/X86/tailcall-structret.ll index e94d7d8befaa9..d8be4b2e2dfd8 100644 --- a/test/CodeGen/X86/tailcall-structret.ll +++ b/test/CodeGen/X86/tailcall-structret.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL define fastcc { { i8*, i8* }*, i8*} @init({ { i8*, i8* }*, i8*}, i32) { entry: %2 = tail call fastcc { { i8*, i8* }*, i8* } @init({ { i8*, i8*}*, i8*} %0, i32 %1) diff --git a/test/CodeGen/X86/tailcall-void.ll b/test/CodeGen/X86/tailcall-void.ll index 27b2a2856adaa..4e578d1b6410d 100644 --- a/test/CodeGen/X86/tailcall-void.ll +++ b/test/CodeGen/X86/tailcall-void.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL define fastcc void @i1test(i32, i32, i32, i32) { entry: tail call fastcc void @i1test( i32 %0, i32 %1, i32 %2, i32 %3) diff --git a/test/CodeGen/X86/tailcall1.ll b/test/CodeGen/X86/tailcall1.ll index deedb86e95b8b..a4f87c021a951 100644 --- a/test/CodeGen/X86/tailcall1.ll +++ b/test/CodeGen/X86/tailcall1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { entry: ret i32 %a3 diff --git a/test/CodeGen/X86/tailcallbyval.ll b/test/CodeGen/X86/tailcallbyval.ll index 916be566a14a3..7002560c82a05 100644 --- a/test/CodeGen/X86/tailcallbyval.ll +++ b/test/CodeGen/X86/tailcallbyval.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1 +; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86 -tailcallopt | grep {movl\[\[:space:\]\]*4(%esp), %eax} | count 1 %struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll index 7b65863f00b0c..7c685b85807e0 100644 --- a/test/CodeGen/X86/tailcallbyval64.ll +++ b/test/CodeGen/X86/tailcallbyval64.ll @@ -1,15 +1,15 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep TAILCALL +; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL ; Expect 2 rep;movs because of tail call byval lowering. -; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2 +; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2 ; A sequence of copyto/copyfrom virtual registers is used to deal with byval ; lowering appearing after moving arguments to registers. The following two ; checks verify that the register allocator changes those sequences to direct ; moves to argument register where it can (for registers that are not used in ; byval lowering - not rsi, not rdi, not rcx). ; Expect argument 4 to be moved directly to register edx. -; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx +; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {7} | grep edx ; Expect argument 6 to be moved directly to register r8. -; RUN: llvm-as < %s | llc -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8 +; RUN: llc < %s -march=x86-64 -tailcallopt | grep movl | grep {17} | grep r8 %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, diff --git a/test/CodeGen/X86/tailcallfp.ll b/test/CodeGen/X86/tailcallfp.ll index f6149351038b3..c0b609ac956ec 100644 --- a/test/CodeGen/X86/tailcallfp.ll +++ b/test/CodeGen/X86/tailcallfp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -tailcallopt | not grep call +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -tailcallopt | not grep call define fastcc i32 @bar(i32 %X, i32(double, i32) *%FP) { %Y = tail call fastcc i32 %FP(double 0.0, i32 %X) ret i32 %Y diff --git a/test/CodeGen/X86/tailcallfp2.ll b/test/CodeGen/X86/tailcallfp2.ll index 151701ed439df..be4f96cfb5e64 100644 --- a/test/CodeGen/X86/tailcallfp2.ll +++ b/test/CodeGen/X86/tailcallfp2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax} +; RUN: llc < %s -march=x86 -tailcallopt | grep {jmp} | grep {\\*%eax} declare i32 @putchar(i32) diff --git a/test/CodeGen/X86/tailcallpic1.ll b/test/CodeGen/X86/tailcallpic1.ll index 54074eb0ba2a6..60e3be5c50fda 100644 --- a/test/CodeGen/X86/tailcallpic1.ll +++ b/test/CodeGen/X86/tailcallpic1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep TAILCALL +; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep TAILCALL define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { entry: diff --git a/test/CodeGen/X86/tailcallpic2.ll b/test/CodeGen/X86/tailcallpic2.ll index 60818e4f62c62..eaa76312396c6 100644 --- a/test/CodeGen/X86/tailcallpic2.ll +++ b/test/CodeGen/X86/tailcallpic2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep -v TAILCALL +; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep -v TAILCALL define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { entry: diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index c81327e5143a7..73c59bb639a6f 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -1,14 +1,17 @@ -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 | grep TAILCALL +; RUN: llc < %s -tailcallopt -march=x86-64 | FileCheck %s + ; Check that lowered arguments on the stack do not overwrite each other. -; Move param %in1 to temp register (%eax). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl 40(%rsp), %eax} -; Add %in1 %p1 to another temporary register (%r9d). -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %edi, %r10d} -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {addl 32(%rsp), %r10d} +; Add %in1 %p1 to a different temporary register (%eax). +; CHECK: movl %edi, %eax +; CHECK: addl 32(%rsp), %eax +; Move param %in1 to temp register (%r10d). +; CHECK: movl 40(%rsp), %r10d ; Move result of addition to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %r10d, 40(%rsp)} +; CHECK: movl %eax, 40(%rsp) ; Move param %in2 to stack. -; RUN: llvm-as < %s | llc -tailcallopt -march=x86-64 -x86-asm-syntax=att | grep {movl %eax, 32(%rsp)} +; CHECK: movl %r10d, 32(%rsp) +; Eventually, do a TAILCALL +; CHECK: TAILCALL declare fastcc i32 @tailcallee(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5, i32 %p6, i32 %a, i32 %b) diff --git a/test/CodeGen/X86/test-nofold.ll b/test/CodeGen/X86/test-nofold.ll index a24a9a0940a0e..772ff6c3e7664 100644 --- a/test/CodeGen/X86/test-nofold.ll +++ b/test/CodeGen/X86/test-nofold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x} +; RUN: llc < %s -march=x86 -mcpu=yonah | grep {testl.*%e.x.*%e.x} ; rdar://5752025 ; We don't want to fold the and into the test, because the and clobbers its diff --git a/test/CodeGen/X86/test-shrink-bug.ll b/test/CodeGen/X86/test-shrink-bug.ll new file mode 100644 index 0000000000000..64631ea5fc9b9 --- /dev/null +++ b/test/CodeGen/X86/test-shrink-bug.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s | FileCheck %s + +; Codegen shouldn't reduce the comparison down to testb $-1, %al +; because that changes the result of the signed test. +; PR5132 +; CHECK: testw $255, %ax + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin10.0" + +@g_14 = global i8 -6, align 1 ; <i8*> [#uses=1] + +declare i32 @func_16(i8 signext %p_19, i32 %p_20) nounwind + +define i32 @func_35(i64 %p_38) nounwind ssp { +entry: + %tmp = load i8* @g_14 ; <i8> [#uses=2] + %conv = zext i8 %tmp to i32 ; <i32> [#uses=1] + %cmp = icmp sle i32 1, %conv ; <i1> [#uses=1] + %conv2 = zext i1 %cmp to i32 ; <i32> [#uses=1] + %call = call i32 @func_16(i8 signext %tmp, i32 %conv2) ssp ; <i32> [#uses=1] + ret i32 1 +} diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll new file mode 100644 index 0000000000000..1d636930641f8 --- /dev/null +++ b/test/CodeGen/X86/test-shrink.ll @@ -0,0 +1,158 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 + +; CHECK-64: g64xh: +; CHECK-64: testb $8, %ah +; CHECK-64: ret +; CHECK-32: g64xh: +; CHECK-32: testb $8, %ah +; CHECK-32: ret +define void @g64xh(i64 inreg %x) nounwind { + %t = and i64 %x, 2048 + %s = icmp eq i64 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g64xl: +; CHECK-64: testb $8, %dil +; CHECK-64: ret +; CHECK-32: g64xl: +; CHECK-32: testb $8, %al +; CHECK-32: ret +define void @g64xl(i64 inreg %x) nounwind { + %t = and i64 %x, 8 + %s = icmp eq i64 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g32xh: +; CHECK-64: testb $8, %ah +; CHECK-64: ret +; CHECK-32: g32xh: +; CHECK-32: testb $8, %ah +; CHECK-32: ret +define void @g32xh(i32 inreg %x) nounwind { + %t = and i32 %x, 2048 + %s = icmp eq i32 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g32xl: +; CHECK-64: testb $8, %dil +; CHECK-64: ret +; CHECK-32: g32xl: +; CHECK-32: testb $8, %al +; CHECK-32: ret +define void @g32xl(i32 inreg %x) nounwind { + %t = and i32 %x, 8 + %s = icmp eq i32 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g16xh: +; CHECK-64: testb $8, %ah +; CHECK-64: ret +; CHECK-32: g16xh: +; CHECK-32: testb $8, %ah +; CHECK-32: ret +define void @g16xh(i16 inreg %x) nounwind { + %t = and i16 %x, 2048 + %s = icmp eq i16 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g16xl: +; CHECK-64: testb $8, %dil +; CHECK-64: ret +; CHECK-32: g16xl: +; CHECK-32: testb $8, %al +; CHECK-32: ret +define void @g16xl(i16 inreg %x) nounwind { + %t = and i16 %x, 8 + %s = icmp eq i16 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g64x16: +; CHECK-64: testw $-32640, %di +; CHECK-64: ret +; CHECK-32: g64x16: +; CHECK-32: testw $-32640, %ax +; CHECK-32: ret +define void @g64x16(i64 inreg %x) nounwind { + %t = and i64 %x, 32896 + %s = icmp eq i64 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g32x16: +; CHECK-64: testw $-32640, %di +; CHECK-64: ret +; CHECK-32: g32x16: +; CHECK-32: testw $-32640, %ax +; CHECK-32: ret +define void @g32x16(i32 inreg %x) nounwind { + %t = and i32 %x, 32896 + %s = icmp eq i32 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} +; CHECK-64: g64x32: +; CHECK-64: testl $268468352, %edi +; CHECK-64: ret +; CHECK-32: g64x32: +; CHECK-32: testl $268468352, %eax +; CHECK-32: ret +define void @g64x32(i64 inreg %x) nounwind { + %t = and i64 %x, 268468352 + %s = icmp eq i64 %t, 0 + br i1 %s, label %yes, label %no + +yes: + call void @bar() + ret void +no: + ret void +} + +declare void @bar() diff --git a/test/CodeGen/X86/testl-commute.ll b/test/CodeGen/X86/testl-commute.ll index dbbef0a894f23..3d5f672f98fce 100644 --- a/test/CodeGen/X86/testl-commute.ll +++ b/test/CodeGen/X86/testl-commute.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {testl.*\(%r.i\), %} | count 3 +; RUN: llc < %s | grep {testl.*\(%r.i\), %} | count 3 ; rdar://5671654 ; The loads should fold into the testl instructions, no matter how ; the inputs are commuted. diff --git a/test/CodeGen/X86/tls-pic.ll b/test/CodeGen/X86/tls-pic.ll new file mode 100644 index 0000000000000..4cad8376d8d9d --- /dev/null +++ b/test/CodeGen/X86/tls-pic.ll @@ -0,0 +1,67 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s + +@i = thread_local global i32 15 + +define i32 @f1() { +entry: + %tmp1 = load i32* @i + ret i32 %tmp1 +} + +; X32: f1: +; X32: leal i@TLSGD(,%ebx), %eax +; X32: call ___tls_get_addr@PLT + +; X64: f1: +; X64: leaq i@TLSGD(%rip), %rdi +; X64: call __tls_get_addr@PLT + + +@i2 = external thread_local global i32 + +define i32* @f2() { +entry: + ret i32* @i +} + +; X32: f2: +; X32: leal i@TLSGD(,%ebx), %eax +; X32: call ___tls_get_addr@PLT + +; X64: f2: +; X64: leaq i@TLSGD(%rip), %rdi +; X64: call __tls_get_addr@PLT + + + +define i32 @f3() { +entry: + %tmp1 = load i32* @i ; <i32> [#uses=1] + ret i32 %tmp1 +} + +; X32: f3: +; X32: leal i@TLSGD(,%ebx), %eax +; X32: call ___tls_get_addr@PLT + +; X64: f3: +; X64: leaq i@TLSGD(%rip), %rdi +; X64: call __tls_get_addr@PLT + + +define i32* @f4() nounwind { +entry: + ret i32* @i +} + +; X32: f4: +; X32: leal i@TLSGD(,%ebx), %eax +; X32: call ___tls_get_addr@PLT + +; X64: f4: +; X64: leaq i@TLSGD(%rip), %rdi +; X64: call __tls_get_addr@PLT + + + diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll index 85ff360a5508c..0cae5c4f2888f 100644 --- a/test/CodeGen/X86/tls1.ll +++ b/test/CodeGen/X86/tls1.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 @i = thread_local global i32 15 diff --git a/test/CodeGen/X86/tls10.ll b/test/CodeGen/X86/tls10.ll index 2f5f02b9ac96b..fb61596d09ca9 100644 --- a/test/CodeGen/X86/tls10.ll +++ b/test/CodeGen/X86/tls10.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t ; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 ; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 diff --git a/test/CodeGen/X86/tls11.ll b/test/CodeGen/X86/tls11.ll index b6aed9aaa04d1..a2c1a1f75deb0 100644 --- a/test/CodeGen/X86/tls11.ll +++ b/test/CodeGen/X86/tls11.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movw %gs:i@NTPOFF, %ax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movw %fs:i@TPOFF, %ax} %t2 @i = thread_local global i16 15 diff --git a/test/CodeGen/X86/tls12.ll b/test/CodeGen/X86/tls12.ll index b5288391f03f0..c29f6adacd202 100644 --- a/test/CodeGen/X86/tls12.ll +++ b/test/CodeGen/X86/tls12.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movb %gs:i@NTPOFF, %al} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movb %fs:i@TPOFF, %al} %t2 @i = thread_local global i8 15 diff --git a/test/CodeGen/X86/tls13.ll b/test/CodeGen/X86/tls13.ll index ec23a41113eef..08778ec2ce8b1 100644 --- a/test/CodeGen/X86/tls13.ll +++ b/test/CodeGen/X86/tls13.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movswl %gs:i@NTPOFF, %eax} %t ; RUN: grep {movzwl %gs:j@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movswl %fs:i@TPOFF, %edi} %t2 ; RUN: grep {movzwl %fs:j@TPOFF, %edi} %t2 diff --git a/test/CodeGen/X86/tls14.ll b/test/CodeGen/X86/tls14.ll index 941601eb4f9b6..88426dd43d50e 100644 --- a/test/CodeGen/X86/tls14.ll +++ b/test/CodeGen/X86/tls14.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movsbl %gs:i@NTPOFF, %eax} %t ; RUN: grep {movzbl %gs:j@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movsbl %fs:i@TPOFF, %edi} %t2 ; RUN: grep {movzbl %fs:j@TPOFF, %edi} %t2 diff --git a/test/CodeGen/X86/tls15.ll b/test/CodeGen/X86/tls15.ll index 62f3677629be3..7abf070d3fd20 100644 --- a/test/CodeGen/X86/tls15.ll +++ b/test/CodeGen/X86/tls15.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t | count 1 ; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t ; RUN: grep {leal j@NTPOFF(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 | count 1 ; RUN: grep {leaq i@TPOFF(%rax), %rcx} %t2 ; RUN: grep {leaq j@TPOFF(%rax), %rax} %t2 diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll index baa51bbb6ead9..5a94296afefc1 100644 --- a/test/CodeGen/X86/tls2.ll +++ b/test/CodeGen/X86/tls2.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t ; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 ; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 diff --git a/test/CodeGen/X86/tls3.ll b/test/CodeGen/X86/tls3.ll index 061849901fcf5..7327cc41777e9 100644 --- a/test/CodeGen/X86/tls3.ll +++ b/test/CodeGen/X86/tls3.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl i@INDNTPOFF, %eax} %t ; RUN: grep {movl %gs:(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq i@GOTTPOFF(%rip), %rax} %t2 ; RUN: grep {movl %fs:(%rax), %eax} %t2 diff --git a/test/CodeGen/X86/tls4.ll b/test/CodeGen/X86/tls4.ll index 33f221b8ad3ab..d2e40e389bd57 100644 --- a/test/CodeGen/X86/tls4.ll +++ b/test/CodeGen/X86/tls4.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t ; RUN: grep {addl i@INDNTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 ; RUN: grep {addq i@GOTTPOFF(%rip), %rax} %t2 diff --git a/test/CodeGen/X86/tls5.ll b/test/CodeGen/X86/tls5.ll index ff7b9e0a5ffe7..4d2cc02b50286 100644 --- a/test/CodeGen/X86/tls5.ll +++ b/test/CodeGen/X86/tls5.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 @i = internal thread_local global i32 15 diff --git a/test/CodeGen/X86/tls6.ll b/test/CodeGen/X86/tls6.ll index ab53929206a18..505106ee14ed4 100644 --- a/test/CodeGen/X86/tls6.ll +++ b/test/CodeGen/X86/tls6.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t ; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 ; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 diff --git a/test/CodeGen/X86/tls7.ll b/test/CodeGen/X86/tls7.ll index 6a7739bc1a31d..e9116e772090f 100644 --- a/test/CodeGen/X86/tls7.ll +++ b/test/CodeGen/X86/tls7.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 @i = hidden thread_local global i32 15 diff --git a/test/CodeGen/X86/tls8.ll b/test/CodeGen/X86/tls8.ll index fd9d472bb66c3..375af94920f5b 100644 --- a/test/CodeGen/X86/tls8.ll +++ b/test/CodeGen/X86/tls8.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:0, %eax} %t ; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movq %fs:0, %rax} %t2 ; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 diff --git a/test/CodeGen/X86/tls9.ll b/test/CodeGen/X86/tls9.ll index bc0a6f0bbe618..214146fe998c7 100644 --- a/test/CodeGen/X86/tls9.ll +++ b/test/CodeGen/X86/tls9.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t ; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llvm-as < %s | llc -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 ; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 @i = external hidden thread_local global i32 diff --git a/test/CodeGen/X86/trap.ll b/test/CodeGen/X86/trap.ll index 9a013ffbe5652..03ae6bfc869ec 100644 --- a/test/CodeGen/X86/trap.ll +++ b/test/CodeGen/X86/trap.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep ud2 +; RUN: llc < %s -march=x86 -mcpu=yonah | grep ud2 define i32 @test() noreturn nounwind { entry: tail call void @llvm.trap( ) diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll index 25a1191d8f14f..374d404a968cf 100644 --- a/test/CodeGen/X86/trunc-to-bool.ll +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -1,7 +1,7 @@ ; An integer truncation to i1 should be done with an and instruction to make ; sure only the LSBit survives. Test that this is the case both for a returned ; value and as the operand of a branch. -; RUN: llvm-as < %s | llc -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \ +; RUN: llc < %s -march=x86 | grep {\\(and\\)\\|\\(test.*\\\$1\\)} | \ ; RUN: count 5 define i1 @test1(i32 %X) zeroext { diff --git a/test/CodeGen/X86/twoaddr-coalesce-2.ll b/test/CodeGen/X86/twoaddr-coalesce-2.ll index 3fe4cd1b781a9..6f16a2548aa67 100644 --- a/test/CodeGen/X86/twoaddr-coalesce-2.ll +++ b/test/CodeGen/X86/twoaddr-coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \ ; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted} ; rdar://6480363 diff --git a/test/CodeGen/X86/twoaddr-coalesce.ll b/test/CodeGen/X86/twoaddr-coalesce.ll index 5293b77879601..d0e13f61f2d05 100644 --- a/test/CodeGen/X86/twoaddr-coalesce.ll +++ b/test/CodeGen/X86/twoaddr-coalesce.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 5 +; RUN: llc < %s -march=x86 | grep mov | count 5 ; rdar://6523745 @"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/twoaddr-delete.ll b/test/CodeGen/X86/twoaddr-delete.ll index bbf4e62363a14..77e3c75c6dd0b 100644 --- a/test/CodeGen/X86/twoaddr-delete.ll +++ b/test/CodeGen/X86/twoaddr-delete.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted} +; RUN: llc < %s -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted} %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] } %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* } diff --git a/test/CodeGen/X86/twoaddr-pass-sink.ll b/test/CodeGen/X86/twoaddr-pass-sink.ll index 765588059f75b..077fee0773926 100644 --- a/test/CodeGen/X86/twoaddr-pass-sink.ll +++ b/test/CodeGen/X86/twoaddr-pass-sink.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats |& grep {Number of 3-address instructions sunk} +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& grep {Number of 3-address instructions sunk} define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind { entry: diff --git a/test/CodeGen/X86/twoaddr-remat.ll b/test/CodeGen/X86/twoaddr-remat.ll index b74b70cedb76b..4940c78371d9d 100644 --- a/test/CodeGen/X86/twoaddr-remat.ll +++ b/test/CodeGen/X86/twoaddr-remat.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep 59796 | count 3 +; RUN: llc < %s -march=x86 | grep 59796 | count 3 %Args = type %Value* %Exec = type opaque* diff --git a/test/CodeGen/X86/uint_to_fp-2.ll b/test/CodeGen/X86/uint_to_fp-2.ll index d6304370e293c..da5105d8a4eac 100644 --- a/test/CodeGen/X86/uint_to_fp-2.ll +++ b/test/CodeGen/X86/uint_to_fp-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1 ; rdar://6504833 define float @f(i32 %x) nounwind readnone { diff --git a/test/CodeGen/X86/uint_to_fp.ll b/test/CodeGen/X86/uint_to_fp.ll index 148437f3ddbf1..41ee1947edc49 100644 --- a/test/CodeGen/X86/uint_to_fp.ll +++ b/test/CodeGen/X86/uint_to_fp.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | not grep {sub.*esp} -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep cvtsi2ss +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep {sub.*esp} +; RUN: llc < %s -march=x86 -mcpu=yonah | grep cvtsi2ss ; rdar://6034396 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/umul-with-carry.ll b/test/CodeGen/X86/umul-with-carry.ll index 547e179bb219b..7416051693be0 100644 --- a/test/CodeGen/X86/umul-with-carry.ll +++ b/test/CodeGen/X86/umul-with-carry.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep {jc} | count 1 +; RUN: llc < %s -march=x86 | grep {jc} | count 1 ; XFAIL: * ; FIXME: umul-with-overflow not supported yet. diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll index 9e69154f10f9d..d522bd80acfd9 100644 --- a/test/CodeGen/X86/umul-with-overflow.ll +++ b/test/CodeGen/X86/umul-with-overflow.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep "\\\\\\\<mul" +; RUN: llc < %s -march=x86 | grep "\\\\\\\<mul" declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) define i1 @a(i32 %x) zeroext nounwind { diff --git a/test/CodeGen/X86/urem-i8-constant.ll b/test/CodeGen/X86/urem-i8-constant.ll index bc93684877b57..e3cb69ca591f6 100644 --- a/test/CodeGen/X86/urem-i8-constant.ll +++ b/test/CodeGen/X86/urem-i8-constant.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep 111 +; RUN: llc < %s -march=x86 | grep 111 define i8 @foo(i8 %tmp325) { %t546 = urem i8 %tmp325, 37 diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll index bd6045c068e2f..b5ebaa74bd071 100644 --- a/test/CodeGen/X86/v4f32-immediate.ll +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse | grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps define <4 x float> @foo() { ret <4 x float> <float 0x4009C9D0A0000000, float 0x4002666660000000, float 0x3FF3333340000000, float 0x3FB99999A0000000> diff --git a/test/CodeGen/X86/variable-sized-darwin-bzero.ll b/test/CodeGen/X86/variable-sized-darwin-bzero.ll index b0cdf496d5fc7..4817db22c355a 100644 --- a/test/CodeGen/X86/variable-sized-darwin-bzero.ll +++ b/test/CodeGen/X86/variable-sized-darwin-bzero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero declare void @llvm.memset.i64(i8*, i8, i64, i32) diff --git a/test/CodeGen/X86/variadic-node-pic.ll b/test/CodeGen/X86/variadic-node-pic.ll index 4d76445b2f95a..1182a306abd08 100644 --- a/test/CodeGen/X86/variadic-node-pic.ll +++ b/test/CodeGen/X86/variadic-node-pic.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -relocation-model=pic -code-model=large +; RUN: llc < %s -relocation-model=pic -code-model=large target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/vec_add.ll b/test/CodeGen/X86/vec_add.ll index 72415a3ab28bd..7c77d11a7b54e 100644 --- a/test/CodeGen/X86/vec_add.ll +++ b/test/CodeGen/X86/vec_add.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) { entry: diff --git a/test/CodeGen/X86/vec_align.ll b/test/CodeGen/X86/vec_align.ll index d88104d79e829..e27311561b2cd 100644 --- a/test/CodeGen/X86/vec_align.ll +++ b/test/CodeGen/X86/vec_align.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mcpu=yonah -relocation-model=static | grep movaps | count 2 +; RUN: llc < %s -mcpu=yonah -relocation-model=static | grep movaps | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/vec_call.ll b/test/CodeGen/X86/vec_call.ll index ebdac7d3de9b1..b3efc7b16b7d9 100644 --- a/test/CodeGen/X86/vec_call.ll +++ b/test/CodeGen/X86/vec_call.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ ; RUN: grep {subl.*60} -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ ; RUN: grep {movaps.*32} diff --git a/test/CodeGen/X86/vec_clear.ll b/test/CodeGen/X86/vec_clear.ll index 514de953efec7..166d4363ec8d5 100644 --- a/test/CodeGen/X86/vec_clear.ll +++ b/test/CodeGen/X86/vec_clear.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t ; RUN: not grep and %t ; RUN: not grep psrldq %t ; RUN: grep xorps %t diff --git a/test/CodeGen/X86/vec_compare.ll b/test/CodeGen/X86/vec_compare.ll new file mode 100644 index 0000000000000..c8c7257cbb9c3 --- /dev/null +++ b/test/CodeGen/X86/vec_compare.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s + + +define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind { +; CHECK: test1: +; CHECK: pcmpgtd +; CHECK: ret + + %C = icmp sgt <4 x i32> %A, %B + %D = sext <4 x i1> %C to <4 x i32> + ret <4 x i32> %D +} + +define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) nounwind { +; CHECK: test2: +; CHECK: pcmp +; CHECK: pcmp +; CHECK: xorps +; CHECK: ret + %C = icmp sge <4 x i32> %A, %B + %D = sext <4 x i1> %C to <4 x i32> + ret <4 x i32> %D +} + +define <4 x i32> @test3(<4 x i32> %A, <4 x i32> %B) nounwind { +; CHECK: test3: +; CHECK: pcmpgtd +; CHECK: movaps +; CHECK: ret + %C = icmp slt <4 x i32> %A, %B + %D = sext <4 x i1> %C to <4 x i32> + ret <4 x i32> %D +} + +define <4 x i32> @test4(<4 x i32> %A, <4 x i32> %B) nounwind { +; CHECK: test4: +; CHECK: movaps +; CHECK: pcmpgtd +; CHECK: ret + %C = icmp ugt <4 x i32> %A, %B + %D = sext <4 x i1> %C to <4 x i32> + ret <4 x i32> %D +} diff --git a/test/CodeGen/X86/vec_ctbits.ll b/test/CodeGen/X86/vec_ctbits.ll index f057c9a39a637..f0158d643c17c 100644 --- a/test/CodeGen/X86/vec_ctbits.ll +++ b/test/CodeGen/X86/vec_ctbits.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>) declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>) diff --git a/test/CodeGen/X86/vec_extract-sse4.ll b/test/CodeGen/X86/vec_extract-sse4.ll index d6726be1db6a3..dab5dd144f064 100644 --- a/test/CodeGen/X86/vec_extract-sse4.ll +++ b/test/CodeGen/X86/vec_extract-sse4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t ; RUN: grep extractps %t | count 1 ; RUN: grep pextrd %t | count 1 ; RUN: not grep pshufd %t diff --git a/test/CodeGen/X86/vec_extract.ll b/test/CodeGen/X86/vec_extract.ll index ee7567cf7609a..b0137304e8a9c 100644 --- a/test/CodeGen/X86/vec_extract.ll +++ b/test/CodeGen/X86/vec_extract.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 -o %t ; RUN: grep movss %t | count 3 ; RUN: grep movhlps %t | count 1 ; RUN: grep pshufd %t | count 1 diff --git a/test/CodeGen/X86/vec_fneg.ll b/test/CodeGen/X86/vec_fneg.ll index a801472622f2a..d49c70e563911 100644 --- a/test/CodeGen/X86/vec_fneg.ll +++ b/test/CodeGen/X86/vec_fneg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define <4 x float> @t1(<4 x float> %Q) { %tmp15 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %Q diff --git a/test/CodeGen/X86/vec_i64.ll b/test/CodeGen/X86/vec_i64.ll index 3939af57c8ced..462e16e130230 100644 --- a/test/CodeGen/X86/vec_i64.ll +++ b/test/CodeGen/X86/vec_i64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movq %t | count 2 ; Used movq to load i64 into a v2i64 when the top i64 is 0. diff --git a/test/CodeGen/X86/vec_ins_extract-1.ll b/test/CodeGen/X86/vec_ins_extract-1.ll index c7eb221635d62..29511934af019 100644 --- a/test/CodeGen/X86/vec_ins_extract-1.ll +++ b/test/CodeGen/X86/vec_ins_extract-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4 +; RUN: llc < %s -march=x86 -mcpu=yonah | grep {(%esp,%eax,4)} | count 4 ; Inserts and extracts with variable indices must be lowered ; to memory accesses. diff --git a/test/CodeGen/X86/vec_ins_extract.ll b/test/CodeGen/X86/vec_ins_extract.ll index 7882839575855..bf43deb1d19a6 100644 --- a/test/CodeGen/X86/vec_ins_extract.ll +++ b/test/CodeGen/X86/vec_ins_extract.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | opt -scalarrepl -instcombine | \ +; RUN: opt < %s -scalarrepl -instcombine | \ ; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp ; This checks that various insert/extract idiom work without going to the diff --git a/test/CodeGen/X86/vec_insert-2.ll b/test/CodeGen/X86/vec_insert-2.ll index 8d0bcc4fbf340..b08044bb869bf 100644 --- a/test/CodeGen/X86/vec_insert-2.ll +++ b/test/CodeGen/X86/vec_insert-2.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1 define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind { %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3 diff --git a/test/CodeGen/X86/vec_insert-3.ll b/test/CodeGen/X86/vec_insert-3.ll index e43eca4b875f5..a18cd86489cc7 100644 --- a/test/CodeGen/X86/vec_insert-3.ll +++ b/test/CodeGen/X86/vec_insert-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2,-sse41 | grep punpcklqdq | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep punpcklqdq | count 1 define <2 x i64> @t1(i64 %s, <2 x i64> %tmp) nounwind { %tmp1 = insertelement <2 x i64> %tmp, i64 %s, i32 1 diff --git a/test/CodeGen/X86/vec_insert-5.ll b/test/CodeGen/X86/vec_insert-5.ll index 1a9768a98e6c0..291fc0454c9c7 100644 --- a/test/CodeGen/X86/vec_insert-5.ll +++ b/test/CodeGen/X86/vec_insert-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: grep psllq %t | grep 32 ; RUN: grep pslldq %t | grep 12 ; RUN: grep psrldq %t | grep 8 diff --git a/test/CodeGen/X86/vec_insert-6.ll b/test/CodeGen/X86/vec_insert-6.ll index 5ef270f90820d..54aa43f0c35dc 100644 --- a/test/CodeGen/X86/vec_insert-6.ll +++ b/test/CodeGen/X86/vec_insert-6.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pslldq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 6 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pslldq +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 6 define <4 x float> @t3(<4 x float>* %P) nounwind { %tmp1 = load <4 x float>* %P diff --git a/test/CodeGen/X86/vec_insert-7.ll b/test/CodeGen/X86/vec_insert-7.ll index 8cfc63aa6bf1b..9ede10f63d3e8 100644 --- a/test/CodeGen/X86/vec_insert-7.ll +++ b/test/CodeGen/X86/vec_insert-7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq +; RUN: llc < %s -march=x86 -mattr=+mmx -mtriple=i686-apple-darwin9 -o - | grep punpckldq define <2 x i32> @mmx_movzl(<2 x i32> %x) nounwind { entry: diff --git a/test/CodeGen/X86/vec_insert-8.ll b/test/CodeGen/X86/vec_insert-8.ll index 0f6924c66f9e3..650951cc9e5ee 100644 --- a/test/CodeGen/X86/vec_insert-8.ll +++ b/test/CodeGen/X86/vec_insert-8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse41 -o %t ; tests variable insert and extract of a 4 x i32 diff --git a/test/CodeGen/X86/vec_insert.ll b/test/CodeGen/X86/vec_insert.ll index 3a9464ceff125..a7274a9000445 100644 --- a/test/CodeGen/X86/vec_insert.ll +++ b/test/CodeGen/X86/vec_insert.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw define void @test(<4 x float>* %F, i32 %I) { %tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_insert_4.ll b/test/CodeGen/X86/vec_insert_4.ll index a0aa0c0bfea00..2c31e56b4af6d 100644 --- a/test/CodeGen/X86/vec_insert_4.ll +++ b/test/CodeGen/X86/vec_insert_4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah | grep 1084227584 | count 1 +; RUN: llc < %s -march=x86 -mcpu=yonah | grep 1084227584 | count 1 ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/vec_loadsingles.ll b/test/CodeGen/X86/vec_loadsingles.ll index 67122763ec9b9..8812c4f820c62 100644 --- a/test/CodeGen/X86/vec_loadsingles.ll +++ b/test/CodeGen/X86/vec_loadsingles.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq define <4 x float> @a(<4 x float> %a, float* nocapture %p) nounwind readonly { entry: diff --git a/test/CodeGen/X86/vec_logical.ll b/test/CodeGen/X86/vec_logical.ll index f8957629f8a1d..1dc0b163aeb38 100644 --- a/test/CodeGen/X86/vec_logical.ll +++ b/test/CodeGen/X86/vec_logical.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: grep xorps %t | count 2 ; RUN: grep andnps %t ; RUN: grep movaps %t | count 2 diff --git a/test/CodeGen/X86/vec_return.ll b/test/CodeGen/X86/vec_return.ll index 106966fd52128..66762b4a0604e 100644 --- a/test/CodeGen/X86/vec_return.ll +++ b/test/CodeGen/X86/vec_return.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: grep xorps %t | count 1 ; RUN: grep movaps %t | count 1 ; RUN: not grep shuf %t diff --git a/test/CodeGen/X86/vec_select.ll b/test/CodeGen/X86/vec_select.ll index ecb825b00bd8d..033e9f7027f94 100644 --- a/test/CodeGen/X86/vec_select.ll +++ b/test/CodeGen/X86/vec_select.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse +; RUN: llc < %s -march=x86 -mattr=+sse define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) { %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_set-2.ll b/test/CodeGen/X86/vec_set-2.ll index ae9530db8df5f..a8f1187084d6a 100644 --- a/test/CodeGen/X86/vec_set-2.ll +++ b/test/CodeGen/X86/vec_set-2.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1 define <4 x float> @test1(float %a) nounwind { %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 0 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll index 546ca0bcf3072..ada17e0092a80 100644 --- a/test/CodeGen/X86/vec_set-3.ll +++ b/test/CodeGen/X86/vec_set-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep pshufd %t | count 2 define <4 x float> @test(float %a) nounwind { diff --git a/test/CodeGen/X86/vec_set-4.ll b/test/CodeGen/X86/vec_set-4.ll index da7ef80a3a5e5..332c8b70760fe 100644 --- a/test/CodeGen/X86/vec_set-4.ll +++ b/test/CodeGen/X86/vec_set-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pinsrw | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pinsrw | count 2 define <2 x i64> @test(i16 %a) nounwind { entry: diff --git a/test/CodeGen/X86/vec_set-5.ll b/test/CodeGen/X86/vec_set-5.ll index d3329701119b4..f811a7404a273 100644 --- a/test/CodeGen/X86/vec_set-5.ll +++ b/test/CodeGen/X86/vec_set-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movlhps %t | count 1 ; RUN: grep movq %t | count 2 diff --git a/test/CodeGen/X86/vec_set-6.ll b/test/CodeGen/X86/vec_set-6.ll index c7b6747a86f72..0713d956ee448 100644 --- a/test/CodeGen/X86/vec_set-6.ll +++ b/test/CodeGen/X86/vec_set-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movss %t | count 1 ; RUN: grep movq %t | count 1 ; RUN: grep shufps %t | count 1 diff --git a/test/CodeGen/X86/vec_set-7.ll b/test/CodeGen/X86/vec_set-7.ll index 6f98c510efca3..d993178a9892b 100644 --- a/test/CodeGen/X86/vec_set-7.ll +++ b/test/CodeGen/X86/vec_set-7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd | count 1 define <2 x i64> @test(<2 x i64>* %p) nounwind { %tmp = bitcast <2 x i64>* %p to double* diff --git a/test/CodeGen/X86/vec_set-8.ll b/test/CodeGen/X86/vec_set-8.ll index cca436bf64332..9697f1186d451 100644 --- a/test/CodeGen/X86/vec_set-8.ll +++ b/test/CodeGen/X86/vec_set-8.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | not grep movsd -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi,.*%xmm0} +; RUN: llc < %s -march=x86-64 | not grep movsd +; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi,.*%xmm0} define <2 x i64> @test(i64 %i) nounwind { entry: diff --git a/test/CodeGen/X86/vec_set-9.ll b/test/CodeGen/X86/vec_set-9.ll index 5c1b8f5dacb85..3656e5f6ca47b 100644 --- a/test/CodeGen/X86/vec_set-9.ll +++ b/test/CodeGen/X86/vec_set-9.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movlhps.*%xmm0, %xmm0} +; RUN: llc < %s -march=x86-64 | grep movd | count 1 +; RUN: llc < %s -march=x86-64 | grep {movlhps.*%xmm0, %xmm0} define <2 x i64> @test3(i64 %A) nounwind { entry: diff --git a/test/CodeGen/X86/vec_set-A.ll b/test/CodeGen/X86/vec_set-A.ll index f33263f1aef5c..f05eecf8c3aed 100644 --- a/test/CodeGen/X86/vec_set-A.ll +++ b/test/CodeGen/X86/vec_set-A.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movl.*\$1, %} +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movl.*\$1, %} define <2 x i64> @test1() nounwind { entry: ret <2 x i64> < i64 1, i64 0 > diff --git a/test/CodeGen/X86/vec_set-B.ll b/test/CodeGen/X86/vec_set-B.ll index d318964686c9b..f5b3e8baa33a9 100644 --- a/test/CodeGen/X86/vec_set-B.ll +++ b/test/CodeGen/X86/vec_set-B.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movaps -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep esp | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2 ; These should both generate something like this: ;_test3: diff --git a/test/CodeGen/X86/vec_set-C.ll b/test/CodeGen/X86/vec_set-C.ll index fc86853e10fd2..7636ac3b37415 100644 --- a/test/CodeGen/X86/vec_set-C.ll +++ b/test/CodeGen/X86/vec_set-C.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd define <2 x i64> @t1(i64 %x) nounwind { %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %x, i32 0 diff --git a/test/CodeGen/X86/vec_set-D.ll b/test/CodeGen/X86/vec_set-D.ll index 71bdd849953ba..3d6369e1c76ae 100644 --- a/test/CodeGen/X86/vec_set-D.ll +++ b/test/CodeGen/X86/vec_set-D.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq define <4 x i32> @t(i32 %x, i32 %y) nounwind { %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0 diff --git a/test/CodeGen/X86/vec_set-E.ll b/test/CodeGen/X86/vec_set-E.ll index ee63234cc978b..d78be669fc7f3 100644 --- a/test/CodeGen/X86/vec_set-E.ll +++ b/test/CodeGen/X86/vec_set-E.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq define <4 x float> @t(float %X) nounwind { %tmp11 = insertelement <4 x float> undef, float %X, i32 0 diff --git a/test/CodeGen/X86/vec_set-F.ll b/test/CodeGen/X86/vec_set-F.ll index db83eb2e8531f..4f0acb2d151d9 100644 --- a/test/CodeGen/X86/vec_set-F.ll +++ b/test/CodeGen/X86/vec_set-F.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movsd -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep mov | count 3 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 3 define <2 x i64> @t1(<2 x i64>* %ptr) nounwind { %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>* diff --git a/test/CodeGen/X86/vec_set-G.ll b/test/CodeGen/X86/vec_set-G.ll index f81907cb69f2b..4a542feafaffc 100644 --- a/test/CodeGen/X86/vec_set-G.ll +++ b/test/CodeGen/X86/vec_set-G.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss define fastcc void @t(<4 x float> %A) nounwind { %tmp41896 = extractelement <4 x float> %A, i32 0 ; <float> [#uses=1] diff --git a/test/CodeGen/X86/vec_set-H.ll b/test/CodeGen/X86/vec_set-H.ll index ea7b85355c239..5037e36d3fd5a 100644 --- a/test/CodeGen/X86/vec_set-H.ll +++ b/test/CodeGen/X86/vec_set-H.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep movz +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movz define <2 x i64> @doload64(i16 signext %x) nounwind { entry: diff --git a/test/CodeGen/X86/vec_set-I.ll b/test/CodeGen/X86/vec_set-I.ll index e1c44d0a0f4b4..64f36f99e4d26 100644 --- a/test/CodeGen/X86/vec_set-I.ll +++ b/test/CodeGen/X86/vec_set-I.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xorp +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp define void @t1() nounwind { %tmp298.i.i = load <4 x float>* null, align 16 diff --git a/test/CodeGen/X86/vec_set-J.ll b/test/CodeGen/X86/vec_set-J.ll index 488d360734163..d90ab85b8cf7d 100644 --- a/test/CodeGen/X86/vec_set-J.ll +++ b/test/CodeGen/X86/vec_set-J.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movss ; PR2472 define <4 x i32> @a(<4 x i32> %a) nounwind { diff --git a/test/CodeGen/X86/vec_set.ll b/test/CodeGen/X86/vec_set.ll index 77636eda1c027..c316df887c16e 100644 --- a/test/CodeGen/X86/vec_set.ll +++ b/test/CodeGen/X86/vec_set.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpckl | count 7 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpckl | count 7 define void @test(<8 x i16>* %b, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind { %tmp = insertelement <8 x i16> zeroinitializer, i16 %a0, i32 0 ; <<8 x i16>> [#uses=1] diff --git a/test/CodeGen/X86/vec_shift.ll b/test/CodeGen/X86/vec_shift.ll index 9c595bc6ef067..ddf0469b72a71 100644 --- a/test/CodeGen/X86/vec_shift.ll +++ b/test/CodeGen/X86/vec_shift.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllw -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psrlq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psraw +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psrlq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind { entry: diff --git a/test/CodeGen/X86/vec_shift2.ll b/test/CodeGen/X86/vec_shift2.ll index b73f5f4900064..c5f9dc4ace329 100644 --- a/test/CodeGen/X86/vec_shift2.ll +++ b/test/CodeGen/X86/vec_shift2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep CPI +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep CPI define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind { %tmp1 = bitcast <2 x i64> %b1 to <8 x i16> diff --git a/test/CodeGen/X86/vec_shift3.ll b/test/CodeGen/X86/vec_shift3.ll index 2641c5d596742..1ebf455c05550 100644 --- a/test/CodeGen/X86/vec_shift3.ll +++ b/test/CodeGen/X86/vec_shift3.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllq -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psraw -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllq +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psraw +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 2 define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-10.ll b/test/CodeGen/X86/vec_shuffle-10.ll index 297469d920242..a63e3868ad75f 100644 --- a/test/CodeGen/X86/vec_shuffle-10.ll +++ b/test/CodeGen/X86/vec_shuffle-10.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep unpcklps %t | count 1 ; RUN: grep pshufd %t | count 1 ; RUN: not grep {sub.*esp} %t diff --git a/test/CodeGen/X86/vec_shuffle-11.ll b/test/CodeGen/X86/vec_shuffle-11.ll index 463858f1b65ba..640745ae2645a 100644 --- a/test/CodeGen/X86/vec_shuffle-11.ll +++ b/test/CodeGen/X86/vec_shuffle-11.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov +; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin | not grep mov define <4 x i32> @test() nounwind { %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/vec_shuffle-14.ll b/test/CodeGen/X86/vec_shuffle-14.ll index 6e8d0b8077da9..f0cfc44ab19a7 100644 --- a/test/CodeGen/X86/vec_shuffle-14.ll +++ b/test/CodeGen/X86/vec_shuffle-14.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 1 -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd | count 2 -; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movq | count 3 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor +; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3 +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor define <4 x i32> @t1(i32 %a) nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-15.ll b/test/CodeGen/X86/vec_shuffle-15.ll index 062f77c279e45..5a9b8fd34579a 100644 --- a/test/CodeGen/X86/vec_shuffle-15.ll +++ b/test/CodeGen/X86/vec_shuffle-15.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define <2 x i64> @t00(<2 x i64> %a, <2 x i64> %b) nounwind { %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 0 > diff --git a/test/CodeGen/X86/vec_shuffle-16.ll b/test/CodeGen/X86/vec_shuffle-16.ll index b3a5b769e67e0..470f676d4627e 100644 --- a/test/CodeGen/X86/vec_shuffle-16.ll +++ b/test/CodeGen/X86/vec_shuffle-16.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 -mtriple=i386-apple-darwin -o %t ; RUN: grep shufps %t | count 4 ; RUN: grep movaps %t | count 2 -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t ; RUN: grep pshufd %t | count 4 ; RUN: not grep shufps %t ; RUN: not grep mov %t diff --git a/test/CodeGen/X86/vec_shuffle-17.ll b/test/CodeGen/X86/vec_shuffle-17.ll index 992d79184b87d..9c33abb4421a4 100644 --- a/test/CodeGen/X86/vec_shuffle-17.ll +++ b/test/CodeGen/X86/vec_shuffle-17.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi, %xmm0} -; RUN: llvm-as < %s | llc -march=x86-64 | not grep xor +; RUN: llc < %s -march=x86-64 | grep {movd.*%rdi, %xmm0} +; RUN: llc < %s -march=x86-64 | not grep xor ; PR2108 define <2 x i64> @doload64(i64 %x) nounwind { diff --git a/test/CodeGen/X86/vec_shuffle-18.ll b/test/CodeGen/X86/vec_shuffle-18.ll index 85392632a29e3..1104a4a8856b7 100644 --- a/test/CodeGen/X86/vec_shuffle-18.ll +++ b/test/CodeGen/X86/vec_shuffle-18.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8.8.0 | grep mov | count 7 %struct.vector4_t = type { <4 x float> } diff --git a/test/CodeGen/X86/vec_shuffle-19.ll b/test/CodeGen/X86/vec_shuffle-19.ll index 4e7db20db5648..9fc09dfdd2b89 100644 --- a/test/CodeGen/X86/vec_shuffle-19.ll +++ b/test/CodeGen/X86/vec_shuffle-19.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4 ; PR2485 define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind { diff --git a/test/CodeGen/X86/vec_shuffle-20.ll b/test/CodeGen/X86/vec_shuffle-20.ll index 71890844894f0..6d1bac0743d49 100644 --- a/test/CodeGen/X86/vec_shuffle-20.ll +++ b/test/CodeGen/X86/vec_shuffle-20.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3 +; RUN: llc < %s -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3 define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-22.ll b/test/CodeGen/X86/vec_shuffle-22.ll index d19f110fc1004..5307ced4899bd 100644 --- a/test/CodeGen/X86/vec_shuffle-22.ll +++ b/test/CodeGen/X86/vec_shuffle-22.ll @@ -1,7 +1,7 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=pentium-m -o %t -f +; RUN: llc < %s -march=x86 -mcpu=pentium-m -o %t ; RUN: grep movlhps %t | count 1 ; RUN: grep pshufd %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=core2 -o %t ; RUN: grep movlhps %t | count 1 ; RUN: grep movddup %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-23.ll b/test/CodeGen/X86/vec_shuffle-23.ll index 7e8aa5dc4bf6f..05a3a1e9d2767 100644 --- a/test/CodeGen/X86/vec_shuffle-23.ll +++ b/test/CodeGen/X86/vec_shuffle-23.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd +; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpck +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd define i32 @t() nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-24.ll b/test/CodeGen/X86/vec_shuffle-24.ll index 170ba35173f3d..7562f1d89594e 100644 --- a/test/CodeGen/X86/vec_shuffle-24.ll +++ b/test/CodeGen/X86/vec_shuffle-24.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpck +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep punpck define i32 @t() nounwind optsize { entry: diff --git a/test/CodeGen/X86/vec_shuffle-25.ll b/test/CodeGen/X86/vec_shuffle-25.ll index 18922aaac10e8..2aa2d252849ca 100644 --- a/test/CodeGen/X86/vec_shuffle-25.ll +++ b/test/CodeGen/X86/vec_shuffle-25.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep unpcklps %t | count 3 ; RUN: grep unpckhps %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-26.ll b/test/CodeGen/X86/vec_shuffle-26.ll index abd6e90b79071..8cc15d1e7c27a 100644 --- a/test/CodeGen/X86/vec_shuffle-26.ll +++ b/test/CodeGen/X86/vec_shuffle-26.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep unpcklps %t | count 1 ; RUN: grep unpckhps %t | count 3 diff --git a/test/CodeGen/X86/vec_shuffle-27.ll b/test/CodeGen/X86/vec_shuffle-27.ll index 231ac0c3b8342..d700ccbf53032 100644 --- a/test/CodeGen/X86/vec_shuffle-27.ll +++ b/test/CodeGen/X86/vec_shuffle-27.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep addps %t | count 2 ; RUN: grep mulps %t | count 2 ; RUN: grep subps %t | count 2 diff --git a/test/CodeGen/X86/vec_shuffle-28.ll b/test/CodeGen/X86/vec_shuffle-28.ll index f7e5001e64d1f..343685bf8ad2c 100644 --- a/test/CodeGen/X86/vec_shuffle-28.ll +++ b/test/CodeGen/X86/vec_shuffle-28.ll @@ -1,8 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep movd %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pinsrw %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=core2 -o %t ; RUN: grep pshufb %t | count 1 ; FIXME: this test has a superfluous punpcklqdq pre-pshufb currently. diff --git a/test/CodeGen/X86/vec_shuffle-3.ll b/test/CodeGen/X86/vec_shuffle-3.ll index 018b4cf1a06ba..556f1037d0c5c 100644 --- a/test/CodeGen/X86/vec_shuffle-3.ll +++ b/test/CodeGen/X86/vec_shuffle-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movlhps %t | count 1 ; RUN: grep movhlps %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-30.ll b/test/CodeGen/X86/vec_shuffle-30.ll index 50a3df8f0b2af..3f69150ac533c 100644 --- a/test/CodeGen/X86/vec_shuffle-30.ll +++ b/test/CodeGen/X86/vec_shuffle-30.ll @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -disable-mmx -o %t -f -; RUN: grep pshufhw %t | grep 161 | count 1 +; RUN: llc < %s -march=x86 -mattr=sse41 -disable-mmx -o %t +; RUN: grep pshufhw %t | grep -- -95 | count 1 ; RUN: grep shufps %t | count 1 ; RUN: not grep pslldq %t ; Test case when creating pshufhw, we incorrectly set the higher order bit ; for an undef, -define void @test(<8 x i16>* %dest, <8 x i16> %in) { +define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind { entry: %0 = load <8 x i16>* %dest %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14> @@ -14,7 +14,7 @@ entry: } ; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq -define void @test2(<4 x i32>* %dest, <4 x i32> %in) { +define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind { entry: %0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2> store <4 x i32> %0, <4 x i32>* %dest diff --git a/test/CodeGen/X86/vec_shuffle-31.ll b/test/CodeGen/X86/vec_shuffle-31.ll index efcd0300e35ff..bb06e15425bb2 100644 --- a/test/CodeGen/X86/vec_shuffle-31.ll +++ b/test/CodeGen/X86/vec_shuffle-31.ll @@ -1,9 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pextrw %t | count 1 -; RUN: grep movlhps %t | count 1 -; RUN: grep pshufhw %t | count 1 -; RUN: grep pinsrw %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=core2 -o %t ; RUN: grep pshufb %t | count 1 define <8 x i16> @shuf3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { diff --git a/test/CodeGen/X86/vec_shuffle-34.ll b/test/CodeGen/X86/vec_shuffle-34.ll index 99c95d1623e72..d057b3fa7ea8e 100644 --- a/test/CodeGen/X86/vec_shuffle-34.ll +++ b/test/CodeGen/X86/vec_shuffle-34.ll @@ -1,10 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: grep pextrw %t | count 1 -; RUN: grep punpcklqdq %t | count 1 -; RUN: grep pshuflw %t | count 1 -; RUN: grep pinsrw %t | count 1 -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f -; RUN: grep pshufb %t | count 2 +; RUN: llc < %s -march=x86 -mcpu=core2 | grep pshufb | count 2 define <8 x i16> @shuf2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone { entry: diff --git a/test/CodeGen/X86/vec_shuffle-35.ll b/test/CodeGen/X86/vec_shuffle-35.ll index 7be8468849031..7f0fcb5969e4f 100644 --- a/test/CodeGen/X86/vec_shuffle-35.ll +++ b/test/CodeGen/X86/vec_shuffle-35.ll @@ -1,10 +1,10 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -stack-alignment=16 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=yonah -stack-alignment=16 -o %t ; RUN: grep pextrw %t | count 13 ; RUN: grep pinsrw %t | count 14 ; RUN: grep rolw %t | count 13 ; RUN: not grep esp %t ; RUN: not grep ebp %t -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -stack-alignment=16 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=core2 -stack-alignment=16 -o %t ; RUN: grep pshufb %t | count 3 define <16 x i8> @shuf1(<16 x i8> %T0) nounwind readnone { diff --git a/test/CodeGen/X86/vec_shuffle-36.ll b/test/CodeGen/X86/vec_shuffle-36.ll index 005118705856f..8a93a7eeee3b6 100644 --- a/test/CodeGen/X86/vec_shuffle-36.ll +++ b/test/CodeGen/X86/vec_shuffle-36.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep pshufb %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-4.ll b/test/CodeGen/X86/vec_shuffle-4.ll index 3c03baa5062ca..829fedf97cc55 100644 --- a/test/CodeGen/X86/vec_shuffle-4.ll +++ b/test/CodeGen/X86/vec_shuffle-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t +; RUN: llc < %s -march=x86 -mattr=+sse2 > %t ; RUN: grep shuf %t | count 2 ; RUN: not grep unpck %t diff --git a/test/CodeGen/X86/vec_shuffle-5.ll b/test/CodeGen/X86/vec_shuffle-5.ll index e356f2456b75c..c24167a6150d9 100644 --- a/test/CodeGen/X86/vec_shuffle-5.ll +++ b/test/CodeGen/X86/vec_shuffle-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movhlps %t | count 1 ; RUN: grep shufps %t | count 1 diff --git a/test/CodeGen/X86/vec_shuffle-6.ll b/test/CodeGen/X86/vec_shuffle-6.ll index f7c9f2daa39d6..f034b0aa7102a 100644 --- a/test/CodeGen/X86/vec_shuffle-6.ll +++ b/test/CodeGen/X86/vec_shuffle-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep movapd %t | count 1 ; RUN: grep movaps %t | count 1 ; RUN: grep movups %t | count 2 diff --git a/test/CodeGen/X86/vec_shuffle-7.ll b/test/CodeGen/X86/vec_shuffle-7.ll index fbcfac5b57a46..4cdca09c72f51 100644 --- a/test/CodeGen/X86/vec_shuffle-7.ll +++ b/test/CodeGen/X86/vec_shuffle-7.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep xorps %t | count 1 ; RUN: not grep shufps %t diff --git a/test/CodeGen/X86/vec_shuffle-8.ll b/test/CodeGen/X86/vec_shuffle-8.ll index 73d75e63914d3..964ce7b2892be 100644 --- a/test/CodeGen/X86/vec_shuffle-8.ll +++ b/test/CodeGen/X86/vec_shuffle-8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | \ +; RUN: llc < %s -march=x86 -mattr=+sse2 | \ ; RUN: not grep shufps define void @test(<4 x float>* %res, <4 x float>* %A) { diff --git a/test/CodeGen/X86/vec_shuffle-9.ll b/test/CodeGen/X86/vec_shuffle-9.ll index 68577d455f756..2bef24d443eb3 100644 --- a/test/CodeGen/X86/vec_shuffle-9.ll +++ b/test/CodeGen/X86/vec_shuffle-9.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse2 -o %t ; RUN: grep punpck %t | count 2 ; RUN: not grep pextrw %t diff --git a/test/CodeGen/X86/vec_shuffle.ll b/test/CodeGen/X86/vec_shuffle.ll index f43aa1d4e7147..c05b79a54a15d 100644 --- a/test/CodeGen/X86/vec_shuffle.ll +++ b/test/CodeGen/X86/vec_shuffle.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=core2 -o %t -f +; RUN: llc < %s -march=x86 -mcpu=core2 -o %t ; RUN: grep shufp %t | count 1 ; RUN: grep movupd %t | count 1 ; RUN: grep pshufhw %t | count 1 diff --git a/test/CodeGen/X86/vec_splat-2.ll b/test/CodeGen/X86/vec_splat-2.ll index c6e3dddd5fa6c..cde5ae99563e5 100644 --- a/test/CodeGen/X86/vec_splat-2.ll +++ b/test/CodeGen/X86/vec_splat-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd | count 1 define void @test(<2 x i64>* %P, i8 %x) nounwind { %tmp = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0 ; <<16 x i8>> [#uses=1] diff --git a/test/CodeGen/X86/vec_splat-3.ll b/test/CodeGen/X86/vec_splat-3.ll index 1f1a214479f4f..649b85c5dadd6 100644 --- a/test/CodeGen/X86/vec_splat-3.ll +++ b/test/CodeGen/X86/vec_splat-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep punpcklwd %t | count 4 ; RUN: grep punpckhwd %t | count 4 ; RUN: grep "pshufd" %t | count 8 diff --git a/test/CodeGen/X86/vec_splat-4.ll b/test/CodeGen/X86/vec_splat-4.ll index 220e1cd34d571..d9941e65bde35 100644 --- a/test/CodeGen/X86/vec_splat-4.ll +++ b/test/CodeGen/X86/vec_splat-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -o %t -f +; RUN: llc < %s -march=x86 -mattr=sse41 -o %t ; RUN: grep punpcklbw %t | count 16 ; RUN: grep punpckhbw %t | count 16 ; RUN: grep "pshufd" %t | count 16 diff --git a/test/CodeGen/X86/vec_splat.ll b/test/CodeGen/X86/vec_splat.ll index 89914fda63baf..a87fbd0dc6555 100644 --- a/test/CodeGen/X86/vec_splat.ll +++ b/test/CodeGen/X86/vec_splat.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse3 | grep movddup +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd +; RUN: llc < %s -march=x86 -mattr=+sse3 | grep movddup define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind { %tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll index 69900a686e25a..b1613fb3a3740 100644 --- a/test/CodeGen/X86/vec_ss_load_fold.ll +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 -o %t ; RUN: grep minss %t | grep CPI | count 2 ; RUN: grep CPI %t | not grep movss diff --git a/test/CodeGen/X86/vec_zero-2.ll b/test/CodeGen/X86/vec_zero-2.ll index efdf5649a14b8..e42b5384b0817 100644 --- a/test/CodeGen/X86/vec_zero-2.ll +++ b/test/CodeGen/X86/vec_zero-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 define i32 @t() { entry: diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll index 0a7a543412698..ae5af586cdc33 100644 --- a/test/CodeGen/X86/vec_zero.ll +++ b/test/CodeGen/X86/vec_zero.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xorps | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xorps | count 2 define void @foo(<4 x float>* %P) { %T = load <4 x float>* %P ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll index 0ccf745e524e2..296378c6e9f5c 100644 --- a/test/CodeGen/X86/vec_zero_cse.ll +++ b/test/CodeGen/X86/vec_zero_cse.ll @@ -1,6 +1,6 @@ -; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1 -; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1 -; RUN: llvm-as < %s | llc -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 1 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2 @M1 = external global <1 x i64> @M2 = external global <2 x i32> diff --git a/test/CodeGen/X86/vector-intrinsics.ll b/test/CodeGen/X86/vector-intrinsics.ll index 32916589879dc..edf58b9da1114 100644 --- a/test/CodeGen/X86/vector-intrinsics.ll +++ b/test/CodeGen/X86/vector-intrinsics.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep call | count 16 +; RUN: llc < %s -march=x86-64 | grep call | count 16 declare <4 x double> @llvm.sin.v4f64(<4 x double> %p) declare <4 x double> @llvm.cos.v4f64(<4 x double> %p) diff --git a/test/CodeGen/X86/vector-rem.ll b/test/CodeGen/X86/vector-rem.ll index cfdd34ee1c9b7..51cd872643f2d 100644 --- a/test/CodeGen/X86/vector-rem.ll +++ b/test/CodeGen/X86/vector-rem.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep div | count 8 -; RUN: llvm-as < %s | llc -march=x86-64 | grep fmodf | count 4 +; RUN: llc < %s -march=x86-64 | grep div | count 8 +; RUN: llc < %s -march=x86-64 | grep fmodf | count 4 define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u) { %m = srem <4 x i32> %t, %u diff --git a/test/CodeGen/X86/vector-variable-idx.ll b/test/CodeGen/X86/vector-variable-idx.ll index 82927e96983d9..2a4d18c141a30 100644 --- a/test/CodeGen/X86/vector-variable-idx.ll +++ b/test/CodeGen/X86/vector-variable-idx.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movss | count 2 +; RUN: llc < %s -march=x86-64 | grep movss | count 2 ; PR2676 define float @foo(<4 x float> %p, i32 %t) { diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll index 8e1de2f62cb0d..3fff8497dfdaf 100644 --- a/test/CodeGen/X86/vector.ll +++ b/test/CodeGen/X86/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. -; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 > %t -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah > %t +; RUN: llc < %s -march=x86 -mcpu=i386 > %t +; RUN: llc < %s -march=x86 -mcpu=yonah > %t %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/test/CodeGen/X86/vfcmp.ll b/test/CodeGen/X86/vfcmp.ll index 85b82a0ac8e87..f5f5293622b24 100644 --- a/test/CodeGen/X86/vfcmp.ll +++ b/test/CodeGen/X86/vfcmp.ll @@ -1,8 +1,10 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 ; PR2620 -define void @t(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind { - vfcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1] + +define void @t2(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind { + %A = fcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1] + sext <2 x i1> %A to <2 x i64> extractelement <2 x i64> %1, i32 1 ; <i64>:2 [#uses=1] lshr i64 %2, 63 ; <i64>:3 [#uses=1] trunc i64 %3 to i1 ; <i1>:4 [#uses=1] diff --git a/test/CodeGen/X86/volatile.ll b/test/CodeGen/X86/volatile.ll index f919b5de49615..5e1e0c858e655 100644 --- a/test/CodeGen/X86/volatile.ll +++ b/test/CodeGen/X86/volatile.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 | grep movsd | count 5 -; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -O0 | grep movsd | count 5 +; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5 +; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep movsd | count 5 @x = external global double diff --git a/test/CodeGen/X86/vortex-bug.ll b/test/CodeGen/X86/vortex-bug.ll index d62bb24e33dfc..40f11175b20a4 100644 --- a/test/CodeGen/X86/vortex-bug.ll +++ b/test/CodeGen/X86/vortex-bug.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 %struct.blktkntype = type { i32, i32 } %struct.fieldstruc = type { [128 x i8], %struct.blktkntype*, i32, i32 } diff --git a/test/CodeGen/X86/vshift-1.ll b/test/CodeGen/X86/vshift-1.ll index d7a20e46c18e8..ae845e0a33d19 100644 --- a/test/CodeGen/X86/vshift-1.ll +++ b/test/CodeGen/X86/vshift-1.ll @@ -1,13 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f -; RUN: grep psllq %t | count 2 -; RUN: grep pslld %t | count 2 -; RUN: grep psllw %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: +; CHECK: shift1a: +; CHECK: psllq %shl = shl <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %shl, <2 x i64>* %dst ret void @@ -15,6 +14,9 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: +; CHECK: shift1b: +; CHECK: movd +; CHECK-NEXT: psllq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1 %shl = shl <2 x i64> %val, %1 @@ -25,6 +27,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: +; CHECK: shift2a: +; CHECK: pslld %shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 > store <4 x i32> %shl, <4 x i32>* %dst ret void @@ -32,6 +36,9 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: movd +; CHECK-NEXT: pslld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -43,13 +50,20 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: +; CHECK: shift3a: +; CHECK: psllw %shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %shl, <8 x i16>* %dst ret void } +; Make sure the shift amount is properly zero extended. define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: movd +; CHECK-NEXT: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 diff --git a/test/CodeGen/X86/vshift-2.ll b/test/CodeGen/X86/vshift-2.ll index 0807174420e8c..36feb11603d87 100644 --- a/test/CodeGen/X86/vshift-2.ll +++ b/test/CodeGen/X86/vshift-2.ll @@ -1,13 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f -; RUN: grep psrlq %t | count 2 -; RUN: grep psrld %t | count 2 -; RUN: grep psrlw %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: +; CHECK: shift1a: +; CHECK: psrlq %lshr = lshr <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %lshr, <2 x i64>* %dst ret void @@ -15,6 +14,9 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: +; CHECK: shift1b: +; CHECK: movd +; CHECK-NEXT: psrlq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1 %lshr = lshr <2 x i64> %val, %1 @@ -24,6 +26,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: +; CHECK: shift2a: +; CHECK: psrld %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 > store <4 x i32> %lshr, <4 x i32>* %dst ret void @@ -31,6 +35,9 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: movd +; CHECK-NEXT: psrld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -43,13 +50,20 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: +; CHECK: shift3a: +; CHECK: psrlw %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %lshr, <8 x i16>* %dst ret void } +; properly zero extend the shift amount define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: movd +; CHECK-NEXT: psrlw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 @@ -61,4 +75,4 @@ entry: %lshr = lshr <8 x i16> %val, %7 store <8 x i16> %lshr, <8 x i16>* %dst ret void -}
\ No newline at end of file +} diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll index eea8ad1c798eb..20d3f48a1a67c 100644 --- a/test/CodeGen/X86/vshift-3.ll +++ b/test/CodeGen/X86/vshift-3.ll @@ -1,13 +1,15 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f -; RUN: grep psrad %t | count 2 -; RUN: grep psraw %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. ; Note that x86 does have ashr + +; shift1a can't use a packed shift define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: +; CHECK: shift1a: +; CHECK: sarl %ashr = ashr <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %ashr, <2 x i64>* %dst ret void @@ -15,6 +17,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: +; CHECK: shift2a: +; CHECK: psrad $5 %ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 > store <4 x i32> %ashr, <4 x i32>* %dst ret void @@ -22,6 +26,9 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: movd +; CHECK-NEXT: psrad %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -33,6 +40,8 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: +; CHECK: shift3a: +; CHECK: psraw $5 %ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %ashr, <8 x i16>* %dst ret void @@ -40,6 +49,10 @@ entry: define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: movd +; CHECK-NEXT: psraw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 @@ -51,4 +64,4 @@ entry: %ashr = ashr <8 x i16> %val, %7 store <8 x i16> %ashr, <8 x i16>* %dst ret void -}
\ No newline at end of file +} diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll index 03ab95c0e105c..9773cbed0ae37 100644 --- a/test/CodeGen/X86/vshift-4.ll +++ b/test/CodeGen/X86/vshift-4.ll @@ -1,21 +1,23 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f -; RUN: grep psllq %t | count 1 -; RUN: grep pslld %t | count 3 -; RUN: grep psllw %t | count 2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same when using a shuffle splat. define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: +; CHECK: shift1a: +; CHECK: psllq %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> %shl = shl <2 x i64> %val, %shamt store <2 x i64> %shl, <2 x i64>* %dst ret void } +; shift1b can't use a packed shift define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: +; CHECK: shift1b: +; CHECK: shll %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> %shl = shl <2 x i64> %val, %shamt store <2 x i64> %shl, <2 x i64>* %dst @@ -24,6 +26,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2a: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -32,6 +36,8 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -40,6 +46,8 @@ entry: define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2c: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -48,6 +56,9 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { entry: +; CHECK: shift3a: +; CHECK: movzwl +; CHECK: psllw %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> %shl = shl <8 x i16> %val, %shamt store <8 x i16> %shl, <8 x i16>* %dst @@ -56,6 +67,9 @@ entry: define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll new file mode 100644 index 0000000000000..a543f382b5137 --- /dev/null +++ b/test/CodeGen/X86/vshift-5.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s + +; When loading the shift amount from memory, avoid generating the splat. + +define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { +entry: +; CHECK: shift5a: +; CHECK: movd +; CHECK-NEXT: pslld + %amt = load i32* %pamt + %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 + %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer + %shl = shl <4 x i32> %val, %shamt + store <4 x i32> %shl, <4 x i32>* %dst + ret void +} + + +define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { +entry: +; CHECK: shift5b: +; CHECK: movd +; CHECK-NEXT: psrad + %amt = load i32* %pamt + %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 + %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer + %shr = ashr <4 x i32> %val, %shamt + store <4 x i32> %shr, <4 x i32>* %dst + ret void +} + + +define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { +entry: +; CHECK: shift5c: +; CHECK: movd +; CHECK-NEXT: pslld + %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 + %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer + %shl = shl <4 x i32> %val, %shamt + store <4 x i32> %shl, <4 x i32>* %dst + ret void +} + + +define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { +entry: +; CHECK: shift5d: +; CHECK: movd +; CHECK-NEXT: psrad + %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 + %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer + %shr = ashr <4 x i32> %val, %shamt + store <4 x i32> %shr, <4 x i32>* %dst + ret void +} diff --git a/test/CodeGen/X86/vshift_scalar.ll b/test/CodeGen/X86/vshift_scalar.ll index 8895cdf8aff63..9dd8478caaed4 100644 --- a/test/CodeGen/X86/vshift_scalar.ll +++ b/test/CodeGen/X86/vshift_scalar.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; Legalization test that requires scalarizing a vector. diff --git a/test/CodeGen/X86/vshift_split.ll b/test/CodeGen/X86/vshift_split.ll index 8f485ddd9a6f4..359d36d8af698 100644 --- a/test/CodeGen/X86/vshift_split.ll +++ b/test/CodeGen/X86/vshift_split.ll @@ -1,8 +1,8 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s -march=x86 -mattr=+sse2 ; Example that requires splitting and expanding a vector shift. define <2 x i64> @update(<2 x i64> %val) nounwind readnone { entry: - %shr = lshr <2 x i64> %val, < i64 2, i64 2 > ; <<2 x i64>> [#uses=1] + %shr = lshr <2 x i64> %val, < i64 2, i64 3 > ret <2 x i64> %shr } diff --git a/test/CodeGen/X86/vshift_split2.ll b/test/CodeGen/X86/vshift_split2.ll index e9438492a0fb3..0f8c2b896e2b5 100644 --- a/test/CodeGen/X86/vshift_split2.ll +++ b/test/CodeGen/X86/vshift_split2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah ; Legalization example that requires splitting a large vector into smaller pieces. diff --git a/test/CodeGen/X86/weak.ll b/test/CodeGen/X86/weak.ll index 28638afd57ef5..8590e8d0001e2 100644 --- a/test/CodeGen/X86/weak.ll +++ b/test/CodeGen/X86/weak.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 +; RUN: llc < %s -march=x86 @a = extern_weak global i32 ; <i32*> [#uses=1] @b = global i32* @a ; <i32**> [#uses=0] diff --git a/test/CodeGen/X86/wide-integer-fold.ll b/test/CodeGen/X86/wide-integer-fold.ll new file mode 100644 index 0000000000000..b3b4d24ab3acc --- /dev/null +++ b/test/CodeGen/X86/wide-integer-fold.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s +; CHECK: movq $-65535, %rax + +; DAGCombiner should fold this to a simple constant. + +define i64 @foo(i192 %a) nounwind { + %t = or i192 %a, -22300404916163702203072254898040925442801665 + %s = and i192 %t, -22300404916163702203072254898040929737768960 + %u = lshr i192 %s, 128 + %v = trunc i192 %u to i64 + ret i64 %v +} diff --git a/test/CodeGen/X86/widen_arith-1.ll b/test/CodeGen/X86/widen_arith-1.ll index 419078174d1a6..8f607f5ed5930 100644 --- a/test/CodeGen/X86/widen_arith-1.ll +++ b/test/CodeGen/X86/widen_arith-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep paddb %t | count 1 ; RUN: grep pextrb %t | count 1 ; RUN: not grep pextrw %t diff --git a/test/CodeGen/X86/widen_arith-2.ll b/test/CodeGen/X86/widen_arith-2.ll index de6cd0871be7d..e2420f0ff19c6 100644 --- a/test/CodeGen/X86/widen_arith-2.ll +++ b/test/CodeGen/X86/widen_arith-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep paddb %t | count 1 ; RUN: grep pand %t | count 1 diff --git a/test/CodeGen/X86/widen_arith-3.ll b/test/CodeGen/X86/widen_arith-3.ll index fbba4457e2266..a22d2547566fc 100644 --- a/test/CodeGen/X86/widen_arith-3.ll +++ b/test/CodeGen/X86/widen_arith-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep paddw %t | count 1 ; RUN: grep movd %t | count 2 ; RUN: grep pextrw %t | count 1 diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll index e19ab6574aad7..898bff01378a3 100644 --- a/test/CodeGen/X86/widen_arith-4.ll +++ b/test/CodeGen/X86/widen_arith-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep psubw %t | count 1 ; RUN: grep pmullw %t | count 1 diff --git a/test/CodeGen/X86/widen_arith-5.ll b/test/CodeGen/X86/widen_arith-5.ll index 6ff099dd8f9f2..1ecf09d9ff32d 100644 --- a/test/CodeGen/X86/widen_arith-5.ll +++ b/test/CodeGen/X86/widen_arith-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep pmulld %t | count 1 ; RUN: grep psubd %t | count 1 ; RUN: grep movaps %t | count 1 diff --git a/test/CodeGen/X86/widen_arith-6.ll b/test/CodeGen/X86/widen_arith-6.ll index 7b0bb33c00241..358325885f2a3 100644 --- a/test/CodeGen/X86/widen_arith-6.ll +++ b/test/CodeGen/X86/widen_arith-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep mulps %t | count 1 ; RUN: grep addps %t | count 1 diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll index ed8d27cde649c..441a360486336 100644 --- a/test/CodeGen/X86/widen_cast-1.ll +++ b/test/CodeGen/X86/widen_cast-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep paddw %t | count 1 ; RUN: grep movd %t | count 1 ; RUN: grep pextrd %t | count 1 diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index 3b45ce308d24d..ded5707aed40d 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep pextrd %t | count 5 ; RUN: grep movd %t | count 3 diff --git a/test/CodeGen/X86/widen_cast-3.ll b/test/CodeGen/X86/widen_cast-3.ll index 33cc41f73fe34..67a760f5df093 100644 --- a/test/CodeGen/X86/widen_cast-3.ll +++ b/test/CodeGen/X86/widen_cast-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep paddd %t | count 1 ; RUN: grep pextrd %t | count 2 diff --git a/test/CodeGen/X86/widen_cast-4.ll b/test/CodeGen/X86/widen_cast-4.ll index b090cb1614ce1..614eeedbe79d3 100644 --- a/test/CodeGen/X86/widen_cast-4.ll +++ b/test/CodeGen/X86/widen_cast-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep sarb %t | count 8 ; v8i8 that is widen to v16i8 then split diff --git a/test/CodeGen/X86/widen_cast-5.ll b/test/CodeGen/X86/widen_cast-5.ll index 76969429befe5..92618d6fe157e 100644 --- a/test/CodeGen/X86/widen_cast-5.ll +++ b/test/CodeGen/X86/widen_cast-5.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; bitcast a i64 to v2i32 diff --git a/test/CodeGen/X86/widen_cast-6.ll b/test/CodeGen/X86/widen_cast-6.ll index 0fa1b7a7604a9..386f749a50661 100644 --- a/test/CodeGen/X86/widen_cast-6.ll +++ b/test/CodeGen/X86/widen_cast-6.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse41 -disable-mmx -o %t ; RUN: grep movd %t | count 1 ; Test bit convert that requires widening in the operand. diff --git a/test/CodeGen/X86/widen_conv-1.ll b/test/CodeGen/X86/widen_conv-1.ll index a4aab7bb1da60..ccc8b4ff06e6f 100644 --- a/test/CodeGen/X86/widen_conv-1.ll +++ b/test/CodeGen/X86/widen_conv-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; RUN: grep pshufd %t | count 1 ; RUN: grep paddd %t | count 1 diff --git a/test/CodeGen/X86/widen_conv-2.ll b/test/CodeGen/X86/widen_conv-2.ll index 191a261ccf18b..9b7ab74eb2e14 100644 --- a/test/CodeGen/X86/widen_conv-2.ll +++ b/test/CodeGen/X86/widen_conv-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; sign extension v2i32 to v2i16 diff --git a/test/CodeGen/X86/widen_conv-3.ll b/test/CodeGen/X86/widen_conv-3.ll index 154788d667bae..4ec76a908e811 100644 --- a/test/CodeGen/X86/widen_conv-3.ll +++ b/test/CodeGen/X86/widen_conv-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; grep cvtsi2ss %t | count 1 ; sign to float v2i16 to v2f32 diff --git a/test/CodeGen/X86/widen_conv-4.ll b/test/CodeGen/X86/widen_conv-4.ll index 1ea5788ab3e4e..61a26a8b80bda 100644 --- a/test/CodeGen/X86/widen_conv-4.ll +++ b/test/CodeGen/X86/widen_conv-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; unsigned to float v7i16 to v7f32 diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll new file mode 100644 index 0000000000000..f6c4af03209be --- /dev/null +++ b/test/CodeGen/X86/widen_load-0.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -o - -march=x86-64 | FileCheck %s +; PR4891 + +; Both loads should happen before either store. + +; CHECK: movl (%rdi), %eax +; CHECK: movl (%rsi), %ecx +; CHECK: movl %ecx, (%rdi) +; CHECK: movl %eax, (%rsi) + +define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind { +entry: + %0 = load <2 x i16>* %b, align 2 ; <<2 x i16>> [#uses=1] + %1 = load i32* %c, align 4 ; <i32> [#uses=1] + %tmp1 = bitcast i32 %1 to <2 x i16> ; <<2 x i16>> [#uses=1] + store <2 x i16> %tmp1, <2 x i16>* %b, align 2 + %tmp5 = bitcast <2 x i16> %0 to <1 x i32> ; <<1 x i32>> [#uses=1] + %tmp3 = extractelement <1 x i32> %tmp5, i32 0 ; <i32> [#uses=1] + store i32 %tmp3, i32* %c, align 4 + ret void +} diff --git a/test/CodeGen/X86/widen_load-1.ll b/test/CodeGen/X86/widen_load-1.ll new file mode 100644 index 0000000000000..2d34b31314d5b --- /dev/null +++ b/test/CodeGen/X86/widen_load-1.ll @@ -0,0 +1,45 @@ +; RUN: llc %s -o - -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -disable-mmx | FileCheck %s +; PR4891 + +; This load should be before the call, not after. + +; CHECK: movq compl+128(%rip), %xmm0 +; CHECK: movaps %xmm0, (%rsp) +; CHECK: call killcommon + +@compl = linkonce global [20 x i64] zeroinitializer, align 64 ; <[20 x i64]*> [#uses=1] + +declare void @killcommon(i32* noalias) + +define void @reset(<2 x float>* noalias %garbage1) { +"file complex.c, line 27, bb1": + %changed = alloca i32, align 4 ; <i32*> [#uses=3] + br label %"file complex.c, line 27, bb13" + +"file complex.c, line 27, bb13": ; preds = %"file complex.c, line 27, bb1" + store i32 0, i32* %changed, align 4 + %r2 = getelementptr float* bitcast ([20 x i64]* @compl to float*), i64 32 ; <float*> [#uses=1] + %r3 = bitcast float* %r2 to <2 x float>* ; <<2 x float>*> [#uses=1] + %r4 = load <2 x float>* %r3, align 4 ; <<2 x float>> [#uses=1] + call void @killcommon(i32* %changed) + br label %"file complex.c, line 34, bb4" + +"file complex.c, line 34, bb4": ; preds = %"file complex.c, line 27, bb13" + %r5 = load i32* %changed, align 4 ; <i32> [#uses=1] + %r6 = icmp eq i32 %r5, 0 ; <i1> [#uses=1] + %r7 = zext i1 %r6 to i32 ; <i32> [#uses=1] + %r8 = icmp ne i32 %r7, 0 ; <i1> [#uses=1] + br i1 %r8, label %"file complex.c, line 34, bb7", label %"file complex.c, line 27, bb5" + +"file complex.c, line 27, bb5": ; preds = %"file complex.c, line 34, bb4" + br label %"file complex.c, line 35, bb6" + +"file complex.c, line 35, bb6": ; preds = %"file complex.c, line 27, bb5" + %r11 = ptrtoint <2 x float>* %garbage1 to i64 ; <i64> [#uses=1] + %r12 = inttoptr i64 %r11 to <2 x float>* ; <<2 x float>*> [#uses=1] + store <2 x float> %r4, <2 x float>* %r12, align 4 + br label %"file complex.c, line 34, bb7" + +"file complex.c, line 34, bb7": ; preds = %"file complex.c, line 35, bb6", %"file complex.c, line 34, bb4" + ret void +} diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll index 3d757b8a8a500..aca0b67cb663b 100644 --- a/test/CodeGen/X86/widen_select-1.ll +++ b/test/CodeGen/X86/widen_select-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; widening select v6i32 and then a sub diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll index a676f33d6c68b..15da87005c92f 100644 --- a/test/CodeGen/X86/widen_shuffle-1.ll +++ b/test/CodeGen/X86/widen_shuffle-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; widening shuffle v3float and then a add diff --git a/test/CodeGen/X86/widen_shuffle-2.ll b/test/CodeGen/X86/widen_shuffle-2.ll index c2dfa3d272c3b..617cc1de4ba8a 100644 --- a/test/CodeGen/X86/widen_shuffle-2.ll +++ b/test/CodeGen/X86/widen_shuffle-2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse42 -disable-mmx -o %t -f +; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx -o %t ; widening shuffle v3float and then a add diff --git a/test/CodeGen/X86/x86-64-and-mask.ll b/test/CodeGen/X86/x86-64-and-mask.ll index 3d61e5dbe5a77..3c73891112670 100644 --- a/test/CodeGen/X86/x86-64-and-mask.ll +++ b/test/CodeGen/X86/x86-64-and-mask.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {movl.*%edi, %eax} +; RUN: llc < %s | grep {movl.*%edi, %eax} ; This should be a single mov, not a load of immediate + andq. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/x86-64-arg.ll b/test/CodeGen/X86/x86-64-arg.ll index 22a095b0d9b50..ec8dd8edb6342 100644 --- a/test/CodeGen/X86/x86-64-arg.ll +++ b/test/CodeGen/X86/x86-64-arg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep {movl %edi, %eax} +; RUN: llc < %s | grep {movl %edi, %eax} ; The input value is already sign extended, don't re-extend it. ; This testcase corresponds to: ; int test(short X) { return (int)X; } diff --git a/test/CodeGen/X86/x86-64-asm.ll b/test/CodeGen/X86/x86-64-asm.ll index 8ccf8b67448b3..2640e593ec185 100644 --- a/test/CodeGen/X86/x86-64-asm.ll +++ b/test/CodeGen/X86/x86-64-asm.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc +; RUN: llc < %s ; PR1029 target datalayout = "e-p:64:64" diff --git a/test/CodeGen/X86/x86-64-dead-stack-adjust.ll b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll index 15a30de21c6f4..79316f29de37a 100644 --- a/test/CodeGen/X86/x86-64-dead-stack-adjust.ll +++ b/test/CodeGen/X86/x86-64-dead-stack-adjust.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc | not grep rsp -; RUN: llvm-as < %s | llc | grep cvttsd2siq +; RUN: llc < %s | not grep rsp +; RUN: llc < %s | grep cvttsd2siq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/x86-64-disp.ll b/test/CodeGen/X86/x86-64-disp.ll index 4a8f6cdfb60da..d8059ebb1c196 100644 --- a/test/CodeGen/X86/x86-64-disp.ll +++ b/test/CodeGen/X86/x86-64-disp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 2 +; RUN: llc < %s -march=x86-64 | grep mov | count 2 ; Fold an offset into an address even if it's not a 32-bit ; signed integer. diff --git a/test/CodeGen/X86/x86-64-frameaddr.ll b/test/CodeGen/X86/x86-64-frameaddr.ll index 80060996f32bd..57163d3c68398 100644 --- a/test/CodeGen/X86/x86-64-frameaddr.ll +++ b/test/CodeGen/X86/x86-64-frameaddr.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | grep rbp +; RUN: llc < %s -march=x86-64 | grep movq | grep rbp define i64* @stack_end_address() nounwind { entry: diff --git a/test/CodeGen/X86/x86-64-gv-offset.ll b/test/CodeGen/X86/x86-64-gv-offset.ll index b89e1b95368d0..365e4af63fc17 100644 --- a/test/CodeGen/X86/x86-64-gv-offset.ll +++ b/test/CodeGen/X86/x86-64-gv-offset.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | not grep lea +; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep lea %struct.x = type { float, double } @X = global %struct.x { float 1.000000e+00, double 2.000000e+00 }, align 16 ; <%struct.x*> [#uses=2] diff --git a/test/CodeGen/X86/x86-64-malloc.ll b/test/CodeGen/X86/x86-64-malloc.ll index 4beb5c21acab6..b4f1fa6667205 100644 --- a/test/CodeGen/X86/x86-64-malloc.ll +++ b/test/CodeGen/X86/x86-64-malloc.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep {shll.*3, %edi} +; RUN: llc < %s -march=x86-64 | grep {shll.*3, %edi} ; PR3829 ; The generated code should multiply by 3 (sizeof i8*) as an i32, ; not as an i64! diff --git a/test/CodeGen/X86/x86-64-mem.ll b/test/CodeGen/X86/x86-64-mem.ll index 7497362a15462..d15f516cddee3 100644 --- a/test/CodeGen/X86/x86-64-mem.ll +++ b/test/CodeGen/X86/x86-64-mem.ll @@ -1,10 +1,9 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-apple-darwin -o %t1 ; RUN: grep GOTPCREL %t1 | count 4 ; RUN: grep %%rip %t1 | count 6 ; RUN: grep movq %t1 | count 6 ; RUN: grep leaq %t1 | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 ; RUN: grep movl %t2 | count 2 ; RUN: grep movq %t2 | count 2 diff --git a/test/CodeGen/X86/x86-64-pic-1.ll b/test/CodeGen/X86/x86-64-pic-1.ll index f5303c6ad2d4f..b21918ef80d4b 100644 --- a/test/CodeGen/X86/x86-64-pic-1.ll +++ b/test/CodeGen/X86/x86-64-pic-1.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f@PLT} %t1 define void @g() { diff --git a/test/CodeGen/X86/x86-64-pic-10.ll b/test/CodeGen/X86/x86-64-pic-10.ll index bc0d0c09f4d0f..0f65e57449596 100644 --- a/test/CodeGen/X86/x86-64-pic-10.ll +++ b/test/CodeGen/X86/x86-64-pic-10.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call g@PLT} %t1 @g = alias weak i32 ()* @f diff --git a/test/CodeGen/X86/x86-64-pic-11.ll b/test/CodeGen/X86/x86-64-pic-11.ll index f7e0def2d06b0..ef816853326e2 100644 --- a/test/CodeGen/X86/x86-64-pic-11.ll +++ b/test/CodeGen/X86/x86-64-pic-11.ll @@ -1,8 +1,7 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call __fixunsxfti@PLT} %t1 -define i128 @f(x86_fp80 %a) { +define i128 @f(x86_fp80 %a) nounwind { entry: %tmp78 = fptoui x86_fp80 %a to i128 ret i128 %tmp78 diff --git a/test/CodeGen/X86/x86-64-pic-2.ll b/test/CodeGen/X86/x86-64-pic-2.ll index 39aecbadc4872..a52c564f96836 100644 --- a/test/CodeGen/X86/x86-64-pic-2.ll +++ b/test/CodeGen/X86/x86-64-pic-2.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f} %t1 ; RUN: not grep {call f@PLT} %t1 diff --git a/test/CodeGen/X86/x86-64-pic-3.ll b/test/CodeGen/X86/x86-64-pic-3.ll index 0f5f4b706ab4d..246c00f74119d 100644 --- a/test/CodeGen/X86/x86-64-pic-3.ll +++ b/test/CodeGen/X86/x86-64-pic-3.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f} %t1 ; RUN: not grep {call f@PLT} %t1 diff --git a/test/CodeGen/X86/x86-64-pic-4.ll b/test/CodeGen/X86/x86-64-pic-4.ll index f8dfa927828ab..90fc1194a33bb 100644 --- a/test/CodeGen/X86/x86-64-pic-4.ll +++ b/test/CodeGen/X86/x86-64-pic-4.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movq a@GOTPCREL(%rip),} %t1 @a = global i32 0 diff --git a/test/CodeGen/X86/x86-64-pic-5.ll b/test/CodeGen/X86/x86-64-pic-5.ll index 694755da53817..6369bde6943da 100644 --- a/test/CodeGen/X86/x86-64-pic-5.ll +++ b/test/CodeGen/X86/x86-64-pic-5.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movl a(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/test/CodeGen/X86/x86-64-pic-6.ll b/test/CodeGen/X86/x86-64-pic-6.ll index 965a550108b26..6e19ad35bcf44 100644 --- a/test/CodeGen/X86/x86-64-pic-6.ll +++ b/test/CodeGen/X86/x86-64-pic-6.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movl a(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/test/CodeGen/X86/x86-64-pic-7.ll b/test/CodeGen/X86/x86-64-pic-7.ll index 95b7197ff174f..4d98ee614026d 100644 --- a/test/CodeGen/X86/x86-64-pic-7.ll +++ b/test/CodeGen/X86/x86-64-pic-7.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movq f@GOTPCREL(%rip),} %t1 define void ()* @g() nounwind { diff --git a/test/CodeGen/X86/x86-64-pic-8.ll b/test/CodeGen/X86/x86-64-pic-8.ll index 369e0cf365aca..d3b567c610763 100644 --- a/test/CodeGen/X86/x86-64-pic-8.ll +++ b/test/CodeGen/X86/x86-64-pic-8.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {leaq f(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/test/CodeGen/X86/x86-64-pic-9.ll b/test/CodeGen/X86/x86-64-pic-9.ll index 175ec4e5ef95e..076103133fa96 100644 --- a/test/CodeGen/X86/x86-64-pic-9.ll +++ b/test/CodeGen/X86/x86-64-pic-9.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -f +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {leaq f(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/test/CodeGen/X86/x86-64-ret0.ll b/test/CodeGen/X86/x86-64-ret0.ll index d4252e7d6e443..c74f6d803b1cc 100644 --- a/test/CodeGen/X86/x86-64-ret0.ll +++ b/test/CodeGen/X86/x86-64-ret0.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -march=x86-64 | grep mov | count 1 define i32 @f() nounwind { tail call void @t( i32 1 ) nounwind diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll index 369527fd29cfc..7f96543ba49d4 100644 --- a/test/CodeGen/X86/x86-64-shortint.ll +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc | grep movswl +; RUN: llc < %s | grep movswl target datalayout = "e-p:64:64" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/x86-64-sret-return.ll b/test/CodeGen/X86/x86-64-sret-return.ll index 9298661998b0b..7b5f189faa0fa 100644 --- a/test/CodeGen/X86/x86-64-sret-return.ll +++ b/test/CodeGen/X86/x86-64-sret-return.ll @@ -1,9 +1,11 @@ -; RUN: llvm-as < %s | llc | grep {movq %rdi, %rax} +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" %struct.foo = type { [4 x i64] } +; CHECK: bar: +; CHECK: movq %rdi, %rax define void @bar(%struct.foo* noalias sret %agg.result, %struct.foo* %d) nounwind { entry: %d_addr = alloca %struct.foo* ; <%struct.foo**> [#uses=2] @@ -52,3 +54,10 @@ entry: return: ; preds = %entry ret void } + +; CHECK: foo: +; CHECK: movq %rdi, %rax +define void @foo({ i64 }* noalias nocapture sret %agg.result) nounwind { + store { i64 } { i64 0 }, { i64 }* %agg.result + ret void +} diff --git a/test/CodeGen/X86/x86-64-varargs.ll b/test/CodeGen/X86/x86-64-varargs.ll index 2964dd3969f0a..428f4493b069e 100644 --- a/test/CodeGen/X86/x86-64-varargs.ll +++ b/test/CodeGen/X86/x86-64-varargs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax +; RUN: llc < %s -mtriple=x86_64-apple-darwin -code-model=large -relocation-model=static | grep call | not grep rax @.str = internal constant [26 x i8] c"%d, %f, %d, %lld, %d, %f\0A\00" ; <[26 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/x86-frameaddr.ll b/test/CodeGen/X86/x86-frameaddr.ll index b9d6d13880b55..d5958745dfff8 100644 --- a/test/CodeGen/X86/x86-frameaddr.ll +++ b/test/CodeGen/X86/x86-frameaddr.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | grep ebp +; RUN: llc < %s -march=x86 | grep mov | grep ebp define i8* @t() nounwind { entry: diff --git a/test/CodeGen/X86/x86-frameaddr2.ll b/test/CodeGen/X86/x86-frameaddr2.ll index f50ab072c33e3..c5091154152bc 100644 --- a/test/CodeGen/X86/x86-frameaddr2.ll +++ b/test/CodeGen/X86/x86-frameaddr2.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3 +; RUN: llc < %s -march=x86 | grep mov | count 3 define i8* @t() nounwind { entry: diff --git a/test/CodeGen/X86/x86-store-gv-addr.ll b/test/CodeGen/X86/x86-store-gv-addr.ll index 799340d35dd2b..089517aadb128 100644 --- a/test/CodeGen/X86/x86-store-gv-addr.ll +++ b/test/CodeGen/X86/x86-store-gv-addr.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=static | not grep lea -; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea +; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=static | not grep lea +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea @v = external global i32, align 8 @v_addr = external global i32*, align 8 diff --git a/test/CodeGen/X86/xmm-r64.ll b/test/CodeGen/X86/xmm-r64.ll index f7d2143664ef1..2a6b5c71aa4f7 100644 --- a/test/CodeGen/X86/xmm-r64.ll +++ b/test/CodeGen/X86/xmm-r64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 define <4 x i32> @test() { %tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1] diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll new file mode 100644 index 0000000000000..7bd06bba4c3e4 --- /dev/null +++ b/test/CodeGen/X86/xor.ll @@ -0,0 +1,133 @@ +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 + +; Though it is undefined, we want xor undef,undef to produce zero. +define <4 x i32> @test1() nounwind { + %tmp = xor <4 x i32> undef, undef + ret <4 x i32> %tmp + +; X32: test1: +; X32: xorps %xmm0, %xmm0 +; X32: ret +} + +; Though it is undefined, we want xor undef,undef to produce zero. +define i32 @test2() nounwind{ + %tmp = xor i32 undef, undef + ret i32 %tmp +; X32: test2: +; X32: xorl %eax, %eax +; X32: ret +} + +define i32 @test3(i32 %a, i32 %b) nounwind { +entry: + %tmp1not = xor i32 %b, -2 + %tmp3 = and i32 %tmp1not, %a + %tmp4 = lshr i32 %tmp3, 1 + ret i32 %tmp4 + +; X64: test3: +; X64: notl %esi +; X64: andl %edi, %esi +; X64: movl %esi, %eax +; X64: shrl %eax +; X64: ret + +; X32: test3: +; X32: movl 8(%esp), %eax +; X32: notl %eax +; X32: andl 4(%esp), %eax +; X32: shrl %eax +; X32: ret +} + +define i32 @test4(i32 %a, i32 %b) nounwind { +entry: + br label %bb +bb: + %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ] + %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ] + %tmp3 = xor i32 %a_addr.0, %b_addr.0 + %tmp4not = xor i32 %tmp3, 2147483647 + %tmp6 = and i32 %tmp4not, %b_addr.0 + %tmp8 = shl i32 %tmp6, 1 + %tmp10 = icmp eq i32 %tmp8, 0 + br i1 %tmp10, label %bb12, label %bb +bb12: + ret i32 %tmp3 + +; X64: test4: +; X64: notl [[REG:%[a-z]+]] +; X64: andl {{.*}}[[REG]] +; X32: test4: +; X32: notl [[REG:%[a-z]+]] +; X32: andl {{.*}}[[REG]] +} + +define i16 @test5(i16 %a, i16 %b) nounwind { +entry: + br label %bb +bb: + %b_addr.0 = phi i16 [ %b, %entry ], [ %tmp8, %bb ] + %a_addr.0 = phi i16 [ %a, %entry ], [ %tmp3, %bb ] + %tmp3 = xor i16 %a_addr.0, %b_addr.0 + %tmp4not = xor i16 %tmp3, 32767 + %tmp6 = and i16 %tmp4not, %b_addr.0 + %tmp8 = shl i16 %tmp6, 1 + %tmp10 = icmp eq i16 %tmp8, 0 + br i1 %tmp10, label %bb12, label %bb +bb12: + ret i16 %tmp3 +; X64: test5: +; X64: notw [[REG:%[a-z]+]] +; X64: andw {{.*}}[[REG]] +; X32: test5: +; X32: notw [[REG:%[a-z]+]] +; X32: andw {{.*}}[[REG]] +} + +define i8 @test6(i8 %a, i8 %b) nounwind { +entry: + br label %bb +bb: + %b_addr.0 = phi i8 [ %b, %entry ], [ %tmp8, %bb ] + %a_addr.0 = phi i8 [ %a, %entry ], [ %tmp3, %bb ] + %tmp3 = xor i8 %a_addr.0, %b_addr.0 + %tmp4not = xor i8 %tmp3, 127 + %tmp6 = and i8 %tmp4not, %b_addr.0 + %tmp8 = shl i8 %tmp6, 1 + %tmp10 = icmp eq i8 %tmp8, 0 + br i1 %tmp10, label %bb12, label %bb +bb12: + ret i8 %tmp3 +; X64: test6: +; X64: notb [[REG:%[a-z]+]] +; X64: andb {{.*}}[[REG]] +; X32: test6: +; X32: notb [[REG:%[a-z]+]] +; X32: andb {{.*}}[[REG]] +} + +define i32 @test7(i32 %a, i32 %b) nounwind { +entry: + br label %bb +bb: + %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ] + %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ] + %tmp3 = xor i32 %a_addr.0, %b_addr.0 + %tmp4not = xor i32 %tmp3, 2147483646 + %tmp6 = and i32 %tmp4not, %b_addr.0 + %tmp8 = shl i32 %tmp6, 1 + %tmp10 = icmp eq i32 %tmp8, 0 + br i1 %tmp10, label %bb12, label %bb +bb12: + ret i32 %tmp3 +; X64: test7: +; X64: xorl $2147483646, [[REG:%[a-z]+]] +; X64: andl {{.*}}[[REG]] +; X32: test7: +; X32: xorl $2147483646, [[REG:%[a-z]+]] +; X32: andl {{.*}}[[REG]] +} + diff --git a/test/CodeGen/X86/zero-remat.ll b/test/CodeGen/X86/zero-remat.ll index 7640ba5aca412..3e3bb95d06f77 100644 --- a/test/CodeGen/X86/zero-remat.ll +++ b/test/CodeGen/X86/zero-remat.ll @@ -1,16 +1,40 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep xor | count 4 -; RUN: llvm-as < %s | llc -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12 -; RUN: llvm-as < %s | llc -march=x86 | grep fldz -; RUN: llvm-as < %s | llc -march=x86 | not grep fldl +; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -march=x86-64 -stats -info-output-file - | grep asm-printer | grep 12 +; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 declare void @bar(double %x) declare void @barf(float %x) define double @foo() nounwind { + call void @bar(double 0.0) ret double 0.0 + +;CHECK-32: foo: +;CHECK-32: call +;CHECK-32: fldz +;CHECK-32: ret + +;CHECK-64: foo: +;CHECK-64: pxor +;CHECK-64: call +;CHECK-64: pxor +;CHECK-64: ret } + + define float @foof() nounwind { call void @barf(float 0.0) ret float 0.0 + +;CHECK-32: foof: +;CHECK-32: call +;CHECK-32: fldz +;CHECK-32: ret + +;CHECK-64: foof: +;CHECK-64: pxor +;CHECK-64: call +;CHECK-64: pxor +;CHECK-64: ret } diff --git a/test/CodeGen/X86/zext-inreg-0.ll b/test/CodeGen/X86/zext-inreg-0.ll index 1a734642d0318..ae6221af9d813 100644 --- a/test/CodeGen/X86/zext-inreg-0.ll +++ b/test/CodeGen/X86/zext-inreg-0.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and -; RUN: llvm-as < %s | llc -march=x86-64 > %t +; RUN: llc < %s -march=x86 | not grep and +; RUN: llc < %s -march=x86-64 > %t ; RUN: not grep and %t ; RUN: not grep movzbq %t ; RUN: not grep movzwq %t diff --git a/test/CodeGen/X86/zext-inreg-1.ll b/test/CodeGen/X86/zext-inreg-1.ll index bc8e482d562de..17fe374e01ecc 100644 --- a/test/CodeGen/X86/zext-inreg-1.ll +++ b/test/CodeGen/X86/zext-inreg-1.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 | not grep and +; RUN: llc < %s -march=x86 | not grep and ; These tests differ from the ones in zext-inreg-0.ll in that ; on x86-64 they do require and instructions. |