diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
| commit | 411bd29eea3c360d5b48a18a17b5e87f5671af0e (patch) | |
| tree | c8086addb211fa670a9d2b1038d8c2e453229755 /test/CodeGen | |
| parent | 56fe8f14099930935e3870e3e823c322a85c1c89 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen')
389 files changed, 5394 insertions, 8771 deletions
diff --git a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll b/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll deleted file mode 100644 index 76fa3649c8806..0000000000000 --- a/test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll +++ /dev/null @@ -1,947 +0,0 @@ -; RUN: llc < %s -march=arm -; PR1266 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "arm-unknown-linux-gnueabi" - %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 } - %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i32, [52 x i8] } - %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] } - %struct.VEC_tree = type { i32, i32, [1 x %struct.tree_node*] } - %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } - %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } - %struct.addr_diff_vec_flags = type { i8, i8, i8, i8 } - %struct.arm_stack_offsets = type { i32, i32, i32, i32, i32 } - %struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8, %struct.tree_node* (%struct.tree_node**, %struct.tree_node*, %struct.tree_node*, i32, i8*)* } - %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 } - %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* } - %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] } - %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* } - %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack } - %struct.cgraph_edge = type { %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.tree_node*, i8*, i8* } - %struct.cgraph_global_info = type { %struct.cgraph_node*, i32, i8 } - %struct.cgraph_local_info = type { i32, i8, i8, i8, i8, i8, i8, i8 } - %struct.cgraph_node = type { %struct.tree_node*, %struct.cgraph_edge*, %struct.cgraph_edge*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, %struct.cgraph_node*, i8*, %struct.cgraph_local_info, %struct.cgraph_global_info, %struct.cgraph_rtl_info, i32, i8, i8, i8, i8, i8 } - %struct.cgraph_rtl_info = type { i32, i8, i8 } - %struct.cl_perfunc_opts = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.cselib_val_struct = type opaque - %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] } - %struct.def_operand_ptr = type { %struct.tree_node** } - %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] } - %struct.diagnostic_context = type { %struct.pretty_printer*, [8 x i32], i8, i8, i8, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (%struct.diagnostic_context*, %struct.diagnostic_info*)*, void (i8*, i8**)*, %struct.tree_node*, i32, i32 } - %struct.diagnostic_info = type { %struct.text_info, %struct.location_t, i32 } - %struct.die_struct = type opaque - %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 } - %struct.edge_def_insns = type { %struct.rtx_def* } - %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 } - %struct.eh_status = type opaque - %struct.elt_list = type opaque - %struct.elt_t = type { %struct.tree_node*, %struct.tree_node* } - %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** } - %struct.et_node = type opaque - %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* } - %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i8, i8, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 } - %struct.ggc_root_tab = type { i8*, i32, i32, void (i8*)*, void (i8*)* } - %struct.gimplify_ctx = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.varray_head_tag*, %struct.htab*, i32, i8, i8 } - %struct.gimplify_init_ctor_preeval_data = type { %struct.tree_node*, i32 } - %struct.ht_identifier = type { i8*, i32, i32 } - %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 } - %struct.initial_value_struct = type opaque - %struct.lang_decl = type opaque - %struct.lang_hooks = type { i8*, i32, i32 (i32)*, i32 (i32, i8**)*, void (%struct.diagnostic_context*)*, i32 (i32, i8*, i32)*, i8 (i8*, i32) zeroext *, i8 (i8**) zeroext *, i8 () zeroext *, void ()*, void ()*, void (i32)*, void ()*, i64 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.rtx_def* (%struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.rtx_def**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i32 (%struct.rtx_def*, %struct.tree_node*)*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*)*, void (%struct.tree_node*)*, i8 () zeroext *, i8, i8, void ()*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, void (%struct.FILE*, %struct.tree_node*, i32)*, i8* (%struct.tree_node*, i32)*, i32 (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.diagnostic_context*, i8*)*, %struct.tree_node* (%struct.tree_node*)*, i64 (i64)*, %struct.attribute_spec*, %struct.attribute_spec*, %struct.attribute_spec*, i32 (%struct.tree_node*)*, %struct.lang_hooks_for_functions, %struct.lang_hooks_for_tree_inlining, %struct.lang_hooks_for_callgraph, %struct.lang_hooks_for_tree_dump, %struct.lang_hooks_for_decls, %struct.lang_hooks_for_types, i32 (%struct.tree_node**, %struct.tree_node**, %struct.tree_node**)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*, i32, i32, i8*, %struct.tree_node*)* } - %struct.lang_hooks_for_callgraph = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node*)*, void (%struct.tree_node*)* } - %struct.lang_hooks_for_decls = type { i32 ()*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* ()*, i8 (%struct.tree_node*) zeroext *, void ()*, void (%struct.tree_node*)*, i8 (%struct.tree_node*) zeroext *, i8* (%struct.tree_node*)* } - %struct.lang_hooks_for_functions = type { void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, void (%struct.function*)*, i8 (%struct.tree_node*) zeroext * } - %struct.lang_hooks_for_tree_dump = type { i8 (i8*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)* } - %struct.lang_hooks_for_tree_inlining = type { %struct.tree_node* (%struct.tree_node**, i32*, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*)*, i32 (%struct.tree_node**)*, i32 (%struct.tree_node*)*, %struct.tree_node* (i8*, %struct.tree_node*)*, i32 (%struct.tree_node*, %struct.tree_node*)*, i32 (%struct.tree_node*)*, i8 (%struct.tree_node*, %struct.tree_node*) zeroext *, i32 (%struct.tree_node*)*, void (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32)* } - %struct.lang_hooks_for_types = type { %struct.tree_node* (i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (i32, i32)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, %struct.tree_node* (i32, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, void (%struct.tree_node*, i8*)*, void (%struct.tree_node*, %struct.tree_node*)*, %struct.tree_node* (%struct.tree_node*)*, i8 } - %struct.lang_type = type opaque - %struct.language_function = type opaque - %struct.location_t = type { i8*, i32 } - %struct.loop = type opaque - %struct.machine_function = type { %struct.rtx_def*, i32, i32, i32, %struct.arm_stack_offsets, i32, i32, i32, [14 x %struct.rtx_def*] } - %struct.mem_attrs = type { i64, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32 } - %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 } - %struct.output_buffer = type { %struct.obstack, %struct.FILE*, i32, [128 x i8] } - %struct.phi_arg_d = type { %struct.tree_node*, i8 } - %struct.pointer_set_t = type opaque - %struct.pretty_printer = type { %struct.output_buffer*, i8*, i32, i32, i32, i32, i32, i8 (%struct.pretty_printer*, %struct.text_info*) zeroext *, i8, i8 } - %struct.ptr_info_def = type { i8, %struct.bitmap_head_def*, %struct.tree_node* } - %struct.real_value = type { i8, [3 x i8], [5 x i32] } - %struct.reg_attrs = type { %struct.tree_node*, i64 } - %struct.reg_info_def = type opaque - %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 } - %struct.rtunion = type { i32 } - %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] } - %struct.rtx_def = type { i16, i8, i8, %struct.u } - %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* } - %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 } - %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* } - %struct.temp_slot = type opaque - %struct.text_info = type { i8*, i8**, i32 } - %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* } - %struct.tree_ann_d = type { %struct.stmt_ann_d } - %struct.tree_binfo = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.VEC_tree } - %struct.tree_block = type { %struct.tree_common, i8, [3 x i8], %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node* } - %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 } - %struct.tree_complex = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } - %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* } - %struct.tree_decl_u1 = type { i64 } - %struct.tree_decl_u1_a = type { i32 } - %struct.tree_decl_u2 = type { %struct.function* } - %struct.tree_exp = type { %struct.tree_common, %struct.location_t*, i32, %struct.tree_node*, [1 x %struct.tree_node*] } - %struct.tree_identifier = type { %struct.tree_common, %struct.ht_identifier } - %struct.tree_int_cst = type { %struct.tree_common, %struct.tree_int_cst_lowhi } - %struct.tree_int_cst_lowhi = type { i64, i64 } - %struct.tree_list = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node* } - %struct.tree_node = type { %struct.tree_decl } - %struct.tree_phi_node = type { %struct.tree_common, %struct.tree_node*, i32, i32, i32, %struct.basic_block_def*, %struct.dataflow_d*, [1 x %struct.phi_arg_d] } - %struct.tree_real_cst = type { %struct.tree_common, %struct.real_value* } - %struct.tree_ssa_name = type { %struct.tree_common, %struct.tree_node*, i32, %struct.ptr_info_def*, %struct.tree_node*, i8* } - %struct.tree_statement_list = type { %struct.tree_common, %struct.tree_statement_list_node*, %struct.tree_statement_list_node* } - %struct.tree_statement_list_node = type { %struct.tree_statement_list_node*, %struct.tree_statement_list_node*, %struct.tree_node* } - %struct.tree_stmt_iterator = type { %struct.tree_statement_list_node*, %struct.tree_node* } - %struct.tree_string = type { %struct.tree_common, i32, [1 x i8] } - %struct.tree_type = type { %struct.tree_common, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i32, i16, i8, i8, i32, %struct.tree_node*, %struct.tree_node*, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_type* } - %struct.tree_type_symtab = type { i32 } - %struct.tree_value_handle = type { %struct.tree_common, %struct.value_set*, i32 } - %struct.tree_vec = type { %struct.tree_common, i32, [1 x %struct.tree_node*] } - %struct.tree_vector = type { %struct.tree_common, %struct.tree_node* } - %struct.u = type { [1 x i64] } - %struct.use_operand_ptr = type { %struct.tree_node** } - %struct.use_optype_d = type { i32, [1 x %struct.def_operand_ptr] } - %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* } - %struct.v_may_def_optype_d = type { i32, [1 x %struct.elt_t] } - %struct.v_must_def_optype_d = type { i32, [1 x %struct.elt_t] } - %struct.value_set = type opaque - %struct.var_ann_d = type { %struct.tree_ann_common_d, i8, i8, %struct.tree_node*, %struct.varray_head_tag*, i32, i32, i32, %struct.tree_node*, %struct.tree_node* } - %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* } - %struct.varasm_status = type opaque - %struct.varray_data = type { [1 x i64] } - %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u } - %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] } -@gt_pch_rs_gt_gimplify_h = external global [2 x %struct.ggc_root_tab] ; <[2 x %struct.ggc_root_tab]*> [#uses=0] -@tmp_var_id_num = external global i32 ; <i32*> [#uses=0] -@gt_ggc_r_gt_gimplify_h = external global [1 x %struct.ggc_root_tab] ; <[1 x %struct.ggc_root_tab]*> [#uses=0] -@__FUNCTION__.19956 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] -@str = external global [42 x i8] ; <[42 x i8]*> [#uses=1] -@__FUNCTION__.19974 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] -@gimplify_ctxp = external global %struct.gimplify_ctx* ; <%struct.gimplify_ctx**> [#uses=0] -@cl_pf_opts = external global %struct.cl_perfunc_opts ; <%struct.cl_perfunc_opts*> [#uses=0] -@__FUNCTION__.20030 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] -@__FUNCTION__.20099 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] -@global_trees = external global [47 x %struct.tree_node*] ; <[47 x %struct.tree_node*]*> [#uses=0] -@tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=2] -@current_function_decl = external global %struct.tree_node* ; <%struct.tree_node**> [#uses=0] -@str1 = external global [2 x i8] ; <[2 x i8]*> [#uses=0] -@str2 = external global [7 x i8] ; <[7 x i8]*> [#uses=0] -@__FUNCTION__.20151 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.20221 = external global [9 x i8] ; <[9 x i8]*> [#uses=0] -@tree_code_length = external global [0 x i8] ; <[0 x i8]*> [#uses=0] -@__FUNCTION__.20435 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] -@__FUNCTION__.20496 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@cfun = external global %struct.function* ; <%struct.function**> [#uses=0] -@__FUNCTION__.20194 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] -@__FUNCTION__.19987 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.20532 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.20583 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.20606 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] -@__FUNCTION__.20644 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] -@__FUNCTION__.20681 = external global [13 x i8] ; <[13 x i8]*> [#uses=0] -@__FUNCTION__.20700 = external global [13 x i8] ; <[13 x i8]*> [#uses=0] -@__FUNCTION__.21426 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] -@__FUNCTION__.21471 = external global [17 x i8] ; <[17 x i8]*> [#uses=0] -@__FUNCTION__.21962 = external global [27 x i8] ; <[27 x i8]*> [#uses=0] -@__FUNCTION__.22992 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.23735 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] -@lang_hooks = external global %struct.lang_hooks ; <%struct.lang_hooks*> [#uses=0] -@__FUNCTION__.27383 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] -@__FUNCTION__.20776 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.10672 = external global [9 x i8] ; <[9 x i8]*> [#uses=0] -@str3 = external global [47 x i8] ; <[47 x i8]*> [#uses=0] -@str4 = external global [7 x i8] ; <[7 x i8]*> [#uses=0] -@__FUNCTION__.20065 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] -@__FUNCTION__.23256 = external global [16 x i8] ; <[16 x i8]*> [#uses=0] -@__FUNCTION__.23393 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.20043 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.20729 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@__FUNCTION__.20563 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] -@__FUNCTION__.10663 = external global [10 x i8] ; <[10 x i8]*> [#uses=0] -@__FUNCTION__.20367 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.20342 = external global [15 x i8] ; <[15 x i8]*> [#uses=0] -@input_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0] -@__FUNCTION__.24510 = external global [27 x i8] ; <[27 x i8]*> [#uses=0] -@__FUNCTION__.25097 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] -@__FUNCTION__.24705 = external global [26 x i8] ; <[26 x i8]*> [#uses=0] -@str5 = external global [2 x i8] ; <[2 x i8]*> [#uses=0] -@__FUNCTION__.25136 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.24450 = external global [31 x i8] ; <[31 x i8]*> [#uses=0] -@implicit_built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0] -@__FUNCTION__.24398 = external global [31 x i8] ; <[31 x i8]*> [#uses=0] -@__FUNCTION__.26156 = external global [14 x i8] ; <[14 x i8]*> [#uses=1] -@unknown_location = external global %struct.location_t ; <%struct.location_t*> [#uses=0] -@__FUNCTION__.23038 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@str6 = external global [43 x i8] ; <[43 x i8]*> [#uses=0] -@__FUNCTION__.25476 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.22136 = external global [20 x i8] ; <[20 x i8]*> [#uses=1] -@__FUNCTION__.21997 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@__FUNCTION__.21247 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@built_in_decls = external global [471 x %struct.tree_node*] ; <[471 x %struct.tree_node*]*> [#uses=0] -@__FUNCTION__.21924 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.21861 = external global [25 x i8] ; <[25 x i8]*> [#uses=0] -@global_dc = external global %struct.diagnostic_context* ; <%struct.diagnostic_context**> [#uses=0] -@__FUNCTION__.25246 = external global [32 x i8] ; <[32 x i8]*> [#uses=0] -@str7 = external global [4 x i8] ; <[4 x i8]*> [#uses=0] -@stderr = external global %struct.FILE* ; <%struct.FILE**> [#uses=0] -@str8 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] -@str9 = external global [22 x i8] ; <[22 x i8]*> [#uses=0] -@__FUNCTION__.27653 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.27322 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.27139 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] -@__FUNCTION__.22462 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@str10 = external global [6 x i8] ; <[6 x i8]*> [#uses=0] -@__FUNCTION__.25389 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.25650 = external global [18 x i8] ; <[18 x i8]*> [#uses=0] -@str11 = external global [32 x i8] ; <[32 x i8]*> [#uses=0] -@str12 = external global [3 x i8] ; <[3 x i8]*> [#uses=0] -@str13 = external global [44 x i8] ; <[44 x i8]*> [#uses=0] -@__FUNCTION__.27444 = external global [14 x i8] ; <[14 x i8]*> [#uses=0] -@timevar_enable = external global i8 ; <i8*> [#uses=0] -@__FUNCTION__.27533 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@flag_instrument_function_entry_exit = external global i32 ; <i32*> [#uses=0] -@__FUNCTION__.25331 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@__FUNCTION__.20965 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@str14 = external global [12 x i8] ; <[12 x i8]*> [#uses=0] -@__FUNCTION__.26053 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@__FUNCTION__.26004 = external global [20 x i8] ; <[20 x i8]*> [#uses=0] -@str15 = external global [8 x i8] ; <[8 x i8]*> [#uses=0] -@__FUNCTION__.21584 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] -@str16 = external global [12 x i8] ; <[12 x i8]*> [#uses=0] -@__FUNCTION__.25903 = external global [28 x i8] ; <[28 x i8]*> [#uses=0] -@__FUNCTION__.22930 = external global [23 x i8] ; <[23 x i8]*> [#uses=0] -@__FUNCTION__.23832 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@str17 = external global [6 x i8] ; <[6 x i8]*> [#uses=0] -@__FUNCTION__.24620 = external global [24 x i8] ; <[24 x i8]*> [#uses=0] -@__FUNCTION__.24582 = external global [30 x i8] ; <[30 x i8]*> [#uses=0] -@__FUNCTION__.21382 = external global [19 x i8] ; <[19 x i8]*> [#uses=0] -@__FUNCTION__.21117 = external global [21 x i8] ; <[21 x i8]*> [#uses=0] - - -declare void @push_gimplify_context() - -declare i32 @gimple_tree_hash(i8*) - -declare i32 @iterative_hash_expr(%struct.tree_node*, i32) - -declare i32 @gimple_tree_eq(i8*, i8*) - -declare i32 @operand_equal_p(%struct.tree_node*, %struct.tree_node*, i32) - -declare void @fancy_abort(i8*, i32, i8*) - -declare i8* @xcalloc(i32, i32) - -declare %struct.htab* @htab_create(i32, i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*) - -declare void @free(i8*) - -declare void @gimple_push_bind_expr(%struct.tree_node*) - -declare void @gimple_pop_bind_expr() - -declare %struct.tree_node* @gimple_current_bind_expr() - -declare fastcc void @gimple_push_condition() - -declare %struct.tree_node* @create_artificial_label() - -declare %struct.tree_node* @build_decl_stat(i32, %struct.tree_node*, %struct.tree_node*) - -declare void @tree_class_check_failed(%struct.tree_node*, i32, i8*, i32, i8*) - -declare %struct.tree_node* @create_tmp_var_name(i8*) - -declare i32 @strlen(i8*) - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare i32 @sprintf(i8*, i8*, ...) - -declare %struct.tree_node* @get_identifier(i8*) - -declare %struct.tree_node* @create_tmp_var_raw(%struct.tree_node*, i8*) - -declare %struct.tree_node* @build_qualified_type(%struct.tree_node*, i32) - -declare i8* @get_name(%struct.tree_node*) - -declare void @tree_operand_check_failed(i32, i32, i8*, i32, i8*) - -declare void @tree_check_failed(%struct.tree_node*, i8*, i32, i8*, ...) - -declare void @declare_tmp_vars(%struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @nreverse(%struct.tree_node*) - -declare void @gimple_add_tmp_var(%struct.tree_node*) - -declare void @record_vars(%struct.tree_node*) - -declare %struct.tree_node* @create_tmp_var(%struct.tree_node*, i8*) - -declare void @pop_gimplify_context(%struct.tree_node*) - -declare void @htab_delete(%struct.htab*) - -declare fastcc void @annotate_one_with_locus(%struct.tree_node*, i32, i32) - -declare void @annotate_with_locus(%struct.tree_node*, i32, i32) - -declare %struct.tree_node* @mostly_copy_tree_r(%struct.tree_node**, i32*, i8*) - -declare %struct.tree_node* @copy_tree_r(%struct.tree_node**, i32*, i8*) - -declare %struct.tree_node* @mark_decls_volatile_r(%struct.tree_node**, i32*, i8*) - -declare %struct.tree_node* @copy_if_shared_r(%struct.tree_node**, i32*, i8*) - -declare %struct.tree_node* @walk_tree(%struct.tree_node**, %struct.tree_node* (%struct.tree_node**, i32*, i8*)*, i8*, %struct.pointer_set_t*) - -declare %struct.tree_node* @unmark_visited_r(%struct.tree_node**, i32*, i8*) - -declare fastcc void @unshare_body(%struct.tree_node**, %struct.tree_node*) - -declare %struct.cgraph_node* @cgraph_node(%struct.tree_node*) - -declare fastcc void @unvisit_body(%struct.tree_node**, %struct.tree_node*) - -declare void @unshare_all_trees(%struct.tree_node*) - -declare %struct.tree_node* @unshare_expr(%struct.tree_node*) - -declare %struct.tree_node* @build_and_jump(%struct.tree_node**) - -declare %struct.tree_node* @build1_stat(i32, %struct.tree_node*, %struct.tree_node*) - -declare i32 @compare_case_labels(i8*, i8*) - -declare i32 @tree_int_cst_compare(%struct.tree_node*, %struct.tree_node*) - -declare void @sort_case_labels(%struct.tree_node*) - -declare void @tree_vec_elt_check_failed(i32, i32, i8*, i32, i8*) - -declare void @qsort(i8*, i32, i32, i32 (i8*, i8*)*) - -declare %struct.tree_node* @force_labels_r(%struct.tree_node**, i32*, i8*) - -declare fastcc void @canonicalize_component_ref(%struct.tree_node**) - -declare %struct.tree_node* @get_unwidened(%struct.tree_node*, %struct.tree_node*) - -declare fastcc void @maybe_with_size_expr(%struct.tree_node**) - -declare %struct.tree_node* @substitute_placeholder_in_expr(%struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @build2_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare fastcc %struct.tree_node* @gimple_boolify(%struct.tree_node*) - -declare %struct.tree_node* @convert(%struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @gimplify_init_ctor_preeval_1(%struct.tree_node**, i32*, i8*) - -declare i64 @get_alias_set(%struct.tree_node*) - -declare i32 @alias_sets_conflict_p(i64, i64) - -declare fastcc i8 @cpt_same_type(%struct.tree_node*, %struct.tree_node*) zeroext - -declare %struct.tree_node* @check_pointer_types_r(%struct.tree_node**, i32*, i8*) - -declare %struct.tree_node* @voidify_wrapper_expr(%struct.tree_node*, %struct.tree_node*) - -declare i32 @integer_zerop(%struct.tree_node*) - -declare fastcc void @append_to_statement_list_1(%struct.tree_node*, %struct.tree_node**) - -declare %struct.tree_node* @alloc_stmt_list() - -declare void @tsi_link_after(%struct.tree_stmt_iterator*, %struct.tree_node*, i32) - -declare void @append_to_statement_list_force(%struct.tree_node*, %struct.tree_node**) - -declare void @append_to_statement_list(%struct.tree_node*, %struct.tree_node**) - -declare fastcc %struct.tree_node* @shortcut_cond_r(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**) - -declare %struct.tree_node* @build3_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare fastcc %struct.tree_node* @shortcut_cond_expr(%struct.tree_node*) - -declare %struct.tree_node* @expr_last(%struct.tree_node*) - -declare i8 @block_may_fallthru(%struct.tree_node*) zeroext - -declare fastcc void @gimple_pop_condition(%struct.tree_node**) - -declare %struct.tree_node* @gimple_build_eh_filter(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare void @annotate_all_with_locus(%struct.tree_node**, i32, i32) - -declare fastcc %struct.tree_node* @internal_get_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**, i8 zeroext ) - -define i32 @gimplify_expr(%struct.tree_node** %expr_p, %struct.tree_node** %pre_p, %struct.tree_node** %post_p, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback) { -entry: - %internal_post = alloca %struct.tree_node*, align 4 ; <%struct.tree_node**> [#uses=2] - %pre_p_addr.0 = select i1 false, %struct.tree_node** null, %struct.tree_node** %pre_p ; <%struct.tree_node**> [#uses=7] - %post_p_addr.0 = select i1 false, %struct.tree_node** %internal_post, %struct.tree_node** %post_p ; <%struct.tree_node**> [#uses=7] - br i1 false, label %bb277, label %bb191 - -bb191: ; preds = %entry - ret i32 0 - -bb277: ; preds = %entry - %tmp283 = call i32 null( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=1] - switch i32 %tmp283, label %bb7478 [ - i32 0, label %cond_next289 - i32 -1, label %cond_next298 - ] - -cond_next289: ; preds = %bb277 - ret i32 0 - -cond_next298: ; preds = %bb277 - switch i32 0, label %bb7444 [ - i32 24, label %bb7463 - i32 25, label %bb7463 - i32 26, label %bb7463 - i32 27, label %bb7463 - i32 28, label %bb7463 - i32 33, label %bb4503 - i32 39, label %bb397 - i32 40, label %bb5650 - i32 41, label %bb4339 - i32 42, label %bb4350 - i32 43, label %bb4350 - i32 44, label %bb319 - i32 45, label %bb397 - i32 46, label %bb6124 - i32 47, label %bb7463 - i32 49, label %bb5524 - i32 50, label %bb1283 - i32 51, label %bb1289 - i32 52, label %bb1289 - i32 53, label %bb5969 - i32 54, label %bb408 - i32 56, label %bb5079 - i32 57, label %bb428 - i32 59, label %bb5965 - i32 74, label %bb4275 - i32 75, label %bb4275 - i32 76, label %bb4275 - i32 77, label %bb4275 - i32 91, label %bb1296 - i32 92, label %bb1296 - i32 96, label %bb1322 - i32 112, label %bb2548 - i32 113, label %bb2548 - i32 115, label %bb397 - i32 116, label %bb5645 - i32 117, label %bb1504 - i32 121, label %bb397 - i32 122, label %bb397 - i32 123, label %bb313 - i32 124, label %bb313 - i32 125, label %bb313 - i32 126, label %bb313 - i32 127, label %bb2141 - i32 128, label %cond_next5873 - i32 129, label %cond_next5873 - i32 130, label %bb4536 - i32 131, label %bb5300 - i32 132, label %bb5170 - i32 133, label %bb5519 - i32 134, label %bb5091 - i32 135, label %bb5083 - i32 136, label %bb5087 - i32 137, label %bb5382 - i32 139, label %bb7463 - i32 140, label %bb7463 - i32 142, label %bb5974 - i32 143, label %bb6049 - i32 147, label %bb6296 - i32 151, label %cond_next6474 - ] - -bb313: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298 - ret i32 0 - -bb319: ; preds = %cond_next298 - ret i32 0 - -bb397: ; preds = %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298 - ret i32 0 - -bb408: ; preds = %cond_next298 - %tmp413 = call fastcc i32 @gimplify_cond_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, %struct.tree_node* null, i32 %fallback ) ; <i32> [#uses=0] - ret i32 0 - -bb428: ; preds = %cond_next298 - ret i32 0 - -bb1283: ; preds = %cond_next298 - ret i32 0 - -bb1289: ; preds = %cond_next298, %cond_next298 - ret i32 0 - -bb1296: ; preds = %cond_next298, %cond_next298 - ret i32 0 - -bb1322: ; preds = %cond_next298 - ret i32 0 - -bb1504: ; preds = %cond_next298 - ret i32 0 - -bb2141: ; preds = %cond_next298 - ret i32 0 - -bb2548: ; preds = %cond_next298, %cond_next298 - %tmp2554 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=2] - %tmp2562 = and i32 0, 255 ; <i32> [#uses=1] - %tmp2569 = add i8 0, -4 ; <i8> [#uses=1] - icmp ugt i8 %tmp2569, 5 ; <i1>:0 [#uses=2] - %tmp2587 = load i8* null ; <i8> [#uses=1] - icmp eq i8 %tmp2587, 0 ; <i1>:1 [#uses=2] - %tmp2607 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=2] - br i1 false, label %bb2754, label %cond_next2617 - -cond_next2617: ; preds = %bb2548 - ret i32 0 - -bb2754: ; preds = %bb2548 - br i1 %0, label %cond_true2780, label %cond_next2783 - -cond_true2780: ; preds = %bb2754 - call void @tree_class_check_failed( %struct.tree_node* %tmp2554, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) - unreachable - -cond_next2783: ; preds = %bb2754 - %tmp2825 = and i32 0, 255 ; <i32> [#uses=1] - %tmp2829 = load i32* null ; <i32> [#uses=1] - %tmp28292830 = trunc i32 %tmp2829 to i8 ; <i8> [#uses=1] - %tmp2832 = add i8 %tmp28292830, -4 ; <i8> [#uses=1] - icmp ugt i8 %tmp2832, 5 ; <i1>:2 [#uses=1] - icmp eq i8 0, 0 ; <i1>:3 [#uses=1] - %tmp28652866 = bitcast %struct.tree_node* %tmp2607 to %struct.tree_exp* ; <%struct.tree_exp*> [#uses=1] - %tmp2868 = getelementptr %struct.tree_exp* %tmp28652866, i32 0, i32 4, i32 0 ; <%struct.tree_node**> [#uses=1] - %tmp2870 = load %struct.tree_node** %tmp2868 ; <%struct.tree_node*> [#uses=1] - br i1 %1, label %cond_true2915, label %cond_next2927 - -cond_true2915: ; preds = %cond_next2783 - unreachable - -cond_next2927: ; preds = %cond_next2783 - %tmp2938 = load %struct.tree_node** null ; <%struct.tree_node*> [#uses=1] - %tmp2944 = load i32* null ; <i32> [#uses=1] - %tmp2946 = and i32 %tmp2944, 255 ; <i32> [#uses=1] - %tmp2949 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp2946 ; <i32*> [#uses=1] - %tmp2950 = load i32* %tmp2949 ; <i32> [#uses=1] - icmp eq i32 %tmp2950, 2 ; <i1>:4 [#uses=1] - br i1 %4, label %cond_next2954, label %cond_true2951 - -cond_true2951: ; preds = %cond_next2927 - call void @tree_class_check_failed( %struct.tree_node* %tmp2938, i32 2, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) - unreachable - -cond_next2954: ; preds = %cond_next2927 - br i1 %0, label %cond_true2991, label %cond_next2994 - -cond_true2991: ; preds = %cond_next2954 - unreachable - -cond_next2994: ; preds = %cond_next2954 - br i1 %1, label %cond_true3009, label %cond_next3021 - -cond_true3009: ; preds = %cond_next2994 - call void @tree_operand_check_failed( i32 0, i32 %tmp2562, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) - unreachable - -cond_next3021: ; preds = %cond_next2994 - br i1 %2, label %cond_true3044, label %cond_next3047 - -cond_true3044: ; preds = %cond_next3021 - call void @tree_class_check_failed( %struct.tree_node* %tmp2607, i32 9, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) - unreachable - -cond_next3047: ; preds = %cond_next3021 - br i1 %3, label %cond_true3062, label %cond_next3074 - -cond_true3062: ; preds = %cond_next3047 - call void @tree_operand_check_failed( i32 0, i32 %tmp2825, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 1415, i8* getelementptr ([20 x i8]* @__FUNCTION__.22136, i32 0, i32 0) ) - unreachable - -cond_next3074: ; preds = %cond_next3047 - %tmp3084 = getelementptr %struct.tree_node* %tmp2870, i32 0, i32 0, i32 0, i32 1 ; <%struct.tree_node**> [#uses=1] - %tmp3085 = load %struct.tree_node** %tmp3084 ; <%struct.tree_node*> [#uses=1] - %tmp31043105 = bitcast %struct.tree_node* %tmp3085 to %struct.tree_type* ; <%struct.tree_type*> [#uses=1] - %tmp3106 = getelementptr %struct.tree_type* %tmp31043105, i32 0, i32 6 ; <i16*> [#uses=1] - %tmp31063107 = bitcast i16* %tmp3106 to i32* ; <i32*> [#uses=1] - %tmp3108 = load i32* %tmp31063107 ; <i32> [#uses=1] - xor i32 %tmp3108, 0 ; <i32>:5 [#uses=1] - %tmp81008368 = and i32 %5, 65024 ; <i32> [#uses=1] - icmp eq i32 %tmp81008368, 0 ; <i1>:6 [#uses=1] - br i1 %6, label %cond_next3113, label %bb3351 - -cond_next3113: ; preds = %cond_next3074 - ret i32 0 - -bb3351: ; preds = %cond_next3074 - %tmp3354 = call i8 @tree_ssa_useless_type_conversion( %struct.tree_node* %tmp2554 ) zeroext ; <i8> [#uses=1] - icmp eq i8 %tmp3354, 0 ; <i1>:7 [#uses=1] - %tmp3424 = load i32* null ; <i32> [#uses=1] - br i1 %7, label %cond_next3417, label %cond_true3356 - -cond_true3356: ; preds = %bb3351 - ret i32 0 - -cond_next3417: ; preds = %bb3351 - br i1 false, label %cond_true3429, label %cond_next4266 - -cond_true3429: ; preds = %cond_next3417 - %tmp3443 = and i32 %tmp3424, 255 ; <i32> [#uses=0] - ret i32 0 - -cond_next4266: ; preds = %cond_next3417 - %tmp4268 = load %struct.tree_node** %expr_p ; <%struct.tree_node*> [#uses=1] - icmp eq %struct.tree_node* %tmp4268, null ; <i1>:8 [#uses=1] - br i1 %8, label %bb4275, label %bb7463 - -bb4275: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298 - %tmp4289 = and i32 0, 255 ; <i32> [#uses=2] - %tmp4292 = getelementptr [0 x i32]* @tree_code_type, i32 0, i32 %tmp4289 ; <i32*> [#uses=1] - %tmp4293 = load i32* %tmp4292 ; <i32> [#uses=1] - %tmp42934294 = trunc i32 %tmp4293 to i8 ; <i8> [#uses=1] - %tmp4296 = add i8 %tmp42934294, -4 ; <i8> [#uses=1] - icmp ugt i8 %tmp4296, 5 ; <i1>:9 [#uses=1] - br i1 %9, label %cond_true4297, label %cond_next4300 - -cond_true4297: ; preds = %bb4275 - unreachable - -cond_next4300: ; preds = %bb4275 - %tmp4314 = load i8* null ; <i8> [#uses=1] - icmp eq i8 %tmp4314, 0 ; <i1>:10 [#uses=1] - br i1 %10, label %cond_true4315, label %cond_next4327 - -cond_true4315: ; preds = %cond_next4300 - call void @tree_operand_check_failed( i32 0, i32 %tmp4289, i8* getelementptr ([42 x i8]* @str, i32 0, i32 0), i32 3997, i8* getelementptr ([14 x i8]* @__FUNCTION__.26156, i32 0, i32 0) ) - unreachable - -cond_next4327: ; preds = %cond_next4300 - %tmp4336 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0] - ret i32 0 - -bb4339: ; preds = %cond_next298 - ret i32 0 - -bb4350: ; preds = %cond_next298, %cond_next298 - ret i32 0 - -bb4503: ; preds = %cond_next298 - ret i32 0 - -bb4536: ; preds = %cond_next298 - ret i32 0 - -bb5079: ; preds = %cond_next298 - ret i32 0 - -bb5083: ; preds = %cond_next298 - ret i32 0 - -bb5087: ; preds = %cond_next298 - ret i32 0 - -bb5091: ; preds = %cond_next298 - ret i32 0 - -bb5170: ; preds = %cond_next298 - ret i32 0 - -bb5300: ; preds = %cond_next298 - ret i32 0 - -bb5382: ; preds = %cond_next298 - ret i32 0 - -bb5519: ; preds = %cond_next298 - ret i32 0 - -bb5524: ; preds = %cond_next298 - ret i32 0 - -bb5645: ; preds = %cond_next298 - ret i32 0 - -bb5650: ; preds = %cond_next298 - ret i32 0 - -cond_next5873: ; preds = %cond_next298, %cond_next298 - ret i32 0 - -bb5965: ; preds = %cond_next298 - %tmp5968 = call fastcc i32 @gimplify_cleanup_point_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0 ) ; <i32> [#uses=0] - ret i32 0 - -bb5969: ; preds = %cond_next298 - %tmp5973 = call fastcc i32 @gimplify_target_expr( %struct.tree_node** %expr_p, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0 ) ; <i32> [#uses=0] - ret i32 0 - -bb5974: ; preds = %cond_next298 - ret i32 0 - -bb6049: ; preds = %cond_next298 - ret i32 0 - -bb6124: ; preds = %cond_next298 - ret i32 0 - -bb6296: ; preds = %cond_next298 - ret i32 0 - -cond_next6474: ; preds = %cond_next298 - icmp eq %struct.tree_node** %internal_post, %post_p_addr.0 ; <i1>:11 [#uses=1] - %iftmp.381.0 = select i1 %11, %struct.tree_node** null, %struct.tree_node** %post_p_addr.0 ; <%struct.tree_node**> [#uses=1] - %tmp6490 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %iftmp.381.0, i8 (%struct.tree_node*) zeroext * %gimple_test_f, i32 %fallback ) ; <i32> [#uses=0] - %tmp6551 = call i32 @gimplify_expr( %struct.tree_node** null, %struct.tree_node** %pre_p_addr.0, %struct.tree_node** %post_p_addr.0, i8 (%struct.tree_node*) zeroext * @is_gimple_val, i32 1 ) ; <i32> [#uses=0] - ret i32 0 - -bb7444: ; preds = %cond_next298 - ret i32 0 - -bb7463: ; preds = %cond_next4266, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298, %cond_next298 - ret i32 0 - -bb7478: ; preds = %bb277 - ret i32 0 -} - -declare i8 @is_gimple_formal_tmp_rhs(%struct.tree_node*) zeroext - -declare void @gimplify_and_add(%struct.tree_node*, %struct.tree_node**) - -declare %struct.tree_node* @get_initialized_tmp_var(%struct.tree_node*, %struct.tree_node**, %struct.tree_node**) - -declare %struct.tree_node* @get_formal_tmp_var(%struct.tree_node*, %struct.tree_node**) - -declare fastcc void @gimplify_init_ctor_preeval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.gimplify_init_ctor_preeval_data*) - -declare i8 @type_contains_placeholder_p(%struct.tree_node*) zeroext - -declare i8 @is_gimple_mem_rhs(%struct.tree_node*) zeroext - -declare fastcc i32 @gimplify_modify_expr_rhs(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext ) - -declare %struct.tree_node* @fold_indirect_ref(%struct.tree_node*) - -declare fastcc i32 @gimplify_compound_expr(%struct.tree_node**, %struct.tree_node**, i8 zeroext ) - -declare i8 @is_gimple_lvalue(%struct.tree_node*) zeroext - -declare void @categorize_ctor_elements(%struct.tree_node*, i64*, i64*, i64*, i8*) - -declare void @lhd_set_decl_assembler_name(%struct.tree_node*) - -declare i64 @int_size_in_bytes(%struct.tree_node*) - -declare i32 @can_move_by_pieces(i64, i32) - -declare i64 @count_type_elements(%struct.tree_node*) - -declare void @gimplify_stmt(%struct.tree_node**) - -declare %struct.tree_node* @get_base_address(%struct.tree_node*) - -declare fastcc void @gimplify_init_ctor_eval(%struct.tree_node*, %struct.tree_node*, %struct.tree_node**, i8 zeroext ) - -declare %struct.tree_node* @build_complex(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare i8 (%struct.tree_node*) zeroext * @rhs_predicate_for(%struct.tree_node*) - -declare %struct.tree_node* @build_vector(%struct.tree_node*, %struct.tree_node*) - -declare i8 @is_gimple_val(%struct.tree_node*) zeroext - -declare i8 @is_gimple_reg_type(%struct.tree_node*) zeroext - -declare fastcc i32 @gimplify_cond_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, %struct.tree_node*, i32) - -declare fastcc i32 @gimplify_modify_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext ) - -declare %struct.tree_node* @tree_cons_stat(%struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @build_fold_addr_expr(%struct.tree_node*) - -declare %struct.tree_node* @build_function_call_expr(%struct.tree_node*, %struct.tree_node*) - -declare i8 @is_gimple_addressable(%struct.tree_node*) zeroext - -declare i8 @is_gimple_reg(%struct.tree_node*) zeroext - -declare %struct.tree_node* @make_ssa_name(%struct.tree_node*, %struct.tree_node*) - -declare i8 @tree_ssa_useless_type_conversion(%struct.tree_node*) zeroext - -declare fastcc i32 @gimplify_self_mod_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i8 zeroext ) - -declare fastcc i32 @gimplify_compound_lval(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**, i32) - -declare %struct.tree_node* @get_callee_fndecl(%struct.tree_node*) - -declare %struct.tree_node* @fold_builtin(%struct.tree_node*, i8 zeroext ) - -declare void @error(i8*, ...) - -declare %struct.tree_node* @build_empty_stmt() - -declare i8 @fold_builtin_next_arg(%struct.tree_node*) zeroext - -declare fastcc i32 @gimplify_arg(%struct.tree_node**, %struct.tree_node**) - -declare i8 @is_gimple_call_addr(%struct.tree_node*) zeroext - -declare i32 @call_expr_flags(%struct.tree_node*) - -declare void @recalculate_side_effects(%struct.tree_node*) - -declare %struct.tree_node* @fold_convert(%struct.tree_node*, %struct.tree_node*) - -declare void @recompute_tree_invarant_for_addr_expr(%struct.tree_node*) - -declare i32 @gimplify_va_arg_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) - -declare %struct.tree_node* @size_int_kind(i64, i32) - -declare %struct.tree_node* @size_binop(i32, %struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @build4_stat(i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*) - -declare void @gimplify_type_sizes(%struct.tree_node*, %struct.tree_node**) - -declare void @gimplify_one_sizepos(%struct.tree_node**, %struct.tree_node**) - -declare %struct.tree_node* @build_pointer_type(%struct.tree_node*) - -declare %struct.tree_node* @build_fold_indirect_ref(%struct.tree_node*) - -declare fastcc i32 @gimplify_bind_expr(%struct.tree_node**, %struct.tree_node*, %struct.tree_node**) - -declare fastcc void @gimplify_loop_expr(%struct.tree_node**, %struct.tree_node**) - -declare fastcc i32 @gimplify_switch_expr(%struct.tree_node**, %struct.tree_node**) - -declare %struct.tree_node* @decl_function_context(%struct.tree_node*) - -declare %struct.varray_head_tag* @varray_grow(%struct.varray_head_tag*, i32) - -declare fastcc void @gimplify_return_expr(%struct.tree_node*, %struct.tree_node**) - -declare fastcc i32 @gimplify_save_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) - -declare fastcc i32 @gimplify_asm_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) - -declare void @gimplify_to_stmt_list(%struct.tree_node**) - -declare fastcc i32 @gimplify_cleanup_point_expr(%struct.tree_node**, %struct.tree_node**) - -declare fastcc i32 @gimplify_target_expr(%struct.tree_node**, %struct.tree_node**, %struct.tree_node**) - -declare void @tsi_delink(%struct.tree_stmt_iterator*) - -declare void @tsi_link_before(%struct.tree_stmt_iterator*, %struct.tree_node*, i32) - -declare i8 @is_gimple_stmt(%struct.tree_node*) zeroext - -declare void @print_generic_expr(%struct.FILE*, %struct.tree_node*, i32) - -declare void @debug_tree(%struct.tree_node*) - -declare void @internal_error(i8*, ...) - -declare %struct.tree_node* @force_gimple_operand(%struct.tree_node*, %struct.tree_node**, i8 zeroext , %struct.tree_node*) - -declare i8 @is_gimple_reg_rhs(%struct.tree_node*) zeroext - -declare void @add_referenced_tmp_var(%struct.tree_node*) - -declare i8 @contains_placeholder_p(%struct.tree_node*) zeroext - -declare %struct.varray_head_tag* @varray_init(i32, i32, i8*) - -declare i32 @handled_component_p(%struct.tree_node*) - -declare void @varray_check_failed(%struct.varray_head_tag*, i32, i8*, i32, i8*) - -declare %struct.tree_node* @array_ref_low_bound(%struct.tree_node*) - -declare i8 @is_gimple_min_invariant(%struct.tree_node*) zeroext - -declare i8 @is_gimple_formal_tmp_reg(%struct.tree_node*) zeroext - -declare %struct.tree_node* @array_ref_element_size(%struct.tree_node*) - -declare %struct.tree_node* @component_ref_field_offset(%struct.tree_node*) - -declare i8 @is_gimple_min_lval(%struct.tree_node*) zeroext - -declare void @varray_underflow(%struct.varray_head_tag*, i8*, i32, i8*) - -declare i32 @list_length(%struct.tree_node*) - -declare i8 @parse_output_constraint(i8**, i32, i32, i32, i8*, i8*, i8*) zeroext - -declare i8* @xstrdup(i8*) - -declare %struct.tree_node* @build_string(i32, i8*) - -declare i8* @strchr(i8*, i32) - -declare %struct.tree_node* @build_tree_list_stat(%struct.tree_node*, %struct.tree_node*) - -declare %struct.tree_node* @chainon(%struct.tree_node*, %struct.tree_node*) - -declare i8 @parse_input_constraint(i8**, i32, i32, i32, i32, i8**, i8*, i8*) zeroext - -declare i8 @is_gimple_asm_val(%struct.tree_node*) zeroext - -declare void @gimplify_body(%struct.tree_node**, %struct.tree_node*, i8 zeroext ) - -declare void @timevar_push_1(i32) - -declare %struct.tree_node* @gimplify_parameters() - -declare %struct.tree_node* @expr_only(%struct.tree_node*) - -declare void @timevar_pop_1(i32) - -declare void @gimplify_function_tree(%struct.tree_node*) - -declare void @allocate_struct_function(%struct.tree_node*) - -declare %struct.tree_node* @make_tree_vec_stat(i32) - -declare %struct.tree_node* @tsi_split_statement_list_after(%struct.tree_stmt_iterator*) - -declare i8 @is_gimple_condexpr(%struct.tree_node*) zeroext - -declare %struct.tree_node* @invert_truthvalue(%struct.tree_node*) - -declare i8 @initializer_zerop(%struct.tree_node*) zeroext - -declare i32 @simple_cst_equal(%struct.tree_node*, %struct.tree_node*) - -declare i32 @aggregate_value_p(%struct.tree_node*, %struct.tree_node*) - -declare i32 @fwrite(i8*, i32, i32, %struct.FILE*) diff --git a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll index c73b6793da0ff..25ac52e5ec77f 100644 --- a/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll +++ b/test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll @@ -2,7 +2,7 @@ %struct.Connection = type { i32, [10 x i8], i32 } %struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 } - %struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) signext *, i16 (%struct.Point*) signext *, double (%struct.Point*)*, double (%struct.Point*)* } + %struct.Point = type { i8*, %struct.cppobjtype, i16 (%struct.Point*) *, i16 (%struct.Point*) *, double (%struct.Point*)*, double (%struct.Point*)* } %struct.RefPoint = type { %struct.Point*, %struct.cppobjtype } %struct.ShortArray = type { %struct.cppobjtype, i32, i16* } %struct.TestObj = type { i8*, %struct.cppobjtype, i8, [32 x i8], i8*, i8**, i16, i16, i32, i32, i32, i32, float, double, %struct.cppobjtype, i32, i16*, i16**, i8**, i32, %struct.XyPoint, [3 x %struct.Connection], %struct.Point*, %struct.XyPoint*, i32, i8*, i8*, i16*, %struct.ShortArray, %struct.IntChunk, %struct.cppobjtype, %struct.cppobjtype, %struct.RefPoint, i32, %struct.cppobjtype, %struct.cppobjtype } diff --git a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll b/test/CodeGen/ARM/2007-05-07-jumptoentry.ll deleted file mode 100644 index 26864f18a69c0..0000000000000 --- a/test/CodeGen/ARM/2007-05-07-jumptoentry.ll +++ /dev/null @@ -1,58 +0,0 @@ -; RUN: llc < %s | not grep 1_0 -; This used to create an extra branch to 'entry', LBB1_0. - -; ModuleID = 'bug.bc' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" -target triple = "arm-apple-darwin8" - %struct.HexxagonMove = type { i8, i8, i32 } - %struct.HexxagonMoveList = type { i32, %struct.HexxagonMove* } - -define void @_ZN16HexxagonMoveList8sortListEv(%struct.HexxagonMoveList* %this) { -entry: - %tmp51 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp2 = getelementptr %struct.HexxagonMoveList* %this, i32 0, i32 1 ; <%struct.HexxagonMove**> [#uses=2] - br label %bb49 - -bb1: ; preds = %bb49 - %tmp3 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=5] - %tmp6 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 2 ; <i32*> [#uses=1] - %tmp7 = load i32* %tmp6 ; <i32> [#uses=2] - %tmp12 = add i32 %i.1, 1 ; <i32> [#uses=7] - %tmp14 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 2 ; <i32*> [#uses=1] - %tmp15 = load i32* %tmp14 ; <i32> [#uses=1] - %tmp16 = icmp slt i32 %tmp7, %tmp15 ; <i1> [#uses=1] - br i1 %tmp16, label %cond_true, label %bb49 - -cond_true: ; preds = %bb1 - %tmp23.0 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 0 ; <i8*> [#uses=2] - %tmp67 = load i8* %tmp23.0 ; <i8> [#uses=1] - %tmp23.1 = getelementptr %struct.HexxagonMove* %tmp3, i32 %i.1, i32 1 ; <i8*> [#uses=1] - %tmp68 = load i8* %tmp23.1 ; <i8> [#uses=1] - %tmp3638 = getelementptr %struct.HexxagonMove* %tmp3, i32 %tmp12, i32 0 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32( i8* %tmp23.0, i8* %tmp3638, i32 8, i32 4 ) - %tmp41 = load %struct.HexxagonMove** %tmp2 ; <%struct.HexxagonMove*> [#uses=3] - %tmp44.0 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 0 ; <i8*> [#uses=1] - store i8 %tmp67, i8* %tmp44.0 - %tmp44.1 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 1 ; <i8*> [#uses=1] - store i8 %tmp68, i8* %tmp44.1 - %tmp44.2 = getelementptr %struct.HexxagonMove* %tmp41, i32 %tmp12, i32 2 ; <i32*> [#uses=1] - store i32 %tmp7, i32* %tmp44.2 - br label %bb49 - -bb49: ; preds = %bb59, %cond_true, %bb1, %entry - %i.1 = phi i32 [ 0, %entry ], [ %tmp12, %bb1 ], [ %tmp12, %cond_true ], [ 0, %bb59 ] ; <i32> [#uses=5] - %move.2 = phi i32 [ 0, %entry ], [ 1, %cond_true ], [ %move.2, %bb1 ], [ 0, %bb59 ] ; <i32> [#uses=2] - %tmp52 = load i32* %tmp51 ; <i32> [#uses=1] - %tmp53 = add i32 %tmp52, -1 ; <i32> [#uses=1] - %tmp55 = icmp sgt i32 %tmp53, %i.1 ; <i1> [#uses=1] - br i1 %tmp55, label %bb1, label %bb59 - -bb59: ; preds = %bb49 - %tmp61 = icmp eq i32 %move.2, 0 ; <i1> [#uses=1] - br i1 %tmp61, label %return, label %bb49 - -return: ; preds = %bb59 - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll index 52937c1dd9fce..55cea3aad13f6 100644 --- a/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll +++ b/test/CodeGen/ARM/2007-05-07-tailmerge-1.ll @@ -12,7 +12,6 @@ entry: %i_addr = alloca i32 ; <i32*> [#uses=2] %q_addr = alloca i32 ; <i32*> [#uses=2] %retval = alloca i32, align 4 ; <i32*> [#uses=1] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr %tmp = load i32* %i_addr ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll index c925fa83ef36e..48941162c81c2 100644 --- a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll +++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll @@ -12,7 +12,6 @@ entry: %i_addr = alloca i32 ; <i32*> [#uses=2] %q_addr = alloca i32 ; <i32*> [#uses=2] %retval = alloca i32, align 4 ; <i32*> [#uses=1] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr %tmp = load i32* %i_addr ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll index 9df5af59a79fa..acbab8a0a0710 100644 --- a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll +++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll @@ -14,7 +14,6 @@ entry: %i_addr = alloca i32 ; <i32*> [#uses=2] %q_addr = alloca i32 ; <i32*> [#uses=2] %retval = alloca i32, align 4 ; <i32*> [#uses=1] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr %tmp = load i32* %i_addr ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll b/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll deleted file mode 100644 index 7ba2a190be734..0000000000000 --- a/test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll +++ /dev/null @@ -1,237 +0,0 @@ -; RUN: llc < %s -; PR1424 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "arm-unknown-linux-gnueabi" - %struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* } - %struct.AVCodec = type { i8*, i32, i32, i32, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32, i8*)*, i32 (%struct.AVCodecContext*)*, i32 (%struct.AVCodecContext*, i8*, i32*, i8*, i32)*, i32, %struct.AVCodec*, void (%struct.AVCodecContext*)*, %struct.AVRational*, i32* } - %struct.AVCodecContext = type { %struct.AVClass*, i32, i32, i32, i32, i32, i8*, i32, %struct.AVRational, i32, i32, i32, i32, i32, void (%struct.AVCodecContext*, %struct.AVFrame*, i32*, i32, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, float, float, i32, i32, i32, i32, float, i32, i32, i32, %struct.AVCodec*, i8*, i32, i32, void (%struct.AVCodecContext*, i8*, i32, i32)*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, [32 x i8], i32, i32, i32, i32, i32, i32, i32, float, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, void (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i8*, i8*, float, float, i32, %struct.RcOverride*, i32, i8*, i32, i32, i32, float, float, float, float, i32, float, float, float, float, float, i32, i32, i32, i32*, i32, i32, i32, i32, %struct.AVRational, %struct.AVFrame*, i32, i32, [4 x i64], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32*)*, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i16*, i16*, i32, i32, i32, i32, %struct.AVPaletteControl*, i32, i32 (%struct.AVCodecContext*, %struct.AVFrame*)*, i32, i32, i32, i32, i32, i32, i32, i32 (%struct.AVCodecContext*, i32 (%struct.AVCodecContext*, i8*)*, i8**, i32*, i32)*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64 } - %struct.AVEvalExpr = type opaque - %struct.AVFrame = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*] } - %struct.AVOption = type opaque - %struct.AVPaletteControl = type { i32, [256 x i32] } - %struct.AVPanScan = type { i32, i32, i32, [3 x [2 x i16]] } - %struct.AVRational = type { i32, i32 } - %struct.BlockNode = type { i16, i16, i8, [3 x i8], i8, i8 } - %struct.DSPContext = type { void (i16*, i8*, i32)*, void (i16*, i8*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i16*, i8*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, i32 (i16*)*, void (i8*, i8*, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, void (i16*)*, i32 (i8*, i32)*, i32 (i8*, i32)*, [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], [5 x i32 (i8*, i8*, i8*, i32, i32)*], i32 (i8*, i16*, i32)*, [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [4 x [4 x void (i8*, i8*, i32, i32)*]], [2 x void (i8*, i8*, i8*, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [11 x void (i8*, i8*, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], [8 x void (i8*, i8*, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [3 x void (i8*, i8*, i32, i32, i32, i32)*], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [4 x [16 x void (i8*, i8*, i32)*]], [10 x void (i8*, i32, i32, i32, i32)*], [10 x void (i8*, i8*, i32, i32, i32, i32, i32)*], [2 x [16 x void (i8*, i8*, i32)*]], [2 x [16 x void (i8*, i8*, i32)*]], void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i32, i32, i32, i32, i32, i32)*, void (i8*, i16*, i32)*, [2 x [4 x i32 (i8*, i8*, i8*, i32, i32)*]], void (i8*, i8*, i32)*, void (i8*, i8*, i8*, i32)*, void (i8*, i8*, i8*, i32, i32*, i32*)*, void (i32*, i32*, i32)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32, i8*)*, void (i8*, i32, i32, i32)*, void (i8*, i32, i32, i32)*, void ([4 x [4 x i16]]*, i8*, [40 x i8]*, [40 x [2 x i16]]*, i32, i32, i32, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32, i32)*, void (i8*, i32)*, void (float*, float*, i32)*, void (float*, float*, i32)*, void (float*, float*, float*, i32)*, void (float*, float*, float*, float*, i32, i32, i32)*, void (i16*, float*, i32)*, void (i16*)*, void (i16*)*, void (i16*)*, void (i8*, i32, i16*)*, void (i8*, i32, i16*)*, [64 x i8], i32, i32 (i16*, i16*, i16*, i32)*, void (i16*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void (i8*, i16*, i32)*, void ([4 x i16]*)*, void (i32*, i32*, i32*, i32*, i32*, i32*, i32)*, void (i32*, i32)*, void (i8*, i32, i8**, i32, i32, i32, i32, i32, %struct.slice_buffer*, i32, i8*)*, void (i8*, i32, i32)*, [4 x void (i8*, i32, i8*, i32, i32, i32)*], void (i16*)*, void (i16*, i32)*, void (i16*, i32)*, void (i16*, i32)*, void (i8*, i32)*, void (i8*, i32)*, [16 x void (i8*, i8*, i32, i32)*] } - %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } - %struct.GetBitContext = type { i8*, i8*, i32*, i32, i32, i32, i32 } - %struct.MJpegContext = type opaque - %struct.MotionEstContext = type { %struct.AVCodecContext*, i32, [4 x [2 x i32]], [4 x [2 x i32]], i8*, i8*, [2 x i8*], i8*, i32, i32*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x [4 x i8*]], [4 x [4 x i8*]], i32, i32, i32, i32, i32, [4 x void (i8*, i8*, i32, i32)*]*, [4 x void (i8*, i8*, i32, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [16 x void (i8*, i8*, i32)*]*, [4097 x i8]*, i8*, i32 (%struct.MpegEncContext*, i32*, i32*, i32, i32, i32, i32, i32)* } - %struct.MpegEncContext = type { %struct.AVCodecContext*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Picture*, %struct.Picture**, %struct.Picture**, i32, i32, [8 x %struct.MpegEncContext*], %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture, %struct.Picture*, %struct.Picture*, %struct.Picture*, [3 x i8*], [3 x i32], i16*, [3 x i16*], [20 x i16], i32, i32, i8*, i8*, i8*, i8*, i8*, [16 x i16]*, [3 x [16 x i16]*], i32, i8*, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, [5 x i32], i32, i32, i32, i32, %struct.DSPContext, i32, i32, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x i16]*, [2 x [2 x [2 x i16]*]], [2 x [2 x [2 x [2 x i16]*]]], [2 x i8*], [2 x [2 x i8*]], i32, i32, i32, [2 x [4 x [2 x i32]]], [2 x [2 x i32]], [2 x [2 x [2 x i32]]], i8*, [2 x [64 x i16]], %struct.MotionEstContext, i32, i32, i32, i32, i32, i32, i16*, [6 x i32], [6 x i32], [3 x i8*], i32*, [64 x i16], [64 x i16], [64 x i16], [64 x i16], i32, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, [8 x i32], [64 x i32]*, [64 x i32]*, [2 x [64 x i16]]*, [2 x [64 x i16]]*, [12 x i32], %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, %struct.ScanTable, [64 x i32]*, [2 x i32], [64 x i16]*, i8*, i64, i64, i32, i32, %struct.RateControlContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, %struct.GetBitContext, i32, i32, i32, %struct.ParseContext, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [2 x i32]], [2 x [2 x i32]], [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.PutBitContext, %struct.PutBitContext, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, [3 x i32], %struct.MJpegContext*, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x [65 x [65 x [2 x i32]]]]*, i32, i32, %struct.GetBitContext, i32, i32, i32, i8*, i32, [2 x [2 x i32]], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i8*, i32, [12 x i16*], [64 x i16]*, [8 x [64 x i16]]*, i32 (%struct.MpegEncContext*, [64 x i16]*)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, void (%struct.MpegEncContext*, i16*, i32, i32)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, i32 (%struct.MpegEncContext*, i16*, i32, i32, i32*)*, void (%struct.MpegEncContext*, i16*)* } - %struct.ParseContext = type { i8*, i32, i32, i32, i32, i32, i32, i32 } - %struct.Picture = type { [4 x i8*], [4 x i32], [4 x i8*], i32, i32, i64, i32, i32, i32, i32, i32, i8*, i32, i8*, [2 x [2 x i16]*], i32*, i8, i8*, [4 x i64], i32, i32, i32, i32, i32, %struct.AVPanScan*, i32, i32, i16*, [2 x i8*], [3 x i8*], [2 x [2 x i16]*], i32*, [2 x i32], i32, i32, i32, i32, [2 x [16 x i32]], [2 x i32], i32, i32, i16*, i16*, i8*, i32*, i32 } - %struct.Plane = type { i32, i32, [8 x [4 x %struct.SubBand]] } - %struct.Predictor = type { double, double, double } - %struct.PutBitContext = type { i32, i32, i8*, i8*, i8* } - %struct.RangeCoder = type { i32, i32, i32, i32, [256 x i8], [256 x i8], i8*, i8*, i8* } - %struct.RateControlContext = type { %struct.FILE*, i32, %struct.RateControlEntry*, double, [5 x %struct.Predictor], double, double, double, double, double, [5 x double], i32, i32, [5 x i64], [5 x i64], [5 x i64], [5 x i64], [5 x i32], i32, i8*, float, i32, %struct.AVEvalExpr* } - %struct.RateControlEntry = type { i32, float, i32, i32, i32, i32, i32, i64, i32, float, i32, i32, i32, i32, i32, i32 } - %struct.RcOverride = type { i32, i32, i32, float } - %struct.ScanTable = type { i8*, [64 x i8], [64 x i8] } - %struct.SnowContext = type { %struct.AVCodecContext*, %struct.RangeCoder, %struct.DSPContext, %struct.AVFrame, %struct.AVFrame, %struct.AVFrame, [8 x %struct.AVFrame], %struct.AVFrame, [32 x i8], [4224 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [8 x [2 x i16]*], [8 x i32*], i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %struct.Plane], %struct.BlockNode*, [1024 x i32], i32, %struct.slice_buffer, %struct.MpegEncContext } - %struct.SubBand = type { i32, i32, i32, i32, i32, i32*, i32, i32, i32, %struct.x_and_coeff*, %struct.SubBand*, [519 x [32 x i8]] } - %struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 } - %struct.slice_buffer = type { i32**, i32**, i32, i32, i32, i32, i32* } - %struct.x_and_coeff = type { i16, i16 } - -define fastcc void @iterative_me(%struct.SnowContext* %s) { -entry: - %state = alloca [4224 x i8], align 8 ; <[4224 x i8]*> [#uses=0] - %best_rd4233 = alloca i32, align 4 ; <i32*> [#uses=0] - %tmp21 = getelementptr %struct.SnowContext* %s, i32 0, i32 36 ; <i32*> [#uses=2] - br label %bb4198 - -bb79: ; preds = %bb4189.preheader - br i1 false, label %cond_next239, label %cond_true - -cond_true: ; preds = %bb79 - ret void - -cond_next239: ; preds = %bb79 - %tmp286 = alloca i8, i32 0 ; <i8*> [#uses=0] - ret void - -bb4198: ; preds = %bb4189.preheader, %entry - br i1 false, label %bb4189.preheader, label %bb4204 - -bb4189.preheader: ; preds = %bb4198 - br i1 false, label %bb79, label %bb4198 - -bb4204: ; preds = %bb4198 - br i1 false, label %bb4221, label %cond_next4213 - -cond_next4213: ; preds = %bb4204 - ret void - -bb4221: ; preds = %bb4204 - br i1 false, label %bb5242.preheader, label %UnifiedReturnBlock - -bb5242.preheader: ; preds = %bb4221 - br label %bb5242 - -bb4231: ; preds = %bb5233 - %tmp4254.sum = add i32 0, 1 ; <i32> [#uses=2] - br i1 false, label %bb4559, label %cond_next4622 - -bb4559: ; preds = %bb4231 - ret void - -cond_next4622: ; preds = %bb4231 - %tmp4637 = load i16* null ; <i16> [#uses=1] - %tmp46374638 = sext i16 %tmp4637 to i32 ; <i32> [#uses=1] - %tmp4642 = load i16* null ; <i16> [#uses=1] - %tmp46424643 = sext i16 %tmp4642 to i32 ; <i32> [#uses=1] - %tmp4648 = load i16* null ; <i16> [#uses=1] - %tmp46484649 = sext i16 %tmp4648 to i32 ; <i32> [#uses=1] - %tmp4653 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 0 ; <i16*> [#uses=1] - %tmp4654 = load i16* %tmp4653 ; <i16> [#uses=1] - %tmp46544655 = sext i16 %tmp4654 to i32 ; <i32> [#uses=1] - %tmp4644 = add i32 %tmp46374638, 2 ; <i32> [#uses=1] - %tmp4650 = add i32 %tmp4644, %tmp46424643 ; <i32> [#uses=1] - %tmp4656 = add i32 %tmp4650, %tmp46484649 ; <i32> [#uses=1] - %tmp4657 = add i32 %tmp4656, %tmp46544655 ; <i32> [#uses=2] - %tmp4658 = ashr i32 %tmp4657, 2 ; <i32> [#uses=1] - %tmp4662 = load i16* null ; <i16> [#uses=1] - %tmp46624663 = sext i16 %tmp4662 to i32 ; <i32> [#uses=1] - %tmp4672 = getelementptr %struct.BlockNode* null, i32 0, i32 1 ; <i16*> [#uses=1] - %tmp4673 = load i16* %tmp4672 ; <i16> [#uses=1] - %tmp46734674 = sext i16 %tmp4673 to i32 ; <i32> [#uses=1] - %tmp4678 = getelementptr %struct.BlockNode* null, i32 %tmp4254.sum, i32 1 ; <i16*> [#uses=1] - %tmp4679 = load i16* %tmp4678 ; <i16> [#uses=1] - %tmp46794680 = sext i16 %tmp4679 to i32 ; <i32> [#uses=1] - %tmp4669 = add i32 %tmp46624663, 2 ; <i32> [#uses=1] - %tmp4675 = add i32 %tmp4669, 0 ; <i32> [#uses=1] - %tmp4681 = add i32 %tmp4675, %tmp46734674 ; <i32> [#uses=1] - %tmp4682 = add i32 %tmp4681, %tmp46794680 ; <i32> [#uses=2] - %tmp4683 = ashr i32 %tmp4682, 2 ; <i32> [#uses=1] - %tmp4703 = load i32* %tmp21 ; <i32> [#uses=1] - %tmp4707 = shl i32 %tmp4703, 0 ; <i32> [#uses=4] - %tmp4710 = load %struct.BlockNode** null ; <%struct.BlockNode*> [#uses=6] - %tmp4713 = mul i32 %tmp4707, %mb_y.4 ; <i32> [#uses=1] - %tmp4715 = add i32 %tmp4713, %mb_x.7 ; <i32> [#uses=7] - store i8 0, i8* null - store i8 0, i8* null - %tmp47594761 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=2] - call void @llvm.memcpy.i32( i8* null, i8* %tmp47594761, i32 10, i32 0 ) - %tmp4716.sum5775 = add i32 %tmp4715, 1 ; <i32> [#uses=1] - %tmp4764 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5775 ; <%struct.BlockNode*> [#uses=1] - %tmp47644766 = bitcast %struct.BlockNode* %tmp4764 to i8* ; <i8*> [#uses=1] - %tmp4716.sum5774 = add i32 %tmp4715, %tmp4707 ; <i32> [#uses=0] - %tmp47704772 = bitcast %struct.BlockNode* null to i8* ; <i8*> [#uses=1] - %tmp4774 = add i32 %tmp4707, 1 ; <i32> [#uses=1] - %tmp4716.sum5773 = add i32 %tmp4774, %tmp4715 ; <i32> [#uses=1] - %tmp4777 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4716.sum5773 ; <%struct.BlockNode*> [#uses=1] - %tmp47774779 = bitcast %struct.BlockNode* %tmp4777 to i8* ; <i8*> [#uses=1] - %tmp4781 = icmp slt i32 %mb_x.7, 0 ; <i1> [#uses=1] - %tmp4788 = or i1 %tmp4781, %tmp4784 ; <i1> [#uses=2] - br i1 %tmp4788, label %cond_true4791, label %cond_next4794 - -cond_true4791: ; preds = %cond_next4622 - unreachable - -cond_next4794: ; preds = %cond_next4622 - %tmp4797 = icmp slt i32 %mb_x.7, %tmp4707 ; <i1> [#uses=1] - br i1 %tmp4797, label %cond_next4803, label %cond_true4800 - -cond_true4800: ; preds = %cond_next4794 - unreachable - -cond_next4803: ; preds = %cond_next4794 - %tmp4825 = ashr i32 %tmp4657, 12 ; <i32> [#uses=1] - shl i32 %tmp4682, 4 ; <i32>:0 [#uses=1] - %tmp4828 = and i32 %0, -64 ; <i32> [#uses=1] - %tmp4831 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 2 ; <i8*> [#uses=0] - %tmp4826 = add i32 %tmp4828, %tmp4825 ; <i32> [#uses=1] - %tmp4829 = add i32 %tmp4826, 0 ; <i32> [#uses=1] - %tmp4835 = add i32 %tmp4829, 0 ; <i32> [#uses=1] - store i32 %tmp4835, i32* null - %tmp48534854 = trunc i32 %tmp4658 to i16 ; <i16> [#uses=1] - %tmp4856 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 0 ; <i16*> [#uses=1] - store i16 %tmp48534854, i16* %tmp4856 - %tmp48574858 = trunc i32 %tmp4683 to i16 ; <i16> [#uses=1] - %tmp4860 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 1 ; <i16*> [#uses=1] - store i16 %tmp48574858, i16* %tmp4860 - %tmp4866 = getelementptr %struct.BlockNode* %tmp4710, i32 %tmp4715, i32 4 ; <i8*> [#uses=0] - br i1 false, label %bb4933, label %cond_false4906 - -cond_false4906: ; preds = %cond_next4803 - call void @llvm.memcpy.i32( i8* %tmp47594761, i8* null, i32 10, i32 0 ) - call void @llvm.memcpy.i32( i8* %tmp47644766, i8* null, i32 10, i32 0 ) - call void @llvm.memcpy.i32( i8* %tmp47704772, i8* null, i32 10, i32 0 ) - call void @llvm.memcpy.i32( i8* %tmp47774779, i8* null, i32 10, i32 0 ) - br label %bb5215 - -bb4933: ; preds = %bb5215, %cond_next4803 - br i1 false, label %cond_true4944, label %bb5215 - -cond_true4944: ; preds = %bb4933 - %tmp4982 = load i32* %tmp21 ; <i32> [#uses=1] - %tmp4986 = shl i32 %tmp4982, 0 ; <i32> [#uses=2] - %tmp4992 = mul i32 %tmp4986, %mb_y.4 ; <i32> [#uses=1] - %tmp4994 = add i32 %tmp4992, %mb_x.7 ; <i32> [#uses=5] - %tmp4995.sum5765 = add i32 %tmp4994, 1 ; <i32> [#uses=1] - %tmp5043 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5765 ; <%struct.BlockNode*> [#uses=1] - %tmp50435045 = bitcast %struct.BlockNode* %tmp5043 to i8* ; <i8*> [#uses=2] - call void @llvm.memcpy.i32( i8* null, i8* %tmp50435045, i32 10, i32 0 ) - %tmp4995.sum5764 = add i32 %tmp4994, %tmp4986 ; <i32> [#uses=1] - %tmp5049 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5764 ; <%struct.BlockNode*> [#uses=1] - %tmp50495051 = bitcast %struct.BlockNode* %tmp5049 to i8* ; <i8*> [#uses=2] - call void @llvm.memcpy.i32( i8* null, i8* %tmp50495051, i32 10, i32 0 ) - %tmp4995.sum5763 = add i32 0, %tmp4994 ; <i32> [#uses=1] - %tmp5056 = getelementptr %struct.BlockNode* null, i32 %tmp4995.sum5763 ; <%struct.BlockNode*> [#uses=1] - %tmp50565058 = bitcast %struct.BlockNode* %tmp5056 to i8* ; <i8*> [#uses=1] - br i1 %tmp4788, label %cond_true5070, label %cond_next5073 - -cond_true5070: ; preds = %cond_true4944 - unreachable - -cond_next5073: ; preds = %cond_true4944 - %tmp5139 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 1 ; <i16*> [#uses=0] - %tmp5145 = getelementptr %struct.BlockNode* null, i32 %tmp4994, i32 4 ; <i8*> [#uses=0] - call void @llvm.memcpy.i32( i8* %tmp50435045, i8* null, i32 10, i32 0 ) - call void @llvm.memcpy.i32( i8* %tmp50495051, i8* null, i32 10, i32 0 ) - call void @llvm.memcpy.i32( i8* %tmp50565058, i8* null, i32 10, i32 0 ) - br label %bb5215 - -bb5215: ; preds = %cond_next5073, %bb4933, %cond_false4906 - %i4232.3 = phi i32 [ 0, %cond_false4906 ], [ 0, %cond_next5073 ], [ 0, %bb4933 ] ; <i32> [#uses=1] - %tmp5217 = icmp slt i32 %i4232.3, 4 ; <i1> [#uses=1] - br i1 %tmp5217, label %bb4933, label %bb5220 - -bb5220: ; preds = %bb5215 - br i1 false, label %bb5230, label %cond_true5226 - -cond_true5226: ; preds = %bb5220 - ret void - -bb5230: ; preds = %bb5220 - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] - br label %bb5233 - -bb5233: ; preds = %bb5233.preheader, %bb5230 - %indvar = phi i32 [ 0, %bb5233.preheader ], [ %indvar.next, %bb5230 ] ; <i32> [#uses=2] - %mb_x.7 = shl i32 %indvar, 1 ; <i32> [#uses=4] - br i1 false, label %bb4231, label %bb5239 - -bb5239: ; preds = %bb5233 - %indvar.next37882 = add i32 %indvar37881, 1 ; <i32> [#uses=1] - br label %bb5242 - -bb5242: ; preds = %bb5239, %bb5242.preheader - %indvar37881 = phi i32 [ 0, %bb5242.preheader ], [ %indvar.next37882, %bb5239 ] ; <i32> [#uses=2] - %mb_y.4 = shl i32 %indvar37881, 1 ; <i32> [#uses=3] - br i1 false, label %bb5233.preheader, label %bb5248 - -bb5233.preheader: ; preds = %bb5242 - %tmp4784 = icmp slt i32 %mb_y.4, 0 ; <i1> [#uses=1] - br label %bb5233 - -bb5248: ; preds = %bb5242 - ret void - -UnifiedReturnBlock: ; preds = %bb4221 - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll index 234c7b69e3e7b..6b39a76d0d19c 100644 --- a/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll +++ b/test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll @@ -46,7 +46,8 @@ bb17.i: ; preds = %cond_next119.i cond_true53.i: ; preds = %bb17.i ret { i16, %struct.rnode* }* null cond_false99.i: ; preds = %bb17.i - %tmp106.i = malloc %struct.ch_set ; <%struct.ch_set*> [#uses=1] + %malloccall = tail call i8* @malloc(i32 trunc (i64 mul nuw (i64 ptrtoint (i1** getelementptr (i1** null, i32 1) to i64), i64 2) to i32)) + %tmp106.i = bitcast i8* %malloccall to %struct.ch_set* br i1 false, label %bb126.i, label %cond_next119.i cond_next119.i: ; preds = %cond_false99.i, %bb42 %curr_ptr.0.reg2mem.0.i = phi %struct.ch_set* [ %tmp106.i, %cond_false99.i ], [ null, %bb42 ] ; <%struct.ch_set*> [#uses=2] @@ -58,3 +59,5 @@ bb126.i: ; preds = %cond_next119.i, %cond_false99.i bb78: ; preds = %entry ret { i16, %struct.rnode* }* null } + +declare noalias i8* @malloc(i32) diff --git a/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll index 77418be380843..c9a8a67ac5f9b 100644 --- a/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll +++ b/test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll @@ -188,11 +188,6 @@ bb231: ; preds = %bb226 ret void } - %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] } - %struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] } - %struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, [4 x i32] } - %struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } - define fastcc void @outer_loop2(%struct.lame_global_flags* %gfp, double* %xr, i32 %targ_bits, double* %best_noise, %struct.III_psy_xmin* %l3_xmin, i32* %l3_enc, %struct.III_scalefac_t* %scalefac, %struct.gr_info* %cod_info, i32 %ch) { entry: %cod_info.20128.1 = getelementptr %struct.gr_info* %cod_info, i32 0, i32 20, i32 1 ; <i32*> [#uses=1] diff --git a/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll b/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll deleted file mode 100644 index 5f9d9aea58dd1..0000000000000 --- a/test/CodeGen/ARM/2008-09-14-CoalescerBug.ll +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin - -@"\01LC1" = external constant [288 x i8] ; <[288 x i8]*> [#uses=1] - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind - -define i32 @main(i32 %argc, i8** %argv) nounwind { -entry: - br label %bb.i - -bb.i: ; preds = %bb.i, %entry - %i.01.i = phi i32 [ 0, %entry ], [ %indvar.next52, %bb.i ] ; <i32> [#uses=1] - %indvar.next52 = add i32 %i.01.i, 1 ; <i32> [#uses=2] - %exitcond53 = icmp eq i32 %indvar.next52, 15 ; <i1> [#uses=1] - br i1 %exitcond53, label %bb.i33.loopexit, label %bb.i - -bb.i33.loopexit: ; preds = %bb.i - %0 = malloc [347 x i8] ; <[347 x i8]*> [#uses=2] - %.sub = getelementptr [347 x i8]* %0, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %.sub, i8* getelementptr ([288 x i8]* @"\01LC1", i32 0, i32 0), i32 287, i32 1 ) nounwind - br label %bb.i28 - -bb.i28: ; preds = %bb.i28, %bb.i33.loopexit - br i1 false, label %repeat_fasta.exit, label %bb.i28 - -repeat_fasta.exit: ; preds = %bb.i28 - free [347 x i8]* %0 - unreachable -} diff --git a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll index 0ec17ae23d694..377bbd211752f 100644 --- a/test/CodeGen/ARM/2009-03-07-SpillerBug.ll +++ b/test/CodeGen/ARM/2009-03-07-SpillerBug.ll @@ -1,16 +1,15 @@ ; RUN: llc < %s -mtriple=armv6-apple-darwin9 -mattr=+vfp2 ; rdar://6653182 - %struct.ggBRDF = type { i32 (...)** } - %struct.ggPoint2 = type { [2 x double] } - %struct.ggPoint3 = type { [3 x double] } - %struct.ggSpectrum = type { [8 x float] } - %struct.ggSphere = type { %struct.ggPoint3, double } - %struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum } - %struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire } - %struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere } -declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind +%struct.ggBRDF = type { i32 (...)** } +%struct.ggPoint2 = type { [2 x double] } +%struct.ggPoint3 = type { [3 x double] } +%struct.ggSpectrum = type { [8 x float] } +%struct.ggSphere = type { %struct.ggPoint3, double } +%struct.mrDiffuseAreaSphereLuminaire = type { %struct.mrSphere, %struct.ggSpectrum } +%struct.mrDiffuseCosineSphereLuminaire = type { %struct.mrDiffuseAreaSphereLuminaire } +%struct.mrSphere = type { %struct.ggBRDF, %struct.ggSphere } declare double @llvm.sqrt.f64(double) nounwind readonly @@ -20,59 +19,61 @@ declare double @acos(double) nounwind readonly define i32 @_ZNK34mrDiffuseSolidAngleSphereLuminaire18selectVisiblePointERK8ggPoint3RK9ggVector3RK8ggPoint2dRS0_Rd(%struct.mrDiffuseCosineSphereLuminaire* nocapture %this, %struct.ggPoint3* nocapture %x, %struct.ggPoint3* nocapture %unnamed_arg, %struct.ggPoint2* nocapture %uv, double %unnamed_arg2, %struct.ggPoint3* nocapture %on_light, double* nocapture %invProb) nounwind { entry: - %0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; <double> [#uses=4] - %1 = fcmp ult double 0.000000e+00, %0 ; <i1> [#uses=1] - br i1 %1, label %bb3, label %bb7 + %0 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind + %1 = fcmp ult double 0.000000e+00, %0 + br i1 %1, label %bb3, label %bb7 -bb3: ; preds = %entry - %2 = fdiv double 1.000000e+00, 0.000000e+00 ; <double> [#uses=1] - %3 = fmul double 0.000000e+00, %2 ; <double> [#uses=2] - %4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind ; <double> [#uses=1] - %5 = fdiv double 1.000000e+00, %4 ; <double> [#uses=2] - %6 = fmul double %3, %5 ; <double> [#uses=2] - %7 = fmul double 0.000000e+00, %5 ; <double> [#uses=2] - %8 = fmul double %3, %7 ; <double> [#uses=1] - %9 = fsub double %8, 0.000000e+00 ; <double> [#uses=1] - %10 = fmul double 0.000000e+00, %6 ; <double> [#uses=1] - %11 = fsub double 0.000000e+00, %10 ; <double> [#uses=1] - %12 = fsub double -0.000000e+00, %11 ; <double> [#uses=1] - %13 = fmul double %0, %0 ; <double> [#uses=2] - %14 = fsub double %13, 0.000000e+00 ; <double> [#uses=1] - %15 = call double @llvm.sqrt.f64(double %14) ; <double> [#uses=1] - %16 = fmul double 0.000000e+00, %15 ; <double> [#uses=1] - %17 = fdiv double %16, %0 ; <double> [#uses=1] - %18 = fadd double 0.000000e+00, %17 ; <double> [#uses=1] - %19 = call double @acos(double %18) nounwind readonly ; <double> [#uses=1] - %20 = load double* null, align 4 ; <double> [#uses=1] - %21 = fmul double %20, 0x401921FB54442D18 ; <double> [#uses=1] - %22 = call double @sin(double %19) nounwind readonly ; <double> [#uses=2] - %23 = fmul double %22, 0.000000e+00 ; <double> [#uses=2] - %24 = fmul double %6, %23 ; <double> [#uses=1] - %25 = fmul double %7, %23 ; <double> [#uses=1] - %26 = call double @sin(double %21) nounwind readonly ; <double> [#uses=1] - %27 = fmul double %22, %26 ; <double> [#uses=2] - %28 = fmul double %9, %27 ; <double> [#uses=1] - %29 = fmul double %27, %12 ; <double> [#uses=1] - %30 = fadd double %24, %28 ; <double> [#uses=1] - %31 = fadd double 0.000000e+00, %29 ; <double> [#uses=1] - %32 = fadd double %25, 0.000000e+00 ; <double> [#uses=1] - %33 = fadd double %30, 0.000000e+00 ; <double> [#uses=1] - %34 = fadd double %31, 0.000000e+00 ; <double> [#uses=1] - %35 = fadd double %32, 0.000000e+00 ; <double> [#uses=1] - %36 = bitcast %struct.ggPoint3* %x to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32(i8* null, i8* %36, i32 24, i32 4) nounwind - store double %33, double* null, align 8 - br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i +bb3: ; preds = %entry + %2 = fdiv double 1.000000e+00, 0.000000e+00 + %3 = fmul double 0.000000e+00, %2 + %4 = call double @llvm.sqrt.f64(double 0.000000e+00) nounwind + %5 = fdiv double 1.000000e+00, %4 + %6 = fmul double %3, %5 + %7 = fmul double 0.000000e+00, %5 + %8 = fmul double %3, %7 + %9 = fsub double %8, 0.000000e+00 + %10 = fmul double 0.000000e+00, %6 + %11 = fsub double 0.000000e+00, %10 + %12 = fsub double -0.000000e+00, %11 + %13 = fmul double %0, %0 + %14 = fsub double %13, 0.000000e+00 + %15 = call double @llvm.sqrt.f64(double %14) + %16 = fmul double 0.000000e+00, %15 + %17 = fdiv double %16, %0 + %18 = fadd double 0.000000e+00, %17 + %19 = call double @acos(double %18) nounwind readonly + %20 = load double* null, align 4 + %21 = fmul double %20, 0x401921FB54442D18 + %22 = call double @sin(double %19) nounwind readonly + %23 = fmul double %22, 0.000000e+00 + %24 = fmul double %6, %23 + %25 = fmul double %7, %23 + %26 = call double @sin(double %21) nounwind readonly + %27 = fmul double %22, %26 + %28 = fmul double %9, %27 + %29 = fmul double %27, %12 + %30 = fadd double %24, %28 + %31 = fadd double 0.000000e+00, %29 + %32 = fadd double %25, 0.000000e+00 + %33 = fadd double %30, 0.000000e+00 + %34 = fadd double %31, 0.000000e+00 + %35 = fadd double %32, 0.000000e+00 + %36 = bitcast %struct.ggPoint3* %x to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* null, i8* %36, i32 24, i32 4, i1 false) + store double %33, double* null, align 8 + br i1 false, label %_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit, label %bb5.i.i.i -bb5.i.i.i: ; preds = %bb3 - unreachable +bb5.i.i.i: ; preds = %bb3 + unreachable -_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit: ; preds = %bb3 - %37 = fsub double %13, 0.000000e+00 ; <double> [#uses=0] - %38 = fsub double -0.000000e+00, %34 ; <double> [#uses=0] - %39 = fsub double -0.000000e+00, %35 ; <double> [#uses=0] - ret i32 1 +_Z20ggRaySphereIntersectRK6ggRay3RK8ggSphereddRd.exit: ; preds = %bb3 + %37 = fsub double %13, 0.000000e+00 + %38 = fsub double -0.000000e+00, %34 + %39 = fsub double -0.000000e+00, %35 + ret i32 1 -bb7: ; preds = %entry - ret i32 0 +bb7: ; preds = %entry + ret i32 0 } + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll deleted file mode 100644 index 27888d75f67a5..0000000000000 --- a/test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll +++ /dev/null @@ -1,77 +0,0 @@ -; RUN: llc < %s -mtriple=armv6-apple-darwin - - type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0 - type { i32, %struct.D_Reduction** } ; type %1 - type { i32, %struct.D_RightEpsilonHint* } ; type %2 - type { i32, %struct.D_ErrorRecoveryHint* } ; type %3 - type { i32, i32, %struct.D_Reduction**, [3 x %struct.D_Reduction*] } ; type %4 - %struct.D_ErrorRecoveryHint = type { i16, i16, i8* } - %struct.D_ParseNode = type { i32, %struct.d_loc_t, i8*, i8*, %struct.D_Scope*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i8*, i8* } - %struct.D_Parser = type { i8*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, %struct.D_Scope*, void (%struct.D_Parser*)*, %struct.D_ParseNode* (%struct.D_Parser*, i32, %struct.D_ParseNode**)*, void (%struct.D_ParseNode*)*, %struct.d_loc_t, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.D_ParserTables = type { i32, %struct.D_State*, i16*, i32, i32, %struct.D_Symbol*, void (%struct.D_Parser*, %struct.d_loc_t*, i8**)*, i32, %struct.D_Pass*, i32 } - %struct.D_Pass = type { i8*, i32, i32, i32 } - %struct.D_Reduction = type { i16, i16, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)*, i16, i16, i32, i32, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)** } - %struct.D_RightEpsilonHint = type { i16, i16, %struct.D_Reduction* } - %struct.D_Scope = type { i8, %struct.D_Sym*, %struct.D_SymHash*, %struct.D_Sym*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope*, %struct.D_Scope* } - %struct.D_Shift = type { i16, i8, i8, i32, i32, i32 (i8*, i8**, i32, i32, %struct.D_Parser*)* } - %struct.D_State = type { i8*, i32, %1, %2, %3, %struct.D_Shift**, i32 (i8**, i32*, i32*, i16*, i32*, i8*, i32*)*, i8*, i8, i8, i8, i8*, %struct.D_Shift***, i32 } - %struct.D_Sym = type { i8*, i32, i32, %struct.D_Sym*, %struct.D_Sym*, i32 } - %struct.D_SymHash = type { i32, i32, %0 } - %struct.D_Symbol = type { i32, i8*, i32 } - %struct.PNode = type { i32, i32, i32, i32, %struct.D_Reduction*, %struct.D_Shift*, i32, %struct.VecPNode, i32, i8, i8, %struct.PNode*, %struct.PNode*, %struct.PNode*, %struct.PNode*, i8*, i8*, %struct.D_Scope*, i8*, %struct.D_ParseNode } - %struct.PNodeHash = type { %struct.PNode**, i32, i32, i32, %struct.PNode* } - %struct.Parser = type { %struct.D_Parser, i8*, i8*, %struct.D_ParserTables*, i32, i32, i32, i32, i32, i32, i32, %struct.PNodeHash, %struct.SNodeHash, %struct.Reduction*, %struct.Shift*, %struct.D_Scope*, %struct.SNode*, i32, %struct.Reduction*, %struct.Shift*, i32, %struct.PNode*, %struct.SNode*, %struct.ZNode*, %4, %struct.ShiftResult*, %struct.D_Shift, %struct.Parser*, i8* } - %struct.Reduction = type { %struct.ZNode*, %struct.SNode*, %struct.D_Reduction*, %struct.SNode*, i32, %struct.Reduction* } - %struct.SNode = type { %struct.D_State*, %struct.D_Scope*, i8*, %struct.d_loc_t, i32, %struct.PNode*, %struct.VecZNode, i32, %struct.SNode*, %struct.SNode* } - %struct.SNodeHash = type { %struct.SNode**, i32, i32, i32, %struct.SNode*, %struct.SNode* } - %struct.Shift = type { %struct.SNode*, %struct.Shift* } - %struct.ShiftResult = type { %struct.D_Shift*, %struct.d_loc_t } - %struct.VecPNode = type { i32, i32, %struct.PNode**, [3 x %struct.PNode*] } - %struct.VecSNode = type { i32, i32, %struct.SNode**, [3 x %struct.SNode*] } - %struct.VecZNode = type { i32, i32, %struct.ZNode**, [3 x %struct.ZNode*] } - %struct.ZNode = type { %struct.PNode*, %struct.VecSNode } - %struct.d_loc_t = type { i8*, i8*, i32, i32, i32 } - -declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind - -define fastcc i32 @exhaustive_parse(%struct.Parser* %p, i32 %state) nounwind { -entry: - store i8* undef, i8** undef, align 4 - %0 = getelementptr %struct.Parser* %p, i32 0, i32 0, i32 6 ; <%struct.d_loc_t*> [#uses=1] - %1 = bitcast %struct.d_loc_t* %0 to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32(i8* undef, i8* %1, i32 20, i32 4) - br label %bb10 - -bb10: ; preds = %bb30, %bb29, %bb26, %entry - br i1 undef, label %bb18, label %bb20 - -bb18: ; preds = %bb10 - br i1 undef, label %bb20, label %bb19 - -bb19: ; preds = %bb18 - br label %bb20 - -bb20: ; preds = %bb19, %bb18, %bb10 - br i1 undef, label %bb21, label %bb22 - -bb21: ; preds = %bb20 - unreachable - -bb22: ; preds = %bb20 - br i1 undef, label %bb24, label %bb26 - -bb24: ; preds = %bb22 - unreachable - -bb26: ; preds = %bb22 - br i1 undef, label %bb10, label %bb29 - -bb29: ; preds = %bb26 - br i1 undef, label %bb10, label %bb30 - -bb30: ; preds = %bb29 - br i1 undef, label %bb31, label %bb10 - -bb31: ; preds = %bb30 - unreachable -} diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll index 90a4a42531c84..382038eb13ef8 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll @@ -14,7 +14,8 @@ entry: br i1 %p, label %bb8, label %bb1 bb1: ; preds = %entry - %0 = malloc %struct.Village ; <%struct.Village*> [#uses=3] + %malloccall = tail call i8* @malloc(i32 ptrtoint (%struct.Village* getelementptr (%struct.Village* null, i32 1) to i32)) + %0 = bitcast i8* %malloccall to %struct.Village* %exp2 = call double @ldexp(double 1.000000e+00, i32 %level) nounwind ; <double> [#uses=1] %.c = fptosi double %exp2 to i32 ; <i32> [#uses=1] store i32 %.c, i32* null @@ -29,3 +30,4 @@ bb8: ; preds = %entry } declare double @ldexp(double, i32) +declare noalias i8* @malloc(i32) diff --git a/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll b/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll index 397eba410b1f4..8bde7489d9b6b 100644 --- a/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll +++ b/test/CodeGen/ARM/2009-08-31-LSDA-Name.ll @@ -1,32 +1,35 @@ ; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm | FileCheck %s +; CHECK: L_LSDA_0: + + %struct.A = type { i32* } define void @"\01-[MyFunction Name:]"() { entry: - %save_filt.1 = alloca i32 ; <i32*> [#uses=2] - %save_eptr.0 = alloca i8* ; <i8**> [#uses=2] - %a = alloca %struct.A ; <%struct.A*> [#uses=3] - %eh_exception = alloca i8* ; <i8**> [#uses=5] - %eh_selector = alloca i32 ; <i32*> [#uses=3] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @_ZN1AC1Ev(%struct.A* %a) - invoke void @_Z3barv() + %save_filt.1 = alloca i32 + %save_eptr.0 = alloca i8* + %a = alloca %struct.A + %eh_exception = alloca i8* + %eh_selector = alloca i32 + %"alloca point" = bitcast i32 0 to i32 + call void @_ZN1AC1Ev(%struct.A* %a) + invoke void @_Z3barv() to label %invcont unwind label %lpad invcont: ; preds = %entry - call void @_ZN1AD1Ev(%struct.A* %a) nounwind + call void @_ZN1AD1Ev(%struct.A* %a) nounwind br label %return bb: ; preds = %ppad - %eh_select = load i32* %eh_selector ; <i32> [#uses=1] + %eh_select = load i32* %eh_selector store i32 %eh_select, i32* %save_filt.1, align 4 - %eh_value = load i8** %eh_exception ; <i8*> [#uses=1] + %eh_value = load i8** %eh_exception store i8* %eh_value, i8** %save_eptr.0, align 4 - call void @_ZN1AD1Ev(%struct.A* %a) nounwind - %0 = load i8** %save_eptr.0, align 4 ; <i8*> [#uses=1] + call void @_ZN1AD1Ev(%struct.A* %a) nounwind + %0 = load i8** %save_eptr.0, align 4 store i8* %0, i8** %eh_exception, align 4 - %1 = load i32* %save_filt.1, align 4 ; <i32> [#uses=1] + %1 = load i32* %save_filt.1, align 4 store i32 %1, i32* %eh_selector, align 4 br label %Unwind @@ -34,10 +37,10 @@ return: ; preds = %invcont ret void lpad: ; preds = %entry - %eh_ptr = call i8* @llvm.eh.exception() ; <i8*> [#uses=1] + %eh_ptr = call i8* @llvm.eh.exception() store i8* %eh_ptr, i8** %eh_exception - %eh_ptr1 = load i8** %eh_exception ; <i8*> [#uses=1] - %eh_select2 = call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32(i8* %eh_ptr1, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0) ; <i32> [#uses=1] + %eh_ptr1 = load i8** %eh_exception + %eh_select2 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr1, i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*), i32 0) store i32 %eh_select2, i32* %eh_selector br label %ppad @@ -45,20 +48,20 @@ ppad: ; preds = %lpad br label %bb Unwind: ; preds = %bb - %eh_ptr3 = load i8** %eh_exception ; <i8*> [#uses=1] - call void @_Unwind_SjLj_Resume(i8* %eh_ptr3) + %eh_ptr3 = load i8** %eh_exception + call void @_Unwind_SjLj_Resume(i8* %eh_ptr3) unreachable } define linkonce_odr void @_ZN1AC1Ev(%struct.A* %this) { entry: - %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %this_addr = alloca %struct.A* + %"alloca point" = bitcast i32 0 to i32 store %struct.A* %this, %struct.A** %this_addr - %0 = call i8* @_Znwm(i32 4) ; <i8*> [#uses=1] - %1 = bitcast i8* %0 to i32* ; <i32*> [#uses=1] - %2 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1] - %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 ; <i32**> [#uses=1] + %0 = call i8* @_Znwm(i32 4) + %1 = bitcast i8* %0 to i32* + %2 = load %struct.A** %this_addr, align 4 + %3 = getelementptr inbounds %struct.A* %2, i32 0, i32 0 store i32* %1, i32** %3, align 4 br label %return @@ -70,14 +73,14 @@ declare i8* @_Znwm(i32) define linkonce_odr void @_ZN1AD1Ev(%struct.A* %this) nounwind { entry: - %this_addr = alloca %struct.A* ; <%struct.A**> [#uses=2] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] + %this_addr = alloca %struct.A* + %"alloca point" = bitcast i32 0 to i32 store %struct.A* %this, %struct.A** %this_addr - %0 = load %struct.A** %this_addr, align 4 ; <%struct.A*> [#uses=1] - %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 ; <i32**> [#uses=1] - %2 = load i32** %1, align 4 ; <i32*> [#uses=1] - %3 = bitcast i32* %2 to i8* ; <i8*> [#uses=1] - call void @_ZdlPv(i8* %3) nounwind + %0 = load %struct.A** %this_addr, align 4 + %1 = getelementptr inbounds %struct.A* %0, i32 0, i32 0 + %2 = load i32** %1, align 4 + %3 = bitcast i32* %2 to i8* + call void @_ZdlPv(i8* %3) nounwind br label %bb bb: ; preds = %entry @@ -86,17 +89,16 @@ bb: ; preds = %entry return: ; preds = %bb ret void } -;CHECK: L_LSDA_0: declare void @_ZdlPv(i8*) nounwind declare void @_Z3barv() -declare i8* @llvm.eh.exception() nounwind +declare i8* @llvm.eh.exception() nounwind readonly -declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) nounwind +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind -declare i32 @llvm.eh.typeid.for.i32(i8*) nounwind +declare i32 @llvm.eh.typeid.for(i8*) nounwind declare i32 @__gxx_personality_sj0(...) diff --git a/test/CodeGen/ARM/2009-10-30.ll b/test/CodeGen/ARM/2009-10-30.ll index 87d1a8b9e9a24..e46ab1eb2ab93 100644 --- a/test/CodeGen/ARM/2009-10-30.ll +++ b/test/CodeGen/ARM/2009-10-30.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s +; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s ; This test checks that the address of the varg arguments is correctly ; computed when there are 5 or more regular arguments. diff --git a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll index 34f7519a98a01..a18a8308044c7 100644 --- a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll +++ b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll @@ -19,7 +19,7 @@ entry: %5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2] %6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2] %7 = shufflevector <2 x float> %6, <2 x float> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=2] -;CHECK: vmov +;CHECK: vorr %8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3] %9 = fmul <4 x float> %8, %8 ; <<4 x float>> [#uses=1] %10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/test/CodeGen/ARM/2010-08-04-StackVariable.ll index 25d38ed774254..6aeaa26cebd17 100644 --- a/test/CodeGen/ARM/2010-08-04-StackVariable.ll +++ b/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -31,7 +31,7 @@ return: ; preds = %bb2 ret i32 %.0, !dbg !29 } -define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { +define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 diff --git a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll index ee443febcc1ed..99db63713d42b 100644 --- a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll +++ b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll @@ -1,7 +1,7 @@ ; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \ ; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s ; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \ -; RUN: -mattr=-neon -mattr=+vfp2 \ +; RUN: -mattr=-neon,-vfp3,+vfp2 \ ; RUN: -arm-reserve-r9 -filetype=obj -o - | \ ; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s diff --git a/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll b/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll new file mode 100644 index 0000000000000..7baacfe79a654 --- /dev/null +++ b/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -arm-tail-calls=1 | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +%struct.A = type <{ i16, i16, i32, i16, i16, i32, i16, [8 x %struct.B], [418 x i8], %struct.C }> +%struct.B = type <{ i32, i16, i16 }> +%struct.C = type { i16, i32, i16, i16 } + +; CHECK: f +; CHECK: push {r1, r2, r3} +; CHECK: add sp, #12 +; CHECK: b.w _puts + +define void @f(i8* %s, %struct.A* nocapture byval %a) nounwind optsize { +entry: + %puts = tail call i32 @puts(i8* %s) + ret void +} + +declare i32 @puts(i8* nocapture) nounwind diff --git a/test/CodeGen/ARM/2011-06-29-MergeGlobalsAlign.ll b/test/CodeGen/ARM/2011-06-29-MergeGlobalsAlign.ll new file mode 100644 index 0000000000000..1b5b8a99c2e26 --- /dev/null +++ b/test/CodeGen/ARM/2011-06-29-MergeGlobalsAlign.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 | FileCheck %s +; CHECK: .zerofill __DATA,__bss,__MergedGlobals,16,2 + +%struct.config = type { i16, i16, i16, i16 } + +@prev = external global [0 x i16] +@max_lazy_match = internal unnamed_addr global i32 0, align 4 +@read_buf = external global i32 (i8*, i32)* +@window = external global [0 x i8] +@lookahead = internal unnamed_addr global i32 0, align 4 +@eofile.b = internal unnamed_addr global i1 false +@ins_h = internal unnamed_addr global i32 0, align 4 diff --git a/test/CodeGen/ARM/2011-07-10-GlobalMergeBug.ll b/test/CodeGen/ARM/2011-07-10-GlobalMergeBug.ll new file mode 100644 index 0000000000000..2970cd2c4e3b4 --- /dev/null +++ b/test/CodeGen/ARM/2011-07-10-GlobalMergeBug.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-darwin10" + +; CHECK-NOT: MergedGlobals + +@a = internal unnamed_addr global i1 false +@b = internal global [64 x i8] zeroinitializer, align 64 diff --git a/test/CodeGen/ARM/arm-modifier.ll b/test/CodeGen/ARM/arm-modifier.ll index 0a7bb6cd21326..396de37aef66b 100644 --- a/test/CodeGen/ARM/arm-modifier.ll +++ b/test/CodeGen/ARM/arm-modifier.ll @@ -46,9 +46,9 @@ ret void define void @f3() nounwind { entry: ; CHECK: f3 -; CHECK: stm r{{[0-9]+}}, {[[REG1:(r[0-9]+)]], r{{[0-9]+}}} -; CHECK: adds lr, [[REG1]] -; CHECK: ldm r{{[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}} +; CHECK: stm {{lr|r[0-9]+}}, {[[REG1:(r[0-9]+)]], r{{[0-9]+}}} +; CHECK: adds {{lr|r[0-9]+}}, [[REG1]] +; CHECK: ldm {{lr|r[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}} %tmp = load i64* @f3_var, align 4 %tmp1 = load i64* @f3_var2, align 4 %0 = call i64 asm sideeffect "stm ${0:m}, ${1:M}\0A\09adds $3, $1\0A\09", "=*m,=r,1,r"(i64** @f3_ptr, i64 %tmp, i64 %tmp1) nounwind diff --git a/test/CodeGen/ARM/armv4.ll b/test/CodeGen/ARM/armv4.ll index ef722de01d2d7..6b213d564bd6d 100644 --- a/test/CodeGen/ARM/armv4.ll +++ b/test/CodeGen/ARM/armv4.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -mtriple=arm-unknown-eabi | FileCheck %s -check-prefix=THUMB -; RUN: llc < %s -mtriple=arm-unknown-eabi -mcpu=strongarm | FileCheck %s -check-prefix=ARM -; RUN: llc < %s -mtriple=arm-unknown-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=THUMB -; RUN: llc < %s -mtriple=arm-unknown-eabi -mattr=+v6 | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -mtriple=armv4t-unknown-eabi | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -mtriple=armv4-unknown-eabi -mcpu=strongarm | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -mtriple=armv7-unknown-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s -check-prefix=THUMB ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=ARM ; RUN: llc < %s -mtriple=armv4t-unknown-eabi | FileCheck %s -check-prefix=THUMB diff --git a/test/CodeGen/ARM/bfi.ll b/test/CodeGen/ARM/bfi.ll index c94b096d9cc72..84f3813975a98 100644 --- a/test/CodeGen/ARM/bfi.ll +++ b/test/CodeGen/ARM/bfi.ll @@ -61,3 +61,16 @@ entry: %3 = or i32 %2, %0 ret i32 %3 } + +; rdar://9609030 +define i32 @f6(i32 %a, i32 %b) nounwind readnone { +entry: +; CHECK: f6: +; CHECK-NOT: bic +; CHECK: bfi r0, r1, #8, #9 + %and = and i32 %a, -130817 + %and2 = shl i32 %b, 8 + %shl = and i32 %and2, 130816 + %or = or i32 %shl, %and + ret i32 %or +} diff --git a/test/CodeGen/ARM/bfx.ll b/test/CodeGen/ARM/bfx.ll index fcca191a016ed..519c1353a3879 100644 --- a/test/CodeGen/ARM/bfx.ll +++ b/test/CodeGen/ARM/bfx.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s define i32 @sbfx1(i32 %a) { ; CHECK: sbfx1 diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index c460f7a5bd020..e01750be81dfa 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -15,11 +15,11 @@ define void @t1() { define void @t2() { ; CHECKV6: t2: -; CHECKV6: bx r0 @ TAILCALL +; CHECKV6: bx r0 ; CHECKT2D: t2: ; CHECKT2D: ldr ; CHECKT2D-NEXT: ldr -; CHECKT2D-NEXT: bx r0 @ TAILCALL +; CHECKT2D-NEXT: bx r0 %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] ret void @@ -27,11 +27,11 @@ define void @t2() { define void @t3() { ; CHECKV6: t3: -; CHECKV6: b _t2 @ TAILCALL +; CHECKV6: b _t2 ; CHECKELF: t3: -; CHECKELF: b t2(PLT) @ TAILCALL +; CHECKELF: b t2(PLT) ; CHECKT2D: t3: -; CHECKT2D: b.w _t2 @ TAILCALL +; CHECKT2D: b.w _t2 tail call void @t2( ) ; <i32> [#uses=0] ret void @@ -41,9 +41,9 @@ define void @t3() { define double @t4(double %a) nounwind readonly ssp { entry: ; CHECKV6: t4: -; CHECKV6: b _sin @ TAILCALL +; CHECKV6: b _sin ; CHECKELF: t4: -; CHECKELF: b sin(PLT) @ TAILCALL +; CHECKELF: b sin(PLT) %0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1] ret double %0 } @@ -51,9 +51,9 @@ entry: define float @t5(float %a) nounwind readonly ssp { entry: ; CHECKV6: t5: -; CHECKV6: b _sinf @ TAILCALL +; CHECKV6: b _sinf ; CHECKELF: t5: -; CHECKELF: b sinf(PLT) @ TAILCALL +; CHECKELF: b sinf(PLT) %0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1] ret float %0 } @@ -65,9 +65,9 @@ declare double @sin(double) nounwind readonly define i32 @t6(i32 %a, i32 %b) nounwind readnone { entry: ; CHECKV6: t6: -; CHECKV6: b ___divsi3 @ TAILCALL +; CHECKV6: b ___divsi3 ; CHECKELF: t6: -; CHECKELF: b __aeabi_idiv(PLT) @ TAILCALL +; CHECKELF: b __aeabi_idiv(PLT) %0 = sdiv i32 %a, %b ret i32 %0 } diff --git a/test/CodeGen/ARM/call.ll b/test/CodeGen/ARM/call.ll index c020b6fbd24d6..0f9543f0a19da 100644 --- a/test/CodeGen/ARM/call.ll +++ b/test/CodeGen/ARM/call.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4 +; RUN: llc < %s -march=arm -mattr=+v4t | FileCheck %s -check-prefix=CHECKV4 ; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5 -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\ +; RUN: llc < %s -mtriple=armv6-linux-gnueabi\ ; RUN: -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF @t = weak global i32 ()* null ; <i32 ()**> [#uses=1] diff --git a/test/CodeGen/ARM/carry.ll b/test/CodeGen/ARM/carry.ll index 9b90408cc4dbc..06b459e48b4a6 100644 --- a/test/CodeGen/ARM/carry.ll +++ b/test/CodeGen/ARM/carry.ll @@ -24,7 +24,6 @@ entry: define i64 @f3(i32 %al, i32 %bl) { ; CHECK: f3: ; CHECK: adds r -; CHECK: adcs r ; CHECK: adc r entry: ; unsigned wide add diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll index 7893df782054a..f4c1b5acef91e 100644 --- a/test/CodeGen/ARM/constants.ll +++ b/test/CodeGen/ARM/constants.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -disable-cgp-branch-opts | FileCheck %s +; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts | FileCheck %s define i32 @f1() { ; CHECK: f1 @@ -14,33 +14,46 @@ define i32 @f2() { define i32 @f3() { ; CHECK: f3 -; CHECK: mov r0, #1, #24 +; CHECK: mov r0, #256 ret i32 256 } define i32 @f4() { ; CHECK: f4 -; CHECK: orr{{.*}}#1, #24 +; CHECK: orr{{.*}}#256 ret i32 257 } define i32 @f5() { ; CHECK: f5 -; CHECK: mov r0, #255, #2 +; CHECK: mov r0, #-1073741761 ret i32 -1073741761 } define i32 @f6() { ; CHECK: f6 -; CHECK: mov r0, #63, #28 +; CHECK: mov r0, #1008 ret i32 1008 } define void @f7(i32 %a) { ; CHECK: f7 -; CHECK: cmp r0, #1, #16 +; CHECK: cmp r0, #65536 %b = icmp ugt i32 %a, 65536 br i1 %b, label %r, label %r r: ret void } + +%t1 = type { <3 x float>, <3 x float> } + +@const1 = global %t1 { <3 x float> zeroinitializer, + <3 x float> <float 1.000000e+00, + float 2.000000e+00, + float 3.000000e+00> }, align 16 +; CHECK: const1 +; CHECK: .zero 16 +; CHECK: float 1.0 +; CHECK: float 2.0 +; CHECK: float 3.0 +; CHECK: .zero 4 diff --git a/test/CodeGen/ARM/debug-info-blocks.ll b/test/CodeGen/ARM/debug-info-blocks.ll new file mode 100644 index 0000000000000..519c40ebd7bf0 --- /dev/null +++ b/test/CodeGen/ARM/debug-info-blocks.ll @@ -0,0 +1,245 @@ +; RUN: llc -O0 < %s | FileCheck %s +; CHECK: @DEBUG_VALUE: mydata <- [sp+#8]+#0 +; Radar 9331779 +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv7-apple-macosx10.7.0" + +%0 = type opaque +%1 = type { [4 x i32] } +%2 = type <{ i8*, i32, i32, i8*, %struct.Re*, i8*, %3*, %struct.my_struct* }> +%3 = type opaque +%struct.CP = type { float, float } +%struct.CR = type { %struct.CP, %struct.CP } +%struct.Re = type { i32, i32 } +%struct.__block_byref_mydata = type { i8*, %struct.__block_byref_mydata*, i32, i32, i8*, i8*, %0* } +%struct.my_struct = type opaque + +@"\01L_OBJC_SELECTOR_REFERENCES_13" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip" +@"OBJC_IVAR_$_MyWork._bounds" = external hidden global i32, section "__DATA, __objc_const", align 4 +@"OBJC_IVAR_$_MyWork._data" = external hidden global i32, section "__DATA, __objc_const", align 4 +@"\01L_OBJC_SELECTOR_REFERENCES_222" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip" + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare i8* @objc_msgSend(i8*, i8*, ...) + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind + +define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %loadedMydata, [4 x i32] %bounds.coerce0, [4 x i32] %data.coerce0) ssp { + %1 = alloca %0*, align 4 + %bounds = alloca %struct.CR, align 4 + %data = alloca %struct.CR, align 4 + call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27), !dbg !129 + store %0* %loadedMydata, %0** %1, align 4 + call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130), !dbg !131 + %2 = bitcast %struct.CR* %bounds to %1* + %3 = getelementptr %1* %2, i32 0, i32 0 + store [4 x i32] %bounds.coerce0, [4 x i32]* %3 + call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132), !dbg !133 + %4 = bitcast %struct.CR* %data to %1* + %5 = getelementptr %1* %4, i32 0, i32 0 + store [4 x i32] %data.coerce0, [4 x i32]* %5 + call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134), !dbg !135 + %6 = bitcast i8* %.block_descriptor to %2* + %7 = getelementptr inbounds %2* %6, i32 0, i32 6 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136), !dbg !137 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138), !dbg !137 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139), !dbg !140 + %8 = load %0** %1, align 4, !dbg !141 + %9 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_13", !dbg !141 + %10 = bitcast %0* %8 to i8*, !dbg !141 + %11 = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %10, i8* %9), !dbg !141 + %12 = bitcast i8* %11 to %0*, !dbg !141 + %13 = getelementptr inbounds %2* %6, i32 0, i32 5, !dbg !141 + %14 = load i8** %13, !dbg !141 + %15 = bitcast i8* %14 to %struct.__block_byref_mydata*, !dbg !141 + %16 = getelementptr inbounds %struct.__block_byref_mydata* %15, i32 0, i32 1, !dbg !141 + %17 = load %struct.__block_byref_mydata** %16, !dbg !141 + %18 = getelementptr inbounds %struct.__block_byref_mydata* %17, i32 0, i32 6, !dbg !141 + store %0* %12, %0** %18, align 4, !dbg !141 + %19 = getelementptr inbounds %2* %6, i32 0, i32 6, !dbg !143 + %20 = load %3** %19, align 4, !dbg !143 + %21 = load i32* @"OBJC_IVAR_$_MyWork._data", !dbg !143 + %22 = bitcast %3* %20 to i8*, !dbg !143 + %23 = getelementptr inbounds i8* %22, i32 %21, !dbg !143 + %24 = bitcast i8* %23 to %struct.CR*, !dbg !143 + %25 = bitcast %struct.CR* %24 to i8*, !dbg !143 + %26 = bitcast %struct.CR* %data to i8*, !dbg !143 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %25, i8* %26, i32 16, i32 4, i1 false), !dbg !143 + %27 = getelementptr inbounds %2* %6, i32 0, i32 6, !dbg !144 + %28 = load %3** %27, align 4, !dbg !144 + %29 = load i32* @"OBJC_IVAR_$_MyWork._bounds", !dbg !144 + %30 = bitcast %3* %28 to i8*, !dbg !144 + %31 = getelementptr inbounds i8* %30, i32 %29, !dbg !144 + %32 = bitcast i8* %31 to %struct.CR*, !dbg !144 + %33 = bitcast %struct.CR* %32 to i8*, !dbg !144 + %34 = bitcast %struct.CR* %bounds to i8*, !dbg !144 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %33, i8* %34, i32 16, i32 4, i1 false), !dbg !144 + %35 = getelementptr inbounds %2* %6, i32 0, i32 6, !dbg !145 + %36 = load %3** %35, align 4, !dbg !145 + %37 = getelementptr inbounds %2* %6, i32 0, i32 5, !dbg !145 + %38 = load i8** %37, !dbg !145 + %39 = bitcast i8* %38 to %struct.__block_byref_mydata*, !dbg !145 + %40 = getelementptr inbounds %struct.__block_byref_mydata* %39, i32 0, i32 1, !dbg !145 + %41 = load %struct.__block_byref_mydata** %40, !dbg !145 + %42 = getelementptr inbounds %struct.__block_byref_mydata* %41, i32 0, i32 6, !dbg !145 + %43 = load %0** %42, align 4, !dbg !145 + %44 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_222", !dbg !145 + %45 = bitcast %3* %36 to i8*, !dbg !145 + call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %0*)*)(i8* %45, i8* %44, %0* %43), !dbg !145 + ret void, !dbg !146 +} + +!llvm.dbg.cu = !{!0} +!llvm.dbg.enum = !{!1, !1, !5, !5, !9, !14, !19, !19, !14, !14, !14, !19, !19, !19} +!llvm.dbg.sp = !{!23} + +!0 = metadata !{i32 589841, i32 0, i32 16, metadata !"MyLibrary.i", metadata !"/Volumes/Sandbox/llvm", metadata !"Apple clang version 2.1", i1 true, i1 false, metadata !"", i32 2} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 589828, metadata !0, metadata !"", metadata !2, i32 248, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !3, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!2 = metadata !{i32 589865, metadata !"header.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!3 = metadata !{metadata !4} +!4 = metadata !{i32 589864, metadata !"Ver1", i64 0} ; [ DW_TAG_enumerator ] +!5 = metadata !{i32 589828, metadata !0, metadata !"Mode", metadata !6, i32 79, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !7, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!6 = metadata !{i32 589865, metadata !"header2.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!7 = metadata !{metadata !8} +!8 = metadata !{i32 589864, metadata !"One", i64 0} ; [ DW_TAG_enumerator ] +!9 = metadata !{i32 589828, metadata !0, metadata !"", metadata !10, i32 15, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !11, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!10 = metadata !{i32 589865, metadata !"header3.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!11 = metadata !{metadata !12, metadata !13} +!12 = metadata !{i32 589864, metadata !"Unknown", i64 0} ; [ DW_TAG_enumerator ] +!13 = metadata !{i32 589864, metadata !"Known", i64 1} ; [ DW_TAG_enumerator ] +!14 = metadata !{i32 589828, metadata !0, metadata !"", metadata !15, i32 20, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !16, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!15 = metadata !{i32 589865, metadata !"Private.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!16 = metadata !{metadata !17, metadata !18} +!17 = metadata !{i32 589864, metadata !"Single", i64 0} ; [ DW_TAG_enumerator ] +!18 = metadata !{i32 589864, metadata !"Double", i64 1} ; [ DW_TAG_enumerator ] +!19 = metadata !{i32 589828, metadata !0, metadata !"", metadata !20, i32 14, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !21, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!20 = metadata !{i32 589865, metadata !"header4.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!21 = metadata !{metadata !22} +!22 = metadata !{i32 589864, metadata !"Eleven", i64 0} ; [ DW_TAG_enumerator ] +!23 = metadata !{i32 589870, i32 0, metadata !24, metadata !"foobar_func_block_invoke_0", metadata !"foobar_func_block_invoke_0", metadata !"", metadata !24, i32 609, metadata !25, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (i8*, %0*, [4 x i32], [4 x i32])* @foobar_func_block_invoke_0, null, null} ; [ DW_TAG_subprogram ] +!24 = metadata !{i32 589865, metadata !"MyLibrary.m", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!25 = metadata !{i32 589845, metadata !24, metadata !"", metadata !24, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !26, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!26 = metadata !{null} +!27 = metadata !{i32 590081, metadata !23, metadata !".block_descriptor", metadata !24, i32 16777825, metadata !28, i32 64} ; [ DW_TAG_arg_variable ] +!28 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 0, i64 0, i32 0, metadata !29} ; [ DW_TAG_pointer_type ] +!29 = metadata !{i32 589843, metadata !24, metadata !"__block_literal_14", metadata !24, i32 609, i64 256, i64 32, i32 0, i32 0, i32 0, metadata !30, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!30 = metadata !{metadata !31, metadata !33, metadata !35, metadata !36, metadata !37, metadata !48, metadata !89, metadata !124} +!31 = metadata !{i32 589837, metadata !24, metadata !"__isa", metadata !24, i32 609, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] +!32 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!33 = metadata !{i32 589837, metadata !24, metadata !"__flags", metadata !24, i32 609, i64 32, i64 32, i64 32, i32 0, metadata !34} ; [ DW_TAG_member ] +!34 = metadata !{i32 589860, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!35 = metadata !{i32 589837, metadata !24, metadata !"__reserved", metadata !24, i32 609, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] +!36 = metadata !{i32 589837, metadata !24, metadata !"__FuncPtr", metadata !24, i32 609, i64 32, i64 32, i64 96, i32 0, metadata !32} ; [ DW_TAG_member ] +!37 = metadata !{i32 589837, metadata !24, metadata !"__descriptor", metadata !24, i32 609, i64 32, i64 32, i64 128, i32 0, metadata !38} ; [ DW_TAG_member ] +!38 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !39} ; [ DW_TAG_pointer_type ] +!39 = metadata !{i32 589843, metadata !0, metadata !"__block_descriptor_withcopydispose", metadata !40, i32 307, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !41, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!40 = metadata !{i32 589865, metadata !"MyLibrary.i", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!41 = metadata !{metadata !42, metadata !44, metadata !45, metadata !47} +!42 = metadata !{i32 589837, metadata !40, metadata !"reserved", metadata !40, i32 307, i64 32, i64 32, i64 0, i32 0, metadata !43} ; [ DW_TAG_member ] +!43 = metadata !{i32 589860, metadata !0, metadata !"long unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!44 = metadata !{i32 589837, metadata !40, metadata !"Size", metadata !40, i32 307, i64 32, i64 32, i64 32, i32 0, metadata !43} ; [ DW_TAG_member ] +!45 = metadata !{i32 589837, metadata !40, metadata !"CopyFuncPtr", metadata !40, i32 307, i64 32, i64 32, i64 64, i32 0, metadata !46} ; [ DW_TAG_member ] +!46 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] +!47 = metadata !{i32 589837, metadata !40, metadata !"DestroyFuncPtr", metadata !40, i32 307, i64 32, i64 32, i64 96, i32 0, metadata !46} ; [ DW_TAG_member ] +!48 = metadata !{i32 589837, metadata !24, metadata !"mydata", metadata !24, i32 609, i64 32, i64 32, i64 160, i32 0, metadata !49} ; [ DW_TAG_member ] +!49 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 0, i64 0, i32 0, metadata !50} ; [ DW_TAG_pointer_type ] +!50 = metadata !{i32 589843, metadata !24, metadata !"", metadata !24, i32 0, i64 224, i64 0, i32 0, i32 16, i32 0, metadata !51, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!51 = metadata !{metadata !52, metadata !53, metadata !54, metadata !55, metadata !56, metadata !57, metadata !58} +!52 = metadata !{i32 589837, metadata !24, metadata !"__isa", metadata !24, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] +!53 = metadata !{i32 589837, metadata !24, metadata !"__forwarding", metadata !24, i32 0, i64 32, i64 32, i64 32, i32 0, metadata !32} ; [ DW_TAG_member ] +!54 = metadata !{i32 589837, metadata !24, metadata !"__flags", metadata !24, i32 0, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] +!55 = metadata !{i32 589837, metadata !24, metadata !"__size", metadata !24, i32 0, i64 32, i64 32, i64 96, i32 0, metadata !34} ; [ DW_TAG_member ] +!56 = metadata !{i32 589837, metadata !24, metadata !"__copy_helper", metadata !24, i32 0, i64 32, i64 32, i64 128, i32 0, metadata !32} ; [ DW_TAG_member ] +!57 = metadata !{i32 589837, metadata !24, metadata !"__destroy_helper", metadata !24, i32 0, i64 32, i64 32, i64 160, i32 0, metadata !32} ; [ DW_TAG_member ] +!58 = metadata !{i32 589837, metadata !24, metadata !"mydata", metadata !24, i32 0, i64 32, i64 32, i64 192, i32 0, metadata !59} ; [ DW_TAG_member ] +!59 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !60} ; [ DW_TAG_pointer_type ] +!60 = metadata !{i32 589843, metadata !24, metadata !"UIMydata", metadata !61, i32 26, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !62, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!61 = metadata !{i32 589865, metadata !"header11.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!62 = metadata !{metadata !63, metadata !71, metadata !75, metadata !79} +!63 = metadata !{i32 589852, metadata !60, null, metadata !61, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] +!64 = metadata !{i32 589843, metadata !40, metadata !"NSO", metadata !65, i32 66, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !66, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!65 = metadata !{i32 589865, metadata !"NSO.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!66 = metadata !{metadata !67} +!67 = metadata !{i32 589837, metadata !65, metadata !"isa", metadata !65, i32 67, i64 32, i64 32, i64 0, i32 2, metadata !68, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!68 = metadata !{i32 589846, metadata !0, metadata !"Class", metadata !40, i32 197, i64 0, i64 0, i64 0, i32 0, metadata !69} ; [ DW_TAG_typedef ] +!69 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !70} ; [ DW_TAG_pointer_type ] +!70 = metadata !{i32 589843, metadata !0, metadata !"objc_class", metadata !40, i32 0, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!71 = metadata !{i32 589837, metadata !61, metadata !"_mydataRef", metadata !61, i32 28, i64 32, i64 32, i64 32, i32 0, metadata !72, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!72 = metadata !{i32 589846, metadata !0, metadata !"CFTypeRef", metadata !24, i32 313, i64 0, i64 0, i64 0, i32 0, metadata !73} ; [ DW_TAG_typedef ] +!73 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !74} ; [ DW_TAG_pointer_type ] +!74 = metadata !{i32 589862, metadata !0, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null} ; [ DW_TAG_const_type ] +!75 = metadata !{i32 589837, metadata !61, metadata !"_scale", metadata !61, i32 29, i64 32, i64 32, i64 64, i32 0, metadata !76, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!76 = metadata !{i32 589846, metadata !0, metadata !"Float", metadata !77, i32 89, i64 0, i64 0, i64 0, i32 0, metadata !78} ; [ DW_TAG_typedef ] +!77 = metadata !{i32 589865, metadata !"header12.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!78 = metadata !{i32 589860, metadata !0, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!79 = metadata !{i32 589837, metadata !61, metadata !"_mydataFlags", metadata !61, i32 37, i64 8, i64 8, i64 96, i32 0, metadata !80, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!80 = metadata !{i32 589843, metadata !0, metadata !"", metadata !61, i32 30, i64 8, i64 8, i32 0, i32 0, i32 0, metadata !81, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!81 = metadata !{metadata !82, metadata !84, metadata !85, metadata !86, metadata !87, metadata !88} +!82 = metadata !{i32 589837, metadata !61, metadata !"named", metadata !61, i32 31, i64 1, i64 32, i64 0, i32 0, metadata !83} ; [ DW_TAG_member ] +!83 = metadata !{i32 589860, metadata !0, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!84 = metadata !{i32 589837, metadata !61, metadata !"mydataO", metadata !61, i32 32, i64 3, i64 32, i64 1, i32 0, metadata !83} ; [ DW_TAG_member ] +!85 = metadata !{i32 589837, metadata !61, metadata !"cached", metadata !61, i32 33, i64 1, i64 32, i64 4, i32 0, metadata !83} ; [ DW_TAG_member ] +!86 = metadata !{i32 589837, metadata !61, metadata !"hasBeenCached", metadata !61, i32 34, i64 1, i64 32, i64 5, i32 0, metadata !83} ; [ DW_TAG_member ] +!87 = metadata !{i32 589837, metadata !61, metadata !"hasPattern", metadata !61, i32 35, i64 1, i64 32, i64 6, i32 0, metadata !83} ; [ DW_TAG_member ] +!88 = metadata !{i32 589837, metadata !61, metadata !"isCIMydata", metadata !61, i32 36, i64 1, i64 32, i64 7, i32 0, metadata !83} ; [ DW_TAG_member ] +!89 = metadata !{i32 589837, metadata !24, metadata !"self", metadata !24, i32 609, i64 32, i64 32, i64 192, i32 0, metadata !90} ; [ DW_TAG_member ] +!90 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !91} ; [ DW_TAG_pointer_type ] +!91 = metadata !{i32 589843, metadata !40, metadata !"MyWork", metadata !24, i32 36, i64 384, i64 32, i32 0, i32 0, i32 0, metadata !92, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!92 = metadata !{metadata !93, metadata !98, metadata !101, metadata !107, metadata !123} +!93 = metadata !{i32 589852, metadata !91, null, metadata !24, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !94} ; [ DW_TAG_inheritance ] +!94 = metadata !{i32 589843, metadata !40, metadata !"twork", metadata !95, i32 43, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !96, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!95 = metadata !{i32 589865, metadata !"header13.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!96 = metadata !{metadata !97} +!97 = metadata !{i32 589852, metadata !94, null, metadata !95, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] +!98 = metadata !{i32 589837, metadata !24, metadata !"_itemID", metadata !24, i32 38, i64 64, i64 32, i64 32, i32 1, metadata !99, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!99 = metadata !{i32 589846, metadata !0, metadata !"uint64_t", metadata !40, i32 55, i64 0, i64 0, i64 0, i32 0, metadata !100} ; [ DW_TAG_typedef ] +!100 = metadata !{i32 589860, metadata !0, metadata !"long long unsigned int", null, i32 0, i64 64, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!101 = metadata !{i32 589837, metadata !24, metadata !"_library", metadata !24, i32 39, i64 32, i64 32, i64 96, i32 1, metadata !102, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!102 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !103} ; [ DW_TAG_pointer_type ] +!103 = metadata !{i32 589843, metadata !40, metadata !"MyLibrary2", metadata !104, i32 22, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !105, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!104 = metadata !{i32 589865, metadata !"header14.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!105 = metadata !{metadata !106} +!106 = metadata !{i32 589852, metadata !103, null, metadata !104, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] +!107 = metadata !{i32 589837, metadata !24, metadata !"_bounds", metadata !24, i32 40, i64 128, i64 32, i64 128, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!108 = metadata !{i32 589846, metadata !0, metadata !"CR", metadata !40, i32 33, i64 0, i64 0, i64 0, i32 0, metadata !109} ; [ DW_TAG_typedef ] +!109 = metadata !{i32 589843, metadata !0, metadata !"CR", metadata !77, i32 29, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !110, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!110 = metadata !{metadata !111, metadata !117} +!111 = metadata !{i32 589837, metadata !77, metadata !"origin", metadata !77, i32 30, i64 64, i64 32, i64 0, i32 0, metadata !112} ; [ DW_TAG_member ] +!112 = metadata !{i32 589846, metadata !0, metadata !"CP", metadata !77, i32 17, i64 0, i64 0, i64 0, i32 0, metadata !113} ; [ DW_TAG_typedef ] +!113 = metadata !{i32 589843, metadata !0, metadata !"CP", metadata !77, i32 13, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !114, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!114 = metadata !{metadata !115, metadata !116} +!115 = metadata !{i32 589837, metadata !77, metadata !"x", metadata !77, i32 14, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] +!116 = metadata !{i32 589837, metadata !77, metadata !"y", metadata !77, i32 15, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] +!117 = metadata !{i32 589837, metadata !77, metadata !"size", metadata !77, i32 31, i64 64, i64 32, i64 64, i32 0, metadata !118} ; [ DW_TAG_member ] +!118 = metadata !{i32 589846, metadata !0, metadata !"Size", metadata !77, i32 25, i64 0, i64 0, i64 0, i32 0, metadata !119} ; [ DW_TAG_typedef ] +!119 = metadata !{i32 589843, metadata !0, metadata !"Size", metadata !77, i32 21, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !120, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!120 = metadata !{metadata !121, metadata !122} +!121 = metadata !{i32 589837, metadata !77, metadata !"width", metadata !77, i32 22, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] +!122 = metadata !{i32 589837, metadata !77, metadata !"height", metadata !77, i32 23, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] +!123 = metadata !{i32 589837, metadata !24, metadata !"_data", metadata !24, i32 40, i64 128, i64 32, i64 256, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!124 = metadata !{i32 589837, metadata !24, metadata !"semi", metadata !24, i32 609, i64 32, i64 32, i64 224, i32 0, metadata !125} ; [ DW_TAG_member ] +!125 = metadata !{i32 589846, metadata !0, metadata !"d_t", metadata !24, i32 35, i64 0, i64 0, i64 0, i32 0, metadata !126} ; [ DW_TAG_typedef ] +!126 = metadata !{i32 589839, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !127} ; [ DW_TAG_pointer_type ] +!127 = metadata !{i32 589843, metadata !0, metadata !"my_struct", metadata !128, i32 49, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!128 = metadata !{i32 589865, metadata !"header15.h", metadata !"/Volumes/Sandbox/llvm", metadata !0} ; [ DW_TAG_file_type ] +!129 = metadata !{i32 609, i32 144, metadata !23, null} +!130 = metadata !{i32 590081, metadata !23, metadata !"loadedMydata", metadata !24, i32 33555041, metadata !59, i32 0} ; [ DW_TAG_arg_variable ] +!131 = metadata !{i32 609, i32 155, metadata !23, null} +!132 = metadata !{i32 590081, metadata !23, metadata !"bounds", metadata !24, i32 50332257, metadata !108, i32 0} ; [ DW_TAG_arg_variable ] +!133 = metadata !{i32 609, i32 175, metadata !23, null} +!134 = metadata !{i32 590081, metadata !23, metadata !"data", metadata !24, i32 67109473, metadata !108, i32 0} ; [ DW_TAG_arg_variable ] +!135 = metadata !{i32 609, i32 190, metadata !23, null} +!136 = metadata !{i32 590080, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, i64 1, i64 20, i64 2, i64 1, i64 4, i64 2, i64 1, i64 24} ; [ DW_TAG_auto_variable ] +!137 = metadata !{i32 604, i32 49, metadata !23, null} +!138 = metadata !{i32 590080, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, i64 1, i64 24} ; [ DW_TAG_auto_variable ] +!139 = metadata !{i32 590080, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, i64 1, i64 28} ; [ DW_TAG_auto_variable ] +!140 = metadata !{i32 607, i32 30, metadata !23, null} +!141 = metadata !{i32 610, i32 17, metadata !142, null} +!142 = metadata !{i32 589835, metadata !23, i32 609, i32 200, metadata !24, i32 94} ; [ DW_TAG_lexical_block ] +!143 = metadata !{i32 611, i32 17, metadata !142, null} +!144 = metadata !{i32 612, i32 17, metadata !142, null} +!145 = metadata !{i32 613, i32 17, metadata !142, null} +!146 = metadata !{i32 615, i32 13, metadata !142, null} diff --git a/test/CodeGen/ARM/dyn-stackalloc.ll b/test/CodeGen/ARM/dyn-stackalloc.ll index 92e2d136af68d..de2820e98a1dd 100644 --- a/test/CodeGen/ARM/dyn-stackalloc.ll +++ b/test/CodeGen/ARM/dyn-stackalloc.ll @@ -1,48 +1,48 @@ ; RUN: llc < %s -march=arm - %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } - %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } +%struct.comment = type { i8**, i32*, i32, i8* } +%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } +%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } + +@str215 = external global [2 x i8] define void @t1(%struct.state* %v) { - %tmp6 = load i32* null - %tmp8 = alloca float, i32 %tmp6 - store i32 1, i32* null - br i1 false, label %bb123.preheader, label %return - -bb123.preheader: - br i1 false, label %bb43, label %return - -bb43: - call fastcc void @f1( float* %tmp8, float* null, i32 0 ) - %tmp70 = load i32* null - %tmp85 = getelementptr float* %tmp8, i32 0 - call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 ) - ret void - -return: - ret void + %tmp6 = load i32* null + %tmp8 = alloca float, i32 %tmp6 + store i32 1, i32* null + br i1 false, label %bb123.preheader, label %return + +bb123.preheader: ; preds = %0 + br i1 false, label %bb43, label %return + +bb43: ; preds = %bb123.preheader + call fastcc void @f1(float* %tmp8, float* null, i32 0) + %tmp70 = load i32* null + %tmp85 = getelementptr float* %tmp8, i32 0 + call fastcc void @f2(float* null, float* null, float* %tmp85, i32 %tmp70) + ret void + +return: ; preds = %bb123.preheader, %0 + ret void } declare fastcc void @f1(float*, float*, i32) declare fastcc void @f2(float*, float*, float*, i32) - %struct.comment = type { i8**, i32*, i32, i8* } -@str215 = external global [2 x i8] - define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { - %tmp1 = call i32 @strlen( i8* %tag ) - %tmp3 = call i32 @strlen( i8* %contents ) - %tmp4 = add i32 %tmp1, 2 - %tmp5 = add i32 %tmp4, %tmp3 - %tmp6 = alloca i8, i32 %tmp5 - %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag ) - %tmp6.len = call i32 @strlen( i8* %tmp6 ) - %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len - call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 ) - %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents ) - call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 ) - ret void + %tmp1 = call i32 @strlen(i8* %tag) + %tmp3 = call i32 @strlen(i8* %contents) + %tmp4 = add i32 %tmp1, 2 + %tmp5 = add i32 %tmp4, %tmp3 + %tmp6 = alloca i8, i32 %tmp5 + %tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag) + %tmp6.len = call i32 @strlen(i8* %tmp6) + %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false) + %tmp15 = call i8* @strcat(i8* %tmp6, i8* %contents) + call fastcc void @comment_add(%struct.comment* %vc, i8* %tmp6) + ret void } declare i32 @strlen(i8*) @@ -51,6 +51,6 @@ declare i8* @strcat(i8*, i8*) declare fastcc void @comment_add(%struct.comment*, i8*) -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - declare i8* @strcpy(i8*, i8*) + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/ARM/fast-isel-static.ll b/test/CodeGen/ARM/fast-isel-static.ll index 2d79674028caa..a86e3251f715b 100644 --- a/test/CodeGen/ARM/fast-isel-static.ll +++ b/test/CodeGen/ARM/fast-isel-static.ll @@ -23,7 +23,7 @@ entry: %z = alloca float, align 4 store float 0.000000e+00, float* %ztot, align 4 store float 1.000000e+00, float* %z, align 4 -; CHECK-LONG: blx r2 +; CHECK-LONG: blx r ; CHECK-NORM: bl _myadd call void @myadd(float* %ztot, float* %z) ret i32 0 diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index 499c97fe53cf9..eb0c5c86925d1 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -43,7 +43,7 @@ b1: br label %b2 ; THUMB: add.w {{.*}} #4096 -; ARM: add {{.*}} #1, #20 +; ARM: add {{.*}} #4096 b2: %b = add i32 %tmp, 4095 diff --git a/test/CodeGen/ARM/fold-const.ll b/test/CodeGen/ARM/fold-const.ll new file mode 100644 index 0000000000000..227e4e8aaa243 --- /dev/null +++ b/test/CodeGen/ARM/fold-const.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s + +define i32 @f(i32 %a) nounwind readnone optsize ssp { +entry: + %conv = zext i32 %a to i64 + %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv) +; CHECK: clz +; CHECK-NOT: adds + %cast = trunc i64 %tmp1 to i32 + %sub = sub nsw i32 63, %cast + ret i32 %sub +} + +declare i64 @llvm.ctlz.i64(i64) nounwind readnone diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll index 8ef45f2bbc978..ac023d19ec351 100644 --- a/test/CodeGen/ARM/fp.ll +++ b/test/CodeGen/ARM/fp.ll @@ -42,7 +42,7 @@ entry: define double @h(double* %v) { ;CHECK: h: -;CHECK: vldr.64 +;CHECK: vldr.64 ;CHECK-NEXT: vmov entry: %tmp = load double* %v ; <double> [#uses=1] @@ -51,7 +51,7 @@ entry: define float @h2() { ;CHECK: h2: -;CHECK: mov r0, #254, #10 +;CHECK: mov r0, #1065353216 entry: ret float 1.000000e+00 } diff --git a/test/CodeGen/ARM/globals.ll b/test/CodeGen/ARM/globals.ll index ccb14280df9be..5e7e3f2a92eb9 100644 --- a/test/CodeGen/ARM/globals.ll +++ b/test/CodeGen/ARM/globals.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=DarwinStatic -; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DarwinDynamic -; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=DarwinPIC -; RUN: llc < %s -mtriple=arm-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LinuxPIC +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=DarwinStatic +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DarwinDynamic +; RUN: llc < %s -mtriple=armv6-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=DarwinPIC +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LinuxPIC @G = external global i32 diff --git a/test/CodeGen/ARM/hello.ll b/test/CodeGen/ARM/hello.ll index bfed7a6630b4b..9f46ae078d83b 100644 --- a/test/CodeGen/ARM/hello.ll +++ b/test/CodeGen/ARM/hello.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=arm -; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | count 1 -; RUN: llc < %s -mtriple=arm-linux-gnu --disable-fp-elim | \ +; RUN: llc < %s -mtriple=armv6-linux-gnueabi | grep mov | count 1 +; RUN: llc < %s -mtriple=armv6-linux-gnu --disable-fp-elim | \ ; RUN: grep mov | count 2 -; RUN: llc < %s -mtriple=arm-apple-darwin | grep mov | count 2 +; RUN: llc < %s -mtriple=armv6-apple-darwin | grep mov | count 2 @str = internal constant [12 x i8] c"Hello World\00" diff --git a/test/CodeGen/ARM/iabs.ll b/test/CodeGen/ARM/iabs.ll index 63808b238bff9..c01c041cfe8f6 100644 --- a/test/CodeGen/ARM/iabs.ll +++ b/test/CodeGen/ARM/iabs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+v4t | FileCheck %s ;; Integer absolute value, should produce something as good as: ARM: ;; add r3, r0, r0, asr #31 diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll index e6aa044564a2b..b073a05fc9c53 100644 --- a/test/CodeGen/ARM/ifcvt1.ll +++ b/test/CodeGen/ARM/ifcvt1.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=arm -; RUN: llc < %s -march=arm | grep bx | count 1 +; RUN: llc < %s -march=arm -mattr=+v4t +; RUN: llc < %s -march=arm -mattr=+v4t | grep bx | count 1 define i32 @t1(i32 %a, i32 %b) { %tmp2 = icmp eq i32 %a, 0 diff --git a/test/CodeGen/ARM/ifcvt2.ll b/test/CodeGen/ARM/ifcvt2.ll index 7b9d0cf32cff0..1bca10a7c6465 100644 --- a/test/CodeGen/ARM/ifcvt2.ll +++ b/test/CodeGen/ARM/ifcvt2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+v4t | FileCheck %s define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK: t1: diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll index f7ebac6f2bac9..3e2c578dd0626 100644 --- a/test/CodeGen/ARM/ifcvt3.ll +++ b/test/CodeGen/ARM/ifcvt3.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=arm -; RUN: llc < %s -march=arm | grep cmpne | count 1 -; RUN: llc < %s -march=arm | grep bx | count 2 +; RUN: llc < %s -march=arm -mattr=+v4t +; RUN: llc < %s -march=arm -mattr=+v4t | grep cmpne | count 1 +; RUN: llc < %s -march=arm -mattr=+v4t | grep bx | count 2 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { switch i32 %c, label %cond_next [ diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll index f0ab9dd7ea005..25a0f936544e1 100644 --- a/test/CodeGen/ARM/indirectbr.ll +++ b/test/CodeGen/ARM/indirectbr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -relocation-model=pic -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=ARM -; RUN: llc < %s -relocation-model=pic -mtriple=thumb-apple-darwin | FileCheck %s -check-prefix=THUMB +; RUN: llc < %s -relocation-model=pic -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -relocation-model=pic -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=THUMB ; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2 @nextaddr = global i8* null ; <i8**> [#uses=2] diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll index 58687b9692463..853585d9499a4 100644 --- a/test/CodeGen/ARM/inlineasm3.ll +++ b/test/CodeGen/ARM/inlineasm3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon,+v6t2 | FileCheck %s ; Radar 7449043 %struct.int32x4_t = type { <4 x i32> } @@ -58,3 +58,43 @@ entry: call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind ret i32 0 } + +; Radar 9307836 & 9119939 + +define float @t6(float %y) nounwind { +entry: +; CHECK: t6 +; CHECK: flds s15, s0 + %0 = tail call float asm "flds s15, $0", "=x"() nounwind + ret float %0 +} + +; Radar 9307836 & 9119939 + +define double @t7(double %y) nounwind { +entry: +; CHECK: t7 +; CHECK: flds s15, d0 + %0 = tail call double asm "flds s15, $0", "=x"() nounwind + ret double %0 +} + +; Radar 9307836 & 9119939 + +define float @t8(float %y) nounwind { +entry: +; CHECK: t8 +; CHECK: flds s15, s0 + %0 = tail call float asm "flds s15, $0", "=t"() nounwind + ret float %0 +} + +; Radar 9307836 & 9119939 + +define i32 @t9(i32 %r0) nounwind { +entry: +; CHECK: t9 +; CHECK: movw r0, #27182 + %0 = tail call i32 asm "movw $0, $1", "=r,j"(i32 27182) nounwind + ret i32 %0 +} diff --git a/test/CodeGen/ARM/jumptable-label.ll b/test/CodeGen/ARM/jumptable-label.ll new file mode 100644 index 0000000000000..49d698672f824 --- /dev/null +++ b/test/CodeGen/ARM/jumptable-label.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple thumbv6-apple-macosx10.6.0 | FileCheck %s + +; test that we print the label of a bb that is only used in a jump table. + +; CHECK: .long LBB0_2 +; CHECK: LBB0_2: + +define i32 @calculate() { +entry: + switch i32 undef, label %return [ + i32 1, label %sw.bb + i32 2, label %sw.bb6 + i32 3, label %sw.bb13 + i32 4, label %sw.bb20 + ] + +sw.bb: ; preds = %entry + br label %return + +sw.bb6: ; preds = %entry + br label %return + +sw.bb13: ; preds = %entry + br label %return + +sw.bb20: ; preds = %entry + %div = sdiv i32 undef, undef + br label %return + +return: ; preds = %sw.bb20, %sw.bb13, %sw.bb6, %sw.bb, %entry + %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ] + ret i32 %retval.0 +} diff --git a/test/CodeGen/ARM/ldr_frame.ll b/test/CodeGen/ARM/ldr_frame.ll index a3abdb603fa79..f071b8922d6f7 100644 --- a/test/CodeGen/ARM/ldr_frame.ll +++ b/test/CodeGen/ARM/ldr_frame.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm | not grep mov +; RUN: llc < %s -march=arm -mattr=+v4t | not grep mov define i32 @f1() { %buf = alloca [32 x i32], align 4 diff --git a/test/CodeGen/ARM/long.ll b/test/CodeGen/ARM/long.ll index e401dca1ca805..0f1c7be6a3d2a 100644 --- a/test/CodeGen/ARM/long.ll +++ b/test/CodeGen/ARM/long.ll @@ -14,14 +14,14 @@ entry: define i64 @f3() { ; CHECK: f3: -; CHECK: mvn r0, #2, #2 +; CHECK: mvn r0, #-2147483648 entry: ret i64 2147483647 } define i64 @f4() { ; CHECK: f4: -; CHECK: mov r0, #2, #2 +; CHECK: mov r0, #-2147483648 entry: ret i64 2147483648 } @@ -29,7 +29,7 @@ entry: define i64 @f5() { ; CHECK: f5: ; CHECK: mvn r0, #0 -; CHECK: mvn r1, #2, #2 +; CHECK: mvn r1, #-2147483648 entry: ret i64 9223372036854775807 } diff --git a/test/CodeGen/ARM/lsr-unfolded-offset.ll b/test/CodeGen/ARM/lsr-unfolded-offset.ll index e3e6eae31fef3..61b25bb94af96 100644 --- a/test/CodeGen/ARM/lsr-unfolded-offset.ll +++ b/test/CodeGen/ARM/lsr-unfolded-offset.ll @@ -4,12 +4,13 @@ ; register pressure and therefore spilling. There is more room for improvement ; here. -; CHECK: sub sp, #{{32|24}} +; CHECK: sub sp, #{{32|28|24}} -; CHECK: ldr r{{.*}}, [sp, #4] -; CHECK-NEXT: ldr r{{.*}}, [sp, #16] -; CHECK-NEXT: ldr r{{.*}}, [sp, #12] -; CHECK-NEXT: adds +; CHECK: %for.inc +; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # +; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # +; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, # +; CHECK: add target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-macosx10.7.0" diff --git a/test/CodeGen/ARM/memcpy-inline.ll b/test/CodeGen/ARM/memcpy-inline.ll index 5bae037cafb3c..30b9f59a8b3d0 100644 --- a/test/CodeGen/ARM/memcpy-inline.ll +++ b/test/CodeGen/ARM/memcpy-inline.ll @@ -6,13 +6,14 @@ ; CHECK: ldrb %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } + @src = external global %struct.x @dst = external global %struct.x define i32 @t() { entry: - call void @llvm.memcpy.i32( i8* getelementptr (%struct.x* @dst, i32 0, i32 0), i8* getelementptr (%struct.x* @src, i32 0, i32 0), i32 11, i32 8 ) - ret i32 0 + call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false) + ret i32 0 } -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/ARM/memfunc.ll b/test/CodeGen/ARM/memfunc.ll index 032129d5b1ee5..aeda02282b99c 100644 --- a/test/CodeGen/ARM/memfunc.ll +++ b/test/CodeGen/ARM/memfunc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -o - | FileCheck %s +; RUN: llc < %s -mtriple=armv7-apple-ios -o - | FileCheck %s ; RUN: llc < %s -mtriple=arm-none-eabi -o - | FileCheck --check-prefix=EABI %s @from = common global [500 x i32] zeroinitializer, align 4 @@ -9,24 +9,21 @@ entry: ; CHECK: memmove ; EABI: __aeabi_memmove - call void @llvm.memmove.i32( i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0 ) + call void @llvm.memmove.p0i8.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0, i1 false) ; CHECK: memcpy ; EABI: __aeabi_memcpy - call void @llvm.memcpy.i32( i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0 ) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8* bitcast ([500 x i32]* @to to i8*), i32 500, i32 0, i1 false) ; EABI memset swaps arguments ; CHECK: mov r1, #0 ; CHECK: memset ; EABI: mov r2, #0 ; EABI: __aeabi_memset - call void @llvm.memset.i32( i8* bitcast ([500 x i32]* @from to i8*), i8 0, i32 500, i32 0 ) + call void @llvm.memset.p0i8.i32(i8* bitcast ([500 x i32]* @from to i8*), i8 0, i32 500, i32 0, i1 false) unreachable } -declare void @llvm.memmove.i32(i8*, i8*, i32, i32) - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare void @llvm.memset.i32(i8*, i8, i32, i32) - +declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind diff --git a/test/CodeGen/ARM/phi.ll b/test/CodeGen/ARM/phi.ll index 29e17c095a745..dc1a95b0b78a0 100644 --- a/test/CodeGen/ARM/phi.ll +++ b/test/CodeGen/ARM/phi.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=arm < %s | FileCheck %s +; RUN: llc -march=arm -mattr=+v4t < %s | FileCheck %s ; <rdar://problem/8686347> define i32 @test1(i1 %a, i32* %b) { @@ -20,4 +20,4 @@ end: %r = load i32* %gep ; CHECK-NEXT: bx lr ret i32 %r -}
\ No newline at end of file +} diff --git a/test/CodeGen/ARM/prefetch.ll b/test/CodeGen/ARM/prefetch.ll index 95f082aa9385a..9c8ff2b409620 100644 --- a/test/CodeGen/ARM/prefetch.ll +++ b/test/CodeGen/ARM/prefetch.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld -; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2 -; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s -check-prefix=ARM +; RUN: llc < %s -march=thumb -mattr=+v7 | FileCheck %s -check-prefix=THUMB2 +; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s -check-prefix=ARM ; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP ; rdar://8601536 @@ -17,8 +17,8 @@ entry: ; THUMB2: t1: ; THUMB2-NOT: pldw [r0] ; THUMB2: pld [r0] - tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 ) - tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) ret void } @@ -30,7 +30,7 @@ entry: ; THUMB2: t2: ; THUMB2: pld [r0, #1023] %tmp = getelementptr i8* %ptr, i32 1023 - tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 ) + tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3, i32 1 ) ret void } @@ -45,7 +45,7 @@ entry: %tmp1 = lshr i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 %tmp3 = inttoptr i32 %tmp2 to i8* - tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 ) ret void } @@ -59,8 +59,19 @@ entry: %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 %tmp3 = inttoptr i32 %tmp2 to i8* - tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 ) + tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 ) ret void } -declare void @llvm.prefetch(i8*, i32, i32) nounwind +declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind + +define void @t5(i8* %ptr) nounwind { +entry: +; ARM: t5: +; ARM: pli [r0] + +; THUMB2: t5: +; THUMB2: pli [r0] + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 ) + ret void +} diff --git a/test/CodeGen/ARM/private.ll b/test/CodeGen/ARM/private.ll index fba56b4ffeeb9..f93ffe7b339aa 100644 --- a/test/CodeGen/ARM/private.ll +++ b/test/CodeGen/ARM/private.ll @@ -6,8 +6,6 @@ ; RUN: grep .Lbaz: %t ; RUN: grep long.*\.Lbaz %t -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll index d350937c683e8..3a19211112802 100644 --- a/test/CodeGen/ARM/reg_sequence.ll +++ b/test/CodeGen/ARM/reg_sequence.ll @@ -124,7 +124,7 @@ return1: return2: ; CHECK: %return2 ; CHECK: vadd.i32 -; CHECK: vmov {{q[0-9]+}}, {{q[0-9]+}} +; CHECK: vorr {{q[0-9]+}}, {{q[0-9]+}} ; CHECK-NOT: vmov ; CHECK: vst2.32 {d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}} %tmp100 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0 ; <<4 x i32>> [#uses=1] @@ -139,7 +139,7 @@ define <8 x i16> @t5(i16* %A, <8 x i16>* %B) nounwind { ; CHECK: t5: ; CHECK: vldmia ; How can FileCheck match Q and D registers? We need a lisp interpreter. -; CHECK: vmov {{q[0-9]+}}, {{q[0-9]+}} +; CHECK: vorr {{q[0-9]+}}, {{q[0-9]+}}, {{q[0-9]+}} ; CHECK-NOT: vmov ; CHECK: vld2.16 {d{{[0-9]+}}[1], d{{[0-9]+}}[1]}, [r0] ; CHECK-NOT: vmov @@ -156,7 +156,7 @@ define <8 x i16> @t5(i16* %A, <8 x i16>* %B) nounwind { define <8 x i8> @t6(i8* %A, <8 x i8>* %B) nounwind { ; CHECK: t6: ; CHECK: vldr.64 -; CHECK: vmov d[[D0:[0-9]+]], d[[D1:[0-9]+]] +; CHECK: vorr d[[D0:[0-9]+]], d[[D1:[0-9]+]] ; CHECK-NEXT: vld2.8 {d[[D1]][1], d[[D0]][1]} %tmp1 = load <8 x i8>* %B ; <<8 x i8>> [#uses=2] %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1) ; <%struct.__neon_int8x8x2_t> [#uses=2] @@ -172,7 +172,7 @@ entry: ; CHECK: vld2.32 ; CHECK: vst2.32 ; CHECK: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, -; CHECK: vmov q[[Q0:[0-9]+]], q[[Q1:[0-9]+]] +; CHECK: vorr q[[Q0:[0-9]+]], q[[Q1:[0-9]+]], q[[Q1:[0-9]+]] ; CHECK-NOT: vmov ; CHECK: vuzp.32 q[[Q1]], q[[Q0]] ; CHECK: vst1.32 @@ -272,8 +272,8 @@ define arm_aapcs_vfpcc float @t9(%0* nocapture, %3* nocapture) nounwind { define arm_aapcs_vfpcc i32 @t10() nounwind { entry: ; CHECK: t10: -; CHECK: vmul.f32 q8, q8, d0[0] ; CHECK: vmov.i32 q[[Q0:[0-9]+]], #0x3F000000 +; CHECK: vmul.f32 q8, q8, d0[0] ; CHECK: vadd.f32 q8, q8, q8 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll index 4170ff3071ade..ea44c28fb707c 100644 --- a/test/CodeGen/ARM/rev.ll +++ b/test/CodeGen/ARM/rev.ll @@ -54,3 +54,73 @@ entry: %conv8 = ashr exact i32 %sext, 16 ret i32 %conv8 } + +; rdar://9609059 +define i32 @test5(i32 %i) nounwind readnone { +entry: +; CHECK: test5 +; CHECK: revsh r0, r0 + %shl = shl i32 %i, 24 + %shr = ashr exact i32 %shl, 16 + %shr23 = lshr i32 %i, 8 + %and = and i32 %shr23, 255 + %or = or i32 %shr, %and + ret i32 %or +} + +; rdar://9609108 +define i32 @test6(i32 %x) nounwind readnone { +entry: +; CHECK: test6 +; CHECK: rev16 r0, r0 + %and = shl i32 %x, 8 + %shl = and i32 %and, 65280 + %and2 = lshr i32 %x, 8 + %shr11 = and i32 %and2, 255 + %shr5 = and i32 %and2, 16711680 + %shl9 = and i32 %and, -16777216 + %or = or i32 %shr5, %shl9 + %or6 = or i32 %or, %shr11 + %or10 = or i32 %or6, %shl + ret i32 %or10 +} + +; rdar://9164521 +define i32 @test7(i32 %a) nounwind readnone { +entry: +; CHECK: test7 +; CHECK: rev r0, r0 +; CHECK: lsr r0, r0, #16 + %and = lshr i32 %a, 8 + %shr3 = and i32 %and, 255 + %and2 = shl i32 %a, 8 + %shl = and i32 %and2, 65280 + %or = or i32 %shr3, %shl + ret i32 %or +} + +define i32 @test8(i32 %a) nounwind readnone { +entry: +; CHECK: test8 +; CHECK: revsh r0, r0 + %and = lshr i32 %a, 8 + %shr4 = and i32 %and, 255 + %and2 = shl i32 %a, 8 + %or = or i32 %shr4, %and2 + %sext = shl i32 %or, 16 + %conv3 = ashr exact i32 %sext, 16 + ret i32 %conv3 +} + +define zeroext i16 @test9(i16 zeroext %v) nounwind readnone { +entry: +; CHECK: test9 +; CHECK: rev r0, r0 +; CHECK: lsr r0, r0, #16 + %conv = zext i16 %v to i32 + %shr4 = lshr i32 %conv, 8 + %shl = shl nuw nsw i32 %conv, 8 + %or = or i32 %shr4, %shl + %conv3 = trunc i32 %or to i16 + ret i16 %conv3 +} diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll index 7a566d49d322d..27620562c1631 100644 --- a/test/CodeGen/ARM/section.ll +++ b/test/CodeGen/ARM/section.ll @@ -1,7 +1,6 @@ -; RUN: llc < %s -mtriple=arm-linux | \ -; RUN: grep {__DTOR_END__:} -; RUN: llc < %s -mtriple=arm-linux | \ -; RUN: grep {\\.section.\\.dtors,"aw",.progbits} +; RUN: llc < %s -mtriple=arm-linux | FileCheck %s +; CHECK: .section .dtors,"aw",%progbits +; CHECK: __DTOR_END__: @__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors" ; <[1 x i32]*> [#uses=0] diff --git a/test/CodeGen/ARM/select-imm.ll b/test/CodeGen/ARM/select-imm.ll index 43f8a66bb21df..f43dde52bbfda 100644 --- a/test/CodeGen/ARM/select-imm.ll +++ b/test/CodeGen/ARM/select-imm.ll @@ -6,7 +6,7 @@ define i32 @t1(i32 %c) nounwind readnone { entry: ; ARM: t1: ; ARM: mov [[R1:r[0-9]+]], #101 -; ARM: orr [[R1b:r[0-9]+]], [[R1]], #1, #24 +; ARM: orr [[R1b:r[0-9]+]], [[R1]], #256 ; ARM: movgt r0, #123 ; ARMT2: t1: @@ -27,7 +27,7 @@ entry: ; ARM: t2: ; ARM: mov r0, #123 ; ARM: movgt r0, #101 -; ARM: orrgt r0, r0, #1, #24 +; ARM: orrgt r0, r0, #256 ; ARMT2: t2: ; ARMT2: mov r0, #123 @@ -76,3 +76,39 @@ entry: %1 = select i1 %0, i32 4283826005, i32 %x ret i32 %1 } + +; rdar://9758317 +define i32 @t5(i32 %a) nounwind { +entry: +; ARM: t5: +; ARM-NOT: mov +; ARM: cmp r0, #1 +; ARM-NOT: mov +; ARM: movne r0, #0 + +; THUMB2: t5: +; THUMB2-NOT: mov +; THUMB2: cmp r0, #1 +; THUMB2: it ne +; THUMB2: movne r0, #0 + %cmp = icmp eq i32 %a, 1 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + +define i32 @t6(i32 %a) nounwind { +entry: +; ARM: t6: +; ARM-NOT: mov +; ARM: cmp r0, #0 +; ARM: movne r0, #1 + +; THUMB2: t6: +; THUMB2-NOT: mov +; THUMB2: cmp r0, #0 +; THUMB2: it ne +; THUMB2: movne r0, #1 + %tobool = icmp ne i32 %a, 0 + %lnot.ext = zext i1 %tobool to i32 + ret i32 %lnot.ext +} diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll index 4211797ef77e2..8a3133adf3eb8 100644 --- a/test/CodeGen/ARM/select_xform.ll +++ b/test/CodeGen/ARM/select_xform.ll @@ -4,7 +4,7 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; ARM: t1: -; ARM: sub r0, r1, #6, #2 +; ARM: sub r0, r1, #-2147483647 ; ARM: movgt r0, r1 ; T2: t1: diff --git a/test/CodeGen/ARM/sub.ll b/test/CodeGen/ARM/sub.ll index 555b18eb1e990..06ea703fc74bf 100644 --- a/test/CodeGen/ARM/sub.ll +++ b/test/CodeGen/ARM/sub.ll @@ -12,7 +12,7 @@ define i64 @f1(i64 %a) { ; 66846720 = 0x03fc0000 define i64 @f2(i64 %a) { ; CHECK: f2 -; CHECK: subs r0, r0, #255, #14 +; CHECK: subs r0, r0, #66846720 ; CHECK: sbc r1, r1, #0 %tmp = sub i64 %a, 66846720 ret i64 %tmp diff --git a/test/CodeGen/ARM/sxt_rot.ll b/test/CodeGen/ARM/sxt_rot.ll index 4752f17f1e1c3..355fee30723ff 100644 --- a/test/CodeGen/ARM/sxt_rot.ll +++ b/test/CodeGen/ARM/sxt_rot.ll @@ -10,7 +10,7 @@ define i32 @test0(i8 %A) { ret i32 %B } -define i8 @test1(i32 %A) signext { +define signext i8 @test1(i32 %A) { %B = lshr i32 %A, 8 %C = shl i32 %A, 24 %D = or i32 %B, %C @@ -18,7 +18,7 @@ define i8 @test1(i32 %A) signext { ret i8 %E } -define i32 @test2(i32 %A, i32 %X) signext { +define signext i32 @test2(i32 %A, i32 %X) { %B = lshr i32 %A, 8 %C = shl i32 %A, 24 %D = or i32 %B, %C diff --git a/test/CodeGen/ARM/truncstore-dag-combine.ll b/test/CodeGen/ARM/truncstore-dag-combine.ll index 2da08b60e86cd..5665440aa1d65 100644 --- a/test/CodeGen/ARM/truncstore-dag-combine.ll +++ b/test/CodeGen/ARM/truncstore-dag-combine.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=arm | not grep orr -; RUN: llc < %s -march=arm | not grep mov +; RUN: llc < %s -march=arm -mattr=+v4t | not grep orr +; RUN: llc < %s -march=arm -mattr=+v4t | not grep mov define void @bar(i8* %P, i16* %Q) { entry: diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll index 6307795499bf4..628c0795d81a1 100644 --- a/test/CodeGen/ARM/uxt_rot.ll +++ b/test/CodeGen/ARM/uxt_rot.ll @@ -2,19 +2,19 @@ ; RUN: llc < %s -march=arm -mattr=+v6 | grep uxtab | count 1 ; RUN: llc < %s -march=arm -mattr=+v6 | grep uxth | count 1 -define i8 @test1(i32 %A.u) zeroext { +define zeroext i8 @test1(i32 %A.u) { %B.u = trunc i32 %A.u to i8 ret i8 %B.u } -define i32 @test2(i32 %A.u, i32 %B.u) zeroext { +define zeroext i32 @test2(i32 %A.u, i32 %B.u) { %C.u = trunc i32 %B.u to i8 %D.u = zext i8 %C.u to i32 %E.u = add i32 %A.u, %D.u ret i32 %E.u } -define i32 @test3(i32 %A.u) zeroext { +define zeroext i32 @test3(i32 %A.u) { %B.u = lshr i32 %A.u, 8 %C.u = shl i32 %A.u, 24 %D.u = or i32 %B.u, %C.u diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll index e4ef9e3c36c12..e390cf0514433 100644 --- a/test/CodeGen/ARM/vargs_align.ll +++ b/test/CodeGen/ARM/vargs_align.ll @@ -6,7 +6,6 @@ entry: %a_addr = alloca i32 ; <i32*> [#uses=1] %retval = alloca i32, align 4 ; <i32*> [#uses=2] %tmp = alloca i32, align 4 ; <i32*> [#uses=2] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %a, i32* %a_addr store i32 0, i32* %tmp %tmp1 = load i32* %tmp ; <i32> [#uses=1] diff --git a/test/CodeGen/ARM/vcvt_combine.ll b/test/CodeGen/ARM/vcvt_combine.ll new file mode 100644 index 0000000000000..3009e50c532b4 --- /dev/null +++ b/test/CodeGen/ARM/vcvt_combine.ll @@ -0,0 +1,99 @@ +; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s + +@in = global float 0x400921FA00000000, align 4 + +; Test signed conversion. +; CHECK: t0 +; CHECK-NOT: vmul +define void @t0() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 + %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> + %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> + tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind + ret void +} + +declare void @foo_int32x2_t(<2 x i32>) + +; Test unsigned conversion. +; CHECK: t1 +; CHECK-NOT: vmul +define void @t1() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 + %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> + %vcvt.i = fptoui <2 x float> %mul.i to <2 x i32> + tail call void @foo_uint32x2_t(<2 x i32> %vcvt.i) nounwind + ret void +} + +declare void @foo_uint32x2_t(<2 x i32>) + +; Test which should not fold due to non-power of 2. +; CHECK: t2 +; CHECK: vmul +define void @t2() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 + %mul.i = fmul <2 x float> %vecinit2.i, <float 0x401B333340000000, float 0x401B333340000000> + %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> + tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind + ret void +} + +; Test which should not fold due to power of 2 out of range. +; CHECK: t3 +; CHECK: vmul +define void @t3() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 + %mul.i = fmul <2 x float> %vecinit2.i, <float 0x4200000000000000, float 0x4200000000000000> + %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> + tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind + ret void +} + +; Test which case where const is max power of 2 (i.e., 2^32). +; CHECK: t4 +; CHECK-NOT: vmul +define void @t4() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 + %mul.i = fmul <2 x float> %vecinit2.i, <float 0x41F0000000000000, float 0x41F0000000000000> + %vcvt.i = fptosi <2 x float> %mul.i to <2 x i32> + tail call void @foo_int32x2_t(<2 x i32> %vcvt.i) nounwind + ret void +} + +; Test quadword. +; CHECK: t5 +; CHECK-NOT: vmul +define void @t5() nounwind { +entry: + %tmp = load float* @in, align 4, !tbaa !0 + %vecinit.i = insertelement <4 x float> undef, float %tmp, i32 0 + %vecinit2.i = insertelement <4 x float> %vecinit.i, float %tmp, i32 1 + %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %tmp, i32 2 + %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %tmp, i32 3 + %mul.i = fmul <4 x float> %vecinit6.i, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00> + %vcvt.i = fptosi <4 x float> %mul.i to <4 x i32> + tail call void @foo_int32x4_t(<4 x i32> %vcvt.i) nounwind + ret void +} + +declare void @foo_int32x4_t(<4 x i32>) + +!0 = metadata !{metadata !"float", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/vdiv_combine.ll b/test/CodeGen/ARM/vdiv_combine.ll new file mode 100644 index 0000000000000..13873932abd7d --- /dev/null +++ b/test/CodeGen/ARM/vdiv_combine.ll @@ -0,0 +1,102 @@ +; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s + +@in = global float 0x400921FA00000000, align 4 +@iin = global i32 -1023, align 4 +@uin = global i32 1023, align 4 + +declare void @foo_int32x4_t(<4 x i32>) + +; Test signed conversion. +; CHECK: t1 +; CHECK-NOT: vdiv +define void @t1() nounwind { +entry: + %tmp = load i32* @iin, align 4, !tbaa !3 + %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 + %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> + %div.i = fdiv <2 x float> %vcvt.i, <float 8.000000e+00, float 8.000000e+00> + tail call void @foo_float32x2_t(<2 x float> %div.i) nounwind + ret void +} + +declare void @foo_float32x2_t(<2 x float>) + +; Test unsigned conversion. +; CHECK: t2 +; CHECK-NOT: vdiv +define void @t2() nounwind { +entry: + %tmp = load i32* @uin, align 4, !tbaa !3 + %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 + %vcvt.i = uitofp <2 x i32> %vecinit2.i to <2 x float> + %div.i = fdiv <2 x float> %vcvt.i, <float 8.000000e+00, float 8.000000e+00> + tail call void @foo_float32x2_t(<2 x float> %div.i) nounwind + ret void +} + +; Test which should not fold due to non-power of 2. +; CHECK: t3 +; CHECK: vdiv +define void @t3() nounwind { +entry: + %tmp = load i32* @iin, align 4, !tbaa !3 + %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 + %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> + %div.i = fdiv <2 x float> %vcvt.i, <float 0x401B333340000000, float 0x401B333340000000> + tail call void @foo_float32x2_t(<2 x float> %div.i) nounwind + ret void +} + +; Test which should not fold due to power of 2 out of range. +; CHECK: t4 +; CHECK: vdiv +define void @t4() nounwind { +entry: + %tmp = load i32* @iin, align 4, !tbaa !3 + %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 + %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> + %div.i = fdiv <2 x float> %vcvt.i, <float 0x4200000000000000, float 0x4200000000000000> + tail call void @foo_float32x2_t(<2 x float> %div.i) nounwind + ret void +} + +; Test case where const is max power of 2 (i.e., 2^32). +; CHECK: t5 +; CHECK-NOT: vdiv +define void @t5() nounwind { +entry: + %tmp = load i32* @iin, align 4, !tbaa !3 + %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 + %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> + %div.i = fdiv <2 x float> %vcvt.i, <float 0x41F0000000000000, float 0x41F0000000000000> + tail call void @foo_float32x2_t(<2 x float> %div.i) nounwind + ret void +} + +; Test quadword. +; CHECK: t6 +; CHECK-NOT: vdiv +define void @t6() nounwind { +entry: + %tmp = load i32* @iin, align 4, !tbaa !3 + %vecinit.i = insertelement <4 x i32> undef, i32 %tmp, i32 0 + %vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %tmp, i32 1 + %vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %tmp, i32 2 + %vecinit6.i = insertelement <4 x i32> %vecinit4.i, i32 %tmp, i32 3 + %vcvt.i = sitofp <4 x i32> %vecinit6.i to <4 x float> + %div.i = fdiv <4 x float> %vcvt.i, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00> + tail call void @foo_float32x4_t(<4 x float> %div.i) nounwind + ret void +} + +declare void @foo_float32x4_t(<4 x float>) + +!0 = metadata !{metadata !"float", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/CodeGen/ARM/vmul.ll b/test/CodeGen/ARM/vmul.ll index 1fd6581ae0816..1780d6e66be76 100644 --- a/test/CodeGen/ARM/vmul.ll +++ b/test/CodeGen/ARM/vmul.ll @@ -439,9 +439,9 @@ define <2 x i64> @vmull_extvec_u32(<2 x i32> %arg) nounwind { } ; rdar://9197392 -define void @distribue(i16* %dst, i8* %src, i32 %mul) nounwind { +define void @distribute(i16* %dst, i8* %src, i32 %mul) nounwind { entry: -; CHECK: distribue: +; CHECK: distribute: ; CHECK: vmull.u8 [[REG1:(q[0-9]+)]], d{{.*}}, [[REG2:(d[0-9]+)]] ; CHECK: vmlal.u8 [[REG1]], d{{.*}}, [[REG2]] %0 = trunc i32 %mul to i8 @@ -471,9 +471,9 @@ declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind %struct.uint8x8_t = type { <8 x i8> } -define void @distribue2(%struct.uint8x8_t* nocapture %dst, i8* %src, i32 %mul) nounwind { +define void @distribute2(%struct.uint8x8_t* nocapture %dst, i8* %src, i32 %mul) nounwind { entry: -; CHECK: distribue2 +; CHECK: distribute2 ; CHECK-NOT: vadd.i8 ; CHECK: vmul.i8 ; CHECK: vmla.i8 @@ -492,3 +492,25 @@ entry: store <8 x i8> %10, <8 x i8>* %11, align 8 ret void } + +define void @distribute2_commutative(%struct.uint8x8_t* nocapture %dst, i8* %src, i32 %mul) nounwind { +entry: +; CHECK: distribute2_commutative +; CHECK-NOT: vadd.i8 +; CHECK: vmul.i8 +; CHECK: vmla.i8 + %0 = trunc i32 %mul to i8 + %1 = insertelement <8 x i8> undef, i8 %0, i32 0 + %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <8 x i32> zeroinitializer + %3 = tail call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %src, i32 1) + %4 = bitcast <16 x i8> %3 to <2 x double> + %5 = extractelement <2 x double> %4, i32 1 + %6 = bitcast double %5 to <8 x i8> + %7 = extractelement <2 x double> %4, i32 0 + %8 = bitcast double %7 to <8 x i8> + %9 = add <8 x i8> %6, %8 + %10 = mul <8 x i8> %2, %9 + %11 = getelementptr inbounds %struct.uint8x8_t* %dst, i32 0, i32 0 + store <8 x i8> %10, <8 x i8>* %11, align 8 + ret void +} diff --git a/test/CodeGen/ARM/vpadd.ll b/test/CodeGen/ARM/vpadd.ll index 212557394518a..1ba68f5523858 100644 --- a/test/CodeGen/ARM/vpadd.ll +++ b/test/CodeGen/ARM/vpadd.ll @@ -138,6 +138,20 @@ define <2 x i64> @vpaddlQu32(<4 x i32>* %A) nounwind { ret <2 x i64> %tmp2 } +; Test AddCombine optimization that generates a vpaddl.s +define void @addCombineToVPADDL() nounwind ssp { +; CHECK: vpaddl.s8 + %cbcr = alloca <16 x i8>, align 16 + %X = alloca <8 x i8>, align 8 + %tmp = load <16 x i8>* %cbcr + %tmp1 = shufflevector <16 x i8> %tmp, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> + %tmp2 = load <16 x i8>* %cbcr + %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> + %add = add <8 x i8> %tmp3, %tmp1 + store <8 x i8> %add, <8 x i8>* %X, align 8 + ret void +} + declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone declare <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32>) nounwind readnone diff --git a/test/CodeGen/ARM/vqdmul.ll b/test/CodeGen/ARM/vqdmul.ll index 8dcc7f73633c3..08e7d2b2c0d4e 100644 --- a/test/CodeGen/ARM/vqdmul.ll +++ b/test/CodeGen/ARM/vqdmul.ll @@ -152,7 +152,6 @@ entry: ret <2 x i32> %1 } -declare <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32>, <2 x i32>) nounwind readnone declare <4 x i16> @llvm.arm.neon.vqrdmulh.v4i16(<4 x i16>, <4 x i16>) nounwind readnone declare <2 x i32> @llvm.arm.neon.vqrdmulh.v2i32(<2 x i32>, <2 x i32>) nounwind readnone diff --git a/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll b/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll deleted file mode 100644 index 87d992836bc3c..0000000000000 --- a/test/CodeGen/Alpha/2005-07-12-TwoMallocCalls.ll +++ /dev/null @@ -1,17 +0,0 @@ -; There should be exactly two calls here (memset and malloc), no more. -; RUN: llc < %s -march=alpha | grep jsr | count 2 - -%typedef.bc_struct = type opaque -declare void @llvm.memset.i64(i8*, i8, i64, i32) - -define i1 @l12_l94_bc_divide_endif_2E_3_2E_ce(i32* %tmp.71.reload, i32 %scale2.1.3, i32 %extra.0, %typedef.bc_struct* %n1, %typedef.bc_struct* %n2, i32* %tmp.92.reload, i32 %tmp.94.reload, i32* %tmp.98.reload, i32 %tmp.100.reload, i8** %tmp.112.out, i32* %tmp.157.out, i8** %tmp.158.out) { -newFuncRoot: - %tmp.120 = add i32 %extra.0, 2 ; <i32> [#uses=1] - %tmp.122 = add i32 %tmp.120, %tmp.94.reload ; <i32> [#uses=1] - %tmp.123 = add i32 %tmp.122, %tmp.100.reload ; <i32> [#uses=2] - %tmp.112 = malloc i8, i32 %tmp.123 ; <i8*> [#uses=1] - %tmp.137 = zext i32 %tmp.123 to i64 ; <i64> [#uses=1] - tail call void @llvm.memset.i64( i8* %tmp.112, i8 0, i64 %tmp.137, i32 0 ) - ret i1 true -} - diff --git a/test/CodeGen/Alpha/add.ll b/test/CodeGen/Alpha/add.ll index cd883f64a6ba6..8a926954c3b12 100644 --- a/test/CodeGen/Alpha/add.ll +++ b/test/CodeGen/Alpha/add.ll @@ -17,19 +17,19 @@ ; RUN: grep {s8subq} %t.s | count 2 -define i32 @al(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @al(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.3.s = add i32 %y.s, %x.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @ali(i32 signext %x.s) signext { +define signext i32 @ali(i32 signext %x.s) { entry: %tmp.3.s = add i32 100, %x.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i64 @aq(i64 signext %x.s, i64 signext %y.s) signext { +define signext i64 @aq(i64 signext %x.s, i64 signext %y.s) { entry: %tmp.3.s = add i64 %y.s, %x.s ; <i64> [#uses=1] ret i64 %tmp.3.s @@ -41,13 +41,13 @@ entry: ret i64 %tmp.3.s } -define i32 @sl(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @sl(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.3.s = sub i32 %y.s, %x.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @sli(i32 signext %x.s) signext { +define signext i32 @sli(i32 signext %x.s) { entry: %tmp.3.s = sub i32 %x.s, 100 ; <i32> [#uses=1] ret i32 %tmp.3.s @@ -65,14 +65,14 @@ entry: ret i64 %tmp.3.s } -define i32 @a4l(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @a4l(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @a8l(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @a8l(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] %tmp.3.s = add i32 %tmp.1.s, %x.s ; <i32> [#uses=1] @@ -93,14 +93,14 @@ entry: ret i64 %tmp.3.s } -define i32 @a4li(i32 signext %y.s) signext { +define signext i32 @a4li(i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @a8li(i32 signext %y.s) signext { +define signext i32 @a8li(i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] %tmp.3.s = add i32 100, %tmp.1.s ; <i32> [#uses=1] @@ -121,14 +121,14 @@ entry: ret i64 %tmp.3.s } -define i32 @s4l(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @s4l(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @s8l(i32 signext %x.s, i32 signext %y.s) signext { +define signext i32 @s8l(i32 signext %x.s, i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] %tmp.3.s = sub i32 %tmp.1.s, %x.s ; <i32> [#uses=1] @@ -149,14 +149,14 @@ entry: ret i64 %tmp.3.s } -define i32 @s4li(i32 signext %y.s) signext { +define signext i32 @s4li(i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 2 ; <i32> [#uses=1] %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1] ret i32 %tmp.3.s } -define i32 @s8li(i32 signext %y.s) signext { +define signext i32 @s8li(i32 signext %y.s) { entry: %tmp.1.s = shl i32 %y.s, 3 ; <i32> [#uses=1] %tmp.3.s = sub i32 %tmp.1.s, 100 ; <i32> [#uses=1] diff --git a/test/CodeGen/Alpha/i32_sub_1.ll b/test/CodeGen/Alpha/i32_sub_1.ll index ffeafbd75938d..35b1d08dbd57b 100644 --- a/test/CodeGen/Alpha/i32_sub_1.ll +++ b/test/CodeGen/Alpha/i32_sub_1.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=alpha | grep -i {subl \$16,1,\$0} -define i32 @foo(i32 signext %x) signext { +define signext i32 @foo(i32 signext %x) { entry: %tmp.1 = add i32 %x, -1 ; <int> [#uses=1] ret i32 %tmp.1 diff --git a/test/CodeGen/Alpha/private.ll b/test/CodeGen/Alpha/private.ll index 26076e0f8d3cd..f8d30940c0c28 100644 --- a/test/CodeGen/Alpha/private.ll +++ b/test/CodeGen/Alpha/private.ll @@ -6,8 +6,6 @@ ; RUN: grep \\\$baz: %t ; RUN: grep ldah.*\\\$baz %t -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/Alpha/zapnot.ll b/test/CodeGen/Alpha/zapnot.ll index d00984acf7f32..a47035e7f0e62 100644 --- a/test/CodeGen/Alpha/zapnot.ll +++ b/test/CodeGen/Alpha/zapnot.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -march=alpha | grep zapnot -define i16 @foo(i64 %y) zeroext { +define zeroext i16 @foo(i64 %y) { entry: %tmp.1 = trunc i64 %y to i16 ; <ushort> [#uses=1] ret i16 %tmp.1 diff --git a/test/CodeGen/Blackfin/add-overflow.ll b/test/CodeGen/Blackfin/add-overflow.ll index e982e437d6871..8dcf3f84e9629 100644 --- a/test/CodeGen/Blackfin/add-overflow.ll +++ b/test/CodeGen/Blackfin/add-overflow.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=bfin -verify-machineinstrs > %t - type { i24, i1 } ; type %0 + %0 = type { i24, i1 } ; type %0 define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind { entry: diff --git a/test/CodeGen/Blackfin/burg.ll b/test/CodeGen/Blackfin/burg.ll deleted file mode 100644 index 8cc3713b7e73a..0000000000000 --- a/test/CodeGen/Blackfin/burg.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -march=bfin -verify-machineinstrs > %t - - %IntList = type %struct.intlist* - %ReadFn = type i32 ()* - %YYSTYPE = type { %IntList } - %struct.intlist = type { i32, %IntList } -@yyval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1] - -define i32 @yyparse() { -bb0: - %reg254 = load i16* null ; <i16> [#uses=1] - %reg254-idxcast = sext i16 %reg254 to i64 ; <i64> [#uses=1] - %reg254-idxcast-scale = mul i64 %reg254-idxcast, -1 ; <i64> [#uses=1] - %reg254-idxcast-scale-offset = add i64 %reg254-idxcast-scale, 1 ; <i64> [#uses=1] - %reg261.idx1 = getelementptr %YYSTYPE* null, i64 %reg254-idxcast-scale-offset, i32 0 ; <%IntList*> [#uses=1] - %reg261 = load %IntList* %reg261.idx1 ; <%IntList> [#uses=1] - store %IntList %reg261, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - unreachable -} diff --git a/test/CodeGen/Blackfin/many-args.ll b/test/CodeGen/Blackfin/many-args.ll index 8c52874e773b5..2df32ca354d84 100644 --- a/test/CodeGen/Blackfin/many-args.ll +++ b/test/CodeGen/Blackfin/many-args.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=bfin -verify-machineinstrs - type { i32, float, float, float, float, float, float, float, float, float, float } ; type %0 + %0 = type { i32, float, float, float, float, float, float, float, float, float, float } ; type %0 %struct..s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float } define i32 @main(i32 %argc.1, i8** %argv.1) { diff --git a/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll b/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll deleted file mode 100644 index 3b2085c950c49..0000000000000 --- a/test/CodeGen/CBackend/2002-08-20-RecursiveTypes.ll +++ /dev/null @@ -1,3 +0,0 @@ -; RUN: llc < %s -march=c - -@MyIntList = external global { \2*, i32 } diff --git a/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll b/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll deleted file mode 100644 index 2563d8cb51e62..0000000000000 --- a/test/CodeGen/CBackend/2002-10-15-OpaqueTypeProblem.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=c - -%MPI_Comm = type %struct.Comm* -%struct.Comm = type opaque -@thing = global %MPI_Comm* null ; <%MPI_Comm**> [#uses=0] - diff --git a/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll b/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll deleted file mode 100644 index 54e0aa6c0bb94..0000000000000 --- a/test/CodeGen/CBackend/2002-10-30-FunctionPointerAlloca.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=c - - %BitField = type i32 - %tokenptr = type i32* - -define void @test() { - %pmf1 = alloca %tokenptr (%tokenptr, i8*)* ; <%tokenptr (%tokenptr, i8*)**> [#uses=0] - ret void -} - diff --git a/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll b/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll deleted file mode 100644 index 1c5f5061df633..0000000000000 --- a/test/CodeGen/CBackend/2005-03-08-RecursiveTypeCrash.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - - %JNIEnv = type %struct.JNINa* - %struct.JNINa = type { i8*, i8*, i8*, void (%JNIEnv*)* } - diff --git a/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll b/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll deleted file mode 100644 index 8a5f2532e701f..0000000000000 --- a/test/CodeGen/CBackend/2007-01-15-NamedArrayType.ll +++ /dev/null @@ -1,11 +0,0 @@ -; PR918 -; RUN: llc < %s -march=c | not grep {l_structtype_s l_fixarray_array3} - -%structtype_s = type { i32 } -%fixarray_array3 = type [3 x %structtype_s] - -define i32 @witness(%fixarray_array3* %p) { - %q = getelementptr %fixarray_array3* %p, i32 0, i32 0, i32 0 - %v = load i32* %q - ret i32 %v -} diff --git a/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll b/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll deleted file mode 100644 index 8db3167e54d46..0000000000000 --- a/test/CodeGen/CBackend/2008-05-21-MRV-InlineAsm.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -march=c - -declare {i32, i32} @foo() - -define i32 @test() { - %A = call {i32, i32} @foo() - %B = getresult {i32, i32} %A, 0 - %C = getresult {i32, i32} %A, 1 - %D = add i32 %B, %C - ret i32 %D -} - -define i32 @test2() { - %A = call {i32, i32} asm sideeffect "...", "={cx},={di},~{dirflag},~{fpsr},~{flags},~{memory}"() - %B = getresult {i32, i32} %A, 0 - %C = getresult {i32, i32} %A, 1 - %D = add i32 %B, %C - ret i32 %D -} diff --git a/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll b/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll new file mode 100644 index 0000000000000..0ae480dcfdbe8 --- /dev/null +++ b/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -march=c +; Check that uadd and sadd with overflow are handled by C Backend. + +%0 = type { i32, i1 } ; type %0 + +define i1 @func1(i32 zeroext %v1, i32 zeroext %v2) nounwind { +entry: + %t = call %0 @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) ; <%0> [#uses=1] + %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1] + br i1 %obit, label %carry, label %normal + +normal: ; preds = %entry + ret i1 true + +carry: ; preds = %entry + ret i1 false +} + +define i1 @func2(i32 signext %v1, i32 signext %v2) nounwind { +entry: + %t = call %0 @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2) ; <%0> [#uses=1] + %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1] + br i1 %obit, label %carry, label %normal + +normal: ; preds = %entry + ret i1 true + +carry: ; preds = %entry + ret i1 false +} + +declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind + +declare %0 @llvm.uadd.with.overflow.i32(i32, i32) nounwind + diff --git a/test/CodeGen/CBackend/2008-06-04-IndirectMem.ll b/test/CodeGen/CBackend/X86/2008-06-04-IndirectMem.ll index 054a3cad900da..054a3cad900da 100644 --- a/test/CodeGen/CBackend/2008-06-04-IndirectMem.ll +++ b/test/CodeGen/CBackend/X86/2008-06-04-IndirectMem.ll diff --git a/test/CodeGen/CBackend/X86/dg.exp b/test/CodeGen/CBackend/X86/dg.exp new file mode 100644 index 0000000000000..833bcc57025c6 --- /dev/null +++ b/test/CodeGen/CBackend/X86/dg.exp @@ -0,0 +1,5 @@ +load_lib llvm.exp + +if { [llvm_supports_target X86] && [llvm_gcc_supports c] } { + RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp,s}]] +} diff --git a/test/CodeGen/CPP/llvm2cpp.ll b/test/CodeGen/CPP/llvm2cpp.ll deleted file mode 100644 index d0ba0cfac3125..0000000000000 --- a/test/CodeGen/CPP/llvm2cpp.ll +++ /dev/null @@ -1,756 +0,0 @@ -; RUN: llvm-as < %s | llvm-dis > /dev/null -; RUN: llc < %s -march=cpp -cppgen=program -o - - -@X = global i32 4, align 16 ; <i32*> [#uses=0] - -define i32* @test1012() align 32 { - %X = alloca i32, align 4 ; <i32*> [#uses=1] - %Y = alloca i32, i32 42, align 16 ; <i32*> [#uses=0] - %Z = alloca i32 ; <i32*> [#uses=0] - ret i32* %X -} - -define i32* @test1013() { - %X = malloc i32, align 4 ; <i32*> [#uses=1] - %Y = malloc i32, i32 42, align 16 ; <i32*> [#uses=0] - %Z = malloc i32 ; <i32*> [#uses=0] - ret i32* %X -} - -define void @void(i32, i32) { - add i32 0, 0 ; <i32>:3 [#uses=2] - sub i32 0, 4 ; <i32>:4 [#uses=2] - br label %5 - -; <label>:5 ; preds = %5, %2 - add i32 %0, %1 ; <i32>:6 [#uses=2] - sub i32 %6, %4 ; <i32>:7 [#uses=1] - icmp sle i32 %7, %3 ; <i1>:8 [#uses=1] - br i1 %8, label %9, label %5 - -; <label>:9 ; preds = %5 - add i32 %0, %1 ; <i32>:10 [#uses=0] - sub i32 %6, %4 ; <i32>:11 [#uses=1] - icmp sle i32 %11, %3 ; <i1>:12 [#uses=0] - ret void -} - -define i32 @zarro() { -Startup: - ret i32 0 -} - -define fastcc void @foo() { - ret void -} - -define coldcc void @bar() { - call fastcc void @foo( ) - ret void -} - -define void @structret({ i8 }* sret %P) { - call void @structret( { i8 }* %P sret ) - ret void -} - -define void @foo4() { - ret void -} - -define coldcc void @bar2() { - call fastcc void @foo( ) - ret void -} - -define cc42 void @bar3() { - invoke fastcc void @foo( ) - to label %Ok unwind label %U - -Ok: ; preds = %0 - ret void - -U: ; preds = %0 - unwind -} - -define void @bar4() { - call cc42 void @bar( ) - invoke cc42 void @bar3( ) - to label %Ok unwind label %U - -Ok: ; preds = %0 - ret void - -U: ; preds = %0 - unwind -} -; ModuleID = 'calltest.ll' - %FunTy = type i32 (i32) - -define i32 @test1000(i32 %i0) { - ret i32 %i0 -} - -define void @invoke(%FunTy* %x) { - %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0] - %foo2 = tail call i32 %x( i32 123 ) ; <i32> [#uses=0] - ret void -} - -define i32 @main(i32 %argc) { - %retval = call i32 @test1000( i32 %argc ) ; <i32> [#uses=2] - %two = add i32 %retval, %retval ; <i32> [#uses=1] - %retval2 = invoke i32 @test1000( i32 %argc ) - to label %Next unwind label %Error ; <i32> [#uses=1] - -Next: ; preds = %0 - %two2 = add i32 %two, %retval2 ; <i32> [#uses=1] - call void @invoke( %FunTy* @test1000 ) - ret i32 %two2 - -Error: ; preds = %0 - ret i32 -1 -} -; ModuleID = 'casttest.ll' - -define i16 @FunFunc(i64 %x, i8 %z) { -bb0: - %cast110 = sext i8 %z to i16 ; <i16> [#uses=1] - %cast10 = trunc i64 %x to i16 ; <i16> [#uses=1] - %reg109 = add i16 %cast110, %cast10 ; <i16> [#uses=1] - ret i16 %reg109 -} -; ModuleID = 'cfgstructures.ll' - -define void @irreducible(i1 %cond) { - br i1 %cond, label %X, label %Y - -X: ; preds = %Y, %0 - br label %Y - -Y: ; preds = %X, %0 - br label %X -} - -define void @sharedheader(i1 %cond) { - br label %A - -A: ; preds = %Y, %X, %0 - br i1 %cond, label %X, label %Y - -X: ; preds = %A - br label %A - -Y: ; preds = %A - br label %A -} - -define void @nested(i1 %cond1, i1 %cond2, i1 %cond3) { - br label %Loop1 - -Loop1: ; preds = %L2Exit, %0 - br label %Loop2 - -Loop2: ; preds = %L3Exit, %Loop1 - br label %Loop3 - -Loop3: ; preds = %Loop3, %Loop2 - br i1 %cond3, label %Loop3, label %L3Exit - -L3Exit: ; preds = %Loop3 - br i1 %cond2, label %Loop2, label %L2Exit - -L2Exit: ; preds = %L3Exit - br i1 %cond1, label %Loop1, label %L1Exit - -L1Exit: ; preds = %L2Exit - ret void -} -; ModuleID = 'constexpr.ll' - %SAType = type { i32, { [2 x float], i64 } } - %SType = type { i32, { float, { i8 } }, i64 } -global i64 1 ; <i64*>:0 [#uses=0] -global i64 74514 ; <i64*>:1 [#uses=0] -@t2 = global i32* @t1 ; <i32**> [#uses=0] -@t3 = global i32* @t1 ; <i32**> [#uses=2] -@t1 = global i32 4 ; <i32*> [#uses=2] -@t4 = global i32** @t3 ; <i32***> [#uses=1] -@t5 = global i32** @t3 ; <i32***> [#uses=0] -@t6 = global i32*** @t4 ; <i32****> [#uses=0] -@t7 = global float* inttoptr (i32 12345678 to float*) ; <float**> [#uses=0] -@t9 = global i32 8 ; <i32*> [#uses=0] -global i32* bitcast (float* @4 to i32*) ; <i32**>:2 [#uses=0] -global float* @4 ; <float**>:3 [#uses=0] -global float 0.000000e+00 ; <float*>:4 [#uses=2] -@array = constant [2 x i32] [ i32 12, i32 52 ] ; <[2 x i32]*> [#uses=1] -@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) ; <i32**> [#uses=1] -@arrayPtr5 = global i32** getelementptr (i32** @arrayPtr, i64 5) ; <i32***> [#uses=0] -@somestr = constant [11 x i8] c"hello world" ; <[11 x i8]*> [#uses=2] -@char5 = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 5) ; <i8**> [#uses=0] -@char8a = global i32* bitcast (i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8) to i32*) ; <i32**> [#uses=0] -@char8b = global i8* getelementptr ([11 x i8]* @somestr, i64 0, i64 8) ; <i8**> [#uses=0] -@S1 = global %SType* null ; <%SType**> [#uses=1] -@S2c = constant %SType { - i32 1, - { float, { i8 } } { float 2.000000e+00, { i8 } { i8 3 } }, - i64 4 } ; <%SType*> [#uses=3] -@S3c = constant %SAType { i32 1, { [2 x float], i64 } { [2 x float] [ float 2.000000e+00, float 3.000000e+00 ], i64 4 } } ; <%SAType*> [#uses=1] -@S1ptr = global %SType** @S1 ; <%SType***> [#uses=0] -@S2 = global %SType* @S2c ; <%SType**> [#uses=0] -@S3 = global %SAType* @S3c ; <%SAType**> [#uses=0] -@S1fld1a = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0) ; <float**> [#uses=0] -@S1fld1b = global float* getelementptr (%SType* @S2c, i64 0, i32 1, i32 0) ; <float**> [#uses=1] -@S1fld1bptr = global float** @S1fld1b ; <float***> [#uses=0] -@S2fld3 = global i8* getelementptr (%SType* @S2c, i64 0, i32 1, i32 1, i32 0) ; <i8**> [#uses=0] - -; ModuleID = 'constpointer.ll' -@cpt3 = global i32* @cpt1 ; <i32**> [#uses=1] -@cpt1 = global i32 4 ; <i32*> [#uses=2] -@cpt4 = global i32** @cpt3 ; <i32***> [#uses=0] -@cpt2 = global i32* @cpt1 ; <i32**> [#uses=0] -global float* @7 ; <float**>:0 [#uses=0] -global float* @7 ; <float**>:1 [#uses=0] -global float 0.000000e+00 ; <float*>:2 [#uses=3] -global float* @7 ; <float**>:3 [#uses=0] -@fptr = global void ()* @f ; <void ()**> [#uses=0] -@sptr1 = global [11 x i8]* @somestr ; <[11 x i8]**> [#uses=0] -@somestr2 = constant [11 x i8] c"hello world" ; <[11 x i8]*> [#uses=2] -@sptr2 = global [11 x i8]* @somestr2 ; <[11 x i8]**> [#uses=0] - -declare void @f() -; ModuleID = 'escaped_label.ll' - -define i32 @foo3() { - br label "foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?" - -"foo`~!@#$%^&*()-_=+{}[]\\|;:',<.>/?": ; preds = %0 - ret i32 17 -} -; ModuleID = 'float.ll' -@F1 = global float 4.000000e+00 ; <float*> [#uses=0] -@D1 = global double 4.000000e+00 ; <double*> [#uses=0] -; ModuleID = 'fold-fpcast.ll' - -define i32 @test1() { - ret i32 1080872141 -} - -define float @test1002() { - ret float 0x36E1000000000000 -} - -define i64 @test3() { - ret i64 4614256656431372362 -} - -define double @test4() { - ret double 2.075076e-322 -} -; ModuleID = 'forwardreftest.ll' - %myfn = type float (i32, double, i32, i16) - %myty = type i32 - %thisfuncty = type i32 (i32)* - -declare void @F(%thisfuncty, %thisfuncty, %thisfuncty) - -define i32 @zarro2(i32 %Func) { -Startup: - add i32 0, 10 ; <i32>:0 [#uses=0] - ret i32 0 -} - -define i32 @test1004(i32) { - call void @F( %thisfuncty @zarro2, %thisfuncty @test1004, %thisfuncty @foozball ) - ret i32 0 -} - -define i32 @foozball(i32) { - ret i32 0 -} - -; ModuleID = 'globalredefinition.ll' -@A = global i32* @B ; <i32**> [#uses=0] -@B = global i32 7 ; <i32*> [#uses=1] - -define void @test12312() { - ret void -} -; ModuleID = 'global_section.ll' -@GlobSec = global i32 4, section "foo", align 16 - -define void @test1005() section "bar" { - ret void -} - -; ModuleID = 'globalvars.ll' -@MyVar = external global i32 ; <i32*> [#uses=1] -@MyIntList = external global { \2*, i32 } ; <{ \2*, i32 }*> [#uses=1] -external global i32 ; <i32*>:0 [#uses=0] -@AConst = constant i32 123 ; <i32*> [#uses=0] -@AString = constant [4 x i8] c"test" ; <[4 x i8]*> [#uses=0] -@ZeroInit = global { [100 x i32], [40 x float] } zeroinitializer ; <{ [100 x i32], [40 x float] }*> [#uses=0] - -define i32 @foo10015(i32 %blah) { - store i32 5, i32* @MyVar - %idx = getelementptr { \2*, i32 }* @MyIntList, i64 0, i32 1 ; <i32*> [#uses=1] - store i32 12, i32* %idx - ret i32 %blah -} -; ModuleID = 'indirectcall2.ll' - -define i64 @test1006(i64 %X) { - ret i64 %X -} - -define i64 @fib(i64 %n) { -; <label>:0 - %T = icmp ult i64 %n, 2 ; <i1> [#uses=1] - br i1 %T, label %BaseCase, label %RecurseCase - -RecurseCase: ; preds = %0 - %result = call i64 @test1006( i64 %n ) ; <i64> [#uses=0] - br label %BaseCase - -BaseCase: ; preds = %RecurseCase, %0 - %X = phi i64 [ 1, %0 ], [ 2, %RecurseCase ] ; <i64> [#uses=1] - ret i64 %X -} -; ModuleID = 'indirectcall.ll' - -declare i32 @atoi(i8*) - -define i64 @fibonacc(i64 %n) { - icmp ult i64 %n, 2 ; <i1>:1 [#uses=1] - br i1 %1, label %BaseCase, label %RecurseCase - -BaseCase: ; preds = %0 - ret i64 1 - -RecurseCase: ; preds = %0 - %n2 = sub i64 %n, 2 ; <i64> [#uses=1] - %n1 = sub i64 %n, 1 ; <i64> [#uses=1] - %f2 = call i64 @fibonacc( i64 %n2 ) ; <i64> [#uses=1] - %f1 = call i64 @fibonacc( i64 %n1 ) ; <i64> [#uses=1] - %result = add i64 %f2, %f1 ; <i64> [#uses=1] - ret i64 %result -} - -define i64 @realmain(i32 %argc, i8** %argv) { -; <label>:0 - icmp eq i32 %argc, 2 ; <i1>:1 [#uses=1] - br i1 %1, label %HasArg, label %Continue - -HasArg: ; preds = %0 - %n1 = add i32 1, 1 ; <i32> [#uses=1] - br label %Continue - -Continue: ; preds = %HasArg, %0 - %n = phi i32 [ %n1, %HasArg ], [ 1, %0 ] ; <i32> [#uses=1] - %N = sext i32 %n to i64 ; <i64> [#uses=1] - %F = call i64 @fib( i64 %N ) ; <i64> [#uses=1] - ret i64 %F -} - -define i64 @trampoline(i64 %n, i64 (i64)* %fibfunc) { - %F = call i64 %fibfunc( i64 %n ) ; <i64> [#uses=1] - ret i64 %F -} - -define i32 @main2() { - %Result = call i64 @trampoline( i64 10, i64 (i64)* @fib ) ; <i64> [#uses=1] - %Result.upgrd.1 = trunc i64 %Result to i32 ; <i32> [#uses=1] - ret i32 %Result.upgrd.1 -} -; ModuleID = 'inlineasm.ll' -module asm "this is an inline asm block" -module asm "this is another inline asm block" - -define i32 @test1007() { - %X = call i32 asm "tricky here $0, $1", "=r,r"( i32 4 ) ; <i32> [#uses=1] - call void asm sideeffect "eieio", ""( ) - ret i32 %X -} -; ModuleID = 'instructions.ll' - -define i32 @test_extractelement(<4 x i32> %V) { - %R = extractelement <4 x i32> %V, i32 1 ; <i32> [#uses=1] - ret i32 %R -} - -define <4 x i32> @test_insertelement(<4 x i32> %V) { - %R = insertelement <4 x i32> %V, i32 0, i32 0 ; <<4 x i32>> [#uses=1] - ret <4 x i32> %R -} - -define <4 x i32> @test_shufflevector_u(<4 x i32> %V) { - %R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x i32>> [#uses=1] - ret <4 x i32> %R -} - -define <4 x float> @test_shufflevector_f(<4 x float> %V) { - %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1] - ret <4 x float> %R -} -; ModuleID = 'intrinsics.ll' - -declare i1 @llvm.isunordered.f32(float, float) - -declare i1 @llvm.isunordered.f64(double, double) - -declare void @llvm.prefetch(i8*, i32, i32) - -declare float @llvm.sqrt.f32(float) - -declare double @llvm.sqrt.f64(double) - -define void @libm() { - fcmp uno float 1.000000e+00, 2.000000e+00 ; <i1>:1 [#uses=0] - fcmp uno double 3.000000e+00, 4.000000e+00 ; <i1>:2 [#uses=0] - call void @llvm.prefetch( i8* null, i32 1, i32 3 ) - call float @llvm.sqrt.f32( float 5.000000e+00 ) ; <float>:3 [#uses=0] - call double @llvm.sqrt.f64( double 6.000000e+00 ) ; <double>:4 [#uses=0] - call i8 @llvm.ctpop.i8( i8 10 ) ; <i32>:5 [#uses=1] - call i16 @llvm.ctpop.i16( i16 11 ) ; <i32>:7 [#uses=1] - call i32 @llvm.ctpop.i32( i32 12 ) ; <i32>:9 [#uses=1] - call i64 @llvm.ctpop.i64( i64 13 ) ; <i32>:11 [#uses=1] - call i8 @llvm.ctlz.i8( i8 14 ) ; <i32>:13 [#uses=1] - call i16 @llvm.ctlz.i16( i16 15 ) ; <i32>:15 [#uses=1] - call i32 @llvm.ctlz.i32( i32 16 ) ; <i32>:17 [#uses=1] - call i64 @llvm.ctlz.i64( i64 17 ) ; <i32>:19 [#uses=1] - call i8 @llvm.cttz.i8( i8 18 ) ; <i32>:21 [#uses=1] - call i16 @llvm.cttz.i16( i16 19 ) ; <i32>:23 [#uses=1] - call i32 @llvm.cttz.i32( i32 20 ) ; <i32>:25 [#uses=1] - call i64 @llvm.cttz.i64( i64 21 ) ; <i32>:27 [#uses=1] - ret void -} - -declare i8 @llvm.ctpop.i8(i8) - -declare i16 @llvm.ctpop.i16(i16) - -declare i32 @llvm.ctpop.i32(i32) - -declare i64 @llvm.ctpop.i64(i64) - -declare i8 @llvm.ctlz.i8(i8) - -declare i16 @llvm.ctlz.i16(i16) - -declare i32 @llvm.ctlz.i32(i32) - -declare i64 @llvm.ctlz.i64(i64) - -declare i8 @llvm.cttz.i8(i8) - -declare i16 @llvm.cttz.i16(i16) - -declare i32 @llvm.cttz.i32(i32) - -declare i64 @llvm.cttz.i64(i64) - -; ModuleID = 'packed.ll' -@foo1 = external global <4 x float> ; <<4 x float>*> [#uses=2] -@foo102 = external global <2 x i32> ; <<2 x i32>*> [#uses=2] - -define void @main3() { - store <4 x float> < float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00 >, <4 x float>* @foo1 - store <2 x i32> < i32 4, i32 4 >, <2 x i32>* @foo102 - %l1 = load <4 x float>* @foo1 ; <<4 x float>> [#uses=0] - %l2 = load <2 x i32>* @foo102 ; <<2 x i32>> [#uses=0] - ret void -} - -; ModuleID = 'properties.ll' -target datalayout = "e-p:32:32" -target triple = "proc-vend-sys" -deplibs = [ "m", "c" ] -; ModuleID = 'prototype.ll' - -declare i32 @bar1017(i32 %in) - -define i32 @foo1016(i32 %blah) { - %xx = call i32 @bar1017( i32 %blah ) ; <i32> [#uses=1] - ret i32 %xx -} - -; ModuleID = 'recursivetype.ll' - %list = type { %list*, i32 } - -declare i8* @malloc(i32) - -define void @InsertIntoListTail(%list** %L, i32 %Data) { -bb1: - %reg116 = load %list** %L ; <%list*> [#uses=1] - %cast1004 = inttoptr i64 0 to %list* ; <%list*> [#uses=1] - %cond1000 = icmp eq %list* %reg116, %cast1004 ; <i1> [#uses=1] - br i1 %cond1000, label %bb3, label %bb2 - -bb2: ; preds = %bb2, %bb1 - %reg117 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1] - %cast1010 = bitcast %list** %reg117 to %list*** ; <%list***> [#uses=1] - %reg118 = load %list*** %cast1010 ; <%list**> [#uses=3] - %reg109 = load %list** %reg118 ; <%list*> [#uses=1] - %cast1005 = inttoptr i64 0 to %list* ; <%list*> [#uses=1] - %cond1001 = icmp ne %list* %reg109, %cast1005 ; <i1> [#uses=1] - br i1 %cond1001, label %bb2, label %bb3 - -bb3: ; preds = %bb2, %bb1 - %reg119 = phi %list** [ %reg118, %bb2 ], [ %L, %bb1 ] ; <%list**> [#uses=1] - %cast1006 = bitcast %list** %reg119 to i8** ; <i8**> [#uses=1] - %reg111 = call i8* @malloc( i32 16 ) ; <i8*> [#uses=3] - store i8* %reg111, i8** %cast1006 - %reg111.upgrd.1 = ptrtoint i8* %reg111 to i64 ; <i64> [#uses=1] - %reg1002 = add i64 %reg111.upgrd.1, 8 ; <i64> [#uses=1] - %reg1002.upgrd.2 = inttoptr i64 %reg1002 to i8* ; <i8*> [#uses=1] - %cast1008 = bitcast i8* %reg1002.upgrd.2 to i32* ; <i32*> [#uses=1] - store i32 %Data, i32* %cast1008 - %cast1003 = inttoptr i64 0 to i64* ; <i64*> [#uses=1] - %cast1009 = bitcast i8* %reg111 to i64** ; <i64**> [#uses=1] - store i64* %cast1003, i64** %cast1009 - ret void -} - -define %list* @FindData(%list* %L, i32 %Data) { -bb1: - br label %bb2 - -bb2: ; preds = %bb6, %bb1 - %reg115 = phi %list* [ %reg116, %bb6 ], [ %L, %bb1 ] ; <%list*> [#uses=4] - %cast1014 = inttoptr i64 0 to %list* ; <%list*> [#uses=1] - %cond1011 = icmp ne %list* %reg115, %cast1014 ; <i1> [#uses=1] - br i1 %cond1011, label %bb4, label %bb3 - -bb3: ; preds = %bb2 - ret %list* null - -bb4: ; preds = %bb2 - %idx = getelementptr %list* %reg115, i64 0, i32 1 ; <i32*> [#uses=1] - %reg111 = load i32* %idx ; <i32> [#uses=1] - %cond1013 = icmp ne i32 %reg111, %Data ; <i1> [#uses=1] - br i1 %cond1013, label %bb6, label %bb5 - -bb5: ; preds = %bb4 - ret %list* %reg115 - -bb6: ; preds = %bb4 - %idx2 = getelementptr %list* %reg115, i64 0, i32 0 ; <%list**> [#uses=1] - %reg116 = load %list** %idx2 ; <%list*> [#uses=1] - br label %bb2 -} -; ModuleID = 'simplecalltest.ll' - %FunTy = type i32 (i32) - -define void @invoke1019(%FunTy* %x) { - %foo = call i32 %x( i32 123 ) ; <i32> [#uses=0] - ret void -} - -define i32 @main4(i32 %argc, i8** %argv, i8** %envp) { - %retval = call i32 @test1008( i32 %argc ) ; <i32> [#uses=2] - %two = add i32 %retval, %retval ; <i32> [#uses=1] - %retval2 = call i32 @test1008( i32 %argc ) ; <i32> [#uses=1] - %two2 = add i32 %two, %retval2 ; <i32> [#uses=1] - call void @invoke1019( %FunTy* @test1008 ) - ret i32 %two2 -} - -define i32 @test1008(i32 %i0) { - ret i32 %i0 -} -; ModuleID = 'smallest.ll' -; ModuleID = 'small.ll' - %x = type i32 - -define i32 @foo1020(i32 %in) { -label: - ret i32 2 -} -; ModuleID = 'testalloca.ll' - %inners = type { float, { i8 } } - %struct = type { i32, %inners, i64 } - -define i32 @testfunction(i32 %i0, i32 %j0) { - alloca i8, i32 5 ; <i8*>:1 [#uses=0] - %ptr = alloca i32 ; <i32*> [#uses=2] - store i32 3, i32* %ptr - %val = load i32* %ptr ; <i32> [#uses=0] - %sptr = alloca %struct ; <%struct*> [#uses=2] - %nsptr = getelementptr %struct* %sptr, i64 0, i32 1 ; <%inners*> [#uses=1] - %ubsptr = getelementptr %inners* %nsptr, i64 0, i32 1 ; <{ i8 }*> [#uses=1] - %idx = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1] - store i8 4, i8* %idx - %fptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 0 ; <float*> [#uses=1] - store float 4.000000e+00, float* %fptr - ret i32 3 -} -; ModuleID = 'testconstants.ll' -@somestr3 = constant [11 x i8] c"hello world" -@array99 = constant [2 x i32] [ i32 12, i32 52 ] -constant { i32, i32 } { i32 4, i32 3 } ; <{ i32, i32 }*>:0 [#uses=0] - -define [2 x i32]* @testfunction99(i32 %i0, i32 %j0) { - ret [2 x i32]* @array -} - -define i8* @otherfunc(i32, double) { - %somestr = getelementptr [11 x i8]* @somestr3, i64 0, i64 0 ; <i8*> [#uses=1] - ret i8* %somestr -} - -define i8* @yetanotherfunc(i32, double) { - ret i8* null -} - -define i32 @negativeUnsigned() { - ret i32 -1 -} - -define i32 @largeSigned() { - ret i32 -394967296 -} -; ModuleID = 'testlogical.ll' - -define i32 @simpleAdd(i32 %i0, i32 %j0) { - %t1 = xor i32 %i0, %j0 ; <i32> [#uses=1] - %t2 = or i32 %i0, %j0 ; <i32> [#uses=1] - %t3 = and i32 %t1, %t2 ; <i32> [#uses=1] - ret i32 %t3 -} -; ModuleID = 'testmemory.ll' - %complexty = type { i32, { [4 x i8*], float }, double } - %struct = type { i32, { float, { i8 } }, i64 } - -define i32 @main6() { - call i32 @testfunction98( i64 0, i64 1 ) - ret i32 0 -} - -define i32 @testfunction98(i64 %i0, i64 %j0) { - %array0 = malloc [4 x i8] ; <[4 x i8]*> [#uses=2] - %size = add i32 2, 2 ; <i32> [#uses=1] - %array1 = malloc i8, i32 4 ; <i8*> [#uses=1] - %array2 = malloc i8, i32 %size ; <i8*> [#uses=1] - %idx = getelementptr [4 x i8]* %array0, i64 0, i64 2 ; <i8*> [#uses=1] - store i8 123, i8* %idx - free [4 x i8]* %array0 - free i8* %array1 - free i8* %array2 - %aa = alloca %complexty, i32 5 ; <%complexty*> [#uses=1] - %idx2 = getelementptr %complexty* %aa, i64 %i0, i32 1, i32 0, i64 %j0 ; <i8**> [#uses=1] - store i8* null, i8** %idx2 - %ptr = alloca i32 ; <i32*> [#uses=2] - store i32 3, i32* %ptr - %val = load i32* %ptr ; <i32> [#uses=0] - %sptr = alloca %struct ; <%struct*> [#uses=1] - %ubsptr = getelementptr %struct* %sptr, i64 0, i32 1, i32 1 ; <{ i8 }*> [#uses=1] - %idx3 = getelementptr { i8 }* %ubsptr, i64 0, i32 0 ; <i8*> [#uses=1] - store i8 4, i8* %idx3 - ret i32 3 -} -; ModuleID = 'testswitch.ll' - %int = type i32 - -define i32 @squared(i32 %i0) { - switch i32 %i0, label %Default [ - i32 1, label %Case1 - i32 2, label %Case2 - i32 4, label %Case4 - ] - -Default: ; preds = %0 - ret i32 -1 - -Case1: ; preds = %0 - ret i32 1 - -Case2: ; preds = %0 - ret i32 4 - -Case4: ; preds = %0 - ret i32 16 -} -; ModuleID = 'testvarargs.ll' - -declare i32 @printf(i8*, ...) - -define i32 @testvarar() { - call i32 (i8*, ...)* @printf( i8* null, i32 12, i8 42 ) ; <i32>:1 [#uses=1] - ret i32 %1 -} -; ModuleID = 'undefined.ll' -@X2 = global i32 undef ; <i32*> [#uses=0] - -declare i32 @atoi(i8*) - -define i32 @test1009() { - ret i32 undef -} - -define i32 @test1003() { - %X = add i32 undef, 1 ; <i32> [#uses=1] - ret i32 %X -} -; ModuleID = 'unreachable.ll' - -declare void @bar() - -define i32 @foo1021() { - unreachable -} - -define double @xyz() { - call void @bar( ) - unreachable -} -; ModuleID = 'varargs.ll' - -declare void @llvm.va_start(i8* %ap) - -declare void @llvm.va_copy(i8* %aq, i8* %ap) - -declare void @llvm.va_end(i8* %ap) - -define i32 @test1010(i32 %X, ...) { - %ap = alloca i8* ; <i8**> [#uses=4] - %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] - call void @llvm.va_start( i8* %va.upgrd.1 ) - %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1] - %aq = alloca i8* ; <i8**> [#uses=2] - %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1] - %va1.upgrd.3 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] - call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 ) - %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1] - call void @llvm.va_end( i8* %va.upgrd.4 ) - %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] - call void @llvm.va_end( i8* %va.upgrd.5 ) - ret i32 %tmp -} -; ModuleID = 'varargs_new.ll' - -declare void @llvm.va_start(i8*) - -declare void @llvm.va_copy(i8*, i8*) - -declare void @llvm.va_end(i8*) - -define i32 @test1011(i32 %X, ...) { - %ap = alloca i8* ; <i8**> [#uses=4] - %aq = alloca i8* ; <i8**> [#uses=2] - %va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] - call void @llvm.va_start( i8* %va.upgrd.1 ) - %tmp = va_arg i8** %ap, i32 ; <i32> [#uses=1] - %apv = load i8** %ap ; <i8*> [#uses=1] - %va0.upgrd.2 = bitcast i8** %aq to i8* ; <i8*> [#uses=1] - %va1.upgrd.3 = bitcast i8* %apv to i8* ; <i8*> [#uses=1] - call void @llvm.va_copy( i8* %va0.upgrd.2, i8* %va1.upgrd.3 ) - %va.upgrd.4 = bitcast i8** %aq to i8* ; <i8*> [#uses=1] - call void @llvm.va_end( i8* %va.upgrd.4 ) - %va.upgrd.5 = bitcast i8** %ap to i8* ; <i8*> [#uses=1] - call void @llvm.va_end( i8* %va.upgrd.5 ) - ret i32 %tmp -} -; ModuleID = 'weirdnames.ll' - "&^ " = type { i32 } -@"%.*+ foo" = global "&^ " { i32 5 } ; <"&^ "*> [#uses=0] -@"0" = global float 0.000000e+00 ; <float*> [#uses=0] diff --git a/test/CodeGen/CellSPU/and_ops.ll b/test/CodeGen/CellSPU/and_ops.ll index 139e97b967a73..72478a1ca62dc 100644 --- a/test/CodeGen/CellSPU/and_ops.ll +++ b/test/CodeGen/CellSPU/and_ops.ll @@ -201,12 +201,12 @@ define <4 x i32> @andi_v4i32_4(<4 x i32> %in) { ret <4 x i32> %tmp2 } -define i32 @andi_u32(i32 zeroext %in) zeroext { +define zeroext i32 @andi_u32(i32 zeroext %in) { %tmp37 = and i32 %in, 37 ret i32 %tmp37 } -define i32 @andi_i32(i32 signext %in) signext { +define signext i32 @andi_i32(i32 signext %in) { %tmp38 = and i32 %in, 37 ret i32 %tmp38 } @@ -241,12 +241,12 @@ define <8 x i16> @andhi_v8i16_4(<8 x i16> %in) { ret <8 x i16> %tmp2 } -define i16 @andhi_u16(i16 zeroext %in) zeroext { +define zeroext i16 @andhi_u16(i16 zeroext %in) { %tmp37 = and i16 %in, 37 ; <i16> [#uses=1] ret i16 %tmp37 } -define i16 @andhi_i16(i16 signext %in) signext { +define signext i16 @andhi_i16(i16 signext %in) { %tmp38 = and i16 %in, 37 ; <i16> [#uses=1] ret i16 %tmp38 } @@ -260,13 +260,13 @@ define <16 x i8> @and_v16i8(<16 x i8> %in) { ret <16 x i8> %tmp2 } -define i8 @and_u8(i8 zeroext %in) zeroext { +define zeroext i8 @and_u8(i8 zeroext %in) { ; ANDBI generated: %tmp37 = and i8 %in, 37 ret i8 %tmp37 } -define i8 @and_sext8(i8 signext %in) signext { +define signext i8 @and_sext8(i8 signext %in) { ; ANDBI generated %tmp38 = and i8 %in, 37 ret i8 %tmp38 diff --git a/test/CodeGen/CellSPU/eqv.ll b/test/CodeGen/CellSPU/eqv.ll index 22c8c3bff9401..79676814f2822 100644 --- a/test/CodeGen/CellSPU/eqv.ll +++ b/test/CodeGen/CellSPU/eqv.ll @@ -79,7 +79,7 @@ define i32 @equiv_i32_5(i32 %arg1, i32 %arg2) { ret i32 %C } -define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) { %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] %B = or i16 %arg1, %arg2 ; <i16> [#uses=1] %Bnot = xor i16 %B, -1 ; <i16> [#uses=1] @@ -87,7 +87,7 @@ define i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) signext { ret i16 %C } -define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) { %B = or i16 %arg1, %arg2 ; <i16> [#uses=1] %Bnot = xor i16 %B, -1 ; <i16> [#uses=1] %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] @@ -95,7 +95,7 @@ define i16 @equiv_i16_2(i16 signext %arg1, i16 signext %arg2) signext { ret i16 %C } -define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) { %B = or i16 %arg1, %arg2 ; <i16> [#uses=1] %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] %Bnot = xor i16 %B, -1 ; <i16> [#uses=1] @@ -103,7 +103,7 @@ define i16 @equiv_i16_3(i16 signext %arg1, i16 signext %arg2) signext { ret i16 %C } -define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext { +define signext i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) { %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] @@ -111,7 +111,7 @@ define i8 @equiv_i8_1(i8 signext %arg1, i8 signext %arg2) signext { ret i8 %C } -define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext { +define signext i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) { %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] @@ -119,7 +119,7 @@ define i8 @equiv_i8_2(i8 signext %arg1, i8 signext %arg2) signext { ret i8 %C } -define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext { +define signext i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) { %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] @@ -127,7 +127,7 @@ define i8 @equiv_i8_3(i8 signext %arg1, i8 signext %arg2) signext { ret i8 %C } -define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { +define zeroext i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) { %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] @@ -135,7 +135,7 @@ define i8 @equiv_u8_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { ret i8 %C } -define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { +define zeroext i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) { %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] @@ -143,7 +143,7 @@ define i8 @equiv_u8_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { ret i8 %C } -define i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { +define zeroext i8 @equiv_u8_3(i8 zeroext %arg1, i8 zeroext %arg2) { %B = or i8 %arg1, %arg2 ; <i8> [#uses=1] %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %Bnot = xor i8 %B, -1 ; <i8> [#uses=1] diff --git a/test/CodeGen/CellSPU/mul-with-overflow.ll b/test/CodeGen/CellSPU/mul-with-overflow.ll index d15da12649ead..c04e69e3e193d 100644 --- a/test/CodeGen/CellSPU/mul-with-overflow.ll +++ b/test/CodeGen/CellSPU/mul-with-overflow.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=cellspu declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b) -define i1 @a(i16 %x) zeroext nounwind { +define zeroext i1 @a(i16 %x) nounwind { %res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3) %obil = extractvalue {i16, i1} %res, 1 ret i1 %obil } declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b) -define i1 @b(i16 %x) zeroext nounwind { +define zeroext i1 @b(i16 %x) nounwind { %res = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %x, i16 3) %obil = extractvalue {i16, i1} %res, 1 ret i1 %obil diff --git a/test/CodeGen/CellSPU/nand.ll b/test/CodeGen/CellSPU/nand.ll index e1419232ece7d..b770cad8dfce7 100644 --- a/test/CodeGen/CellSPU/nand.ll +++ b/test/CodeGen/CellSPU/nand.ll @@ -60,49 +60,49 @@ define i32 @nand_i32_2(i32 %arg1, i32 %arg2) { ret i32 %B } -define i16 @nand_i16_1(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @nand_i16_1(i16 signext %arg1, i16 signext %arg2) { %A = and i16 %arg2, %arg1 ; <i16> [#uses=1] %B = xor i16 %A, -1 ; <i16> [#uses=1] ret i16 %B } -define i16 @nand_i16_2(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @nand_i16_2(i16 signext %arg1, i16 signext %arg2) { %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] %B = xor i16 %A, -1 ; <i16> [#uses=1] ret i16 %B } -define i16 @nand_i16u_1(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { +define zeroext i16 @nand_i16u_1(i16 zeroext %arg1, i16 zeroext %arg2) { %A = and i16 %arg2, %arg1 ; <i16> [#uses=1] %B = xor i16 %A, -1 ; <i16> [#uses=1] ret i16 %B } -define i16 @nand_i16u_2(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { +define zeroext i16 @nand_i16u_2(i16 zeroext %arg1, i16 zeroext %arg2) { %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] %B = xor i16 %A, -1 ; <i16> [#uses=1] ret i16 %B } -define i8 @nand_i8u_1(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { +define zeroext i8 @nand_i8u_1(i8 zeroext %arg1, i8 zeroext %arg2) { %A = and i8 %arg2, %arg1 ; <i8> [#uses=1] %B = xor i8 %A, -1 ; <i8> [#uses=1] ret i8 %B } -define i8 @nand_i8u_2(i8 zeroext %arg1, i8 zeroext %arg2) zeroext { +define zeroext i8 @nand_i8u_2(i8 zeroext %arg1, i8 zeroext %arg2) { %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %B = xor i8 %A, -1 ; <i8> [#uses=1] ret i8 %B } -define i8 @nand_i8_1(i8 signext %arg1, i8 signext %arg2) signext { +define signext i8 @nand_i8_1(i8 signext %arg1, i8 signext %arg2) { %A = and i8 %arg2, %arg1 ; <i8> [#uses=1] %B = xor i8 %A, -1 ; <i8> [#uses=1] ret i8 %B } -define i8 @nand_i8_2(i8 signext %arg1, i8 signext %arg2) signext { +define signext i8 @nand_i8_2(i8 signext %arg1, i8 signext %arg2) { %A = and i8 %arg1, %arg2 ; <i8> [#uses=1] %B = xor i8 %A, -1 ; <i8> [#uses=1] ret i8 %B diff --git a/test/CodeGen/CellSPU/or_ops.ll b/test/CodeGen/CellSPU/or_ops.ll index 8aa1e998bd0ee..46349b9f51d21 100644 --- a/test/CodeGen/CellSPU/or_ops.ll +++ b/test/CodeGen/CellSPU/or_ops.ll @@ -200,12 +200,12 @@ define <4 x i32> @ori_v4i32_4(<4 x i32> %in) { ret <4 x i32> %tmp2 } -define i32 @ori_u32(i32 zeroext %in) zeroext { +define zeroext i32 @ori_u32(i32 zeroext %in) { %tmp37 = or i32 %in, 37 ; <i32> [#uses=1] ret i32 %tmp37 } -define i32 @ori_i32(i32 signext %in) signext { +define signext i32 @ori_i32(i32 signext %in) { %tmp38 = or i32 %in, 37 ; <i32> [#uses=1] ret i32 %tmp38 } @@ -235,12 +235,12 @@ define <8 x i16> @orhi_v8i16_4(<8 x i16> %in) { ret <8 x i16> %tmp2 } -define i16 @orhi_u16(i16 zeroext %in) zeroext { +define zeroext i16 @orhi_u16(i16 zeroext %in) { %tmp37 = or i16 %in, 37 ; <i16> [#uses=1] ret i16 %tmp37 } -define i16 @orhi_i16(i16 signext %in) signext { +define signext i16 @orhi_i16(i16 signext %in) { %tmp38 = or i16 %in, 37 ; <i16> [#uses=1] ret i16 %tmp38 } @@ -253,12 +253,12 @@ define <16 x i8> @orbi_v16i8(<16 x i8> %in) { ret <16 x i8> %tmp2 } -define i8 @orbi_u8(i8 zeroext %in) zeroext { +define zeroext i8 @orbi_u8(i8 zeroext %in) { %tmp37 = or i8 %in, 37 ; <i8> [#uses=1] ret i8 %tmp37 } -define i8 @orbi_i8(i8 signext %in) signext { +define signext i8 @orbi_i8(i8 signext %in) { %tmp38 = or i8 %in, 37 ; <i8> [#uses=1] ret i8 %tmp38 } diff --git a/test/CodeGen/CellSPU/private.ll b/test/CodeGen/CellSPU/private.ll index 56f72e75b16ab..1d933adac939f 100644 --- a/test/CodeGen/CellSPU/private.ll +++ b/test/CodeGen/CellSPU/private.ll @@ -6,9 +6,6 @@ ; RUN: grep .Lbaz: %t ; RUN: grep ila.*\.Lbaz %t - -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll index c4a5abd290423..3252c776ecbfe 100644 --- a/test/CodeGen/CellSPU/shift_ops.ll +++ b/test/CodeGen/CellSPU/shift_ops.ll @@ -33,22 +33,22 @@ define i16 @shlh_i16_2(i16 %arg1, i16 %arg2) { ret i16 %A } -define i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) { %A = shl i16 %arg1, %arg2 ret i16 %A } -define i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) signext { +define signext i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) { %A = shl i16 %arg2, %arg1 ret i16 %A } -define i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { +define zeroext i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) { %A = shl i16 %arg1, %arg2 ret i16 %A } -define i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) zeroext { +define zeroext i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) { %A = shl i16 %arg2, %arg1 ret i16 %A } @@ -76,46 +76,46 @@ define i16 @shlhi_i16_4(i16 %arg1) { ret i16 %A } -define i16 @shlhi_i16_5(i16 signext %arg1) signext { +define signext i16 @shlhi_i16_5(i16 signext %arg1) { %A = shl i16 %arg1, 12 ret i16 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 -define i16 @shlhi_i16_6(i16 signext %arg1) signext { +define signext i16 @shlhi_i16_6(i16 signext %arg1) { %A = shl i16 %arg1, 0 ret i16 %A } -define i16 @shlhi_i16_7(i16 signext %arg1) signext { +define signext i16 @shlhi_i16_7(i16 signext %arg1) { %A = shl i16 16383, %arg1 ret i16 %A } ; Should generate 0, 0 << arg1 = 0 -define i16 @shlhi_i16_8(i16 signext %arg1) signext { +define signext i16 @shlhi_i16_8(i16 signext %arg1) { %A = shl i16 0, %arg1 ret i16 %A } -define i16 @shlhi_i16_9(i16 zeroext %arg1) zeroext { +define zeroext i16 @shlhi_i16_9(i16 zeroext %arg1) { %A = shl i16 %arg1, 12 ret i16 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 -define i16 @shlhi_i16_10(i16 zeroext %arg1) zeroext { +define zeroext i16 @shlhi_i16_10(i16 zeroext %arg1) { %A = shl i16 %arg1, 0 ret i16 %A } -define i16 @shlhi_i16_11(i16 zeroext %arg1) zeroext { +define zeroext i16 @shlhi_i16_11(i16 zeroext %arg1) { %A = shl i16 16383, %arg1 ret i16 %A } ; Should generate 0, 0 << arg1 = 0 -define i16 @shlhi_i16_12(i16 zeroext %arg1) zeroext { +define zeroext i16 @shlhi_i16_12(i16 zeroext %arg1) { %A = shl i16 0, %arg1 ret i16 %A } @@ -133,22 +133,22 @@ define i32 @shl_i32_2(i32 %arg1, i32 %arg2) { ret i32 %A } -define i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) signext { +define signext i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) { %A = shl i32 %arg1, %arg2 ret i32 %A } -define i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) signext { +define signext i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) { %A = shl i32 %arg2, %arg1 ret i32 %A } -define i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { +define zeroext i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) { %A = shl i32 %arg1, %arg2 ret i32 %A } -define i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) zeroext { +define zeroext i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) { %A = shl i32 %arg2, %arg1 ret i32 %A } @@ -176,46 +176,46 @@ define i32 @shli_i32_4(i32 %arg1) { ret i32 %A } -define i32 @shli_i32_5(i32 signext %arg1) signext { +define signext i32 @shli_i32_5(i32 signext %arg1) { %A = shl i32 %arg1, 12 ret i32 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 -define i32 @shli_i32_6(i32 signext %arg1) signext { +define signext i32 @shli_i32_6(i32 signext %arg1) { %A = shl i32 %arg1, 0 ret i32 %A } -define i32 @shli_i32_7(i32 signext %arg1) signext { +define signext i32 @shli_i32_7(i32 signext %arg1) { %A = shl i32 16383, %arg1 ret i32 %A } ; Should generate 0, 0 << arg1 = 0 -define i32 @shli_i32_8(i32 signext %arg1) signext { +define signext i32 @shli_i32_8(i32 signext %arg1) { %A = shl i32 0, %arg1 ret i32 %A } -define i32 @shli_i32_9(i32 zeroext %arg1) zeroext { +define zeroext i32 @shli_i32_9(i32 zeroext %arg1) { %A = shl i32 %arg1, 12 ret i32 %A } ; Should not generate anything other than the return, arg1 << 0 = arg1 -define i32 @shli_i32_10(i32 zeroext %arg1) zeroext { +define zeroext i32 @shli_i32_10(i32 zeroext %arg1) { %A = shl i32 %arg1, 0 ret i32 %A } -define i32 @shli_i32_11(i32 zeroext %arg1) zeroext { +define zeroext i32 @shli_i32_11(i32 zeroext %arg1) { %A = shl i32 16383, %arg1 ret i32 %A } ; Should generate 0, 0 << arg1 = 0 -define i32 @shli_i32_12(i32 zeroext %arg1) zeroext { +define zeroext i32 @shli_i32_12(i32 zeroext %arg1) { %A = shl i32 0, %arg1 ret i32 %A } diff --git a/test/CodeGen/CellSPU/struct_1.ll b/test/CodeGen/CellSPU/struct_1.ll index 8ee7d932251aa..adbb5efa28ba1 100644 --- a/test/CodeGen/CellSPU/struct_1.ll +++ b/test/CodeGen/CellSPU/struct_1.ll @@ -47,19 +47,19 @@ target triple = "spu" ; struct hackstate state = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } @state = global %struct.hackstate zeroinitializer, align 16 -define i8 @get_hackstate_c1() zeroext nounwind { +define zeroext i8 @get_hackstate_c1() nounwind { entry: %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16 ret i8 %tmp2 } -define i8 @get_hackstate_c2() zeroext nounwind { +define zeroext i8 @get_hackstate_c2() nounwind { entry: %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16 ret i8 %tmp2 } -define i8 @get_hackstate_c3() zeroext nounwind { +define zeroext i8 @get_hackstate_c3() nounwind { entry: %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16 ret i8 %tmp2 @@ -71,19 +71,19 @@ entry: ret i32 %tmp2 } -define i16 @get_hackstate_s1() signext nounwind { +define signext i16 @get_hackstate_s1() nounwind { entry: %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16 ret i16 %tmp2 } -define i8 @get_hackstate_c6() zeroext nounwind { +define zeroext i8 @get_hackstate_c6() nounwind { entry: %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 8), align 16 ret i8 %tmp2 } -define i8 @get_hackstate_c7() zeroext nounwind { +define zeroext i8 @get_hackstate_c7() nounwind { entry: %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 16 ret i8 %tmp2 diff --git a/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll b/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll deleted file mode 100644 index 733202c8a96b9..0000000000000 --- a/test/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: llc < %s -; Test that llvm.memcpy works with a i64 length operand on all targets. - -declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) - -define void @l12_l94_bc_divide_endif_2E_3_2E_ce() { -newFuncRoot: - tail call void @llvm.memcpy.i64( i8* null, i8* null, i64 0, i32 1 ) - unreachable -} - diff --git a/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll index 568b88f4df19e..2a2cf6cfb873a 100644 --- a/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll +++ b/test/CodeGen/Generic/2007-04-30-LandingPadBranchFolding.ll @@ -1,13 +1,13 @@ ; RUN: llc < %s ; PR1228 - "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* } - "struct.std::locale" = type { "struct.std::locale::_Impl"* } - "struct.std::locale::_Impl" = type { i32, "struct.std::locale::facet"**, i32, "struct.std::locale::facet"**, i8** } - "struct.std::locale::facet" = type { i32 (...)**, i32 } - "struct.std::string" = type { "struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" } + %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" = type { i8* } + %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } + %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** } + %"struct.std::locale::facet" = type { i32 (...)**, i32 } + %"struct.std::string" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Alloc_hider" } -define void @_ZNKSt6locale4nameEv("struct.std::string"* %agg.result) { +define void @_ZNKSt6locale4nameEv(%"struct.std::string"* %agg.result) { entry: %tmp105 = icmp eq i8* null, null ; <i1> [#uses=1] br i1 %tmp105, label %cond_true, label %cond_true222 diff --git a/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll b/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll deleted file mode 100644 index 3090857d96493..0000000000000 --- a/test/CodeGen/Generic/2007-11-21-UndeadIllegalNode.ll +++ /dev/null @@ -1,157 +0,0 @@ -; RUN: llc < %s -o - - - %struct.RETURN = type { i32, i32 } - %struct.ada__finalization__controlled = type { %struct.system__finalization_root__root_controlled } - %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* } - %struct.ada__strings__unbounded__string_access = type { i8*, %struct.RETURN* } - %struct.ada__strings__unbounded__unbounded_string = type { %struct.ada__finalization__controlled, %struct.ada__strings__unbounded__string_access, i32 } - %struct.ada__tags__dispatch_table = type { [1 x i32] } - %struct.exception = type { i8, i8, i32, i8*, i8*, i32, i8* } - %struct.system__finalization_root__root_controlled = type { %struct.ada__streams__root_stream_type, %struct.system__finalization_root__root_controlled*, %struct.system__finalization_root__root_controlled* } - %struct.system__standard_library__exception_data = type { i8, i8, i32, i32, %struct.system__standard_library__exception_data*, i32, void ()* } -@C.495.7639 = internal constant %struct.RETURN { i32 1, i32 16 } ; <%struct.RETURN*> [#uses=1] -@ada__strings__index_error = external global %struct.exception ; <%struct.exception*> [#uses=1] -@.str5 = internal constant [16 x i8] c"a-strunb.adb:690" ; <[16 x i8]*> [#uses=1] - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare void @ada__strings__unbounded__realloc_for_chunk(%struct.ada__strings__unbounded__unbounded_string*, i32) - -declare void @__gnat_raise_exception(%struct.system__standard_library__exception_data*, i64) - -define void @ada__strings__unbounded__insert__2(%struct.ada__strings__unbounded__unbounded_string* %source, i32 %before, i64 %new_item.0.0) { -entry: - %tmp24636 = lshr i64 %new_item.0.0, 32 ; <i64> [#uses=1] - %tmp24637 = trunc i64 %tmp24636 to i32 ; <i32> [#uses=1] - %tmp24638 = inttoptr i32 %tmp24637 to %struct.RETURN* ; <%struct.RETURN*> [#uses=2] - %tmp25 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp26 = load i32* %tmp25, align 4 ; <i32> [#uses=1] - %tmp29 = getelementptr %struct.RETURN* %tmp24638, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp30 = load i32* %tmp29, align 4 ; <i32> [#uses=1] - %tmp63 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 1 ; <%struct.RETURN**> [#uses=5] - %tmp64 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1] - %tmp65 = getelementptr %struct.RETURN* %tmp64, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp66 = load i32* %tmp65, align 4 ; <i32> [#uses=1] - %tmp67 = icmp sgt i32 %tmp66, %before ; <i1> [#uses=1] - br i1 %tmp67, label %bb77, label %bb - -bb: ; preds = %entry - %tmp71 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 2 ; <i32*> [#uses=4] - %tmp72 = load i32* %tmp71, align 4 ; <i32> [#uses=1] - %tmp73 = add i32 %tmp72, 1 ; <i32> [#uses=1] - %tmp74 = icmp slt i32 %tmp73, %before ; <i1> [#uses=1] - br i1 %tmp74, label %bb77, label %bb84 - -bb77: ; preds = %bb, %entry - tail call void @__gnat_raise_exception( %struct.system__standard_library__exception_data* bitcast (%struct.exception* @ada__strings__index_error to %struct.system__standard_library__exception_data*), i64 or (i64 zext (i32 ptrtoint ([16 x i8]* @.str5 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.RETURN* @C.495.7639 to i32) to i64), i64 32)) ) - unreachable - -bb84: ; preds = %bb - %tmp93 = sub i32 %tmp30, %tmp26 ; <i32> [#uses=2] - %tmp9394 = sext i32 %tmp93 to i36 ; <i36> [#uses=1] - %tmp95 = shl i36 %tmp9394, 3 ; <i36> [#uses=1] - %tmp96 = add i36 %tmp95, 8 ; <i36> [#uses=2] - %tmp97 = icmp sgt i36 %tmp96, -1 ; <i1> [#uses=1] - %tmp100 = select i1 %tmp97, i36 %tmp96, i36 0 ; <i36> [#uses=2] - %tmp101 = icmp slt i36 %tmp100, 17179869177 ; <i1> [#uses=1] - %tmp100.cast = trunc i36 %tmp100 to i32 ; <i32> [#uses=1] - %min102 = select i1 %tmp101, i32 %tmp100.cast, i32 -8 ; <i32> [#uses=1] - tail call void @ada__strings__unbounded__realloc_for_chunk( %struct.ada__strings__unbounded__unbounded_string* %source, i32 %min102 ) - %tmp148 = load i32* %tmp71, align 4 ; <i32> [#uses=4] - %tmp152 = add i32 %tmp93, 1 ; <i32> [#uses=2] - %tmp153 = icmp sgt i32 %tmp152, -1 ; <i1> [#uses=1] - %max154 = select i1 %tmp153, i32 %tmp152, i32 0 ; <i32> [#uses=5] - %tmp155 = add i32 %tmp148, %max154 ; <i32> [#uses=5] - %tmp315 = getelementptr %struct.ada__strings__unbounded__unbounded_string* %source, i32 0, i32 1, i32 0 ; <i8**> [#uses=4] - %tmp328 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1] - %tmp329 = getelementptr %struct.RETURN* %tmp328, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp330 = load i32* %tmp329, align 4 ; <i32> [#uses=4] - %tmp324 = add i32 %max154, %before ; <i32> [#uses=3] - %tmp331 = sub i32 %tmp324, %tmp330 ; <i32> [#uses=1] - %tmp349 = sub i32 %before, %tmp330 ; <i32> [#uses=1] - %tmp356 = icmp sgt i32 %tmp331, %tmp349 ; <i1> [#uses=1] - %tmp431 = icmp sgt i32 %tmp324, %tmp155 ; <i1> [#uses=2] - br i1 %tmp356, label %bb420, label %bb359 - -bb359: ; preds = %bb84 - br i1 %tmp431, label %bb481, label %bb382 - -bb382: ; preds = %bb382, %bb359 - %indvar = phi i32 [ 0, %bb359 ], [ %indvar.next, %bb382 ] ; <i32> [#uses=2] - %max379.pn = phi i32 [ %max154, %bb359 ], [ %L492b.0, %bb382 ] ; <i32> [#uses=1] - %before.pn = phi i32 [ %before, %bb359 ], [ 1, %bb382 ] ; <i32> [#uses=1] - %L492b.0 = add i32 %before.pn, %max379.pn ; <i32> [#uses=3] - %tmp386 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1] - %tmp387 = getelementptr %struct.RETURN* %tmp386, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp388 = load i32* %tmp387, align 4 ; <i32> [#uses=2] - %tmp392 = load i8** %tmp315, align 4 ; <i8*> [#uses=2] - %R493b.0 = add i32 %indvar, %before ; <i32> [#uses=1] - %tmp405 = sub i32 %R493b.0, %tmp388 ; <i32> [#uses=1] - %tmp406 = getelementptr i8* %tmp392, i32 %tmp405 ; <i8*> [#uses=1] - %tmp407 = load i8* %tmp406, align 1 ; <i8> [#uses=1] - %tmp408 = sub i32 %L492b.0, %tmp388 ; <i32> [#uses=1] - %tmp409 = getelementptr i8* %tmp392, i32 %tmp408 ; <i8*> [#uses=1] - store i8 %tmp407, i8* %tmp409, align 1 - %tmp414 = icmp eq i32 %L492b.0, %tmp155 ; <i1> [#uses=1] - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] - br i1 %tmp414, label %bb481, label %bb382 - -bb420: ; preds = %bb84 - br i1 %tmp431, label %bb481, label %bb436.preheader - -bb436.preheader: ; preds = %bb420 - %tmp4468 = load i8** %tmp315, align 4 ; <i8*> [#uses=2] - %tmp4599 = sub i32 %tmp148, %tmp330 ; <i32> [#uses=1] - %tmp46010 = getelementptr i8* %tmp4468, i32 %tmp4599 ; <i8*> [#uses=1] - %tmp46111 = load i8* %tmp46010, align 1 ; <i8> [#uses=1] - %tmp46212 = sub i32 %tmp155, %tmp330 ; <i32> [#uses=1] - %tmp46313 = getelementptr i8* %tmp4468, i32 %tmp46212 ; <i8*> [#uses=1] - store i8 %tmp46111, i8* %tmp46313, align 1 - %exitcond14 = icmp eq i32 %tmp155, %tmp324 ; <i1> [#uses=1] - br i1 %exitcond14, label %bb481, label %bb.nph - -bb.nph: ; preds = %bb436.preheader - %tmp5 = sub i32 %tmp148, %before ; <i32> [#uses=1] - br label %bb478 - -bb478: ; preds = %bb478, %bb.nph - %indvar6422 = phi i32 [ 0, %bb.nph ], [ %indvar.next643, %bb478 ] ; <i32> [#uses=1] - %indvar.next643 = add i32 %indvar6422, 1 ; <i32> [#uses=4] - %L490b.0 = sub i32 %tmp155, %indvar.next643 ; <i32> [#uses=1] - %R491b.0 = sub i32 %tmp148, %indvar.next643 ; <i32> [#uses=1] - %tmp440 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1] - %tmp441 = getelementptr %struct.RETURN* %tmp440, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp442 = load i32* %tmp441, align 4 ; <i32> [#uses=2] - %tmp446 = load i8** %tmp315, align 4 ; <i8*> [#uses=2] - %tmp459 = sub i32 %R491b.0, %tmp442 ; <i32> [#uses=1] - %tmp460 = getelementptr i8* %tmp446, i32 %tmp459 ; <i8*> [#uses=1] - %tmp461 = load i8* %tmp460, align 1 ; <i8> [#uses=1] - %tmp462 = sub i32 %L490b.0, %tmp442 ; <i32> [#uses=1] - %tmp463 = getelementptr i8* %tmp446, i32 %tmp462 ; <i8*> [#uses=1] - store i8 %tmp461, i8* %tmp463, align 1 - %exitcond = icmp eq i32 %indvar.next643, %tmp5 ; <i1> [#uses=1] - br i1 %exitcond, label %bb481, label %bb478 - -bb481: ; preds = %bb478, %bb436.preheader, %bb420, %bb382, %bb359 - %tmp577 = add i32 %before, -1 ; <i32> [#uses=3] - %tmp578 = add i32 %max154, %tmp577 ; <i32> [#uses=2] - %tmp581 = icmp sge i32 %tmp578, %tmp577 ; <i1> [#uses=1] - %max582 = select i1 %tmp581, i32 %tmp578, i32 %tmp577 ; <i32> [#uses=1] - %tmp584 = sub i32 %max582, %before ; <i32> [#uses=1] - %tmp585 = add i32 %tmp584, 1 ; <i32> [#uses=2] - %tmp586 = icmp sgt i32 %tmp585, -1 ; <i1> [#uses=1] - %max587 = select i1 %tmp586, i32 %tmp585, i32 0 ; <i32> [#uses=1] - %tmp591 = load %struct.RETURN** %tmp63, align 4 ; <%struct.RETURN*> [#uses=1] - %tmp592 = getelementptr %struct.RETURN* %tmp591, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp593 = load i32* %tmp592, align 4 ; <i32> [#uses=1] - %tmp597 = load i8** %tmp315, align 4 ; <i8*> [#uses=1] - %tmp600621 = trunc i64 %new_item.0.0 to i32 ; <i32> [#uses=1] - %tmp600622 = inttoptr i32 %tmp600621 to i8* ; <i8*> [#uses=1] - %tmp601 = sub i32 %before, %tmp593 ; <i32> [#uses=1] - %tmp602 = getelementptr i8* %tmp597, i32 %tmp601 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32( i8* %tmp602, i8* %tmp600622, i32 %max587, i32 1 ) - %tmp606 = load i32* %tmp71, align 4 ; <i32> [#uses=1] - %tmp613 = add i32 %tmp606, %max154 ; <i32> [#uses=1] - store i32 %tmp613, i32* %tmp71, align 4 - ret void -} diff --git a/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll b/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll new file mode 100644 index 0000000000000..cd446d57d8a5a --- /dev/null +++ b/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s +; This caused ScheduleDAG to crash in EmitPhysRegCopy when searching +; the uses of a copy to a physical register without ignoring non-data +; dependence, PR10220. + +define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) nounwind uwtable noinline ssp { +entry: + %c = load i256* %cc + %d = load i256* %dd + %add = add nsw i256 %c, %d + store i256 %add, i256* %a, align 8 + %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376 + %add6 = add nsw i256 %or, %d + store i256 %add6, i256* %b, align 8 + ret void +} diff --git a/test/CodeGen/Generic/BurgBadRegAlloc.ll b/test/CodeGen/Generic/BurgBadRegAlloc.ll deleted file mode 100644 index 99d856aea9901..0000000000000 --- a/test/CodeGen/Generic/BurgBadRegAlloc.ll +++ /dev/null @@ -1,829 +0,0 @@ -; RUN: llc < %s - -;; Register allocation is doing a very poor job on this routine from yyparse -;; in Burg: -;; -- at least two long-lived values are being allocated to %o? registers -;; -- even worse, those registers are being saved and restored repeatedly -;; at function calls, even though there are no intervening uses. -;; -- outgoing args of some function calls have to be swapped, causing -;; another write/read from stack to do the exchange (use -dregalloc=y). -;; -%Arity = type %struct.arity* - %Binding = type %struct.binding* - %DeltaCost = type [4 x i16] - %Dimension = type %struct.dimension* - %Index_Map = type { i32, %Item_Set* } - %IntList = type %struct.intlist* - %Item = type { %DeltaCost, %Rule } - %ItemArray = type %Item* - %Item_Set = type %struct.item_set* - %List = type %struct.list* - %Mapping = type %struct.mapping* - %NonTerminal = type %struct.nonterminal* - %Operator = type %struct.operator* - %Pattern = type %struct.pattern* - %PatternAST = type %struct.patternAST* - %Plank = type %struct.plank* - %PlankMap = type %struct.plankMap* - %ReadFn = type i32 ()* - %Rule = type %struct.rule* - %RuleAST = type %struct.ruleAST* - %StateMap = type %struct.stateMap* - %StrTableElement = type %struct.strTableElement* - %Symbol = type %struct.symbol* - %Table = type %struct.table* - %YYSTYPE = type { %IntList } - %struct.arity = type { i32, %List } - %struct.binding = type { i8*, i32 } - %struct.dimension = type { i16*, %Index_Map, %Mapping, i32, %PlankMap } - %struct.index_map = type { i32, %Item_Set* } - %struct.intlist = type { i32, %IntList } - %struct.item = type { %DeltaCost, %Rule } - %struct.item_set = type { i32, i32, %Operator, [2 x %Item_Set], %Item_Set, i16*, %ItemArray, %ItemArray } - %struct.list = type { i8*, %List } - %struct.mapping = type { %List*, i32, i32, i32, %Item_Set* } - %struct.nonterminal = type { i8*, i32, i32, i32, %PlankMap, %Rule } - %struct.operator = type { i8*, i32, i32, i32, i32, i32, %Table } - %struct.pattern = type { %NonTerminal, %Operator, [2 x %NonTerminal] } - %struct.patternAST = type { %Symbol, i8*, %List } - %struct.plank = type { i8*, %List, i32 } - %struct.plankMap = type { %List, i32, %StateMap } - %struct.rule = type { %DeltaCost, i32, i32, i32, %NonTerminal, %Pattern, i32 } - %struct.ruleAST = type { i8*, %PatternAST, i32, %IntList, %Rule, %StrTableElement, %StrTableElement } - %struct.stateMap = type { i8*, %Plank, i32, i16* } - %struct.strTableElement = type { i8*, %IntList, i8* } - %struct.symbol = type { i8*, i32, { %Operator } } - %struct.table = type { %Operator, %List, i16*, [2 x %Dimension], %Item_Set* } -@yylval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1] -@yylhs = external global [25 x i16] ; <[25 x i16]*> [#uses=1] -@yylen = external global [25 x i16] ; <[25 x i16]*> [#uses=1] -@yydefred = external global [43 x i16] ; <[43 x i16]*> [#uses=1] -@yydgoto = external global [12 x i16] ; <[12 x i16]*> [#uses=1] -@yysindex = external global [43 x i16] ; <[43 x i16]*> [#uses=2] -@yyrindex = external global [43 x i16] ; <[43 x i16]*> [#uses=1] -@yygindex = external global [12 x i16] ; <[12 x i16]*> [#uses=1] -@yytable = external global [263 x i16] ; <[263 x i16]*> [#uses=4] -@yycheck = external global [263 x i16] ; <[263 x i16]*> [#uses=4] -@yynerrs = external global i32 ; <i32*> [#uses=3] -@yyerrflag = external global i32 ; <i32*> [#uses=6] -@yychar = external global i32 ; <i32*> [#uses=15] -@yyssp = external global i16* ; <i16**> [#uses=15] -@yyvsp = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=30] -@yyval = external global %YYSTYPE ; <%YYSTYPE*> [#uses=1] -@yyss = external global i16* ; <i16**> [#uses=3] -@yysslim = external global i16* ; <i16**> [#uses=3] -@yyvs = external global %YYSTYPE* ; <%YYSTYPE**> [#uses=1] -@.LC01 = external global [13 x i8] ; <[13 x i8]*> [#uses=1] -@.LC1 = external global [20 x i8] ; <[20 x i8]*> [#uses=1] - -define i32 @yyparse() { -bb0: - store i32 0, i32* @yynerrs - store i32 0, i32* @yyerrflag - store i32 -1, i32* @yychar - %reg113 = load i16** @yyss ; <i16*> [#uses=1] - %cond581 = icmp ne i16* %reg113, null ; <i1> [#uses=1] - br i1 %cond581, label %bb3, label %bb2 - -bb2: ; preds = %bb0 - %reg584 = call i32 @yygrowstack( ) ; <i32> [#uses=1] - %cond584 = icmp ne i32 %reg584, 0 ; <i1> [#uses=1] - br i1 %cond584, label %bb113, label %bb3 - -bb3: ; preds = %bb2, %bb0 - %reg115 = load i16** @yyss ; <i16*> [#uses=1] - store i16* %reg115, i16** @yyssp - %reg116 = load %YYSTYPE** @yyvs ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg116, %YYSTYPE** @yyvsp - %reg117 = load i16** @yyssp ; <i16*> [#uses=1] - store i16 0, i16* %reg117 - br label %bb4 - -bb4: ; preds = %bb112, %bb102, %bb35, %bb31, %bb15, %bb14, %bb3 - %reg458 = phi i32 [ %reg476, %bb112 ], [ 1, %bb102 ], [ %reg458, %bb35 ], [ %cast768, %bb31 ], [ %cast658, %bb15 ], [ %cast658, %bb14 ], [ 0, %bb3 ] ; <i32> [#uses=2] - %reg458-idxcast = zext i32 %reg458 to i64 ; <i64> [#uses=3] - %reg594 = getelementptr [43 x i16]* @yydefred, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1] - %reg125 = load i16* %reg594 ; <i16> [#uses=1] - %cast599 = sext i16 %reg125 to i32 ; <i32> [#uses=2] - %cond600 = icmp ne i32 %cast599, 0 ; <i1> [#uses=1] - br i1 %cond600, label %bb36, label %bb5 - -bb5: ; preds = %bb4 - %reg127 = load i32* @yychar ; <i32> [#uses=1] - %cond603 = icmp sge i32 %reg127, 0 ; <i1> [#uses=1] - br i1 %cond603, label %bb8, label %bb6 - -bb6: ; preds = %bb5 - %reg607 = call i32 @yylex( ) ; <i32> [#uses=1] - store i32 %reg607, i32* @yychar - %reg129 = load i32* @yychar ; <i32> [#uses=1] - %cond609 = icmp sge i32 %reg129, 0 ; <i1> [#uses=1] - br i1 %cond609, label %bb8, label %bb7 - -bb7: ; preds = %bb6 - store i32 0, i32* @yychar - br label %bb8 - -bb8: ; preds = %bb7, %bb6, %bb5 - %reg615 = getelementptr [43 x i16]* @yysindex, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1] - %reg137 = load i16* %reg615 ; <i16> [#uses=1] - %cast620 = sext i16 %reg137 to i32 ; <i32> [#uses=2] - %cond621 = icmp eq i32 %cast620, 0 ; <i1> [#uses=1] - br i1 %cond621, label %bb16, label %bb9 - -bb9: ; preds = %bb8 - %reg139 = load i32* @yychar ; <i32> [#uses=2] - %reg460 = add i32 %cast620, %reg139 ; <i32> [#uses=3] - %cond624 = icmp slt i32 %reg460, 0 ; <i1> [#uses=1] - br i1 %cond624, label %bb16, label %bb10 - -bb10: ; preds = %bb9 - %cond627 = icmp sgt i32 %reg460, 262 ; <i1> [#uses=1] - br i1 %cond627, label %bb16, label %bb11 - -bb11: ; preds = %bb10 - %reg460-idxcast = sext i32 %reg460 to i64 ; <i64> [#uses=2] - %reg632 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg460-idxcast ; <i16*> [#uses=1] - %reg148 = load i16* %reg632 ; <i16> [#uses=1] - %cast637 = sext i16 %reg148 to i32 ; <i32> [#uses=1] - %cond639 = icmp ne i32 %cast637, %reg139 ; <i1> [#uses=1] - br i1 %cond639, label %bb16, label %bb12 - -bb12: ; preds = %bb11 - %reg150 = load i16** @yyssp ; <i16*> [#uses=1] - %cast640 = bitcast i16* %reg150 to i8* ; <i8*> [#uses=1] - %reg151 = load i16** @yysslim ; <i16*> [#uses=1] - %cast641 = bitcast i16* %reg151 to i8* ; <i8*> [#uses=1] - %cond642 = icmp ult i8* %cast640, %cast641 ; <i1> [#uses=1] - br i1 %cond642, label %bb14, label %bb13 - -bb13: ; preds = %bb12 - %reg644 = call i32 @yygrowstack( ) ; <i32> [#uses=1] - %cond644 = icmp ne i32 %reg644, 0 ; <i1> [#uses=1] - br i1 %cond644, label %bb113, label %bb14 - -bb14: ; preds = %bb13, %bb12 - %reg153 = load i16** @yyssp ; <i16*> [#uses=1] - %reg647 = getelementptr i16* %reg153, i64 1 ; <i16*> [#uses=2] - store i16* %reg647, i16** @yyssp - %reg653 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg460-idxcast ; <i16*> [#uses=1] - %reg162 = load i16* %reg653 ; <i16> [#uses=2] - %cast658 = sext i16 %reg162 to i32 ; <i32> [#uses=2] - store i16 %reg162, i16* %reg647 - %reg164 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg661 = getelementptr %YYSTYPE* %reg164, i64 1 ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg661, %YYSTYPE** @yyvsp - %reg167 = load %IntList* getelementptr (%YYSTYPE* @yylval, i64 0, i32 0) ; <%IntList> [#uses=1] - %reg661.idx1 = getelementptr %YYSTYPE* %reg164, i64 1, i32 0 ; <%IntList*> [#uses=1] - store %IntList %reg167, %IntList* %reg661.idx1 - store i32 -1, i32* @yychar - %reg169 = load i32* @yyerrflag ; <i32> [#uses=2] - %cond669 = icmp sle i32 %reg169, 0 ; <i1> [#uses=1] - br i1 %cond669, label %bb4, label %bb15 - -bb15: ; preds = %bb14 - %reg171 = add i32 %reg169, -1 ; <i32> [#uses=1] - store i32 %reg171, i32* @yyerrflag - br label %bb4 - -bb16: ; preds = %bb11, %bb10, %bb9, %bb8 - %reg677 = getelementptr [43 x i16]* @yyrindex, i64 0, i64 %reg458-idxcast ; <i16*> [#uses=1] - %reg178 = load i16* %reg677 ; <i16> [#uses=1] - %cast682 = sext i16 %reg178 to i32 ; <i32> [#uses=2] - %cond683 = icmp eq i32 %cast682, 0 ; <i1> [#uses=1] - br i1 %cond683, label %bb21, label %bb17 - -bb17: ; preds = %bb16 - %reg180 = load i32* @yychar ; <i32> [#uses=2] - %reg463 = add i32 %cast682, %reg180 ; <i32> [#uses=3] - %cond686 = icmp slt i32 %reg463, 0 ; <i1> [#uses=1] - br i1 %cond686, label %bb21, label %bb18 - -bb18: ; preds = %bb17 - %cond689 = icmp sgt i32 %reg463, 262 ; <i1> [#uses=1] - br i1 %cond689, label %bb21, label %bb19 - -bb19: ; preds = %bb18 - %reg463-idxcast = sext i32 %reg463 to i64 ; <i64> [#uses=2] - %reg694 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg463-idxcast ; <i16*> [#uses=1] - %reg189 = load i16* %reg694 ; <i16> [#uses=1] - %cast699 = sext i16 %reg189 to i32 ; <i32> [#uses=1] - %cond701 = icmp ne i32 %cast699, %reg180 ; <i1> [#uses=1] - br i1 %cond701, label %bb21, label %bb20 - -bb20: ; preds = %bb19 - %reg704 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg463-idxcast ; <i16*> [#uses=1] - %reg197 = load i16* %reg704 ; <i16> [#uses=1] - %cast709 = sext i16 %reg197 to i32 ; <i32> [#uses=1] - br label %bb36 - -bb21: ; preds = %bb19, %bb18, %bb17, %bb16 - %reg198 = load i32* @yyerrflag ; <i32> [#uses=1] - %cond711 = icmp ne i32 %reg198, 0 ; <i1> [#uses=1] - br i1 %cond711, label %bb23, label %bb22 - -bb22: ; preds = %bb21 - call void @yyerror( i8* getelementptr ([13 x i8]* @.LC01, i64 0, i64 0) ) - %reg200 = load i32* @yynerrs ; <i32> [#uses=1] - %reg201 = add i32 %reg200, 1 ; <i32> [#uses=1] - store i32 %reg201, i32* @yynerrs - br label %bb23 - -bb23: ; preds = %bb22, %bb21 - %reg202 = load i32* @yyerrflag ; <i32> [#uses=1] - %cond719 = icmp sgt i32 %reg202, 2 ; <i1> [#uses=1] - br i1 %cond719, label %bb34, label %bb24 - -bb24: ; preds = %bb23 - store i32 3, i32* @yyerrflag - %reg241 = load i16** @yyss ; <i16*> [#uses=1] - %cast778 = bitcast i16* %reg241 to i8* ; <i8*> [#uses=1] - br label %bb25 - -bb25: ; preds = %bb33, %bb24 - %reg204 = load i16** @yyssp ; <i16*> [#uses=4] - %reg206 = load i16* %reg204 ; <i16> [#uses=1] - %reg206-idxcast = sext i16 %reg206 to i64 ; <i64> [#uses=1] - %reg727 = getelementptr [43 x i16]* @yysindex, i64 0, i64 %reg206-idxcast ; <i16*> [#uses=1] - %reg212 = load i16* %reg727 ; <i16> [#uses=2] - %cast732 = sext i16 %reg212 to i32 ; <i32> [#uses=2] - %cond733 = icmp eq i32 %cast732, 0 ; <i1> [#uses=1] - br i1 %cond733, label %bb32, label %bb26 - -bb26: ; preds = %bb25 - %reg466 = add i32 %cast732, 256 ; <i32> [#uses=2] - %cond736 = icmp slt i32 %reg466, 0 ; <i1> [#uses=1] - br i1 %cond736, label %bb32, label %bb27 - -bb27: ; preds = %bb26 - %cond739 = icmp sgt i32 %reg466, 262 ; <i1> [#uses=1] - br i1 %cond739, label %bb32, label %bb28 - -bb28: ; preds = %bb27 - %reg212-idxcast = sext i16 %reg212 to i64 ; <i64> [#uses=1] - %reg212-idxcast-offset = add i64 %reg212-idxcast, 256 ; <i64> [#uses=2] - %reg744 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg212-idxcast-offset ; <i16*> [#uses=1] - %reg221 = load i16* %reg744 ; <i16> [#uses=1] - %cond748 = icmp ne i16 %reg221, 256 ; <i1> [#uses=1] - br i1 %cond748, label %bb32, label %bb29 - -bb29: ; preds = %bb28 - %cast750 = bitcast i16* %reg204 to i8* ; <i8*> [#uses=1] - %reg223 = load i16** @yysslim ; <i16*> [#uses=1] - %cast751 = bitcast i16* %reg223 to i8* ; <i8*> [#uses=1] - %cond752 = icmp ult i8* %cast750, %cast751 ; <i1> [#uses=1] - br i1 %cond752, label %bb31, label %bb30 - -bb30: ; preds = %bb29 - %reg754 = call i32 @yygrowstack( ) ; <i32> [#uses=1] - %cond754 = icmp ne i32 %reg754, 0 ; <i1> [#uses=1] - br i1 %cond754, label %bb113, label %bb31 - -bb31: ; preds = %bb30, %bb29 - %reg225 = load i16** @yyssp ; <i16*> [#uses=1] - %reg757 = getelementptr i16* %reg225, i64 1 ; <i16*> [#uses=2] - store i16* %reg757, i16** @yyssp - %reg763 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg212-idxcast-offset ; <i16*> [#uses=1] - %reg234 = load i16* %reg763 ; <i16> [#uses=2] - %cast768 = sext i16 %reg234 to i32 ; <i32> [#uses=1] - store i16 %reg234, i16* %reg757 - %reg236 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg771 = getelementptr %YYSTYPE* %reg236, i64 1 ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg771, %YYSTYPE** @yyvsp - %reg239 = load %IntList* getelementptr (%YYSTYPE* @yylval, i64 0, i32 0) ; <%IntList> [#uses=1] - %reg771.idx1 = getelementptr %YYSTYPE* %reg236, i64 1, i32 0 ; <%IntList*> [#uses=1] - store %IntList %reg239, %IntList* %reg771.idx1 - br label %bb4 - -bb32: ; preds = %bb28, %bb27, %bb26, %bb25 - %cast777 = bitcast i16* %reg204 to i8* ; <i8*> [#uses=1] - %cond779 = icmp ule i8* %cast777, %cast778 ; <i1> [#uses=1] - br i1 %cond779, label %UnifiedExitNode, label %bb33 - -bb33: ; preds = %bb32 - %reg781 = getelementptr i16* %reg204, i64 -1 ; <i16*> [#uses=1] - store i16* %reg781, i16** @yyssp - %reg244 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %reg786 = getelementptr %YYSTYPE* %reg244, i64 -1 ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg786, %YYSTYPE** @yyvsp - br label %bb25 - -bb34: ; preds = %bb23 - %reg246 = load i32* @yychar ; <i32> [#uses=1] - %cond791 = icmp eq i32 %reg246, 0 ; <i1> [#uses=1] - br i1 %cond791, label %UnifiedExitNode, label %bb35 - -bb35: ; preds = %bb34 - store i32 -1, i32* @yychar - br label %bb4 - -bb36: ; preds = %bb20, %bb4 - %reg468 = phi i32 [ %cast709, %bb20 ], [ %cast599, %bb4 ] ; <i32> [#uses=31] - %reg468-idxcast = sext i32 %reg468 to i64 ; <i64> [#uses=2] - %reg796 = getelementptr [25 x i16]* @yylen, i64 0, i64 %reg468-idxcast ; <i16*> [#uses=1] - %reg254 = load i16* %reg796 ; <i16> [#uses=2] - %reg259 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %reg254-idxcast = sext i16 %reg254 to i64 ; <i64> [#uses=1] - %reg254-idxcast-scale = mul i64 %reg254-idxcast, -1 ; <i64> [#uses=1] - %reg254-idxcast-scale-offset = add i64 %reg254-idxcast-scale, 1 ; <i64> [#uses=1] - %reg261.idx1 = getelementptr %YYSTYPE* %reg259, i64 %reg254-idxcast-scale-offset, i32 0 ; <%IntList*> [#uses=1] - %reg261 = load %IntList* %reg261.idx1 ; <%IntList> [#uses=1] - store %IntList %reg261, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - %cond812 = icmp eq i32 %reg468, 13 ; <i1> [#uses=1] - br i1 %cond812, label %bb85, label %bb37 - -bb37: ; preds = %bb36 - %cond814 = icmp sgt i32 %reg468, 13 ; <i1> [#uses=1] - br i1 %cond814, label %bb56, label %bb38 - -bb38: ; preds = %bb37 - %cond817 = icmp eq i32 %reg468, 7 ; <i1> [#uses=1] - br i1 %cond817, label %bb79, label %bb39 - -bb39: ; preds = %bb38 - %cond819 = icmp sgt i32 %reg468, 7 ; <i1> [#uses=1] - br i1 %cond819, label %bb48, label %bb40 - -bb40: ; preds = %bb39 - %cond822 = icmp eq i32 %reg468, 4 ; <i1> [#uses=1] - br i1 %cond822, label %bb76, label %bb41 - -bb41: ; preds = %bb40 - %cond824 = icmp sgt i32 %reg468, 4 ; <i1> [#uses=1] - br i1 %cond824, label %bb45, label %bb42 - -bb42: ; preds = %bb41 - %cond827 = icmp eq i32 %reg468, 2 ; <i1> [#uses=1] - br i1 %cond827, label %bb74, label %bb43 - -bb43: ; preds = %bb42 - %cond829 = icmp eq i32 %reg468, 3 ; <i1> [#uses=1] - br i1 %cond829, label %bb75, label %bb97 - -bb45: ; preds = %bb41 - %cond831 = icmp eq i32 %reg468, 5 ; <i1> [#uses=1] - br i1 %cond831, label %bb77, label %bb46 - -bb46: ; preds = %bb45 - %cond833 = icmp eq i32 %reg468, 6 ; <i1> [#uses=1] - br i1 %cond833, label %bb78, label %bb97 - -bb48: ; preds = %bb39 - %cond835 = icmp eq i32 %reg468, 10 ; <i1> [#uses=1] - br i1 %cond835, label %bb82, label %bb49 - -bb49: ; preds = %bb48 - %cond837 = icmp sgt i32 %reg468, 10 ; <i1> [#uses=1] - br i1 %cond837, label %bb53, label %bb50 - -bb50: ; preds = %bb49 - %cond840 = icmp eq i32 %reg468, 8 ; <i1> [#uses=1] - br i1 %cond840, label %bb80, label %bb51 - -bb51: ; preds = %bb50 - %cond842 = icmp eq i32 %reg468, 9 ; <i1> [#uses=1] - br i1 %cond842, label %bb81, label %bb97 - -bb53: ; preds = %bb49 - %cond844 = icmp eq i32 %reg468, 11 ; <i1> [#uses=1] - br i1 %cond844, label %bb83, label %bb54 - -bb54: ; preds = %bb53 - %cond846 = icmp eq i32 %reg468, 12 ; <i1> [#uses=1] - br i1 %cond846, label %bb84, label %bb97 - -bb56: ; preds = %bb37 - %cond848 = icmp eq i32 %reg468, 19 ; <i1> [#uses=1] - br i1 %cond848, label %bb91, label %bb57 - -bb57: ; preds = %bb56 - %cond850 = icmp sgt i32 %reg468, 19 ; <i1> [#uses=1] - br i1 %cond850, label %bb66, label %bb58 - -bb58: ; preds = %bb57 - %cond853 = icmp eq i32 %reg468, 16 ; <i1> [#uses=1] - br i1 %cond853, label %bb88, label %bb59 - -bb59: ; preds = %bb58 - %cond855 = icmp sgt i32 %reg468, 16 ; <i1> [#uses=1] - br i1 %cond855, label %bb63, label %bb60 - -bb60: ; preds = %bb59 - %cond858 = icmp eq i32 %reg468, 14 ; <i1> [#uses=1] - br i1 %cond858, label %bb86, label %bb61 - -bb61: ; preds = %bb60 - %cond860 = icmp eq i32 %reg468, 15 ; <i1> [#uses=1] - br i1 %cond860, label %bb87, label %bb97 - -bb63: ; preds = %bb59 - %cond862 = icmp eq i32 %reg468, 17 ; <i1> [#uses=1] - br i1 %cond862, label %bb89, label %bb64 - -bb64: ; preds = %bb63 - %cond864 = icmp eq i32 %reg468, 18 ; <i1> [#uses=1] - br i1 %cond864, label %bb90, label %bb97 - -bb66: ; preds = %bb57 - %cond866 = icmp eq i32 %reg468, 22 ; <i1> [#uses=1] - br i1 %cond866, label %bb94, label %bb67 - -bb67: ; preds = %bb66 - %cond868 = icmp sgt i32 %reg468, 22 ; <i1> [#uses=1] - br i1 %cond868, label %bb71, label %bb68 - -bb68: ; preds = %bb67 - %cond871 = icmp eq i32 %reg468, 20 ; <i1> [#uses=1] - br i1 %cond871, label %bb92, label %bb69 - -bb69: ; preds = %bb68 - %cond873 = icmp eq i32 %reg468, 21 ; <i1> [#uses=1] - br i1 %cond873, label %bb93, label %bb97 - -bb71: ; preds = %bb67 - %cond875 = icmp eq i32 %reg468, 23 ; <i1> [#uses=1] - br i1 %cond875, label %bb95, label %bb72 - -bb72: ; preds = %bb71 - %cond877 = icmp eq i32 %reg468, 24 ; <i1> [#uses=1] - br i1 %cond877, label %bb96, label %bb97 - -bb74: ; preds = %bb42 - call void @yyfinished( ) - br label %bb97 - -bb75: ; preds = %bb43 - %reg262 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg264.idx1 = getelementptr %YYSTYPE* %reg262, i64 -2, i32 0 ; <%IntList*> [#uses=1] - %reg264 = load %IntList* %reg264.idx1 ; <%IntList> [#uses=1] - %reg265.idx = getelementptr %YYSTYPE* %reg262, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg265 = load %IntList* %reg265.idx ; <%IntList> [#uses=1] - %cast889 = bitcast %IntList %reg265 to %List ; <%List> [#uses=1] - %cast890 = bitcast %IntList %reg264 to %List ; <%List> [#uses=1] - call void @doSpec( %List %cast890, %List %cast889 ) - br label %bb97 - -bb76: ; preds = %bb40 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb77: ; preds = %bb45 - %reg269 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast894 = getelementptr %YYSTYPE* %reg269, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg271 = load %IntList* %cast894 ; <%IntList> [#uses=1] - %reg271.upgrd.1 = bitcast %IntList %reg271 to i8* ; <i8*> [#uses=1] - %reg272.idx1 = getelementptr %YYSTYPE* %reg269, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg272 = load %IntList* %reg272.idx1 ; <%IntList> [#uses=1] - %cast901 = bitcast %IntList %reg272 to %List ; <%List> [#uses=1] - %reg901 = call %List @newList( i8* %reg271.upgrd.1, %List %cast901 ) ; <%List> [#uses=1] - bitcast %List %reg901 to %IntList ; <%IntList>:0 [#uses=1] - store %IntList %0, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb78: ; preds = %bb46 - %reg275 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %reg277.idx = getelementptr %YYSTYPE* %reg275, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg277 = load %IntList* %reg277.idx ; <%IntList> [#uses=1] - %cast907 = bitcast %IntList %reg277 to %List ; <%List> [#uses=1] - %reg907 = call %Arity @newArity( i32 -1, %List %cast907 ) ; <%Arity> [#uses=1] - bitcast %Arity %reg907 to %IntList ; <%IntList>:1 [#uses=1] - store %IntList %1, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb79: ; preds = %bb38 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - %reg281 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %cast912 = getelementptr %YYSTYPE* %reg281, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg282 = load %IntList* %cast912 ; <%IntList> [#uses=1] - %reg282.upgrd.2 = bitcast %IntList %reg282 to %List ; <%List> [#uses=1] - call void @doGram( %List %reg282.upgrd.2 ) - br label %bb97 - -bb80: ; preds = %bb50 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - %reg285 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %cast917 = getelementptr %YYSTYPE* %reg285, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg286 = load %IntList* %cast917 ; <%IntList> [#uses=1] - %reg286.upgrd.3 = bitcast %IntList %reg286 to i8* ; <i8*> [#uses=1] - call void @doStart( i8* %reg286.upgrd.3 ) - br label %bb97 - -bb81: ; preds = %bb51 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb82: ; preds = %bb48 - %reg290 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast923 = getelementptr %YYSTYPE* %reg290, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg292 = load %IntList* %cast923 ; <%IntList> [#uses=1] - %reg292.upgrd.4 = bitcast %IntList %reg292 to i8* ; <i8*> [#uses=1] - %reg293.idx1 = getelementptr %YYSTYPE* %reg290, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg293 = load %IntList* %reg293.idx1 ; <%IntList> [#uses=1] - %cast930 = bitcast %IntList %reg293 to %List ; <%List> [#uses=1] - %reg930 = call %List @newList( i8* %reg292.upgrd.4, %List %cast930 ) ; <%List> [#uses=1] - bitcast %List %reg930 to %IntList ; <%IntList>:2 [#uses=1] - store %IntList %2, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb83: ; preds = %bb53 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb84: ; preds = %bb54 - %reg298 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast936 = getelementptr %YYSTYPE* %reg298, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg300 = load %IntList* %cast936 ; <%IntList> [#uses=1] - %reg300.upgrd.5 = bitcast %IntList %reg300 to i8* ; <i8*> [#uses=1] - %reg301.idx1 = getelementptr %YYSTYPE* %reg298, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg301 = load %IntList* %reg301.idx1 ; <%IntList> [#uses=1] - %cast943 = bitcast %IntList %reg301 to %List ; <%List> [#uses=1] - %reg943 = call %List @newList( i8* %reg300.upgrd.5, %List %cast943 ) ; <%List> [#uses=1] - bitcast %List %reg943 to %IntList ; <%IntList>:3 [#uses=1] - store %IntList %3, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb85: ; preds = %bb36 - %reg304 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast9521 = getelementptr %YYSTYPE* %reg304, i64 -2, i32 0 ; <%IntList*> [#uses=1] - %reg306 = load %IntList* %cast9521 ; <%IntList> [#uses=1] - %reg306.upgrd.6 = bitcast %IntList %reg306 to i8* ; <i8*> [#uses=1] - %cast953 = bitcast %YYSTYPE* %reg304 to i32* ; <i32*> [#uses=1] - %reg307 = load i32* %cast953 ; <i32> [#uses=1] - %reg955 = call %Binding @newBinding( i8* %reg306.upgrd.6, i32 %reg307 ) ; <%Binding> [#uses=1] - bitcast %Binding %reg955 to %IntList ; <%IntList>:4 [#uses=1] - store %IntList %4, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb86: ; preds = %bb60 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb87: ; preds = %bb61 - %reg312 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast961 = getelementptr %YYSTYPE* %reg312, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg314 = load %IntList* %cast961 ; <%IntList> [#uses=1] - %reg314.upgrd.7 = bitcast %IntList %reg314 to i8* ; <i8*> [#uses=1] - %reg315.idx1 = getelementptr %YYSTYPE* %reg312, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg315 = load %IntList* %reg315.idx1 ; <%IntList> [#uses=1] - %cast968 = bitcast %IntList %reg315 to %List ; <%List> [#uses=1] - %reg968 = call %List @newList( i8* %reg314.upgrd.7, %List %cast968 ) ; <%List> [#uses=1] - bitcast %List %reg968 to %IntList ; <%IntList>:5 [#uses=1] - store %IntList %5, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb88: ; preds = %bb58 - %reg318 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=4] - %cast9791 = getelementptr %YYSTYPE* %reg318, i64 -6, i32 0 ; <%IntList*> [#uses=1] - %reg322 = load %IntList* %cast9791 ; <%IntList> [#uses=1] - %reg322.upgrd.8 = bitcast %IntList %reg322 to i8* ; <i8*> [#uses=1] - %reg323.idx1 = getelementptr %YYSTYPE* %reg318, i64 -4, i32 0 ; <%IntList*> [#uses=1] - %reg323 = load %IntList* %reg323.idx1 ; <%IntList> [#uses=1] - %reg987 = getelementptr %YYSTYPE* %reg318, i64 -2 ; <%YYSTYPE*> [#uses=1] - %cast989 = bitcast %YYSTYPE* %reg987 to i32* ; <i32*> [#uses=1] - %reg324 = load i32* %cast989 ; <i32> [#uses=1] - %reg325.idx1 = getelementptr %YYSTYPE* %reg318, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg325 = load %IntList* %reg325.idx1 ; <%IntList> [#uses=1] - %cast998 = bitcast %IntList %reg323 to %PatternAST ; <%PatternAST> [#uses=1] - %reg996 = call %RuleAST @newRuleAST( i8* %reg322.upgrd.8, %PatternAST %cast998, i32 %reg324, %IntList %reg325 ) ; <%RuleAST> [#uses=1] - bitcast %RuleAST %reg996 to %IntList ; <%IntList>:6 [#uses=1] - store %IntList %6, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb89: ; preds = %bb63 - %reg328 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %cast1002 = getelementptr %YYSTYPE* %reg328, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg329 = load %IntList* %cast1002 ; <%IntList> [#uses=1] - %reg329.upgrd.9 = bitcast %IntList %reg329 to i8* ; <i8*> [#uses=1] - %reg1004 = call %PatternAST @newPatternAST( i8* %reg329.upgrd.9, %List null ) ; <%PatternAST> [#uses=1] - bitcast %PatternAST %reg1004 to %IntList ; <%IntList>:7 [#uses=1] - store %IntList %7, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb90: ; preds = %bb64 - %reg333 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %cast10131 = getelementptr %YYSTYPE* %reg333, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg335 = load %IntList* %cast10131 ; <%IntList> [#uses=1] - %reg335.upgrd.10 = bitcast %IntList %reg335 to i8* ; <i8*> [#uses=1] - %reg1015 = call %List @newList( i8* %reg335.upgrd.10, %List null ) ; <%List> [#uses=1] - %cast10211 = getelementptr %YYSTYPE* %reg333, i64 -3, i32 0 ; <%IntList*> [#uses=1] - %reg338 = load %IntList* %cast10211 ; <%IntList> [#uses=1] - %reg338.upgrd.11 = bitcast %IntList %reg338 to i8* ; <i8*> [#uses=1] - %reg1023 = call %PatternAST @newPatternAST( i8* %reg338.upgrd.11, %List %reg1015 ) ; <%PatternAST> [#uses=1] - bitcast %PatternAST %reg1023 to %IntList ; <%IntList>:8 [#uses=1] - store %IntList %8, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb91: ; preds = %bb56 - %reg341 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=3] - %cast10331 = getelementptr %YYSTYPE* %reg341, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg344 = load %IntList* %cast10331 ; <%IntList> [#uses=1] - %reg344.upgrd.12 = bitcast %IntList %reg344 to i8* ; <i8*> [#uses=1] - %reg1035 = call %List @newList( i8* %reg344.upgrd.12, %List null ) ; <%List> [#uses=1] - %cast10411 = getelementptr %YYSTYPE* %reg341, i64 -3, i32 0 ; <%IntList*> [#uses=1] - %reg347 = load %IntList* %cast10411 ; <%IntList> [#uses=1] - %reg347.upgrd.13 = bitcast %IntList %reg347 to i8* ; <i8*> [#uses=1] - %reg1043 = call %List @newList( i8* %reg347.upgrd.13, %List %reg1035 ) ; <%List> [#uses=1] - %cast10491 = getelementptr %YYSTYPE* %reg341, i64 -5, i32 0 ; <%IntList*> [#uses=1] - %reg349 = load %IntList* %cast10491 ; <%IntList> [#uses=1] - %reg349.upgrd.14 = bitcast %IntList %reg349 to i8* ; <i8*> [#uses=1] - %reg1051 = call %PatternAST @newPatternAST( i8* %reg349.upgrd.14, %List %reg1043 ) ; <%PatternAST> [#uses=1] - bitcast %PatternAST %reg1051 to %IntList ; <%IntList>:9 [#uses=1] - store %IntList %9, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb92: ; preds = %bb68 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb93: ; preds = %bb69 - %reg354 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg1059 = getelementptr %YYSTYPE* %reg354, i64 -2 ; <%YYSTYPE*> [#uses=1] - %cast1061 = bitcast %YYSTYPE* %reg1059 to i32* ; <i32*> [#uses=1] - %reg356 = load i32* %cast1061 ; <i32> [#uses=1] - %reg357.idx1 = getelementptr %YYSTYPE* %reg354, i64 -1, i32 0 ; <%IntList*> [#uses=1] - %reg357 = load %IntList* %reg357.idx1 ; <%IntList> [#uses=1] - %reg1068 = call %IntList @newIntList( i32 %reg356, %IntList %reg357 ) ; <%IntList> [#uses=1] - store %IntList %reg1068, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb94: ; preds = %bb66 - store %IntList null, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb95: ; preds = %bb71 - %reg362 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg1076 = getelementptr %YYSTYPE* %reg362, i64 -1 ; <%YYSTYPE*> [#uses=1] - %cast1078 = bitcast %YYSTYPE* %reg1076 to i32* ; <i32*> [#uses=1] - %reg364 = load i32* %cast1078 ; <i32> [#uses=1] - %reg365.idx = getelementptr %YYSTYPE* %reg362, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg365 = load %IntList* %reg365.idx ; <%IntList> [#uses=1] - %reg1081 = call %IntList @newIntList( i32 %reg364, %IntList %reg365 ) ; <%IntList> [#uses=1] - store %IntList %reg1081, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb96: ; preds = %bb72 - %reg368 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg1088 = getelementptr %YYSTYPE* %reg368, i64 -1 ; <%YYSTYPE*> [#uses=1] - %cast1090 = bitcast %YYSTYPE* %reg1088 to i32* ; <i32*> [#uses=1] - %reg370 = load i32* %cast1090 ; <i32> [#uses=1] - %reg371.idx = getelementptr %YYSTYPE* %reg368, i64 0, i32 0 ; <%IntList*> [#uses=1] - %reg371 = load %IntList* %reg371.idx ; <%IntList> [#uses=1] - %reg1093 = call %IntList @newIntList( i32 %reg370, %IntList %reg371 ) ; <%IntList> [#uses=1] - store %IntList %reg1093, %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) - br label %bb97 - -bb97: ; preds = %bb96, %bb95, %bb94, %bb93, %bb92, %bb91, %bb90, %bb89, %bb88, %bb87, %bb86, %bb85, %bb84, %bb83, %bb82, %bb81, %bb80, %bb79, %bb78, %bb77, %bb76, %bb75, %bb74, %bb72, %bb69, %bb64, %bb61, %bb54, %bb51, %bb46, %bb43 - %cast1097 = sext i16 %reg254 to i64 ; <i64> [#uses=3] - %reg375 = add i64 %cast1097, %cast1097 ; <i64> [#uses=1] - %reg377 = load i16** @yyssp ; <i16*> [#uses=1] - %cast379 = ptrtoint i16* %reg377 to i64 ; <i64> [#uses=1] - %reg381 = sub i64 %cast379, %reg375 ; <i64> [#uses=1] - %cast1099 = inttoptr i64 %reg381 to i16* ; <i16*> [#uses=1] - store i16* %cast1099, i16** @yyssp - %reg382 = load i16** @yyssp ; <i16*> [#uses=3] - %reg383 = load i16* %reg382 ; <i16> [#uses=1] - %cast1103 = sext i16 %reg383 to i32 ; <i32> [#uses=3] - %reg385 = mul i64 %cast1097, 8 ; <i64> [#uses=1] - %reg387 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=1] - %cast389 = ptrtoint %YYSTYPE* %reg387 to i64 ; <i64> [#uses=1] - %reg391 = sub i64 %cast389, %reg385 ; <i64> [#uses=1] - %cast1108 = inttoptr i64 %reg391 to %YYSTYPE* ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %cast1108, %YYSTYPE** @yyvsp - %reg1111 = getelementptr [25 x i16]* @yylhs, i64 0, i64 %reg468-idxcast ; <i16*> [#uses=1] - %reg398 = load i16* %reg1111 ; <i16> [#uses=2] - %cast1116 = sext i16 %reg398 to i32 ; <i32> [#uses=1] - %cond1117 = icmp ne i32 %cast1103, 0 ; <i1> [#uses=1] - br i1 %cond1117, label %bb104, label %bb98 - -bb98: ; preds = %bb97 - %cond1119 = icmp ne i32 %cast1116, 0 ; <i1> [#uses=1] - br i1 %cond1119, label %bb104, label %bb99 - -bb99: ; preds = %bb98 - %reg1122 = getelementptr i16* %reg382, i64 1 ; <i16*> [#uses=2] - store i16* %reg1122, i16** @yyssp - store i16 1, i16* %reg1122 - %reg403 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg1128 = getelementptr %YYSTYPE* %reg403, i64 1 ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg1128, %YYSTYPE** @yyvsp - %reg406 = load %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) ; <%IntList> [#uses=1] - %reg1128.idx1 = getelementptr %YYSTYPE* %reg403, i64 1, i32 0 ; <%IntList*> [#uses=1] - store %IntList %reg406, %IntList* %reg1128.idx1 - %reg407 = load i32* @yychar ; <i32> [#uses=1] - %cond1135 = icmp sge i32 %reg407, 0 ; <i1> [#uses=1] - br i1 %cond1135, label %bb102, label %bb100 - -bb100: ; preds = %bb99 - %reg1139 = call i32 @yylex( ) ; <i32> [#uses=1] - store i32 %reg1139, i32* @yychar - %reg409 = load i32* @yychar ; <i32> [#uses=1] - %cond1141 = icmp sge i32 %reg409, 0 ; <i1> [#uses=1] - br i1 %cond1141, label %bb102, label %bb101 - -bb101: ; preds = %bb100 - store i32 0, i32* @yychar - br label %bb102 - -bb102: ; preds = %bb101, %bb100, %bb99 - %reg411 = load i32* @yychar ; <i32> [#uses=1] - %cond1146 = icmp ne i32 %reg411, 0 ; <i1> [#uses=1] - br i1 %cond1146, label %bb4, label %UnifiedExitNode - -bb104: ; preds = %bb98, %bb97 - %reg398-idxcast = sext i16 %reg398 to i64 ; <i64> [#uses=2] - %reg1150 = getelementptr [12 x i16]* @yygindex, i64 0, i64 %reg398-idxcast ; <i16*> [#uses=1] - %reg418 = load i16* %reg1150 ; <i16> [#uses=1] - %cast1155 = sext i16 %reg418 to i32 ; <i32> [#uses=2] - %cond1156 = icmp eq i32 %cast1155, 0 ; <i1> [#uses=1] - br i1 %cond1156, label %bb109, label %bb105 - -bb105: ; preds = %bb104 - %reg473 = add i32 %cast1155, %cast1103 ; <i32> [#uses=3] - %cond1158 = icmp slt i32 %reg473, 0 ; <i1> [#uses=1] - br i1 %cond1158, label %bb109, label %bb106 - -bb106: ; preds = %bb105 - %cond1161 = icmp sgt i32 %reg473, 262 ; <i1> [#uses=1] - br i1 %cond1161, label %bb109, label %bb107 - -bb107: ; preds = %bb106 - %reg473-idxcast = sext i32 %reg473 to i64 ; <i64> [#uses=2] - %reg1166 = getelementptr [263 x i16]* @yycheck, i64 0, i64 %reg473-idxcast ; <i16*> [#uses=1] - %reg428 = load i16* %reg1166 ; <i16> [#uses=1] - %cast1171 = sext i16 %reg428 to i32 ; <i32> [#uses=1] - %cond1172 = icmp ne i32 %cast1171, %cast1103 ; <i1> [#uses=1] - br i1 %cond1172, label %bb109, label %bb108 - -bb108: ; preds = %bb107 - %reg1175 = getelementptr [263 x i16]* @yytable, i64 0, i64 %reg473-idxcast ; <i16*> [#uses=1] - %reg435 = load i16* %reg1175 ; <i16> [#uses=1] - %cast1180 = sext i16 %reg435 to i32 ; <i32> [#uses=1] - br label %bb110 - -bb109: ; preds = %bb107, %bb106, %bb105, %bb104 - %reg1183 = getelementptr [12 x i16]* @yydgoto, i64 0, i64 %reg398-idxcast ; <i16*> [#uses=1] - %reg442 = load i16* %reg1183 ; <i16> [#uses=1] - %cast1188 = sext i16 %reg442 to i32 ; <i32> [#uses=1] - br label %bb110 - -bb110: ; preds = %bb109, %bb108 - %reg476 = phi i32 [ %cast1188, %bb109 ], [ %cast1180, %bb108 ] ; <i32> [#uses=2] - %cast1189 = bitcast i16* %reg382 to i8* ; <i8*> [#uses=1] - %reg444 = load i16** @yysslim ; <i16*> [#uses=1] - %cast1190 = bitcast i16* %reg444 to i8* ; <i8*> [#uses=1] - %cond1191 = icmp ult i8* %cast1189, %cast1190 ; <i1> [#uses=1] - br i1 %cond1191, label %bb112, label %bb111 - -bb111: ; preds = %bb110 - %reg1193 = call i32 @yygrowstack( ) ; <i32> [#uses=1] - %cond1193 = icmp ne i32 %reg1193, 0 ; <i1> [#uses=1] - br i1 %cond1193, label %bb113, label %bb112 - -bb112: ; preds = %bb111, %bb110 - %reg446 = load i16** @yyssp ; <i16*> [#uses=1] - %reg1196 = getelementptr i16* %reg446, i64 1 ; <i16*> [#uses=2] - store i16* %reg1196, i16** @yyssp - %cast1357 = trunc i32 %reg476 to i16 ; <i16> [#uses=1] - store i16 %cast1357, i16* %reg1196 - %reg449 = load %YYSTYPE** @yyvsp ; <%YYSTYPE*> [#uses=2] - %reg1202 = getelementptr %YYSTYPE* %reg449, i64 1 ; <%YYSTYPE*> [#uses=1] - store %YYSTYPE* %reg1202, %YYSTYPE** @yyvsp - %reg452 = load %IntList* getelementptr (%YYSTYPE* @yyval, i64 0, i32 0) ; <%IntList> [#uses=1] - %reg1202.idx1 = getelementptr %YYSTYPE* %reg449, i64 1, i32 0 ; <%IntList*> [#uses=1] - store %IntList %reg452, %IntList* %reg1202.idx1 - br label %bb4 - -bb113: ; preds = %bb111, %bb30, %bb13, %bb2 - call void @yyerror( i8* getelementptr ([20 x i8]* @.LC1, i64 0, i64 0) ) - br label %UnifiedExitNode - -UnifiedExitNode: ; preds = %bb113, %bb102, %bb34, %bb32 - %UnifiedRetVal = phi i32 [ 1, %bb113 ], [ 1, %bb34 ], [ 1, %bb32 ], [ 0, %bb102 ] ; <i32> [#uses=1] - ret i32 %UnifiedRetVal -} - -declare %List @newList(i8*, %List) - -declare %IntList @newIntList(i32, %IntList) - -declare void @doStart(i8*) - -declare void @yyerror(i8*) - -declare void @doSpec(%List, %List) - -declare %Arity @newArity(i32, %List) - -declare %Binding @newBinding(i8*, i32) - -declare %PatternAST @newPatternAST(i8*, %List) - -declare %RuleAST @newRuleAST(i8*, %PatternAST, i32, %IntList) - -declare void @yyfinished() - -declare i32 @yylex() - -declare void @doGram(%List) - -declare i32 @yygrowstack() diff --git a/test/CodeGen/Generic/badlive.ll b/test/CodeGen/Generic/badlive.ll deleted file mode 100644 index 43b03e31fa83b..0000000000000 --- a/test/CodeGen/Generic/badlive.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: llc < %s - -define i32 @main() { -bb0: - %reg109 = malloc i32, i32 100 ; <i32*> [#uses=2] - br label %bb2 - -bb2: ; preds = %bb2, %bb0 - %cann-indvar1 = phi i32 [ 0, %bb0 ], [ %add1-indvar1, %bb2 ] ; <i32> [#uses=2] - %reg127 = mul i32 %cann-indvar1, 2 ; <i32> [#uses=1] - %add1-indvar1 = add i32 %cann-indvar1, 1 ; <i32> [#uses=1] - store i32 999, i32* %reg109 - %cond1015 = icmp sle i32 1, 99 ; <i1> [#uses=1] - %reg128 = add i32 %reg127, 2 ; <i32> [#uses=0] - br i1 %cond1015, label %bb2, label %bb4 - -bb4: ; preds = %bb4, %bb2 - %cann-indvar = phi i32 [ %add1-indvar, %bb4 ], [ 0, %bb2 ] ; <i32> [#uses=1] - %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2] - store i32 333, i32* %reg109 - %reg131 = add i32 %add1-indvar, 3 ; <i32> [#uses=1] - %cond1017 = icmp ule i32 %reg131, 99 ; <i1> [#uses=1] - br i1 %cond1017, label %bb4, label %bb5 - -bb5: ; preds = %bb4 - ret i32 0 -} - diff --git a/test/CodeGen/Generic/builtin-expect.ll b/test/CodeGen/Generic/builtin-expect.ll new file mode 100644 index 0000000000000..e8cd07badf0ce --- /dev/null +++ b/test/CodeGen/Generic/builtin-expect.ll @@ -0,0 +1,223 @@ +; RUN: llc < %s + +define i32 @test1(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %cmp = icmp sgt i32 %tmp, 1 + %conv = zext i1 %cmp to i32 + %conv1 = sext i32 %conv to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv1, i64 1) + %tobool = icmp ne i64 %expval, 0 + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +declare i64 @llvm.expect.i64(i64, i64) nounwind readnone + +declare i32 @f(...) + +define i32 @test2(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %conv = sext i32 %tmp to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) + %tobool = icmp ne i64 %expval, 0 + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test3(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %tobool = icmp ne i32 %tmp, 0 + %lnot = xor i1 %tobool, true + %lnot.ext = zext i1 %lnot to i32 + %conv = sext i32 %lnot.ext to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) + %tobool1 = icmp ne i64 %expval, 0 + br i1 %tobool1, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test4(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %tobool = icmp ne i32 %tmp, 0 + %lnot = xor i1 %tobool, true + %lnot1 = xor i1 %lnot, true + %lnot.ext = zext i1 %lnot1 to i32 + %conv = sext i32 %lnot.ext to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) + %tobool2 = icmp ne i64 %expval, 0 + br i1 %tobool2, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test5(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %cmp = icmp slt i32 %tmp, 0 + %conv = zext i1 %cmp to i32 + %conv1 = sext i32 %conv to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv1, i64 0) + %tobool = icmp ne i64 %expval, 0 + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test6(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %conv = sext i32 %tmp to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) + switch i64 %expval, label %sw.epilog [ + i64 1, label %sw.bb + i64 2, label %sw.bb + ] + +sw.bb: ; preds = %entry, %entry + store i32 0, i32* %retval + br label %return + +sw.epilog: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %sw.epilog, %sw.bb + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test7(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %conv = sext i32 %tmp to i64 + %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1) + switch i64 %expval, label %sw.epilog [ + i64 2, label %sw.bb + i64 3, label %sw.bb + ] + +sw.bb: ; preds = %entry, %entry + %tmp1 = load i32* %x.addr, align 4 + store i32 %tmp1, i32* %retval + br label %return + +sw.epilog: ; preds = %entry + store i32 0, i32* %retval + br label %return + +return: ; preds = %sw.epilog, %sw.bb + %0 = load i32* %retval + ret i32 %0 +} + +define i32 @test8(i32 %x) nounwind uwtable ssp { +entry: + %retval = alloca i32, align 4 + %x.addr = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + %tmp = load i32* %x.addr, align 4 + %cmp = icmp sgt i32 %tmp, 1 + %conv = zext i1 %cmp to i32 + %expval = call i32 @llvm.expect.i32(i32 %conv, i32 1) + %tobool = icmp ne i32 %expval, 0 + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + %call = call i32 (...)* @f() + store i32 %call, i32* %retval + br label %return + +if.end: ; preds = %entry + store i32 1, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %0 = load i32* %retval + ret i32 %0 +} + +declare i32 @llvm.expect.i32(i32, i32) nounwind readnone + diff --git a/test/CodeGen/Generic/crash.ll b/test/CodeGen/Generic/crash.ll index e7cc7e3394062..d889389b7c530 100644 --- a/test/CodeGen/Generic/crash.ll +++ b/test/CodeGen/Generic/crash.ll @@ -1,7 +1,7 @@ ; RUN: llc %s -o - ; PR6332 -%struct.AVCodecTag = type opaque +%struct.AVCodecTag = type {} @ff_codec_bmp_tags = external global [0 x %struct.AVCodecTag] @tags = global [1 x %struct.AVCodecTag*] [%struct.AVCodecTag* getelementptr inbounds ([0 x %struct.AVCodecTag]* @ff_codec_bmp_tags, i32 0, i32 0)] diff --git a/test/CodeGen/Generic/edge-bundles-blockIDs.ll b/test/CodeGen/Generic/edge-bundles-blockIDs.ll new file mode 100644 index 0000000000000..b4ae415b50130 --- /dev/null +++ b/test/CodeGen/Generic/edge-bundles-blockIDs.ll @@ -0,0 +1,81 @@ +; Make sure EdgeBoundles handles the case when the function size is less then +; the number of block IDs. +; RUN: llc -regalloc=fast < %s + +define void @foo() nounwind { +entry: + br i1 undef, label %bb5.i1632, label %bb1.i1605 + +bb1.i1605: ; preds = %entry + br i1 undef, label %bb5.i73.i, label %bb3.i68.i + +bb3.i68.i: ; preds = %bb1.i1605 + unreachable + +bb5.i73.i: ; preds = %bb1.i1605 + br i1 undef, label %bb7.i79.i, label %bb6.i76.i + +bb6.i76.i: ; preds = %bb5.i73.i + unreachable + +bb7.i79.i: ; preds = %bb5.i73.i + br i1 undef, label %bb.i.i1608, label %bb8.i82.i + +bb8.i82.i: ; preds = %bb7.i79.i + unreachable + +bb.i.i1608: ; preds = %bb.i.i1608, %bb7.i79.i + br i1 undef, label %bb1.i.dis.preheader_crit_edge.i, label %bb.i.i1608 + +bb1.i.dis.preheader_crit_edge.i: ; preds = %bb.i.i1608 + br label %dis.i + +bb3.i.i1610: ; preds = %bb8.i.i, %bb7.i.i1615 + br i1 undef, label %bb5.i.i1613, label %bb4.i.i1611 + +bb4.i.i1611: ; preds = %bb3.i.i1610 + br label %bb5.i.i1613 + +bb5.i.i1613: ; preds = %bb4.i.i1611, %bb3.i.i1610 + unreachable + +bb7.i.i1615: ; preds = %getfloder.exit.i + br i1 undef, label %bb3.i.i1610, label %bb8.i.i + +bb8.i.i: ; preds = %bb7.i.i1615 + br i1 undef, label %bb3.i.i1610, label %bb9.i.i + +bb9.i.i: ; preds = %bb8.i.i + br label %bb12.i.i + +bb12.i.i: ; preds = %bb12.i.i, %bb9.i.i + br i1 undef, label %bb13.i.bb14.i_crit_edge.i, label %bb12.i.i + +bb13.i.bb14.i_crit_edge.i: ; preds = %bb12.i.i + br i1 undef, label %bb25.i.i, label %bb20.i.i + +bb19.i.i: ; preds = %bb20.i.i + br label %bb20.i.i + +bb20.i.i: ; preds = %bb19.i.i, %bb13.i.bb14.i_crit_edge.i + %or.cond.i = or i1 undef, undef + br i1 %or.cond.i, label %bb25.i.i, label %bb19.i.i + +bb25.i.i: ; preds = %bb20.i.i, %bb13.i.bb14.i_crit_edge.i + unreachable + +bb5.i1632: ; preds = %entry + unreachable + +dis.i: ; preds = %getfloder.exit.i, %bb1.i.dis.preheader_crit_edge.i + br i1 undef, label %bb.i96.i, label %bb1.i102.i + +bb.i96.i: ; preds = %dis.i + br label %getfloder.exit.i + +bb1.i102.i: ; preds = %dis.i + br label %getfloder.exit.i + +getfloder.exit.i: ; preds = %bb1.i102.i, %bb.i96.i + br i1 undef, label %bb7.i.i1615, label %dis.i +} diff --git a/test/CodeGen/Generic/getresult-undef.ll b/test/CodeGen/Generic/getresult-undef.ll deleted file mode 100644 index c675535335a03..0000000000000 --- a/test/CodeGen/Generic/getresult-undef.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s - -define double @foo() { - %t = getresult {double, double} undef, 1 - ret double %t -} diff --git a/test/CodeGen/Generic/invalid-memcpy.ll b/test/CodeGen/Generic/invalid-memcpy.ll index 8448565a2b824..2dfa28bac4824 100644 --- a/test/CodeGen/Generic/invalid-memcpy.ll +++ b/test/CodeGen/Generic/invalid-memcpy.ll @@ -4,16 +4,14 @@ ; greater than the alignment guaranteed for Qux or C.0.1173), but it ; should compile, not crash the code generator. -@C.0.1173 = external constant [33 x i8] ; <[33 x i8]*> [#uses=1] +@C.0.1173 = external constant [33 x i8] define void @Bork() { entry: - %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1] - %Qux1 = bitcast [33 x i8]* %Qux to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 ) - ret void + %Qux = alloca [33 x i8] + %Qux1 = bitcast [33 x i8]* %Qux to i8* + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %Qux1, i8* getelementptr inbounds ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8, i1 false) + ret void } -declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) - - +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind diff --git a/test/CodeGen/Generic/legalize-dbg-value.ll b/test/CodeGen/Generic/legalize-dbg-value.ll deleted file mode 100644 index b71aa8a927394..0000000000000 --- a/test/CodeGen/Generic/legalize-dbg-value.ll +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: llc < %s -o /dev/null - -; llvm.dbg.value instructions can have types which are not legal for the -; target. CodeGen should handle this. - -define i128 @__mulvti3(i128 %a, i128 %b) nounwind { -entry: - tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1), !dbg !11 - unreachable -} - -declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone - -!0 = metadata !{i128 170141183460469231731687303715884105727} -!1 = metadata !{i32 524544, metadata !2, metadata !"MAX", metadata !4, i32 29, metadata !8} ; [ DW_TAG_auto_variable ] -!2 = metadata !{i32 524299, metadata !3, i32 26, i32 0} ; [ DW_TAG_lexical_block ] -!3 = metadata !{i32 524334, i32 0, metadata !4, metadata !"__mulvti3", metadata !"__mulvti3", metadata !"__mulvti3", metadata !4, i32 26, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ] -!4 = metadata !{i32 524329, metadata !"mulvti3.c", metadata !"/Volumes/Sandbox/llvm/swb/Libcompiler_rt-6.roots/Libcompiler_rt-6/lib", metadata !5} ; [ DW_TAG_file_type ] -!5 = metadata !{i32 524305, i32 0, i32 1, metadata !"mulvti3.c", metadata !"/Volumes/Sandbox/llvm/swb/Libcompiler_rt-6.roots/Libcompiler_rt-6/lib", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2328)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!6 = metadata !{i32 524309, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] -!7 = metadata !{metadata !8, metadata !8, metadata !8} -!8 = metadata !{i32 524310, metadata !4, metadata !"ti_int", metadata !9, i32 78, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] -!9 = metadata !{i32 524329, metadata !"int_lib.h", metadata !"/Volumes/Sandbox/llvm/swb/Libcompiler_rt-6.roots/Libcompiler_rt-6/lib", metadata !5} ; [ DW_TAG_file_type ] -!10 = metadata !{i32 524324, metadata !4, metadata !"", metadata !4, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!11 = metadata !{i32 29, i32 0, metadata !2, null} diff --git a/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll index 282e973ff9adc..a3cab5d2e4531 100644 --- a/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll +++ b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll @@ -6,9 +6,9 @@ define void @foo(i64* %p, double* %q) nounwind { %t = invoke { i64, double } @wild() to label %normal unwind label %handler normal: - %mrv_gr = getresult { i64, double } %t, 0 + %mrv_gr = extractvalue { i64, double } %t, 0 store i64 %mrv_gr, i64* %p - %mrv_gr12681 = getresult { i64, double } %t, 1 + %mrv_gr12681 = extractvalue { i64, double } %t, 1 store double %mrv_gr12681, double* %q ret void diff --git a/test/CodeGen/Generic/spillccr.ll b/test/CodeGen/Generic/spillccr.ll deleted file mode 100644 index 0a774c64f82e6..0000000000000 --- a/test/CodeGen/Generic/spillccr.ll +++ /dev/null @@ -1,49 +0,0 @@ -; RUN: llc < %s - -; July 6, 2002 -- LLC Regression test -; This test case checks if the integer CC register %xcc (or %ccr) -; is correctly spilled. The code fragment came from function -; MakeGraph in Olden-mst. -; The original code made all comparisons with 0, so that the %xcc -; register is not needed for the branch in the first basic block. -; Replace 0 with 1 in the first comparson so that the -; branch-on-register instruction cannot be used directly, i.e., -; the %xcc register is needed for the first branch. -; - - %Graph = type %struct.graph_st* - %Hash = type %struct.hash* - %HashEntry = type %struct.hash_entry* - %Vertex = type %struct.vert_st* - %struct.graph_st = type { [1 x %Vertex] } - %struct.hash = type { %HashEntry*, i32 (i32)*, i32 } - %struct.hash_entry = type { i32, i8*, %HashEntry } - %struct.vert_st = type { i32, %Vertex, %Hash } -@HashRange = external global i32 ; <i32*> [#uses=0] -@.LC0 = internal global [13 x i8] c"Make phase 2\00" ; <[13 x i8]*> [#uses=0] -@.LC1 = internal global [13 x i8] c"Make phase 3\00" ; <[13 x i8]*> [#uses=0] -@.LC2 = internal global [13 x i8] c"Make phase 4\00" ; <[13 x i8]*> [#uses=0] -@.LC3 = internal global [15 x i8] c"Make returning\00" ; <[15 x i8]*> [#uses=0] - -define %Graph @MakeGraph(i32 %numvert, i32 %numproc) { -bb1: - %reg111 = add i32 %numproc, -1 ; <i32> [#uses=2] - %cond275 = icmp slt i32 %reg111, 1 ; <i1> [#uses=1] - %cond276 = icmp sle i32 %reg111, 0 ; <i1> [#uses=1] - %cond277 = icmp sge i32 %numvert, 0 ; <i1> [#uses=1] - %reg162 = add i32 %numvert, 3 ; <i32> [#uses=0] - br i1 %cond275, label %bb7, label %bb4 - -bb4: ; preds = %bb1 - br i1 %cond276, label %bb7, label %bb5 - -bb5: ; preds = %bb4 - br i1 %cond277, label %bb7, label %bb6 - -bb6: ; preds = %bb5 - ret %Graph null - -bb7: ; preds = %bb5, %bb4, %bb1 - ret %Graph null -} - diff --git a/test/CodeGen/Mips/2008-07-15-SmallSection.ll b/test/CodeGen/Mips/2008-07-15-SmallSection.ll index 91efd68622a2e..4795e478f761f 100644 --- a/test/CodeGen/Mips/2008-07-15-SmallSection.ll +++ b/test/CodeGen/Mips/2008-07-15-SmallSection.ll @@ -7,7 +7,7 @@ ; RUN: not grep {sbss} %t1 ; RUN: not grep {gp_rel} %t1 ; RUN: grep {\%hi} %t1 | count 2 -; RUN: grep {\%lo} %t1 | count 2 +; RUN: grep {\%lo} %t1 | count 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "mipsallegrexel-unknown-psp-elf" diff --git a/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll index 41ae5dd65f516..855194aa077e5 100644 --- a/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll +++ b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll @@ -5,13 +5,13 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "mipsallegrexel-unknown-psp-elf" -define i8 @A(i8 %e.0, i8 signext %sum) signext nounwind { +define signext i8 @A(i8 %e.0, i8 signext %sum) nounwind { entry: add i8 %sum, %e.0 ; <i8>:0 [#uses=1] ret i8 %0 } -define i16 @B(i16 %e.0, i16 signext %sum) signext nounwind { +define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind { entry: add i16 %sum, %e.0 ; <i16>:0 [#uses=1] ret i16 %0 diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll index 50eeecf991fb8..fb4f56cb5720c 100644 --- a/test/CodeGen/Mips/alloca.ll +++ b/test/CodeGen/Mips/alloca.ll @@ -4,15 +4,13 @@ define i32 @twoalloca(i32 %size) nounwind { entry: ; CHECK: subu $[[T0:[0-9]+]], $sp, $[[SZ:[0-9]+]] ; CHECK: addu $sp, $zero, $[[T0]] -; CHECK: addu $[[SP1:[0-9]+]], $zero, $sp -; CHECK: subu $[[T1:[0-9]+]], $sp, $[[SZ]] -; CHECK: addu $sp, $zero, $[[T1]] -; CHECK: addu $[[SP2:[0-9]+]], $zero, $sp -; CHECK: lw $25, %call16(foo)($gp) -; CHECK: addiu $4, $[[SP1]], 24 -; CHECK: jalr $25 -; CHECK: lw $25, %call16(foo)($gp) -; CHECK: addiu $4, $[[SP2]], 24 +; CHECK: addiu $[[T1:[0-9]+]], $sp, [[OFF:[0-9]+]] +; CHECK: subu $[[T2:[0-9]+]], $sp, $[[SZ]] +; CHECK: addu $sp, $zero, $[[T2]] +; CHECK: addiu $[[T3:[0-9]+]], $sp, [[OFF]] +; CHECK: lw $[[T4:[0-9]+]], %call16(foo)($gp) +; CHECK: addu $25, $zero, $[[T4]] +; CHECK: addu $4, $zero, $[[T1]] ; CHECK: jalr $25 %tmp1 = alloca i8, i32 %size, align 4 %add.ptr = getelementptr inbounds i8* %tmp1, i32 5 @@ -29,3 +27,72 @@ declare void @foo2(double, double, i32) declare i32 @foo(i8*) +@.str = private unnamed_addr constant [22 x i8] c"%d %d %d %d %d %d %d\0A\00", align 1 + +define i32 @alloca2(i32 %size) nounwind { +entry: +; dynamic allocated stack area and $gp restore slot have the same offsets +; relative to $sp. +; +; CHECK: alloca2 +; CHECK: .cprestore [[OFF:[0-9]+]] +; CHECK: subu $[[T0:[0-9]+]], $sp, $[[SZ:[0-9]+]] +; CHECK: addu $sp, $zero, $[[T0]] +; CHECK: addiu $[[T1:[0-9]+]], $sp, [[OFF]] + + %tmp1 = alloca i8, i32 %size, align 4 + %0 = bitcast i8* %tmp1 to i32* + %cmp = icmp sgt i32 %size, 10 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry +; CHECK: addiu $4, $[[T1]], 40 + + %add.ptr = getelementptr inbounds i8* %tmp1, i32 40 + %1 = bitcast i8* %add.ptr to i32* + call void @foo3(i32* %1) nounwind + %arrayidx15.pre = getelementptr inbounds i8* %tmp1, i32 12 + %.pre = bitcast i8* %arrayidx15.pre to i32* + br label %if.end + +if.else: ; preds = %entry +; CHECK: addiu $4, $[[T1]], 12 + + %add.ptr5 = getelementptr inbounds i8* %tmp1, i32 12 + %2 = bitcast i8* %add.ptr5 to i32* + call void @foo3(i32* %2) nounwind + br label %if.end + +if.end: ; preds = %if.else, %if.then +; CHECK: lw $5, 0($[[T1]]) +; CHECK: lw $25, %call16(printf) + + %.pre-phi = phi i32* [ %2, %if.else ], [ %.pre, %if.then ] + %tmp7 = load i32* %0, align 4, !tbaa !0 + %arrayidx9 = getelementptr inbounds i8* %tmp1, i32 4 + %3 = bitcast i8* %arrayidx9 to i32* + %tmp10 = load i32* %3, align 4, !tbaa !0 + %arrayidx12 = getelementptr inbounds i8* %tmp1, i32 8 + %4 = bitcast i8* %arrayidx12 to i32* + %tmp13 = load i32* %4, align 4, !tbaa !0 + %tmp16 = load i32* %.pre-phi, align 4, !tbaa !0 + %arrayidx18 = getelementptr inbounds i8* %tmp1, i32 16 + %5 = bitcast i8* %arrayidx18 to i32* + %tmp19 = load i32* %5, align 4, !tbaa !0 + %arrayidx21 = getelementptr inbounds i8* %tmp1, i32 20 + %6 = bitcast i8* %arrayidx21 to i32* + %tmp22 = load i32* %6, align 4, !tbaa !0 + %arrayidx24 = getelementptr inbounds i8* %tmp1, i32 24 + %7 = bitcast i8* %arrayidx24 to i32* + %tmp25 = load i32* %7, align 4, !tbaa !0 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([22 x i8]* @.str, i32 0, i32 0), i32 %tmp7, i32 %tmp10, i32 %tmp13, i32 %tmp16, i32 %tmp19, i32 %tmp22, i32 %tmp25) nounwind + ret i32 0 +} + +declare void @foo3(i32*) + +declare i32 @printf(i8* nocapture, ...) nounwind + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll index 9a30453a51fce..560f2e9b08740 100644 --- a/test/CodeGen/Mips/i64arg.ll +++ b/test/CodeGen/Mips/i64arg.ll @@ -10,8 +10,8 @@ entry: ; CHECK: jalr tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind ; CHECK: lw $25, %call16(ff2) -; CHECK: lw $[[R2:[0-9]+]], 80($sp) -; CHECK: lw $[[R3:[0-9]+]], 84($sp) +; CHECK: lw $[[R2:[0-9]+]], 88($sp) +; CHECK: lw $[[R3:[0-9]+]], 92($sp) ; CHECK: addu $4, $zero, $[[R2]] ; CHECK: addu $5, $zero, $[[R3]] ; CHECK: jalr $25 diff --git a/test/CodeGen/Mips/inlineasmmemop.ll b/test/CodeGen/Mips/inlineasmmemop.ll new file mode 100644 index 0000000000000..c5658923dcc68 --- /dev/null +++ b/test/CodeGen/Mips/inlineasmmemop.ll @@ -0,0 +1,23 @@ +; RUN: llc -march=mipsel -mcpu=4ke < %s | FileCheck %s + +@g1 = external global i32 + +define i32 @f1(i32 %x) nounwind { +entry: +; CHECK: addiu $[[T0:[0-9]+]], $sp +; CHECK: #APP +; CHECK: sw $4, 0($[[T0]]) +; CHECK: #NO_APP +; CHECK: lw $[[T1:[0-9]+]], %got(g1)($gp) +; CHECK: #APP +; CHECK: lw $[[T3:[0-9]+]], 0($[[T0]]) +; CHECK: #NO_APP +; CHECK: sw $[[T3]], 0($[[T1]]) + + %l1 = alloca i32, align 4 + call void asm "sw $1, $0", "=*m,r"(i32* %l1, i32 %x) nounwind + %0 = call i32 asm "lw $0, $1", "=r,*m"(i32* %l1) nounwind + store i32 %0, i32* @g1, align 4 + ret i32 %0 +} + diff --git a/test/CodeGen/Mips/internalfunc.ll b/test/CodeGen/Mips/internalfunc.ll index 50d099385a6e6..c2a4e5cfc24fb 100644 --- a/test/CodeGen/Mips/internalfunc.ll +++ b/test/CodeGen/Mips/internalfunc.ll @@ -15,7 +15,7 @@ entry: define void @caller(i32 %a0, i32 %a1) nounwind { entry: ; CHECK: lw $[[R1:[0-9]+]], %got(caller.sf1)($gp) -; CHECK: addiu ${{[0-9]+}}, $[[R1]], %lo(caller.sf1) +; CHECK: lw $25, %lo(caller.sf1)($[[R1]]) %tobool = icmp eq i32 %a1, 0 br i1 %tobool, label %if.end, label %if.then @@ -26,9 +26,9 @@ if.then: ; preds = %entry if.end: ; preds = %entry, %if.then ; CHECK: lw $[[R2:[0-9]+]], %got(sf2)($gp) -; CHECK: lw $[[R3:[0-9]+]], %got(caller.sf1)($gp) ; CHECK: addiu ${{[0-9]+}}, $[[R2]], %lo(sf2) -; CHECK: addiu ${{[0-9]+}}, $[[R3]], %lo(caller.sf1) +; CHECK: lw $[[R3:[0-9]+]], %got(caller.sf1)($gp) +; CHECK: sw ${{[0-9]+}}, %lo(caller.sf1)($[[R3]]) %tobool3 = icmp ne i32 %a0, 0 %tmp4 = load void (...)** @gf1, align 4 %cond = select i1 %tobool3, void (...)* %tmp4, void (...)* bitcast (void ()* @sf2 to void (...)*) diff --git a/test/CodeGen/Mips/largeimmprinting.ll b/test/CodeGen/Mips/largeimmprinting.ll index fd7ae9e0ac20d..fcc20f799440f 100644 --- a/test/CodeGen/Mips/largeimmprinting.ll +++ b/test/CodeGen/Mips/largeimmprinting.ll @@ -8,7 +8,7 @@ define void @f() nounwind { entry: ; CHECK: lui $at, 65534 ; CHECK: addu $at, $sp, $at -; CHECK: addiu $sp, $at, -16 +; CHECK: addiu $sp, $at, -24 ; CHECK: .cprestore 65536 %agg.tmp = alloca %struct.S1, align 1 diff --git a/test/CodeGen/Mips/o32_cc_byval.ll b/test/CodeGen/Mips/o32_cc_byval.ll index b78c393498c4b..f5e1a878dcfa4 100644 --- a/test/CodeGen/Mips/o32_cc_byval.ll +++ b/test/CodeGen/Mips/o32_cc_byval.ll @@ -24,7 +24,7 @@ entry: ; CHECK: sw $[[R4]], 28($sp) ; CHECK: sw $[[R5]], 32($sp) ; CHECK: sw $[[R6]], 36($sp) -; CHECK: lw $6, 0($[[R0]]) +; CHECK: lw $6, %lo(f1.s1)($[[R1]]) ; CHECK: lw $7, 4($[[R0]]) %agg.tmp10 = alloca %struct.S3, align 4 call void @callee1(float 2.000000e+01, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind diff --git a/test/CodeGen/Mips/private.ll b/test/CodeGen/Mips/private.ll index 34b75477b6896..4cc48f098a9e7 100644 --- a/test/CodeGen/Mips/private.ll +++ b/test/CodeGen/Mips/private.ll @@ -6,8 +6,6 @@ ; RUN: grep \\\$baz: %t ; RUN: grep lw.*\\\$baz %t -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/PTX/add.ll b/test/CodeGen/PTX/add.ll index 235b00e8782fd..293aebe51e0b1 100644 --- a/test/CodeGen/PTX/add.ll +++ b/test/CodeGen/PTX/add.ll @@ -1,70 +1,70 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16(i16 %x, i16 %y) { -; CHECK: add.u16 rh0, rh1, rh2; +; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, rh{{[0-9]+}}; ; CHECK-NEXT: ret; %z = add i16 %x, %y ret i16 %z } define ptx_device i32 @t1_u32(i32 %x, i32 %y) { -; CHECK: add.u32 r0, r1, r2; +; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %z = add i32 %x, %y ret i32 %z } define ptx_device i64 @t1_u64(i64 %x, i64 %y) { -; CHECK: add.u64 rd0, rd1, rd2; +; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %z = add i64 %x, %y ret i64 %z } define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: add.f32 f0, f1, f2 +; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} ; CHECK-NEXT: ret; %z = fadd float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: add.f64 fd0, fd1, fd2 +; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} ; CHECK-NEXT: ret; %z = fadd double %x, %y ret double %z } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: add.u16 rh0, rh1, 1; +; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, 1; ; CHECK-NEXT: ret; %z = add i16 %x, 1 ret i16 %z } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: add.u32 r0, r1, 1; +; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, 1; ; CHECK-NEXT: ret; %z = add i32 %x, 1 ret i32 %z } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: add.u64 rd0, rd1, 1; +; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, 1; ; CHECK-NEXT: ret; %z = add i64 %x, 1 ret i64 %z } define ptx_device float @t2_f32(float %x) { -; CHECK: add.f32 f0, f1, 0F3F800000; +; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0F3F800000; ; CHECK-NEXT: ret; %z = fadd float %x, 1.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: add.f64 fd0, fd1, 0D3FF0000000000000; +; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0D3FF0000000000000; ; CHECK-NEXT: ret; %z = fadd double %x, 1.0 ret double %z diff --git a/test/CodeGen/PTX/aggregates.ll b/test/CodeGen/PTX/aggregates.ll new file mode 100644 index 0000000000000..23f28a79c0cd9 --- /dev/null +++ b/test/CodeGen/PTX/aggregates.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -march=ptx32 -mattr=sm20 | FileCheck %s + +%complex = type { float, float } + +define ptx_device %complex @complex_add(%complex %a, %complex %b) { +entry: +; CHECK: ld.param.f32 r[[R0:[0-9]+]], [__param_1]; +; CHECK-NEXT: ld.param.f32 r[[R2:[0-9]+]], [__param_3]; +; CHECK-NEXT: ld.param.f32 r[[R1:[0-9]+]], [__param_2]; +; CHECK-NEXT: ld.param.f32 r[[R3:[0-9]+]], [__param_4]; +; CHECK-NEXT: add.rn.f32 r[[R0]], r[[R0]], r[[R2]]; +; CHECK-NEXT: add.rn.f32 r[[R1]], r[[R1]], r[[R3]]; +; CHECK-NEXT: ret; + %a.real = extractvalue %complex %a, 0 + %a.imag = extractvalue %complex %a, 1 + %b.real = extractvalue %complex %b, 0 + %b.imag = extractvalue %complex %b, 1 + %ret.real = fadd float %a.real, %b.real + %ret.imag = fadd float %a.imag, %b.imag + %ret.0 = insertvalue %complex undef, float %ret.real, 0 + %ret.1 = insertvalue %complex %ret.0, float %ret.imag, 1 + ret %complex %ret.1 +} diff --git a/test/CodeGen/PTX/bitwise.ll b/test/CodeGen/PTX/bitwise.ll index dbc77e53330b7..385928073506a 100644 --- a/test/CodeGen/PTX/bitwise.ll +++ b/test/CodeGen/PTX/bitwise.ll @@ -3,21 +3,21 @@ ; preds define ptx_device i32 @t1_and_preds(i1 %x, i1 %y) { -; CHECK: and.pred p0, p1, p2 +; CHECK: and.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} %c = and i1 %x, %y %d = zext i1 %c to i32 ret i32 %d } define ptx_device i32 @t1_or_preds(i1 %x, i1 %y) { -; CHECK: or.pred p0, p1, p2 +; CHECK: or.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} %a = or i1 %x, %y %b = zext i1 %a to i32 ret i32 %b } define ptx_device i32 @t1_xor_preds(i1 %x, i1 %y) { -; CHECK: xor.pred p0, p1, p2 +; CHECK: xor.pred p{{[0-9]+}}, p{{[0-9]+}}, p{{[0-9]+}} %a = xor i1 %x, %y %b = zext i1 %a to i32 ret i32 %b diff --git a/test/CodeGen/PTX/bra.ll b/test/CodeGen/PTX/bra.ll index 49383eb3cf961..7cc944466d21c 100644 --- a/test/CodeGen/PTX/bra.ll +++ b/test/CodeGen/PTX/bra.ll @@ -10,15 +10,15 @@ loop: define ptx_device i32 @test_bra_cond_direct(i32 %x, i32 %y) { entry: -; CHECK: setp.le.u32 p0, r1, r2 +; CHECK: setp.le.u32 p0, r[[R0:[0-9]+]], r[[R1:[0-9]+]] %p = icmp ugt i32 %x, %y ; CHECK-NEXT: @p0 bra ; CHECK-NOT: bra br i1 %p, label %clause.if, label %clause.else clause.if: -; CHECK: mov.u32 r0, r1 +; CHECK: mov.u32 r{{[0-9]+}}, r[[R0]] ret i32 %x clause.else: -; CHECK: mov.u32 r0, r2 +; CHECK: mov.u32 r{{[0-9]+}}, r[[R1]] ret i32 %y } diff --git a/test/CodeGen/PTX/cvt.ll b/test/CodeGen/PTX/cvt.ll index 2f793dede6213..853abaf7fcbeb 100644 --- a/test/CodeGen/PTX/cvt.ll +++ b/test/CodeGen/PTX/cvt.ll @@ -4,8 +4,10 @@ ; (note: we convert back to i32 to return) define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) { -; CHECK: cvt.pred.u16 p0, rh1; -; CHECK: ret; +; CHECK: setp.gt.u16 p[[P0:[0-9]+]], rh{{[0-9]+}}, 0 +; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; +; CHECK-NEXT: ret; %a = trunc i16 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -13,8 +15,10 @@ define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) { } define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) { -; CHECK: cvt.pred.u32 p0, r1; -; CHECK: ret; +; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0 +; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; +; CHECK-NEXT: ret; %a = trunc i32 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -22,8 +26,10 @@ define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) { } define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) { -; CHECK: cvt.pred.u64 p0, rd1; -; CHECK: ret; +; CHECK: setp.gt.u64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0 +; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; +; CHECK-NEXT: ret; %a = trunc i64 %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -31,8 +37,10 @@ define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) { } define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) { -; CHECK: cvt.rni.pred.f32 p0, f1; -; CHECK: ret; +; CHECK: setp.gt.f32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0 +; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; +; CHECK-NEXT: ret; %a = fptoui float %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -40,8 +48,10 @@ define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) { } define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) { -; CHECK: cvt.rni.pred.f64 p0, fd1; -; CHECK: ret; +; CHECK: setp.gt.f64 p[[P0:[0-9]+]], rd{{[0-9]+}}, 0 +; CHECK-NEXT: and.pred p0, p[[P0:[0-9]+]], p{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0:[0-9]+]]; +; CHECK-NEXT: ret; %a = fptoui double %x to i1 %b = and i1 %a, %y %c = zext i1 %b to i32 @@ -51,36 +61,36 @@ define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) { ; i16 define ptx_device i16 @cvt_i16_preds(i1 %x) { -; CHECK: cvt.u16.pred rh0, p1; -; CHECK: ret; +; CHECK: selp.u16 rh{{[0-9]+}}, 1, 0, p{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i1 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_i32(i32 %x) { -; CHECK: cvt.u16.u32 rh0, r1; -; CHECK: ret; +; CHECK: cvt.u16.u32 rh{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = trunc i32 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_i64(i64 %x) { -; CHECK: cvt.u16.u64 rh0, rd1; -; CHECK: ret; +; CHECK: cvt.u16.u64 rh{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = trunc i64 %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_f32(float %x) { -; CHECK: cvt.rni.u16.f32 rh0, f1; -; CHECK: ret; +; CHECK: cvt.rzi.u16.f32 rh{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptoui float %x to i16 ret i16 %a } define ptx_device i16 @cvt_i16_f64(double %x) { -; CHECK: cvt.rni.u16.f64 rh0, fd1; -; CHECK: ret; +; CHECK: cvt.rzi.u16.f64 rh{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptoui double %x to i16 ret i16 %a } @@ -88,36 +98,36 @@ define ptx_device i16 @cvt_i16_f64(double %x) { ; i32 define ptx_device i32 @cvt_i32_preds(i1 %x) { -; CHECK: cvt.u32.pred r0, p1; -; CHECK: ret; +; CHECK: selp.u32 r{{[0-9]+}}, 1, 0, p{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i1 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_i16(i16 %x) { -; CHECK: cvt.u32.u16 r0, rh1; -; CHECK: ret; +; CHECK: cvt.u32.u16 r{{[0-9]+}}, rh{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i16 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_i64(i64 %x) { -; CHECK: cvt.u32.u64 r0, rd1; -; CHECK: ret; +; CHECK: cvt.u32.u64 r{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = trunc i64 %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_f32(float %x) { -; CHECK: cvt.rni.u32.f32 r0, f1; -; CHECK: ret; +; CHECK: cvt.rzi.u32.f32 r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptoui float %x to i32 ret i32 %a } define ptx_device i32 @cvt_i32_f64(double %x) { -; CHECK: cvt.rni.u32.f64 r0, fd1; -; CHECK: ret; +; CHECK: cvt.rzi.u32.f64 r{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptoui double %x to i32 ret i32 %a } @@ -125,35 +135,35 @@ define ptx_device i32 @cvt_i32_f64(double %x) { ; i64 define ptx_device i64 @cvt_i64_preds(i1 %x) { -; CHECK: cvt.u64.pred rd0, p1; -; CHECK: ret; +; CHECK: selp.u64 rd{{[0-9]+}}, 1, 0, p{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i1 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_i16(i16 %x) { -; CHECK: cvt.u64.u16 rd0, rh1; -; CHECK: ret; +; CHECK: cvt.u64.u16 rd{{[0-9]+}}, rh{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i16 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_i32(i32 %x) { -; CHECK: cvt.u64.u32 rd0, r1; -; CHECK: ret; +; CHECK: cvt.u64.u32 rd{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = zext i32 %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_f32(float %x) { -; CHECK: cvt.rni.u64.f32 rd0, f1; -; CHECK: ret; +; CHECK: cvt.rzi.u64.f32 rd{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptoui float %x to i64 ret i64 %a } define ptx_device i64 @cvt_i64_f64(double %x) { -; CHECK: cvt.rni.u64.f64 rd0, fd1; +; CHECK: cvt.rzi.u64.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK: ret; %a = fptoui double %x to i64 ret i64 %a @@ -162,36 +172,36 @@ define ptx_device i64 @cvt_i64_f64(double %x) { ; f32 define ptx_device float @cvt_f32_preds(i1 %x) { -; CHECK: cvt.rn.f32.pred f0, p1; -; CHECK: ret; +; CHECK: selp.f32 r{{[0-9]+}}, 0F3F800000, 0F00000000, p{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i1 %x to float ret float %a } define ptx_device float @cvt_f32_i16(i16 %x) { -; CHECK: cvt.rn.f32.u16 f0, rh1; -; CHECK: ret; +; CHECK: cvt.rn.f32.u16 r{{[0-9]+}}, rh{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i16 %x to float ret float %a } define ptx_device float @cvt_f32_i32(i32 %x) { -; CHECK: cvt.rn.f32.u32 f0, r1; -; CHECK: ret; +; CHECK: cvt.rn.f32.u32 r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i32 %x to float ret float %a } define ptx_device float @cvt_f32_i64(i64 %x) { -; CHECK: cvt.rn.f32.u64 f0, rd1; -; CHECK: ret; +; CHECK: cvt.rn.f32.u64 r{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i64 %x to float ret float %a } define ptx_device float @cvt_f32_f64(double %x) { -; CHECK: cvt.rn.f32.f64 f0, fd1; -; CHECK: ret; +; CHECK: cvt.rn.f32.f64 r{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fptrunc double %x to float ret float %a } @@ -199,36 +209,36 @@ define ptx_device float @cvt_f32_f64(double %x) { ; f64 define ptx_device double @cvt_f64_preds(i1 %x) { -; CHECK: cvt.rn.f64.pred fd0, p1; -; CHECK: ret; +; CHECK: selp.f64 rd{{[0-9]+}}, 0D3F80000000000000, 0D0000000000000000, p{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i1 %x to double ret double %a } define ptx_device double @cvt_f64_i16(i16 %x) { -; CHECK: cvt.rn.f64.u16 fd0, rh1; -; CHECK: ret; +; CHECK: cvt.rn.f64.u16 rd{{[0-9]+}}, rh{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i16 %x to double ret double %a } define ptx_device double @cvt_f64_i32(i32 %x) { -; CHECK: cvt.rn.f64.u32 fd0, r1; -; CHECK: ret; +; CHECK: cvt.rn.f64.u32 rd{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i32 %x to double ret double %a } define ptx_device double @cvt_f64_i64(i64 %x) { -; CHECK: cvt.rn.f64.u64 fd0, rd1; -; CHECK: ret; +; CHECK: cvt.rn.f64.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; +; CHECK-NEXT: ret; %a = uitofp i64 %x to double ret double %a } define ptx_device double @cvt_f64_f32(float %x) { -; CHECK: cvt.f64.f32 fd0, f1; -; CHECK: ret; +; CHECK: cvt.f64.f32 rd{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: ret; %a = fpext float %x to double ret double %a } diff --git a/test/CodeGen/PTX/fdiv-sm10.ll b/test/CodeGen/PTX/fdiv-sm10.ll index 121360ce9be34..049d8913b343d 100644 --- a/test/CodeGen/PTX/fdiv-sm10.ll +++ b/test/CodeGen/PTX/fdiv-sm10.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm10 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: div.approx.f32 f0, f1, f2; +; CHECK: div.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fdiv float %x, %y ret float %a } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: div.f64 fd0, fd1, fd2; +; CHECK: div.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fdiv double %x, %y ret double %a diff --git a/test/CodeGen/PTX/fdiv-sm13.ll b/test/CodeGen/PTX/fdiv-sm13.ll index 0ec7bae8030ef..2d953397d39ae 100644 --- a/test/CodeGen/PTX/fdiv-sm13.ll +++ b/test/CodeGen/PTX/fdiv-sm13.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: div.approx.f32 f0, f1, f2; +; CHECK: div.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fdiv float %x, %y ret float %a } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: div.rn.f64 fd0, fd1, fd2; +; CHECK: div.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fdiv double %x, %y ret double %a diff --git a/test/CodeGen/PTX/fneg.ll b/test/CodeGen/PTX/fneg.ll index 22eeda3f0cbf2..66ca74a6ff8ea 100644 --- a/test/CodeGen/PTX/fneg.ll +++ b/test/CodeGen/PTX/fneg.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device float @t1_f32(float %x) { -; CHECK: neg.f32 f0, f1; +; CHECK: neg.f32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %y = fsub float -0.000000e+00, %x ret float %y } define ptx_device double @t1_f64(double %x) { -; CHECK: neg.f64 fd0, fd1; +; CHECK: neg.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %y = fsub double -0.000000e+00, %x ret double %y diff --git a/test/CodeGen/PTX/intrinsic.ll b/test/CodeGen/PTX/intrinsic.ll index cea41827ca478..af987d6588dac 100644 --- a/test/CodeGen/PTX/intrinsic.ll +++ b/test/CodeGen/PTX/intrinsic.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ptx32 -mattr=+ptx20,+sm20 | FileCheck %s +; RUN: llc < %s -march=ptx32 -mattr=+ptx20 | FileCheck %s define ptx_device i32 @test_tid_x() { ; CHECK: mov.u32 r0, %tid.x; diff --git a/test/CodeGen/PTX/ld.ll b/test/CodeGen/PTX/ld.ll index 377a95abe3db6..d184d1243ab9c 100644 --- a/test/CodeGen/PTX/ld.ll +++ b/test/CodeGen/PTX/ld.ll @@ -63,7 +63,7 @@ define ptx_device i16 @t1_u16(i16* %p) { entry: -;CHECK: ld.global.u16 rh0, [r1]; +;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}]; ;CHECK-NEXT: ret; %x = load i16* %p ret i16 %x @@ -71,7 +71,7 @@ entry: define ptx_device i32 @t1_u32(i32* %p) { entry: -;CHECK: ld.global.u32 r0, [r1]; +;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}]; ;CHECK-NEXT: ret; %x = load i32* %p ret i32 %x @@ -79,7 +79,7 @@ entry: define ptx_device i64 @t1_u64(i64* %p) { entry: -;CHECK: ld.global.u64 rd0, [r1]; +;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}]; ;CHECK-NEXT: ret; %x = load i64* %p ret i64 %x @@ -87,7 +87,7 @@ entry: define ptx_device float @t1_f32(float* %p) { entry: -;CHECK: ld.global.f32 f0, [r1]; +;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}]; ;CHECK-NEXT: ret; %x = load float* %p ret float %x @@ -95,7 +95,7 @@ entry: define ptx_device double @t1_f64(double* %p) { entry: -;CHECK: ld.global.f64 fd0, [r1]; +;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}]; ;CHECK-NEXT: ret; %x = load double* %p ret double %x @@ -103,7 +103,7 @@ entry: define ptx_device i16 @t2_u16(i16* %p) { entry: -;CHECK: ld.global.u16 rh0, [r1+2]; +;CHECK: ld.global.u16 rh{{[0-9]+}}, [r{{[0-9]+}}+2]; ;CHECK-NEXT: ret; %i = getelementptr i16* %p, i32 1 %x = load i16* %i @@ -112,7 +112,7 @@ entry: define ptx_device i32 @t2_u32(i32* %p) { entry: -;CHECK: ld.global.u32 r0, [r1+4]; +;CHECK: ld.global.u32 r{{[0-9]+}}, [r{{[0-9]+}}+4]; ;CHECK-NEXT: ret; %i = getelementptr i32* %p, i32 1 %x = load i32* %i @@ -121,7 +121,7 @@ entry: define ptx_device i64 @t2_u64(i64* %p) { entry: -;CHECK: ld.global.u64 rd0, [r1+8]; +;CHECK: ld.global.u64 rd{{[0-9]+}}, [r{{[0-9]+}}+8]; ;CHECK-NEXT: ret; %i = getelementptr i64* %p, i32 1 %x = load i64* %i @@ -130,7 +130,7 @@ entry: define ptx_device float @t2_f32(float* %p) { entry: -;CHECK: ld.global.f32 f0, [r1+4]; +;CHECK: ld.global.f32 r{{[0-9]+}}, [r{{[0-9]+}}+4]; ;CHECK-NEXT: ret; %i = getelementptr float* %p, i32 1 %x = load float* %i @@ -139,7 +139,7 @@ entry: define ptx_device double @t2_f64(double* %p) { entry: -;CHECK: ld.global.f64 fd0, [r1+8]; +;CHECK: ld.global.f64 rd{{[0-9]+}}, [r{{[0-9]+}}+8]; ;CHECK-NEXT: ret; %i = getelementptr double* %p, i32 1 %x = load double* %i @@ -148,9 +148,9 @@ entry: define ptx_device i16 @t3_u16(i16* %p, i32 %q) { entry: -;CHECK: shl.b32 r0, r2, 1; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: ld.global.u16 rh0, [r0]; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 1; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]]; %i = getelementptr i16* %p, i32 %q %x = load i16* %i ret i16 %x @@ -158,9 +158,9 @@ entry: define ptx_device i32 @t3_u32(i32* %p, i32 %q) { entry: -;CHECK: shl.b32 r0, r2, 2; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: ld.global.u32 r0, [r0]; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]]; %i = getelementptr i32* %p, i32 %q %x = load i32* %i ret i32 %x @@ -168,9 +168,9 @@ entry: define ptx_device i64 @t3_u64(i64* %p, i32 %q) { entry: -;CHECK: shl.b32 r0, r2, 3; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: ld.global.u64 rd0, [r0]; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]]; %i = getelementptr i64* %p, i32 %q %x = load i64* %i ret i64 %x @@ -178,9 +178,9 @@ entry: define ptx_device float @t3_f32(float* %p, i32 %q) { entry: -;CHECK: shl.b32 r0, r2, 2; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: ld.global.f32 f0, [r0]; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]]; %i = getelementptr float* %p, i32 %q %x = load float* %i ret float %x @@ -188,9 +188,9 @@ entry: define ptx_device double @t3_f64(double* %p, i32 %q) { entry: -;CHECK: shl.b32 r0, r2, 3; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: ld.global.f64 fd0, [r0]; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]]; %i = getelementptr double* %p, i32 %q %x = load double* %i ret double %x @@ -198,8 +198,8 @@ entry: define ptx_device i16 @t4_global_u16() { entry: -;CHECK: mov.u32 r0, array_i16; -;CHECK-NEXT: ld.global.u16 rh0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; +;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 0 %x = load i16* %i @@ -208,8 +208,8 @@ entry: define ptx_device i32 @t4_global_u32() { entry: -;CHECK: mov.u32 r0, array_i32; -;CHECK-NEXT: ld.global.u32 r0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; +;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 %x = load i32* %i @@ -218,8 +218,8 @@ entry: define ptx_device i64 @t4_global_u64() { entry: -;CHECK: mov.u32 r0, array_i64; -;CHECK-NEXT: ld.global.u64 rd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; +;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 %x = load i64* %i @@ -228,8 +228,8 @@ entry: define ptx_device float @t4_global_f32() { entry: -;CHECK: mov.u32 r0, array_float; -;CHECK-NEXT: ld.global.f32 f0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; +;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 %x = load float* %i @@ -238,8 +238,8 @@ entry: define ptx_device double @t4_global_f64() { entry: -;CHECK: mov.u32 r0, array_double; -;CHECK-NEXT: ld.global.f64 fd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; +;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 %x = load double* %i @@ -248,8 +248,8 @@ entry: define ptx_device i16 @t4_const_u16() { entry: -;CHECK: mov.u32 r0, array_constant_i16; -;CHECK-NEXT: ld.const.u16 rh0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i16; +;CHECK-NEXT: ld.const.u16 rh{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16] addrspace(1)* @array_constant_i16, i32 0, i32 0 %x = load i16 addrspace(1)* %i @@ -258,8 +258,8 @@ entry: define ptx_device i32 @t4_const_u32() { entry: -;CHECK: mov.u32 r0, array_constant_i32; -;CHECK-NEXT: ld.const.u32 r0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i32; +;CHECK-NEXT: ld.const.u32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32] addrspace(1)* @array_constant_i32, i32 0, i32 0 %x = load i32 addrspace(1)* %i @@ -268,8 +268,8 @@ entry: define ptx_device i64 @t4_const_u64() { entry: -;CHECK: mov.u32 r0, array_constant_i64; -;CHECK-NEXT: ld.const.u64 rd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_i64; +;CHECK-NEXT: ld.const.u64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64] addrspace(1)* @array_constant_i64, i32 0, i32 0 %x = load i64 addrspace(1)* %i @@ -278,8 +278,8 @@ entry: define ptx_device float @t4_const_f32() { entry: -;CHECK: mov.u32 r0, array_constant_float; -;CHECK-NEXT: ld.const.f32 f0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_float; +;CHECK-NEXT: ld.const.f32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x float] addrspace(1)* @array_constant_float, i32 0, i32 0 %x = load float addrspace(1)* %i @@ -288,8 +288,8 @@ entry: define ptx_device double @t4_const_f64() { entry: -;CHECK: mov.u32 r0, array_constant_double; -;CHECK-NEXT: ld.const.f64 fd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_constant_double; +;CHECK-NEXT: ld.const.f64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x double] addrspace(1)* @array_constant_double, i32 0, i32 0 %x = load double addrspace(1)* %i @@ -298,8 +298,8 @@ entry: define ptx_device i16 @t4_local_u16() { entry: -;CHECK: mov.u32 r0, array_local_i16; -;CHECK-NEXT: ld.local.u16 rh0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i16; +;CHECK-NEXT: ld.local.u16 rh{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 %x = load i16 addrspace(2)* %i @@ -308,8 +308,8 @@ entry: define ptx_device i32 @t4_local_u32() { entry: -;CHECK: mov.u32 r0, array_local_i32; -;CHECK-NEXT: ld.local.u32 r0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i32; +;CHECK-NEXT: ld.local.u32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 %x = load i32 addrspace(2)* %i @@ -318,8 +318,8 @@ entry: define ptx_device i64 @t4_local_u64() { entry: -;CHECK: mov.u32 r0, array_local_i64; -;CHECK-NEXT: ld.local.u64 rd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i64; +;CHECK-NEXT: ld.local.u64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 %x = load i64 addrspace(2)* %i @@ -328,8 +328,8 @@ entry: define ptx_device float @t4_local_f32() { entry: -;CHECK: mov.u32 r0, array_local_float; -;CHECK-NEXT: ld.local.f32 f0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_float; +;CHECK-NEXT: ld.local.f32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 %x = load float addrspace(2)* %i @@ -338,8 +338,8 @@ entry: define ptx_device double @t4_local_f64() { entry: -;CHECK: mov.u32 r0, array_local_double; -;CHECK-NEXT: ld.local.f64 fd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_double; +;CHECK-NEXT: ld.local.f64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 %x = load double addrspace(2)* %i @@ -348,8 +348,8 @@ entry: define ptx_device i16 @t4_shared_u16() { entry: -;CHECK: mov.u32 r0, array_shared_i16; -;CHECK-NEXT: ld.shared.u16 rh0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i16; +;CHECK-NEXT: ld.shared.u16 rh{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 %x = load i16 addrspace(4)* %i @@ -358,8 +358,8 @@ entry: define ptx_device i32 @t4_shared_u32() { entry: -;CHECK: mov.u32 r0, array_shared_i32; -;CHECK-NEXT: ld.shared.u32 r0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i32; +;CHECK-NEXT: ld.shared.u32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 %x = load i32 addrspace(4)* %i @@ -368,8 +368,8 @@ entry: define ptx_device i64 @t4_shared_u64() { entry: -;CHECK: mov.u32 r0, array_shared_i64; -;CHECK-NEXT: ld.shared.u64 rd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i64; +;CHECK-NEXT: ld.shared.u64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 %x = load i64 addrspace(4)* %i @@ -378,8 +378,8 @@ entry: define ptx_device float @t4_shared_f32() { entry: -;CHECK: mov.u32 r0, array_shared_float; -;CHECK-NEXT: ld.shared.f32 f0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_float; +;CHECK-NEXT: ld.shared.f32 r{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 %x = load float addrspace(4)* %i @@ -388,8 +388,8 @@ entry: define ptx_device double @t4_shared_f64() { entry: -;CHECK: mov.u32 r0, array_shared_double; -;CHECK-NEXT: ld.shared.f64 fd0, [r0]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_double; +;CHECK-NEXT: ld.shared.f64 rd{{[0-9]+}}, [r[[R0]]]; ;CHECK-NEXT: ret; %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 %x = load double addrspace(4)* %i @@ -398,8 +398,8 @@ entry: define ptx_device i16 @t5_u16() { entry: -;CHECK: mov.u32 r0, array_i16; -;CHECK-NEXT: ld.global.u16 rh0, [r0+2]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; +;CHECK-NEXT: ld.global.u16 rh{{[0-9]+}}, [r[[R0]]+2]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 %x = load i16* %i @@ -408,8 +408,8 @@ entry: define ptx_device i32 @t5_u32() { entry: -;CHECK: mov.u32 r0, array_i32; -;CHECK-NEXT: ld.global.u32 r0, [r0+4]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; +;CHECK-NEXT: ld.global.u32 r{{[0-9]+}}, [r[[R0]]+4]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 %x = load i32* %i @@ -418,8 +418,8 @@ entry: define ptx_device i64 @t5_u64() { entry: -;CHECK: mov.u32 r0, array_i64; -;CHECK-NEXT: ld.global.u64 rd0, [r0+8]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; +;CHECK-NEXT: ld.global.u64 rd{{[0-9]+}}, [r[[R0]]+8]; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 %x = load i64* %i @@ -428,8 +428,8 @@ entry: define ptx_device float @t5_f32() { entry: -;CHECK: mov.u32 r0, array_float; -;CHECK-NEXT: ld.global.f32 f0, [r0+4]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; +;CHECK-NEXT: ld.global.f32 r{{[0-9]+}}, [r[[R0]]+4]; ;CHECK-NEXT: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 %x = load float* %i @@ -438,8 +438,8 @@ entry: define ptx_device double @t5_f64() { entry: -;CHECK: mov.u32 r0, array_double; -;CHECK-NEXT: ld.global.f64 fd0, [r0+8]; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; +;CHECK-NEXT: ld.global.f64 rd{{[0-9]+}}, [r[[R0]]+8]; ;CHECK-NEXT: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 %x = load double* %i diff --git a/test/CodeGen/PTX/llvm-intrinsic.ll b/test/CodeGen/PTX/llvm-intrinsic.ll index 1e265f5b7b3ac..4611c54be87db 100644 --- a/test/CodeGen/PTX/llvm-intrinsic.ll +++ b/test/CodeGen/PTX/llvm-intrinsic.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=ptx32 -mattr=+ptx20,+sm20 | FileCheck %s +; RUN: llc < %s -march=ptx32 -mattr=+ptx20 | FileCheck %s define ptx_device float @test_sqrt_f32(float %x) { entry: -; CHECK: sqrt.rn.f32 f0, f1; +; CHECK: sqrt.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call float @llvm.sqrt.f32(float %x) ret float %y @@ -10,7 +10,7 @@ entry: define ptx_device double @test_sqrt_f64(double %x) { entry: -; CHECK: sqrt.rn.f64 fd0, fd1; +; CHECK: sqrt.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call double @llvm.sqrt.f64(double %x) ret double %y @@ -18,7 +18,7 @@ entry: define ptx_device float @test_sin_f32(float %x) { entry: -; CHECK: sin.approx.f32 f0, f1; +; CHECK: sin.approx.f32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call float @llvm.sin.f32(float %x) ret float %y @@ -26,7 +26,7 @@ entry: define ptx_device double @test_sin_f64(double %x) { entry: -; CHECK: sin.approx.f64 fd0, fd1; +; CHECK: sin.approx.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call double @llvm.sin.f64(double %x) ret double %y @@ -34,7 +34,7 @@ entry: define ptx_device float @test_cos_f32(float %x) { entry: -; CHECK: cos.approx.f32 f0, f1; +; CHECK: cos.approx.f32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call float @llvm.cos.f32(float %x) ret float %y @@ -42,7 +42,7 @@ entry: define ptx_device double @test_cos_f64(double %x) { entry: -; CHECK: cos.approx.f64 fd0, fd1; +; CHECK: cos.approx.f64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %y = call double @llvm.cos.f64(double %x) ret double %y diff --git a/test/CodeGen/PTX/mad.ll b/test/CodeGen/PTX/mad.ll index 0c25f2c0030a1..0e4d3f995383e 100644 --- a/test/CodeGen/PTX/mad.ll +++ b/test/CodeGen/PTX/mad.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s define ptx_device float @t1_f32(float %x, float %y, float %z) { -; CHECK: mad.rn.f32 f0, f1, f2, f3; +; CHECK: mad.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fmul float %x, %y %b = fadd float %a, %z @@ -9,7 +9,7 @@ define ptx_device float @t1_f32(float %x, float %y, float %z) { } define ptx_device double @t1_f64(double %x, double %y, double %z) { -; CHECK: mad.rn.f64 fd0, fd1, fd2, fd3; +; CHECK: mad.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %a = fmul double %x, %y %b = fadd double %a, %z diff --git a/test/CodeGen/PTX/mov.ll b/test/CodeGen/PTX/mov.ll index 120572a0e8688..cce6a5b897612 100644 --- a/test/CodeGen/PTX/mov.ll +++ b/test/CodeGen/PTX/mov.ll @@ -1,61 +1,61 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16() { -; CHECK: mov.u16 rh0, 0; +; CHECK: mov.u16 rh{{[0-9]+}}, 0; ; CHECK: ret; ret i16 0 } define ptx_device i32 @t1_u32() { -; CHECK: mov.u32 r0, 0; +; CHECK: mov.u32 r{{[0-9]+}}, 0; ; CHECK: ret; ret i32 0 } define ptx_device i64 @t1_u64() { -; CHECK: mov.u64 rd0, 0; +; CHECK: mov.u64 rd{{[0-9]+}}, 0; ; CHECK: ret; ret i64 0 } define ptx_device float @t1_f32() { -; CHECK: mov.f32 f0, 0F00000000; +; CHECK: mov.f32 r{{[0-9]+}}, 0F00000000; ; CHECK: ret; ret float 0.0 } define ptx_device double @t1_f64() { -; CHECK: mov.f64 fd0, 0D0000000000000000; +; CHECK: mov.f64 rd{{[0-9]+}}, 0D0000000000000000; ; CHECK: ret; ret double 0.0 } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: mov.u16 rh0, rh1; +; CHECK: mov.u16 rh{{[0-9]+}}, rh{{[0-9]+}}; ; CHECK: ret; ret i16 %x } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: mov.u32 r0, r1; +; CHECK: mov.u32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK: ret; ret i32 %x } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: mov.u64 rd0, rd1; +; CHECK: mov.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK: ret; ret i64 %x } define ptx_device float @t3_f32(float %x) { -; CHECK: mov.f32 f0, f1; +; CHECK: mov.u32 r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; ret float %x } define ptx_device double @t3_f64(double %x) { -; CHECK: mov.f64 fd0, fd1; +; CHECK: mov.u64 rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; ret double %x } diff --git a/test/CodeGen/PTX/mul.ll b/test/CodeGen/PTX/mul.ll index 5ce042675dc87..491cc747afd0b 100644 --- a/test/CodeGen/PTX/mul.ll +++ b/test/CodeGen/PTX/mul.ll @@ -11,28 +11,28 @@ ;} define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: mul.f32 f0, f1, f2 +; CHECK: mul.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} ; CHECK-NEXT: ret; %z = fmul float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: mul.f64 fd0, fd1, fd2 +; CHECK: mul.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} ; CHECK-NEXT: ret; %z = fmul double %x, %y ret double %z } define ptx_device float @t2_f32(float %x) { -; CHECK: mul.f32 f0, f1, 0F40A00000; +; CHECK: mul.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0F40A00000; ; CHECK-NEXT: ret; %z = fmul float %x, 5.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: mul.f64 fd0, fd1, 0D4014000000000000; +; CHECK: mul.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0D4014000000000000; ; CHECK-NEXT: ret; %z = fmul double %x, 5.0 ret double %z diff --git a/test/CodeGen/PTX/options.ll b/test/CodeGen/PTX/options.ll index 92effa62a20ef..0fb6602fe87cc 100644 --- a/test/CodeGen/PTX/options.ll +++ b/test/CodeGen/PTX/options.ll @@ -5,6 +5,8 @@ ; RUN: llc < %s -march=ptx32 -mattr=sm10 | grep ".target sm_10" ; RUN: llc < %s -march=ptx32 -mattr=sm13 | grep ".target sm_13" ; RUN: llc < %s -march=ptx32 -mattr=sm20 | grep ".target sm_20" +; RUN: llc < %s -march=ptx32 -mattr=ptx23 | grep ".address_size 32" +; RUN: llc < %s -march=ptx64 -mattr=ptx23 | grep ".address_size 64" define ptx_device void @t1() { ret void diff --git a/test/CodeGen/PTX/parameter-order.ll b/test/CodeGen/PTX/parameter-order.ll index 95d4a328149c8..b16556e0661ce 100644 --- a/test/CodeGen/PTX/parameter-order.ll +++ b/test/CodeGen/PTX/parameter-order.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s -; CHECK: .func (.reg .u32 r0) test_parameter_order (.reg .f32 f1, .reg .u32 r1, .reg .u32 r2, .reg .f32 f2) +; CHECK: .func (.reg .b32 r{{[0-9]+}}) test_parameter_order (.reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}, .reg .b32 r{{[0-9]+}}) define ptx_device i32 @test_parameter_order(float %a, i32 %b, i32 %c, float %d) { -; CHECK: sub.u32 r0, r1, r2 +; CHECK: sub.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %result = sub i32 %b, %c ret i32 %result } diff --git a/test/CodeGen/PTX/selp.ll b/test/CodeGen/PTX/selp.ll index 6f1b03e5997f2..e705fbea27cd5 100644 --- a/test/CodeGen/PTX/selp.ll +++ b/test/CodeGen/PTX/selp.ll @@ -1,25 +1,25 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @test_selp_i32(i1 %x, i32 %y, i32 %z) { -; CHECK: selp.u32 r0, r1, r2, p1; +; CHECK: selp.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, p{{[0-9]+}}; %a = select i1 %x, i32 %y, i32 %z ret i32 %a } define ptx_device i64 @test_selp_i64(i1 %x, i64 %y, i64 %z) { -; CHECK: selp.u64 rd0, rd1, rd2, p1; +; CHECK: selp.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, p{{[0-9]+}}; %a = select i1 %x, i64 %y, i64 %z ret i64 %a } define ptx_device float @test_selp_f32(i1 %x, float %y, float %z) { -; CHECK: selp.f32 f0, f1, f2, p1; +; CHECK: selp.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, p{{[0-9]+}}; %a = select i1 %x, float %y, float %z ret float %a } define ptx_device double @test_selp_f64(i1 %x, double %y, double %z) { -; CHECK: selp.f64 fd0, fd1, fd2, p1; +; CHECK: selp.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}, p{{[0-9]+}}; %a = select i1 %x, double %y, double %z ret double %a } diff --git a/test/CodeGen/PTX/setp.ll b/test/CodeGen/PTX/setp.ll index 5836122049e67..e0044d6c31e9a 100644 --- a/test/CodeGen/PTX/setp.ll +++ b/test/CodeGen/PTX/setp.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @test_setp_eq_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.eq.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp eq i32 %x, %y %z = zext i1 %p to i32 @@ -10,8 +10,8 @@ define ptx_device i32 @test_setp_eq_u32_rr(i32 %x, i32 %y) { } define ptx_device i32 @test_setp_ne_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.ne.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ne i32 %x, %y %z = zext i1 %p to i32 @@ -19,8 +19,8 @@ define ptx_device i32 @test_setp_ne_u32_rr(i32 %x, i32 %y) { } define ptx_device i32 @test_setp_lt_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.lt.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ult i32 %x, %y %z = zext i1 %p to i32 @@ -28,8 +28,8 @@ define ptx_device i32 @test_setp_lt_u32_rr(i32 %x, i32 %y) { } define ptx_device i32 @test_setp_le_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.le.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.le.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ule i32 %x, %y %z = zext i1 %p to i32 @@ -37,8 +37,8 @@ define ptx_device i32 @test_setp_le_u32_rr(i32 %x, i32 %y) { } define ptx_device i32 @test_setp_gt_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.gt.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ugt i32 %x, %y %z = zext i1 %p to i32 @@ -46,17 +46,53 @@ define ptx_device i32 @test_setp_gt_u32_rr(i32 %x, i32 %y) { } define ptx_device i32 @test_setp_ge_u32_rr(i32 %x, i32 %y) { -; CHECK: setp.ge.u32 p0, r1, r2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.ge.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp uge i32 %x, %y %z = zext i1 %p to i32 ret i32 %z } +define ptx_device i32 @test_setp_lt_s32_rr(i32 %x, i32 %y) { +; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp slt i32 %x, %y + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_le_s32_rr(i32 %x, i32 %y) { +; CHECK: setp.le.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sle i32 %x, %y + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_gt_s32_rr(i32 %x, i32 %y) { +; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sgt i32 %x, %y + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_ge_s32_rr(i32 %x, i32 %y) { +; CHECK: setp.ge.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sge i32 %x, %y + %z = zext i1 %p to i32 + ret i32 %z +} + define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) { -; CHECK: setp.eq.u32 p0, r1, 1; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp eq i32 %x, 1 %z = zext i1 %p to i32 @@ -64,8 +100,8 @@ define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) { } define ptx_device i32 @test_setp_ne_u32_ri(i32 %x) { -; CHECK: setp.ne.u32 p0, r1, 1; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ne i32 %x, 1 %z = zext i1 %p to i32 @@ -73,8 +109,8 @@ define ptx_device i32 @test_setp_ne_u32_ri(i32 %x) { } define ptx_device i32 @test_setp_lt_u32_ri(i32 %x) { -; CHECK: setp.eq.u32 p0, r1, 0; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.eq.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ult i32 %x, 1 %z = zext i1 %p to i32 @@ -82,8 +118,8 @@ define ptx_device i32 @test_setp_lt_u32_ri(i32 %x) { } define ptx_device i32 @test_setp_le_u32_ri(i32 %x) { -; CHECK: setp.lt.u32 p0, r1, 2; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.lt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ule i32 %x, 1 %z = zext i1 %p to i32 @@ -91,8 +127,8 @@ define ptx_device i32 @test_setp_le_u32_ri(i32 %x) { } define ptx_device i32 @test_setp_gt_u32_ri(i32 %x) { -; CHECK: setp.gt.u32 p0, r1, 1; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp ugt i32 %x, 1 %z = zext i1 %p to i32 @@ -100,18 +136,54 @@ define ptx_device i32 @test_setp_gt_u32_ri(i32 %x) { } define ptx_device i32 @test_setp_ge_u32_ri(i32 %x) { -; CHECK: setp.ne.u32 p0, r1, 0; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.ne.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %p = icmp uge i32 %x, 1 %z = zext i1 %p to i32 ret i32 %z } +define ptx_device i32 @test_setp_lt_s32_ri(i32 %x) { +; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp slt i32 %x, 1 + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_le_s32_ri(i32 %x) { +; CHECK: setp.lt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 2; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sle i32 %x, 1 + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_gt_s32_ri(i32 %x) { +; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 1; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sgt i32 %x, 1 + %z = zext i1 %p to i32 + ret i32 %z +} + +define ptx_device i32 @test_setp_ge_s32_ri(i32 %x) { +; CHECK: setp.gt.s32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; +; CHECK-NEXT: ret; + %p = icmp sge i32 %x, 1 + %z = zext i1 %p to i32 + ret i32 %z +} + define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) { -; CHECK: setp.gt.u32 p0, r3, r4; -; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, p0; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, r{{[0-9]+}}; +; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, p[[P0]]; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %c = icmp eq i32 %x, %y %d = icmp ugt i32 %u, %v @@ -121,9 +193,9 @@ define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) { } define ptx_device i32 @test_setp_4_op_format_2(i32 %x, i32 %y, i32 %w) { -; CHECK: cvt.pred.u32 p0, r3; -; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, !p0; -; CHECK-NEXT: cvt.u32.pred r0, p0; +; CHECK: setp.gt.u32 p[[P0:[0-9]+]], r{{[0-9]+}}, 0; +; CHECK-NEXT: setp.eq.and.u32 p[[P0]], r{{[0-9]+}}, r{{[0-9]+}}, !p[[P0]]; +; CHECK-NEXT: selp.u32 r{{[0-9]+}}, 1, 0, p[[P0]]; ; CHECK-NEXT: ret; %c = trunc i32 %w to i1 %d = icmp eq i32 %x, %y diff --git a/test/CodeGen/PTX/shl.ll b/test/CodeGen/PTX/shl.ll index 6e72c92213255..b3818e1e76ce3 100644 --- a/test/CodeGen/PTX/shl.ll +++ b/test/CodeGen/PTX/shl.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @t1(i32 %x, i32 %y) { -; CHECK: shl.b32 r0, r1, r2 +; CHECK: shl.b32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %z = shl i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t2(i32 %x) { -; CHECK: shl.b32 r0, r1, 3 +; CHECK: shl.b32 r{{[0-9]+}}, r{{[0-9]+}}, 3 %z = shl i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t3(i32 %x) { -; CHECK: shl.b32 r0, 3, r1 +; CHECK: shl.b32 r{{[0-9]+}}, 3, r{{[0-9]+}} %z = shl i32 3, %x ; CHECK: ret; ret i32 %z diff --git a/test/CodeGen/PTX/shr.ll b/test/CodeGen/PTX/shr.ll index 8693e0ecf49a1..cb57546dca13f 100644 --- a/test/CodeGen/PTX/shr.ll +++ b/test/CodeGen/PTX/shr.ll @@ -1,42 +1,42 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i32 @t1(i32 %x, i32 %y) { -; CHECK: shr.u32 r0, r1, r2 +; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %z = lshr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t2(i32 %x) { -; CHECK: shr.u32 r0, r1, 3 +; CHECK: shr.u32 r{{[0-9]+}}, r{{[0-9]+}}, 3 %z = lshr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t3(i32 %x) { -; CHECK: shr.u32 r0, 3, r1 +; CHECK: shr.u32 r{{[0-9]+}}, 3, r{{[0-9]+}} %z = lshr i32 3, %x ; CHECK: ret; ret i32 %z } define ptx_device i32 @t4(i32 %x, i32 %y) { -; CHECK: shr.s32 r0, r1, r2 +; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} %z = ashr i32 %x, %y ; CHECK: ret; ret i32 %z } define ptx_device i32 @t5(i32 %x) { -; CHECK: shr.s32 r0, r1, 3 +; CHECK: shr.s32 r{{[0-9]+}}, r{{[0-9]+}}, 3 %z = ashr i32 %x, 3 ; CHECK: ret; ret i32 %z } define ptx_device i32 @t6(i32 %x) { -; CHECK: shr.s32 r0, -3, r1 +; CHECK: shr.s32 r{{[0-9]+}}, -3, r{{[0-9]+}} %z = ashr i32 -3, %x ; CHECK: ret; ret i32 %z diff --git a/test/CodeGen/PTX/st.ll b/test/CodeGen/PTX/st.ll index dee5c61abe66f..b08528e1c3c67 100644 --- a/test/CodeGen/PTX/st.ll +++ b/test/CodeGen/PTX/st.ll @@ -63,7 +63,7 @@ define ptx_device void @t1_u16(i16* %p, i16 %x) { entry: -;CHECK: st.global.u16 [r1], rh1; +;CHECK: st.global.u16 [r{{[0-9]+}}], rh{{[0-9]+}}; ;CHECK-NEXT: ret; store i16 %x, i16* %p ret void @@ -71,7 +71,7 @@ entry: define ptx_device void @t1_u32(i32* %p, i32 %x) { entry: -;CHECK: st.global.u32 [r1], r2; +;CHECK: st.global.u32 [r{{[0-9]+}}], r{{[0-9]+}}; ;CHECK-NEXT: ret; store i32 %x, i32* %p ret void @@ -79,7 +79,7 @@ entry: define ptx_device void @t1_u64(i64* %p, i64 %x) { entry: -;CHECK: st.global.u64 [r1], rd1; +;CHECK: st.global.u64 [r{{[0-9]+}}], rd{{[0-9]+}}; ;CHECK-NEXT: ret; store i64 %x, i64* %p ret void @@ -87,7 +87,7 @@ entry: define ptx_device void @t1_f32(float* %p, float %x) { entry: -;CHECK: st.global.f32 [r1], f1; +;CHECK: st.global.f32 [r{{[0-9]+}}], r{{[0-9]+}}; ;CHECK-NEXT: ret; store float %x, float* %p ret void @@ -95,7 +95,7 @@ entry: define ptx_device void @t1_f64(double* %p, double %x) { entry: -;CHECK: st.global.f64 [r1], fd1; +;CHECK: st.global.f64 [r{{[0-9]+}}], rd{{[0-9]+}}; ;CHECK-NEXT: ret; store double %x, double* %p ret void @@ -103,7 +103,7 @@ entry: define ptx_device void @t2_u16(i16* %p, i16 %x) { entry: -;CHECK: st.global.u16 [r1+2], rh1; +;CHECK: st.global.u16 [r{{[0-9]+}}+2], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i16* %p, i32 1 store i16 %x, i16* %i @@ -112,7 +112,7 @@ entry: define ptx_device void @t2_u32(i32* %p, i32 %x) { entry: -;CHECK: st.global.u32 [r1+4], r2; +;CHECK: st.global.u32 [r{{[0-9]+}}+4], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i32* %p, i32 1 store i32 %x, i32* %i @@ -121,7 +121,7 @@ entry: define ptx_device void @t2_u64(i64* %p, i64 %x) { entry: -;CHECK: st.global.u64 [r1+8], rd1; +;CHECK: st.global.u64 [r{{[0-9]+}}+8], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i64* %p, i32 1 store i64 %x, i64* %i @@ -130,7 +130,7 @@ entry: define ptx_device void @t2_f32(float* %p, float %x) { entry: -;CHECK: st.global.f32 [r1+4], f1; +;CHECK: st.global.f32 [r{{[0-9]+}}+4], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr float* %p, i32 1 store float %x, float* %i @@ -139,7 +139,7 @@ entry: define ptx_device void @t2_f64(double* %p, double %x) { entry: -;CHECK: st.global.f64 [r1+8], fd1; +;CHECK: st.global.f64 [r{{[0-9]+}}+8], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr double* %p, i32 1 store double %x, double* %i @@ -148,9 +148,9 @@ entry: define ptx_device void @t3_u16(i16* %p, i32 %q, i16 %x) { entry: -;CHECK: shl.b32 r0, r2, 1; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: st.global.u16 [r0], rh1; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 1; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: st.global.u16 [r[[R0]]], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i16* %p, i32 %q store i16 %x, i16* %i @@ -159,9 +159,9 @@ entry: define ptx_device void @t3_u32(i32* %p, i32 %q, i32 %x) { entry: -;CHECK: shl.b32 r0, r2, 2; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: st.global.u32 [r0], r3; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: st.global.u32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i32* %p, i32 %q store i32 %x, i32* %i @@ -170,9 +170,9 @@ entry: define ptx_device void @t3_u64(i64* %p, i32 %q, i64 %x) { entry: -;CHECK: shl.b32 r0, r2, 3; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: st.global.u64 [r0], rd1; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: st.global.u64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr i64* %p, i32 %q store i64 %x, i64* %i @@ -181,9 +181,9 @@ entry: define ptx_device void @t3_f32(float* %p, i32 %q, float %x) { entry: -;CHECK: shl.b32 r0, r2, 2; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: st.global.f32 [r0], f1; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 2; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: st.global.f32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr float* %p, i32 %q store float %x, float* %i @@ -192,9 +192,9 @@ entry: define ptx_device void @t3_f64(double* %p, i32 %q, double %x) { entry: -;CHECK: shl.b32 r0, r2, 3; -;CHECK-NEXT: add.u32 r0, r1, r0; -;CHECK-NEXT: st.global.f64 [r0], fd1; +;CHECK: shl.b32 r[[R0:[0-9]+]], r{{[0-9]+}}, 3; +;CHECK-NEXT: add.u32 r[[R0]], r{{[0-9]+}}, r[[R0]]; +;CHECK-NEXT: st.global.f64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr double* %p, i32 %q store double %x, double* %i @@ -203,8 +203,8 @@ entry: define ptx_device void @t4_global_u16(i16 %x) { entry: -;CHECK: mov.u32 r0, array_i16; -;CHECK-NEXT: st.global.u16 [r0], rh1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; +;CHECK-NEXT: st.global.u16 [r[[R0]]], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16]* @array_i16, i16 0, i16 0 store i16 %x, i16* %i @@ -213,8 +213,8 @@ entry: define ptx_device void @t4_global_u32(i32 %x) { entry: -;CHECK: mov.u32 r0, array_i32; -;CHECK-NEXT: st.global.u32 [r0], r1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; +;CHECK-NEXT: st.global.u32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 0 store i32 %x, i32* %i @@ -223,8 +223,8 @@ entry: define ptx_device void @t4_global_u64(i64 %x) { entry: -;CHECK: mov.u32 r0, array_i64; -;CHECK-NEXT: st.global.u64 [r0], rd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; +;CHECK-NEXT: st.global.u64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 0 store i64 %x, i64* %i @@ -233,8 +233,8 @@ entry: define ptx_device void @t4_global_f32(float %x) { entry: -;CHECK: mov.u32 r0, array_float; -;CHECK-NEXT: st.global.f32 [r0], f1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; +;CHECK-NEXT: st.global.f32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 0 store float %x, float* %i @@ -243,8 +243,8 @@ entry: define ptx_device void @t4_global_f64(double %x) { entry: -;CHECK: mov.u32 r0, array_double; -;CHECK-NEXT: st.global.f64 [r0], fd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; +;CHECK-NEXT: st.global.f64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 0 store double %x, double* %i @@ -253,8 +253,8 @@ entry: define ptx_device void @t4_local_u16(i16 %x) { entry: -;CHECK: mov.u32 r0, array_local_i16; -;CHECK-NEXT: st.local.u16 [r0], rh1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i16; +;CHECK-NEXT: st.local.u16 [r[[R0]]], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16] addrspace(2)* @array_local_i16, i32 0, i32 0 store i16 %x, i16 addrspace(2)* %i @@ -263,8 +263,8 @@ entry: define ptx_device void @t4_local_u32(i32 %x) { entry: -;CHECK: mov.u32 r0, array_local_i32; -;CHECK-NEXT: st.local.u32 [r0], r1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i32; +;CHECK-NEXT: st.local.u32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32] addrspace(2)* @array_local_i32, i32 0, i32 0 store i32 %x, i32 addrspace(2)* %i @@ -273,8 +273,8 @@ entry: define ptx_device void @t4_local_u64(i64 %x) { entry: -;CHECK: mov.u32 r0, array_local_i64; -;CHECK-NEXT: st.local.u64 [r0], rd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_i64; +;CHECK-NEXT: st.local.u64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64] addrspace(2)* @array_local_i64, i32 0, i32 0 store i64 %x, i64 addrspace(2)* %i @@ -283,8 +283,8 @@ entry: define ptx_device void @t4_local_f32(float %x) { entry: -;CHECK: mov.u32 r0, array_local_float; -;CHECK-NEXT: st.local.f32 [r0], f1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_float; +;CHECK-NEXT: st.local.f32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x float] addrspace(2)* @array_local_float, i32 0, i32 0 store float %x, float addrspace(2)* %i @@ -293,8 +293,8 @@ entry: define ptx_device void @t4_local_f64(double %x) { entry: -;CHECK: mov.u32 r0, array_local_double; -;CHECK-NEXT: st.local.f64 [r0], fd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_local_double; +;CHECK-NEXT: st.local.f64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x double] addrspace(2)* @array_local_double, i32 0, i32 0 store double %x, double addrspace(2)* %i @@ -303,8 +303,8 @@ entry: define ptx_device void @t4_shared_u16(i16 %x) { entry: -;CHECK: mov.u32 r0, array_shared_i16; -;CHECK-NEXT: st.shared.u16 [r0], rh1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i16; +;CHECK-NEXT: st.shared.u16 [r[[R0]]], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16] addrspace(4)* @array_shared_i16, i32 0, i32 0 store i16 %x, i16 addrspace(4)* %i @@ -313,8 +313,8 @@ entry: define ptx_device void @t4_shared_u32(i32 %x) { entry: -;CHECK: mov.u32 r0, array_shared_i32; -;CHECK-NEXT: st.shared.u32 [r0], r1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i32; +;CHECK-NEXT: st.shared.u32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32] addrspace(4)* @array_shared_i32, i32 0, i32 0 store i32 %x, i32 addrspace(4)* %i @@ -323,8 +323,8 @@ entry: define ptx_device void @t4_shared_u64(i64 %x) { entry: -;CHECK: mov.u32 r0, array_shared_i64; -;CHECK-NEXT: st.shared.u64 [r0], rd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_i64; +;CHECK-NEXT: st.shared.u64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64] addrspace(4)* @array_shared_i64, i32 0, i32 0 store i64 %x, i64 addrspace(4)* %i @@ -333,8 +333,8 @@ entry: define ptx_device void @t4_shared_f32(float %x) { entry: -;CHECK: mov.u32 r0, array_shared_float; -;CHECK-NEXT: st.shared.f32 [r0], f1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_float; +;CHECK-NEXT: st.shared.f32 [r[[R0]]], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x float] addrspace(4)* @array_shared_float, i32 0, i32 0 store float %x, float addrspace(4)* %i @@ -343,8 +343,8 @@ entry: define ptx_device void @t4_shared_f64(double %x) { entry: -;CHECK: mov.u32 r0, array_shared_double; -;CHECK-NEXT: st.shared.f64 [r0], fd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_shared_double; +;CHECK-NEXT: st.shared.f64 [r[[R0]]], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x double] addrspace(4)* @array_shared_double, i32 0, i32 0 store double %x, double addrspace(4)* %i @@ -353,8 +353,8 @@ entry: define ptx_device void @t5_u16(i16 %x) { entry: -;CHECK: mov.u32 r0, array_i16; -;CHECK-NEXT: st.global.u16 [r0+2], rh1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i16; +;CHECK-NEXT: st.global.u16 [r[[R0]]+2], rh{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i16]* @array_i16, i32 0, i32 1 store i16 %x, i16* %i @@ -363,8 +363,8 @@ entry: define ptx_device void @t5_u32(i32 %x) { entry: -;CHECK: mov.u32 r0, array_i32; -;CHECK-NEXT: st.global.u32 [r0+4], r1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i32; +;CHECK-NEXT: st.global.u32 [r[[R0]]+4], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i32]* @array_i32, i32 0, i32 1 store i32 %x, i32* %i @@ -373,8 +373,8 @@ entry: define ptx_device void @t5_u64(i64 %x) { entry: -;CHECK: mov.u32 r0, array_i64; -;CHECK-NEXT: st.global.u64 [r0+8], rd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_i64; +;CHECK-NEXT: st.global.u64 [r[[R0]]+8], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x i64]* @array_i64, i32 0, i32 1 store i64 %x, i64* %i @@ -383,8 +383,8 @@ entry: define ptx_device void @t5_f32(float %x) { entry: -;CHECK: mov.u32 r0, array_float; -;CHECK-NEXT: st.global.f32 [r0+4], f1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_float; +;CHECK-NEXT: st.global.f32 [r[[R0]]+4], r{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x float]* @array_float, i32 0, i32 1 store float %x, float* %i @@ -393,8 +393,8 @@ entry: define ptx_device void @t5_f64(double %x) { entry: -;CHECK: mov.u32 r0, array_double; -;CHECK-NEXT: st.global.f64 [r0+8], fd1; +;CHECK: mov.u32 r[[R0:[0-9]+]], array_double; +;CHECK-NEXT: st.global.f64 [r[[R0]]+8], rd{{[0-9]+}}; ;CHECK-NEXT: ret; %i = getelementptr [10 x double]* @array_double, i32 0, i32 1 store double %x, double* %i diff --git a/test/CodeGen/PTX/sub.ll b/test/CodeGen/PTX/sub.ll index 7dd2c6f6ac79a..acef3961bfa77 100644 --- a/test/CodeGen/PTX/sub.ll +++ b/test/CodeGen/PTX/sub.ll @@ -1,70 +1,70 @@ ; RUN: llc < %s -march=ptx32 | FileCheck %s define ptx_device i16 @t1_u16(i16 %x, i16 %y) { -; CHECK: sub.u16 rh0, rh1, rh2; +; CHECK: sub.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, rh{{[0-9]+}}; ; CHECK-NEXT: ret; %z = sub i16 %x, %y ret i16 %z } define ptx_device i32 @t1_u32(i32 %x, i32 %y) { -; CHECK: sub.u32 r0, r1, r2; +; CHECK: sub.u32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}; ; CHECK-NEXT: ret; %z = sub i32 %x, %y ret i32 %z } define ptx_device i64 @t1_u64(i64 %x, i64 %y) { -; CHECK: sub.u64 rd0, rd1, rd2; +; CHECK: sub.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}}; ; CHECK-NEXT: ret; %z = sub i64 %x, %y ret i64 %z } define ptx_device float @t1_f32(float %x, float %y) { -; CHECK: sub.f32 f0, f1, f2 +; CHECK: sub.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} ; CHECK-NEXT: ret; %z = fsub float %x, %y ret float %z } define ptx_device double @t1_f64(double %x, double %y) { -; CHECK: sub.f64 fd0, fd1, fd2 +; CHECK: sub.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, rd{{[0-9]+}} ; CHECK-NEXT: ret; %z = fsub double %x, %y ret double %z } define ptx_device i16 @t2_u16(i16 %x) { -; CHECK: add.u16 rh0, rh1, -1; +; CHECK: add.u16 rh{{[0-9]+}}, rh{{[0-9]+}}, -1; ; CHECK-NEXT: ret; %z = sub i16 %x, 1 ret i16 %z } define ptx_device i32 @t2_u32(i32 %x) { -; CHECK: add.u32 r0, r1, -1; +; CHECK: add.u32 r{{[0-9]+}}, r{{[0-9]+}}, -1; ; CHECK-NEXT: ret; %z = sub i32 %x, 1 ret i32 %z } define ptx_device i64 @t2_u64(i64 %x) { -; CHECK: add.u64 rd0, rd1, -1; +; CHECK: add.u64 rd{{[0-9]+}}, rd{{[0-9]+}}, -1; ; CHECK-NEXT: ret; %z = sub i64 %x, 1 ret i64 %z } define ptx_device float @t2_f32(float %x) { -; CHECK: add.f32 f0, f1, 0FBF800000; +; CHECK: add.rn.f32 r{{[0-9]+}}, r{{[0-9]+}}, 0FBF800000; ; CHECK-NEXT: ret; %z = fsub float %x, 1.0 ret float %z } define ptx_device double @t2_f64(double %x) { -; CHECK: add.f64 fd0, fd1, 0DBFF0000000000000; +; CHECK: add.rn.f64 rd{{[0-9]+}}, rd{{[0-9]+}}, 0DBFF0000000000000; ; CHECK-NEXT: ret; %z = fsub double %x, 1.0 ret double %z diff --git a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll index 7b00ac69b91ac..c7792884bb89d 100644 --- a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll +++ b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll @@ -7,7 +7,6 @@ entry: %temp = alloca i32, align 4 ; <i32*> [#uses=2] %ctz_x = alloca i32, align 4 ; <i32*> [#uses=3] %ctz_c = alloca i32, align 4 ; <i32*> [#uses=2] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 61440, i32* %ctz_x %tmp = load i32* %ctz_x ; <i32> [#uses=1] %tmp1 = sub i32 0, %tmp ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll index 42f215281a8b5..c1415510d05f3 100644 --- a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll +++ b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll @@ -13,7 +13,6 @@ entry: %i_addr = alloca i32 ; <i32*> [#uses=2] %q_addr = alloca i32 ; <i32*> [#uses=2] %retval = alloca i32, align 4 ; <i32*> [#uses=1] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr %tmp = load i32* %i_addr ; <i32> [#uses=1] diff --git a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll index 2938c70c48bf1..72e93a9cced13 100644 --- a/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll +++ b/test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll @@ -4,7 +4,7 @@ target triple = "powerpc-apple-darwin8.8.0" ; RUN: llc < %s -march=ppc32 | grep {rlwinm r3, r3, 23, 30, 30} ; PR1473 -define i8 @foo(i16 zeroext %a) zeroext { +define zeroext i8 @foo(i16 zeroext %a) { %tmp2 = lshr i16 %a, 10 ; <i16> [#uses=1] %tmp23 = trunc i16 %tmp2 to i8 ; <i8> [#uses=1] %tmp4 = shl i8 %tmp23, 1 ; <i8> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll b/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll index 8776d9a3eda5f..01c83cb4bcbe5 100644 --- a/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll +++ b/test/CodeGen/PowerPC/2008-03-24-CoalescerBug.ll @@ -18,7 +18,7 @@ define void @"-[PFTPersistentSymbols saveSymbolWithName:address:path:lineNumber: entry: br i1 false, label %bb12, label %bb21 bb12: ; preds = %entry - %tmp17 = tail call i8 inttoptr (i64 4294901504 to i8 (%struct..0objc_object*, %struct.objc_selector*, %struct.NSArray*)*)( %struct..0objc_object* null, %struct.objc_selector* null, %struct.NSArray* bitcast (%struct.__builtin_CFString* @0 to %struct.NSArray*) ) signext nounwind ; <i8> [#uses=0] + %tmp17 = tail call signext i8 inttoptr (i64 4294901504 to i8 (%struct..0objc_object*, %struct.objc_selector*, %struct.NSArray*)*)( %struct..0objc_object* null, %struct.objc_selector* null, %struct.NSArray* bitcast (%struct.__builtin_CFString* @0 to %struct.NSArray*) ) nounwind ; <i8> [#uses=0] br i1 false, label %bb25, label %bb21 bb21: ; preds = %bb12, %entry %tmp24 = or i64 %flags, 4 ; <i64> [#uses=1] diff --git a/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll index 5cd8c348b4dbe..21b0c619e1118 100644 --- a/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll +++ b/test/CodeGen/PowerPC/2008-07-15-SignExtendInreg.ll @@ -2,7 +2,7 @@ target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" target triple = "powerpc-apple-darwin9" -define i16 @t(i16* %dct) signext nounwind { +define signext i16 @t(i16* %dct) nounwind { entry: load i16* null, align 2 ; <i16>:0 [#uses=2] lshr i16 %0, 11 ; <i16>:1 [#uses=0] diff --git a/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll b/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll deleted file mode 100644 index 83f3f6f8a7621..0000000000000 --- a/test/CodeGen/PowerPC/2008-10-30-IllegalShift.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: llc < %s -march=ppc32 -; PR2986 -@argc = external global i32 ; <i32*> [#uses=1] -@buffer = external global [32 x i8], align 4 ; <[32 x i8]*> [#uses=1] - -define void @test1() nounwind noinline { -entry: - %0 = load i32* @argc, align 4 ; <i32> [#uses=1] - %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] - tail call void @llvm.memset.i32(i8* getelementptr ([32 x i8]* @buffer, i32 0, i32 0), i8 %1, i32 17, i32 4) - unreachable -} - -declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind diff --git a/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll b/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll deleted file mode 100644 index 54f4b2ef68933..0000000000000 --- a/test/CodeGen/PowerPC/2009-11-15-ReMatBug.ll +++ /dev/null @@ -1,155 +0,0 @@ -; RUN: llc < %s -mtriple=powerpc-apple-darwin8 - -%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } -%struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] } -%struct.__sFILEX = type opaque -%struct.__sbuf = type { i8*, i32 } -%struct.gcov_ctr_info = type { i32, i64*, void (i64*, i32)* } -%struct.gcov_ctr_summary = type { i32, i32, i64, i64, i64 } -%struct.gcov_fn_info = type { i32, i32, [0 x i32] } -%struct.gcov_info = type { i32, %struct.gcov_info*, i32, i8*, i32, %struct.gcov_fn_info*, i32, [0 x %struct.gcov_ctr_info] } -%struct.gcov_summary = type { i32, [1 x %struct.gcov_ctr_summary] } - -@__gcov_var = external global %struct.__gcov_var ; <%struct.__gcov_var*> [#uses=1] -@__sF = external global [0 x %struct.FILE] ; <[0 x %struct.FILE]*> [#uses=1] -@.str = external constant [56 x i8], align 4 ; <[56 x i8]*> [#uses=1] -@gcov_list = external global %struct.gcov_info* ; <%struct.gcov_info**> [#uses=1] -@.str7 = external constant [35 x i8], align 4 ; <[35 x i8]*> [#uses=1] -@.str8 = external constant [9 x i8], align 4 ; <[9 x i8]*> [#uses=1] -@.str9 = external constant [10 x i8], align 4 ; <[10 x i8]*> [#uses=1] -@.str10 = external constant [36 x i8], align 4 ; <[36 x i8]*> [#uses=1] - -declare i32 @"\01_fprintf$LDBL128"(%struct.FILE*, i8*, ...) nounwind - -define void @gcov_exit() nounwind { -entry: - %gi_ptr.0357 = load %struct.gcov_info** @gcov_list, align 4 ; <%struct.gcov_info*> [#uses=1] - %0 = alloca i8, i32 undef, align 1 ; <i8*> [#uses=3] - br i1 undef, label %return, label %bb.nph341 - -bb.nph341: ; preds = %entry - %object27 = bitcast %struct.gcov_summary* undef to i8* ; <i8*> [#uses=1] - br label %bb25 - -bb25: ; preds = %read_fatal, %bb.nph341 - %gi_ptr.1329 = phi %struct.gcov_info* [ %gi_ptr.0357, %bb.nph341 ], [ undef, %read_fatal ] ; <%struct.gcov_info*> [#uses=1] - call void @llvm.memset.i32(i8* %object27, i8 0, i32 36, i32 8) - br i1 undef, label %bb49.1, label %bb48 - -bb48: ; preds = %bb25 - br label %bb49.1 - -bb51: ; preds = %bb48.4, %bb49.3 - switch i32 undef, label %bb58 [ - i32 0, label %rewrite - i32 1734567009, label %bb59 - ] - -bb58: ; preds = %bb51 - %1 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([35 x i8]* @.str7, i32 0, i32 0), i8* %0) nounwind ; <i32> [#uses=0] - br label %read_fatal - -bb59: ; preds = %bb51 - br i1 undef, label %bb60, label %bb3.i156 - -bb3.i156: ; preds = %bb59 - store i8 52, i8* undef, align 1 - store i8 42, i8* undef, align 1 - %2 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([56 x i8]* @.str, i32 0, i32 0), i8* %0, i8* undef, i8* undef) nounwind ; <i32> [#uses=0] - br label %read_fatal - -bb60: ; preds = %bb59 - br i1 undef, label %bb78.preheader, label %rewrite - -bb78.preheader: ; preds = %bb60 - br i1 undef, label %bb62, label %bb80 - -bb62: ; preds = %bb78.preheader - br i1 undef, label %bb64, label %read_mismatch - -bb64: ; preds = %bb62 - br i1 undef, label %bb65, label %read_mismatch - -bb65: ; preds = %bb64 - br i1 undef, label %bb75, label %read_mismatch - -read_mismatch: ; preds = %bb98, %bb119.preheader, %bb72, %bb71, %bb65, %bb64, %bb62 - %3 = icmp eq i32 undef, -1 ; <i1> [#uses=1] - %iftmp.11.0 = select i1 %3, i8* getelementptr inbounds ([10 x i8]* @.str9, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8]* @.str8, i32 0, i32 0) ; <i8*> [#uses=1] - %4 = call i32 (%struct.FILE*, i8*, ...)* @"\01_fprintf$LDBL128"(%struct.FILE* getelementptr inbounds ([0 x %struct.FILE]* @__sF, i32 0, i32 2), i8* getelementptr inbounds ([36 x i8]* @.str10, i32 0, i32 0), i8* %0, i8* %iftmp.11.0) nounwind ; <i32> [#uses=0] - br label %read_fatal - -bb71: ; preds = %bb75 - %5 = load i32* undef, align 4 ; <i32> [#uses=1] - %6 = getelementptr inbounds %struct.gcov_info* %gi_ptr.1329, i32 0, i32 7, i32 undef, i32 2 ; <void (i64*, i32)**> [#uses=1] - %7 = load void (i64*, i32)** %6, align 4 ; <void (i64*, i32)*> [#uses=1] - %8 = call i32 @__gcov_read_unsigned() nounwind ; <i32> [#uses=1] - %9 = call i32 @__gcov_read_unsigned() nounwind ; <i32> [#uses=1] - %10 = icmp eq i32 %tmp386, %8 ; <i1> [#uses=1] - br i1 %10, label %bb72, label %read_mismatch - -bb72: ; preds = %bb71 - %11 = icmp eq i32 undef, %9 ; <i1> [#uses=1] - br i1 %11, label %bb73, label %read_mismatch - -bb73: ; preds = %bb72 - call void %7(i64* null, i32 %5) nounwind - unreachable - -bb74: ; preds = %bb75 - %12 = add i32 %13, 1 ; <i32> [#uses=1] - br label %bb75 - -bb75: ; preds = %bb74, %bb65 - %13 = phi i32 [ %12, %bb74 ], [ 0, %bb65 ] ; <i32> [#uses=2] - %tmp386 = add i32 0, 27328512 ; <i32> [#uses=1] - %14 = shl i32 1, %13 ; <i32> [#uses=1] - %15 = load i32* undef, align 4 ; <i32> [#uses=1] - %16 = and i32 %15, %14 ; <i32> [#uses=1] - %17 = icmp eq i32 %16, 0 ; <i1> [#uses=1] - br i1 %17, label %bb74, label %bb71 - -bb80: ; preds = %bb78.preheader - unreachable - -read_fatal: ; preds = %read_mismatch, %bb3.i156, %bb58 - br i1 undef, label %return, label %bb25 - -rewrite: ; preds = %bb60, %bb51 - store i32 -1, i32* getelementptr inbounds (%struct.__gcov_var* @__gcov_var, i32 0, i32 6), align 4 - br i1 undef, label %bb94, label %bb119.preheader - -bb94: ; preds = %rewrite - unreachable - -bb119.preheader: ; preds = %rewrite - br i1 undef, label %read_mismatch, label %bb98 - -bb98: ; preds = %bb119.preheader - br label %read_mismatch - -return: ; preds = %read_fatal, %entry - ret void - -bb49.1: ; preds = %bb48, %bb25 - br i1 undef, label %bb49.2, label %bb48.2 - -bb49.2: ; preds = %bb48.2, %bb49.1 - br i1 undef, label %bb49.3, label %bb48.3 - -bb48.2: ; preds = %bb49.1 - br label %bb49.2 - -bb49.3: ; preds = %bb48.3, %bb49.2 - br i1 undef, label %bb51, label %bb48.4 - -bb48.3: ; preds = %bb49.2 - br label %bb49.3 - -bb48.4: ; preds = %bb49.3 - br label %bb51 -} - -declare i32 @__gcov_read_unsigned() nounwind - -declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind diff --git a/test/CodeGen/PowerPC/and-elim.ll b/test/CodeGen/PowerPC/and-elim.ll index 36853614c40ac..a1ec29b16f14b 100644 --- a/test/CodeGen/PowerPC/and-elim.ll +++ b/test/CodeGen/PowerPC/and-elim.ll @@ -9,7 +9,7 @@ define void @test(i8* %P) { ret void } -define i16 @test2(i16 zeroext %crc) zeroext { +define zeroext i16 @test2(i16 zeroext %crc) { ; No and's should be needed for the i16s here. %tmp.1 = lshr i16 %crc, 1 %tmp.7 = xor i16 %tmp.1, 40961 diff --git a/test/CodeGen/PowerPC/and_sext.ll b/test/CodeGen/PowerPC/and_sext.ll index c6d234ea665fb..df48ccf0d7ddb 100644 --- a/test/CodeGen/PowerPC/and_sext.ll +++ b/test/CodeGen/PowerPC/and_sext.ll @@ -9,7 +9,7 @@ define i32 @test1(i32 %mode.0.i.0) { ret i32 %tmp.81 } -define i16 @test2(i16 signext %X, i16 signext %x) signext { +define signext i16 @test2(i16 signext %X, i16 signext %x) { %tmp = sext i16 %X to i32 %tmp1 = sext i16 %x to i32 %tmp2 = add i32 %tmp, %tmp1 @@ -20,7 +20,7 @@ define i16 @test2(i16 signext %X, i16 signext %x) signext { ret i16 %retval } -define i16 @test3(i32 zeroext %X) signext { +define signext i16 @test3(i32 zeroext %X) { %tmp1 = lshr i32 %X, 16 %tmp2 = trunc i32 %tmp1 to i16 ret i16 %tmp2 diff --git a/test/CodeGen/PowerPC/atomic-1.ll b/test/CodeGen/PowerPC/atomic-1.ll index ec4e42defdcb0..a2cf1709e75b6 100644 --- a/test/CodeGen/PowerPC/atomic-1.ll +++ b/test/CodeGen/PowerPC/atomic-1.ll @@ -1,21 +1,23 @@ ; RUN: llc < %s -march=ppc32 | grep lwarx | count 3 ; RUN: llc < %s -march=ppc32 | grep stwcx. | count 4 -define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind { - %tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val ) - ret i32 %tmp +define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind { + %tmp = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %mem, i32 %val) + ret i32 %tmp } -define i32 @exchange_and_cmp(i32* %mem) nounwind { - %tmp = call i32 @llvm.atomic.cmp.swap.i32( i32* %mem, i32 0, i32 1 ) - ret i32 %tmp +define i32 @exchange_and_cmp(i32* %mem) nounwind { + %tmp = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %mem, i32 0, i32 1) + ret i32 %tmp } -define i32 @exchange(i32* %mem, i32 %val) nounwind { - %tmp = call i32 @llvm.atomic.swap.i32( i32* %mem, i32 1 ) - ret i32 %tmp +define i32 @exchange(i32* %mem, i32 %val) nounwind { + %tmp = call i32 @llvm.atomic.swap.i32.p0i32(i32* %mem, i32 1) + ret i32 %tmp } -declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind -declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind -declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind +declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind + +declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* nocapture, i32, i32) nounwind + +declare i32 @llvm.atomic.swap.i32.p0i32(i32* nocapture, i32) nounwind diff --git a/test/CodeGen/PowerPC/atomic-2.ll b/test/CodeGen/PowerPC/atomic-2.ll index 6d9daef9285c0..0fa2a29d3223c 100644 --- a/test/CodeGen/PowerPC/atomic-2.ll +++ b/test/CodeGen/PowerPC/atomic-2.ll @@ -1,21 +1,23 @@ ; RUN: llc < %s -march=ppc64 | grep ldarx | count 3 ; RUN: llc < %s -march=ppc64 | grep stdcx. | count 4 -define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind { - %tmp = call i64 @llvm.atomic.load.add.i64( i64* %mem, i64 %val ) - ret i64 %tmp +define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind { + %tmp = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %mem, i64 %val) + ret i64 %tmp } -define i64 @exchange_and_cmp(i64* %mem) nounwind { - %tmp = call i64 @llvm.atomic.cmp.swap.i64( i64* %mem, i64 0, i64 1 ) - ret i64 %tmp +define i64 @exchange_and_cmp(i64* %mem) nounwind { + %tmp = call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* %mem, i64 0, i64 1) + ret i64 %tmp } -define i64 @exchange(i64* %mem, i64 %val) nounwind { - %tmp = call i64 @llvm.atomic.swap.i64( i64* %mem, i64 1 ) - ret i64 %tmp +define i64 @exchange(i64* %mem, i64 %val) nounwind { + %tmp = call i64 @llvm.atomic.swap.i64.p0i64(i64* %mem, i64 1) + ret i64 %tmp } -declare i64 @llvm.atomic.load.add.i64(i64*, i64) nounwind -declare i64 @llvm.atomic.cmp.swap.i64(i64*, i64, i64) nounwind -declare i64 @llvm.atomic.swap.i64(i64*, i64) nounwind +declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind + +declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* nocapture, i64, i64) nounwind + +declare i64 @llvm.atomic.swap.i64.p0i64(i64* nocapture, i64) nounwind diff --git a/test/CodeGen/PowerPC/calls.ll b/test/CodeGen/PowerPC/calls.ll index 0db184f728550..29bcb2081188d 100644 --- a/test/CodeGen/PowerPC/calls.ll +++ b/test/CodeGen/PowerPC/calls.ll @@ -1,7 +1,7 @@ ; Test various forms of calls. ; RUN: llc < %s -march=ppc32 | \ -; RUN: grep {bl } | count 2 +; RUN: grep {bl } | count 1 ; RUN: llc < %s -march=ppc32 | \ ; RUN: grep {bctrl} | count 1 ; RUN: llc < %s -march=ppc32 | \ @@ -14,11 +14,6 @@ define void @test_direct() { ret void } -define void @test_extsym(i8* %P) { - free i8* %P - ret void -} - define void @test_indirect(void ()* %fp) { call void %fp( ) ret void diff --git a/test/CodeGen/PowerPC/invalid-memcpy.ll b/test/CodeGen/PowerPC/invalid-memcpy.ll deleted file mode 100644 index 3b1f3060a1c0b..0000000000000 --- a/test/CodeGen/PowerPC/invalid-memcpy.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: llc < %s -march=ppc32 -; RUN: llc < %s -march=ppc64 - -; This testcase is invalid (the alignment specified for memcpy is -; greater than the alignment guaranteed for Qux or C.0.1173, but it -; should compile, not crash the code generator. - -@C.0.1173 = external constant [33 x i8] ; <[33 x i8]*> [#uses=1] - -define void @Bork() { -entry: - %Qux = alloca [33 x i8] ; <[33 x i8]*> [#uses=1] - %Qux1 = bitcast [33 x i8]* %Qux to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i64( i8* %Qux1, i8* getelementptr ([33 x i8]* @C.0.1173, i32 0, i32 0), i64 33, i32 8 ) - ret void -} - -declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) - - diff --git a/test/CodeGen/PowerPC/mul-with-overflow.ll b/test/CodeGen/PowerPC/mul-with-overflow.ll index f03e3cb5cd47c..76d06df6a7254 100644 --- a/test/CodeGen/PowerPC/mul-with-overflow.ll +++ b/test/CodeGen/PowerPC/mul-with-overflow.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=ppc32 declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) -define i1 @a(i32 %x) zeroext nounwind { +define zeroext i1 @a(i32 %x) nounwind { %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil } declare {i32, i1} @llvm.smul.with.overflow.i32(i32 %a, i32 %b) -define i1 @b(i32 %x) zeroext nounwind { +define zeroext i1 @b(i32 %x) nounwind { %res = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %x, i32 3) %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil diff --git a/test/CodeGen/PowerPC/multiple-return-values.ll b/test/CodeGen/PowerPC/multiple-return-values.ll deleted file mode 100644 index b9317f90c1da8..0000000000000 --- a/test/CodeGen/PowerPC/multiple-return-values.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -march=ppc32 -; RUN: llc < %s -march=ppc64 - -define {i64, float} @bar(i64 %a, float %b) { - %y = add i64 %a, 7 - %z = fadd float %b, 7.0 - ret i64 %y, float %z -} - -define i64 @foo() { - %M = call {i64, float} @bar(i64 21, float 21.0) - %N = getresult {i64, float} %M, 0 - %O = getresult {i64, float} %M, 1 - %P = fptosi float %O to i64 - %Q = add i64 %P, %N - ret i64 %Q -} diff --git a/test/CodeGen/PowerPC/ppc32-vaarg.ll b/test/CodeGen/PowerPC/ppc32-vaarg.ll new file mode 100644 index 0000000000000..604299183f95f --- /dev/null +++ b/test/CodeGen/PowerPC/ppc32-vaarg.ll @@ -0,0 +1,167 @@ +; RUN: llc -O0 < %s | FileCheck %s +;ModuleID = 'test.c' +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" +target triple = "powerpc-unknown-freebsd9.0" + +%struct.__va_list_tag = type { i8, i8, i16, i8*, i8* } + +@var1 = common global i64 0, align 8 +@var2 = common global double 0.0, align 8 +@var3 = common global i32 0, align 4 + +define void @ppcvaargtest(%struct.__va_list_tag* %ap) nounwind { + entry: + %x = va_arg %struct.__va_list_tag* %ap, i64; Get from r5,r6 +; CHECK: lbz 4, 0(3) +; CHECK-NEXT: lwz 5, 4(3) +; CHECK-NEXT: rlwinm 6, 4, 0, 31, 31 +; CHECK-NEXT: cmplwi 0, 6, 0 +; CHECK-NEXT: addi 6, 4, 1 +; CHECK-NEXT: stw 3, -4(1) +; CHECK-NEXT: stw 6, -8(1) +; CHECK-NEXT: stw 4, -12(1) +; CHECK-NEXT: stw 5, -16(1) +; CHECK-NEXT: bne 0, .LBB0_2 +; CHECK-NEXT: # BB#1: # %entry +; CHECK-NEXT: lwz 3, -12(1) +; CHECK-NEXT: stw 3, -8(1) +; CHECK-NEXT: .LBB0_2: # %entry +; CHECK-NEXT: lwz 3, -8(1) +; CHECK-NEXT: lwz 4, -4(1) +; CHECK-NEXT: lwz 5, 8(4) +; CHECK-NEXT: slwi 6, 3, 2 +; CHECK-NEXT: addi 7, 3, 2 +; CHECK-NEXT: cmpwi 0, 3, 8 +; CHECK-NEXT: lwz 3, -16(1) +; CHECK-NEXT: addi 8, 3, 4 +; CHECK-NEXT: add 5, 5, 6 +; CHECK-NEXT: mfcr 0 # cr0 +; CHECK-NEXT: stw 0, -20(1) +; CHECK-NEXT: stw 5, -24(1) +; CHECK-NEXT: stw 3, -28(1) +; CHECK-NEXT: stw 7, -32(1) +; CHECK-NEXT: stw 8, -36(1) +; CHECK-NEXT: blt 0, .LBB0_4 +; CHECK-NEXT: # BB#3: # %entry +; CHECK-NEXT: lwz 3, -36(1) +; CHECK-NEXT: stw 3, -28(1) +; CHECK-NEXT: .LBB0_4: # %entry +; CHECK-NEXT: lwz 3, -28(1) +; CHECK-NEXT: lwz 4, -32(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stb 4, 0(5) +; CHECK-NEXT: lwz 4, -24(1) +; CHECK-NEXT: lwz 0, -20(1) +; CHECK-NEXT: mtcrf 128, 0 +; CHECK-NEXT: stw 3, -40(1) +; CHECK-NEXT: stw 4, -44(1) +; CHECK-NEXT: blt 0, .LBB0_6 +; CHECK-NEXT: # BB#5: # %entry +; CHECK-NEXT: lwz 3, -16(1) +; CHECK-NEXT: stw 3, -44(1) +; CHECK-NEXT: .LBB0_6: # %entry +; CHECK-NEXT: lwz 3, -44(1) +; CHECK-NEXT: lwz 4, -40(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stw 4, 4(5) + store i64 %x, i64* @var1, align 8 +; CHECK-NEXT: lis 4, var1@ha +; CHECK-NEXT: lwz 6, 4(3) +; CHECK-NEXT: lwz 3, 0(3) +; CHECK-NEXT: la 7, var1@l(4) +; CHECK-NEXT: stw 3, var1@l(4) +; CHECK-NEXT: stw 6, 4(7) + %y = va_arg %struct.__va_list_tag* %ap, double; From f1 +; CHECK-NEXT: lbz 3, 1(5) +; CHECK-NEXT: lwz 4, 4(5) +; CHECK-NEXT: lwz 6, 8(5) +; CHECK-NEXT: slwi 7, 3, 3 +; CHECK-NEXT: add 6, 6, 7 +; CHECK-NEXT: addi 7, 3, 1 +; CHECK-NEXT: cmpwi 0, 3, 8 +; CHECK-NEXT: addi 3, 4, 8 +; CHECK-NEXT: addi 6, 6, 32 +; CHECK-NEXT: mr 8, 4 +; CHECK-NEXT: mfcr 0 # cr0 +; CHECK-NEXT: stw 0, -48(1) +; CHECK-NEXT: stw 4, -52(1) +; CHECK-NEXT: stw 6, -56(1) +; CHECK-NEXT: stw 7, -60(1) +; CHECK-NEXT: stw 3, -64(1) +; CHECK-NEXT: stw 8, -68(1) +; CHECK-NEXT: blt 0, .LBB0_8 +; CHECK-NEXT: # BB#7: # %entry +; CHECK-NEXT: lwz 3, -64(1) +; CHECK-NEXT: stw 3, -68(1) +; CHECK-NEXT: .LBB0_8: # %entry +; CHECK-NEXT: lwz 3, -68(1) +; CHECK-NEXT: lwz 4, -60(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stb 4, 1(5) +; CHECK-NEXT: lwz 4, -56(1) +; CHECK-NEXT: lwz 0, -48(1) +; CHECK-NEXT: mtcrf 128, 0 +; CHECK-NEXT: stw 4, -72(1) +; CHECK-NEXT: stw 3, -76(1) +; CHECK-NEXT: blt 0, .LBB0_10 +; CHECK-NEXT: # BB#9: # %entry +; CHECK-NEXT: lwz 3, -52(1) +; CHECK-NEXT: stw 3, -72(1) +; CHECK-NEXT: .LBB0_10: # %entry +; CHECK-NEXT: lwz 3, -72(1) +; CHECK-NEXT: lwz 4, -76(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stw 4, 4(5) +; CHECK-NEXT: lfd 0, 0(3) + store double %y, double* @var2, align 8 +; CHECK-NEXT: lis 3, var2@ha +; CHECK-NEXT: stfd 0, var2@l(3) + %z = va_arg %struct.__va_list_tag* %ap, i32; From r7 +; CHECK-NEXT: lbz 3, 0(5) +; CHECK-NEXT: lwz 4, 4(5) +; CHECK-NEXT: lwz 6, 8(5) +; CHECK-NEXT: slwi 7, 3, 2 +; CHECK-NEXT: addi 8, 3, 1 +; CHECK-NEXT: cmpwi 0, 3, 8 +; CHECK-NEXT: addi 3, 4, 4 +; CHECK-NEXT: add 6, 6, 7 +; CHECK-NEXT: mr 7, 4 +; CHECK-NEXT: stw 6, -80(1) +; CHECK-NEXT: stw 8, -84(1) +; CHECK-NEXT: stw 3, -88(1) +; CHECK-NEXT: stw 4, -92(1) +; CHECK-NEXT: stw 7, -96(1) +; CHECK-NEXT: mfcr 0 # cr0 +; CHECK-NEXT: stw 0, -100(1) +; CHECK-NEXT: blt 0, .LBB0_12 +; CHECK-NEXT: # BB#11: # %entry +; CHECK-NEXT: lwz 3, -88(1) +; CHECK-NEXT: stw 3, -96(1) +; CHECK-NEXT: .LBB0_12: # %entry +; CHECK-NEXT: lwz 3, -96(1) +; CHECK-NEXT: lwz 4, -84(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stb 4, 0(5) +; CHECK-NEXT: lwz 4, -80(1) +; CHECK-NEXT: lwz 0, -100(1) +; CHECK-NEXT: mtcrf 128, 0 +; CHECK-NEXT: stw 4, -104(1) +; CHECK-NEXT: stw 3, -108(1) +; CHECK-NEXT: blt 0, .LBB0_14 +; CHECK-NEXT: # BB#13: # %entry +; CHECK-NEXT: lwz 3, -92(1) +; CHECK-NEXT: stw 3, -104(1) +; CHECK-NEXT: .LBB0_14: # %entry +; CHECK-NEXT: lwz 3, -104(1) +; CHECK-NEXT: lwz 4, -108(1) +; CHECK-NEXT: lwz 5, -4(1) +; CHECK-NEXT: stw 4, 4(5) +; CHECK-NEXT: lwz 3, 0(3) + store i32 %z, i32* @var3, align 4 +; CHECK-NEXT: lis 4, var3@ha +; CHECK-NEXT: stw 3, var3@l(4) + ret void +; CHECK-NEXT: stw 5, -112(1) +; CHECK-NEXT: blr +} + diff --git a/test/CodeGen/PowerPC/ppc64-32bit-addic.ll b/test/CodeGen/PowerPC/ppc64-32bit-addic.ll new file mode 100644 index 0000000000000..4d323dac54faf --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-32bit-addic.ll @@ -0,0 +1,29 @@ +; Check that the ADDIC optimizations are not applied on PPC64 +; RUN: llc < %s | FileCheck %s +; ModuleID = 'os_unix.c' +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-freebsd9.0" + +define i32 @notZero(i32 %call) nounwind { +entry: +; CHECK-NOT: addic + %not.tobool = icmp ne i32 %call, 0 + %. = zext i1 %not.tobool to i32 + ret i32 %. +} + +define i32 @isMinusOne(i32 %call) nounwind { +entry: +; CHECK-NOT: addic + %not.tobool = icmp eq i32 %call, -1 + %. = zext i1 %not.tobool to i32 + ret i32 %. +} + +define i32 @isNotMinusOne(i32 %call) nounwind { +entry: +; CHECK-NOT: addic + %not.tobool = icmp ne i32 %call, -1 + %. = zext i1 %not.tobool to i32 + ret i32 %. +} diff --git a/test/CodeGen/PowerPC/ppc64-crash.ll b/test/CodeGen/PowerPC/ppc64-crash.ll new file mode 100644 index 0000000000000..073c322e8030a --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-crash.ll @@ -0,0 +1,14 @@ +; RUN: llc %s -o - + +; ModuleID = 'undo.c' +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-freebsd" + +%struct.__sFILE = type {} +%struct.pos_T = type { i64 } + +; check that we're not copying stuff between R and X registers +define internal void @serialize_pos(%struct.pos_T* byval %pos, %struct.__sFILE* %fp) nounwind { +entry: + ret void +} diff --git a/test/CodeGen/PowerPC/small-arguments.ll b/test/CodeGen/PowerPC/small-arguments.ll index 31bcee6bc811f..b4767b0a291ba 100644 --- a/test/CodeGen/PowerPC/small-arguments.ll +++ b/test/CodeGen/PowerPC/small-arguments.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=ppc32 | not grep {extsh\\|rlwinm} -declare i16 @foo() signext +declare signext i16 @foo() define i32 @test1(i16 signext %X) { %Y = sext i16 %X to i32 ;; dead @@ -14,12 +14,12 @@ define i32 @test2(i16 zeroext %X) { } define void @test3() { - %tmp.0 = call i16 @foo() signext ;; no extsh! + %tmp.0 = call signext i16 @foo() ;; no extsh! %tmp.1 = icmp slt i16 %tmp.0, 1234 br i1 %tmp.1, label %then, label %UnifiedReturnBlock then: - call i32 @test1(i16 0 signext) + call i32 @test1(i16 signext 0) ret void UnifiedReturnBlock: ret void @@ -46,7 +46,7 @@ define i32 @test6(i32* %P) { ret i32 %tmp.2 } -define i16 @test7(float %a) zeroext { +define zeroext i16 @test7(float %a) { %tmp.1 = fptoui float %a to i16 ret i16 %tmp.1 } diff --git a/test/CodeGen/PowerPC/vector.ll b/test/CodeGen/PowerPC/vector.ll index ee4da315f9277..e4c3b0db17267 100644 --- a/test/CodeGen/PowerPC/vector.ll +++ b/test/CodeGen/PowerPC/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llc < %s -march=ppc32 -mcpu=g5 > %t -; RUN: llc < %s -march=ppc32 -mcpu=g3 > %t +; RUN: llc < %s -march=ppc32 -mcpu=g3 >> %t %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/test/CodeGen/SPARC/private.ll b/test/CodeGen/SPARC/private.ll index f091aa63d70d9..f06ccd0df1aae 100644 --- a/test/CodeGen/SPARC/private.ll +++ b/test/CodeGen/SPARC/private.ll @@ -6,8 +6,6 @@ ; RUN: grep .baz: %t ; RUN: grep ld.*\.baz %t -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/SystemZ/02-MemArith.ll b/test/CodeGen/SystemZ/02-MemArith.ll index 04022a063f166..ee9e5e9b5c322 100644 --- a/test/CodeGen/SystemZ/02-MemArith.ll +++ b/test/CodeGen/SystemZ/02-MemArith.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=systemz | FileCheck %s -define i32 @foo1(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo1(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo1: ; CHECK: a %r2, 4(%r1,%r3) entry: @@ -11,7 +11,7 @@ entry: ret i32 %d } -define i32 @foo2(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo2(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo2: ; CHECK: ay %r2, -4(%r1,%r3) entry: @@ -22,7 +22,7 @@ entry: ret i32 %d } -define i64 @foo3(i64 %a, i64 *%b, i64 %idx) signext { +define signext i64 @foo3(i64 %a, i64 *%b, i64 %idx) { ; CHECK: foo3: ; CHECK: ag %r2, 8(%r1,%r3) entry: @@ -33,7 +33,7 @@ entry: ret i64 %d } -define i32 @foo4(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo4(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo4: ; CHECK: n %r2, 4(%r1,%r3) entry: @@ -44,7 +44,7 @@ entry: ret i32 %d } -define i32 @foo5(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo5(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo5: ; CHECK: ny %r2, -4(%r1,%r3) entry: @@ -55,7 +55,7 @@ entry: ret i32 %d } -define i64 @foo6(i64 %a, i64 *%b, i64 %idx) signext { +define signext i64 @foo6(i64 %a, i64 *%b, i64 %idx) { ; CHECK: foo6: ; CHECK: ng %r2, 8(%r1,%r3) entry: @@ -66,7 +66,7 @@ entry: ret i64 %d } -define i32 @foo7(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo7(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo7: ; CHECK: o %r2, 4(%r1,%r3) entry: @@ -77,7 +77,7 @@ entry: ret i32 %d } -define i32 @foo8(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo8(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo8: ; CHECK: oy %r2, -4(%r1,%r3) entry: @@ -88,7 +88,7 @@ entry: ret i32 %d } -define i64 @foo9(i64 %a, i64 *%b, i64 %idx) signext { +define signext i64 @foo9(i64 %a, i64 *%b, i64 %idx) { ; CHECK: foo9: ; CHECK: og %r2, 8(%r1,%r3) entry: @@ -99,7 +99,7 @@ entry: ret i64 %d } -define i32 @foo10(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo10(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo10: ; CHECK: x %r2, 4(%r1,%r3) entry: @@ -110,7 +110,7 @@ entry: ret i32 %d } -define i32 @foo11(i32 %a, i32 *%b, i64 %idx) signext { +define signext i32 @foo11(i32 %a, i32 *%b, i64 %idx) { ; CHECK: foo11: ; CHECK: xy %r2, -4(%r1,%r3) entry: @@ -121,7 +121,7 @@ entry: ret i32 %d } -define i64 @foo12(i64 %a, i64 *%b, i64 %idx) signext { +define signext i64 @foo12(i64 %a, i64 *%b, i64 %idx) { ; CHECK: foo12: ; CHECK: xg %r2, 8(%r1,%r3) entry: diff --git a/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll b/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll index 0a812715ae579..0a7f5ee22650f 100644 --- a/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetAddImmSubreg.ll @@ -16,25 +16,25 @@ entry: ret i32 %c } -define i32 @foo3(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo3(i32 %a, i32 %b) { entry: %c = add i32 %a, 1 ret i32 %c } -define i32 @foo4(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo4(i32 %a, i32 %b) { entry: %c = add i32 %a, 131072 ret i32 %c } -define i32 @foo5(i32 %a, i32 %b) signext { +define signext i32 @foo5(i32 %a, i32 %b) { entry: %c = add i32 %a, 1 ret i32 %c } -define i32 @foo6(i32 %a, i32 %b) signext { +define signext i32 @foo6(i32 %a, i32 %b) { entry: %c = add i32 %a, 131072 ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetAddSubreg.ll b/test/CodeGen/SystemZ/03-RetAddSubreg.ll index 2787083f162b2..337bb3fcb8667 100644 --- a/test/CodeGen/SystemZ/03-RetAddSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetAddSubreg.ll @@ -8,13 +8,13 @@ entry: ret i32 %c } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: %c = add i32 %a, %b ret i32 %c } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: %c = add i32 %a, %b ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll b/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll index 32673dd014c50..c5326ab536b89 100644 --- a/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetAndImmSubreg.ll @@ -12,25 +12,25 @@ entry: ret i32 %c } -define i32 @foo3(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo3(i32 %a, i32 %b) { entry: %c = and i32 %a, 1 ret i32 %c } -define i32 @foo4(i32 %a, i32 %b) signext { +define signext i32 @foo4(i32 %a, i32 %b) { entry: %c = and i32 %a, 131072 ret i32 %c } -define i32 @foo5(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo5(i32 %a, i32 %b) { entry: %c = and i32 %a, 1 ret i32 %c } -define i32 @foo6(i32 %a, i32 %b) signext { +define signext i32 @foo6(i32 %a, i32 %b) { entry: %c = and i32 %a, 131072 ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetAndSubreg.ll b/test/CodeGen/SystemZ/03-RetAndSubreg.ll index ed5e5269525bf..75dc90a9b00e4 100644 --- a/test/CodeGen/SystemZ/03-RetAndSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetAndSubreg.ll @@ -7,13 +7,13 @@ entry: ret i32 %c } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: %c = and i32 %a, %b ret i32 %c } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: %c = and i32 %a, %b ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetArgSubreg.ll b/test/CodeGen/SystemZ/03-RetArgSubreg.ll index 0c9bb14eef3e0..476821a614523 100644 --- a/test/CodeGen/SystemZ/03-RetArgSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetArgSubreg.ll @@ -8,12 +8,12 @@ entry: ret i32 %b } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: ret i32 %b } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: ret i32 %b } diff --git a/test/CodeGen/SystemZ/03-RetImmSubreg.ll b/test/CodeGen/SystemZ/03-RetImmSubreg.ll index 343e30b721385..70da913edead1 100644 --- a/test/CodeGen/SystemZ/03-RetImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetImmSubreg.ll @@ -30,12 +30,12 @@ entry: ret i32 4294967295 } -define i32 @foo6() zeroext { +define zeroext i32 @foo6() { entry: ret i32 4294967295 } -define i32 @foo7() signext { +define signext i32 @foo7() { entry: ret i32 4294967295 } diff --git a/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll b/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll index 6d118b5e3d407..99adea8abbcb7 100644 --- a/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetOrImmSubreg.ll @@ -22,37 +22,37 @@ entry: ret i32 %c } -define i32 @foo3(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo3(i32 %a, i32 %b) { entry: %c = or i32 %a, 1 ret i32 %c } -define i32 @foo8(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo8(i32 %a, i32 %b) { entry: %c = or i32 %a, 123456 ret i32 %c } -define i32 @foo4(i32 %a, i32 %b) signext { +define signext i32 @foo4(i32 %a, i32 %b) { entry: %c = or i32 %a, 131072 ret i32 %c } -define i32 @foo5(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo5(i32 %a, i32 %b) { entry: %c = or i32 %a, 1 ret i32 %c } -define i32 @foo6(i32 %a, i32 %b) signext { +define signext i32 @foo6(i32 %a, i32 %b) { entry: %c = or i32 %a, 131072 ret i32 %c } -define i32 @foo9(i32 %a, i32 %b) signext { +define signext i32 @foo9(i32 %a, i32 %b) { entry: %c = or i32 %a, 123456 ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetOrSubreg.ll b/test/CodeGen/SystemZ/03-RetOrSubreg.ll index 4d7661acb716d..7dab5cacedf3b 100644 --- a/test/CodeGen/SystemZ/03-RetOrSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetOrSubreg.ll @@ -9,13 +9,13 @@ entry: ret i32 %c } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: %c = or i32 %a, %b ret i32 %c } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: %c = or i32 %a, %b ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll b/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll index 11ca796c7b17a..21ea9b583799d 100644 --- a/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetSubImmSubreg.ll @@ -16,25 +16,25 @@ entry: ret i32 %c } -define i32 @foo3(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo3(i32 %a, i32 %b) { entry: %c = sub i32 %a, 1 ret i32 %c } -define i32 @foo4(i32 %a, i32 %b) signext { +define signext i32 @foo4(i32 %a, i32 %b) { entry: %c = sub i32 %a, 131072 ret i32 %c } -define i32 @foo5(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo5(i32 %a, i32 %b) { entry: %c = sub i32 %a, 1 ret i32 %c } -define i32 @foo6(i32 %a, i32 %b) signext { +define signext i32 @foo6(i32 %a, i32 %b) { entry: %c = sub i32 %a, 131072 ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetSubSubreg.ll b/test/CodeGen/SystemZ/03-RetSubSubreg.ll index b3e1ac26e08c4..24b7631d385e5 100644 --- a/test/CodeGen/SystemZ/03-RetSubSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetSubSubreg.ll @@ -8,13 +8,13 @@ entry: ret i32 %c } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: %c = sub i32 %a, %b ret i32 %c } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: %c = sub i32 %a, %b ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll b/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll index 0033126369e6f..70ee45415d174 100644 --- a/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetXorImmSubreg.ll @@ -20,37 +20,37 @@ entry: ret i32 %c } -define i32 @foo3(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo3(i32 %a, i32 %b) { entry: %c = xor i32 %a, 1 ret i32 %c } -define i32 @foo8(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo8(i32 %a, i32 %b) { entry: %c = xor i32 %a, 123456 ret i32 %c } -define i32 @foo4(i32 %a, i32 %b) signext { +define signext i32 @foo4(i32 %a, i32 %b) { entry: %c = xor i32 %a, 131072 ret i32 %c } -define i32 @foo5(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo5(i32 %a, i32 %b) { entry: %c = xor i32 %a, 1 ret i32 %c } -define i32 @foo6(i32 %a, i32 %b) signext { +define signext i32 @foo6(i32 %a, i32 %b) { entry: %c = xor i32 %a, 131072 ret i32 %c } -define i32 @foo9(i32 %a, i32 %b) signext { +define signext i32 @foo9(i32 %a, i32 %b) { entry: %c = xor i32 %a, 123456 ret i32 %c diff --git a/test/CodeGen/SystemZ/03-RetXorSubreg.ll b/test/CodeGen/SystemZ/03-RetXorSubreg.ll index a9af23197ef85..02c4a2a87f7b0 100644 --- a/test/CodeGen/SystemZ/03-RetXorSubreg.ll +++ b/test/CodeGen/SystemZ/03-RetXorSubreg.ll @@ -9,13 +9,13 @@ entry: ret i32 %c } -define i32 @foo1(i32 %a, i32 %b) zeroext { +define zeroext i32 @foo1(i32 %a, i32 %b) { entry: %c = xor i32 %a, %b ret i32 %c } -define i32 @foo2(i32 %a, i32 %b) signext { +define signext i32 @foo2(i32 %a, i32 %b) { entry: %c = xor i32 %a, %b ret i32 %c diff --git a/test/CodeGen/SystemZ/11-BSwap.ll b/test/CodeGen/SystemZ/11-BSwap.ll index b170a8044a9d3..1aa9c67998705 100644 --- a/test/CodeGen/SystemZ/11-BSwap.ll +++ b/test/CodeGen/SystemZ/11-BSwap.ll @@ -5,34 +5,34 @@ target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:3 target triple = "s390x-ibm-linux" -define i16 @foo(i16 zeroext %a) zeroext { +define zeroext i16 @foo(i16 zeroext %a) { %res = tail call i16 @llvm.bswap.i16(i16 %a) ret i16 %res } -define i32 @foo2(i32 zeroext %a) zeroext { +define zeroext i32 @foo2(i32 zeroext %a) { ; CHECK: foo2: -; CHECK: lrvr %r1, %r2 +; CHECK: lrvr [[R1:%r.]], %r2 %res = tail call i32 @llvm.bswap.i32(i32 %a) ret i32 %res } -define i64 @foo3(i64 %a) zeroext { +define zeroext i64 @foo3(i64 %a) { ; CHECK: foo3: ; CHECK: lrvgr %r2, %r2 %res = tail call i64 @llvm.bswap.i64(i64 %a) ret i64 %res } -define i16 @foo4(i16* %b) zeroext { +define zeroext i16 @foo4(i16* %b) { %a = load i16* %b %res = tail call i16 @llvm.bswap.i16(i16 %a) ret i16 %res } -define i32 @foo5(i32* %b) zeroext { +define zeroext i32 @foo5(i32* %b) { ; CHECK: foo5: -; CHECK: lrv %r1, 0(%r2) +; CHECK: lrv [[R1:%r.]], 0(%r2) %a = load i32* %b %res = tail call i32 @llvm.bswap.i32(i32 %a) ret i32 %res diff --git a/test/CodeGen/Thumb/2007-03-06-AddR7.ll b/test/CodeGen/Thumb/2007-03-06-AddR7.ll deleted file mode 100644 index 8d139e92bd3ba..0000000000000 --- a/test/CodeGen/Thumb/2007-03-06-AddR7.ll +++ /dev/null @@ -1,117 +0,0 @@ -; RUN: llc < %s -march=thumb -; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic \ -; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4} - - %struct.__fooAllocator = type opaque - %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** } - %struct.__fooZ = type opaque - %struct.__fooU = type opaque - %struct.__fooString = type opaque - %struct.__fooV = type opaque - %struct.fooXBase = type { i32, [4 x i8] } - %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* } - %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] } - %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* } - %struct.aa_ivar = type { i8*, i8*, i32 } - %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] } - %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* } - %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] } - %struct.aa_object = type { %struct.aa_class* } - %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] } - %struct.aa_ss = type opaque -@__kfooYTypeID = external global i32 ; <i32*> [#uses=3] -@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1] -@__fooXClassTableSize = external global i32 ; <i32*> [#uses=1] -@__fooXAaClassTable = external global i32* ; <i32**> [#uses=1] -@s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2] -@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1] - - -define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext { -entry: - %args = alloca i8*, align 4 ; <i8**> [#uses=5] - %args4 = bitcast i8** %args to i8* ; <i8*> [#uses=2] - call void @llvm.va_start( i8* %args4 ) - %tmp6 = load i32* @__kfooYTypeID ; <i32> [#uses=1] - icmp eq i32 %tmp6, 0 ; <i1>:0 [#uses=1] - br i1 %0, label %cond_true, label %cond_next - -cond_true: ; preds = %entry - %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; <i32> [#uses=1] - store i32 %tmp7, i32* @__kfooYTypeID - br label %cond_next - -cond_next: ; preds = %cond_true, %entry - %tmp8 = load i32* @__kfooYTypeID ; <i32> [#uses=2] - %tmp15 = load i32* @__fooXClassTableSize ; <i32> [#uses=1] - icmp ugt i32 %tmp15, %tmp8 ; <i1>:1 [#uses=1] - br i1 %1, label %cond_next18, label %cond_true58 - -cond_next18: ; preds = %cond_next - %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; <i32*> [#uses=1] - %tmp22 = load i32* %tmp21 ; <i32> [#uses=2] - %tmp29 = load i32** @__fooXAaClassTable ; <i32*> [#uses=1] - %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; <i32*> [#uses=1] - %tmp32 = load i32* %tmp31 ; <i32> [#uses=1] - icmp eq i32 %tmp22, %tmp32 ; <i1>:2 [#uses=1] - %.not = xor i1 %2, true ; <i1> [#uses=1] - icmp ugt i32 %tmp22, 4095 ; <i1>:3 [#uses=1] - %bothcond = and i1 %.not, %3 ; <i1> [#uses=1] - br i1 %bothcond, label %cond_true58, label %bb48 - -bb48: ; preds = %cond_next18 - %tmp78 = call i32 @strlen( i8* %componentDesc ) ; <i32> [#uses=4] - %tmp92 = alloca i32, i32 %tmp78 ; <i32*> [#uses=2] - icmp sgt i32 %tmp78, 0 ; <i1>:4 [#uses=1] - br i1 %4, label %cond_true111, label %bb114 - -cond_true58: ; preds = %cond_next18, %cond_next - %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2] - icmp eq %struct.aa_ss* %tmp59, null ; <i1>:5 [#uses=1] - %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; <i8*> [#uses=2] - br i1 %5, label %cond_true60, label %cond_next64 - -cond_true60: ; preds = %cond_true58 - %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2] - store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319 - %tmp66137 = volatile load i8** %args ; <i8*> [#uses=1] - %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; <i8> [#uses=1] - ret i8 %tmp73138 - -cond_next64: ; preds = %cond_true58 - %tmp66 = volatile load i8** %args ; <i8*> [#uses=1] - %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; <i8> [#uses=1] - ret i8 %tmp73 - -cond_true111: ; preds = %cond_true111, %bb48 - %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; <i32> [#uses=2] - %tmp95 = volatile load i8** %args ; <i8*> [#uses=2] - %tmp97 = getelementptr i8* %tmp95, i32 4 ; <i8*> [#uses=1] - volatile store i8* %tmp97, i8** %args - %tmp9899 = bitcast i8* %tmp95 to i32* ; <i32*> [#uses=1] - %tmp100 = load i32* %tmp9899 ; <i32> [#uses=1] - %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; <i32*> [#uses=1] - store i32 %tmp100, i32* %tmp104 - %indvar.next = add i32 %idx.2132.0, 1 ; <i32> [#uses=2] - icmp eq i32 %indvar.next, %tmp78 ; <i1>:6 [#uses=1] - br i1 %6, label %bb114, label %cond_true111 - -bb114: ; preds = %cond_true111, %bb48 - call void @llvm.va_end( i8* %args4 ) - %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; <i8> [#uses=1] - ret i8 %tmp122 -} - -declare i32 @_fooXRegisterClass(%struct.fooXClass*) - -declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext - -declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...) - -declare %struct.aa_ss* @sel_registerName(i8*) - -declare void @llvm.va_start(i8*) - -declare i32 @strlen(i8*) - -declare void @llvm.va_end(i8*) diff --git a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll b/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll deleted file mode 100644 index 9cdcd3101b9bc..0000000000000 --- a/test/CodeGen/Thumb/2009-07-19-SPDecBug.ll +++ /dev/null @@ -1,33 +0,0 @@ -; RUN: llc < %s -mtriple=thumbv6-elf | not grep "subs sp" -; PR4567 - -define i8* @__gets_chk(i8* %s, i32 %slen) nounwind { -entry: - br i1 undef, label %bb, label %bb1 - -bb: ; preds = %entry - ret i8* undef - -bb1: ; preds = %entry - br i1 undef, label %bb3, label %bb2 - -bb2: ; preds = %bb1 - %0 = alloca i8, i32 undef, align 4 ; <i8*> [#uses=0] - br label %bb4 - -bb3: ; preds = %bb1 - %1 = malloc i8, i32 undef ; <i8*> [#uses=0] - br label %bb4 - -bb4: ; preds = %bb3, %bb2 - br i1 undef, label %bb5, label %bb6 - -bb5: ; preds = %bb4 - %2 = call i8* @gets(i8* %s) nounwind ; <i8*> [#uses=1] - ret i8* %2 - -bb6: ; preds = %bb4 - unreachable -} - -declare i8* @gets(i8*) nounwind diff --git a/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll b/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll new file mode 100644 index 0000000000000..d39a76085af2a --- /dev/null +++ b/test/CodeGen/Thumb/2011-06-16-NoGPRs.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s +; +; This test would crash because isel creates a GPR register for the return +; value from f1. The register is only used by tBLXr_r9 which accepts a full GPR +; register, but we cannot have live GPRs in thumb mode because we don't know how +; to spill them. +; +; <rdar://problem/9624323> +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" +target triple = "thumbv6-apple-darwin10" + +%0 = type opaque + +declare i8* (i8*, i8*, ...)* @f1(i8*, i8*) optsize +declare i8* @f2(i8*, i8*, ...) + +define internal void @f(i8* %self, i8* %_cmd, %0* %inObjects, %0* %inIndexes) optsize ssp { +entry: + %call14 = tail call i8* (i8*, i8*, ...)* (i8*, i8*)* @f1(i8* undef, i8* %_cmd) optsize + %0 = bitcast i8* (i8*, i8*, ...)* %call14 to void (i8*, i8*, %0*, %0*)* + tail call void %0(i8* %self, i8* %_cmd, %0* %inObjects, %0* %inIndexes) optsize + tail call void bitcast (i8* (i8*, i8*, ...)* @f2 to void (i8*, i8*, i32, %0*, %0*)*)(i8* %self, i8* undef, i32 2, %0* %inIndexes, %0* undef) optsize + ret void +} diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll index 419c3baa3da30..d39b50f0a9daf 100644 --- a/test/CodeGen/Thumb/barrier.ll +++ b/test/CodeGen/Thumb/barrier.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s -check-prefix=V6 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6 -; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M +; RUN: llc < %s -march=thumb -mcpu=cortex-m0 | FileCheck %s -check-prefix=V6M declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1) diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll index cd35be69f5caa..f3f08347ae6e1 100644 --- a/test/CodeGen/Thumb/dyn-stackalloc.ll +++ b/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -60,7 +60,7 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag ) %tmp6.len = call i32 @strlen( i8* %tmp6 ) %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len - call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 ) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 false) %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents ) call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 ) ret void @@ -72,6 +72,6 @@ declare i8* @strcat(i8*, i8*) declare fastcc void @comment_add(%struct.comment*, i8*) -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare i8* @strcpy(i8*, i8*) diff --git a/test/CodeGen/Thumb/inlineasm-thumb.ll b/test/CodeGen/Thumb/inlineasm-thumb.ll new file mode 100644 index 0000000000000..f2683c8dd8cc0 --- /dev/null +++ b/test/CodeGen/Thumb/inlineasm-thumb.ll @@ -0,0 +1,7 @@ +; RUN: llc < %s -march=thumb | FileCheck %s +define i32 @t1(i32 %x, i32 %y) nounwind { +entry: + ; CHECK: mov r0, r12 + %0 = tail call i32 asm "mov $0, $1", "=l,h"(i32 %y) nounwind + ret i32 %0 +} diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll index 780e5fac02b90..3f10b0573be54 100644 --- a/test/CodeGen/Thumb/select.ll +++ b/test/CodeGen/Thumb/select.ll @@ -1,10 +1,5 @@ -; RUN: llc < %s -march=thumb | grep beq | count 1 -; RUN: llc < %s -march=thumb | grep bgt | count 1 -; RUN: llc < %s -march=thumb | grep blt | count 3 -; RUN: llc < %s -march=thumb | grep ble | count 1 -; RUN: llc < %s -march=thumb | grep bls | count 1 -; RUN: llc < %s -march=thumb | grep bhi | count 1 -; RUN: llc < %s -mtriple=thumb-apple-darwin | grep __ltdf2 +; RUN: llc < %s -mtriple=thumb-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=thumb-pc-linux-gnueabi | FileCheck -check-prefix=CHECK-EABI %s define i32 @f1(i32 %a.s) { entry: @@ -12,6 +7,10 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f1: +; CHECK: beq +; CHECK-EABI: f1: +; CHECK-EABI: beq define i32 @f2(i32 %a.s) { entry: @@ -19,6 +18,10 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f2: +; CHECK: bgt +; CHECK-EABI: f2: +; CHECK-EABI: bgt define i32 @f3(i32 %a.s, i32 %b.s) { entry: @@ -26,6 +29,10 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f3: +; CHECK: blt +; CHECK-EABI: f3: +; CHECK-EABI: blt define i32 @f4(i32 %a.s, i32 %b.s) { entry: @@ -33,6 +40,10 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f4: +; CHECK: ble +; CHECK-EABI: f4: +; CHECK-EABI: ble define i32 @f5(i32 %a.u, i32 %b.u) { entry: @@ -40,6 +51,10 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f5: +; CHECK: bls +; CHECK-EABI: f5: +; CHECK-EABI: bls define i32 @f6(i32 %a.u, i32 %b.u) { entry: @@ -47,9 +62,21 @@ entry: %tmp1.s = select i1 %tmp, i32 2, i32 3 ret i32 %tmp1.s } +; CHECK: f6: +; CHECK: bhi +; CHECK-EABI: f6: +; CHECK-EABI: bhi define double @f7(double %a, double %b) { %tmp = fcmp olt double %a, 1.234e+00 %tmp1 = select i1 %tmp, double -1.000e+00, double %b ret double %tmp1 } +; CHECK: f7: +; CHECK: blt +; CHECK: blt +; CHECK: __ltdf2 +; CHECK-EABI: f7: +; CHECK-EABI: __aeabi_dcmplt +; CHECK-EABI: bne +; CHECK-EABI: bne diff --git a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll index 41b30291baa28..0b56103271070 100644 --- a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll +++ b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3 - type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4 + %0 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0 + %1 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1 + %2 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2 + %3 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3 + %4 = type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4 %"struct.std::CharVectorType" = type { %"struct.std::_Vector_base<char,std::allocator<char> >" } %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" } %"struct.std::_Bit_iterator_base" = type { i32*, i32 } diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll index b8326373924fc..28ac28bbc550a 100644 --- a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll +++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim - type { %struct.GAP } ; type %0 - type { i16, i8, i8 } ; type %1 - type { [2 x i32], [2 x i32] } ; type %2 - type { %struct.rec* } ; type %3 - type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + %0 = type { %struct.GAP } ; type %0 + %1 = type { i16, i8, i8 } ; type %1 + %2 = type { [2 x i32], [2 x i32] } ; type %2 + %3 = type { %struct.rec* } ; type %3 + %4 = type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.FILE_POS = type { i8, i8, i16, i32 } %struct.FIRST_UNION = type { %struct.FILE_POS } diff --git a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll index 02fad4b930c46..88accf8063edf 100644 --- a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll +++ b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -O3 - type { i16, i8, i8 } ; type %0 - type { [2 x i32], [2 x i32] } ; type %1 - type { %struct.GAP } ; type %2 - type { %struct.rec* } ; type %3 - type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 - type { i8, i8, i8, i8 } ; type %5 + %0 = type { i16, i8, i8 } ; type %0 + %1 = type { [2 x i32], [2 x i32] } ; type %1 + %2 = type { %struct.GAP } ; type %2 + %3 = type { %struct.rec* } ; type %3 + %4 = type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + %5 = type { i8, i8, i8, i8 } ; type %5 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.FILE_POS = type { i8, i8, i16, i32 } diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll index bfea003fb46b0..779e100d4197e 100644 --- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll +++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll @@ -1,4 +1,3 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | not grep fcpys ; rdar://7117307 @@ -13,7 +12,7 @@ entry: br i1 undef, label %bb, label %bb6.preheader bb6.preheader: ; preds = %entry - call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 12, i32 4, i1 false) br i1 undef, label %bb15, label %bb13 bb: ; preds = %entry @@ -31,4 +30,4 @@ bb15: ; preds = %bb13, %bb6.preheader ret void } -declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll index 9aee910829eb7..18c2e0bfaec5c 100644 --- a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll +++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll @@ -13,7 +13,7 @@ define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string< ; CHECK: _ZNKSs7compareERKSs: ; CHECK: it eq ; CHECK-NEXT: subeq{{(.w)?}} r0, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ldmia.w sp!, +; CHECK-NEXT: pop.w entry: %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3] %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3] diff --git a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll index 9ed6a01255f82..01fb0a581a5bc 100644 --- a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll +++ b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 -disable-branch-fold | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" @@ -26,7 +26,7 @@ entry: ; CHECK: vldr.64 [[LDR:d.*]], ; CHECK: LPC0_0: ; CHECK: vadd.f64 [[ADD:d.*]], [[LDR]], [[LDR]] -; CHECK: vmov.f64 [[LDR]] +; CHECK-NOT: vmov.f64 [[ADD]] %5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2] %6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2] %tmp7 = extractelement <2 x double> %5, i32 0 ; <double> [#uses=1] diff --git a/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll b/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll index 9e6d78e75dc67..b1ce3bb935e30 100644 --- a/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll +++ b/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll @@ -1,13 +1,11 @@ -; RUN: llc < %s | FileCheck %s -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" -target triple = "thumbv7-apple-darwin10" +; RUN: llc -mtriple=thumbv7-apple-darwin10 < %s | FileCheck %s %struct.op = type { %struct.op*, %struct.op*, %struct.op* ()*, i32, i16, i16, i8, i8 } ; CHECK: Perl_ck_sort -; CHECK: ldr -; CHECK: mov [[REGISTER:(r[0-9]+)|(lr)]] -; CHECK: str {{(r[0-9])|(lr)}}, {{\[}}[[REGISTER]]{{\]}}, #24 +; CHECK: ldreq +; CHECK: moveq [[REGISTER:(r[0-9]+)|(lr)]] +; CHECK: streq {{(r[0-9])|(lr)}}, {{\[}}[[REGISTER]]{{\]}}, #24 define void @Perl_ck_sort() nounwind optsize { entry: diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll index e1932bd2748af..4597ba56b0d11 100644 --- a/test/CodeGen/Thumb2/ldr-str-imm12.ll +++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll @@ -22,7 +22,7 @@ define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind { entry: -; CHECK: ldr.w {{(r[0-9]+)|(lr)}}, [r7, #28] +; CHECK: ldr{{(.w)?}} {{(r[0-9]+)|(lr)}}, [r7, #28] %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] %ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] br label %bb20 diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll index ad957a1fcb45f..9ff114e2b6f21 100644 --- a/test/CodeGen/Thumb2/lsr-deficiency.ll +++ b/test/CodeGen/Thumb2/lsr-deficiency.ll @@ -13,16 +13,16 @@ define void @t() nounwind optsize { ; CHECK: t: -; CHECK: mov.w r2, #1000 +; CHECK: mov{{.*}}, #1000 entry: %.pre = load i32* @G, align 4 ; <i32> [#uses=1] br label %bb bb: ; preds = %bb, %entry ; CHECK: LBB0_1: -; CHECK: cmp r2, #0 -; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], r2, #1 -; CHECK: mov r2, [[REGISTER]] +; CHECK: cmp [[R2:r[0-9]+]], #0 +; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], [[R2]], #1 +; CHECK: mov [[R2]], [[REGISTER]] %0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1] %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2] diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index ee054a165a014..b199d69981140 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -8,26 +8,25 @@ define void @t1(i32* nocapture %vals, i32 %c) nounwind { entry: ; CHECK: t1: -; CHECK: cbz +; CHECK: bxeq lr + %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] br i1 %0, label %return, label %bb.nph bb.nph: ; preds = %entry -; CHECK: BB#1 ; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr ; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr ; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]] ; CHECK: ldr{{.*}}, [r[[R2b]] -; CHECK: LBB0_2 +; CHECK: LBB0_ ; CHECK-NOT: LCPI0_0: -; PIC: BB#1 ; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r[[R2]], pc ; PIC: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]] ; PIC: ldr{{.*}}, [r[[R2b]] -; PIC: LBB0_2 +; PIC: LBB0_ ; PIC-NOT: LCPI0_0: ; PIC: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] @@ -52,8 +51,8 @@ return: ; preds = %bb, %entry define void @t2(i8* %ptr1, i8* %ptr2) nounwind { entry: ; CHECK: t2: -; CHECK: mov.w r3, #1065353216 -; CHECK: vdup.32 q{{.*}}, r3 +; CHECK: mov.w [[R3:r[0-9]+]], #1065353216 +; CHECK: vdup.32 q{{.*}}, [[R3]] br i1 undef, label %bb1, label %bb2 bb1: diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll index 5e25cf64bccbd..66fca132f04ac 100644 --- a/test/CodeGen/Thumb2/thumb2-add.ll +++ b/test/CodeGen/Thumb2/thumb2-add.ll @@ -1,48 +1,81 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #255 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #256 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #257 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4094 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4095 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4096 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @t2ADDrc_255(i32 %lhs) { +; CHECK: t2ADDrc_255: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #255 +; CHECK: bx lr + %Rd = add i32 %lhs, 255 ret i32 %Rd } define i32 @t2ADDrc_256(i32 %lhs) { +; CHECK: t2ADDrc_256: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #256 +; CHECK: bx lr + %Rd = add i32 %lhs, 256 ret i32 %Rd } define i32 @t2ADDrc_257(i32 %lhs) { +; CHECK: t2ADDrc_257: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #257 +; CHECK: bx lr + %Rd = add i32 %lhs, 257 ret i32 %Rd } define i32 @t2ADDrc_4094(i32 %lhs) { +; CHECK: t2ADDrc_4094: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4094 +; CHECK: bx lr + %Rd = add i32 %lhs, 4094 ret i32 %Rd } define i32 @t2ADDrc_4095(i32 %lhs) { +; CHECK: t2ADDrc_4095: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4095 +; CHECK: bx lr + %Rd = add i32 %lhs, 4095 ret i32 %Rd } define i32 @t2ADDrc_4096(i32 %lhs) { +; CHECK: t2ADDrc_4096: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4096 +; CHECK: bx lr + %Rd = add i32 %lhs, 4096 ret i32 %Rd } define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { +; CHECK: t2ADDrr: +; CHECK-NOT: bx lr +; CHECK: add +; CHECK: bx lr + %Rd = add i32 %lhs, %rhs ret i32 %Rd } define i32 @t2ADDrs(i32 %lhs, i32 %rhs) { +; CHECK: t2ADDrs: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} lsl #8 +; CHECK: bx lr + %tmp = shl i32 %rhs, 8 %Rd = add i32 %lhs, %tmp ret i32 %Rd diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll index aae9f5c0af714..70febc060e8d3 100644 --- a/test/CodeGen/Thumb2/thumb2-bcc.ll +++ b/test/CodeGen/Thumb2/thumb2-bcc.ll @@ -1,5 +1,8 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; RUN: llc < %s -march=thumb -mattr=+thumb2 | not grep it +; If-conversion defeats the purpose of this test, which is to check CBZ +; generation, so use memory barrier instruction to make sure it doesn't +; happen and we get actual branches. define i32 @t1(i32 %a, i32 %b, i32 %c) { ; CHECK: t1: @@ -8,12 +11,16 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) { br i1 %tmp2, label %cond_false, label %cond_true cond_true: + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) %tmp5 = add i32 %b, 1 %tmp6 = and i32 %tmp5, %c ret i32 %tmp6 cond_false: + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) %tmp7 = add i32 %b, -1 %tmp8 = xor i32 %tmp7, %c ret i32 %tmp8 } + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index 1d2af7a547456..4d9eda062f9e5 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -1,4 +1,7 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s +; If-conversion defeats the purpose of this test, which is to check conditional +; branch generation, so use memory barrier instruction to make sure it doesn't +; happen and we get actual branches. define i32 @f1(i32 %a, i32 %b, i32* %v) { entry: @@ -8,10 +11,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -23,10 +28,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -38,10 +45,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -53,9 +62,13 @@ entry: br i1 %tmp, label %return, label %cond_true cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll index 74728bfcc5a99..00a54a0f1952a 100644 --- a/test/CodeGen/Thumb2/thumb2-clz.ll +++ b/test/CodeGen/Thumb2/thumb2-clz.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s define i32 @f1(i32 %a) { ; CHECK: f1: diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll index d842d4d879956..a4035bb8ed491 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll @@ -2,8 +2,10 @@ define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; CHECK: t1: -; CHECK: it ne +; CHECK: ittt ne ; CHECK: cmpne +; CHECK: addne +; CHECK: bxne lr switch i32 %c, label %cond_next [ i32 1, label %cond_true i32 7, label %cond_true @@ -70,8 +72,9 @@ entry: define void @t3(i32 %a, i32 %b) nounwind { entry: ; CHECK: t3: -; CHECK: it lt -; CHECK: poplt {r7, pc} +; CHECK: itt ge +; CHECK: movge r0, r1 +; CHECK: blge _foo %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock diff --git a/test/CodeGen/Thumb2/thumb2-mulhi.ll b/test/CodeGen/Thumb2/thumb2-mulhi.ll index 5d47770aed3ec..9d4840a2deb81 100644 --- a/test/CodeGen/Thumb2/thumb2-mulhi.ll +++ b/test/CodeGen/Thumb2/thumb2-mulhi.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep smmul | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep umull | count 1 +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2dsp | FileCheck %s define i32 @smulhi(i32 %x, i32 %y) { +; CHECK: smulhi +; CHECK: smmul r0, r1, r0 %tmp = sext i32 %x to i64 ; <i64> [#uses=1] %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1] @@ -11,6 +12,8 @@ define i32 @smulhi(i32 %x, i32 %y) { } define i32 @umulhi(i32 %x, i32 %y) { +; CHECK: umulhi +; CHECK: umull r1, r0, r1, r0 %tmp = zext i32 %x to i64 ; <i64> [#uses=1] %tmp1 = zext i32 %y to i64 ; <i64> [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1] diff --git a/test/CodeGen/Thumb2/thumb2-rev.ll b/test/CodeGen/Thumb2/thumb2-rev.ll index 2cee2e3d6fcea..b469bbd3f7b5a 100644 --- a/test/CodeGen/Thumb2/thumb2-rev.ll +++ b/test/CodeGen/Thumb2/thumb2-rev.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s define i32 @f1(i32 %a) { ; CHECK: f1: diff --git a/test/CodeGen/Thumb2/thumb2-sbc.ll b/test/CodeGen/Thumb2/thumb2-sbc.ll index 53f45ea951f59..492e5f0eacc09 100644 --- a/test/CodeGen/Thumb2/thumb2-sbc.ll +++ b/test/CodeGen/Thumb2/thumb2-sbc.ll @@ -56,7 +56,6 @@ define i64 @f6(i64 %a) { ; ; CHECK: livecarry: ; CHECK: adds -; CHECK: adcs ; CHECK: adc define i64 @livecarry(i64 %carry, i32 %digit) nounwind { %ch = lshr i64 %carry, 32 diff --git a/test/CodeGen/Thumb2/thumb2-smla.ll b/test/CodeGen/Thumb2/thumb2-smla.ll index bd4dcbe622fa2..c128eccd662ff 100644 --- a/test/CodeGen/Thumb2/thumb2-smla.ll +++ b/test/CodeGen/Thumb2/thumb2-smla.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s define i32 @f3(i32 %a, i16 %x, i32 %y) { ; CHECK: f3 diff --git a/test/CodeGen/Thumb2/thumb2-smul.ll b/test/CodeGen/Thumb2/thumb2-smul.ll index ae175355059c7..7a13269615d45 100644 --- a/test/CodeGen/Thumb2/thumb2-smul.ll +++ b/test/CodeGen/Thumb2/thumb2-smul.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s @x = weak global i16 0 ; <i16*> [#uses=1] @y = weak global i16 0 ; <i16*> [#uses=0] diff --git a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll index 4b685a86fd8ea..f3d0edf0c5781 100644 --- a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll +++ b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll @@ -7,7 +7,7 @@ define i32 @test0(i8 %A) { ret i32 %B } -define i8 @test1(i32 %A) signext { +define signext i8 @test1(i32 %A) { ; CHECK: test1 ; CHECK: sxtb.w r0, r0, ror #8 %B = lshr i32 %A, 8 @@ -17,7 +17,7 @@ define i8 @test1(i32 %A) signext { ret i8 %E } -define i32 @test2(i32 %A, i32 %X) signext { +define signext i32 @test2(i32 %A, i32 %X) { ; CHECK: test2 ; CHECK: lsrs r0, r0, #8 ; CHECK: sxtab r0, r1, r0 diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll index 566408a604835..00c928fc0782a 100644 --- a/test/CodeGen/Thumb2/thumb2-teq.ll +++ b/test/CodeGen/Thumb2/thumb2-teq.ll @@ -4,15 +4,6 @@ ; test as 'mov.w r0, #0'. So far, that requires physreg joining. ; 0x000000bb = 187 -define i1 @f1(i32 %a) { - %tmp = xor i32 %a, 187 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f1: -; CHECK: teq.w r0, #187 - -; 0x000000bb = 187 define i1 @f2(i32 %a) { %tmp = xor i32 %a, 187 %tmp1 = icmp eq i32 0, %tmp @@ -30,24 +21,6 @@ define i1 @f3(i32 %a) { ; CHECK: f3: ; CHECK: teq.w r0, #11141290 -; 0x00aa00aa = 11141290 -define i1 @f4(i32 %a) { - %tmp = xor i32 %a, 11141290 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f4: -; CHECK: teq.w r0, #11141290 - -; 0xcc00cc00 = 3422604288 -define i1 @f5(i32 %a) { - %tmp = xor i32 %a, 3422604288 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f5: -; CHECK: teq.w r0, #-872363008 - ; 0xcc00cc00 = 3422604288 define i1 @f6(i32 %a) { %tmp = xor i32 %a, 3422604288 @@ -72,17 +45,6 @@ define i1 @f8(i32 %a) { %tmp1 = icmp ne i32 0, %tmp ret i1 %tmp1 } -; CHECK: f8: -; CHECK: teq.w r0, #-572662307 - -; 0x00110000 = 1114112 -define i1 @f9(i32 %a) { - %tmp = xor i32 %a, 1114112 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f9: -; CHECK: teq.w r0, #1114112 ; 0x00110000 = 1114112 define i1 @f10(i32 %a) { diff --git a/test/CodeGen/Thumb2/thumb2-teq2.ll b/test/CodeGen/Thumb2/thumb2-teq2.ll index cdd3489c50d1f..8acae9090f178 100644 --- a/test/CodeGen/Thumb2/thumb2-teq2.ll +++ b/test/CodeGen/Thumb2/thumb2-teq2.ll @@ -3,14 +3,6 @@ ; These tests implicitly depend on 'movs r0, #0' being rematerialized below the ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. -define i1 @f1(i32 %a, i32 %b) { -; CHECK: f1 -; CHECK: teq.w r0, r1 - %tmp = xor i32 %a, %b - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} - define i1 @f2(i32 %a, i32 %b) { ; CHECK: f2 ; CHECK: teq.w r0, r1 @@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) { ret i1 %tmp1 } -define i1 @f3(i32 %a, i32 %b) { -; CHECK: f3 -; CHECK: teq.w r0, r1 - %tmp = xor i32 %a, %b - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} - define i1 @f4(i32 %a, i32 %b) { ; CHECK: f4 ; CHECK: teq.w r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll index 47f553f204863..43e208cc59dce 100644 --- a/test/CodeGen/Thumb2/thumb2-tst.ll +++ b/test/CodeGen/Thumb2/thumb2-tst.ll @@ -4,15 +4,6 @@ ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. ; 0x000000bb = 187 -define i1 @f1(i32 %a) { - %tmp = and i32 %a, 187 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f1: -; CHECK: tst.w r0, #187 - -; 0x000000bb = 187 define i1 @f2(i32 %a) { %tmp = and i32 %a, 187 %tmp1 = icmp eq i32 0, %tmp @@ -30,24 +21,6 @@ define i1 @f3(i32 %a) { ; CHECK: f3: ; CHECK: tst.w r0, #11141290 -; 0x00aa00aa = 11141290 -define i1 @f4(i32 %a) { - %tmp = and i32 %a, 11141290 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f4: -; CHECK: tst.w r0, #11141290 - -; 0xcc00cc00 = 3422604288 -define i1 @f5(i32 %a) { - %tmp = and i32 %a, 3422604288 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f5: -; CHECK: tst.w r0, #-872363008 - ; 0xcc00cc00 = 3422604288 define i1 @f6(i32 %a) { %tmp = and i32 %a, 3422604288 @@ -66,24 +39,6 @@ define i1 @f7(i32 %a) { ; CHECK: f7: ; CHECK: tst.w r0, #-572662307 -; 0xdddddddd = 3722304989 -define i1 @f8(i32 %a) { - %tmp = and i32 %a, 3722304989 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f8: -; CHECK: tst.w r0, #-572662307 - -; 0x00110000 = 1114112 -define i1 @f9(i32 %a) { - %tmp = and i32 %a, 1114112 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f9: -; CHECK: tst.w r0, #1114112 - ; 0x00110000 = 1114112 define i1 @f10(i32 %a) { %tmp = and i32 %a, 1114112 diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll index 405b3bb1d3851..bfe016fc8d6ff 100644 --- a/test/CodeGen/Thumb2/thumb2-tst2.ll +++ b/test/CodeGen/Thumb2/thumb2-tst2.ll @@ -3,14 +3,6 @@ ; These tests implicitly depend on 'movs r0, #0' being rematerialized below the ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. -define i1 @f1(i32 %a, i32 %b) { -; CHECK: f1: -; CHECK: tst r0, r1 - %tmp = and i32 %a, %b - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} - define i1 @f2(i32 %a, i32 %b) { ; CHECK: f2: ; CHECK: tst r0, r1 @@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) { ret i1 %tmp1 } -define i1 @f3(i32 %a, i32 %b) { -; CHECK: f3: -; CHECK: tst r0, r1 - %tmp = and i32 %a, %b - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} - define i1 @f4(i32 %a, i32 %b) { ; CHECK: f4: ; CHECK: tst r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll index b8e43812ed991..03189aa7e15f9 100644 --- a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll +++ b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll @@ -1,13 +1,13 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s -define i8 @test1(i32 %A.u) zeroext { +define zeroext i8 @test1(i32 %A.u) { ; CHECK: test1 ; CHECK: uxtb r0, r0 %B.u = trunc i32 %A.u to i8 ret i8 %B.u } -define i32 @test2(i32 %A.u, i32 %B.u) zeroext { +define zeroext i32 @test2(i32 %A.u, i32 %B.u) { ; CHECK: test2 ; CHECK: uxtab r0, r0, r1 %C.u = trunc i32 %B.u to i8 @@ -16,7 +16,7 @@ define i32 @test2(i32 %A.u, i32 %B.u) zeroext { ret i32 %E.u } -define i32 @test3(i32 %A.u) zeroext { +define zeroext i32 @test3(i32 %A.u) { ; CHECK: test3 ; CHECK: uxth.w r0, r0, ror #8 %B.u = lshr i32 %A.u, 8 diff --git a/test/CodeGen/X86/2004-02-12-Memcpy.ll b/test/CodeGen/X86/2004-02-12-Memcpy.ll deleted file mode 100644 index f15a1b441816c..0000000000000 --- a/test/CodeGen/X86/2004-02-12-Memcpy.ll +++ /dev/null @@ -1,25 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep movs | count 1 - -@A = global [32 x i32] zeroinitializer -@B = global [32 x i32] zeroinitializer - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -define void @main() nounwind { - ; dword copy - call void @llvm.memcpy.i32(i8* bitcast ([32 x i32]* @A to i8*), - i8* bitcast ([32 x i32]* @B to i8*), - i32 128, i32 4 ) - - ; word copy - call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*), - i8* bitcast ([32 x i32]* @B to i8*), - i32 128, i32 2 ) - - ; byte copy - call void @llvm.memcpy.i32( i8* bitcast ([32 x i32]* @A to i8*), - i8* bitcast ([32 x i32]* @B to i8*), - i32 128, i32 1 ) - - ret void -} diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll index 91210ea90c69d..6ec9a488494a3 100644 --- a/test/CodeGen/X86/2006-11-12-CSRetCC.ll +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -1,9 +1,14 @@ -; RUN: llc < %s -march=x86 | grep {subl \$4, %esp} +; RUN: llc < %s -march=x86 | FileCheck %s target triple = "i686-pc-linux-gnu" @str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1] define i32 @main() { +; CHECK: main: +; CHECK-NOT: ret +; CHECK: subl $4, %{{.*}} +; CHECK: ret + entry: %retval = alloca i32, align 4 ; <i32*> [#uses=1] %tmp = alloca { double, double }, align 16 ; <{ double, double }*> [#uses=4] diff --git a/test/CodeGen/X86/2006-11-28-Memcpy.ll b/test/CodeGen/X86/2006-11-28-Memcpy.ll deleted file mode 100644 index 8c1573f130ba1..0000000000000 --- a/test/CodeGen/X86/2006-11-28-Memcpy.ll +++ /dev/null @@ -1,34 +0,0 @@ -; PR1022, PR1023 -; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2 -; RUN: llc < %s -march=x86 | grep -E {movl _?bytes2} | count 1 - -@fmt = constant [4 x i8] c"%x\0A\00" ; <[4 x i8]*> [#uses=2] -@bytes = constant [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1] -@bytes2 = global [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1] - -define i32 @test1() nounwind { - %y = alloca i32 ; <i32*> [#uses=2] - %c = bitcast i32* %y to i8* ; <i8*> [#uses=1] - %z = getelementptr [4 x i8]* @bytes, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 ) - %r = load i32* %y ; <i32> [#uses=1] - %t = bitcast [4 x i8]* @fmt to i8* ; <i8*> [#uses=1] - %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; <i32> [#uses=0] - ret i32 0 -} - -define void @test2() nounwind { - %y = alloca i32 ; <i32*> [#uses=2] - %c = bitcast i32* %y to i8* ; <i8*> [#uses=1] - %z = getelementptr [4 x i8]* @bytes2, i32 0, i32 0 ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %c, i8* %z, i32 4, i32 1 ) - %r = load i32* %y ; <i32> [#uses=1] - %t = bitcast [4 x i8]* @fmt to i8* ; <i8*> [#uses=1] - %tmp = call i32 (i8*, ...)* @printf( i8* %t, i32 %r ) ; <i32> [#uses=0] - ret void -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare i32 @printf(i8*, ...) - diff --git a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll index 10bbe74420079..b0eb1c5441bf2 100644 --- a/test/CodeGen/X86/2007-02-04-OrAddrMode.ll +++ b/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -1,8 +1,12 @@ -; RUN: llc < %s -march=x86 | grep {orl \$1, %eax} -; RUN: llc < %s -march=x86 | grep {leal 3(,%eax,8)} +; RUN: llc < %s -march=x86 | FileCheck %s ;; This example can't fold the or into an LEA. define i32 @test(float ** %tmp2, i32 %tmp12) nounwind { +; CHECK: test: +; CHECK-NOT: ret +; CHECK: orl $1, %{{.*}} +; CHECK: ret + %tmp3 = load float** %tmp2 %tmp132 = shl i32 %tmp12, 2 ; <i32> [#uses=1] %tmp4 = bitcast float* %tmp3 to i8* ; <i8*> [#uses=1] @@ -12,9 +16,13 @@ define i32 @test(float ** %tmp2, i32 %tmp12) nounwind { ret i32 %tmp14 } - ;; This can! define i32 @test2(i32 %a, i32 %b) nounwind { +; CHECK: test2: +; CHECK-NOT: ret +; CHECK: leal 3(,%{{.*}},8) +; CHECK: ret + %c = shl i32 %a, 3 %d = or i32 %c, 3 ret i32 %d diff --git a/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll b/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll index a8f0e576b95e7..b48ce845f902d 100644 --- a/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll +++ b/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll @@ -1,13 +1,17 @@ ; PR1219 -; RUN: llc < %s -march=x86 | grep {movl \$1, %eax} +; RUN: llc < %s -march=x86 | FileCheck %s define i32 @test(i1 %X) { -old_entry1: - %hvar2 = zext i1 %X to i32 +; CHECK: test: +; CHECK-NOT: ret +; CHECK: movl $1, %eax +; CHECK: ret + + %hvar2 = zext i1 %X to i32 %C = icmp sgt i32 %hvar2, -1 br i1 %C, label %cond_true15, label %cond_true cond_true15: - ret i32 1 + ret i32 1 cond_true: - ret i32 2 + ret i32 2 } diff --git a/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/test/CodeGen/X86/2007-03-16-InlineAsm.ll index 9580726ce02a2..3bd6d590efc17 100644 --- a/test/CodeGen/X86/2007-03-16-InlineAsm.ll +++ b/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -9,7 +9,6 @@ entry: %retval = alloca i32, align 4 ; <i32*> [#uses=2] %tmp = alloca i32, align 4 ; <i32*> [#uses=2] %ret = alloca i32, align 4 ; <i32*> [#uses=2] - "alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] store i32 %A, i32* %A_addr store i32 %B, i32* %B_addr %tmp1 = load i32* %A_addr ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll index 30453d5266b9f..e2cd750e2cac9 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll @@ -1,9 +1,14 @@ -; RUN: llc < %s -march=x86 | grep {psrlw \$8, %xmm0} +; RUN: llc < %s -march=x86 | FileCheck %s target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" define void @test() { - tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 ) - ret void +; CHECK: test: +; CHECK-NOT: ret +; CHECK: psrlw $8, %xmm0 +; CHECK: ret + + tail call void asm sideeffect "psrlw $0, %xmm0", "X,~{dirflag},~{fpsr},~{flags}"( i32 8 ) + ret void } diff --git a/test/CodeGen/X86/2007-05-05-Personality.ll b/test/CodeGen/X86/2007-05-05-Personality.ll index 0f49d2e10cb9d..d1fc70d83679b 100644 --- a/test/CodeGen/X86/2007-05-05-Personality.ll +++ b/test/CodeGen/X86/2007-05-05-Personality.ll @@ -3,35 +3,35 @@ ; CHECK: .cfi_personality 0, __gnat_eh_personality ; CHECK: .cfi_lsda 0, .Lexception0 -@error = external global i8 ; <i8*> [#uses=2] +@error = external global i8 define void @_ada_x() { entry: - invoke void @raise( ) - to label %eh_then unwind label %unwind - -unwind: ; preds = %entry - %eh_ptr = tail call i8* @llvm.eh.exception( ) ; <i8*> [#uses=2] - %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector.i32( i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error ) ; <i32> [#uses=1] - %eh_typeid = tail call i32 @llvm.eh.typeid.for.i32( i8* @error ) ; <i32> [#uses=1] - %tmp2 = icmp eq i32 %eh_select, %eh_typeid ; <i1> [#uses=1] - br i1 %tmp2, label %eh_then, label %Unwind - -eh_then: ; preds = %unwind, %entry - ret void - -Unwind: ; preds = %unwind - tail call i32 (...)* @_Unwind_Resume( i8* %eh_ptr ) ; <i32>:0 [#uses=0] - unreachable + invoke void @raise() + to label %eh_then unwind label %unwind + +unwind: ; preds = %entry + %eh_ptr = tail call i8* @llvm.eh.exception() + %eh_select = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %eh_ptr, i8* bitcast (i32 (...)* @__gnat_eh_personality to i8*), i8* @error) + %eh_typeid = tail call i32 @llvm.eh.typeid.for(i8* @error) + %tmp2 = icmp eq i32 %eh_select, %eh_typeid + br i1 %tmp2, label %eh_then, label %Unwind + +eh_then: ; preds = %unwind, %entry + ret void + +Unwind: ; preds = %unwind + %0 = tail call i32 (...)* @_Unwind_Resume(i8* %eh_ptr) + unreachable } declare void @raise() -declare i8* @llvm.eh.exception() +declare i8* @llvm.eh.exception() nounwind readonly -declare i32 @llvm.eh.selector.i32(i8*, i8*, ...) +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind -declare i32 @llvm.eh.typeid.for.i32(i8*) +declare i32 @llvm.eh.typeid.for(i8*) nounwind declare i32 @__gnat_eh_personality(...) diff --git a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll index ae49bd0022086..22e2750a50069 100644 --- a/test/CodeGen/X86/2007-05-07-InvokeSRet.ll +++ b/test/CodeGen/X86/2007-05-07-InvokeSRet.ll @@ -7,7 +7,7 @@ declare void @invokee(%struct.S* sret ) define void @invoker(%struct.S* %name.0.0) { entry: - invoke void @invokee( %struct.S* %name.0.0 sret ) + invoke void @invokee( %struct.S* sret %name.0.0 ) to label %return unwind label %return return: ; preds = %entry, %entry diff --git a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll index 8ef253822bd9e..ecc5835405d74 100644 --- a/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll +++ b/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -3,7 +3,7 @@ %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> %struct.OpaqueXDataStorageType = type opaque -declare i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) signext +declare signext i16 @GetParamDesc(%struct.XDesc*, i32, i32, %struct.XDesc*) declare void @r_raise(i64, i8*, ...) @@ -18,7 +18,7 @@ cond_true109: ; preds = %entry br i1 false, label %cond_next164, label %cond_true239 cond_next164: ; preds = %cond_true109 - %tmp176 = call i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) signext ; <i16> [#uses=0] + %tmp176 = call signext i16 @GetParamDesc( %struct.XDesc* null, i32 1701999219, i32 1413830740, %struct.XDesc* null ) call void (i64, i8*, ...)* @r_raise( i64 0, i8* null ) unreachable diff --git a/test/CodeGen/X86/2007-06-04-tailmerge4.ll b/test/CodeGen/X86/2007-06-04-tailmerge4.ll deleted file mode 100644 index d5ec0898b9a95..0000000000000 --- a/test/CodeGen/X86/2007-06-04-tailmerge4.ll +++ /dev/null @@ -1,454 +0,0 @@ -; RUN: llc < %s -asm-verbose | grep invcont131 -; PR 1496: tail merge was incorrectly removing this block - -; ModuleID = 'report.1.bc' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "i686-pc-linux-gnu" - %struct.ALLOC = type { %struct.string___XUB, [2 x i8] } - %struct.RETURN = type { i32, i32, i32, i64 } - %struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* } - %struct.ada__tags__dispatch_table = type { [1 x i8*] } - %struct.ada__text_io__text_afcb = type { %struct.system__file_control_block__afcb, i32, i32, i32, i32, i32, %struct.ada__text_io__text_afcb*, i8, i8 } - %struct.string___XUB = type { i32, i32 } - %struct.string___XUP = type { i8*, %struct.string___XUB* } - %struct.system__file_control_block__afcb = type { %struct.ada__streams__root_stream_type, i32, %struct.string___XUP, i32, %struct.string___XUP, i8, i8, i8, i8, i8, i8, i8, %struct.system__file_control_block__afcb*, %struct.system__file_control_block__afcb* } - %struct.system__secondary_stack__mark_id = type { i8*, i32 } - %struct.wide_string___XUP = type { i16*, %struct.string___XUB* } -@report_E = global i8 0 ; <i8*> [#uses=0] -@report__test_status = internal global i8 1 ; <i8*> [#uses=8] -@report__test_name = internal global [15 x i8] zeroinitializer ; <[15 x i8]*> [#uses=10] -@report__test_name_len = internal global i32 0 ; <i32*> [#uses=15] -@.str = internal constant [12 x i8] c"report.adb\00\00" ; <[12 x i8]*> [#uses=1] -@C.26.599 = internal constant %struct.string___XUB { i32 1, i32 1 } ; <%struct.string___XUB*> [#uses=1] -@.str1 = internal constant [1 x i8] c":" ; <[1 x i8]*> [#uses=1] -@.str2 = internal constant [1 x i8] c" " ; <[1 x i8]*> [#uses=1] -@.str3 = internal constant [1 x i8] c"-" ; <[1 x i8]*> [#uses=1] -@.str5 = internal constant [10 x i8] c"0123456789" ; <[10 x i8]*> [#uses=12] -@C.59.855 = internal constant %struct.string___XUB { i32 1, i32 0 } ; <%struct.string___XUB*> [#uses=1] -@C.69.876 = internal constant %struct.string___XUB { i32 1, i32 3 } ; <%struct.string___XUB*> [#uses=1] -@C.70.879 = internal constant %struct.string___XUB { i32 1, i32 6 } ; <%struct.string___XUB*> [#uses=1] -@C.81.900 = internal constant %struct.string___XUB { i32 1, i32 5 } ; <%struct.string___XUB*> [#uses=1] -@.str6 = internal constant [0 x i8] zeroinitializer ; <[0 x i8]*> [#uses=1] -@.str7 = internal constant [3 x i8] c"2.5" ; <[3 x i8]*> [#uses=1] -@.str8 = internal constant [6 x i8] c"ACATS " ; <[6 x i8]*> [#uses=1] -@.str9 = internal constant [5 x i8] c",.,. " ; <[5 x i8]*> [#uses=1] -@.str10 = internal constant [1 x i8] c"." ; <[1 x i8]*> [#uses=1] -@.str11 = internal constant [5 x i8] c"---- " ; <[5 x i8]*> [#uses=1] -@.str12 = internal constant [5 x i8] c" - " ; <[5 x i8]*> [#uses=1] -@.str13 = internal constant [5 x i8] c" * " ; <[5 x i8]*> [#uses=1] -@.str14 = internal constant [5 x i8] c" + " ; <[5 x i8]*> [#uses=1] -@.str15 = internal constant [5 x i8] c" ! " ; <[5 x i8]*> [#uses=1] -@C.209.1380 = internal constant %struct.string___XUB { i32 1, i32 37 } ; <%struct.string___XUB*> [#uses=1] -@.str16 = internal constant [37 x i8] c" PASSED ============================." ; <[37 x i8]*> [#uses=1] -@.str17 = internal constant [5 x i8] c"==== " ; <[5 x i8]*> [#uses=1] -@.str18 = internal constant [37 x i8] c" NOT-APPLICABLE ++++++++++++++++++++." ; <[37 x i8]*> [#uses=1] -@.str19 = internal constant [5 x i8] c"++++ " ; <[5 x i8]*> [#uses=1] -@.str20 = internal constant [37 x i8] c" TENTATIVELY PASSED !!!!!!!!!!!!!!!!." ; <[37 x i8]*> [#uses=1] -@.str21 = internal constant [5 x i8] c"!!!! " ; <[5 x i8]*> [#uses=1] -@.str22 = internal constant [37 x i8] c" SEE '!' COMMENTS FOR SPECIAL NOTES!!" ; <[37 x i8]*> [#uses=1] -@.str23 = internal constant [37 x i8] c" FAILED ****************************." ; <[37 x i8]*> [#uses=1] -@.str24 = internal constant [5 x i8] c"**** " ; <[5 x i8]*> [#uses=1] -@__gnat_others_value = external constant i32 ; <i32*> [#uses=2] -@system__soft_links__abort_undefer = external global void ()* ; <void ()**> [#uses=1] -@C.320.1854 = internal constant %struct.string___XUB { i32 2, i32 6 } ; <%struct.string___XUB*> [#uses=1] - -declare void @report__put_msg(i64 %msg.0.0) - -declare void @__gnat_rcheck_05(i8*, i32) - -declare void @__gnat_rcheck_12(i8*, i32) - -declare %struct.ada__text_io__text_afcb* @ada__text_io__standard_output() - -declare void @ada__text_io__set_col(%struct.ada__text_io__text_afcb*, i32) - -declare void @ada__text_io__put_line(%struct.ada__text_io__text_afcb*, i64) - -declare void @report__time_stamp(%struct.string___XUP* sret %agg.result) - -declare i64 @ada__calendar__clock() - -declare void @ada__calendar__split(%struct.RETURN* sret , i64) - -declare void @system__string_ops_concat_5__str_concat_5(%struct.string___XUP* sret , i64, i64, i64, i64, i64) - -declare void @system__string_ops_concat_3__str_concat_3(%struct.string___XUP* sret , i64, i64, i64) - -declare i8* @system__secondary_stack__ss_allocate(i32) - -declare void @report__test(i64 %name.0.0, i64 %descr.0.0) - -declare void @system__secondary_stack__ss_mark(%struct.system__secondary_stack__mark_id* sret ) - -declare i8* @llvm.eh.exception() - -declare i32 @llvm.eh.selector(i8*, i8*, ...) - -declare i32 @llvm.eh.typeid.for(i8*) - -declare i32 @__gnat_eh_personality(...) - -declare i32 @_Unwind_Resume(...) - -declare void @__gnat_rcheck_07(i8*, i32) - -declare void @system__secondary_stack__ss_release(i64) - -declare void @report__comment(i64 %descr.0.0) - -declare void @report__failed(i64 %descr.0.0) - -declare void @report__not_applicable(i64 %descr.0.0) - -declare void @report__special_action(i64 %descr.0.0) - -define void @report__result() { -entry: - %tmp = alloca %struct.system__secondary_stack__mark_id, align 8 ; <%struct.system__secondary_stack__mark_id*> [#uses=3] - %A.210 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] - %tmp5 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] - %A.229 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] - %tmp10 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] - %A.248 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] - %tmp15 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] - %A.270 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] - %tmp20 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] - %A.284 = alloca %struct.string___XUB, align 8 ; <%struct.string___XUB*> [#uses=3] - %tmp25 = alloca %struct.string___XUP, align 8 ; <%struct.string___XUP*> [#uses=3] - call void @system__secondary_stack__ss_mark( %struct.system__secondary_stack__mark_id* %tmp sret ) - %tmp28 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp29 = load i8** %tmp28 ; <i8*> [#uses=2] - %tmp31 = getelementptr %struct.system__secondary_stack__mark_id* %tmp, i32 0, i32 1 ; <i32*> [#uses=1] - %tmp32 = load i32* %tmp31 ; <i32> [#uses=2] - %tmp33 = load i8* @report__test_status ; <i8> [#uses=1] - switch i8 %tmp33, label %bb483 [ - i8 0, label %bb - i8 2, label %bb143 - i8 3, label %bb261 - ] - -bb: ; preds = %entry - %tmp34 = load i32* @report__test_name_len ; <i32> [#uses=4] - %tmp35 = icmp sgt i32 %tmp34, 0 ; <i1> [#uses=2] - %tmp40 = icmp sgt i32 %tmp34, 15 ; <i1> [#uses=1] - %bothcond139 = and i1 %tmp35, %tmp40 ; <i1> [#uses=1] - br i1 %bothcond139, label %cond_true43, label %cond_next44 - -cond_true43: ; preds = %bb - invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -unwind: ; preds = %invcont589, %cond_next567, %bb555, %cond_true497, %invcont249, %cond_next227, %bb215, %cond_true157, %invcont131, %cond_next109, %bb97, %cond_true43 - %eh_ptr = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] - br label %cleanup717 - -cond_next44: ; preds = %bb - %tmp72 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp72 - %tmp73 = getelementptr %struct.string___XUB* %A.210, i32 0, i32 1 ; <i32*> [#uses=1] - store i32 %tmp34, i32* %tmp73 - br i1 %tmp35, label %cond_true80, label %cond_next109 - -cond_true80: ; preds = %cond_next44 - %tmp45.off = add i32 %tmp34, -1 ; <i32> [#uses=1] - %bothcond = icmp ugt i32 %tmp45.off, 14 ; <i1> [#uses=1] - br i1 %bothcond, label %bb97, label %cond_next109 - -bb97: ; preds = %cond_true80 - invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 212 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -cond_next109: ; preds = %cond_true80, %cond_next44 - %A.210128 = ptrtoint %struct.string___XUB* %A.210 to i32 ; <i32> [#uses=1] - %A.210128129 = zext i32 %A.210128 to i64 ; <i64> [#uses=1] - %A.210128129130 = shl i64 %A.210128129, 32 ; <i64> [#uses=1] - %A.210128129130.ins = or i64 %A.210128129130, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] - invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp5 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str17 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.210128129130.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str16 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) - to label %invcont131 unwind label %unwind - -invcont131: ; preds = %cond_next109 - %tmp133 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp134 = load i8** %tmp133 ; <i8*> [#uses=1] - %tmp134120 = ptrtoint i8* %tmp134 to i32 ; <i32> [#uses=1] - %tmp134120121 = zext i32 %tmp134120 to i64 ; <i64> [#uses=1] - %tmp136 = getelementptr %struct.string___XUP* %tmp5, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] - %tmp137 = load %struct.string___XUB** %tmp136 ; <%struct.string___XUB*> [#uses=1] - %tmp137116 = ptrtoint %struct.string___XUB* %tmp137 to i32 ; <i32> [#uses=1] - %tmp137116117 = zext i32 %tmp137116 to i64 ; <i64> [#uses=1] - %tmp137116117118 = shl i64 %tmp137116117, 32 ; <i64> [#uses=1] - %tmp137116117118.ins = or i64 %tmp137116117118, %tmp134120121 ; <i64> [#uses=1] - invoke fastcc void @report__put_msg( i64 %tmp137116117118.ins ) - to label %cond_next618 unwind label %unwind - -bb143: ; preds = %entry - %tmp144 = load i32* @report__test_name_len ; <i32> [#uses=4] - %tmp147 = icmp sgt i32 %tmp144, 0 ; <i1> [#uses=2] - %tmp154 = icmp sgt i32 %tmp144, 15 ; <i1> [#uses=1] - %bothcond140 = and i1 %tmp147, %tmp154 ; <i1> [#uses=1] - br i1 %bothcond140, label %cond_true157, label %cond_next160 - -cond_true157: ; preds = %bb143 - invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -cond_next160: ; preds = %bb143 - %tmp189 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp189 - %tmp190 = getelementptr %struct.string___XUB* %A.229, i32 0, i32 1 ; <i32*> [#uses=1] - store i32 %tmp144, i32* %tmp190 - br i1 %tmp147, label %cond_true197, label %cond_next227 - -cond_true197: ; preds = %cond_next160 - %tmp161.off = add i32 %tmp144, -1 ; <i32> [#uses=1] - %bothcond1 = icmp ugt i32 %tmp161.off, 14 ; <i1> [#uses=1] - br i1 %bothcond1, label %bb215, label %cond_next227 - -bb215: ; preds = %cond_true197 - invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 215 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -cond_next227: ; preds = %cond_true197, %cond_next160 - %A.229105 = ptrtoint %struct.string___XUB* %A.229 to i32 ; <i32> [#uses=1] - %A.229105106 = zext i32 %A.229105 to i64 ; <i64> [#uses=1] - %A.229105106107 = shl i64 %A.229105106, 32 ; <i64> [#uses=1] - %A.229105106107.ins = or i64 %A.229105106107, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] - invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp10 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str19 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.229105106107.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str18 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) - to label %invcont249 unwind label %unwind - -invcont249: ; preds = %cond_next227 - %tmp251 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp252 = load i8** %tmp251 ; <i8*> [#uses=1] - %tmp25297 = ptrtoint i8* %tmp252 to i32 ; <i32> [#uses=1] - %tmp2529798 = zext i32 %tmp25297 to i64 ; <i64> [#uses=1] - %tmp254 = getelementptr %struct.string___XUP* %tmp10, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] - %tmp255 = load %struct.string___XUB** %tmp254 ; <%struct.string___XUB*> [#uses=1] - %tmp25593 = ptrtoint %struct.string___XUB* %tmp255 to i32 ; <i32> [#uses=1] - %tmp2559394 = zext i32 %tmp25593 to i64 ; <i64> [#uses=1] - %tmp255939495 = shl i64 %tmp2559394, 32 ; <i64> [#uses=1] - %tmp255939495.ins = or i64 %tmp255939495, %tmp2529798 ; <i64> [#uses=1] - invoke fastcc void @report__put_msg( i64 %tmp255939495.ins ) - to label %cond_next618 unwind label %unwind - -bb261: ; preds = %entry - %tmp262 = call i8* @llvm.stacksave( ) ; <i8*> [#uses=2] - %tmp263 = load i32* @report__test_name_len ; <i32> [#uses=4] - %tmp266 = icmp sgt i32 %tmp263, 0 ; <i1> [#uses=2] - %tmp273 = icmp sgt i32 %tmp263, 15 ; <i1> [#uses=1] - %bothcond141 = and i1 %tmp266, %tmp273 ; <i1> [#uses=1] - br i1 %bothcond141, label %cond_true276, label %cond_next281 - -cond_true276: ; preds = %bb261 - invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) - to label %UnifiedUnreachableBlock unwind label %unwind277 - -unwind277: ; preds = %invcont467, %cond_next442, %invcont370, %cond_next348, %bb336, %cond_true276 - %eh_ptr278 = call i8* @llvm.eh.exception( ) ; <i8*> [#uses=1] - call void @llvm.stackrestore( i8* %tmp262 ) - br label %cleanup717 - -cond_next281: ; preds = %bb261 - %tmp310 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp310 - %tmp311 = getelementptr %struct.string___XUB* %A.248, i32 0, i32 1 ; <i32*> [#uses=1] - store i32 %tmp263, i32* %tmp311 - br i1 %tmp266, label %cond_true318, label %cond_next348 - -cond_true318: ; preds = %cond_next281 - %tmp282.off = add i32 %tmp263, -1 ; <i32> [#uses=1] - %bothcond2 = icmp ugt i32 %tmp282.off, 14 ; <i1> [#uses=1] - br i1 %bothcond2, label %bb336, label %cond_next348 - -bb336: ; preds = %cond_true318 - invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 218 ) - to label %UnifiedUnreachableBlock unwind label %unwind277 - -cond_next348: ; preds = %cond_true318, %cond_next281 - %A.24882 = ptrtoint %struct.string___XUB* %A.248 to i32 ; <i32> [#uses=1] - %A.2488283 = zext i32 %A.24882 to i64 ; <i64> [#uses=1] - %A.248828384 = shl i64 %A.2488283, 32 ; <i64> [#uses=1] - %A.248828384.ins = or i64 %A.248828384, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] - invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp15 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.248828384.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str20 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) - to label %invcont370 unwind label %unwind277 - -invcont370: ; preds = %cond_next348 - %tmp372 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp373 = load i8** %tmp372 ; <i8*> [#uses=1] - %tmp37374 = ptrtoint i8* %tmp373 to i32 ; <i32> [#uses=1] - %tmp3737475 = zext i32 %tmp37374 to i64 ; <i64> [#uses=1] - %tmp375 = getelementptr %struct.string___XUP* %tmp15, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] - %tmp376 = load %struct.string___XUB** %tmp375 ; <%struct.string___XUB*> [#uses=1] - %tmp37670 = ptrtoint %struct.string___XUB* %tmp376 to i32 ; <i32> [#uses=1] - %tmp3767071 = zext i32 %tmp37670 to i64 ; <i64> [#uses=1] - %tmp376707172 = shl i64 %tmp3767071, 32 ; <i64> [#uses=1] - %tmp376707172.ins = or i64 %tmp376707172, %tmp3737475 ; <i64> [#uses=1] - invoke fastcc void @report__put_msg( i64 %tmp376707172.ins ) - to label %invcont381 unwind label %unwind277 - -invcont381: ; preds = %invcont370 - %tmp382 = load i32* @report__test_name_len ; <i32> [#uses=6] - %tmp415 = icmp sgt i32 %tmp382, -1 ; <i1> [#uses=1] - %max416 = select i1 %tmp415, i32 %tmp382, i32 0 ; <i32> [#uses=1] - %tmp417 = alloca i8, i32 %max416 ; <i8*> [#uses=3] - %tmp423 = icmp sgt i32 %tmp382, 0 ; <i1> [#uses=1] - br i1 %tmp423, label %bb427, label %cond_next442 - -bb427: ; preds = %invcont381 - store i8 32, i8* %tmp417 - %tmp434 = icmp eq i32 %tmp382, 1 ; <i1> [#uses=1] - br i1 %tmp434, label %cond_next442, label %cond_next438.preheader - -cond_next438.preheader: ; preds = %bb427 - %tmp. = add i32 %tmp382, -1 ; <i32> [#uses=1] - br label %cond_next438 - -cond_next438: ; preds = %cond_next438, %cond_next438.preheader - %indvar = phi i32 [ 0, %cond_next438.preheader ], [ %J130b.513.5, %cond_next438 ] ; <i32> [#uses=1] - %J130b.513.5 = add i32 %indvar, 1 ; <i32> [#uses=3] - %tmp43118 = getelementptr i8* %tmp417, i32 %J130b.513.5 ; <i8*> [#uses=1] - store i8 32, i8* %tmp43118 - %exitcond = icmp eq i32 %J130b.513.5, %tmp. ; <i1> [#uses=1] - br i1 %exitcond, label %cond_next442, label %cond_next438 - -cond_next442: ; preds = %cond_next438, %bb427, %invcont381 - %tmp448 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp448 - %tmp449 = getelementptr %struct.string___XUB* %A.270, i32 0, i32 1 ; <i32*> [#uses=1] - store i32 %tmp382, i32* %tmp449 - %tmp41762 = ptrtoint i8* %tmp417 to i32 ; <i32> [#uses=1] - %tmp4176263 = zext i32 %tmp41762 to i64 ; <i64> [#uses=1] - %A.27058 = ptrtoint %struct.string___XUB* %A.270 to i32 ; <i32> [#uses=1] - %A.2705859 = zext i32 %A.27058 to i64 ; <i64> [#uses=1] - %A.270585960 = shl i64 %A.2705859, 32 ; <i64> [#uses=1] - %A.270585960.ins = or i64 %tmp4176263, %A.270585960 ; <i64> [#uses=1] - invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp20 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str21 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.270585960.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str22 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) - to label %invcont467 unwind label %unwind277 - -invcont467: ; preds = %cond_next442 - %tmp469 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp470 = load i8** %tmp469 ; <i8*> [#uses=1] - %tmp47050 = ptrtoint i8* %tmp470 to i32 ; <i32> [#uses=1] - %tmp4705051 = zext i32 %tmp47050 to i64 ; <i64> [#uses=1] - %tmp472 = getelementptr %struct.string___XUP* %tmp20, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] - %tmp473 = load %struct.string___XUB** %tmp472 ; <%struct.string___XUB*> [#uses=1] - %tmp47346 = ptrtoint %struct.string___XUB* %tmp473 to i32 ; <i32> [#uses=1] - %tmp4734647 = zext i32 %tmp47346 to i64 ; <i64> [#uses=1] - %tmp473464748 = shl i64 %tmp4734647, 32 ; <i64> [#uses=1] - %tmp473464748.ins = or i64 %tmp473464748, %tmp4705051 ; <i64> [#uses=1] - invoke fastcc void @report__put_msg( i64 %tmp473464748.ins ) - to label %cleanup unwind label %unwind277 - -cleanup: ; preds = %invcont467 - call void @llvm.stackrestore( i8* %tmp262 ) - br label %cond_next618 - -bb483: ; preds = %entry - %tmp484 = load i32* @report__test_name_len ; <i32> [#uses=4] - %tmp487 = icmp sgt i32 %tmp484, 0 ; <i1> [#uses=2] - %tmp494 = icmp sgt i32 %tmp484, 15 ; <i1> [#uses=1] - %bothcond142 = and i1 %tmp487, %tmp494 ; <i1> [#uses=1] - br i1 %bothcond142, label %cond_true497, label %cond_next500 - -cond_true497: ; preds = %bb483 - invoke void @__gnat_rcheck_12( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -cond_next500: ; preds = %bb483 - %tmp529 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 0 ; <i32*> [#uses=1] - store i32 1, i32* %tmp529 - %tmp530 = getelementptr %struct.string___XUB* %A.284, i32 0, i32 1 ; <i32*> [#uses=1] - store i32 %tmp484, i32* %tmp530 - br i1 %tmp487, label %cond_true537, label %cond_next567 - -cond_true537: ; preds = %cond_next500 - %tmp501.off = add i32 %tmp484, -1 ; <i32> [#uses=1] - %bothcond3 = icmp ugt i32 %tmp501.off, 14 ; <i1> [#uses=1] - br i1 %bothcond3, label %bb555, label %cond_next567 - -bb555: ; preds = %cond_true537 - invoke void @__gnat_rcheck_05( i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0), i32 223 ) - to label %UnifiedUnreachableBlock unwind label %unwind - -cond_next567: ; preds = %cond_true537, %cond_next500 - %A.28435 = ptrtoint %struct.string___XUB* %A.284 to i32 ; <i32> [#uses=1] - %A.2843536 = zext i32 %A.28435 to i64 ; <i64> [#uses=1] - %A.284353637 = shl i64 %A.2843536, 32 ; <i64> [#uses=1] - %A.284353637.ins = or i64 %A.284353637, zext (i32 ptrtoint ([15 x i8]* @report__test_name to i32) to i64) ; <i64> [#uses=1] - invoke void @system__string_ops_concat_3__str_concat_3( %struct.string___XUP* %tmp25 sret , i64 or (i64 zext (i32 ptrtoint ([5 x i8]* @.str24 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.81.900 to i32) to i64), i64 32)), i64 %A.284353637.ins, i64 or (i64 zext (i32 ptrtoint ([37 x i8]* @.str23 to i32) to i64), i64 shl (i64 zext (i32 ptrtoint (%struct.string___XUB* @C.209.1380 to i32) to i64), i64 32)) ) - to label %invcont589 unwind label %unwind - -invcont589: ; preds = %cond_next567 - %tmp591 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 0 ; <i8**> [#uses=1] - %tmp592 = load i8** %tmp591 ; <i8*> [#uses=1] - %tmp59228 = ptrtoint i8* %tmp592 to i32 ; <i32> [#uses=1] - %tmp5922829 = zext i32 %tmp59228 to i64 ; <i64> [#uses=1] - %tmp594 = getelementptr %struct.string___XUP* %tmp25, i32 0, i32 1 ; <%struct.string___XUB**> [#uses=1] - %tmp595 = load %struct.string___XUB** %tmp594 ; <%struct.string___XUB*> [#uses=1] - %tmp59524 = ptrtoint %struct.string___XUB* %tmp595 to i32 ; <i32> [#uses=1] - %tmp5952425 = zext i32 %tmp59524 to i64 ; <i64> [#uses=1] - %tmp595242526 = shl i64 %tmp5952425, 32 ; <i64> [#uses=1] - %tmp595242526.ins = or i64 %tmp595242526, %tmp5922829 ; <i64> [#uses=1] - invoke fastcc void @report__put_msg( i64 %tmp595242526.ins ) - to label %cond_next618 unwind label %unwind - -cond_next618: ; preds = %invcont589, %cleanup, %invcont249, %invcont131 - store i8 1, i8* @report__test_status - store i32 7, i32* @report__test_name_len - store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 0) - store i8 79, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 1) - store i8 95, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 2) - store i8 78, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 3) - store i8 65, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 4) - store i8 77, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 5) - store i8 69, i8* getelementptr ([15 x i8]* @report__test_name, i32 0, i32 6) - %CHAIN.310.0.0.0.val5.i = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] - %CHAIN.310.0.0.0.val56.i = zext i32 %CHAIN.310.0.0.0.val5.i to i64 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val2.i = zext i32 %tmp32 to i64 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val23.i = shl i64 %CHAIN.310.0.0.1.val2.i, 32 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val23.ins.i = or i64 %CHAIN.310.0.0.1.val23.i, %CHAIN.310.0.0.0.val56.i ; <i64> [#uses=1] - call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i ) - ret void - -cleanup717: ; preds = %unwind277, %unwind - %eh_exception.0 = phi i8* [ %eh_ptr278, %unwind277 ], [ %eh_ptr, %unwind ] ; <i8*> [#uses=1] - %CHAIN.310.0.0.0.val5.i8 = ptrtoint i8* %tmp29 to i32 ; <i32> [#uses=1] - %CHAIN.310.0.0.0.val56.i9 = zext i32 %CHAIN.310.0.0.0.val5.i8 to i64 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val2.i10 = zext i32 %tmp32 to i64 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val23.i11 = shl i64 %CHAIN.310.0.0.1.val2.i10, 32 ; <i64> [#uses=1] - %CHAIN.310.0.0.1.val23.ins.i12 = or i64 %CHAIN.310.0.0.1.val23.i11, %CHAIN.310.0.0.0.val56.i9 ; <i64> [#uses=1] - call void @system__secondary_stack__ss_release( i64 %CHAIN.310.0.0.1.val23.ins.i12 ) - call i32 (...)* @_Unwind_Resume( i8* %eh_exception.0 ) ; <i32>:0 [#uses=0] - unreachable - -UnifiedUnreachableBlock: ; preds = %bb555, %cond_true497, %bb336, %cond_true276, %bb215, %cond_true157, %bb97, %cond_true43 - unreachable -} - -declare i8* @llvm.stacksave() - -declare void @llvm.stackrestore(i8*) - -declare i32 @report__ident_int(i32 %x) - -declare i8 @report__equal(i32 %x, i32 %y) - -declare i8 @report__ident_char(i8 zeroext %x) - -declare i16 @report__ident_wide_char(i16 zeroext %x) - -declare i8 @report__ident_bool(i8 %x) - -declare void @report__ident_str(%struct.string___XUP* sret %agg.result, i64 %x.0.0) - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare void @report__ident_wide_str(%struct.wide_string___XUP* sret %agg.result, i64 %x.0.0) - -declare void @__gnat_begin_handler(i8*) - -declare void @__gnat_end_handler(i8*) - -declare void @report__legal_file_name(%struct.string___XUP* sret %agg.result, i32 %x, i64 %nam.0.0) - -declare void @__gnat_rcheck_06(i8*, i32) - -declare void @system__string_ops__str_concat_cs(%struct.string___XUP* sret , i8 zeroext , i64) diff --git a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll b/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll deleted file mode 100644 index 36a97ef9c3cf0..0000000000000 --- a/test/CodeGen/X86/2007-06-05-LSR-Dominator.ll +++ /dev/null @@ -1,129 +0,0 @@ -; PR1495 -; RUN: llc < %s -march=x86 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "i686-pc-linux-gnu" - %struct.AVRational = type { i32, i32 } - %struct.FFTComplex = type { float, float } - %struct.FFTContext = type { i32, i32, i16*, %struct.FFTComplex*, %struct.FFTComplex*, void (%struct.FFTContext*, %struct.FFTComplex*)*, void (%struct.MDCTContext*, float*, float*, float*)* } - %struct.MDCTContext = type { i32, i32, float*, float*, %struct.FFTContext } - %struct.Minima = type { i32, i32, i32, i32 } - %struct.codebook_t = type { i32, i8*, i32*, i32, float, float, i32, i32, i32*, float*, float* } - %struct.floor_class_t = type { i32, i32, i32, i32* } - %struct.floor_t = type { i32, i32*, i32, %struct.floor_class_t*, i32, i32, i32, %struct.Minima* } - %struct.mapping_t = type { i32, i32*, i32*, i32*, i32, i32*, i32* } - %struct.residue_t = type { i32, i32, i32, i32, i32, i32, [8 x i8]*, [2 x float]* } - %struct.venc_context_t = type { i32, i32, [2 x i32], [2 x %struct.MDCTContext], [2 x float*], i32, float*, float*, float*, float*, float, i32, %struct.codebook_t*, i32, %struct.floor_t*, i32, %struct.residue_t*, i32, %struct.mapping_t*, i32, %struct.AVRational* } - -define fastcc i32 @put_main_header(%struct.venc_context_t* %venc, i8** %out) { -entry: - br i1 false, label %bb1820, label %bb288.bb148_crit_edge - -bb288.bb148_crit_edge: ; preds = %entry - ret i32 0 - -cond_next1712: ; preds = %bb1820.bb1680_crit_edge - ret i32 0 - -bb1817: ; preds = %bb1820.bb1680_crit_edge - br label %bb1820 - -bb1820: ; preds = %bb1817, %entry - %pb.1.50 = phi i32 [ %tmp1693, %bb1817 ], [ 8, %entry ] ; <i32> [#uses=3] - br i1 false, label %bb2093, label %bb1820.bb1680_crit_edge - -bb1820.bb1680_crit_edge: ; preds = %bb1820 - %tmp1693 = add i32 %pb.1.50, 8 ; <i32> [#uses=2] - %tmp1702 = icmp slt i32 %tmp1693, 0 ; <i1> [#uses=1] - br i1 %tmp1702, label %cond_next1712, label %bb1817 - -bb2093: ; preds = %bb1820 - %tmp2102 = add i32 %pb.1.50, 65 ; <i32> [#uses=0] - %tmp2236 = add i32 %pb.1.50, 72 ; <i32> [#uses=1] - %tmp2237 = sdiv i32 %tmp2236, 8 ; <i32> [#uses=2] - br i1 false, label %bb2543, label %bb2536.bb2396_crit_edge - -bb2536.bb2396_crit_edge: ; preds = %bb2093 - ret i32 0 - -bb2543: ; preds = %bb2093 - br i1 false, label %cond_next2576, label %bb2690 - -cond_next2576: ; preds = %bb2543 - ret i32 0 - -bb2682: ; preds = %bb2690 - ret i32 0 - -bb2690: ; preds = %bb2543 - br i1 false, label %bb2682, label %bb2698 - -bb2698: ; preds = %bb2690 - br i1 false, label %cond_next2726, label %bb2831 - -cond_next2726: ; preds = %bb2698 - ret i32 0 - -bb2831: ; preds = %bb2698 - br i1 false, label %cond_next2859, label %bb2964 - -cond_next2859: ; preds = %bb2831 - br i1 false, label %bb2943, label %cond_true2866 - -cond_true2866: ; preds = %cond_next2859 - br i1 false, label %cond_true2874, label %cond_false2897 - -cond_true2874: ; preds = %cond_true2866 - ret i32 0 - -cond_false2897: ; preds = %cond_true2866 - ret i32 0 - -bb2943: ; preds = %cond_next2859 - ret i32 0 - -bb2964: ; preds = %bb2831 - br i1 false, label %cond_next2997, label %bb4589 - -cond_next2997: ; preds = %bb2964 - ret i32 0 - -bb3103: ; preds = %bb4589 - ret i32 0 - -bb4589: ; preds = %bb2964 - br i1 false, label %bb3103, label %bb4597 - -bb4597: ; preds = %bb4589 - br i1 false, label %cond_next4630, label %bb4744 - -cond_next4630: ; preds = %bb4597 - br i1 false, label %bb4744, label %cond_true4724 - -cond_true4724: ; preds = %cond_next4630 - br i1 false, label %bb4736, label %bb7531 - -bb4736: ; preds = %cond_true4724 - ret i32 0 - -bb4744: ; preds = %cond_next4630, %bb4597 - ret i32 0 - -bb7531: ; preds = %cond_true4724 - %v_addr.023.0.i6 = add i32 %tmp2237, -255 ; <i32> [#uses=1] - br label %bb.i14 - -bb.i14: ; preds = %bb.i14, %bb7531 - %n.021.0.i8 = phi i32 [ 0, %bb7531 ], [ %indvar.next, %bb.i14 ] ; <i32> [#uses=2] - %tmp..i9 = mul i32 %n.021.0.i8, -255 ; <i32> [#uses=1] - %tmp5.i11 = add i32 %v_addr.023.0.i6, %tmp..i9 ; <i32> [#uses=1] - %tmp10.i12 = icmp ugt i32 %tmp5.i11, 254 ; <i1> [#uses=1] - %indvar.next = add i32 %n.021.0.i8, 1 ; <i32> [#uses=1] - br i1 %tmp10.i12, label %bb.i14, label %bb12.loopexit.i18 - -bb12.loopexit.i18: ; preds = %bb.i14 - call void @llvm.memcpy.i32( i8* null, i8* null, i32 %tmp2237, i32 1 ) - ret i32 0 -} - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll index 3cd8052a732c7..62624a7e34477 100644 --- a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | not grep movl -define i8 @t(i8 zeroext %x, i8 zeroext %y) zeroext { +define zeroext i8 @t(i8 zeroext %x, i8 zeroext %y) { %tmp2 = add i8 %x, 2 %tmp4 = add i8 %y, -2 %tmp5 = mul i8 %tmp4, %tmp2 diff --git a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll index e93092f355c5c..77291f063b79f 100644 --- a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll +++ b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll @@ -2,7 +2,7 @@ @X = global i32 0 ; <i32*> [#uses=1] -define i8 @_Z3fooi(i32 %x) signext { +define signext i8 @_Z3fooi(i32 %x) { entry: store i32 %x, i32* @X, align 4 %retval67 = trunc i32 %x to i8 ; <i8> [#uses=1] diff --git a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll index 1e43272a84e80..15466a18bd621 100644 --- a/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll +++ b/test/CodeGen/X86/2007-09-17-ObjcFrameEH.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i686-apple-darwin | grep {isNullOrNil].eh"} | FileCheck %s +; RUN: llc < %s -disable-cfi -march=x86 -mtriple=i686-apple-darwin | FileCheck %s ; CHECK: "_-[NSString(local) isNullOrNil].eh": @@ -26,7 +26,7 @@ [1 x %struct._objc_method] [ %struct._objc_method { %struct.objc_selector* bitcast ([12 x i8]* @"\01L_OBJC_METH_VAR_NAME_0" to %struct.objc_selector*), i8* getelementptr ([7 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0), - i8* bitcast (i8 (%struct.NSString*, %struct.objc_selector*) signext * @"-[NSString(local) isNullOrNil]" to i8*) } ] }, section "__OBJC,__cat_inst_meth,regular,no_dead_strip" ; <{ i32, i32, [1 x %struct._objc_method] }*> [#uses=3] + i8* bitcast (i8 (%struct.NSString*, %struct.objc_selector*) * @"-[NSString(local) isNullOrNil]" to i8*) } ] }, section "__OBJC,__cat_inst_meth,regular,no_dead_strip" ; <{ i32, i32, [1 x %struct._objc_method] }*> [#uses=3] @"\01L_OBJC_CATEGORY_NSString_local" = internal global { i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 } { i8* getelementptr ([6 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i8* getelementptr ([9 x i8]* @"\01L_OBJC_CLASS_NAME_1", i32 0, i32 0), @@ -51,7 +51,7 @@ @"\01L_OBJC_METH_VAR_TYPE_0" = internal global [7 x i8] c"c8@0:4\00", section "__TEXT,__cstring,cstring_literals" ; <[7 x i8]*> [#uses=2] @llvm.used = appending global [11 x i8*] [ i8* bitcast ({ i32, i32, i16, i16, [1 x %struct._objc_category*] }* @"\01L_OBJC_SYMBOLS" to i8*), i8* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01L_OBJC_CATEGORY_INSTANCE_METHODS_NSString_local" to i8*), i8* bitcast ({ i8*, i8*, %struct._objc_method_list*, i32, i32, i32, i32 }* @"\01L_OBJC_CATEGORY_NSString_local" to i8*), i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*), i8* bitcast (%struct._objc_module* @"\01L_OBJC_MODULES" to i8*), i8* bitcast (i32* @"\01.objc_category_name_NSString_local" to i8*), i8* getelementptr ([1 x i8]* @"\01L_OBJC_CLASS_NAME_2", i32 0, i32 0), i8* getelementptr ([9 x i8]* @"\01L_OBJC_CLASS_NAME_1", i32 0, i32 0), i8* getelementptr ([6 x i8]* @"\01L_OBJC_CLASS_NAME_0", i32 0, i32 0), i8* getelementptr ([12 x i8]* @"\01L_OBJC_METH_VAR_NAME_0", i32 0, i32 0), i8* getelementptr ([7 x i8]* @"\01L_OBJC_METH_VAR_TYPE_0", i32 0, i32 0) ], section "llvm.metadata" ; <[11 x i8*]*> [#uses=0] -define internal i8 @"-[NSString(local) isNullOrNil]"(%struct.NSString* %self, %struct.objc_selector* %_cmd) signext { +define internal signext i8 @"-[NSString(local) isNullOrNil]"(%struct.NSString* %self, %struct.objc_selector* %_cmd) { entry: %self_addr = alloca %struct.NSString* ; <%struct.NSString**> [#uses=1] %_cmd_addr = alloca %struct.objc_selector* ; <%struct.objc_selector**> [#uses=1] diff --git a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll index b4a986ff77f9a..f7ffb9337ef8c 100644 --- a/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll +++ b/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll @@ -22,7 +22,7 @@ entry: ; CHECK: bar: ; CHECK: fldt 4(%esp) ; CHECK-NEXT: fld %st(0) -; CHECK-NEXT: fmul %st(1), %st(0) +; CHECK-NEXT: fmul %st(1) ; CHECK-NEXT: fmulp ; CHECK-NEXT: ret } diff --git a/test/CodeGen/X86/2007-10-05-3AddrConvert.ll b/test/CodeGen/X86/2007-10-05-3AddrConvert.ll deleted file mode 100644 index 2c2706de5d3a5..0000000000000 --- a/test/CodeGen/X86/2007-10-05-3AddrConvert.ll +++ /dev/null @@ -1,48 +0,0 @@ -; RUN: llc < %s -march=x86 | grep lea - - %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] } - %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* } - %struct.node = type { i16, double, [3 x double], i32, i32 } - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2] - %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1] - br label %bb14.i - -bb14.i: ; preds = %bb14.i, %entry - %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; <i32> [#uses=1] - %2 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond74.i = icmp eq i32 %2, 32 ; <i1> [#uses=1] - br i1 %exitcond74.i, label %bb32.i, label %bb14.i - -bb32.i: ; preds = %bb32.i, %bb14.i - %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; <i32> [#uses=1] - %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; <i1> [#uses=1] - br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i - -bb.i.i: ; preds = %bb47.loopexit.i - unreachable - -stepsystem.exit.i: ; preds = %bb47.loopexit.i - store %struct.node* null, %struct.node** %1, align 4 - br label %bb.i6.i - -bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i - %tmp.0.i.i = add i32 0, -1 ; <i32> [#uses=1] - %3 = icmp slt i32 %tmp.0.i.i, 0 ; <i1> [#uses=1] - br i1 %3, label %bb107.i.i, label %bb.i6.i - -bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i - %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %4, %bb.i6.i ] ; <%struct.bnode**> [#uses=1] - %q_addr.0.i.i = load %struct.bnode** %q_addr.0.i.i.in ; <%struct.bnode*> [#uses=1] - %q_addr.1 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 1 - store %struct.bnode* %q_addr.0.i.i, %struct.bnode** %q_addr.1, align 4 - br label %bb107.i.i - -bb47.loopexit.i: ; preds = %bb32.i - %4 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1] - %5 = icmp eq %struct.node* null, null ; <i1> [#uses=1] - br i1 %5, label %stepsystem.exit.i, label %bb.i.i -} diff --git a/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll index db13fde9f6776..8091bd1bc1ca0 100644 --- a/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll +++ b/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | not grep movb -define i16 @f(i32* %bp, i32* %ss) signext { +define signext i16 @f(i32* %bp, i32* %ss) { entry: br label %cond_next127 diff --git a/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll index a3872ad47e981..7a3d72dd4b07a 100644 --- a/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll +++ b/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | grep sarl | not grep esp -define i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) signext { +define signext i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) { entry: br label %cond_next127 diff --git a/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll index 1e4ae84645869..2b56b4ea71298 100644 --- a/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll +++ b/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll @@ -362,7 +362,7 @@ bb1159: ; preds = %cond_next1150 cond_true1169: ; preds = %bb1159 %tmp11741175 = trunc i64 %lsum.11225.0 to i32 ; <i32> [#uses=1] - %tmp1178 = tail call i32 (%struct._IO_FILE* noalias , i8* noalias , ...)* @fprintf( %struct._IO_FILE* %file noalias , i8* getelementptr ([49 x i8]* @.str32, i32 0, i64 0) noalias , i32 %tmp11741175, i32 0 ) ; <i32> [#uses=0] + %tmp1178 = tail call i32 (%struct._IO_FILE* , i8* , ...)* @fprintf( %struct._IO_FILE* noalias %file , i8* getelementptr ([49 x i8]* @.str32, i32 0, i64 0) , i32 %tmp11741175, i32 0 ) ; <i32> [#uses=0] ret void UnifiedReturnBlock: ; preds = %bb1159 @@ -379,9 +379,9 @@ declare i32 @reg_preferred_class(i32) declare i32 @reg_alternate_class(i32) -declare i8 @maybe_hot_bb_p(%struct.basic_block_def*) zeroext +declare zeroext i8 @maybe_hot_bb_p(%struct.basic_block_def*) -declare i8 @probably_never_executed_bb_p(%struct.basic_block_def*) zeroext +declare zeroext i8 @probably_never_executed_bb_p(%struct.basic_block_def*) declare void @dump_regset(%struct.bitmap_head_def*, %struct._IO_FILE*) diff --git a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index 600bd1f178497..d3120f3e0ef7c 100644 --- a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR -define i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) signext { +define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) { entry: br label %bb diff --git a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll index 86d3bbf4f4e3b..573a2177b74eb 100644 --- a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll +++ b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | grep mov | count 1 -define i16 @t() signext { +define signext i16 @t() { entry: %tmp180 = load i16* null, align 2 ; <i16> [#uses=3] %tmp180181 = sext i16 %tmp180 to i32 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2007-11-02-BadAsm.ll b/test/CodeGen/X86/2007-11-02-BadAsm.ll deleted file mode 100644 index 4e11cda92e6d3..0000000000000 --- a/test/CodeGen/X86/2007-11-02-BadAsm.ll +++ /dev/null @@ -1,144 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movl | not grep rax - - %struct.color_sample = type { i64 } - %struct.gs_matrix = type { float, i64, float, i64, float, i64, float, i64, float, i64, float, i64 } - %struct.ref = type { %struct.color_sample, i16, i16 } - %struct.status = type { %struct.gs_matrix, i8*, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32 } - -define i32 @ztype1imagepath(%struct.ref* %op) { -entry: - br i1 false, label %cond_next, label %UnifiedReturnBlock - -cond_next: ; preds = %entry - br i1 false, label %cond_next68, label %UnifiedReturnBlock - -cond_next68: ; preds = %cond_next - %tmp5.i.i = malloc i8, i32 0 ; <i8*> [#uses=2] - br i1 false, label %bb81.outer.i, label %xit.i - -bb81.outer.i: ; preds = %bb87.i, %cond_next68 - %tmp67.i = add i32 0, 1 ; <i32> [#uses=1] - br label %bb81.i - -bb61.i: ; preds = %bb81.i - %tmp71.i = getelementptr i8* %tmp5.i.i, i64 0 ; <i8*> [#uses=1] - %tmp72.i = load i8* %tmp71.i, align 1 ; <i8> [#uses=1] - %tmp73.i = icmp eq i8 %tmp72.i, 0 ; <i1> [#uses=1] - br i1 %tmp73.i, label %bb81.i, label %xit.i - -bb81.i: ; preds = %bb61.i, %bb81.outer.i - br i1 false, label %bb87.i, label %bb61.i - -bb87.i: ; preds = %bb81.i - br i1 false, label %bb81.outer.i, label %xit.i - -xit.i: ; preds = %bb87.i, %bb61.i, %cond_next68 - %lsbx.0.reg2mem.1.i = phi i32 [ 0, %cond_next68 ], [ 0, %bb61.i ], [ %tmp67.i, %bb87.i ] ; <i32> [#uses=1] - %tmp6162.i.i = fptrunc double 0.000000e+00 to float ; <float> [#uses=1] - %tmp67.i15.i = fptrunc double 0.000000e+00 to float ; <float> [#uses=1] - %tmp24.i27.i = icmp eq i64 0, 0 ; <i1> [#uses=1] - br i1 %tmp24.i27.i, label %cond_next.i79.i, label %cond_true.i34.i - -cond_true.i34.i: ; preds = %xit.i - ret i32 0 - -cond_next.i79.i: ; preds = %xit.i - %phitmp167.i = fptosi double 0.000000e+00 to i64 ; <i64> [#uses=1] - %tmp142143.i = fpext float %tmp6162.i.i to double ; <double> [#uses=1] - %tmp2.i139.i = fadd double %tmp142143.i, 5.000000e-01 ; <double> [#uses=1] - %tmp23.i140.i = fptosi double %tmp2.i139.i to i64 ; <i64> [#uses=1] - br i1 false, label %cond_true.i143.i, label %round_coord.exit148.i - -cond_true.i143.i: ; preds = %cond_next.i79.i - %tmp8.i142.i = icmp sgt i64 %tmp23.i140.i, -32768 ; <i1> [#uses=1] - br i1 %tmp8.i142.i, label %cond_true11.i145.i, label %round_coord.exit148.i - -cond_true11.i145.i: ; preds = %cond_true.i143.i - ret i32 0 - -round_coord.exit148.i: ; preds = %cond_true.i143.i, %cond_next.i79.i - %tmp144149.i = phi i32 [ 32767, %cond_next.i79.i ], [ -32767, %cond_true.i143.i ] ; <i32> [#uses=1] - store i32 %tmp144149.i, i32* null, align 8 - %tmp147148.i = fpext float %tmp67.i15.i to double ; <double> [#uses=1] - %tmp2.i128.i = fadd double %tmp147148.i, 5.000000e-01 ; <double> [#uses=1] - %tmp23.i129.i = fptosi double %tmp2.i128.i to i64 ; <i64> [#uses=2] - %tmp5.i130.i = icmp slt i64 %tmp23.i129.i, 32768 ; <i1> [#uses=1] - br i1 %tmp5.i130.i, label %cond_true.i132.i, label %round_coord.exit137.i - -cond_true.i132.i: ; preds = %round_coord.exit148.i - %tmp8.i131.i = icmp sgt i64 %tmp23.i129.i, -32768 ; <i1> [#uses=1] - br i1 %tmp8.i131.i, label %cond_true11.i134.i, label %round_coord.exit137.i - -cond_true11.i134.i: ; preds = %cond_true.i132.i - br label %round_coord.exit137.i - -round_coord.exit137.i: ; preds = %cond_true11.i134.i, %cond_true.i132.i, %round_coord.exit148.i - %tmp149138.i = phi i32 [ 0, %cond_true11.i134.i ], [ 32767, %round_coord.exit148.i ], [ -32767, %cond_true.i132.i ] ; <i32> [#uses=1] - br i1 false, label %cond_true.i121.i, label %round_coord.exit126.i - -cond_true.i121.i: ; preds = %round_coord.exit137.i - br i1 false, label %cond_true11.i123.i, label %round_coord.exit126.i - -cond_true11.i123.i: ; preds = %cond_true.i121.i - br label %round_coord.exit126.i - -round_coord.exit126.i: ; preds = %cond_true11.i123.i, %cond_true.i121.i, %round_coord.exit137.i - %tmp153127.i = phi i32 [ 0, %cond_true11.i123.i ], [ 32767, %round_coord.exit137.i ], [ -32767, %cond_true.i121.i ] ; <i32> [#uses=1] - br i1 false, label %cond_true.i110.i, label %round_coord.exit115.i - -cond_true.i110.i: ; preds = %round_coord.exit126.i - br i1 false, label %cond_true11.i112.i, label %round_coord.exit115.i - -cond_true11.i112.i: ; preds = %cond_true.i110.i - br label %round_coord.exit115.i - -round_coord.exit115.i: ; preds = %cond_true11.i112.i, %cond_true.i110.i, %round_coord.exit126.i - %tmp157116.i = phi i32 [ 0, %cond_true11.i112.i ], [ 32767, %round_coord.exit126.i ], [ -32767, %cond_true.i110.i ] ; <i32> [#uses=2] - br i1 false, label %cond_true.i99.i, label %round_coord.exit104.i - -cond_true.i99.i: ; preds = %round_coord.exit115.i - br i1 false, label %cond_true11.i101.i, label %round_coord.exit104.i - -cond_true11.i101.i: ; preds = %cond_true.i99.i - %tmp1213.i100.i = trunc i64 %phitmp167.i to i32 ; <i32> [#uses=1] - br label %cond_next172.i - -round_coord.exit104.i: ; preds = %cond_true.i99.i, %round_coord.exit115.i - %UnifiedRetVal.i102.i = phi i32 [ 32767, %round_coord.exit115.i ], [ -32767, %cond_true.i99.i ] ; <i32> [#uses=1] - %tmp164.i = call fastcc i32 @put_int( %struct.status* null, i32 %tmp157116.i ) ; <i32> [#uses=0] - br label %cond_next172.i - -cond_next172.i: ; preds = %round_coord.exit104.i, %cond_true11.i101.i - %tmp161105.reg2mem.0.i = phi i32 [ %tmp1213.i100.i, %cond_true11.i101.i ], [ %UnifiedRetVal.i102.i, %round_coord.exit104.i ] ; <i32> [#uses=1] - %tmp174.i = icmp eq i32 %tmp153127.i, 0 ; <i1> [#uses=1] - %bothcond.i = and i1 false, %tmp174.i ; <i1> [#uses=1] - %tmp235.i = call fastcc i32 @put_int( %struct.status* null, i32 %tmp149138.i ) ; <i32> [#uses=0] - %tmp245.i = load i8** null, align 8 ; <i8*> [#uses=2] - %tmp246.i = getelementptr i8* %tmp245.i, i64 1 ; <i8*> [#uses=1] - br i1 %bothcond.i, label %cond_next254.i, label %bb259.i - -cond_next254.i: ; preds = %cond_next172.i - store i8 13, i8* %tmp245.i, align 1 - br label %bb259.i - -bb259.i: ; preds = %cond_next254.i, %cond_next172.i - %storemerge.i = phi i8* [ %tmp246.i, %cond_next254.i ], [ null, %cond_next172.i ] ; <i8*> [#uses=0] - %tmp261.i = shl i32 %lsbx.0.reg2mem.1.i, 2 ; <i32> [#uses=1] - store i32 %tmp261.i, i32* null, align 8 - %tmp270.i = add i32 0, %tmp157116.i ; <i32> [#uses=1] - store i32 %tmp270.i, i32* null, align 8 - %tmp275.i = add i32 0, %tmp161105.reg2mem.0.i ; <i32> [#uses=0] - br i1 false, label %trace_cells.exit.i, label %bb.preheader.i.i - -bb.preheader.i.i: ; preds = %bb259.i - ret i32 0 - -trace_cells.exit.i: ; preds = %bb259.i - free i8* %tmp5.i.i - ret i32 0 - -UnifiedReturnBlock: ; preds = %cond_next, %entry - ret i32 -20 -} - -declare fastcc i32 @put_int(%struct.status*, i32) diff --git a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll b/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll deleted file mode 100644 index ca995cc3f65e4..0000000000000 --- a/test/CodeGen/X86/2007-12-11-FoldImpDefSpill.ll +++ /dev/null @@ -1,680 +0,0 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin | not grep IMPLICIT_DEF - - %struct.__sbuf = type { i8*, i32 } - %struct.ggBRDF = type { i32 (...)** } - %"struct.ggBST<ggMaterial>" = type { %"struct.ggBSTNode<ggMaterial>"*, i32 } - %"struct.ggBST<ggRasterSurfaceTexture>" = type { %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, i32 } - %"struct.ggBST<ggSolidTexture>" = type { %"struct.ggBSTNode<ggSolidTexture>"*, i32 } - %"struct.ggBST<ggSpectrum>" = type { %"struct.ggBSTNode<ggSpectrum>"*, i32 } - %"struct.ggBST<mrObjectRecord>" = type { %"struct.ggBSTNode<mrObjectRecord>"*, i32 } - %"struct.ggBSTNode<ggMaterial>" = type { %"struct.ggBSTNode<ggMaterial>"*, %"struct.ggBSTNode<ggMaterial>"*, %struct.ggString, %struct.ggMaterial* } - %"struct.ggBSTNode<ggRasterSurfaceTexture>" = type { %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, %"struct.ggBSTNode<ggRasterSurfaceTexture>"*, %struct.ggString, %struct.ggRasterSurfaceTexture* } - %"struct.ggBSTNode<ggSolidTexture>" = type { %"struct.ggBSTNode<ggSolidTexture>"*, %"struct.ggBSTNode<ggSolidTexture>"*, %struct.ggString, %struct.ggBRDF* } - %"struct.ggBSTNode<ggSpectrum>" = type { %"struct.ggBSTNode<ggSpectrum>"*, %"struct.ggBSTNode<ggSpectrum>"*, %struct.ggString, %struct.ggSpectrum* } - %"struct.ggBSTNode<mrObjectRecord>" = type { %"struct.ggBSTNode<mrObjectRecord>"*, %"struct.ggBSTNode<mrObjectRecord>"*, %struct.ggString, %struct.mrObjectRecord* } - %"struct.ggDictionary<ggMaterial>" = type { %"struct.ggBST<ggMaterial>" } - %"struct.ggDictionary<ggRasterSurfaceTexture>" = type { %"struct.ggBST<ggRasterSurfaceTexture>" } - %"struct.ggDictionary<ggSolidTexture>" = type { %"struct.ggBST<ggSolidTexture>" } - %"struct.ggDictionary<ggSpectrum>" = type { %"struct.ggBST<ggSpectrum>" } - %"struct.ggDictionary<mrObjectRecord>" = type { %"struct.ggBST<mrObjectRecord>" } - %struct.ggHAffineMatrix3 = type { %struct.ggHMatrix3 } - %struct.ggHBoxMatrix3 = type { %struct.ggHAffineMatrix3 } - %struct.ggHMatrix3 = type { [4 x [4 x double]] } - %struct.ggMaterial = type { i32 (...)**, %struct.ggBRDF* } - %struct.ggPoint3 = type { [3 x double] } - %"struct.ggRGBPixel<char>" = type { [3 x i8], i8 } - %"struct.ggRaster<ggRGBPixel<unsigned char> >" = type { i32, i32, %"struct.ggRGBPixel<char>"* } - %struct.ggRasterSurfaceTexture = type { %"struct.ggRaster<ggRGBPixel<unsigned char> >"* } - %struct.ggSolidNoise3 = type { i32, [256 x %struct.ggPoint3], [256 x i32] } - %struct.ggSpectrum = type { [8 x float] } - %struct.ggString = type { %"struct.ggString::StringRep"* } - %"struct.ggString::StringRep" = type { i32, i32, [1 x i8] } - %"struct.ggTrain<mrPixelRenderer*>" = type { %struct.ggBRDF**, i32, i32 } - %struct.mrObjectRecord = type { %struct.ggHBoxMatrix3, %struct.ggHBoxMatrix3, %struct.mrSurfaceList, %struct.ggMaterial*, i32, %struct.ggRasterSurfaceTexture*, %struct.ggBRDF*, i32, i32 } - %struct.mrScene = type { %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, %struct.ggBRDF*, %struct.ggBRDF*, i32, double, %"struct.ggDictionary<mrObjectRecord>", %"struct.ggDictionary<ggRasterSurfaceTexture>", %"struct.ggDictionary<ggSolidTexture>", %"struct.ggDictionary<ggSpectrum>", %"struct.ggDictionary<ggMaterial>" } - %struct.mrSurfaceList = type { %struct.ggBRDF, %"struct.ggTrain<mrPixelRenderer*>" } - %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>" = type { %"struct.std::locale::facet" } - %"struct.std::basic_ios<char,std::char_traits<char> >" = type { %"struct.std::ios_base", %"struct.std::basic_ostream<char,std::char_traits<char> >"*, i8, i8, %"struct.std::basic_streambuf<char,std::char_traits<char> >"*, %"struct.std::ctype<char>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"*, %"struct.std::__codecvt_abstract_base<char,char,__mbstate_t>"* } - %"struct.std::basic_istream<char,std::char_traits<char> >" = type { i32 (...)**, i32, %"struct.std::basic_ios<char,std::char_traits<char> >" } - %"struct.std::basic_ostream<char,std::char_traits<char> >" = type { i32 (...)**, %"struct.std::basic_ios<char,std::char_traits<char> >" } - %"struct.std::basic_streambuf<char,std::char_traits<char> >" = type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %"struct.std::locale" } - %"struct.std::ctype<char>" = type { %"struct.std::locale::facet", i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } - %"struct.std::ios_base" = type { i32 (...)**, i32, i32, i32, i32, i32, %"struct.std::ios_base::_Callback_list"*, %struct.__sbuf, [8 x %struct.__sbuf], i32, %struct.__sbuf*, %"struct.std::locale" } - %"struct.std::ios_base::_Callback_list" = type { %"struct.std::ios_base::_Callback_list"*, void (i32, %"struct.std::ios_base"*, i32)*, i32, i32 } - %"struct.std::locale" = type { %"struct.std::locale::_Impl"* } - %"struct.std::locale::_Impl" = type { i32, %"struct.std::locale::facet"**, i32, %"struct.std::locale::facet"**, i8** } - %"struct.std::locale::facet" = type { i32 (...)**, i32 } -@.str80 = external constant [7 x i8] ; <[7 x i8]*> [#uses=1] -@.str81 = external constant [11 x i8] ; <[11 x i8]*> [#uses=1] - -define fastcc void @_ZN7mrScene4ReadERSi(%struct.mrScene* %this, %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces) { -entry: - %tmp6.i.i8288 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit unwind label %lpad ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit: ; preds = %entry - %tmp6.i.i8995 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit96 unwind label %lpad3825 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit96: ; preds = %_ZN8ggStringC1Ei.exit - %tmp6.i.i97103 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit104 unwind label %lpad3829 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit104: ; preds = %_ZN8ggStringC1Ei.exit96 - %tmp6.i.i105111 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit112 unwind label %lpad3833 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit112: ; preds = %_ZN8ggStringC1Ei.exit104 - %tmp6.i.i122128 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit129 unwind label %lpad3837 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit129: ; preds = %_ZN8ggStringC1Ei.exit112 - %tmp6.i.i132138 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit139 unwind label %lpad3841 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit139: ; preds = %_ZN8ggStringC1Ei.exit129 - %tmp295 = invoke i8* @_Znwm( i32 16 ) - to label %invcont294 unwind label %lpad3845 ; <i8*> [#uses=0] - -invcont294: ; preds = %_ZN8ggStringC1Ei.exit139 - %tmp10.i.i141 = invoke i8* @_Znam( i32 16 ) - to label %_ZN13mrSurfaceListC1Ev.exit unwind label %lpad3849 ; <i8*> [#uses=0] - -_ZN13mrSurfaceListC1Ev.exit: ; preds = %invcont294 - %tmp3.i148 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i.noexc: ; preds = %_ZN13mrSurfaceListC1Ev.exit - %tmp15.i149 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i.noexc: ; preds = %tmp3.i.noexc - br i1 false, label %bb308, label %bb.i - -bb.i: ; preds = %tmp15.i.noexc - ret void - -bb308: ; preds = %tmp15.i.noexc - br i1 false, label %bb3743.preheader, label %bb315 - -bb3743.preheader: ; preds = %bb308 - %tmp16.i3862 = getelementptr %struct.ggPoint3* null, i32 0, i32 0, i32 0 ; <double*> [#uses=1] - %tmp16.i3859 = getelementptr %struct.ggPoint3* null, i32 0, i32 0, i32 0 ; <double*> [#uses=3] - br label %bb3743 - -bb315: ; preds = %bb308 - ret void - -bb333: ; preds = %invcont3758, %invcont335 - %tmp3.i167180 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i167.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i167.noexc: ; preds = %bb333 - %tmp15.i182 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i.noexc181 unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i.noexc181: ; preds = %tmp3.i167.noexc - br i1 false, label %invcont335, label %bb.i178 - -bb.i178: ; preds = %tmp15.i.noexc181 - ret void - -invcont335: ; preds = %tmp15.i.noexc181 - br i1 false, label %bb3743, label %bb333 - -bb345: ; preds = %invcont3758 - br i1 false, label %bb353, label %bb360 - -bb353: ; preds = %bb345 - %tmp356 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %bb3743 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -bb360: ; preds = %bb345 - br i1 false, label %bb368, label %bb374 - -bb368: ; preds = %bb360 - %tmp373 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %bb3743 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -bb374: ; preds = %bb360 - br i1 false, label %bb396, label %bb421 - -bb396: ; preds = %bb374 - ret void - -bb421: ; preds = %bb374 - br i1 false, label %bb429, label %bb530 - -bb429: ; preds = %bb421 - ret void - -bb530: ; preds = %bb421 - br i1 false, label %bb538, label %bb673 - -bb538: ; preds = %bb530 - ret void - -bb673: ; preds = %bb530 - br i1 false, label %bb681, label %bb778 - -bb681: ; preds = %bb673 - ret void - -bb778: ; preds = %bb673 - br i1 false, label %bb786, label %bb891 - -bb786: ; preds = %bb778 - ret void - -bb891: ; preds = %bb778 - br i1 false, label %bb899, label %bb998 - -bb899: ; preds = %bb891 - ret void - -bb998: ; preds = %bb891 - br i1 false, label %bb1168, label %bb1190 - -bb1168: ; preds = %bb998 - ret void - -bb1190: ; preds = %bb998 - br i1 false, label %bb1198, label %bb1220 - -bb1198: ; preds = %bb1190 - ret void - -bb1220: ; preds = %bb1190 - br i1 false, label %bb1228, label %bb1250 - -bb1228: ; preds = %bb1220 - ret void - -bb1250: ; preds = %bb1220 - br i1 false, label %bb1258, label %bb1303 - -bb1258: ; preds = %bb1250 - ret void - -bb1303: ; preds = %bb1250 - br i1 false, label %bb1311, label %bb1366 - -bb1311: ; preds = %bb1303 - ret void - -bb1366: ; preds = %bb1303 - br i1 false, label %bb1374, label %bb1432 - -bb1374: ; preds = %bb1366 - ret void - -bb1432: ; preds = %bb1366 - br i1 false, label %bb1440, label %bb1495 - -bb1440: ; preds = %bb1432 - ret void - -bb1495: ; preds = %bb1432 - br i1 false, label %bb1503, label %bb1561 - -bb1503: ; preds = %bb1495 - ret void - -bb1561: ; preds = %bb1495 - br i1 false, label %bb1569, label %bb1624 - -bb1569: ; preds = %bb1561 - ret void - -bb1624: ; preds = %bb1561 - br i1 false, label %bb1632, label %bb1654 - -bb1632: ; preds = %bb1624 - store double 0.000000e+00, double* %tmp16.i3859, align 8 - %tmp3.i38383852 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3838.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3838.noexc: ; preds = %bb1632 - %tmp15.i38473853 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3847.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3847.noexc: ; preds = %tmp3.i3838.noexc - br i1 false, label %invcont1634, label %bb.i3850 - -bb.i3850: ; preds = %tmp15.i3847.noexc - ret void - -invcont1634: ; preds = %tmp15.i3847.noexc - %tmp3.i38173831 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3817.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3817.noexc: ; preds = %invcont1634 - %tmp15.i38263832 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3826.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3826.noexc: ; preds = %tmp3.i3817.noexc - br i1 false, label %invcont1636, label %bb.i3829 - -bb.i3829: ; preds = %tmp15.i3826.noexc - ret void - -invcont1636: ; preds = %tmp15.i3826.noexc - %tmp8.i38083811 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* %tmp16.i3862 ) - to label %tmp8.i3808.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp8.i3808.noexc: ; preds = %invcont1636 - %tmp9.i38093812 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i38083811, double* null ) - to label %tmp9.i3809.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp9.i3809.noexc: ; preds = %tmp8.i3808.noexc - %tmp10.i38103813 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i38093812, double* null ) - to label %invcont1638 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont1638: ; preds = %tmp9.i3809.noexc - %tmp8.i37983801 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* %tmp16.i3859 ) - to label %tmp8.i3798.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp8.i3798.noexc: ; preds = %invcont1638 - %tmp9.i37993802 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i37983801, double* null ) - to label %tmp9.i3799.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp9.i3799.noexc: ; preds = %tmp8.i3798.noexc - %tmp10.i38003803 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i37993802, double* null ) - to label %invcont1640 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont1640: ; preds = %tmp9.i3799.noexc - %tmp3.i3778 = load double* %tmp16.i3859, align 8 ; <double> [#uses=1] - %tmp1643 = invoke i8* @_Znwm( i32 76 ) - to label %invcont1642 unwind label %lpad3845 ; <i8*> [#uses=0] - -invcont1642: ; preds = %invcont1640 - %tmp18.i3770 = fsub double %tmp3.i3778, 0.000000e+00 ; <double> [#uses=0] - invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 ) - to label %bb3743 unwind label %lpad3845 - -bb1654: ; preds = %bb1624 - br i1 false, label %bb1662, label %bb1693 - -bb1662: ; preds = %bb1654 - %tmp3.i37143728 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3714.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3714.noexc: ; preds = %bb1662 - %tmp15.i37233729 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3723.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3723.noexc: ; preds = %tmp3.i3714.noexc - ret void - -bb1693: ; preds = %bb1654 - br i1 false, label %bb1701, label %bb1745 - -bb1701: ; preds = %bb1693 - %tmp3.i36493663 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3649.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3649.noexc: ; preds = %bb1701 - ret void - -bb1745: ; preds = %bb1693 - br i1 false, label %bb1753, label %bb1797 - -bb1753: ; preds = %bb1745 - ret void - -bb1797: ; preds = %bb1745 - br i1 false, label %bb1805, label %bb1847 - -bb1805: ; preds = %bb1797 - ret void - -bb1847: ; preds = %bb1797 - br i1 false, label %bb1855, label %bb1897 - -bb1855: ; preds = %bb1847 - %tmp3.i34633477 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3463.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3463.noexc: ; preds = %bb1855 - %tmp15.i34723478 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3472.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3472.noexc: ; preds = %tmp3.i3463.noexc - br i1 false, label %invcont1857, label %bb.i3475 - -bb.i3475: ; preds = %tmp15.i3472.noexc - invoke fastcc void @_ZN8ggStringaSEPKc( %struct.ggString* null, i8* null ) - to label %invcont1857 unwind label %lpad3845 - -invcont1857: ; preds = %bb.i3475, %tmp15.i3472.noexc - %tmp1860 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %invcont1859 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont1859: ; preds = %invcont1857 - %tmp1862 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1860, double* null ) - to label %invcont1861 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont1861: ; preds = %invcont1859 - %tmp1864 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1862, double* null ) - to label %invcont1863 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont1863: ; preds = %invcont1861 - %tmp1866 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1864, double* null ) - to label %invcont1865 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont1865: ; preds = %invcont1863 - %tmp1868 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp1866, double* null ) - to label %invcont1867 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont1867: ; preds = %invcont1865 - %tmp1881 = invoke i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) zeroext - to label %invcont1880 unwind label %lpad3845 ; <i8> [#uses=0] - -invcont1880: ; preds = %invcont1867 - %tmp1883 = invoke i8* @_Znwm( i32 24 ) - to label %invcont1882 unwind label %lpad3845 ; <i8*> [#uses=0] - -invcont1882: ; preds = %invcont1880 - invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 ) - to label %bb3743 unwind label %lpad3845 - -bb1897: ; preds = %bb1847 - br i1 false, label %bb1905, label %bb1947 - -bb1905: ; preds = %bb1897 - ret void - -bb1947: ; preds = %bb1897 - br i1 false, label %bb1955, label %bb2000 - -bb1955: ; preds = %bb1947 - ret void - -bb2000: ; preds = %bb1947 - br i1 false, label %bb2008, label %bb2053 - -bb2008: ; preds = %bb2000 - ret void - -bb2053: ; preds = %bb2000 - br i1 false, label %bb2061, label %bb2106 - -bb2061: ; preds = %bb2053 - %tmp3.i32433257 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3243.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3243.noexc: ; preds = %bb2061 - %tmp15.i32523258 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %bb.i3255 unwind label %lpad3845 ; <i8*> [#uses=0] - -bb.i3255: ; preds = %tmp3.i3243.noexc - invoke fastcc void @_ZN8ggStringaSEPKc( %struct.ggString* null, i8* null ) - to label %invcont2063 unwind label %lpad3845 - -invcont2063: ; preds = %bb.i3255 - ret void - -bb2106: ; preds = %bb2053 - %tmp7.i3214 = call i32 @strcmp( i8* %tmp5.i161, i8* getelementptr ([7 x i8]* @.str80, i32 0, i32 0) ) nounwind readonly ; <i32> [#uses=0] - br i1 false, label %bb2114, label %bb2136 - -bb2114: ; preds = %bb2106 - %tmp3.i31923206 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3192.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3192.noexc: ; preds = %bb2114 - %tmp15.i32013207 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3201.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3201.noexc: ; preds = %tmp3.i3192.noexc - br i1 false, label %invcont2116, label %bb.i3204 - -bb.i3204: ; preds = %tmp15.i3201.noexc - ret void - -invcont2116: ; preds = %tmp15.i3201.noexc - %tmp3.i31713185 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3171.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3171.noexc: ; preds = %invcont2116 - %tmp15.i31803186 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3180.noexc unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i3180.noexc: ; preds = %tmp3.i3171.noexc - br i1 false, label %invcont2118, label %bb.i3183 - -bb.i3183: ; preds = %tmp15.i3180.noexc - ret void - -invcont2118: ; preds = %tmp15.i3180.noexc - %tmp8.i31623165 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %tmp8.i3162.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp8.i3162.noexc: ; preds = %invcont2118 - %tmp9.i31633166 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp8.i31623165, double* null ) - to label %tmp9.i3163.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -tmp9.i3163.noexc: ; preds = %tmp8.i3162.noexc - %tmp10.i31643167 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp9.i31633166, double* null ) - to label %invcont2120 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont2120: ; preds = %tmp9.i3163.noexc - %tmp2123 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %invcont2122 unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont2122: ; preds = %invcont2120 - %tmp2125 = invoke i8* @_Znwm( i32 36 ) - to label %invcont2124 unwind label %lpad3845 ; <i8*> [#uses=0] - -invcont2124: ; preds = %invcont2122 - invoke fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i( %struct.mrScene* %this, %struct.ggBRDF* null, %struct.ggString* null, %struct.ggString* null, i32 0 ) - to label %bb3743 unwind label %lpad3845 - -bb2136: ; preds = %bb2106 - %tmp7.i3128 = call i32 @strcmp( i8* %tmp5.i161, i8* getelementptr ([11 x i8]* @.str81, i32 0, i32 0) ) nounwind readonly ; <i32> [#uses=0] - br i1 false, label %bb2144, label %bb3336 - -bb2144: ; preds = %bb2136 - %tmp6.i.i31173123 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit3124 unwind label %lpad3845 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit3124: ; preds = %bb2144 - %tmp3.i30983112 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i3098.noexc unwind label %lpad3921 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i3098.noexc: ; preds = %_ZN8ggStringC1Ei.exit3124 - %tmp15.i31073113 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i3107.noexc unwind label %lpad3921 ; <i8*> [#uses=0] - -tmp15.i3107.noexc: ; preds = %tmp3.i3098.noexc - br i1 false, label %invcont2147, label %bb.i3110 - -bb.i3110: ; preds = %tmp15.i3107.noexc - ret void - -invcont2147: ; preds = %tmp15.i3107.noexc - %tmp2161 = invoke i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) zeroext - to label %invcont2160 unwind label %lpad3921 ; <i8> [#uses=0] - -invcont2160: ; preds = %invcont2147 - %tmp4.i30933094 = invoke fastcc %struct.ggSpectrum* @_ZN5ggBSTI10ggSpectrumE4findERK8ggString3( %"struct.ggBSTNode<ggSpectrum>"* null, %struct.ggString* null ) - to label %invcont2164 unwind label %lpad3921 ; <%struct.ggSpectrum*> [#uses=0] - -invcont2164: ; preds = %invcont2160 - br i1 false, label %bb2170, label %bb2181 - -bb2170: ; preds = %invcont2164 - ret void - -bb2181: ; preds = %invcont2164 - invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null ) - to label %bb3743 unwind label %lpad3845 - -bb3336: ; preds = %bb2136 - br i1 false, label %bb3344, label %bb3734 - -bb3344: ; preds = %bb3336 - %tmp6.i.i773779 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit780 unwind label %lpad3845 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit780: ; preds = %bb3344 - %tmp6.i.i765771 = invoke i8* @_Znam( i32 12 ) - to label %_ZN8ggStringC1Ei.exit772 unwind label %lpad4025 ; <i8*> [#uses=0] - -_ZN8ggStringC1Ei.exit772: ; preds = %_ZN8ggStringC1Ei.exit780 - %tmp3.i746760 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i746.noexc unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i746.noexc: ; preds = %_ZN8ggStringC1Ei.exit772 - %tmp15.i755761 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i755.noexc unwind label %lpad4029 ; <i8*> [#uses=0] - -tmp15.i755.noexc: ; preds = %tmp3.i746.noexc - br i1 false, label %invcont3348, label %bb.i758 - -bb.i758: ; preds = %tmp15.i755.noexc - ret void - -invcont3348: ; preds = %tmp15.i755.noexc - %tmp3.i726740 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i726.noexc unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i726.noexc: ; preds = %invcont3348 - %tmp15.i735741 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i735.noexc unwind label %lpad4029 ; <i8*> [#uses=0] - -tmp15.i735.noexc: ; preds = %tmp3.i726.noexc - br i1 false, label %bb3458, label %bb.i738 - -bb.i738: ; preds = %tmp15.i735.noexc - ret void - -bb3458: ; preds = %tmp15.i735.noexc - br i1 false, label %bb3466, label %bb3491 - -bb3466: ; preds = %bb3458 - %tmp3469 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, double* null ) - to label %invcont3468 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont3468: ; preds = %bb3466 - %tmp3471 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp3469, double* null ) - to label %invcont3470 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=1] - -invcont3470: ; preds = %invcont3468 - %tmp3473 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERi( %"struct.std::basic_istream<char,std::char_traits<char> >"* %tmp3471, i32* null ) - to label %invcont3472 unwind label %lpad4029 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -invcont3472: ; preds = %invcont3470 - %tmp3475 = invoke i8* @_Znwm( i32 7196 ) - to label %invcont3474 unwind label %lpad4029 ; <i8*> [#uses=1] - -invcont3474: ; preds = %invcont3472 - invoke fastcc void @_ZN13ggSolidNoise3C1Ev( %struct.ggSolidNoise3* null ) - to label %_ZN22ggCoverageSolidTextureC1Eddi.exit unwind label %lpad4045 - -_ZN22ggCoverageSolidTextureC1Eddi.exit: ; preds = %invcont3474 - %tmp34823483 = bitcast i8* %tmp3475 to %struct.ggBRDF* ; <%struct.ggBRDF*> [#uses=2] - invoke fastcc void @_ZN5ggBSTI14ggSolidTextureE17InsertIntoSubtreeERK8ggStringPS0_RP9ggBSTNodeIS0_E( %"struct.ggBST<ggSolidTexture>"* null, %struct.ggString* null, %struct.ggBRDF* %tmp34823483, %"struct.ggBSTNode<ggSolidTexture>"** null ) - to label %bb3662 unwind label %lpad4029 - -bb3491: ; preds = %bb3458 - ret void - -bb3662: ; preds = %_ZN22ggCoverageSolidTextureC1Eddi.exit - invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null ) - to label %invcont3663 unwind label %lpad4025 - -invcont3663: ; preds = %bb3662 - invoke fastcc void @_ZN8ggStringD1Ev( %struct.ggString* null ) - to label %bb3743 unwind label %lpad3845 - -bb3734: ; preds = %bb3336 - ret void - -bb3743: ; preds = %invcont3663, %bb2181, %invcont2124, %invcont1882, %invcont1642, %bb368, %bb353, %invcont335, %bb3743.preheader - %tex1.3 = phi %struct.ggBRDF* [ undef, %bb3743.preheader ], [ %tex1.3, %bb368 ], [ %tex1.3, %invcont1642 ], [ %tex1.3, %invcont1882 ], [ %tex1.3, %invcont2124 ], [ %tex1.3, %bb2181 ], [ %tex1.3, %invcont335 ], [ %tmp34823483, %invcont3663 ], [ %tex1.3, %bb353 ] ; <%struct.ggBRDF*> [#uses=7] - %tmp3.i312325 = invoke %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_( %"struct.std::basic_istream<char,std::char_traits<char> >"* %surfaces, i8* null ) - to label %tmp3.i312.noexc unwind label %lpad3845 ; <%"struct.std::basic_istream<char,std::char_traits<char> >"*> [#uses=0] - -tmp3.i312.noexc: ; preds = %bb3743 - %tmp15.i327 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %tmp15.i.noexc326 unwind label %lpad3845 ; <i8*> [#uses=0] - -tmp15.i.noexc326: ; preds = %tmp3.i312.noexc - br i1 false, label %invcont3745, label %bb.i323 - -bb.i323: ; preds = %tmp15.i.noexc326 - ret void - -invcont3745: ; preds = %tmp15.i.noexc326 - %tmp3759 = invoke i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv( %"struct.std::basic_ios<char,std::char_traits<char> >"* null ) - to label %invcont3758 unwind label %lpad3845 ; <i8*> [#uses=0] - -invcont3758: ; preds = %invcont3745 - %tmp5.i161 = getelementptr %"struct.ggString::StringRep"* null, i32 0, i32 2, i32 0 ; <i8*> [#uses=2] - br i1 false, label %bb333, label %bb345 - -lpad: ; preds = %entry - ret void - -lpad3825: ; preds = %_ZN8ggStringC1Ei.exit - ret void - -lpad3829: ; preds = %_ZN8ggStringC1Ei.exit96 - ret void - -lpad3833: ; preds = %_ZN8ggStringC1Ei.exit104 - ret void - -lpad3837: ; preds = %_ZN8ggStringC1Ei.exit112 - ret void - -lpad3841: ; preds = %_ZN8ggStringC1Ei.exit129 - ret void - -lpad3845: ; preds = %invcont3745, %tmp3.i312.noexc, %bb3743, %invcont3663, %bb3344, %bb2181, %bb2144, %invcont2124, %invcont2122, %invcont2120, %tmp9.i3163.noexc, %tmp8.i3162.noexc, %invcont2118, %tmp3.i3171.noexc, %invcont2116, %tmp3.i3192.noexc, %bb2114, %bb.i3255, %tmp3.i3243.noexc, %bb2061, %invcont1882, %invcont1880, %invcont1867, %invcont1865, %invcont1863, %invcont1861, %invcont1859, %invcont1857, %bb.i3475, %tmp3.i3463.noexc, %bb1855, %bb1701, %tmp3.i3714.noexc, %bb1662, %invcont1642, %invcont1640, %tmp9.i3799.noexc, %tmp8.i3798.noexc, %invcont1638, %tmp9.i3809.noexc, %tmp8.i3808.noexc, %invcont1636, %tmp3.i3817.noexc, %invcont1634, %tmp3.i3838.noexc, %bb1632, %bb368, %bb353, %tmp3.i167.noexc, %bb333, %tmp3.i.noexc, %_ZN13mrSurfaceListC1Ev.exit, %_ZN8ggStringC1Ei.exit139 - ret void - -lpad3849: ; preds = %invcont294 - ret void - -lpad3921: ; preds = %invcont2160, %invcont2147, %tmp3.i3098.noexc, %_ZN8ggStringC1Ei.exit3124 - ret void - -lpad4025: ; preds = %bb3662, %_ZN8ggStringC1Ei.exit780 - ret void - -lpad4029: ; preds = %_ZN22ggCoverageSolidTextureC1Eddi.exit, %invcont3472, %invcont3470, %invcont3468, %bb3466, %tmp3.i726.noexc, %invcont3348, %tmp3.i746.noexc, %_ZN8ggStringC1Ei.exit772 - ret void - -lpad4045: ; preds = %invcont3474 - ret void -} - -declare fastcc void @_ZN8ggStringD1Ev(%struct.ggString*) - -declare i8* @_Znam(i32) - -declare fastcc void @_ZN8ggStringaSEPKc(%struct.ggString*, i8*) - -declare i32 @strcmp(i8*, i8*) nounwind readonly - -declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERi(%"struct.std::basic_istream<char,std::char_traits<char> >"*, i32*) - -declare i8* @_Znwm(i32) - -declare i8* @_ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv(%"struct.std::basic_ios<char,std::char_traits<char> >"*) - -declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZNSirsERd(%"struct.std::basic_istream<char,std::char_traits<char> >"*, double*) - -declare %"struct.std::basic_istream<char,std::char_traits<char> >"* @_ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_(%"struct.std::basic_istream<char,std::char_traits<char> >"*, i8*) - -declare fastcc void @_ZN13ggSolidNoise3C1Ev(%struct.ggSolidNoise3*) - -declare i8 @_ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv(%"struct.std::basic_ios<char,std::char_traits<char> >"*) zeroext - -declare fastcc %struct.ggSpectrum* @_ZN5ggBSTI10ggSpectrumE4findERK8ggString3(%"struct.ggBSTNode<ggSpectrum>"*, %struct.ggString*) - -declare fastcc void @_ZN5ggBSTI14ggSolidTextureE17InsertIntoSubtreeERK8ggStringPS0_RP9ggBSTNodeIS0_E(%"struct.ggBST<ggSolidTexture>"*, %struct.ggString*, %struct.ggBRDF*, %"struct.ggBSTNode<ggSolidTexture>"**) - -declare fastcc void @_ZN7mrScene9AddObjectEP9mrSurfaceRK8ggStringS4_i(%struct.mrScene*, %struct.ggBRDF*, %struct.ggString*, %struct.ggString*, i32) diff --git a/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll index 6615b8c620759..fd9c35e58b294 100644 --- a/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll @@ -4,7 +4,7 @@ %struct.YY = type { i64 } %struct.ZZ = type opaque -define i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) signext { +define signext i8 @f(%struct.XX*** %fontMap, %struct.XX* %uen) { entry: %tmp45 = add i16 0, 1 ; <i16> [#uses=2] br i1 false, label %bb124, label %bb53 diff --git a/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll index c6ba22ea3da60..19d49b21f5bb8 100644 --- a/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll +++ b/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 -define i16 @t(i32 %depth) signext nounwind { +define signext i16 @t(i32 %depth) nounwind { entry: br i1 false, label %bb74, label %bb bb: ; preds = %entry diff --git a/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/test/CodeGen/X86/2008-04-16-ReMatBug.ll index bfe8ef53f5655..109069e353659 100644 --- a/test/CodeGen/X86/2008-04-16-ReMatBug.ll +++ b/test/CodeGen/X86/2008-04-16-ReMatBug.ll @@ -6,7 +6,7 @@ %struct.pthread_mutex_t = type { i32, [40 x i8] } @iodbcdm_global_lock = external global %struct.pthread_mutex_t ; <%struct.pthread_mutex_t*> [#uses=1] -define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr) signext nounwind { +define i16 @SQLDriversW(i8* %henv, i16 zeroext %fDir, i32* %szDrvDesc, i16 signext %cbDrvDescMax, i16* %pcbDrvDesc, i32* %szDrvAttr, i16 signext %cbDrvAttrMax, i16* %pcbDrvAttr) nounwind { entry: %tmp12 = bitcast i8* %henv to %struct.GENV_t* ; <%struct.GENV_t*> [#uses=1] br i1 true, label %bb28, label %bb @@ -23,7 +23,7 @@ bb74: ; preds = %bb37 bb92: ; preds = %bb74, %bb37 %tmp95180 = shl i16 %cbDrvAttrMax, 2 ; <i16> [#uses=1] %tmp100178 = shl i16 %cbDrvDescMax, 2 ; <i16> [#uses=1] - %tmp113 = tail call i16 @SQLDrivers_Internal( i8* %henv, i16 zeroext %fDir, i8* null, i16 signext %tmp100178, i16* %pcbDrvDesc, i8* null, i16 signext %tmp95180, i16* %pcbDrvAttr, i8 zeroext 87 ) signext nounwind ; <i16> [#uses=1] + %tmp113 = tail call i16 @SQLDrivers_Internal( i8* %henv, i16 zeroext %fDir, i8* null, i16 signext %tmp100178, i16* %pcbDrvDesc, i8* null, i16 signext %tmp95180, i16* %pcbDrvAttr, i8 zeroext 87 ) nounwind ; <i16> [#uses=1] br i1 false, label %done, label %bb137 bb137: ; preds = %bb92 ret i16 0 @@ -41,6 +41,6 @@ bb167: ; preds = %done declare i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) -declare i16 @SQLDrivers_Internal(i8*, i16 zeroext , i8*, i16 signext , i16*, i8*, i16 signext , i16*, i8 zeroext ) signext nounwind +declare i16 @SQLDrivers_Internal(i8*, i16 zeroext , i8*, i16 signext , i16*, i8*, i16 signext , i16*, i8 zeroext ) nounwind declare void @trace_SQLDriversW(i32, i32, i8*, i16 zeroext , i32*, i16 signext , i16*, i32*, i16 signext , i16*) diff --git a/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll index ac482850b8312..77720aa67d1c7 100644 --- a/test/CodeGen/X86/2008-04-17-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-04-17-CoalescerBug.ll @@ -75,7 +75,7 @@ bb5334: ; preds = %bb3314 bb5484: ; preds = %bb3314 ret void bb5657: ; preds = %bb3314 - %tmp5661 = invoke i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE( %struct.wxDateTime* %this, %"struct.wxDateTime::TimeZone"* %tz ) zeroext + %tmp5661 = invoke zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE( %struct.wxDateTime* %this, %"struct.wxDateTime::TimeZone"* %tz ) to label %invcont5660 unwind label %lpad ; <i16> [#uses=0] invcont5660: ; preds = %bb5657 ret void @@ -120,7 +120,7 @@ invcont5814: ; preds = %bb448.i8694, %bb265.i8606 invoke void (%struct.wxString*, i32*, ...)* @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret null, i32* null, i32 %tmp58165817 ) to label %invcont5831 unwind label %lpad invcont5831: ; preds = %invcont5814 - %tmp5862 = invoke i8 @_ZN12wxStringBase10ConcatSelfEmPKwm( %struct.wxStringBase* null, i32 0, i32* null, i32 0 ) zeroext + %tmp5862 = invoke zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm( %struct.wxStringBase* null, i32 0, i32* null, i32 0 ) to label %bb7834 unwind label %lpad8185 ; <i8> [#uses=0] bb5968: ; preds = %bb3314 invoke void (%struct.wxString*, i32*, ...)* @_ZN8wxString6FormatEPKwz( %struct.wxString* noalias sret null, i32* null, i32 0 ) @@ -158,11 +158,11 @@ lpad8185: ; preds = %invcont5831 declare void @_Z10wxOnAssertPKwiPKcS0_S0_(i32*, i32, i8*, i32*, i32*) -declare i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase*, i32, i32*, i32) zeroext +declare zeroext i8 @_ZN12wxStringBase10ConcatSelfEmPKwm(%struct.wxStringBase*, i32, i32*, i32) declare %struct.tm* @gmtime_r(i32*, %struct.tm*) -declare i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE(%struct.wxDateTime*, %"struct.wxDateTime::TimeZone"*) zeroext +declare zeroext i16 @_ZNK10wxDateTime12GetDayOfYearERKNS_8TimeZoneE(%struct.wxDateTime*, %"struct.wxDateTime::TimeZone"*) declare %struct.wxStringBase* @_ZN12wxStringBase6appendEmw(%struct.wxStringBase*, i32, i32) diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll index 38d6aa6d172ac..6e9a6298436d5 100644 --- a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll +++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll @@ -1,10 +1,14 @@ -; RUN: llc < %s | grep {1 \$2 3} +; RUN: llc < %s | FileCheck %s ; rdar://5720231 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" define void @test() nounwind { -entry: +; CHECK: test: +; CHECK-NOT: ret +; CHECK: 1 $2 3 +; CHECK: ret + tail call void asm sideeffect " ${0:c} $1 ${2:c} ", "imr,imr,i,~{dirflag},~{fpsr},~{flags}"( i32 1, i32 2, i32 3 ) nounwind ret void } diff --git a/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll b/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll deleted file mode 100644 index 236b7cd6121f2..0000000000000 --- a/test/CodeGen/X86/2008-06-04-MemCpyLoweringBug.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -disable-fp-elim | grep subl | grep 24 - - %struct.argument_t = type { i8*, %struct.argument_t*, i32, %struct.ipc_type_t*, i32, void (...)*, void (...)*, void (...)*, void (...)*, void (...)*, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, %struct.routine*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, %struct.argument_t*, i32, i32, i32, i32, i32, i32 } - %struct.ipc_type_t = type { i8*, %struct.ipc_type_t*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, i32, i32, %struct.ipc_type_t*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* } - %struct.routine = type opaque -@"\01LC" = external constant [11 x i8] ; <[11 x i8]*> [#uses=1] - -define i8* @InArgMsgField(%struct.argument_t* %arg, i8* %str) nounwind { -entry: - %who = alloca [20 x i8] ; <[20 x i8]*> [#uses=1] - %who1 = getelementptr [20 x i8]* %who, i32 0, i32 0 ; <i8*> [#uses=2] - call void @llvm.memset.i32( i8* %who1, i8 0, i32 20, i32 1 ) - call void @llvm.memcpy.i32( i8* %who1, i8* getelementptr ([11 x i8]* @"\01LC", i32 0, i32 0), i32 11, i32 1 ) - unreachable -} - -declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind diff --git a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll b/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll deleted file mode 100644 index ce9e389fb35c8..0000000000000 --- a/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll +++ /dev/null @@ -1,59 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movd | count 1 -; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep movq -; PR2677 - - - %struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] } - -define double @_Z7qstrtodPKcPS0_Pb(i8* %s00, i8** %se, i8* %ok) nounwind { -entry: - br label %bb163 - -bb151: ; preds = %entry - br label %bb163 - -bb163: ; preds = %bb151, %entry - %tmp366 = load double* null, align 8 ; <double> [#uses=1] - %tmp368 = fmul double %tmp366, 0.000000e+00 ; <double> [#uses=1] - %tmp368226 = bitcast double %tmp368 to i64 ; <i64> [#uses=1] - br label %bb5.i - -bb5.i: ; preds = %bb5.i57.i, %bb163 - %b.0.i = phi %struct.Bigint* [ null, %bb163 ] ; <%struct.Bigint*> [#uses=1] - %tmp3.i7.i728 = load i32* null, align 4 ; <i32> [#uses=1] - br label %bb.i27.i - -bb.i27.i: ; preds = %bb.i27.i, %bb5.i - %tmp23.i20.i = lshr i32 0, 16 ; <i32> [#uses=1] - br label %bb5.i57.i - -bb5.i57.i: ; preds = %bb.i27.i - %tmp50.i35.i = load i32* null, align 4 ; <i32> [#uses=1] - %tmp51.i36.i = add i32 %tmp50.i35.i, 1 ; <i32> [#uses=2] - %tmp2.i.i37.i = shl i32 1, %tmp51.i36.i ; <i32> [#uses=2] - %tmp4.i.i38.i = shl i32 %tmp2.i.i37.i, 2 ; <i32> [#uses=1] - %tmp7.i.i39.i = add i32 %tmp4.i.i38.i, 28 ; <i32> [#uses=1] - %tmp8.i.i40.i = malloc i8, i32 %tmp7.i.i39.i ; <i8*> [#uses=1] - %tmp9.i.i41.i = bitcast i8* %tmp8.i.i40.i to %struct.Bigint* ; <%struct.Bigint*> [#uses=2] - store i32 %tmp51.i36.i, i32* null, align 8 - store i32 %tmp2.i.i37.i, i32* null, align 4 - free %struct.Bigint* %b.0.i - store i32 %tmp23.i20.i, i32* null, align 4 - %tmp74.i61.i = add i32 %tmp3.i7.i728, 1 ; <i32> [#uses=1] - store i32 %tmp74.i61.i, i32* null, align 4 - br label %bb7.i - -bb7.i: ; preds = %bb5.i57.i - %tmp514 = load i32* null, align 4 ; <i32> [#uses=1] - %tmp515 = sext i32 %tmp514 to i64 ; <i64> [#uses=1] - %tmp516 = shl i64 %tmp515, 2 ; <i64> [#uses=1] - %tmp517 = add i64 %tmp516, 8 ; <i64> [#uses=1] - %tmp519 = getelementptr %struct.Bigint* %tmp9.i.i41.i, i32 0, i32 3 ; <i32*> [#uses=1] - %tmp523 = bitcast i32* %tmp519 to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i64( i8* null, i8* %tmp523, i64 %tmp517, i32 1 ) - %tmp524136 = bitcast i64 %tmp368226 to double ; <double> [#uses=1] - store double %tmp524136, double* null - unreachable -} - -declare void @llvm.memcpy.i64(i8*, i8*, i64, i32) nounwind diff --git a/test/CodeGen/X86/2008-09-25-sseregparm-1.ll b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll index c92a8f4635713..fc3e35ed1f9ba 100644 --- a/test/CodeGen/X86/2008-09-25-sseregparm-1.ll +++ b/test/CodeGen/X86/2008-09-25-sseregparm-1.ll @@ -2,11 +2,11 @@ ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2 ; check 'inreg' attribute for sse_regparm -define double @foo1() inreg nounwind { +define inreg double @foo1() nounwind { ret double 1.0 } -define float @foo2() inreg nounwind { +define inreg float @foo2() nounwind { ret float 1.0 } diff --git a/test/CodeGen/X86/2008-10-27-StackRealignment.ll b/test/CodeGen/X86/2008-10-27-StackRealignment.ll index 3d0766cde8456..a57f7166cadc4 100644 --- a/test/CodeGen/X86/2008-10-27-StackRealignment.ll +++ b/test/CodeGen/X86/2008-10-27-StackRealignment.ll @@ -11,12 +11,12 @@ target triple = "i386-pc-linux-gnu" define void @foo(i32 %t) nounwind { %tmp1210 = alloca i8, i32 32, align 4 - call void @llvm.memset.i64(i8* %tmp1210, i8 0, i64 32, i32 4) - + call void @llvm.memset.p0i8.i64(i8* %tmp1210, i8 0, i64 32, i32 4, i1 false) %x = alloca i8, i32 %t call void @dummy(i8* %x) ret void } -declare void @dummy(i8* %x) -declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind +declare void @dummy(i8*) + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll b/test/CodeGen/X86/2008-12-05-SpillerCrash.ll deleted file mode 100644 index 7fd2e6f2948f6..0000000000000 --- a/test/CodeGen/X86/2008-12-05-SpillerCrash.ll +++ /dev/null @@ -1,237 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin9.5 -mattr=+sse41 -relocation-model=pic - - %struct.XXActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 } - %struct.XXAlphaTest = type { float, i16, i8, i8 } - %struct.XXArrayRange = type { i8, i8, i8, i8 } - %struct.XXBlendMode = type { i16, i16, i16, i16, %struct.ZZIColor4, i16, i16, i8, i8, i8, i8 } - %struct.XXBBRec = type opaque - %struct.XXBBstate = type { %struct.ZZGTransformKey, %struct.ZZGTransformKey, %struct.XXProgramLimits, %struct.XXProgramLimits, i8, i8, i8, i8, %struct.ZZSBB, %struct.ZZSBB, [4 x %struct.ZZSBB], %struct.ZZSBB, %struct.ZZSBB, %struct.ZZSBB, [8 x %struct.ZZSBB], %struct.ZZSBB } - %struct.XXClearColor = type { double, %struct.ZZIColor4, %struct.ZZIColor4, float, i32 } - %struct.XXClipPlane = type { i32, [6 x %struct.ZZIColor4] } - %struct.XXColorBB = type { i16, i8, i8, [8 x i16], i8, i8, i8, i8 } - %struct.XXColorMatrix = type { [16 x float]*, %struct.XXImagingColorScale } - %struct.XXConfig = type { i32, float, %struct.ZZGTransformKey, %struct.ZZGTransformKey, i8, i8, i8, i8, i8, i8, i16, i32, i32, i32, %struct.XXPixelFormatInfo, %struct.XXPointLineLimits, %struct.XXPointLineLimits, %struct.XXRenderFeatures, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.XXTextureLimits, [3 x %struct.XXPipelineProgramLimits], %struct.XXFragmentProgramLimits, %struct.XXVertexProgramLimits, %struct.XXGeometryShaderLimits, %struct.XXProgramLimits, %struct.XXGeometryShaderLimits, %struct.XXVertexDescriptor*, %struct.XXVertexDescriptor*, [3 x i32], [4 x i32], [0 x i32] } - %struct.XXContextRec = type { float, float, float, float, float, float, float, float, %struct.ZZIColor4, %struct.ZZIColor4, %struct.YYFPContext, [16 x [2 x %struct.PPStreamToken]], %struct.ZZGProcessor, %struct._YYConstants*, void (%struct.XXContextRec*, i32, i32, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, i32)*, %struct._YYFunction*, %struct.PPStreamToken*, void (%struct.XXContextRec*, %struct.XXVertex*)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*, %struct.XXVertex*)*, %struct._YYFunction*, %struct._YYFunction*, %struct._YYFunction*, [4 x i32], [3 x i32], [3 x i32], float, float, float, %struct.PPStreamToken, i32, %struct.ZZSDrawable, %struct.XXFramebufferRec*, %struct.XXFramebufferRec*, %struct.XXRect, %struct.XXFormat, %struct.XXFormat, %struct.XXFormat, %struct.XXConfig*, %struct.XXBBstate, %struct.XXBBstate, %struct.XXSharedRec*, %struct.XXState*, %struct.XXPluginState*, %struct.XXVertex*, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, %struct.XXProgramRec*, %struct.XXPipelineProgramRec*, %struct.YYTextures, %struct.XXStippleData, i8, i16, i8, i32, i32, i32, %struct.XXQueryRec*, %struct.XXQueryRec*, %struct.XXFallback, { void (i8*, i8*, i32, i8*)* } } - %struct.XXConvolution = type { %struct.ZZIColor4, %struct.XXImagingColorScale, i16, i16, [0 x i32], float*, i32, i32 } - %struct.XXCurrent16A = type { [8 x %struct.ZZIColor4], [16 x %struct.ZZIColor4], %struct.ZZIColor4, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, [4 x float], %struct.XXPointLineLimits, float, float, float, float, i8, i8, i8, i8 } - %struct.XXDepthTest = type { i16, i16, i8, i8, i8, i8, double, double } - %struct.XXDrawableWindow = type { i32, i32, i32 } - %struct.XXFallback = type { float*, %struct.XXRenderDispatch*, %struct.XXConfig*, i8*, i8*, i32, i32 } - %struct.XXFenceRec = type opaque - %struct.XXFixedFunction = type { %struct.PPStreamToken* } - %struct.XXFogMode = type { %struct.ZZIColor4, float, float, float, float, float, i16, i16, i16, i8, i8 } - %struct.XXFormat = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i32 } - %struct.XXFragmentProgramLimits = type { i32, i32, i32, i16, i16, i32, i32 } - %struct.XXFramebufferAttachment = type { i16, i16, i32, i32, i32 } - %struct.XXFramebufferData = type { [10 x %struct.XXFramebufferAttachment], [8 x i16], i16, i16, i16, i8, i8, i32, i32 } - %struct.XXFramebufferRec = type { %struct.XXFramebufferData*, %struct.XXPluginFramebufferData*, %struct.XXFormat, i8, i8, i8, i8 } - %struct.XXGeometryShaderLimits = type { i32, i32, i32, i32, i32 } - %struct.XXHintMode = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 } - %struct.XXHistogram = type { %struct.XXProgramLimits*, i32, i16, i8, i8 } - %struct.XXImagingColorScale = type { %struct.ZZTCoord2, %struct.ZZTCoord2, %struct.ZZTCoord2, %struct.ZZTCoord2 } - %struct.XXImagingSubset = type { %struct.XXConvolution, %struct.XXConvolution, %struct.XXConvolution, %struct.XXColorMatrix, %struct.XXMinmax, %struct.XXHistogram, %struct.XXImagingColorScale, %struct.XXImagingColorScale, %struct.XXImagingColorScale, %struct.XXImagingColorScale, i32, [0 x i32] } - %struct.XXLight = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.XXPointLineLimits, float, float, float, float, float, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, %struct.XXPointLineLimits, float, float, float, float, float } - %struct.XXLightModel = type { %struct.ZZIColor4, [8 x %struct.XXLight], [2 x %struct.XXMaterial], i32, i16, i16, i16, i8, i8, i8, i8, i8, i8 } - %struct.XXLightProduct = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4 } - %struct.XXLineMode = type { float, i32, i16, i16, i8, i8, i8, i8 } - %struct.XXLogicOp = type { i16, i8, i8 } - %struct.XXMaskMode = type { i32, [3 x i32], i8, i8, i8, i8, i8, i8, i8, i8 } - %struct.XXMaterial = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, float, float, float, float, [8 x %struct.XXLightProduct], %struct.ZZIColor4, [8 x i32] } - %struct.XXMinmax = type { %struct.XXMinmaxTable*, i16, i8, i8, [0 x i32] } - %struct.XXMinmaxTable = type { %struct.ZZIColor4, %struct.ZZIColor4 } - %struct.XXMipmaplevel = type { [4 x i32], [4 x i32], [4 x float], [4 x i32], i32, i32, float*, i8*, i16, i16, i16, i16, [2 x float] } - %struct.XXMultisample = type { float, i8, i8, i8, i8, i8, i8, i8, i8 } - %struct.XXPipelineProgramData = type { i16, i8, i8, i32, %struct.PPStreamToken*, i64, %struct.ZZIColor4*, i32, [0 x i32] } - %struct.XXPipelineProgramLimits = type { i32, i16, i16, i32, i16, i16, i32, i32 } - %struct.XXPipelineProgramRec = type { %struct.XXPipelineProgramData*, %struct.PPStreamToken*, %struct.XXContextRec*, { %struct._YYFunction*, \2, \2, [20 x i32], [64 x i32], i32, i32, i32 }*, i32, i32 } - %struct.XXPipelineProgramState = type { i8, i8, i8, i8, [0 x i32], %struct.ZZIColor4* } - %struct.XXPixelFormatInfo = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } - %struct.XXPixelMap = type { i32*, float*, float*, float*, float*, float*, float*, float*, float*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - %struct.XXPixelMode = type { float, float, %struct.XXPixelStore, %struct.XXPixelTransfer, %struct.XXPixelMap, %struct.XXImagingSubset, i32, i32 } - %struct.XXPixelPack = type { i32, i32, i32, i32, i32, i32, i32, i32, i8, i8, i8, i8 } - %struct.XXPixelStore = type { %struct.XXPixelPack, %struct.XXPixelPack } - %struct.XXPixelTransfer = type { float, float, float, float, float, float, float, float, float, float, i32, i32, float, float, float, float, float, float, float, float, float, float, float, float } - %struct.XXPluginFramebufferData = type { [10 x %struct.XXTextureRec*], i8, i8, i8, i8 } - %struct.XXPluginProgramData = type { [3 x %struct.XXPipelineProgramRec*], %struct.XXBBRec**, i32, [0 x i32] } - %struct.XXPluginState = type { [16 x [5 x %struct.XXTextureRec*]], [3 x %struct.XXTextureRec*], [3 x %struct.XXPipelineProgramRec*], [3 x %struct.XXPipelineProgramRec*], %struct.XXProgramRec*, %struct.XXVertexArrayRec*, [16 x %struct.XXBBRec*], %struct.XXFramebufferRec*, %struct.XXFramebufferRec* } - %struct.XXPointLineLimits = type { float, float, float } - %struct.XXPointMode = type { float, float, float, float, %struct.XXPointLineLimits, float, i8, i8, i8, i8, i16, i16, i32, i16, i16 } - %struct.XXPolygonMode = type { [128 x i8], float, float, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8 } - %struct.XXProgramData = type { i32, i32, i32, i32, %struct.PPStreamToken*, i32*, i32, i32, i32, i32, i8, i8, i8, i8, [0 x i32] } - %struct.XXProgramLimits = type { i32, i32, i32, i32 } - %struct.XXProgramRec = type { %struct.XXProgramData*, %struct.XXPluginProgramData*, %struct.ZZIColor4**, i32 } - %struct.XXQueryRec = type { i32, i32, %struct.XXQueryRec* } - %struct.XXRect = type { i32, i32, i32, i32, i32, i32 } - %struct.XXRegisterCombiners = type { i8, i8, i8, i8, i32, [2 x %struct.ZZIColor4], [8 x %struct.XXRegisterCombinersPerStageState], %struct.XXRegisterCombinersFinalStageState } - %struct.XXRegisterCombinersFinalStageState = type { i8, i8, i8, i8, [7 x %struct.XXRegisterCombinersPerVariableState] } - %struct.XXRegisterCombinersPerPortionState = type { [4 x %struct.XXRegisterCombinersPerVariableState], i8, i8, i8, i8, i16, i16, i16, i16, i16, i16 } - %struct.XXRegisterCombinersPerStageState = type { [2 x %struct.XXRegisterCombinersPerPortionState], [2 x %struct.ZZIColor4] } - %struct.XXRegisterCombinersPerVariableState = type { i16, i16, i16, i16 } - %struct.XXRenderDispatch = type { void (%struct.XXContextRec*, i32, float)*, void (%struct.XXContextRec*, i32)*, i32 (%struct.XXContextRec*, i32, i32, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, i32 (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, i32, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32, float, float, i8*, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex*, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32, i32)*, void (%struct.XXContextRec*, %struct.XXVertex**, i32, i32)*, i8* (%struct.XXContextRec*, i32, i32*)*, void (%struct.XXContextRec*, i32, i32, i32)*, i8* (%struct.XXContextRec*, i32, i32, i32, i32, i32)*, void (%struct.XXContextRec*, i32, i32, i32, i32, i32, i8*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*, %struct.XXFenceRec*)*, void (%struct.XXContextRec*, i32, %struct.XXQueryRec*)*, void (%struct.XXContextRec*, %struct.XXQueryRec*)*, i32 (%struct.XXContextRec*, i32, i32, i32, i32, i32, i8*, %struct.ZZIColor4*, %struct.XXCurrent16A*)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, %struct.XXBBRec*)*, i32 (%struct.XXContextRec*, %struct.XXTextureRec*, i32)*, i32 (%struct.XXContextRec*, %struct.XXBBRec*, i32, i32, i8*)*, void (%struct.XXContextRec*, i32)*, void (%struct.XXContextRec*)*, void (%struct.XXContextRec*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)*, i32 (%struct.XXContextRec*, %struct.XXQueryRec*)*, void (%struct.XXContextRec*)* } - %struct.XXRenderFeatures = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } - %struct.XXSWRSurfaceRec = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i8*, [4 x i8*], i32 } - %struct.XXScissorTest = type { %struct.XXProgramLimits, i8, i8, i8, i8 } - %struct.XXSharedData = type { } - %struct.XXSharedRec = type { %struct.__ZZarrayelementDrawInfoListType, %struct.XXSharedData*, i32, i8, i8, i8, i8 } - %struct.XXState = type <{ i16, i16, i16, i16, i32, i32, [256 x %struct.ZZIColor4], [128 x %struct.ZZIColor4], %struct.XXViewport, %struct.XXTransform, %struct.XXLightModel, %struct.XXActiveTextureTargets, %struct.XXAlphaTest, %struct.XXBlendMode, %struct.XXClearColor, %struct.XXColorBB, %struct.XXDepthTest, %struct.XXArrayRange, %struct.XXFogMode, %struct.XXHintMode, %struct.XXLineMode, %struct.XXLogicOp, %struct.XXMaskMode, %struct.XXPixelMode, %struct.XXPointMode, %struct.XXPolygonMode, %struct.XXScissorTest, i32, %struct.XXStencilTest, [8 x %struct.XXTextureMode], [16 x %struct.XXTextureImageMode], %struct.XXArrayRange, [8 x %struct.XXTextureCoordGen], %struct.XXClipPlane, %struct.XXMultisample, %struct.XXRegisterCombiners, %struct.XXArrayRange, %struct.XXArrayRange, [3 x %struct.XXPipelineProgramState], %struct.XXArrayRange, %struct.XXTransformFeedback, i32*, %struct.XXFixedFunction, [1 x i32] }> - %struct.XXStencilTest = type { [3 x { i32, i32, i16, i16, i16, i16 }], i32, [4 x i8] } - %struct.XXStippleData = type { i32, i16, i16, [32 x [32 x i8]] } - %struct.XXTextureCoordGen = type { { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, { i16, i16, %struct.ZZIColor4, %struct.ZZIColor4 }, i8, i8, i8, i8 } - %struct.XXTextureGeomState = type { i16, i16, i16, i16, i16, i8, i8, i8, i8, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, [6 x i16], [6 x i16] } - %struct.XXTextureImageMode = type { float } - %struct.XXTextureLevel = type { i32, i32, i16, i16, i16, i8, i8, i16, i16, i16, i16, i8* } - %struct.XXTextureLimits = type { float, float, i16, i16, i16, i16, i16, i16, i16, i16, i16, i8, i8, [16 x i16], i32 } - %struct.XXTextureMode = type { %struct.ZZIColor4, i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, float, float, i16, i16, i16, i16, i16, i16, [4 x i16], i8, i8, i8, i8, [3 x float], [4 x float], float, float } - %struct.XXTextureParamState = type { i16, i16, i16, i16, i16, i16, %struct.ZZIColor4, float, float, float, float, i16, i16, i16, i16, float, i16, i8, i8, i32, i8* } - %struct.XXTextureRec = type { [4 x float], %struct.XXTextureState*, %struct.XXMipmaplevel*, %struct.XXMipmaplevel*, float, float, float, float, i8, i8, i8, i8, i16, i16, i16, i16, i32, float, [2 x %struct.PPStreamToken] } - %struct.XXTextureState = type { i16, i8, i8, i16, i16, float, i32, %struct.XXSWRSurfaceRec*, %struct.XXTextureParamState, %struct.XXTextureGeomState, i16, i16, i8*, %struct.XXTextureLevel, [1 x [15 x %struct.XXTextureLevel]] } - %struct.XXTransform = type <{ [24 x [16 x float]], [24 x [16 x float]], [16 x float], float, float, float, float, float, i8, i8, i8, i8, i32, i32, i32, i16, i16, i8, i8, i8, i8, i32 }> - %struct.XXTransformFeedback = type { i8, i8, i8, i8, [0 x i32], [16 x i32], [16 x i32] } - %struct.XXVertex = type { %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.ZZIColor4, %struct.XXPointLineLimits, float, %struct.ZZIColor4, float, i8, i8, i8, i8, float, float, i32, i32, i32, i32, [4 x float], [2 x %struct.XXMaterial*], [2 x i32], [8 x %struct.ZZIColor4] } - %struct.XXVertexArrayRec = type opaque - %struct.XXVertexDescriptor = type { i8, i8, i8, i8, [0 x i32] } - %struct.XXVertexProgramLimits = type { i16, i16, i32, i32 } - %struct.XXViewport = type { float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, double, double, i32, i32, i32, i32, float, float, float, float } - %struct.ZZGColorTable = type { i32, i32, i32, i8* } - %struct.ZZGOperation = type { i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, float, %struct.ZZGColorTable, %struct.ZZGColorTable, %struct.ZZGColorTable } - %struct.ZZGProcessor = type { void (%struct.XXPixelMode*, %struct.ZZGOperation*, %struct._ZZGProcessorData*, %union._ZZGFunctionKey*)*, %struct._YYFunction*, %union._ZZGFunctionKey*, %struct._ZZGProcessorData* } - %struct.ZZGTransformKey = type { i32, i32 } - %struct.ZZIColor4 = type { float, float, float, float } - %struct.ZZSBB = type { i8* } - %struct.ZZSDrawable = type { %struct.ZZSWindowRec* } - %struct.ZZSWindowRec = type { %struct.ZZGTransformKey, %struct.ZZGTransformKey, i32, i32, %struct.ZZSDrawable, i8*, i8*, i8*, i8*, i8*, [4 x i8*], i32, i16, i16, i16, i16, i8, i8, i8, i8, i8, i8, i8, i8, %struct.XXDrawableWindow, i32, i32, i8*, i8* } - %struct.ZZTCoord2 = type { float, float } - %struct.YYFPContext = type { float, i32, i32, i32, float, [3 x float] } - %struct.YYFragmentAttrib = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, [8 x <4 x float>] } - %struct.YYTextures = type { [16 x %struct.XXTextureRec*] } - %struct.PPStreamToken = type { { i16, i16, i32 } } - %struct._ZZGProcessorData = type { void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32)*, void (i8*, i8*, i32, i32, i32, i32, i32, i32, i32)*, i8* (i32)*, void (i8*)* } - %struct._YYConstants = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, float, float, float, float, float, float, float, float, float, float, float, float, [256 x float], [4096 x i8], [8 x float], [48 x float], [128 x float], [528 x i8], { void (i8*, i8*, i32, i8*)*, float (float)*, float (float)*, float (float)*, i32 (float)* } } - %struct._YYFunction = type opaque - %struct.__ZZarrayelementDrawInfoListType = type { i32, [40 x i8] } - %union._ZZGFunctionKey = type opaque -@llvm.used = appending global [1 x i8*] [ i8* bitcast (void (%struct.XXContextRec*, i32, i32, %struct.YYFragmentAttrib*, %struct.YYFragmentAttrib*, i32)* @t to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define void @t(%struct.XXContextRec* %ctx, i32 %x, i32 %y, %struct.YYFragmentAttrib* %start, %struct.YYFragmentAttrib* %deriv, i32 %num_frags) nounwind { -entry: - %tmp7485.i.i.i = xor <4 x i32> zeroinitializer, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1] - %tmp8382.i.i.i = extractelement <4 x i32> zeroinitializer, i32 1 ; <i32> [#uses=1] - %tmp8383.i.i.i = extractelement <4 x i32> zeroinitializer, i32 2 ; <i32> [#uses=2] - %tmp8384.i.i.i = extractelement <4 x i32> zeroinitializer, i32 3 ; <i32> [#uses=2] - br label %bb7551.i.i.i - -bb4426.i.i.i: ; preds = %bb7551.i.i.i - %0 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8383.i.i.i, i32 3 ; <[4 x i32]*> [#uses=1] - %1 = bitcast [4 x i32]* %0 to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %2 = load <4 x i32>* %1, align 16 ; <<4 x i32>> [#uses=1] - %3 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8384.i.i.i, i32 3 ; <[4 x i32]*> [#uses=1] - %4 = bitcast [4 x i32]* %3 to <4 x i32>* ; <<4 x i32>*> [#uses=1] - %5 = load <4 x i32>* %4, align 16 ; <<4 x i32>> [#uses=1] - %6 = shufflevector <4 x i32> %2, <4 x i32> %5, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1] - %7 = bitcast <4 x i32> %6 to <2 x i64> ; <<2 x i64>> [#uses=1] - %8 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %7, <2 x i32> < i32 1, i32 3 > ; <<2 x i64>> [#uses=1] - %9 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8382.i.i.i, i32 6 ; <float**> [#uses=1] - %10 = load float** %9, align 4 ; <float*> [#uses=1] - %11 = bitcast float* %10 to i8* ; <i8*> [#uses=1] - %12 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8383.i.i.i, i32 6 ; <float**> [#uses=1] - %13 = load float** %12, align 4 ; <float*> [#uses=1] - %14 = bitcast float* %13 to i8* ; <i8*> [#uses=1] - %15 = getelementptr %struct.XXMipmaplevel* null, i32 %tmp8384.i.i.i, i32 6 ; <float**> [#uses=1] - %16 = load float** %15, align 4 ; <float*> [#uses=1] - %17 = bitcast float* %16 to i8* ; <i8*> [#uses=1] - %tmp7308.i.i.i = and <2 x i64> zeroinitializer, %8 ; <<2 x i64>> [#uses=1] - %18 = bitcast <2 x i64> %tmp7308.i.i.i to <4 x i32> ; <<4 x i32>> [#uses=1] - %19 = mul <4 x i32> %18, zeroinitializer ; <<4 x i32>> [#uses=1] - %20 = add <4 x i32> %19, zeroinitializer ; <<4 x i32>> [#uses=3] - %21 = load i32* null, align 4 ; <i32> [#uses=0] - %22 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind readnone ; <<4 x float>> [#uses=1] - %23 = fmul <4 x float> %22, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1] - %tmp2114.i119.i.i = extractelement <4 x i32> %20, i32 1 ; <i32> [#uses=1] - %24 = shl i32 %tmp2114.i119.i.i, 2 ; <i32> [#uses=1] - %25 = getelementptr i8* %11, i32 %24 ; <i8*> [#uses=1] - %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1] - %27 = load i32* %26, align 4 ; <i32> [#uses=1] - %28 = or i32 %27, -16777216 ; <i32> [#uses=1] - %tmp1927.i120.i.i = insertelement <4 x i32> undef, i32 %28, i32 0 ; <<4 x i32>> [#uses=1] - %29 = bitcast <4 x i32> %tmp1927.i120.i.i to <16 x i8> ; <<16 x i8>> [#uses=1] - %30 = shufflevector <16 x i8> %29, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1] - %31 = bitcast <16 x i8> %30 to <8 x i16> ; <<8 x i16>> [#uses=1] - %32 = shufflevector <8 x i16> %31, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1] - %33 = bitcast <8 x i16> %32 to <4 x i32> ; <<4 x i32>> [#uses=1] - %34 = shufflevector <4 x i32> %33, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1] - %35 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %34) nounwind readnone ; <<4 x float>> [#uses=1] - %36 = fmul <4 x float> %35, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1] - %tmp2113.i124.i.i = extractelement <4 x i32> %20, i32 2 ; <i32> [#uses=1] - %37 = shl i32 %tmp2113.i124.i.i, 2 ; <i32> [#uses=1] - %38 = getelementptr i8* %14, i32 %37 ; <i8*> [#uses=1] - %39 = bitcast i8* %38 to i32* ; <i32*> [#uses=1] - %40 = load i32* %39, align 4 ; <i32> [#uses=1] - %41 = or i32 %40, -16777216 ; <i32> [#uses=1] - %tmp1963.i125.i.i = insertelement <4 x i32> undef, i32 %41, i32 0 ; <<4 x i32>> [#uses=1] - %42 = bitcast <4 x i32> %tmp1963.i125.i.i to <16 x i8> ; <<16 x i8>> [#uses=1] - %43 = shufflevector <16 x i8> %42, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1] - %44 = bitcast <16 x i8> %43 to <8 x i16> ; <<8 x i16>> [#uses=1] - %45 = shufflevector <8 x i16> %44, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1] - %46 = bitcast <8 x i16> %45 to <4 x i32> ; <<4 x i32>> [#uses=1] - %47 = shufflevector <4 x i32> %46, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1] - %48 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %47) nounwind readnone ; <<4 x float>> [#uses=1] - %49 = fmul <4 x float> %48, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1] - %tmp2112.i129.i.i = extractelement <4 x i32> %20, i32 3 ; <i32> [#uses=1] - %50 = shl i32 %tmp2112.i129.i.i, 2 ; <i32> [#uses=1] - %51 = getelementptr i8* %17, i32 %50 ; <i8*> [#uses=1] - %52 = bitcast i8* %51 to i32* ; <i32*> [#uses=1] - %53 = load i32* %52, align 4 ; <i32> [#uses=1] - %54 = or i32 %53, -16777216 ; <i32> [#uses=1] - %tmp1999.i130.i.i = insertelement <4 x i32> undef, i32 %54, i32 0 ; <<4 x i32>> [#uses=1] - %55 = bitcast <4 x i32> %tmp1999.i130.i.i to <16 x i8> ; <<16 x i8>> [#uses=1] - %56 = shufflevector <16 x i8> %55, <16 x i8> < i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef >, <16 x i32> < i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23 > ; <<16 x i8>> [#uses=1] - %57 = bitcast <16 x i8> %56 to <8 x i16> ; <<8 x i16>> [#uses=1] - %58 = shufflevector <8 x i16> %57, <8 x i16> < i16 0, i16 0, i16 0, i16 0, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11 > ; <<8 x i16>> [#uses=1] - %59 = bitcast <8 x i16> %58 to <4 x i32> ; <<4 x i32>> [#uses=1] - %60 = shufflevector <4 x i32> %59, <4 x i32> undef, <4 x i32> < i32 2, i32 1, i32 0, i32 3 > ; <<4 x i32>> [#uses=1] - %61 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %60) nounwind readnone ; <<4 x float>> [#uses=1] - %62 = fmul <4 x float> %61, < float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000, float 0x3F70101020000000 > ; <<4 x float>> [#uses=1] - %63 = fmul <4 x float> %23, zeroinitializer ; <<4 x float>> [#uses=1] - %64 = fadd <4 x float> zeroinitializer, %63 ; <<4 x float>> [#uses=1] - %65 = fmul <4 x float> %36, zeroinitializer ; <<4 x float>> [#uses=1] - %66 = fadd <4 x float> zeroinitializer, %65 ; <<4 x float>> [#uses=1] - %67 = fmul <4 x float> %49, zeroinitializer ; <<4 x float>> [#uses=1] - %68 = fadd <4 x float> zeroinitializer, %67 ; <<4 x float>> [#uses=1] - %69 = fmul <4 x float> %62, zeroinitializer ; <<4 x float>> [#uses=1] - %70 = fadd <4 x float> zeroinitializer, %69 ; <<4 x float>> [#uses=1] - %tmp7452.i.i.i = bitcast <4 x float> %64 to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7454.i.i.i = and <4 x i32> %tmp7452.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1] - %tmp7459.i.i.i = or <4 x i32> %tmp7454.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1] - %tmp7460.i.i.i = bitcast <4 x i32> %tmp7459.i.i.i to <4 x float> ; <<4 x float>> [#uses=1] - %tmp7468.i.i.i = bitcast <4 x float> %66 to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7470.i.i.i = and <4 x i32> %tmp7468.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1] - %tmp7475.i.i.i = or <4 x i32> %tmp7470.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1] - %tmp7476.i.i.i = bitcast <4 x i32> %tmp7475.i.i.i to <4 x float> ; <<4 x float>> [#uses=1] - %tmp7479.i.i.i = bitcast <4 x float> %.279.1.i to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7480.i.i.i = and <4 x i32> zeroinitializer, %tmp7479.i.i.i ; <<4 x i32>> [#uses=1] - %tmp7484.i.i.i = bitcast <4 x float> %68 to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7486.i.i.i = and <4 x i32> %tmp7484.i.i.i, %tmp7485.i.i.i ; <<4 x i32>> [#uses=1] - %tmp7491.i.i.i = or <4 x i32> %tmp7486.i.i.i, %tmp7480.i.i.i ; <<4 x i32>> [#uses=1] - %tmp7492.i.i.i = bitcast <4 x i32> %tmp7491.i.i.i to <4 x float> ; <<4 x float>> [#uses=1] - %tmp7495.i.i.i = bitcast <4 x float> %.380.1.i to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7496.i.i.i = and <4 x i32> zeroinitializer, %tmp7495.i.i.i ; <<4 x i32>> [#uses=1] - %tmp7500.i.i.i = bitcast <4 x float> %70 to <4 x i32> ; <<4 x i32>> [#uses=1] - %tmp7502.i.i.i = and <4 x i32> %tmp7500.i.i.i, zeroinitializer ; <<4 x i32>> [#uses=1] - %tmp7507.i.i.i = or <4 x i32> %tmp7502.i.i.i, %tmp7496.i.i.i ; <<4 x i32>> [#uses=1] - %tmp7508.i.i.i = bitcast <4 x i32> %tmp7507.i.i.i to <4 x float> ; <<4 x float>> [#uses=1] - %indvar.next.i.i.i = add i32 %aniso.0.i.i.i, 1 ; <i32> [#uses=1] - br label %bb7551.i.i.i - -bb7551.i.i.i: ; preds = %bb4426.i.i.i, %entry - %.077.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7460.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=0] - %.178.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7476.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=0] - %.279.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7492.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=1] - %.380.1.i = phi <4 x float> [ undef, %entry ], [ %tmp7508.i.i.i, %bb4426.i.i.i ] ; <<4 x float>> [#uses=1] - %aniso.0.i.i.i = phi i32 [ 0, %entry ], [ %indvar.next.i.i.i, %bb4426.i.i.i ] ; <i32> [#uses=1] - br i1 false, label %glvmInterpretFPTransformFour6.exit, label %bb4426.i.i.i - -glvmInterpretFPTransformFour6.exit: ; preds = %bb7551.i.i.i - unreachable -} - -declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone diff --git a/test/CodeGen/X86/2009-01-25-NoSSE.ll b/test/CodeGen/X86/2009-01-25-NoSSE.ll index 0583ef1909197..8406c4a2cc83f 100644 --- a/test/CodeGen/X86/2009-01-25-NoSSE.ll +++ b/test/CodeGen/X86/2009-01-25-NoSSE.ll @@ -3,18 +3,18 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" - %struct.ktermios = type { i32, i32, i32, i32, i8, [19 x i8], i32, i32 } + +%struct.ktermios = type { i32, i32, i32, i32, i8, [19 x i8], i32, i32 } define void @foo() nounwind { entry: - %termios = alloca %struct.ktermios, align 8 - %termios1 = bitcast %struct.ktermios* %termios to i8* - call void @llvm.memset.i64(i8* %termios1, i8 0, i64 44, i32 8) - call void @bar(%struct.ktermios* %termios) nounwind - ret void + %termios = alloca %struct.ktermios, align 8 + %termios1 = bitcast %struct.ktermios* %termios to i8* + call void @llvm.memset.p0i8.i64(i8* %termios1, i8 0, i64 44, i32 8, i1 false) + call void @bar(%struct.ktermios* %termios) nounwind + ret void } -declare void @llvm.memset.i64(i8* nocapture, i8, i64, i32) nounwind - declare void @bar(%struct.ktermios*) +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll b/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll deleted file mode 100644 index 35fac0c02a1e3..0000000000000 --- a/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin9.6 -regalloc=fast -disable-fp-elim -; rdar://6538384 - - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.Lit = type { i32 } - %struct.StreamBuffer = type { %struct.FILE*, [1048576 x i8], i32, i32 } - %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } - -declare fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer*) - -declare i8* @llvm.eh.exception() nounwind - -define i32 @main(i32 %argc, i8** nocapture %argv) noreturn { -entry: - %0 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null) - to label %bb1.i16.i.i unwind label %lpad.i.i ; <i32> [#uses=0] - -bb1.i16.i.i: ; preds = %entry - br i1 false, label %bb.i.i.i.i, label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i - -bb.i.i.i.i: ; preds = %bb1.i16.i.i - br label %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i - -_ZN3vecI3LitE4pushERKS0_.exit.i.i.i: ; preds = %bb.i.i.i.i, %bb1.i16.i.i - %lits.i.i.0.0 = phi %struct.Lit* [ null, %bb1.i16.i.i ], [ null, %bb.i.i.i.i ] ; <%struct.Lit*> [#uses=1] - %1 = invoke fastcc i32 @_Z8parseIntI12StreamBufferEiRT_(%struct.StreamBuffer* null) - to label %.noexc21.i.i unwind label %lpad.i.i ; <i32> [#uses=0] - -.noexc21.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i - unreachable - -lpad.i.i: ; preds = %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i, %entry - %lits.i.i.0.3 = phi %struct.Lit* [ %lits.i.i.0.0, %_ZN3vecI3LitE4pushERKS0_.exit.i.i.i ], [ null, %entry ] ; <%struct.Lit*> [#uses=1] - %eh_ptr.i.i = call i8* @llvm.eh.exception() ; <i8*> [#uses=0] - free %struct.Lit* %lits.i.i.0.3 - unreachable -} diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll index 2e148ad6b18cc..d64c96658014e 100644 --- a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll +++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll @@ -1,18 +1,24 @@ -; RUN: llc < %s -march=x86 | grep {\$-81920} | count 3 -; RUN: llc < %s -march=x86 | grep {\$4294885376} | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s ; ModuleID = 'shant.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.6" define void @f() nounwind { -entry: +; CHECK: f: +; CHECK-NOT: ret +; CHECK: foo $-81920 +; CHECK-NOT: ret +; CHECK: foo $-81920 +; CHECK-NOT: ret +; CHECK: foo $-81920 +; CHECK-NOT: ret +; CHECK: foo $4294885376 +; CHECK: ret + call void asm sideeffect "foo $0", "n,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind call void asm sideeffect "foo $0", "i,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind call void asm sideeffect "foo $0", "e,~{dirflag},~{fpsr},~{flags}"(i32 -81920) nounwind call void asm sideeffect "foo $0", "Z,~{dirflag},~{fpsr},~{flags}"(i64 4294885376) nounwind - br label %return - -return: ; preds = %entry ret void } diff --git a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll b/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll deleted file mode 100644 index aba4bfcbf52f3..0000000000000 --- a/test/CodeGen/X86/2009-02-20-PreAllocSplit-Crash.ll +++ /dev/null @@ -1,71 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 -pre-alloc-split -regalloc=linearscan - -define i32 @main() nounwind { -bb4.i.thread: - br label %bb5.i4 - -bb16: ; preds = %bb111.i - %phitmp = add i32 %indvar.reg2mem.4, 1 ; <i32> [#uses=2] - switch i32 %indvar.reg2mem.4, label %bb100.i [ - i32 0, label %bb5.i4 - i32 1, label %bb5.i4 - i32 2, label %bb5.i4 - i32 5, label %bb.i14.i - i32 6, label %bb.i14.i - i32 7, label %bb.i14.i - ] - -bb5.i4: ; preds = %bb16, %bb16, %bb16, %bb4.i.thread - br i1 false, label %bb102.i, label %bb103.i - -bb.i14.i: ; preds = %bb16, %bb16, %bb16 - %0 = malloc [600 x i32] ; <[600 x i32]*> [#uses=0] - %1 = icmp eq i32 %phitmp, 7 ; <i1> [#uses=1] - %tl.0.i = select i1 %1, float 1.000000e+02, float 1.000000e+00 ; <float> [#uses=1] - %2 = icmp eq i32 %phitmp, 8 ; <i1> [#uses=1] - %tu.0.i = select i1 %2, float 1.000000e+02, float 1.000000e+00 ; <float> [#uses=1] - br label %bb30.i - -bb30.i: ; preds = %bb36.i, %bb.i14.i - %i.1173.i = phi i32 [ 0, %bb.i14.i ], [ %indvar.next240.i, %bb36.i ] ; <i32> [#uses=3] - %3 = icmp eq i32 0, %i.1173.i ; <i1> [#uses=1] - br i1 %3, label %bb33.i, label %bb34.i - -bb33.i: ; preds = %bb30.i - store float %tl.0.i, float* null, align 4 - br label %bb36.i - -bb34.i: ; preds = %bb30.i - %4 = icmp eq i32 0, %i.1173.i ; <i1> [#uses=1] - br i1 %4, label %bb35.i, label %bb36.i - -bb35.i: ; preds = %bb34.i - store float %tu.0.i, float* null, align 4 - br label %bb36.i - -bb36.i: ; preds = %bb35.i, %bb34.i, %bb33.i - %indvar.next240.i = add i32 %i.1173.i, 1 ; <i32> [#uses=1] - br label %bb30.i - -bb100.i: ; preds = %bb16 - ret i32 0 - -bb102.i: ; preds = %bb5.i4 - br label %bb103.i - -bb103.i: ; preds = %bb102.i, %bb5.i4 - %indvar.reg2mem.4 = phi i32 [ 0, %bb5.i4 ], [ 0, %bb102.i ] ; <i32> [#uses=2] - %n.0.reg2mem.1.i = phi i32 [ 0, %bb102.i ], [ 0, %bb5.i4 ] ; <i32> [#uses=1] - %5 = icmp eq i32 0, 0 ; <i1> [#uses=1] - br i1 %5, label %bb111.i, label %bb108.i - -bb108.i: ; preds = %bb103.i - ret i32 0 - -bb111.i: ; preds = %bb103.i - %6 = icmp sgt i32 %n.0.reg2mem.1.i, 7 ; <i1> [#uses=1] - br i1 %6, label %bb16, label %bb112.i - -bb112.i: ; preds = %bb111.i - unreachable -} diff --git a/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll b/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll deleted file mode 100644 index 97bbd93f83f1f..0000000000000 --- a/test/CodeGen/X86/2009-04-09-InlineAsmCrash.ll +++ /dev/null @@ -1,165 +0,0 @@ -; RUN: llc < %s -; rdar://6774324 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin10.0" - type <{ i32, %1 }> ; type %0 - type <{ [216 x i8] }> ; type %1 - type <{ %3, %4*, %28*, i64, i32, %6, %6, i32, i32, i32, i32, void (i8*, i32)*, i8*, %29*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [2 x i8*], i32, %30, i32, %24, %4*, %4*, i64, i64, i32, i32, void (i32, %2*)*, i32, i32, i32, i32, i32, i32, i32, i32, %24, i64, i64, i64, i64, i64, %21, i32, i32, %21, i32, %31*, %3, %33, %34, %9*, i32, i32, %3, %3, %35, %41*, %42*, %11, i32, i32, i32, i8, i8, i8, i8, %69*, %69, %9*, %9*, [11 x %61], %3, i8*, i32, i64, i64, i32, i32, i32, i64 }> ; type %2 - type <{ %3*, %3* }> ; type %3 - type <{ %3, i32, %2*, %2*, %2*, %5*, i32, i32, %21, i64, i64, i64, i32, %22, %9*, %6, %4*, %23 }> ; type %4 - type <{ %3, %3, %4*, %4*, i32, %6, %9*, %9*, %5*, %20* }> ; type %5 - type <{ %7, i16, i8, i8, %8 }> ; type %6 - type <{ i32 }> ; type %7 - type <{ i8*, i8*, [2 x i32], i16, i8, i8, i8*, i8, i8, i8, i8, i8* }> ; type %8 - type <{ %10, %13, %15, i32, i32, i32, i32, %9*, %9*, %16*, i32, %17*, i64, i32 }> ; type %9 - type <{ i32, i32, %11 }> ; type %10 - type <{ %12 }> ; type %11 - type <{ [12 x i8] }> ; type %12 - type <{ %14 }> ; type %13 - type <{ [40 x i8] }> ; type %14 - type <{ [4 x i8] }> ; type %15 - type <{ %15, %15 }> ; type %16 - type <{ %17*, %17*, %9*, i32, %18*, %19* }> ; type %17 - type opaque ; type %18 - type <{ i32, i32, %9*, %9*, i32, i32 }> ; type %19 - type <{ %5*, %20*, %20*, %20* }> ; type %20 - type <{ %3, %3*, void (i8*, i8*)*, i8*, i8*, i64 }> ; type %21 - type <{ i32, [4 x i32], i32, i32, [128 x %3] }> ; type %22 - type <{ %24, %24, %24, %24*, %24*, %24*, %25, %26, %27, i32, i32, i8* }> ; type %23 - type <{ i64, i32, i32, i32 }> ; type %24 - type <{ i32, i32 }> ; type %25 - type <{ i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32 }> ; type %26 - type <{ [16 x %17*], i32 }> ; type %27 - type <{ i8, i8, i8, i8, %7, %3 }> ; type %28 - type <{ i32, %11*, i8*, i8*, %11* }> ; type %29 - type <{ i32, i32, i32, i32, i64 }> ; type %30 - type <{ %32*, %3, %3, i32, i32, i32, %5* }> ; type %31 - type opaque ; type %32 - type <{ [44 x i8] }> ; type %33 - type <{ %17* }> ; type %34 - type <{ %36, %36*, i32, [4 x %40], i32, i32, i64, i32 }> ; type %35 - type <{ i8*, %0*, %37*, i64, %39, i32, %39, %6, i64, i64, i8*, i32 }> ; type %36 - type <{ i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, %38 }> ; type %37 - type <{ i16, i16, i8, i8, i16, i32, i16, i16, i32, i16, i16, i32, i32, [8 x [8 x i16]], [8 x [16 x i16]], [96 x i8] }> ; type %38 - type <{ i8, i8, i8, i8, i8, i8, i8, i8 }> ; type %39 - type <{ i64 }> ; type %40 - type <{ %11, i32, i32, i32, %42*, %3, i8*, %3, %5*, %32*, i32, i32, i32, i32, i32, i32, i32, %59, %60, i64, i64, i32, %11, %9*, %9*, %9*, [11 x %61], %9*, %9*, %9*, %9*, %9*, [3 x %9*], %62*, %3, %3, i32, i32, %9*, %9*, i32, %67*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, %68*, [2 x i32], i64, i64, i32 }> ; type %41 - type <{ %43, %44, %47*, i64, i64, i64, i32, %11, %54, %46*, %46*, i32, i32, i32, i32, i32, i32, i32 }> ; type %42 - type <{ i16, i8, i8, i32, i32 }> ; type %43 - type <{ %45, i32, i32 }> ; type %44 - type <{ %46*, %46*, i64, i64 }> ; type %45 - type <{ %45, %15, i64, i8, i8, i8, i8, i16, i16 }> ; type %46 - type <{ i64*, i64, %48*, i32, i32, i32, %6, %53, i32, i64, i64*, i64*, %48*, %48*, %48*, i32 }> ; type %47 - type <{ %3, %43, i64, %49*, i32, i32, i32, i32, %48*, %48*, i64, %50*, i64, %52*, i32, i16, i16, i8, i8, i8, i8, %3, %3, i64, i32, i32, i32, i8*, i32, i8, i8, i8, i8, %3 }> ; type %48 - type <{ %3, %3, %49*, %48*, i64, i8, i8, i8, i8, i32, i8, i8, i8, i8 }> ; type %49 - type <{ i32, %51* }> ; type %50 - type <{ void (%50*)*, void (%50*)*, i32 (%50*, %52*, i32)*, i32 (%50*)*, i32 (%50*, i64, i32, i32, i32*)*, i32 (%50*, i64, i32, i64*, i32*, i32, i32, i32)*, i32 (%50*, i64, i32)*, i32 (%50*, i64, i64, i32)*, i32 (%50*, i64, i64, i32)*, i32 (%50*, i32)*, i32 (%50*)*, i8* }> ; type %51 - type <{ i32, %48* }> ; type %52 - type <{ i32, i32, i32 }> ; type %53 - type <{ %11, %55*, i32, %53, i64 }> ; type %54 - type <{ %3, i32, i32, i32, i32, i32, [64 x i8], %56 }> ; type %55 - type <{ %57, %58, %58 }> ; type %56 - type <{ i64, i64, i64, i64, i64 }> ; type %57 - type <{ i64, i64, i64, i64, i64, i64, i64, i64 }> ; type %58 - type <{ [2 x i32] }> ; type %59 - type <{ [8 x i32] }> ; type %60 - type <{ %9*, i32, i32, i32 }> ; type %61 - type <{ %11, i32, %11, i32, i32, %63*, i32, %64*, %65, i32, i32, i32, i32, %41* }> ; type %62 - type <{ %10*, i32, %15, %15 }> ; type %63 - type opaque ; type %64 - type <{ i32, %66*, %66*, %66**, %66*, %66** }> ; type %65 - type <{ %63, i32, %62*, %66*, %66* }> ; type %66 - type <{ i32, i32, [0 x %39] }> ; type %67 - type opaque ; type %68 - type <{ %69*, void (%69*, %2*)* }> ; type %69 - type <{ %70*, %2*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32, %71, i32, i32, i64, i64, i64, %72, i8*, i8*, %73, %4*, %79*, %81*, %39*, %84, i32, i32, i32, i8*, i32, i32, i32, i32, i32, i32, i32, i64*, i32, i64*, i8*, i32, [256 x i32], i64, i64, %86, %77*, i64, i64, %88*, %2*, %2* }> ; type %70 - type <{ %3, i64, i32, i32 }> ; type %71 - type <{ i64, i64, i64 }> ; type %72 - type <{ %73*, %73*, %73*, %73*, %74*, %75*, %76*, %70*, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, [3 x %78*], i8*, i8* }> ; type %73 - type <{ %74*, %74*, %75*, %76*, %73*, i32, i32, i32, i32, i32, i8*, i8* }> ; type %74 - type <{ %75*, %73*, %74*, %76*, i32, i32, i32, i32, %78*, i8*, i8* }> ; type %75 - type <{ %76*, %73*, %74*, %75*, i32, i32, i32, i32, i8*, i8*, %77* }> ; type %76 - type opaque ; type %77 - type <{ %78*, %75*, i8, i8, i8, i8, i16, i16, i16, i8, i8, i32, [0 x %73*] }> ; type %78 - type <{ i32, i32, i32, [20 x %80] }> ; type %79 - type <{ i64*, i8* }> ; type %80 - type <{ [256 x %39], [19 x %39], i8, i8, i8, i8, i8, i8, i8, i8, %82, i8, i8, i8, i8, i8, i8, i8, i8, %82, %83 }> ; type %81 - type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16 }> ; type %82 - type <{ [16 x i64], i64 }> ; type %83 - type <{ %82*, %85, %85, %39*, i32 }> ; type %84 - type <{ i16, %39* }> ; type %85 - type <{ %87, i8* }> ; type %86 - type <{ i32, i32, i32, i8, i8, i16, i32, i32, i32, i32, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }> ; type %87 - type <{ i64, i64, i32, i32, i32, i32 }> ; type %88 - type <{ i32, i32, i32, i32, i32, i32, i32 }> ; type %89 -@kernel_stack_size = external global i32 ; <i32*> [#uses=1] - -define void @test(%0*) nounwind { - %2 = tail call %2* asm sideeffect "mov %gs:${1:P},$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 ptrtoint (%2** getelementptr (%70* null, i32 0, i32 1) to i32)) nounwind ; <%2*> [#uses=1] - %3 = getelementptr %2* %2, i32 0, i32 15 ; <i32*> [#uses=1] - %4 = load i32* %3 ; <i32> [#uses=2] - %5 = icmp eq i32 %4, 0 ; <i1> [#uses=1] - br i1 %5, label %47, label %6 - -; <label>:6 ; preds = %1 - %7 = load i32* @kernel_stack_size ; <i32> [#uses=1] - %8 = add i32 %7, %4 ; <i32> [#uses=1] - %9 = inttoptr i32 %8 to %89* ; <%89*> [#uses=12] - %10 = tail call %2* asm sideeffect "mov %gs:${1:P},$0", "=r,i,~{dirflag},~{fpsr},~{flags}"(i32 ptrtoint (%2** getelementptr (%70* null, i32 0, i32 1) to i32)) nounwind ; <%2*> [#uses=1] - %11 = getelementptr %2* %10, i32 0, i32 65, i32 1 ; <%36**> [#uses=1] - %12 = load %36** %11 ; <%36*> [#uses=1] - %13 = getelementptr %36* %12, i32 0, i32 1 ; <%0**> [#uses=1] - %14 = load %0** %13 ; <%0*> [#uses=1] - %15 = icmp eq %0* %14, %0 ; <i1> [#uses=1] - br i1 %15, label %40, label %16 - -; <label>:16 ; preds = %6 - %17 = getelementptr %0* %0, i32 0, i32 1 ; <%1*> [#uses=1] - %18 = getelementptr %89* %9, i32 -1, i32 0 ; <i32*> [#uses=1] - %19 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 32 ; <i8*> [#uses=1] - %20 = bitcast i8* %19 to i32* ; <i32*> [#uses=1] - %21 = load i32* %20 ; <i32> [#uses=1] - store i32 %21, i32* %18 - %22 = getelementptr %89* %9, i32 -1, i32 1 ; <i32*> [#uses=1] - %23 = ptrtoint %1* %17 to i32 ; <i32> [#uses=1] - store i32 %23, i32* %22 - %24 = getelementptr %89* %9, i32 -1, i32 2 ; <i32*> [#uses=1] - %25 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 24 ; <i8*> [#uses=1] - %26 = bitcast i8* %25 to i32* ; <i32*> [#uses=1] - %27 = load i32* %26 ; <i32> [#uses=1] - store i32 %27, i32* %24 - %28 = getelementptr %89* %9, i32 -1, i32 3 ; <i32*> [#uses=1] - %29 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 16 ; <i8*> [#uses=1] - %30 = bitcast i8* %29 to i32* ; <i32*> [#uses=1] - %31 = load i32* %30 ; <i32> [#uses=1] - store i32 %31, i32* %28 - %32 = getelementptr %89* %9, i32 -1, i32 4 ; <i32*> [#uses=1] - %33 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 20 ; <i8*> [#uses=1] - %34 = bitcast i8* %33 to i32* ; <i32*> [#uses=1] - %35 = load i32* %34 ; <i32> [#uses=1] - store i32 %35, i32* %32 - %36 = getelementptr %89* %9, i32 -1, i32 5 ; <i32*> [#uses=1] - %37 = getelementptr %0* %0, i32 0, i32 1, i32 0, i32 56 ; <i8*> [#uses=1] - %38 = bitcast i8* %37 to i32* ; <i32*> [#uses=1] - %39 = load i32* %38 ; <i32> [#uses=1] - store i32 %39, i32* %36 - ret void - -; <label>:40 ; preds = %6 - %41 = getelementptr %89* %9, i32 -1, i32 0 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl %ebx, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %41) nounwind - %42 = getelementptr %89* %9, i32 -1, i32 1 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl %esp, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %42) nounwind - %43 = getelementptr %89* %9, i32 -1, i32 2 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl %ebp, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %43) nounwind - %44 = getelementptr %89* %9, i32 -1, i32 3 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl %edi, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %44) nounwind - %45 = getelementptr %89* %9, i32 -1, i32 4 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl %esi, $0", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %45) nounwind - %46 = getelementptr %89* %9, i32 -1, i32 5 ; <i32*> [#uses=1] - tail call void asm sideeffect "movl $$1f, $0\0A1:", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %46) nounwind - ret void - -; <label>:47 ; preds = %1 - ret void -} diff --git a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll index 27f11cf6bc6ed..b1222d1c0627a 100644 --- a/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll +++ b/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll @@ -2,7 +2,7 @@ ; radr://6772169 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin10" - type { i32, i1 } ; type %0 + %0 = type { i32, i1 } ; type %0 declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll index ff8cf0ac229ec..3d70b58686b18 100644 --- a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll +++ b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll @@ -2,7 +2,7 @@ ; rdar://6781755 ; PR3934 - type { i32, i32 } ; type %0 + %0 = type { i32, i32 } ; type %0 define void @bn_sqr_comba8(i32* nocapture %r, i32* %a) nounwind { entry: diff --git a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll deleted file mode 100644 index f739216f825a0..0000000000000 --- a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll +++ /dev/null @@ -1,121 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 77 -; rdar://6802189 - -; Test if linearscan is unfavoring registers for allocation to allow more reuse -; of reloads from stack slots. - - %struct.SHA_CTX = type { i32, i32, i32, i32, i32, i32, i32, [16 x i32], i32 } - -define fastcc void @sha1_block_data_order(%struct.SHA_CTX* nocapture %c, i8* %p, i64 %num) nounwind { -entry: - br label %bb - -bb: ; preds = %bb, %entry - %asmtmp511 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=3] - %asmtmp513 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=2] - %asmtmp516 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1] - %asmtmp517 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2] - %0 = xor i32 0, %asmtmp513 ; <i32> [#uses=0] - %1 = add i32 0, %asmtmp517 ; <i32> [#uses=1] - %2 = add i32 %1, 0 ; <i32> [#uses=1] - %3 = add i32 %2, 0 ; <i32> [#uses=1] - %asmtmp519 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 0) nounwind ; <i32> [#uses=1] - %4 = xor i32 0, %asmtmp511 ; <i32> [#uses=1] - %asmtmp520 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %4) nounwind ; <i32> [#uses=2] - %5 = xor i32 0, %asmtmp516 ; <i32> [#uses=1] - %6 = xor i32 %5, %asmtmp519 ; <i32> [#uses=1] - %7 = add i32 %asmtmp513, -899497514 ; <i32> [#uses=1] - %8 = add i32 %7, %asmtmp520 ; <i32> [#uses=1] - %9 = add i32 %8, %6 ; <i32> [#uses=1] - %10 = add i32 %9, 0 ; <i32> [#uses=1] - %asmtmp523 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=1] - %asmtmp525 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %3) nounwind ; <i32> [#uses=2] - %11 = xor i32 0, %asmtmp525 ; <i32> [#uses=1] - %12 = add i32 0, %11 ; <i32> [#uses=1] - %13 = add i32 %12, 0 ; <i32> [#uses=2] - %asmtmp528 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %10) nounwind ; <i32> [#uses=1] - %14 = xor i32 0, %asmtmp520 ; <i32> [#uses=1] - %asmtmp529 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %14) nounwind ; <i32> [#uses=1] - %asmtmp530 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %13) nounwind ; <i32> [#uses=1] - %15 = add i32 0, %asmtmp530 ; <i32> [#uses=1] - %16 = xor i32 0, %asmtmp523 ; <i32> [#uses=1] - %asmtmp532 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %16) nounwind ; <i32> [#uses=2] - %asmtmp533 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %15) nounwind ; <i32> [#uses=1] - %17 = xor i32 %13, %asmtmp528 ; <i32> [#uses=1] - %18 = xor i32 %17, 0 ; <i32> [#uses=1] - %19 = add i32 %asmtmp525, -899497514 ; <i32> [#uses=1] - %20 = add i32 %19, %asmtmp532 ; <i32> [#uses=1] - %21 = add i32 %20, %18 ; <i32> [#uses=1] - %22 = add i32 %21, %asmtmp533 ; <i32> [#uses=1] - %23 = xor i32 0, %asmtmp511 ; <i32> [#uses=1] - %24 = xor i32 %23, 0 ; <i32> [#uses=1] - %asmtmp535 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %24) nounwind ; <i32> [#uses=3] - %25 = add i32 0, %asmtmp535 ; <i32> [#uses=1] - %26 = add i32 %25, 0 ; <i32> [#uses=1] - %27 = add i32 %26, 0 ; <i32> [#uses=1] - %28 = xor i32 0, %asmtmp529 ; <i32> [#uses=0] - %29 = xor i32 %22, 0 ; <i32> [#uses=1] - %30 = xor i32 %29, 0 ; <i32> [#uses=1] - %31 = add i32 0, %30 ; <i32> [#uses=1] - %32 = add i32 %31, 0 ; <i32> [#uses=3] - %asmtmp541 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2] - %asmtmp542 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %32) nounwind ; <i32> [#uses=1] - %33 = add i32 0, %asmtmp541 ; <i32> [#uses=1] - %34 = add i32 %33, 0 ; <i32> [#uses=1] - %35 = add i32 %34, %asmtmp542 ; <i32> [#uses=1] - %asmtmp543 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %27) nounwind ; <i32> [#uses=2] - %36 = xor i32 0, %asmtmp535 ; <i32> [#uses=0] - %37 = xor i32 %32, 0 ; <i32> [#uses=1] - %38 = xor i32 %37, %asmtmp543 ; <i32> [#uses=1] - %39 = add i32 0, %38 ; <i32> [#uses=1] - %40 = add i32 %39, 0 ; <i32> [#uses=2] - %asmtmp546 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %32) nounwind ; <i32> [#uses=1] - %asmtmp547 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 0) nounwind ; <i32> [#uses=2] - %41 = add i32 0, -899497514 ; <i32> [#uses=1] - %42 = add i32 %41, %asmtmp547 ; <i32> [#uses=1] - %43 = add i32 %42, 0 ; <i32> [#uses=1] - %44 = add i32 %43, 0 ; <i32> [#uses=3] - %asmtmp549 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %35) nounwind ; <i32> [#uses=2] - %45 = xor i32 0, %asmtmp541 ; <i32> [#uses=1] - %asmtmp550 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %45) nounwind ; <i32> [#uses=2] - %asmtmp551 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 5, i32 %44) nounwind ; <i32> [#uses=1] - %46 = xor i32 %40, %asmtmp546 ; <i32> [#uses=1] - %47 = xor i32 %46, %asmtmp549 ; <i32> [#uses=1] - %48 = add i32 %asmtmp543, -899497514 ; <i32> [#uses=1] - %49 = add i32 %48, %asmtmp550 ; <i32> [#uses=1] - %50 = add i32 %49, %47 ; <i32> [#uses=1] - %51 = add i32 %50, %asmtmp551 ; <i32> [#uses=1] - %asmtmp552 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %40) nounwind ; <i32> [#uses=2] - %52 = xor i32 %44, %asmtmp549 ; <i32> [#uses=1] - %53 = xor i32 %52, %asmtmp552 ; <i32> [#uses=1] - %54 = add i32 0, %53 ; <i32> [#uses=1] - %55 = add i32 %54, 0 ; <i32> [#uses=2] - %asmtmp555 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %44) nounwind ; <i32> [#uses=2] - %56 = xor i32 0, %asmtmp532 ; <i32> [#uses=1] - %57 = xor i32 %56, %asmtmp547 ; <i32> [#uses=1] - %asmtmp556 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %57) nounwind ; <i32> [#uses=1] - %58 = add i32 0, %asmtmp556 ; <i32> [#uses=1] - %59 = add i32 %58, 0 ; <i32> [#uses=1] - %60 = add i32 %59, 0 ; <i32> [#uses=1] - %asmtmp558 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %51) nounwind ; <i32> [#uses=1] - %61 = xor i32 %asmtmp517, %asmtmp511 ; <i32> [#uses=1] - %62 = xor i32 %61, %asmtmp535 ; <i32> [#uses=1] - %63 = xor i32 %62, %asmtmp550 ; <i32> [#uses=1] - %asmtmp559 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 1, i32 %63) nounwind ; <i32> [#uses=1] - %64 = xor i32 %55, %asmtmp555 ; <i32> [#uses=1] - %65 = xor i32 %64, %asmtmp558 ; <i32> [#uses=1] - %asmtmp561 = tail call i32 asm "roll $1,$0", "=r,I,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i32 30, i32 %55) nounwind ; <i32> [#uses=1] - %66 = add i32 %asmtmp552, -899497514 ; <i32> [#uses=1] - %67 = add i32 %66, %65 ; <i32> [#uses=1] - %68 = add i32 %67, %asmtmp559 ; <i32> [#uses=1] - %69 = add i32 %68, 0 ; <i32> [#uses=1] - %70 = add i32 %69, 0 ; <i32> [#uses=1] - store i32 %70, i32* null, align 4 - %71 = add i32 0, %60 ; <i32> [#uses=1] - store i32 %71, i32* null, align 4 - %72 = add i32 0, %asmtmp561 ; <i32> [#uses=1] - store i32 %72, i32* null, align 4 - %73 = add i32 0, %asmtmp555 ; <i32> [#uses=1] - store i32 %73, i32* null, align 4 - br label %bb -} diff --git a/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll b/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll deleted file mode 100644 index 0a2fcdbf6c082..0000000000000 --- a/test/CodeGen/X86/2009-04-27-LiveIntervalsBug.ll +++ /dev/null @@ -1,165 +0,0 @@ -; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | grep cmpxchgl | not grep eax -; PR4076 - - type { i8, i8, i8 } ; type %0 - type { i32, i8** } ; type %1 - type { %3* } ; type %2 - type { %4 } ; type %3 - type { %5 } ; type %4 - type { %6, i32, %7 } ; type %5 - type { i8* } ; type %6 - type { i32, [12 x i8] } ; type %7 - type { %9 } ; type %8 - type { %10, %11*, i8 } ; type %9 - type { %11* } ; type %10 - type { i32, %6, i8*, %12, %13*, i8, i32, %28, %29, i32, %30, i32, i32, i32, i8*, i8*, i8, i8 } ; type %11 - type { %13* } ; type %12 - type { %14, i32, %13*, %21 } ; type %13 - type { %15, %16 } ; type %14 - type { i32 (...)** } ; type %15 - type { %17, i8* (i32)*, void (i8*)*, i8 } ; type %16 - type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %18 } ; type %17 - type { %19* } ; type %18 - type { i32, %20**, i32, %20**, i8** } ; type %19 - type { i32 (...)**, i32 } ; type %20 - type { %22, %25*, i8, i8, %17*, %26*, %27*, %27* } ; type %21 - type { i32 (...)**, i32, i32, i32, i32, i32, %23*, %24, [8 x %24], i32, %24*, %18 } ; type %22 - type { %23*, void (i32, %22*, i32)*, i32, i32 } ; type %23 - type { i8*, i32 } ; type %24 - type { i32 (...)**, %21 } ; type %25 - type { %20, i32*, i8, i32*, i32*, i16*, i8, [256 x i8], [256 x i8], i8 } ; type %26 - type { %20 } ; type %27 - type { void (%9*)*, i32 } ; type %28 - type { %15* } ; type %29 - type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8* } ; type %30 -@AtomicOps_Internalx86CPUFeatures = external global %0 ; <%0*> [#uses=1] -internal constant [19 x i8] c"xxxxxxxxxxxxxxxxxx\00" ; <[19 x i8]*>:0 [#uses=1] -internal constant [47 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00" ; <[47 x i8]*>:1 [#uses=1] - -define i8** @func6(i8 zeroext, i32, i32, %1*) nounwind { -; <label>:4 - %5 = alloca i32, align 4 ; <i32*> [#uses=2] - %6 = alloca i32, align 4 ; <i32*> [#uses=2] - %7 = alloca %2, align 8 ; <%2*> [#uses=3] - %8 = alloca %8, align 8 ; <%8*> [#uses=2] - br label %17 - -; <label>:9 ; preds = %17 - %10 = getelementptr %1* %3, i32 %19, i32 0 ; <i32*> [#uses=1] - %11 = load i32* %10, align 4 ; <i32> [#uses=1] - %12 = icmp eq i32 %11, %2 ; <i1> [#uses=1] - br i1 %12, label %13, label %16 - -; <label>:13 ; preds = %9 - %14 = getelementptr %1* %3, i32 %19, i32 1 ; <i8***> [#uses=1] - %15 = load i8*** %14, align 4 ; <i8**> [#uses=1] - ret i8** %15 - -; <label>:16 ; preds = %9 - %indvar.next13 = add i32 %18, 1 ; <i32> [#uses=1] - br label %17 - -; <label>:17 ; preds = %16, %4 - %18 = phi i32 [ 0, %4 ], [ %indvar.next13, %16 ] ; <i32> [#uses=2] - %19 = add i32 %18, %1 ; <i32> [#uses=3] - %20 = icmp sgt i32 %19, 3 ; <i1> [#uses=1] - br i1 %20, label %21, label %9 - -; <label>:21 ; preds = %17 - call void @func5() - %22 = getelementptr %1* %3, i32 0, i32 0 ; <i32*> [#uses=1] - %23 = load i32* %22, align 4 ; <i32> [#uses=1] - %24 = icmp eq i32 %23, 0 ; <i1> [#uses=1] - br i1 %24, label %._crit_edge, label %._crit_edge1 - -._crit_edge1: ; preds = %._crit_edge1, %21 - %25 = phi i32 [ 0, %21 ], [ %26, %._crit_edge1 ] ; <i32> [#uses=1] - %26 = add i32 %25, 1 ; <i32> [#uses=4] - %27 = getelementptr %1* %3, i32 %26, i32 0 ; <i32*> [#uses=1] - %28 = load i32* %27, align 4 ; <i32> [#uses=1] - %29 = icmp ne i32 %28, 0 ; <i1> [#uses=1] - %30 = icmp ne i32 %26, 4 ; <i1> [#uses=1] - %31 = and i1 %29, %30 ; <i1> [#uses=1] - br i1 %31, label %._crit_edge1, label %._crit_edge - -._crit_edge: ; preds = %._crit_edge1, %21 - %32 = phi i32 [ 0, %21 ], [ %26, %._crit_edge1 ] ; <i32> [#uses=3] - %33 = call i8* @pthread_getspecific(i32 0) nounwind ; <i8*> [#uses=2] - %34 = icmp ne i8* %33, null ; <i1> [#uses=1] - %35 = icmp eq i8 %0, 0 ; <i1> [#uses=1] - %36 = or i1 %34, %35 ; <i1> [#uses=1] - br i1 %36, label %._crit_edge4, label %37 - -; <label>:37 ; preds = %._crit_edge - %38 = call i8* @func2(i32 2048) ; <i8*> [#uses=4] - call void @llvm.memset.i32(i8* %38, i8 0, i32 2048, i32 4) - %39 = call i32 @pthread_setspecific(i32 0, i8* %38) nounwind ; <i32> [#uses=2] - store i32 %39, i32* %5 - store i32 0, i32* %6 - %40 = icmp eq i32 %39, 0 ; <i1> [#uses=1] - br i1 %40, label %41, label %43 - -; <label>:41 ; preds = %37 - %42 = getelementptr %2* %7, i32 0, i32 0 ; <%3**> [#uses=1] - store %3* null, %3** %42, align 8 - br label %._crit_edge4 - -; <label>:43 ; preds = %37 - %44 = call %3* @func1(i32* %5, i32* %6, i8* getelementptr ([47 x i8]* @1, i32 0, i32 0)) ; <%3*> [#uses=2] - %45 = getelementptr %2* %7, i32 0, i32 0 ; <%3**> [#uses=1] - store %3* %44, %3** %45, align 8 - %46 = icmp eq %3* %44, null ; <i1> [#uses=1] - br i1 %46, label %._crit_edge4, label %47 - -; <label>:47 ; preds = %43 - call void @func4(%8* %8, i8* getelementptr ([19 x i8]* @0, i32 0, i32 0), i32 165, %2* %7) - call void @func3(%8* %8) noreturn - unreachable - -._crit_edge4: ; preds = %43, %41, %._crit_edge - %48 = phi i8* [ %38, %41 ], [ %33, %._crit_edge ], [ %38, %43 ] ; <i8*> [#uses=2] - %49 = bitcast i8* %48 to i8** ; <i8**> [#uses=3] - %50 = icmp ne i8* %48, null ; <i1> [#uses=1] - %51 = icmp slt i32 %32, 4 ; <i1> [#uses=1] - %52 = and i1 %50, %51 ; <i1> [#uses=1] - br i1 %52, label %53, label %._crit_edge6 - -; <label>:53 ; preds = %._crit_edge4 - %54 = getelementptr %1* %3, i32 %32, i32 0 ; <i32*> [#uses=1] - %55 = call i32 asm sideeffect "lock; cmpxchgl $1,$2", "={ax},q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"(i32 %2, i32* %54, i32 0) nounwind ; <i32> [#uses=1] - %56 = load i8* getelementptr (%0* @AtomicOps_Internalx86CPUFeatures, i32 0, i32 0), align 8 ; <i8> [#uses=1] - %57 = icmp eq i8 %56, 0 ; <i1> [#uses=1] - br i1 %57, label %._crit_edge7, label %58 - -; <label>:58 ; preds = %53 - call void asm sideeffect "lfence", "~{dirflag},~{fpsr},~{flags},~{memory}"() nounwind - br label %._crit_edge7 - -._crit_edge7: ; preds = %58, %53 - %59 = icmp eq i32 %55, 0 ; <i1> [#uses=1] - br i1 %59, label %60, label %._crit_edge6 - -._crit_edge6: ; preds = %._crit_edge7, %._crit_edge4 - ret i8** %49 - -; <label>:60 ; preds = %._crit_edge7 - %61 = getelementptr %1* %3, i32 %32, i32 1 ; <i8***> [#uses=1] - store i8** %49, i8*** %61, align 4 - ret i8** %49 -} - -declare %3* @func1(i32* nocapture, i32* nocapture, i8*) - -declare void @func5() - -declare void @func4(%8*, i8*, i32, %2*) - -declare void @func3(%8*) noreturn - -declare i8* @pthread_getspecific(i32) nounwind - -declare i8* @func2(i32) - -declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind - -declare i32 @pthread_setspecific(i32, i8*) nounwind diff --git a/test/CodeGen/X86/2009-04-29-LinearScanBug.ll b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll index 6843723052c13..2fbf7aa5ed1a8 100644 --- a/test/CodeGen/X86/2009-04-29-LinearScanBug.ll +++ b/test/CodeGen/X86/2009-04-29-LinearScanBug.ll @@ -1,33 +1,33 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin10 ; rdar://6837009 - type { %struct.pf_state*, %struct.pf_state*, %struct.pf_state*, i32 } ; type %0 - type { %2 } ; type %1 - type { %struct.pf_addr, %struct.pf_addr } ; type %2 - type { %struct.in6_addr } ; type %3 - type { [4 x i32] } ; type %4 - type { %struct.pfi_dynaddr*, [4 x i8] } ; type %5 - type { %struct.pfi_dynaddr*, %struct.pfi_dynaddr** } ; type %6 - type { %struct.pfr_ktable*, %struct.pfr_ktable*, %struct.pfr_ktable*, i32 } ; type %7 - type { %struct.pfr_ktable* } ; type %8 - type { i8* } ; type %9 - type { %11 } ; type %10 - type { i8*, i8*, %struct.radix_node* } ; type %11 - type { [2 x %struct.pf_rulequeue], %13, %13 } ; type %12 - type { %struct.pf_rulequeue*, %struct.pf_rule**, i32, i32, i32 } ; type %13 - type { %struct.pf_anchor*, %struct.pf_anchor*, %struct.pf_anchor*, i32 } ; type %14 - type { %struct.pfi_kif*, %struct.pfi_kif*, %struct.pfi_kif*, i32 } ; type %15 - type { %struct.ifnet*, %struct.ifnet** } ; type %16 - type { %18 } ; type %17 - type { %struct.pkthdr, %19 } ; type %18 - type { %struct.m_ext, [176 x i8] } ; type %19 - type { %struct.ifmultiaddr*, %struct.ifmultiaddr** } ; type %20 - type { i32, %22 } ; type %21 - type { i8*, [4 x i8] } ; type %22 - type { %struct.tcphdr* } ; type %23 - type { %struct.pf_ike_state } ; type %24 - type { %struct.pf_state_key*, %struct.pf_state_key*, %struct.pf_state_key*, i32 } ; type %25 - type { %struct.pf_src_node*, %struct.pf_src_node*, %struct.pf_src_node*, i32 } ; type %26 + %0 = type { %struct.pf_state*, %struct.pf_state*, %struct.pf_state*, i32 } + %1 = type { %2 } + %2 = type { %struct.pf_addr, %struct.pf_addr } + %3 = type { %struct.in6_addr } + %4 = type { [4 x i32] } + %5 = type { %struct.pfi_dynaddr*, [4 x i8] } + %6 = type { %struct.pfi_dynaddr*, %struct.pfi_dynaddr** } + %7 = type { %struct.pfr_ktable*, %struct.pfr_ktable*, %struct.pfr_ktable*, i32 } + %8 = type { %struct.pfr_ktable* } + %9 = type { i8* } + %10 = type { %11 } + %11 = type { i8*, i8*, %struct.radix_node* } + %12 = type { [2 x %struct.pf_rulequeue], %13, %13 } + %13 = type { %struct.pf_rulequeue*, %struct.pf_rule**, i32, i32, i32 } + %14 = type { %struct.pf_anchor*, %struct.pf_anchor*, %struct.pf_anchor*, i32 } + %15 = type { %struct.pfi_kif*, %struct.pfi_kif*, %struct.pfi_kif*, i32 } + %16 = type { %struct.ifnet*, %struct.ifnet** } + %17 = type { %18 } + %18 = type { %struct.pkthdr, %19 } + %19 = type { %struct.m_ext, [176 x i8] } + %20 = type { %struct.ifmultiaddr*, %struct.ifmultiaddr** } + %21 = type { i32, %22 } + %22 = type { i8*, [4 x i8] } + %23 = type { %struct.tcphdr* } + %24 = type { %struct.pf_ike_state } + %25 = type { %struct.pf_state_key*, %struct.pf_state_key*, %struct.pf_state_key*, i32 } + %26 = type { %struct.pf_src_node*, %struct.pf_src_node*, %struct.pf_src_node*, i32 } %struct.anon = type { %struct.pf_state*, %struct.pf_state** } %struct.au_mask_t = type { i32, i32 } %struct.bpf_if = type opaque diff --git a/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll index d1f9cf83307cd..e803d6b56369f 100644 --- a/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll +++ b/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -disable-fp-elim -relocation-model=pic ; PR4099 - type { [62 x %struct.Bitvec*] } ; type %0 - type { i8* } ; type %1 - type { double } ; type %2 + %0 = type { [62 x %struct.Bitvec*] } ; type %0 + %1 = type { i8* } ; type %1 + %2 = type { double } ; type %2 %struct..5sPragmaType = type { i8*, i32 } %struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 } %struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* } diff --git a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll index 9415732de0257..3dcc0d42e7596 100644 --- a/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll +++ b/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll @@ -1,9 +1,9 @@ ; RUN: llc < %s -march=x86 - type { %struct.GAP } ; type %0 - type { i16, i8, i8 } ; type %1 - type { [2 x i32], [2 x i32] } ; type %2 - type { %struct.rec* } ; type %3 + %0 = type { %struct.GAP } ; type %0 + %1 = type { i16, i8, i8 } ; type %1 + %2 = type { [2 x i32], [2 x i32] } ; type %2 + %3 = type { %struct.rec* } ; type %3 %struct.FILE_POS = type { i8, i8, i16, i32 } %struct.FIRST_UNION = type { %struct.FILE_POS } %struct.FOURTH_UNION = type { %struct.STYLE } diff --git a/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll index b329c9163c9f5..2080c0ae2e0fe 100644 --- a/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll +++ b/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll @@ -87,8 +87,6 @@ for.inc: ; preds = %for.inc, %lor.end.i, %lor.rhs.i, %land.lhs.true3.i br label %for.inc } -declare i32 @safe() - define i32 @func_35(i8 signext %p_35) nounwind readonly { entry: %tobool = icmp eq i8 %p_35, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll index 6b0d6d9790de4..bf668e304b286 100644 --- a/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll +++ b/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll @@ -2,8 +2,8 @@ target triple = "x86_64-mingw" ; ModuleID = 'mm.bc' - type opaque ; type %0 - type opaque ; type %1 + %0 = type opaque ; type %0 + %1 = type opaque ; type %1 define internal fastcc float @computeMipmappingRho(%0* %shaderExecutionStatePtr, i32 %index, <4 x float> %texCoord, <4 x float> %texCoordDX, <4 x float> %texCoordDY) readonly { indexCheckBlock: diff --git a/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/test/CodeGen/X86/2009-09-19-earlyclobber.ll index 4f44caea74c94..66f51180509f0 100644 --- a/test/CodeGen/X86/2009-09-19-earlyclobber.ll +++ b/test/CodeGen/X86/2009-09-19-earlyclobber.ll @@ -4,7 +4,7 @@ ; Registers other than RAX, RCX are OK, but they must be different. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin10.0" - type { i64, i64 } ; type %0 + %0 = type { i64, i64 } ; type %0 define i64 @flsst(i64 %find) nounwind ssp { entry: diff --git a/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll b/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll deleted file mode 100644 index 91c5440b278f2..0000000000000 --- a/test/CodeGen/X86/2009-10-08-MachineLICMBug.ll +++ /dev/null @@ -1,264 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -stats |& grep {machine-licm} | grep 2 -; rdar://7274692 - -%0 = type { [125 x i32] } -%1 = type { i32 } -%struct..5sPragmaType = type { i8*, i32 } -%struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 } -%struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* } -%struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 } -%struct.AuxData = type { i8*, void (i8*)* } -%struct.Bitvec = type { i32, i32, i32, %0 } -%struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* } -%struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* } -%struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* } -%struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* } -%struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] } -%struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 } -%struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 } -%struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* } -%struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 } -%struct.Context = type { i64, i32, %struct.Fifo } -%struct.CountCtx = type { i64 } -%struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* } -%struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* } -%struct.DbPage = type { %struct.Pager*, i32, %struct.DbPage*, %struct.DbPage*, %struct.PagerLruLink, %struct.DbPage*, i8, i8, i8, i8, i8, i16, %struct.DbPage*, %struct.DbPage*, i8* } -%struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..5sPragmaType, %struct..5sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 } -%struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* } -%struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 } -%struct.FILE = type { i8*, i32, i32, i16, i16, %struct..5sPragmaType, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct..5sPragmaType, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct..5sPragmaType, i32, i64 } -%struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 } -%struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* } -%struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] } -%struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] } -%struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* } -%struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 } -%struct.IdList = type { %struct..5sPragmaType*, i32, i32 } -%struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** } -%struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] } -%struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* } -%struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.DbPage*, i32, %struct.MemPage* } -%struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* } -%struct.Op = type { i8, i8, i8, i8, i32, i32, i32, %1 } -%struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.DbPage*, %struct.DbPage*, %struct.DbPage*, i64, i64, i64, i64, i64, i32, void (%struct.DbPage*, i32)*, void (%struct.DbPage*, i32)*, i32, %struct.DbPage**, i8*, [16 x i8] } -%struct.PagerLruLink = type { %struct.DbPage*, %struct.DbPage* } -%struct.PagerLruList = type { %struct.DbPage*, %struct.DbPage*, %struct.DbPage* } -%struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* } -%struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] } -%struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] } -%struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 } -%struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* } -%struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..5sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* } -%struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..5sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* } -%struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 } -%struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] } -%struct._OvflCell = type { i8*, i16 } -%struct._RuneCharClass = type { [14 x i8], i32 } -%struct._RuneEntry = type { i32, i32, i32, i32* } -%struct._RuneLocale = type { [8 x i8], [32 x i8], i32 (i8*, i32, i8**)*, i32 (i32, i8*, i32, i8**)*, i32, [256 x i32], [256 x i32], [256 x i32], %struct._RuneRange, %struct._RuneRange, %struct._RuneRange, i8*, i32, i32, %struct._RuneCharClass* } -%struct._RuneRange = type { i32, %struct._RuneEntry* } -%struct.__sFILEX = type opaque -%struct._ht = type { i32, %struct.HashElem* } -%struct.callback_data = type { %struct.sqlite3*, i32, i32, %struct.FILE*, i32, i32, i32, i8*, [20 x i8], [100 x i32], [100 x i32], [20 x i8], %struct.previous_mode_data, [1024 x i8], i8* } -%struct.previous_mode_data = type { i32, i32, i32, [100 x i32] } -%struct.sColMap = type { i32, i8* } -%struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %union.anon, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 } -%struct.sqlite3InitInfo = type { i32, i32, i8 } -%struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* } -%struct.sqlite3_file = type { %struct.sqlite3_io_methods* } -%struct.sqlite3_index_constraint = type { i32, i8, i8, i32 } -%struct.sqlite3_index_constraint_usage = type { i32, i8 } -%struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double } -%struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* } -%struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* } -%struct.sqlite3_mutex = type opaque -%struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* } -%struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* } -%struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* } -%union.anon = type { double } - -@_DefaultRuneLocale = external global %struct._RuneLocale ; <%struct._RuneLocale*> [#uses=2] -@__stderrp = external global %struct.FILE* ; <%struct.FILE**> [#uses=1] -@.str10 = internal constant [16 x i8] c"Out of memory!\0A\00", align 1 ; <[16 x i8]*> [#uses=1] -@llvm.used = appending global [1 x i8*] [i8* bitcast (void (%struct.callback_data*, i8*)* @set_table_name to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define fastcc void @set_table_name(%struct.callback_data* nocapture %p, i8* %zName) nounwind ssp { -entry: - %0 = getelementptr inbounds %struct.callback_data* %p, i32 0, i32 7 ; <i8**> [#uses=3] - %1 = load i8** %0, align 4 ; <i8*> [#uses=2] - %2 = icmp eq i8* %1, null ; <i1> [#uses=1] - br i1 %2, label %bb1, label %bb - -bb: ; preds = %entry - free i8* %1 - store i8* null, i8** %0, align 4 - br label %bb1 - -bb1: ; preds = %bb, %entry - %3 = icmp eq i8* %zName, null ; <i1> [#uses=1] - br i1 %3, label %return, label %bb2 - -bb2: ; preds = %bb1 - %4 = load i8* %zName, align 1 ; <i8> [#uses=2] - %5 = zext i8 %4 to i32 ; <i32> [#uses=2] - %6 = icmp sgt i8 %4, -1 ; <i1> [#uses=1] - br i1 %6, label %bb.i.i, label %bb1.i.i - -bb.i.i: ; preds = %bb2 - %7 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %5 ; <i32*> [#uses=1] - %8 = load i32* %7, align 4 ; <i32> [#uses=1] - %9 = and i32 %8, 256 ; <i32> [#uses=1] - br label %isalpha.exit - -bb1.i.i: ; preds = %bb2 - %10 = tail call i32 @__maskrune(i32 %5, i32 256) nounwind ; <i32> [#uses=1] - br label %isalpha.exit - -isalpha.exit: ; preds = %bb1.i.i, %bb.i.i - %storemerge.in.in.i.i = phi i32 [ %9, %bb.i.i ], [ %10, %bb1.i.i ] ; <i32> [#uses=1] - %storemerge.in.i.i = icmp eq i32 %storemerge.in.in.i.i, 0 ; <i1> [#uses=1] - br i1 %storemerge.in.i.i, label %bb3, label %bb5 - -bb3: ; preds = %isalpha.exit - %11 = load i8* %zName, align 1 ; <i8> [#uses=2] - %12 = icmp eq i8 %11, 95 ; <i1> [#uses=1] - br i1 %12, label %bb5, label %bb12.preheader - -bb5: ; preds = %bb3, %isalpha.exit - %.pre = load i8* %zName, align 1 ; <i8> [#uses=1] - br label %bb12.preheader - -bb12.preheader: ; preds = %bb5, %bb3 - %13 = phi i8 [ %.pre, %bb5 ], [ %11, %bb3 ] ; <i8> [#uses=1] - %needQuote.1.ph = phi i32 [ 0, %bb5 ], [ 1, %bb3 ] ; <i32> [#uses=2] - %14 = icmp eq i8 %13, 0 ; <i1> [#uses=1] - br i1 %14, label %bb13, label %bb7 - -bb7: ; preds = %bb11, %bb12.preheader - %i.011 = phi i32 [ %tmp17, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=2] - %n.110 = phi i32 [ %26, %bb11 ], [ 0, %bb12.preheader ] ; <i32> [#uses=3] - %needQuote.19 = phi i32 [ %needQuote.0, %bb11 ], [ %needQuote.1.ph, %bb12.preheader ] ; <i32> [#uses=2] - %scevgep16 = getelementptr i8* %zName, i32 %i.011 ; <i8*> [#uses=2] - %tmp17 = add i32 %i.011, 1 ; <i32> [#uses=2] - %scevgep18 = getelementptr i8* %zName, i32 %tmp17 ; <i8*> [#uses=1] - %15 = load i8* %scevgep16, align 1 ; <i8> [#uses=2] - %16 = zext i8 %15 to i32 ; <i32> [#uses=2] - %17 = icmp sgt i8 %15, -1 ; <i1> [#uses=1] - br i1 %17, label %bb.i.i2, label %bb1.i.i3 - -bb.i.i2: ; preds = %bb7 - %18 = getelementptr inbounds %struct._RuneLocale* @_DefaultRuneLocale, i32 0, i32 5, i32 %16 ; <i32*> [#uses=1] - %19 = load i32* %18, align 4 ; <i32> [#uses=1] - %20 = and i32 %19, 1280 ; <i32> [#uses=1] - br label %isalnum.exit - -bb1.i.i3: ; preds = %bb7 - %21 = tail call i32 @__maskrune(i32 %16, i32 1280) nounwind ; <i32> [#uses=1] - br label %isalnum.exit - -isalnum.exit: ; preds = %bb1.i.i3, %bb.i.i2 - %storemerge.in.in.i.i4 = phi i32 [ %20, %bb.i.i2 ], [ %21, %bb1.i.i3 ] ; <i32> [#uses=1] - %storemerge.in.i.i5 = icmp eq i32 %storemerge.in.in.i.i4, 0 ; <i1> [#uses=1] - br i1 %storemerge.in.i.i5, label %bb8, label %bb11 - -bb8: ; preds = %isalnum.exit - %22 = load i8* %scevgep16, align 1 ; <i8> [#uses=2] - %23 = icmp eq i8 %22, 95 ; <i1> [#uses=1] - br i1 %23, label %bb11, label %bb9 - -bb9: ; preds = %bb8 - %24 = icmp eq i8 %22, 39 ; <i1> [#uses=1] - %25 = zext i1 %24 to i32 ; <i32> [#uses=1] - %.n.1 = add i32 %n.110, %25 ; <i32> [#uses=1] - br label %bb11 - -bb11: ; preds = %bb9, %bb8, %isalnum.exit - %needQuote.0 = phi i32 [ 1, %bb9 ], [ %needQuote.19, %isalnum.exit ], [ %needQuote.19, %bb8 ] ; <i32> [#uses=2] - %n.0 = phi i32 [ %.n.1, %bb9 ], [ %n.110, %isalnum.exit ], [ %n.110, %bb8 ] ; <i32> [#uses=1] - %26 = add nsw i32 %n.0, 1 ; <i32> [#uses=2] - %27 = load i8* %scevgep18, align 1 ; <i8> [#uses=1] - %28 = icmp eq i8 %27, 0 ; <i1> [#uses=1] - br i1 %28, label %bb13, label %bb7 - -bb13: ; preds = %bb11, %bb12.preheader - %n.1.lcssa = phi i32 [ 0, %bb12.preheader ], [ %26, %bb11 ] ; <i32> [#uses=2] - %needQuote.1.lcssa = phi i32 [ %needQuote.1.ph, %bb12.preheader ], [ %needQuote.0, %bb11 ] ; <i32> [#uses=1] - %29 = add nsw i32 %n.1.lcssa, 2 ; <i32> [#uses=1] - %30 = icmp eq i32 %needQuote.1.lcssa, 0 ; <i1> [#uses=3] - %n.1. = select i1 %30, i32 %n.1.lcssa, i32 %29 ; <i32> [#uses=1] - %31 = add nsw i32 %n.1., 1 ; <i32> [#uses=1] - %32 = malloc i8, i32 %31 ; <i8*> [#uses=7] - store i8* %32, i8** %0, align 4 - %33 = icmp eq i8* %32, null ; <i1> [#uses=1] - br i1 %33, label %bb16, label %bb17 - -bb16: ; preds = %bb13 - %34 = load %struct.FILE** @__stderrp, align 4 ; <%struct.FILE*> [#uses=1] - %35 = bitcast %struct.FILE* %34 to i8* ; <i8*> [#uses=1] - %36 = tail call i32 @"\01_fwrite$UNIX2003"(i8* getelementptr inbounds ([16 x i8]* @.str10, i32 0, i32 0), i32 1, i32 15, i8* %35) nounwind ; <i32> [#uses=0] - tail call void @exit(i32 1) noreturn nounwind - unreachable - -bb17: ; preds = %bb13 - br i1 %30, label %bb23.preheader, label %bb18 - -bb18: ; preds = %bb17 - store i8 39, i8* %32, align 4 - br label %bb23.preheader - -bb23.preheader: ; preds = %bb18, %bb17 - %n.3.ph = phi i32 [ 1, %bb18 ], [ 0, %bb17 ] ; <i32> [#uses=2] - %37 = load i8* %zName, align 1 ; <i8> [#uses=1] - %38 = icmp eq i8 %37, 0 ; <i1> [#uses=1] - br i1 %38, label %bb24, label %bb20 - -bb20: ; preds = %bb22, %bb23.preheader - %storemerge18 = phi i32 [ %tmp, %bb22 ], [ 0, %bb23.preheader ] ; <i32> [#uses=2] - %n.37 = phi i32 [ %n.4, %bb22 ], [ %n.3.ph, %bb23.preheader ] ; <i32> [#uses=3] - %scevgep = getelementptr i8* %zName, i32 %storemerge18 ; <i8*> [#uses=1] - %tmp = add i32 %storemerge18, 1 ; <i32> [#uses=2] - %scevgep15 = getelementptr i8* %zName, i32 %tmp ; <i8*> [#uses=1] - %39 = load i8* %scevgep, align 1 ; <i8> [#uses=2] - %40 = getelementptr inbounds i8* %32, i32 %n.37 ; <i8*> [#uses=1] - store i8 %39, i8* %40, align 1 - %41 = add nsw i32 %n.37, 1 ; <i32> [#uses=2] - %42 = icmp eq i8 %39, 39 ; <i1> [#uses=1] - br i1 %42, label %bb21, label %bb22 - -bb21: ; preds = %bb20 - %43 = getelementptr inbounds i8* %32, i32 %41 ; <i8*> [#uses=1] - store i8 39, i8* %43, align 1 - %44 = add nsw i32 %n.37, 2 ; <i32> [#uses=1] - br label %bb22 - -bb22: ; preds = %bb21, %bb20 - %n.4 = phi i32 [ %44, %bb21 ], [ %41, %bb20 ] ; <i32> [#uses=2] - %45 = load i8* %scevgep15, align 1 ; <i8> [#uses=1] - %46 = icmp eq i8 %45, 0 ; <i1> [#uses=1] - br i1 %46, label %bb24, label %bb20 - -bb24: ; preds = %bb22, %bb23.preheader - %n.3.lcssa = phi i32 [ %n.3.ph, %bb23.preheader ], [ %n.4, %bb22 ] ; <i32> [#uses=3] - br i1 %30, label %bb26, label %bb25 - -bb25: ; preds = %bb24 - %47 = getelementptr inbounds i8* %32, i32 %n.3.lcssa ; <i8*> [#uses=1] - store i8 39, i8* %47, align 1 - %48 = add nsw i32 %n.3.lcssa, 1 ; <i32> [#uses=1] - br label %bb26 - -bb26: ; preds = %bb25, %bb24 - %n.5 = phi i32 [ %48, %bb25 ], [ %n.3.lcssa, %bb24 ] ; <i32> [#uses=1] - %49 = getelementptr inbounds i8* %32, i32 %n.5 ; <i8*> [#uses=1] - store i8 0, i8* %49, align 1 - ret void - -return: ; preds = %bb1 - ret void -} - -declare i32 @"\01_fwrite$UNIX2003"(i8*, i32, i32, i8*) - -declare void @exit(i32) noreturn nounwind - -declare i32 @__maskrune(i32, i32) diff --git a/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll index d33f93ea7b276..94075e78a28ae 100644 --- a/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll +++ b/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll @@ -16,7 +16,7 @@ bb1: ; CHECK: LBB0_1: ; CHECK: movaps %xmm0, (%rsp) %tmp2 = phi i32 [ %tmp3, %bb1 ], [ 0, %entry ] - call void @llvm.memcpy.i64(i8* %tmp1, i8* getelementptr inbounds ([28 x i8]* @str, i64 0, i64 0), i64 28, i32 1) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp1, i8* getelementptr inbounds ([28 x i8]* @str, i64 0, i64 0), i64 28, i32 1, i1 false) %tmp3 = add i32 %tmp2, 1 %tmp4 = icmp eq i32 %tmp3, %count br i1 %tmp4, label %bb2, label %bb1 @@ -25,4 +25,4 @@ bb2: ret void } -declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll index 1e7a418d1d67f..07003234a9930 100644 --- a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll +++ b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll @@ -22,8 +22,11 @@ return: ; preds = %entry define void @t2() nounwind ssp { entry: ; CHECK: t2: -; CHECK: movl %eax, %ecx -; CHECK: %ecx = foo (%ecx, %eax) +; CHECK: movl +; CHECK: [[D2:%e.x]] = foo +; CHECK: ([[D2]], +; CHECK-NOT: [[D2]] +; CHECK: ) %b = alloca i32 ; <i32*> [#uses=2] %a = alloca i32 ; <i32*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] diff --git a/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll b/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll index c5d3d16f81aab..739a27a3e17c3 100644 --- a/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll +++ b/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll @@ -22,6 +22,7 @@ module asm "\09.ident\09\22GCC: (GNU) 4.5.0 20100212 (experimental) LLVM: 95975\ %0 = type { %"union gimple_statement_d"* } %"BITMAP_WORD[]" = type [2 x i64] +%"uchar[]" = type [1 x i8] %"char[]" = type [4 x i8] %"enum dom_state[]" = type [2 x i32] %"int[]" = type [4 x i32] @@ -61,6 +62,7 @@ module asm "\09.ident\09\22GCC: (GNU) 4.5.0 20100212 (experimental) LLVM: 95975\ %"struct gimple_seq_d" = type { %"struct gimple_seq_node_d"*, %"struct gimple_seq_node_d"*, %"struct gimple_seq_d"* } %"struct gimple_seq_node_d" = type { %"union gimple_statement_d"*, %"struct gimple_seq_node_d"*, %"struct gimple_seq_node_d"* } %"struct gimple_statement_base" = type { i8, i8, i16, i32, i32, i32, %"struct basic_block_def"*, %"union tree_node"* } +%"struct phi_arg_d[]" = type [1 x %"struct phi_arg_d"] %"struct gimple_statement_phi" = type { %"struct gimple_statement_base", i32, i32, %"union tree_node"*, %"struct phi_arg_d[]" } %"struct htab" = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i64, i64, i64, i32, i32, i8* (i64, i64)*, void (i8*)*, i8*, i8* (i8*, i64, i64)*, void (i8*, i8*)*, i32 } %"struct iv" = type { %"union tree_node"*, %"union tree_node"*, %"union tree_node"*, %"union tree_node"*, i8, i8, i32 } @@ -78,7 +80,6 @@ module asm "\09.ident\09\22GCC: (GNU) 4.5.0 20100212 (experimental) LLVM: 95975\ %"struct object_block" = type { %"union section"*, i32, i64, %"struct VEC_rtx_gc"*, %"struct VEC_rtx_gc"* } %"struct obstack" = type { i64, %"struct _obstack_chunk"*, i8*, i8*, i8*, i64, i32, %"struct _obstack_chunk"* (i8*, i64)*, void (i8*, %"struct _obstack_chunk"*)*, i8*, i8 } %"struct phi_arg_d" = type { %"struct ssa_use_operand_d", %"union tree_node"*, i32 } -%"struct phi_arg_d[]" = type [1 x %"struct phi_arg_d"] %"struct pointer_map_t" = type opaque %"struct pt_solution" = type { i8, %"struct bitmap_head_def"* } %"struct rtx_def" = type { i16, i8, i8, %"union u" } @@ -98,7 +99,6 @@ module asm "\09.ident\09\22GCC: (GNU) 4.5.0 20100212 (experimental) LLVM: 95975\ %"struct unnamed_section" = type { %"struct section_common", void (i8*)*, i8*, %"union section"* } %"struct use_optype_d" = type { %"struct use_optype_d"*, %"struct ssa_use_operand_d" } %"struct version_info" = type { %"union tree_node"*, %"struct iv"*, i8, i32, i8 } -%"uchar[]" = type [1 x i8] %"union basic_block_il_dependent" = type { %"struct gimple_bb_info"* } %"union edge_def_insns" = type { %"struct gimple_seq_d"* } %"union gimple_statement_d" = type { %"struct gimple_statement_phi" } diff --git a/test/CodeGen/X86/2010-04-08-CoalescerBug.ll b/test/CodeGen/X86/2010-04-08-CoalescerBug.ll index 1c7c28c68e9fa..9a5958e62a0eb 100644 --- a/test/CodeGen/X86/2010-04-08-CoalescerBug.ll +++ b/test/CodeGen/X86/2010-04-08-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s ; rdar://7842028 ; Do not delete partially dead copy instructions. diff --git a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll index bb1db598d4194..05f581a08834f 100644 --- a/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll +++ b/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll @@ -1,4 +1,4 @@ -; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -disable-fp-elim < %s | FileCheck %s +; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -relocation-model=pic -disable-fp-elim < %s | FileCheck %s ; <rdar://problem/8124405> %struct.type = type { %struct.subtype*, i32, i8, i32, i8, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, [256 x i32], i32, [257 x i32], [257 x i32], i32*, i16*, i8*, i32, i32, i32, i32, i32, [256 x i8], [16 x i8], [256 x i8], [4096 x i8], [16 x i32], [18002 x i8], [18002 x i8], [6 x [258 x i8]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32*, i32*, i32* } diff --git a/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll b/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll index be7d94c4f2914..e96da94f5a3ae 100644 --- a/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll +++ b/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=i486 +; RUN: llc < %s -mcpu=core2 ; PR7375 ; ; This function contains a block (while.cond) with a lonely RFP use that is diff --git a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll index eaede30f9b552..1b339777f5710 100644 --- a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll +++ b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -combiner-alias-analysis -march=x86-64 | FileCheck %s +; RUN: llc < %s -combiner-alias-analysis -march=x86-64 -mcpu=core2 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.4" diff --git a/test/CodeGen/X86/2010-11-09-MOVLPS.ll b/test/CodeGen/X86/2010-11-09-MOVLPS.ll index 2368f3f69195d..710cb86f5374d 100644 --- a/test/CodeGen/X86/2010-11-09-MOVLPS.ll +++ b/test/CodeGen/X86/2010-11-09-MOVLPS.ll @@ -5,11 +5,11 @@ target triple = "x86_64-unknown-linux-gnu" module asm "\09.ident\09\22GCC: (GNU) 4.5.2 20100914 (prerelease) LLVM: 114628\22" +%"int[]" = type [4 x i32] %0 = type { %"int[]" } %float = type float %"float[]" = type [4 x float] %int = type i32 -%"int[]" = type [4 x i32] %"long unsigned int" = type i64 define void @swizzle(i8* %a, %0* %b, %0* %c) nounwind { diff --git a/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll b/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll index 07b1971218c30..c6f4b497af103 100644 --- a/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll +++ b/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s ; Reduced from JavaScriptCore %"class.JSC::CodeLocationCall" = type { [8 x i8] } diff --git a/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll b/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll new file mode 100644 index 0000000000000..a51dad03039e8 --- /dev/null +++ b/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -O0 -disable-fp-elim -relocation-model=pic -stats |& FileCheck %s +; +; This test should not cause any spilling with RAFast. +; +; CHECK: Number of copies coalesced +; CHECK-NOT: Number of stores added +; +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin10.0.0" + +%0 = type { i64, i64, i8*, i8* } +%1 = type opaque +%2 = type opaque +%3 = type <{ i8*, i32, i32, void (%4*)*, i8*, i64 }> +%4 = type { i8**, i32, i32, i8**, %5*, i64 } +%5 = type { i64, i64 } +%6 = type { i8*, i32, i32, i8*, %5* } + +@0 = external hidden constant %0 + +define hidden void @f() ssp { +bb: + %tmp5 = alloca i64, align 8 + %tmp6 = alloca void ()*, align 8 + %tmp7 = alloca %3, align 8 + store i64 0, i64* %tmp5, align 8 + br label %bb8 + +bb8: ; preds = %bb23, %bb + %tmp15 = getelementptr inbounds %3* %tmp7, i32 0, i32 4 + store i8* bitcast (%0* @0 to i8*), i8** %tmp15 + %tmp16 = bitcast %3* %tmp7 to void ()* + store void ()* %tmp16, void ()** %tmp6, align 8 + %tmp17 = load void ()** %tmp6, align 8 + %tmp18 = bitcast void ()* %tmp17 to %6* + %tmp19 = getelementptr inbounds %6* %tmp18, i32 0, i32 3 + %tmp20 = bitcast %6* %tmp18 to i8* + %tmp21 = load i8** %tmp19 + %tmp22 = bitcast i8* %tmp21 to void (i8*)* + call void %tmp22(i8* %tmp20) + br label %bb23 + +bb23: ; preds = %bb8 + %tmp24 = load i64* %tmp5, align 8 + %tmp25 = add i64 %tmp24, 1 + store i64 %tmp25, i64* %tmp5, align 8 + %tmp26 = icmp ult i64 %tmp25, 10 + br i1 %tmp26, label %bb8, label %bb27 + +bb27: ; preds = %bb23 + ret void +} diff --git a/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll b/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll new file mode 100644 index 0000000000000..114b985f71d44 --- /dev/null +++ b/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -march=x86-64 -stress-sched | FileCheck %s +; REQUIRES: asserts +; Test interference between physreg aliases during preRAsched. +; mul wants an operand in AL, but call clobbers it. + +define i8 @f(i8 %v1, i8 %v2) nounwind { +entry: +; CHECK: callq +; CHECK: movb %{{.*}}, %al +; CHECK: mulb +; CHECK: mulb + %rval = tail call i8 @bar() nounwind + %m1 = mul i8 %v1, %v2 + %m2 = mul i8 %m1, %rval + ret i8 %m2 +} + +declare i8 @bar() diff --git a/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll b/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll new file mode 100644 index 0000000000000..445fc01231e4d --- /dev/null +++ b/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll @@ -0,0 +1,45 @@ +; RUN: llc -mcpu=i686 -mattr=+mmx < %s | FileCheck %s +; ModuleID = 'tq.c' +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" +target triple = "i386-apple-macosx10.6.6" + +%0 = type { x86_mmx, x86_mmx, x86_mmx, x86_mmx, x86_mmx, x86_mmx, x86_mmx } + +define i32 @pixman_fill_mmx(i32* nocapture %bits, i32 %stride, i32 %bpp, i32 %x, i32 %y, i32 %width, i32 %height, i32 %xor) nounwind ssp { +entry: + %conv = zext i32 %xor to i64 + %shl = shl nuw i64 %conv, 32 + %or = or i64 %shl, %conv + %0 = bitcast i64 %or to x86_mmx +; CHECK: movq [[MMXR:%mm[0-7],]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} +; CHECK-NEXT: movq [[MMXR]] {{%mm[0-7]}} + %1 = tail call %0 asm "movq\09\09$7,\09$0\0Amovq\09\09$7,\09$1\0Amovq\09\09$7,\09$2\0Amovq\09\09$7,\09$3\0Amovq\09\09$7,\09$4\0Amovq\09\09$7,\09$5\0Amovq\09\09$7,\09$6\0A", "=&y,=&y,=&y,=&y,=&y,=&y,=y,y,~{dirflag},~{fpsr},~{flags}"(x86_mmx %0) nounwind, !srcloc !0 + %asmresult = extractvalue %0 %1, 0 + %asmresult6 = extractvalue %0 %1, 1 + %asmresult7 = extractvalue %0 %1, 2 + %asmresult8 = extractvalue %0 %1, 3 + %asmresult9 = extractvalue %0 %1, 4 + %asmresult10 = extractvalue %0 %1, 5 + %asmresult11 = extractvalue %0 %1, 6 +; CHECK: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, +; CHECK-NEXT: movq {{%mm[0-7]}}, + tail call void asm sideeffect "movq\09$1,\09 ($0)\0Amovq\09$2,\09 8($0)\0Amovq\09$3,\0916($0)\0Amovq\09$4,\0924($0)\0Amovq\09$5,\0932($0)\0Amovq\09$6,\0940($0)\0Amovq\09$7,\0948($0)\0Amovq\09$8,\0956($0)\0A", "r,y,y,y,y,y,y,y,y,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* undef, x86_mmx %0, x86_mmx %asmresult, x86_mmx %asmresult6, x86_mmx %asmresult7, x86_mmx %asmresult8, x86_mmx %asmresult9, x86_mmx %asmresult10, x86_mmx %asmresult11) nounwind, !srcloc !1 + tail call void @llvm.x86.mmx.emms() nounwind + ret i32 1 +} + +declare void @llvm.x86.mmx.emms() nounwind + +!0 = metadata !{i32 888, i32 917, i32 945, i32 973, i32 1001, i32 1029, i32 1057} +!1 = metadata !{i32 1390, i32 1430, i32 1469, i32 1508, i32 1547, i32 1586, i32 1625, i32 1664} diff --git a/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll b/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll new file mode 100644 index 0000000000000..7632034e13b5a --- /dev/null +++ b/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=x86-64 < %s -disable-fp-elim | FileCheck %s + +; This test is checking that we don't crash and we don't incorrectly fold +; a large displacement and a frame index into a single lea. +; <rdar://problem/9763308> + +declare void @bar([39 x i8]*) +define i32 @f(i64 %a, i64 %b) nounwind readnone { +entry: + %stack_main = alloca [39 x i8] + call void @bar([39 x i8]* %stack_main) + %tmp6 = add i64 %a, -2147483647 + %.sum = add i64 %tmp6, %b + %tmp8 = getelementptr inbounds [39 x i8]* %stack_main, i64 0, i64 %.sum + %tmp9 = load i8* %tmp8, align 1 + %tmp10 = sext i8 %tmp9 to i32 + ret i32 %tmp10 +} +; CHECK: f: +; CHECK: movsbl -2147483647 diff --git a/test/CodeGen/X86/4char-promote.ll b/test/CodeGen/X86/4char-promote.ll new file mode 100644 index 0000000000000..386057f0a3b68 --- /dev/null +++ b/test/CodeGen/X86/4char-promote.ll @@ -0,0 +1,17 @@ +; A test for checking PR 9623 +;RUN: llc -march=x86-64 -mcpu=corei7 -promote-elements < %s | FileCheck %s + +target triple = "x86_64-apple-darwin" + +; CHECK: pmulld +; CHECK: paddd +; CHECK: movdqa + +define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) { +entry: + %binop = mul <4 x i8> %x, %y + %binop6 = add <4 x i8> %binop, %x + ret <4 x i8> %binop6 +} + + diff --git a/test/CodeGen/X86/GC/simple_ocaml.ll b/test/CodeGen/X86/GC/simple_ocaml.ll deleted file mode 100644 index f765dc029da5a..0000000000000 --- a/test/CodeGen/X86/GC/simple_ocaml.ll +++ /dev/null @@ -1,42 +0,0 @@ -; RUN: llc < %s | grep caml.*__frametable -; RUN: llc < %s -march=x86 | grep {movl .0} - -%struct.obj = type { i8*, %struct.obj* } - -define %struct.obj* @fun(%struct.obj* %head) gc "ocaml" { -entry: - %gcroot.0 = alloca i8* - %gcroot.1 = alloca i8* - - call void @llvm.gcroot(i8** %gcroot.0, i8* null) - call void @llvm.gcroot(i8** %gcroot.1, i8* null) - - %local.0 = bitcast i8** %gcroot.0 to %struct.obj** - %local.1 = bitcast i8** %gcroot.1 to %struct.obj** - - store %struct.obj* %head, %struct.obj** %local.0 - br label %bb.loop -bb.loop: - %t0 = load %struct.obj** %local.0 - %t1 = getelementptr %struct.obj* %t0, i32 0, i32 1 - %t2 = bitcast %struct.obj* %t0 to i8* - %t3 = bitcast %struct.obj** %t1 to i8** - %t4 = call i8* @llvm.gcread(i8* %t2, i8** %t3) - %t5 = bitcast i8* %t4 to %struct.obj* - %t6 = icmp eq %struct.obj* %t5, null - br i1 %t6, label %bb.loop, label %bb.end -bb.end: - %t7 = malloc %struct.obj - store %struct.obj* %t7, %struct.obj** %local.1 - %t8 = bitcast %struct.obj* %t7 to i8* - %t9 = load %struct.obj** %local.0 - %t10 = getelementptr %struct.obj* %t9, i32 0, i32 1 - %t11 = bitcast %struct.obj* %t9 to i8* - %t12 = bitcast %struct.obj** %t10 to i8** - call void @llvm.gcwrite(i8* %t8, i8* %t11, i8** %t12) - ret %struct.obj* %t7 -} - -declare void @llvm.gcroot(i8** %value, i8* %tag) -declare void @llvm.gcwrite(i8* %value, i8* %obj, i8** %field) -declare i8* @llvm.gcread(i8* %obj, i8** %field) diff --git a/test/CodeGen/X86/adde-carry.ll b/test/CodeGen/X86/adde-carry.ll index 98c4f9934318f..e86adf4b17840 100644 --- a/test/CodeGen/X86/adde-carry.ll +++ b/test/CodeGen/X86/adde-carry.ll @@ -1,5 +1,4 @@ ; RUN: llc -march=x86-64 < %s | FileCheck %s -check-prefix=CHECK-64 -; RUN: llc -march=x86 < %s | FileCheck %s -check-prefix=CHECK-32 define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b, i64 %c) nounwind { entry: @@ -16,11 +15,6 @@ entry: store i64 %8, i64* %t, align 8 ret void -; CHECK-32: addl -; CHECK-32: adcl -; CHECK-32: adcl $0 -; CHECK-32: adcl $0 - ; CHECK-64: addq ; CHECK-64: adcq $0 } diff --git a/test/CodeGen/X86/allrem-moddi3.ll b/test/CodeGen/X86/allrem-moddi3.ll new file mode 100644 index 0000000000000..0c3d04f89afbb --- /dev/null +++ b/test/CodeGen/X86/allrem-moddi3.ll @@ -0,0 +1,19 @@ +; Test that, for a 64 bit signed rem, a libcall to allrem is made on Windows +; unless we have libgcc. + +; RUN: llc < %s -mtriple i386-pc-win32 | FileCheck %s +; RUN: llc < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEMODDI +; RUN: llc < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEMODDI +; PR10305 +; END. + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly { +entry: + %conv4 = sext i32 %argc to i64 + %div = srem i64 84, %conv4 + %conv7 = trunc i64 %div to i32 + ret i32 %conv7 +} + +; CHECK: allrem +; USEMODDI: moddi3 diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll index 96da224c8521f..6c569d624e060 100644 --- a/test/CodeGen/X86/asm-global-imm.ll +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -1,7 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | \ -; RUN: grep {test1 \$_GV} -; RUN: llc < %s -march=x86 -relocation-model=static | \ -; RUN: grep {test2 _GV} +; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s ; PR882 target datalayout = "e-p:32:32" @@ -10,7 +7,13 @@ target triple = "i686-apple-darwin9.0.0d2" @str = external global [12 x i8] ; <[12 x i8]*> [#uses=1] define void @foo() { -entry: +; CHECK: foo: +; CHECK-NOT: ret +; CHECK: test1 $_GV +; CHECK-NOT: ret +; CHECK: test2 _GV +; CHECK: ret + tail call void asm sideeffect "test1 $0", "i,~{dirflag},~{fpsr},~{flags}"( i32* @GV ) tail call void asm sideeffect "test2 ${0:c}", "i,~{dirflag},~{fpsr},~{flags}"( i32* @GV ) ret void diff --git a/test/CodeGen/X86/asm-label.ll b/test/CodeGen/X86/asm-label.ll new file mode 100644 index 0000000000000..1fc6e2eaf2b73 --- /dev/null +++ b/test/CodeGen/X86/asm-label.ll @@ -0,0 +1,40 @@ +; RUN: llc -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s + +; test that we print a label that we use. We had a bug where +; we would print the jump, but not the label because it was considered +; a fall through. + +; CHECK: jmp LBB0_9 +; CHECK: LBB0_9: ## %cleanup + +define void @foo() { +entry: + br i1 undef, label %land.lhs.true, label %if.end11 + +land.lhs.true: ; preds = %entry + br i1 undef, label %if.then, label %if.end11 + +if.then: ; preds = %land.lhs.true + br i1 undef, label %if.then9, label %if.end + +if.then9: ; preds = %if.then + br label %cleanup + +if.end: ; preds = %if.then + br label %cleanup + +cleanup: ; preds = %if.end, %if.then9 + switch i32 undef, label %unreachable [ + i32 0, label %cleanup.cont + i32 1, label %if.end11 + ] + +cleanup.cont: ; preds = %cleanup + br label %if.end11 + +if.end11: ; preds = %cleanup.cont, %cleanup, %land.lhs.true, %entry + ret void + +unreachable: ; preds = %cleanup + unreachable +} diff --git a/test/CodeGen/X86/asm-label2.ll b/test/CodeGen/X86/asm-label2.ll new file mode 100644 index 0000000000000..0b5de3403f382 --- /dev/null +++ b/test/CodeGen/X86/asm-label2.ll @@ -0,0 +1,22 @@ +; RUN: llc -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s + +; test that we print a label that we use. We had a bug where +; we would print the jump, but not the label because it was considered +; a fall through. + +; CHECK: jmp LBB0_1 +; CHECK: LBB0_1: + +define void @foobar() { +entry: + invoke void @_zed() + to label %invoke.cont unwind label %lpad + +invoke.cont: ; preds = %entry + ret void + +lpad: ; preds = %entry + unreachable +} + +declare void @_zed() ssp align 2 diff --git a/test/CodeGen/X86/atomic-or.ll b/test/CodeGen/X86/atomic-or.ll new file mode 100644 index 0000000000000..164252de3c15f --- /dev/null +++ b/test/CodeGen/X86/atomic-or.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; rdar://9692967 + +define void @t1(i64* %p, i32 %b) nounwind { +entry: + %p.addr = alloca i64*, align 8 + store i64* %p, i64** %p.addr, align 8 + %tmp = load i64** %p.addr, align 8 + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) +; CHECK: t1: +; CHECK: movl $2147483648, %eax +; CHECK: lock +; CHECK-NEXT: orq %r{{.*}}, (%r{{.*}}) + %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648) + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) + ret void +} + +define void @t2(i64* %p, i32 %b) nounwind { +entry: + %p.addr = alloca i64*, align 8 + store i64* %p, i64** %p.addr, align 8 + %tmp = load i64** %p.addr, align 8 + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) +; CHECK: t2: +; CHECK-NOT: movl +; CHECK: lock +; CHECK-NEXT: orq $2147483644, (%r{{.*}}) + %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483644) + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) + ret void +} + +declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/X86/avx-128.ll b/test/CodeGen/X86/avx-128.ll index 2bd3b5dfedd66..57a382613006b 100644 --- a/test/CodeGen/X86/avx-128.ll +++ b/test/CodeGen/X86/avx-128.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86 -mcpu=corei7 -mattr=avx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s @z = common global <4 x float> zeroinitializer, align 16 @@ -10,3 +10,45 @@ entry: ret void } +define void @fpext() nounwind uwtable { +entry: + %f = alloca float, align 4 + %d = alloca double, align 8 + %tmp = load float* %f, align 4 + ; CHECK: vcvtss2sd + %conv = fpext float %tmp to double + store double %conv, double* %d, align 8 + ret void +} + +; CHECK: vcvtsi2sdq (% +define double @funcA(i64* nocapture %e) nounwind uwtable readonly ssp { +entry: + %tmp1 = load i64* %e, align 8 + %conv = sitofp i64 %tmp1 to double + ret double %conv +} + +; CHECK: vcvtsi2sd (% +define double @funcB(i32* nocapture %e) nounwind uwtable readonly ssp { +entry: + %tmp1 = load i32* %e, align 4 + %conv = sitofp i32 %tmp1 to double + ret double %conv +} + +; CHECK: vcvtsi2ss (% +define float @funcC(i32* nocapture %e) nounwind uwtable readonly ssp { +entry: + %tmp1 = load i32* %e, align 4 + %conv = sitofp i32 %tmp1 to float + ret float %conv +} + +; CHECK: vcvtsi2ssq (% +define float @funcD(i64* nocapture %e) nounwind uwtable readonly ssp { +entry: + %tmp1 = load i64* %e, align 8 + %conv = sitofp i64 %tmp1 to float + ret float %conv +} diff --git a/test/CodeGen/X86/avx-256-arith.ll b/test/CodeGen/X86/avx-256-arith.ll new file mode 100644 index 0000000000000..5c512db0e2a23 --- /dev/null +++ b/test/CodeGen/X86/avx-256-arith.ll @@ -0,0 +1,116 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +; CHECK: vaddpd +define <4 x double> @addpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %add.i = fadd <4 x double> %x, %y + ret <4 x double> %add.i +} + +; CHECK: vaddpd LCP{{.*}}(%rip) +define <4 x double> @addpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %add.i = fadd <4 x double> %y, <double 4.500000e+00, double 3.400000e+00, double 2.300000e+00, double 1.200000e+00> + ret <4 x double> %add.i +} + +; CHECK: vaddps +define <8 x float> @addps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %add.i = fadd <8 x float> %x, %y + ret <8 x float> %add.i +} + +; CHECK: vaddps LCP{{.*}}(%rip) +define <8 x float> @addps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %add.i = fadd <8 x float> %y, <float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000> + ret <8 x float> %add.i +} + +; CHECK: vsubpd +define <4 x double> @subpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %sub.i = fsub <4 x double> %x, %y + ret <4 x double> %sub.i +} + +; CHECK: vsubpd (% +define <4 x double> @subpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp { +entry: + %tmp2 = load <4 x double>* %x, align 32 + %sub.i = fsub <4 x double> %y, %tmp2 + ret <4 x double> %sub.i +} + +; CHECK: vsubps +define <8 x float> @subps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %sub.i = fsub <8 x float> %x, %y + ret <8 x float> %sub.i +} + +; CHECK: vsubps (% +define <8 x float> @subps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp { +entry: + %tmp2 = load <8 x float>* %x, align 32 + %sub.i = fsub <8 x float> %y, %tmp2 + ret <8 x float> %sub.i +} + +; CHECK: vmulpd +define <4 x double> @mulpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %mul.i = fmul <4 x double> %x, %y + ret <4 x double> %mul.i +} + +; CHECK: vmulpd LCP{{.*}}(%rip) +define <4 x double> @mulpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %mul.i = fmul <4 x double> %y, <double 4.500000e+00, double 3.400000e+00, double 2.300000e+00, double 1.200000e+00> + ret <4 x double> %mul.i +} + +; CHECK: vmulps +define <8 x float> @mulps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %mul.i = fmul <8 x float> %x, %y + ret <8 x float> %mul.i +} + +; CHECK: vmulps LCP{{.*}}(%rip) +define <8 x float> @mulps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %mul.i = fmul <8 x float> %y, <float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000> + ret <8 x float> %mul.i +} + +; CHECK: vdivpd +define <4 x double> @divpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %div.i = fdiv <4 x double> %x, %y + ret <4 x double> %div.i +} + +; CHECK: vdivpd LCP{{.*}}(%rip) +define <4 x double> @divpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %div.i = fdiv <4 x double> %y, <double 4.500000e+00, double 3.400000e+00, double 2.300000e+00, double 1.200000e+00> + ret <4 x double> %div.i +} + +; CHECK: vdivps +define <8 x float> @divps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %div.i = fdiv <8 x float> %x, %y + ret <8 x float> %div.i +} + +; CHECK: vdivps LCP{{.*}}(%rip) +define <8 x float> @divps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %div.i = fdiv <8 x float> %y, <float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000> + ret <8 x float> %div.i +} + diff --git a/test/CodeGen/X86/avx-256-arith.s b/test/CodeGen/X86/avx-256-arith.s new file mode 100644 index 0000000000000..e69de29bb2d1d --- /dev/null +++ b/test/CodeGen/X86/avx-256-arith.s diff --git a/test/CodeGen/X86/avx-256-logic.ll b/test/CodeGen/X86/avx-256-logic.ll new file mode 100644 index 0000000000000..d9e5d081fb1f7 --- /dev/null +++ b/test/CodeGen/X86/avx-256-logic.ll @@ -0,0 +1,161 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +; CHECK: vandpd +define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %x to <4 x i64> + %1 = bitcast <4 x double> %y to <4 x i64> + %and.i = and <4 x i64> %0, %1 + %2 = bitcast <4 x i64> %and.i to <4 x double> + ret <4 x double> %2 +} + +; CHECK: vandpd LCP{{.*}}(%rip) +define <4 x double> @andpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %y to <4 x i64> + %and.i = and <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> + %1 = bitcast <4 x i64> %and.i to <4 x double> + ret <4 x double> %1 +} + +; CHECK: vandps +define <8 x float> @andps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %x to <8 x i32> + %1 = bitcast <8 x float> %y to <8 x i32> + %and.i = and <8 x i32> %0, %1 + %2 = bitcast <8 x i32> %and.i to <8 x float> + ret <8 x float> %2 +} + +; CHECK: vandps LCP{{.*}}(%rip) +define <8 x float> @andps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %y to <8 x i32> + %and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> + %1 = bitcast <8 x i32> %and.i to <8 x float> + ret <8 x float> %1 +} + +; CHECK: vxorpd +define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %x to <4 x i64> + %1 = bitcast <4 x double> %y to <4 x i64> + %xor.i = xor <4 x i64> %0, %1 + %2 = bitcast <4 x i64> %xor.i to <4 x double> + ret <4 x double> %2 +} + +; CHECK: vxorpd LCP{{.*}}(%rip) +define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %y to <4 x i64> + %xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> + %1 = bitcast <4 x i64> %xor.i to <4 x double> + ret <4 x double> %1 +} + +; CHECK: vxorps +define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %x to <8 x i32> + %1 = bitcast <8 x float> %y to <8 x i32> + %xor.i = xor <8 x i32> %0, %1 + %2 = bitcast <8 x i32> %xor.i to <8 x float> + ret <8 x float> %2 +} + +; CHECK: vxorps LCP{{.*}}(%rip) +define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %y to <8 x i32> + %xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> + %1 = bitcast <8 x i32> %xor.i to <8 x float> + ret <8 x float> %1 +} + +; CHECK: vorpd +define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %x to <4 x i64> + %1 = bitcast <4 x double> %y to <4 x i64> + %or.i = or <4 x i64> %0, %1 + %2 = bitcast <4 x i64> %or.i to <4 x double> + ret <4 x double> %2 +} + +; CHECK: vorpd LCP{{.*}}(%rip) +define <4 x double> @orpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %y to <4 x i64> + %or.i = or <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> + %1 = bitcast <4 x i64> %or.i to <4 x double> + ret <4 x double> %1 +} + +; CHECK: vorps +define <8 x float> @orps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %x to <8 x i32> + %1 = bitcast <8 x float> %y to <8 x i32> + %or.i = or <8 x i32> %0, %1 + %2 = bitcast <8 x i32> %or.i to <8 x float> + ret <8 x float> %2 +} + +; CHECK: vorps LCP{{.*}}(%rip) +define <8 x float> @orps256fold(<8 x float> %y) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %y to <8 x i32> + %or.i = or <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> + %1 = bitcast <8 x i32> %or.i to <8 x float> + ret <8 x float> %1 +} + +; CHECK: vandnpd +define <4 x double> @andnotpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <4 x double> %x to <4 x i64> + %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> + %1 = bitcast <4 x double> %y to <4 x i64> + %and.i = and <4 x i64> %1, %neg.i + %2 = bitcast <4 x i64> %and.i to <4 x double> + ret <4 x double> %2 +} + +; CHECK: vandnpd (% +define <4 x double> @andnotpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp { +entry: + %tmp2 = load <4 x double>* %x, align 32 + %0 = bitcast <4 x double> %y to <4 x i64> + %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> + %1 = bitcast <4 x double> %tmp2 to <4 x i64> + %and.i = and <4 x i64> %1, %neg.i + %2 = bitcast <4 x i64> %and.i to <4 x double> + ret <4 x double> %2 +} + +; CHECK: vandnps +define <8 x float> @andnotps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { +entry: + %0 = bitcast <8 x float> %x to <8 x i32> + %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> + %1 = bitcast <8 x float> %y to <8 x i32> + %and.i = and <8 x i32> %1, %neg.i + %2 = bitcast <8 x i32> %and.i to <8 x float> + ret <8 x float> %2 +} + +; CHECK: vandnps (% +define <8 x float> @andnotps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp { +entry: + %tmp2 = load <8 x float>* %x, align 32 + %0 = bitcast <8 x float> %y to <8 x i32> + %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> + %1 = bitcast <8 x float> %tmp2 to <8 x i32> + %and.i = and <8 x i32> %1, %neg.i + %2 = bitcast <8 x i32> %and.i to <8 x float> + ret <8 x float> %2 +} diff --git a/test/CodeGen/X86/avx-load-store.ll b/test/CodeGen/X86/avx-load-store.ll new file mode 100644 index 0000000000000..5196089e4bc8d --- /dev/null +++ b/test/CodeGen/X86/avx-load-store.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +; CHECK: vmovaps +; CHECK: vmovaps +; CHECK: vmovapd +; CHECK: vmovapd +; CHECK: vmovaps +; CHECK: vmovaps +define void @test_256_load(double* nocapture %d, float* nocapture %f, <4 x i64>* nocapture %i) nounwind uwtable ssp { +entry: + %0 = bitcast double* %d to <4 x double>* + %tmp1.i = load <4 x double>* %0, align 32 + %1 = bitcast float* %f to <8 x float>* + %tmp1.i17 = load <8 x float>* %1, align 32 + %tmp1.i16 = load <4 x i64>* %i, align 32 + tail call void @dummy(<4 x double> %tmp1.i, <8 x float> %tmp1.i17, <4 x i64> %tmp1.i16) nounwind + store <4 x double> %tmp1.i, <4 x double>* %0, align 32 + store <8 x float> %tmp1.i17, <8 x float>* %1, align 32 + store <4 x i64> %tmp1.i16, <4 x i64>* %i, align 32 + ret void +} + +declare void @dummy(<4 x double>, <8 x float>, <4 x i64>) + diff --git a/test/CodeGen/X86/bswap.ll b/test/CodeGen/X86/bswap.ll index 0a72c1c47845b..a7540aafa9b4a 100644 --- a/test/CodeGen/X86/bswap.ll +++ b/test/CodeGen/X86/bswap.ll @@ -1,8 +1,6 @@ ; bswap should be constant folded when it is passed a constant argument -; RUN: llc < %s -march=x86 | \ -; RUN: grep bswapl | count 3 -; RUN: llc < %s -march=x86 | grep rolw | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s declare i16 @llvm.bswap.i16(i16) @@ -11,17 +9,51 @@ declare i32 @llvm.bswap.i32(i32) declare i64 @llvm.bswap.i64(i64) define i16 @W(i16 %A) { +; CHECK: W: +; CHECK: rolw $8, %ax %Z = call i16 @llvm.bswap.i16( i16 %A ) ; <i16> [#uses=1] ret i16 %Z } define i32 @X(i32 %A) { +; CHECK: X: +; CHECK: bswapl %eax %Z = call i32 @llvm.bswap.i32( i32 %A ) ; <i32> [#uses=1] ret i32 %Z } define i64 @Y(i64 %A) { +; CHECK: Y: +; CHECK: bswapl %eax +; CHECK: bswapl %edx %Z = call i64 @llvm.bswap.i64( i64 %A ) ; <i64> [#uses=1] ret i64 %Z } +; rdar://9164521 +define i32 @test1(i32 %a) nounwind readnone { +entry: +; CHECK: test1 +; CHECK: bswapl %eax +; CHECK: shrl $16, %eax + %and = lshr i32 %a, 8 + %shr3 = and i32 %and, 255 + %and2 = shl i32 %a, 8 + %shl = and i32 %and2, 65280 + %or = or i32 %shr3, %shl + ret i32 %or +} + +define i32 @test2(i32 %a) nounwind readnone { +entry: +; CHECK: test2 +; CHECK: bswapl %eax +; CHECK: sarl $16, %eax + %and = lshr i32 %a, 8 + %shr4 = and i32 %and, 255 + %and2 = shl i32 %a, 8 + %or = or i32 %shr4, %and2 + %sext = shl i32 %or, 16 + %conv3 = ashr exact i32 %sext, 16 + ret i32 %conv3 +} diff --git a/test/CodeGen/X86/byval2.ll b/test/CodeGen/X86/byval2.ll index 03a9f0fb742a9..196efe58e6f3e 100644 --- a/test/CodeGen/X86/byval2.ll +++ b/test/CodeGen/X86/byval2.ll @@ -37,8 +37,8 @@ entry: store i64 %b, i64* %tmp2, align 16 %tmp4 = getelementptr %struct.s* %d, i32 0, i32 2 store i64 %c, i64* %tmp4, align 16 - call void @f( %struct.s* %d byval) - call void @f( %struct.s* %d byval) + call void @f( %struct.s*byval %d ) + call void @f( %struct.s*byval %d ) ret void } diff --git a/test/CodeGen/X86/byval3.ll b/test/CodeGen/X86/byval3.ll index 8d5bb6d972d73..f3b125c6e3bac 100644 --- a/test/CodeGen/X86/byval3.ll +++ b/test/CodeGen/X86/byval3.ll @@ -45,8 +45,8 @@ entry: store i32 %a5, i32* %tmp8, align 16 %tmp10 = getelementptr %struct.s* %d, i32 0, i32 5 store i32 %a6, i32* %tmp10, align 16 - call void @f( %struct.s* %d byval) - call void @f( %struct.s* %d byval) + call void @f( %struct.s* byval %d) + call void @f( %struct.s* byval %d) ret void } diff --git a/test/CodeGen/X86/byval4.ll b/test/CodeGen/X86/byval4.ll index ae1a79a1e103b..b7a4aa3f9b016 100644 --- a/test/CodeGen/X86/byval4.ll +++ b/test/CodeGen/X86/byval4.ll @@ -51,8 +51,8 @@ entry: store i16 %a5, i16* %tmp8, align 16 %tmp10 = getelementptr %struct.s* %a, i32 0, i32 5 store i16 %a6, i16* %tmp10, align 16 - call void @f( %struct.s* %a byval ) - call void @f( %struct.s* %a byval ) + call void @f( %struct.s* byval %a ) + call void @f( %struct.s* byval %a ) ret void } diff --git a/test/CodeGen/X86/byval5.ll b/test/CodeGen/X86/byval5.ll index a376709d7346d..dca093602241f 100644 --- a/test/CodeGen/X86/byval5.ll +++ b/test/CodeGen/X86/byval5.ll @@ -59,8 +59,8 @@ entry: store i8 %a5, i8* %tmp8, align 8 %tmp10 = getelementptr %struct.s* %a, i32 0, i32 5 store i8 %a6, i8* %tmp10, align 8 - call void @f( %struct.s* %a byval ) - call void @f( %struct.s* %a byval ) + call void @f( %struct.s* byval %a ) + call void @f( %struct.s* byval %a ) ret void } diff --git a/test/CodeGen/X86/change-compare-stride-0.ll b/test/CodeGen/X86/change-compare-stride-0.ll index d520a6ff13b24..3a383ee9c1d6b 100644 --- a/test/CodeGen/X86/change-compare-stride-0.ll +++ b/test/CodeGen/X86/change-compare-stride-0.ll @@ -1,11 +1,14 @@ -; RUN: llc < %s -march=x86 > %t -; RUN: grep {cmpl \$-478,} %t -; RUN: not grep inc %t -; RUN: not grep {leal 1(} %t -; RUN: not grep {leal -1(} %t -; RUN: grep dec %t | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind { +; CHECK: borf: +; CHECK-NOT: inc +; CHECK-NOT: leal 1( +; CHECK-NOT: leal -1( +; CHECK: decl +; CHECK-NEXT: cmpl $-478 +; CHECK: ret + bb4.thread: br label %bb2.outer diff --git a/test/CodeGen/X86/change-compare-stride-1.ll b/test/CodeGen/X86/change-compare-stride-1.ll index a9ddbdb7f745a..eee3b79acfafb 100644 --- a/test/CodeGen/X86/change-compare-stride-1.ll +++ b/test/CodeGen/X86/change-compare-stride-1.ll @@ -1,11 +1,14 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: grep {cmpq \$-478,} %t -; RUN: not grep inc %t -; RUN: not grep {leal 1(} %t -; RUN: not grep {leal -1(} %t -; RUN: grep dec %t | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind { +; CHECK: borf: +; CHECK-NOT: inc +; CHECK-NOT: leal 1( +; CHECK-NOT: leal -1( +; CHECK: decq +; CHECK-NEXT: cmpq $-478 +; CHECK: ret + bb4.thread: br label %bb2.outer diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-1.ll b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll index cb638092ea1a3..a3933e2e00a48 100644 --- a/test/CodeGen/X86/change-compare-stride-trickiness-1.ll +++ b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll @@ -1,6 +1,4 @@ -; RUN: llc %s -o - --x86-asm-syntax=att | grep {cmp. \$10} -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-apple-darwin9" +; RUN: llc -march=x86 < %s | FileCheck %s ; The comparison happens after the relevant use, so the stride can easily ; be changed. The comparison can be done in a narrower mode than the @@ -9,6 +7,11 @@ target triple = "x86_64-apple-darwin9" ; could be made simpler. define void @foo() nounwind { +; CHECK: foo: +; CHECK-NOT: ret +; CHECK: cmpl $10 +; CHECK: ret + entry: br label %loop diff --git a/test/CodeGen/X86/coalescer-cross.ll b/test/CodeGen/X86/coalescer-cross.ll index 976db6479e090..3f1fec131214f 100644 --- a/test/CodeGen/X86/coalescer-cross.ll +++ b/test/CodeGen/X86/coalescer-cross.ll @@ -5,8 +5,8 @@ ; CHECK: os_clock ; CHECK-NOT: movaps - type { %struct.TValue } ; type %0 - type { %struct.L_Umaxalign, i32, %struct.Node* } ; type %1 + %0 = type { %struct.TValue } ; type %0 + %1 = type { %struct.L_Umaxalign, i32, %struct.Node* } ; type %1 %struct.CallInfo = type { %struct.TValue*, %struct.TValue*, %struct.TValue*, i32*, i32, i32 } %struct.GCObject = type { %struct.lua_State } %struct.L_Umaxalign = type { double } diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index 7c4e64cdf6f29..b5b1ad45be0c2 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -215,3 +215,104 @@ bb2: } declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readnone + +; PR10277 +; This test has dead code elimination caused by remat during spilling. +; DCE causes a live interval to break into connected components. +; One of the components is spilled. + +%t2 = type { i8 } +%t9 = type { %t10 } +%t10 = type { %t11 } +%t11 = type { %t12 } +%t12 = type { %t13*, %t13*, %t13* } +%t13 = type { %t14*, %t15, %t15 } +%t14 = type opaque +%t15 = type { i8, i32, i32 } +%t16 = type { %t17, i8* } +%t17 = type { %t18 } +%t18 = type { %t19 } +%t19 = type { %t20*, %t20*, %t20* } +%t20 = type { i32, i32 } +%t21 = type { %t13* } + +define void @_ZNK4llvm17MipsFrameLowering12emitPrologueERNS_15MachineFunctionE() ssp align 2 { +bb: + %tmp = load %t9** undef, align 4, !tbaa !0 + %tmp2 = getelementptr inbounds %t9* %tmp, i32 0, i32 0 + %tmp3 = getelementptr inbounds %t9* %tmp, i32 0, i32 0, i32 0, i32 0, i32 1 + br label %bb4 + +bb4: ; preds = %bb37, %bb + %tmp5 = phi i96 [ undef, %bb ], [ %tmp38, %bb37 ] + %tmp6 = phi i96 [ undef, %bb ], [ %tmp39, %bb37 ] + br i1 undef, label %bb34, label %bb7 + +bb7: ; preds = %bb4 + %tmp8 = load i32* undef, align 4 + %tmp9 = and i96 %tmp6, 4294967040 + %tmp10 = zext i32 %tmp8 to i96 + %tmp11 = shl nuw nsw i96 %tmp10, 32 + %tmp12 = or i96 %tmp9, %tmp11 + %tmp13 = or i96 %tmp12, 1 + %tmp14 = load i32* undef, align 4 + %tmp15 = and i96 %tmp5, 4294967040 + %tmp16 = zext i32 %tmp14 to i96 + %tmp17 = shl nuw nsw i96 %tmp16, 32 + %tmp18 = or i96 %tmp15, %tmp17 + %tmp19 = or i96 %tmp18, 1 + %tmp20 = load i8* undef, align 1 + %tmp21 = and i8 %tmp20, 1 + %tmp22 = icmp ne i8 %tmp21, 0 + %tmp23 = select i1 %tmp22, i96 %tmp19, i96 %tmp13 + %tmp24 = select i1 %tmp22, i96 %tmp13, i96 %tmp19 + store i96 %tmp24, i96* undef, align 4 + %tmp25 = load %t13** %tmp3, align 4 + %tmp26 = icmp eq %t13* %tmp25, undef + br i1 %tmp26, label %bb28, label %bb27 + +bb27: ; preds = %bb7 + br label %bb29 + +bb28: ; preds = %bb7 + call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* byval align 4 undef, %t13* undef) + br label %bb29 + +bb29: ; preds = %bb28, %bb27 + store i96 %tmp23, i96* undef, align 4 + %tmp30 = load %t13** %tmp3, align 4 + br i1 false, label %bb33, label %bb31 + +bb31: ; preds = %bb29 + %tmp32 = getelementptr inbounds %t13* %tmp30, i32 1 + store %t13* %tmp32, %t13** %tmp3, align 4 + br label %bb37 + +bb33: ; preds = %bb29 + unreachable + +bb34: ; preds = %bb4 + br i1 undef, label %bb36, label %bb35 + +bb35: ; preds = %bb34 + store %t13* null, %t13** %tmp3, align 4 + br label %bb37 + +bb36: ; preds = %bb34 + call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* byval align 4 undef, %t13* undef) + br label %bb37 + +bb37: ; preds = %bb36, %bb35, %bb31 + %tmp38 = phi i96 [ %tmp23, %bb31 ], [ %tmp5, %bb35 ], [ %tmp5, %bb36 ] + %tmp39 = phi i96 [ %tmp24, %bb31 ], [ %tmp6, %bb35 ], [ %tmp6, %bb36 ] + %tmp40 = add i32 undef, 1 + br label %bb4 +} + +declare %t14* @_ZN4llvm9MCContext16CreateTempSymbolEv(%t2*) + +declare void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10*, %t21* byval align 4, %t13*) + +declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind + +declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind diff --git a/test/CodeGen/X86/dag-rauw-cse.ll b/test/CodeGen/X86/dag-rauw-cse.ll index edcfeb78a4d0c..eca8c8641a200 100644 --- a/test/CodeGen/X86/dag-rauw-cse.ll +++ b/test/CodeGen/X86/dag-rauw-cse.ll @@ -1,7 +1,11 @@ -; RUN: llc < %s -march=x86 | grep {orl \$1} +; RUN: llc < %s -march=x86 | FileCheck %s ; PR3018 define i32 @test(i32 %A) nounwind { +; CHECK: test: +; CHECK-NOT: ret +; CHECK: orl $1 +; CHECK: ret %B = or i32 %A, 1 %C = or i32 %B, 1 %D = and i32 %C, 7057 diff --git a/test/CodeGen/X86/darwin-bzero.ll b/test/CodeGen/X86/darwin-bzero.ll index a9573cfc6a2ac..3099526028abb 100644 --- a/test/CodeGen/X86/darwin-bzero.ll +++ b/test/CodeGen/X86/darwin-bzero.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep __bzero -declare void @llvm.memset.i32(i8*, i8, i32, i32) +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind define void @foo(i8* %p, i32 %len) { - call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1) + call void @llvm.memset.p0i8.i32(i8* %p, i8 0, i32 %len, i32 1, i1 false) ret void } diff --git a/test/CodeGen/X86/dbg-i128-const.ll b/test/CodeGen/X86/dbg-i128-const.ll new file mode 100644 index 0000000000000..fb83fca4b7e6c --- /dev/null +++ b/test/CodeGen/X86/dbg-i128-const.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s | FileCheck %s + +; CHECK: DW_AT_const_value +; CHECK-NEXT: 42 + +define i128 @__foo(i128 %a, i128 %b) nounwind { +entry: + tail call void @llvm.dbg.value(metadata !0, i64 0, metadata !1), !dbg !11 + %add = add i128 %a, %b, !dbg !11 + ret i128 %add, !dbg !11 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!0 = metadata !{i128 42 } +!1 = metadata !{i32 524544, metadata !2, metadata !"MAX", metadata !4, i32 29, metadata !8} ; [ DW_TAG_auto_variable ] +!2 = metadata !{i32 524299, metadata !3, i32 26, i32 0} ; [ DW_TAG_lexical_block ] +!3 = metadata !{i32 524334, i32 0, metadata !4, metadata !"__foo", metadata !"__foo", metadata !"__foo", metadata !4, i32 26, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ] +!4 = metadata !{i32 524329, metadata !"foo.c", metadata !"/tmp", metadata !5} ; [ DW_TAG_file_type ] +!5 = metadata !{i32 524305, i32 0, i32 1, metadata !"foo.c", metadata !"/tmp", metadata !"clang", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!6 = metadata !{i32 524309, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] +!7 = metadata !{metadata !8, metadata !8, metadata !8} +!8 = metadata !{i32 524310, metadata !4, metadata !"ti_int", metadata !9, i32 78, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] +!9 = metadata !{i32 524329, metadata !"myint.h", metadata !"/tmp", metadata !5} ; [ DW_TAG_file_type ] +!10 = metadata !{i32 524324, metadata !4, metadata !"", metadata !4, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!11 = metadata !{i32 29, i32 0, metadata !2, null} diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll index 08e3272a37075..87c1be51f1ac3 100644 --- a/test/CodeGen/X86/divide-by-constant.ll +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -40,7 +40,7 @@ entry: %div = sdiv i16 %x, 33 ; <i32> [#uses=1] ret i16 %div ; CHECK: test4: -; CHECK: imull $1986, %eax, %eax +; CHECK: imull $1986, %eax, % } define i32 @test5(i32 %A) nounwind { diff --git a/test/CodeGen/X86/fast-isel-bail.ll b/test/CodeGen/X86/fast-isel-bail.ll index 9072c5c7b5937..a485827be96d5 100644 --- a/test/CodeGen/X86/fast-isel-bail.ll +++ b/test/CodeGen/X86/fast-isel-bail.ll @@ -3,7 +3,7 @@ ; This file is for regression tests for cases where FastISel needs ; to gracefully bail out and let SelectionDAGISel take over. - type { i64, i8* } ; type %0 + %0 = type { i64, i8* } ; type %0 declare void @bar(%0) diff --git a/test/CodeGen/X86/fast-isel-call.ll b/test/CodeGen/X86/fast-isel-call.ll index 2fbe4e27bf0fc..3159741cd9c4a 100644 --- a/test/CodeGen/X86/fast-isel-call.ll +++ b/test/CodeGen/X86/fast-isel-call.ll @@ -14,12 +14,12 @@ BB2: ; CHECK: calll ; CHECK-NEXT: testb $1 } -declare i1 @foo() zeroext nounwind +declare zeroext i1 @foo() nounwind declare void @foo2(%struct.s* byval) define void @test2(%struct.s* %d) nounwind { - call void @foo2(%struct.s* %d byval) + call void @foo2(%struct.s* byval %d ) ret void ; CHECK: test2: ; CHECK: movl (%eax) diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll index 48abfd0f26e57..1a2e34ec7f5c4 100644 --- a/test/CodeGen/X86/fast-isel-gep.ll +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -24,7 +24,7 @@ define i32 @test2(i64 %t3, i32* %t1) nounwind { %t15 = load i32* %t9 ; <i32> [#uses=1] ret i32 %t15 ; X32: test2: -; X32: movl (%edx,%ecx,4), %eax +; X32: movl (%edx,%ecx,4), %e ; X32: ret ; X64: test2: diff --git a/test/CodeGen/X86/fma.ll b/test/CodeGen/X86/fma.ll new file mode 100644 index 0000000000000..5deedb9dd9b17 --- /dev/null +++ b/test/CodeGen/X86/fma.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s + +; CHECK: test_f32 +; CHECK: _fmaf + +define float @test_f32(float %a, float %b, float %c) nounwind readnone ssp { +entry: + %call = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone + ret float %call +} + +; CHECK: test_f64 +; CHECK: _fma + +define double @test_f64(double %a, double %b, double %c) nounwind readnone ssp { +entry: + %call = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone + ret double %call +} + +; CHECK: test_f80 +; CHECK: _fmal + +define x86_fp80 @test_f80(x86_fp80 %a, x86_fp80 %b, x86_fp80 %c) nounwind readnone ssp { +entry: + %call = tail call x86_fp80 @llvm.fma.f80(x86_fp80 %a, x86_fp80 %b, x86_fp80 %c) nounwind readnone + ret x86_fp80 %call +} + +declare float @llvm.fma.f32(float, float, float) nounwind readnone +declare double @llvm.fma.f64(double, double, double) nounwind readnone +declare x86_fp80 @llvm.fma.f80(x86_fp80, x86_fp80, x86_fp80) nounwind readnone diff --git a/test/CodeGen/X86/fold-add.ll b/test/CodeGen/X86/fold-add.ll index 5e80ea5478909..63e7d36ada256 100644 --- a/test/CodeGen/X86/fold-add.ll +++ b/test/CodeGen/X86/fold-add.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep {cmpb \$0, (%r.\*,%r.\*)} +; RUN: llc < %s -march=x86-64 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.6" @@ -7,6 +7,11 @@ target triple = "x86_64-apple-darwin9.6" @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i32)* @longest_match to i8*)] ; <[1 x i8*]*> [#uses=0] define fastcc i32 @longest_match(i32 %cur_match) nounwind { +; CHECK: longest_match: +; CHECK-NOT: ret +; CHECK: cmpb $0, (%r{{.*}},%r{{.*}}) +; CHECK: ret + entry: %0 = load i32* @prev_length, align 4 ; <i32> [#uses=3] %1 = zext i32 %cur_match to i64 ; <i64> [#uses=1] diff --git a/test/CodeGen/X86/fold-sext-trunc.ll b/test/CodeGen/X86/fold-sext-trunc.ll index 2605123d6dd49..b453310608ec4 100644 --- a/test/CodeGen/X86/fold-sext-trunc.ll +++ b/test/CodeGen/X86/fold-sext-trunc.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86-64 | grep movslq | count 1 ; PR4050 - type { i64 } ; type %0 + %0 = type { i64 } ; type %0 %struct.S1 = type { i16, i32 } @g_10 = external global %struct.S1 ; <%struct.S1*> [#uses=2] diff --git a/test/CodeGen/X86/fp-stack-2results.ll b/test/CodeGen/X86/fp-stack-2results.ll index 321e267cb2fa0..c8da9ea02518d 100644 --- a/test/CodeGen/X86/fp-stack-2results.ll +++ b/test/CodeGen/X86/fp-stack-2results.ll @@ -1,12 +1,16 @@ ; RUN: llc < %s -march=x86 | grep fldz ; RUN: llc < %s -march=x86-64 | grep fld1 +%0 = type { x86_fp80, x86_fp80 } + ; This is basically this code on x86-64: ; _Complex long double test() { return 1.0; } -define {x86_fp80, x86_fp80} @test() { +define %0 @test() { %A = fpext double 1.0 to x86_fp80 %B = fpext double 0.0 to x86_fp80 - ret x86_fp80 %A, x86_fp80 %B + %mrv = insertvalue %0 undef, x86_fp80 %A, 0 + %mrv1 = insertvalue %0 %mrv, x86_fp80 %B, 1 + ret %0 %mrv1 } @@ -14,46 +18,48 @@ define {x86_fp80, x86_fp80} @test() { ; fld1 ; fld %st(0) ; ret -define {x86_fp80, x86_fp80} @test2() { +define %0 @test2() { %A = fpext double 1.0 to x86_fp80 - ret x86_fp80 %A, x86_fp80 %A + %mrv = insertvalue %0 undef, x86_fp80 %A, 0 + %mrv1 = insertvalue %0 %mrv, x86_fp80 %A, 1 + ret %0 %mrv1 } ; Uses both values. define void @call1(x86_fp80 *%P1, x86_fp80 *%P2) { - %a = call {x86_fp80,x86_fp80} @test() - %b = getresult {x86_fp80,x86_fp80} %a, 0 + %a = call %0 @test() + %b = extractvalue %0 %a, 0 store x86_fp80 %b, x86_fp80* %P1 - %c = getresult {x86_fp80,x86_fp80} %a, 1 + %c = extractvalue %0 %a, 1 store x86_fp80 %c, x86_fp80* %P2 ret void } ; Uses both values, requires fxch define void @call2(x86_fp80 *%P1, x86_fp80 *%P2) { - %a = call {x86_fp80,x86_fp80} @test() - %b = getresult {x86_fp80,x86_fp80} %a, 1 + %a = call %0 @test() + %b = extractvalue %0 %a, 1 store x86_fp80 %b, x86_fp80* %P1 - %c = getresult {x86_fp80,x86_fp80} %a, 0 + %c = extractvalue %0 %a, 0 store x86_fp80 %c, x86_fp80* %P2 ret void } ; Uses ST(0), ST(1) is dead but must be popped. define void @call3(x86_fp80 *%P1, x86_fp80 *%P2) { - %a = call {x86_fp80,x86_fp80} @test() - %b = getresult {x86_fp80,x86_fp80} %a, 0 + %a = call %0 @test() + %b = extractvalue %0 %a, 0 store x86_fp80 %b, x86_fp80* %P1 ret void } ; Uses ST(1), ST(0) is dead and must be popped. define void @call4(x86_fp80 *%P1, x86_fp80 *%P2) { - %a = call {x86_fp80,x86_fp80} @test() + %a = call %0 @test() - %c = getresult {x86_fp80,x86_fp80} %a, 1 + %c = extractvalue %0 %a, 1 store x86_fp80 %c, x86_fp80* %P2 ret void } diff --git a/test/CodeGen/X86/fp-stack-O0.ll b/test/CodeGen/X86/fp-stack-O0.ll new file mode 100644 index 0000000000000..b9cb5d7894c74 --- /dev/null +++ b/test/CodeGen/X86/fp-stack-O0.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -O0 | FileCheck %s +target triple = "x86_64-apple-macosx" + +declare x86_fp80 @x1(i32) nounwind +declare i32 @x2(x86_fp80, x86_fp80) nounwind + +; Keep track of the return value. +; CHECK: test1 +; CHECK: x1 +; Pass arguments on the stack. +; CHECK-NEXT: movq %rsp, [[RCX:%r..]] +; Copy constant-pool value. +; CHECK-NEXT: fldt LCPI +; CHECK-NEXT: fstpt 16([[RCX]]) +; Copy x1 return value. +; CHECK-NEXT: fstpt ([[RCX]]) +; CHECK-NEXT: x2 +define i32 @test1() nounwind uwtable ssp { +entry: + %call = call x86_fp80 (...)* bitcast (x86_fp80 (i32)* @x1 to x86_fp80 (...)*)(i32 -1) + %call1 = call i32 @x2(x86_fp80 %call, x86_fp80 0xK401EFFFFFFFF00000000) + ret i32 %call1 +} + diff --git a/test/CodeGen/X86/fp-stack-ret.ll b/test/CodeGen/X86/fp-stack-ret.ll index c83a0cbf69e0c..1307f70ead17d 100644 --- a/test/CodeGen/X86/fp-stack-ret.ll +++ b/test/CodeGen/X86/fp-stack-ret.ll @@ -1,25 +1,40 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t -; RUN: grep fldl %t | count 1 -; RUN: not grep xmm %t -; RUN: grep {sub.*esp} %t | count 1 +; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 | FileCheck %s ; These testcases shouldn't require loading into an XMM register then storing ; to memory, then reloading into an FPStack reg. +; CHECK: test1 +; CHECK: fldl +; CHECK-NEXT: ret define double @test1(double *%P) { %A = load double* %P ret double %A } -; fastcc should return a value +; fastcc should return a value +; CHECK: test2 +; CHECK-NOT: xmm +; CHECK: ret define fastcc double @test2(<2 x double> %A) { %B = extractelement <2 x double> %A, i32 0 ret double %B } +; CHECK: test3 +; CHECK: sub{{.*}}%esp +; CHECLK-NOT: xmm define fastcc double @test3(<4 x float> %A) { %B = bitcast <4 x float> %A to <2 x double> %C = call fastcc double @test2(<2 x double> %B) ret double %C } - + +; Clear the stack when not using a return value. +; CHECK: test4 +; CHECK: call +; CHECK: fstp +; CHECK: ret +define void @test4(double *%P) { + %A = call double @test1(double *%P) + ret void +} diff --git a/test/CodeGen/X86/h-registers-2.ll b/test/CodeGen/X86/h-registers-2.ll index 16e13f8396645..488444c15d3b7 100644 --- a/test/CodeGen/X86/h-registers-2.ll +++ b/test/CodeGen/X86/h-registers-2.ll @@ -1,14 +1,19 @@ -; RUN: llc < %s -march=x86 > %t -; RUN: grep {movzbl %\[abcd\]h,} %t | count 1 -; RUN: grep {shll \$3,} %t | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s ; Use an h register, but don't omit the explicit shift for ; non-address use(s). define i32 @foo(i8* %x, i32 %y) nounwind { +; CHECK: foo: +; CHECK-NOT: ret +; CHECK: movzbl %{{[abcd]h}}, +; CHECK-NOT: ret +; CHECK: shll $3, +; CHECK: ret + %t0 = lshr i32 %y, 8 ; <i32> [#uses=1] %t1 = and i32 %t0, 255 ; <i32> [#uses=2] - %t2 = shl i32 %t1, 3 + %t2 = shl i32 %t1, 3 %t3 = getelementptr i8* %x, i32 %t2 ; <i8*> [#uses=1] store i8 77, i8* %t3, align 4 ret i32 %t2 diff --git a/test/CodeGen/X86/inline-asm-error.ll b/test/CodeGen/X86/inline-asm-error.ll index 29c5ae51cf821..134d6e9528336 100644 --- a/test/CodeGen/X86/inline-asm-error.ll +++ b/test/CodeGen/X86/inline-asm-error.ll @@ -5,10 +5,8 @@ ; RUN: FileCheck %s < %t2 ; RUN: FileCheck %s < %t3 -; The register allocator must fail on this function, and it should print the -; inline asm in the diagnostic. -; CHECK: LLVM ERROR: Ran out of registers during register allocation! -; CHECK: INLINEASM <es:hello world> +; The register allocator must fail on this function. +; CHECK: error: ran out of registers during register allocation define void @f(i32 %x0, i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32 %x5, i32 %x6, i32 %x7, i32 %x8, i32 %x9) nounwind ssp { entry: diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll index 6348fcaf7a07b..8e48bbec8e3a5 100644 --- a/test/CodeGen/X86/inline-asm-fpstack.ll +++ b/test/CodeGen/X86/inline-asm-fpstack.ll @@ -26,7 +26,7 @@ define double @test2() { ; CHECK-NOT: fstp ; CHECK: ret define void @test3(x86_fp80 %X) { - call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X) + call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X) ret void } @@ -37,7 +37,7 @@ define void @test3(x86_fp80 %X) { ; CHECK-NOT: fstp ; CHECK: ret define void @test4(double %X) { - call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %X) + call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X) ret void } @@ -49,7 +49,7 @@ define void @test4(double %X) { ; CHECK: ret define void @test5(double %X) { %Y = fadd double %X, 123.0 - call void asm sideeffect "frob ", "{st(0)},~{dirflag},~{fpsr},~{flags}"( double %Y) + call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y) ret void } @@ -86,3 +86,246 @@ entry: ret void } +; PR4185 +; Passing a non-killed value to asm in {st}. +; Make sure it is duped before. +; asm kills st(0), so we shouldn't pop anything +; CHECK: testPR4185 +; CHECK: fld %st(0) +; CHECK: fistpl +; CHECK-NOT: fstp +; CHECK: fistpl +; CHECK-NOT: fstp +; CHECK: ret +; A valid alternative would be to remat the constant pool load before each +; inline asm. +define void @testPR4185() { +return: + call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) + call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) + ret void +} + +; Passing a non-killed value through asm in {st}. +; Make sure it is not duped before. +; Second asm kills st(0), so we shouldn't pop anything +; CHECK: testPR4185b +; CHECK-NOT: fld %st(0) +; CHECK: fistl +; CHECK-NOT: fstp +; CHECK: fistpl +; CHECK-NOT: fstp +; CHECK: ret +; A valid alternative would be to remat the constant pool load before each +; inline asm. +define void @testPR4185b() { +return: + call void asm sideeffect "fistl $0", "{st}"(double 1.000000e+06) + call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) + ret void +} + +; PR4459 +; The return value from ceil must be duped before being consumed by asm. +; CHECK: testPR4459 +; CHECK: ceil +; CHECK: fld %st(0) +; CHECK-NOT: fxch +; CHECK: fistpl +; CHECK-NOT: fxch +; CHECK: fstpt +; CHECK: test +define void @testPR4459(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @ceil(x86_fp80 %a) + call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0) + call void @test3(x86_fp80 %0 ) + ret void +} +declare x86_fp80 @ceil(x86_fp80) + +; PR4484 +; test1 leaves a value on the stack that is needed after the asm. +; CHECK: testPR4484 +; CHECK: test1 +; CHECK-NOT: fstp +; Load %a from stack after ceil +; CHECK: fldt +; CHECK-NOT: fxch +; CHECK: fistpl +; CHECK-NOT: fstp +; Set up call to test. +; CHECK: fstpt +; CHECK: test +define void @testPR4484(x86_fp80 %a) { +entry: + %0 = call x86_fp80 @test1() + call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a) + call void @test3(x86_fp80 %0) + ret void +} + +; PR4485 +; CHECK: testPR4485 +define void @testPR4485(x86_fp80* %a) { +entry: + %0 = load x86_fp80* %a, align 16 + %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 + %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) + %3 = load x86_fp80* %a, align 16 + %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 + %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 + tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) + ret void +} + +; An input argument in a fixed position is implicitly popped by the asm only if +; the input argument is tied to an output register, or it is in the clobber list. +; The clobber list case is tested above. +; +; This doesn't implicitly pop the stack: +; +; void fist1(long double x, int *p) { +; asm volatile ("fistl %1" : : "t"(x), "m"(*p)); +; } +; +; CHECK: fist1 +; CHECK: fldt +; CHECK: fistl (%e +; CHECK: fstp +; CHECK: ret +define void @fist1(x86_fp80 %x, i32* %p) nounwind ssp { +entry: + tail call void asm sideeffect "fistl $1", "{st},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind + ret void +} + +; Here, the input operand is tied to an output which means that is is +; implicitly popped (and then the output is implicitly pushed). +; +; long double fist2(long double x, int *p) { +; long double y; +; asm ("fistl %1" : "=&t"(y) : "0"(x), "m"(*p) : "memory"); +; return y; +; } +; +; CHECK: fist2 +; CHECK: fldt +; CHECK: fistl (%e +; CHECK-NOT: fstp +; CHECK: ret +define x86_fp80 @fist2(x86_fp80 %x, i32* %p) nounwind ssp { +entry: + %0 = tail call x86_fp80 asm "fistl $2", "=&{st},0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind + ret x86_fp80 %0 +} + +; An 'f' constraint is never implicitly popped: +; +; void fucomp1(long double x, long double y) { +; asm volatile ("fucomp %1" : : "t"(x), "f"(y) : "st"); +; } +; CHECK: fucomp1 +; CHECK: fldt +; CHECK: fldt +; CHECK: fucomp %st +; CHECK: fstp +; CHECK-NOT: fstp +; CHECK: ret +define void @fucomp1(x86_fp80 %x, x86_fp80 %y) nounwind ssp { +entry: + tail call void asm sideeffect "fucomp $1", "{st},f,~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind + ret void +} + +; The 'u' constraint is only popped implicitly when clobbered: +; +; void fucomp2(long double x, long double y) { +; asm volatile ("fucomp %1" : : "t"(x), "u"(y) : "st"); +; } +; +; void fucomp3(long double x, long double y) { +; asm volatile ("fucompp %1" : : "t"(x), "u"(y) : "st", "st(1)"); +; } +; +; CHECK: fucomp2 +; CHECK: fldt +; CHECK: fldt +; CHECK: fucomp %st(1) +; CHECK: fstp +; CHECK-NOT: fstp +; CHECK: ret +; +; CHECK: fucomp3 +; CHECK: fldt +; CHECK: fldt +; CHECK: fucompp %st(1) +; CHECK-NOT: fstp +; CHECK: ret +define void @fucomp2(x86_fp80 %x, x86_fp80 %y) nounwind ssp { +entry: + tail call void asm sideeffect "fucomp $1", "{st},{st(1)},~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind + ret void +} +define void @fucomp3(x86_fp80 %x, x86_fp80 %y) nounwind ssp { +entry: + tail call void asm sideeffect "fucompp $1", "{st},{st(1)},~{st},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind + ret void +} + +; One input, two outputs, one dead output. +%complex = type { float, float } +; CHECK: sincos1 +; CHECK: flds +; CHECK-NOT: fxch +; CHECK: sincos +; CHECK-NOT: fstp +; CHECK: fstp %st(1) +; CHECK-NOT: fstp +; CHECK: ret +define float @sincos1(float %x) nounwind ssp { +entry: + %0 = tail call %complex asm "sincos", "={st},={st(1)},0,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind + %asmresult = extractvalue %complex %0, 0 + ret float %asmresult +} + +; Same thing, swapped output operands. +; CHECK: sincos2 +; CHECK: flds +; CHECK-NOT: fxch +; CHECK: sincos +; CHECK-NOT: fstp +; CHECK: fstp %st(1) +; CHECK-NOT: fstp +; CHECK: ret +define float @sincos2(float %x) nounwind ssp { +entry: + %0 = tail call %complex asm "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind + %asmresult = extractvalue %complex %0, 1 + ret float %asmresult +} + +; Clobber st(0) after it was live-out/dead from the previous asm. +; CHECK: sincos3 +; Load x, make a copy for the second asm. +; CHECK: flds +; CHECK: fld %st(0) +; CHECK: sincos +; Discard dead result in st(0), bring x to the top. +; CHECK: fstp %st(0) +; CHECK: fxch +; x is now in st(0) for the second asm +; CHECK: sincos +; Discard both results. +; CHECK: fstp +; CHECK: fstp +; CHECK: ret +define float @sincos3(float %x) nounwind ssp { +entry: + %0 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind + %1 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind + %asmresult = extractvalue %complex %0, 0 + ret float %asmresult +} diff --git a/test/CodeGen/X86/inline-asm-fpstack2.ll b/test/CodeGen/X86/inline-asm-fpstack2.ll deleted file mode 100644 index 78037e0423a59..0000000000000 --- a/test/CodeGen/X86/inline-asm-fpstack2.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; PR4185 - -; Passing a non-killed value to asm in {st}. -; Make sure it is duped before. -; asm kills st(0), so we shouldn't pop anything -; CHECK: fld %st(0) -; CHECK: fistpl -; CHECK-NOT: fstp -; CHECK: fistpl -; CHECK-NOT: fstp -; CHECK: ret -define void @test() { -return: - call void asm sideeffect "fistpl $0", "{st}"(double 1.000000e+06) - call void asm sideeffect "fistpl $0", "{st}"(double 1.000000e+06) - ret void -} - -; A valid alternative would be to remat the constant pool load before each -; inline asm. diff --git a/test/CodeGen/X86/inline-asm-fpstack3.ll b/test/CodeGen/X86/inline-asm-fpstack3.ll deleted file mode 100644 index a609681c49238..0000000000000 --- a/test/CodeGen/X86/inline-asm-fpstack3.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; PR4459 - -; The return value from ceil must be duped before being consumed by asm. -; CHECK: ceil -; CHECK: fld %st(0) -; CHECK-NOT: fxch -; CHECK: fistpl -; CHECK-NOT: fxch -; CHECK: fstpt -; CHECK: test -define void @test2(x86_fp80 %a) { -entry: - %0 = call x86_fp80 @ceil(x86_fp80 %a) - call void asm sideeffect "fistpl $0", "{st}"( x86_fp80 %0) - call void @test(x86_fp80 %0 ) - ret void -} -declare x86_fp80 @ceil(x86_fp80) -declare void @test(x86_fp80) diff --git a/test/CodeGen/X86/inline-asm-fpstack4.ll b/test/CodeGen/X86/inline-asm-fpstack4.ll deleted file mode 100644 index ec572b45238ad..0000000000000 --- a/test/CodeGen/X86/inline-asm-fpstack4.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; PR4484 - -; ceil leaves a value on the stack that is needed after the asm. -; CHECK: ceil -; CHECK-NOT: fstp -; Load %a from stack after ceil -; CHECK: fldt -; CHECK-NOT: fxch -; CHECK: fistpl -; CHECK-NOT: fstp -; Set up call to test. -; CHECK: fstpt -; CHECK: test -define void @test2(x86_fp80 %a) { -entry: - %0 = call x86_fp80 @ceil() - call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a) - call void @test(x86_fp80 %0) - ret void -} - -declare x86_fp80 @ceil() -declare void @test(x86_fp80) diff --git a/test/CodeGen/X86/inline-asm-fpstack5.ll b/test/CodeGen/X86/inline-asm-fpstack5.ll deleted file mode 100644 index 8b219cf927733..0000000000000 --- a/test/CodeGen/X86/inline-asm-fpstack5.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=x86 -; PR4485 - -define void @test(x86_fp80* %a) { -entry: - %0 = load x86_fp80* %a, align 16 - %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 - %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 - tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) - %3 = load x86_fp80* %a, align 16 - %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 - %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 - tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) - ret void -} diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll index 78d7e776cf227..733205d6a9153 100644 --- a/test/CodeGen/X86/inline-asm-mrv.ll +++ b/test/CodeGen/X86/inline-asm-mrv.ll @@ -11,7 +11,7 @@ define i32 @test1(i8* %v, i8* %blk2, i8* %blk1, i32 %stride, i32 %h) nounwind { %tmp12 = sext i32 %stride to i64 ; <i64> [#uses=1] %mrv = call {i32, i8*, i8*} asm sideeffect "$0 $1 $2 $3 $4 $5 $6", "=r,=r,=r,r,r,r,r"( i64 %tmp12, i32 %h, i8* %blk1, i8* %blk2 ) nounwind - %tmp6 = getresult {i32, i8*, i8*} %mrv, 0 + %tmp6 = extractvalue {i32, i8*, i8*} %mrv, 0 %tmp7 = call i32 asm sideeffect "set $0", "=r,~{dirflag},~{fpsr},~{flags}"( ) nounwind ret i32 %tmp7 @@ -19,16 +19,16 @@ define i32 @test1(i8* %v, i8* %blk2, i8* %blk1, i32 %stride, i32 %h) nounwind { define <4 x float> @test2() nounwind { %mrv = call {<4 x float>, <4 x float>} asm "set $0, $1", "=x,=x"() - %a = getresult {<4 x float>, <4 x float>} %mrv, 0 - %b = getresult {<4 x float>, <4 x float>} %mrv, 1 + %a = extractvalue {<4 x float>, <4 x float>} %mrv, 0 + %b = extractvalue {<4 x float>, <4 x float>} %mrv, 1 %c = fadd <4 x float> %a, %b ret <4 x float> %c } define <4 x i32> @test3() nounwind { %mrv = call {<4 x i32>, <4 x i32>} asm "set $0, $1", "=x,=x"() - %a = getresult {<4 x i32>, <4 x i32>} %mrv, 0 - %b = getresult {<4 x i32>, <4 x i32>} %mrv, 1 + %a = extractvalue {<4 x i32>, <4 x i32>} %mrv, 0 + %b = extractvalue {<4 x i32>, <4 x i32>} %mrv, 1 %c = add <4 x i32> %a, %b ret <4 x i32> %c } diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll index ab44206f8065a..1c8e2f9eec85e 100644 --- a/test/CodeGen/X86/inline-asm-q-regs.ll +++ b/test/CodeGen/X86/inline-asm-q-regs.ll @@ -1,10 +1,22 @@ ; RUN: llc < %s -march=x86-64 ; rdar://7066579 - type { i64, i64, i64, i64, i64 } ; type %0 + %0 = type { i64, i64, i64, i64, i64 } ; type %0 -define void @t() nounwind { +define void @test1() nounwind { entry: %asmtmp = call %0 asm sideeffect "mov %cr0, $0 \0Amov %cr2, $1 \0Amov %cr3, $2 \0Amov %cr4, $3 \0Amov %cr8, $0 \0A", "=q,=q,=q,=q,=q,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%0> [#uses=0] ret void } + +; PR9602 +define void @test2(float %tmp) nounwind { + call void asm sideeffect "$0", "q"(float %tmp) nounwind + call void asm sideeffect "$0", "Q"(float %tmp) nounwind + ret void +} + +define void @test3(double %tmp) nounwind { + call void asm sideeffect "$0", "q"(double %tmp) nounwind + ret void +} diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll index c66d7a8bd11bd..eef6c2f377a7b 100644 --- a/test/CodeGen/X86/inline-asm.ll +++ b/test/CodeGen/X86/inline-asm.ll @@ -23,3 +23,23 @@ define void @test4() nounwind { tail call void asm sideeffect "bork $0", "J"(i32 37) nounwind ret void } + +; rdar://9738585 +define i32 @test5() nounwind { +entry: + %0 = tail call i32 asm "test", "=l,~{dirflag},~{fpsr},~{flags}"() nounwind + ret i32 0 +} + +; rdar://9777108 PR10352 +define void @test6(i1 zeroext %desired) nounwind { +entry: + tail call void asm sideeffect "foo $0", "q,~{dirflag},~{fpsr},~{flags}"(i1 %desired) nounwind + ret void +} + +define void @test7(i1 zeroext %desired, i32* %p) nounwind { +entry: + %0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %p, i1 %desired) nounwind + ret void +} diff --git a/test/CodeGen/X86/isel-sink.ll b/test/CodeGen/X86/isel-sink.ll index 0f94b233bcfb5..d2755331fe8d7 100644 --- a/test/CodeGen/X86/isel-sink.ll +++ b/test/CodeGen/X86/isel-sink.ll @@ -1,8 +1,14 @@ -; RUN: llc < %s -march=x86 | not grep lea -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 | \ -; RUN: grep {movl \$4, (.*,.*,4)} +; RUN: llc < %s -march=x86 | FileCheck %s define i32 @test(i32* %X, i32 %B) { +; CHECK: test: +; CHECK-NOT: ret +; CHECK-NOT: lea +; CHECK: mov{{.}} $4, ({{.*}},{{.*}},4) +; CHECK: ret +; CHECK: mov{{.}} ({{.*}},{{.*}},4), +; CHECK: ret + ; This gep should be sunk out of this block into the load/store users. %P = getelementptr i32* %X, i32 %B %G = icmp ult i32 %B, 1234 @@ -14,5 +20,3 @@ F: %V = load i32* %P ret i32 %V } - - diff --git a/test/CodeGen/X86/longlong-deadload.ll b/test/CodeGen/X86/longlong-deadload.ll index 9a4c8f21237b2..db91961e04103 100644 --- a/test/CodeGen/X86/longlong-deadload.ll +++ b/test/CodeGen/X86/longlong-deadload.ll @@ -1,8 +1,11 @@ -; RUN: llc < %s -march=x86 | not grep '4{(%...)} +; RUN: llc < %s -march=x86 | FileCheck %s ; This should not load or store the top part of *P. define void @test(i64* %P) nounwind { -entry: +; CHECK: test: +; CHECK: movl 4(%esp), %[[REGISTER:.*]] +; CHECK-NOT: 4(%[[REGISTER]]) +; CHECK: ret %tmp1 = load i64* %P, align 8 ; <i64> [#uses=1] %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1] store i64 %tmp2, i64* %P, align 8 diff --git a/test/CodeGen/X86/loop-strength-reduce2.ll b/test/CodeGen/X86/loop-strength-reduce2.ll index 9b53adb2a364a..689ee1cf23f45 100644 --- a/test/CodeGen/X86/loop-strength-reduce2.ll +++ b/test/CodeGen/X86/loop-strength-reduce2.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | grep {\$pb} | grep mov +; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | FileCheck %s ; ; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader. +; CHECK: mov{{.}} {{.*}}$pb @flags2 = internal global [8193 x i8] zeroinitializer, align 32 ; <[8193 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/lsr-nonaffine.ll b/test/CodeGen/X86/lsr-nonaffine.ll index b0d30641dd2b0..d0d2bbd67cf6b 100644 --- a/test/CodeGen/X86/lsr-nonaffine.ll +++ b/test/CodeGen/X86/lsr-nonaffine.ll @@ -1,23 +1,30 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -asm-verbose=false -march=x86-64 -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s -; LSR should compute the correct starting values for this loop. Note that -; it's not necessarily LSR's job to compute loop exit expressions; that's -; indvars' job. -; CHECK: movl $12 -; CHECK: movl $42 +; LSR should leave non-affine expressions alone because it currently +; doesn't know how to do anything with them, and when it tries, it +; gets SCEVExpander's current expansion for them, which is suboptimal. -define i32 @real_symmetric_eigen(i32 %n) nounwind { -while.body127: ; preds = %while.cond122 - br label %while.cond141 +; CHECK: xorl %eax, %eax +; CHECK-NEXT: align +; CHECK-NEXT: BB0_1: +; CHECK-NEXT: movq %rax, (%rdx) +; CHECK-NEXT: addq %rsi, %rax +; CHECK-NEXT: cmpq %rdi, %rax +; CHECK-NEXT: jl +; CHECK-NEXT: imulq %rax, %rax +; CHECK-NEXT: ret +define i64 @foo(i64 %n, i64 %s, i64* %p) nounwind { +entry: + br label %loop -while.cond141: ; preds = %while.cond141, %while.body127 - %0 = phi i32 [ 7, %while.body127 ], [ %indvar.next67, %while.cond141 ] ; <i32> [#uses=3] - %indvar.next67 = add i32 %0, 1 ; <i32> [#uses=1] - %t = icmp slt i32 %indvar.next67, %n - br i1 %t, label %if.then171, label %while.cond141 +loop: + %i = phi i64 [ 0, %entry ], [ %i.next, %loop ] + volatile store i64 %i, i64* %p + %i.next = add i64 %i, %s + %c = icmp slt i64 %i.next, %n + br i1 %c, label %loop, label %exit -if.then171: ; preds = %while.cond141 - %mul150 = mul i32 %0, %0 ; <i32> [#uses=1] - %add174 = add i32 %mul150, %0 ; <i32> [#uses=1] - ret i32 %add174 +exit: + %mul = mul i64 %i.next, %i.next + ret i64 %mul } diff --git a/test/CodeGen/X86/lsr-redundant-addressing.ll b/test/CodeGen/X86/lsr-redundant-addressing.ll index aaa1426918f24..cb0ac8b67a7e6 100644 --- a/test/CodeGen/X86/lsr-redundant-addressing.ll +++ b/test/CodeGen/X86/lsr-redundant-addressing.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | fgrep {addq $-16,} | count 1 +; RUN: llc -march=x86-64 < %s | FileCheck %s ; rdar://9081094 ; LSR shouldn't create lots of redundant address computations. @@ -10,6 +10,12 @@ @isa = external hidden unnamed_addr constant [13 x %1], align 32 define void @main_bb.i() nounwind { +; CHECK: main_bb.i: +; CHECK-NOT: ret +; CHECK: addq $-16, +; CHECK-NOT: ret +; CHECK: ret + bb: br label %bb38 diff --git a/test/CodeGen/X86/lsr-reuse-trunc.ll b/test/CodeGen/X86/lsr-reuse-trunc.ll index 47705190b0f4a..1f87089f80e70 100644 --- a/test/CodeGen/X86/lsr-reuse-trunc.ll +++ b/test/CodeGen/X86/lsr-reuse-trunc.ll @@ -5,8 +5,9 @@ ; stick with indexing here. ; CHECK: movaps (%{{rsi|rdx}},%rax,4), [[X3:%xmm[0-9]+]] -; CHECK: movaps -; CHECK: [[X3]], (%{{rdi|rcx}},%rax,4) +; CHECK: cvtdq2ps +; CHECK: orps {{%xmm[0-9]+}}, [[X4:%xmm[0-9]+]] +; CHECK: movaps [[X4]], (%{{rdi|rcx}},%rax,4) ; CHECK: addq $4, %rax ; CHECK: cmpl %eax, (%{{rdx|r8}}) ; CHECK-NEXT: jg diff --git a/test/CodeGen/X86/mem-promote-integers.ll b/test/CodeGen/X86/mem-promote-integers.ll new file mode 100644 index 0000000000000..80103d10388ba --- /dev/null +++ b/test/CodeGen/X86/mem-promote-integers.ll @@ -0,0 +1,391 @@ +; Test the basic functionality of integer element promotions of different types. +; This tests checks passing of arguments, loading and storing to memory and +; basic arithmetic. +; RUN: llc -march=x86 -promote-elements < %s +; RUN: llc -march=x86-64 -promote-elements < %s + +define <1 x i8> @test_1xi8(<1 x i8> %x, <1 x i8>* %b) { + %bb = load <1 x i8>* %b + %tt = xor <1 x i8> %x, %bb + store <1 x i8> %tt, <1 x i8>* %b + br label %next + +next: + ret <1 x i8> %tt +} + + +define <1 x i16> @test_1xi16(<1 x i16> %x, <1 x i16>* %b) { + %bb = load <1 x i16>* %b + %tt = xor <1 x i16> %x, %bb + store <1 x i16> %tt, <1 x i16>* %b + br label %next + +next: + ret <1 x i16> %tt +} + + +define <1 x i32> @test_1xi32(<1 x i32> %x, <1 x i32>* %b) { + %bb = load <1 x i32>* %b + %tt = xor <1 x i32> %x, %bb + store <1 x i32> %tt, <1 x i32>* %b + br label %next + +next: + ret <1 x i32> %tt +} + + +define <1 x i64> @test_1xi64(<1 x i64> %x, <1 x i64>* %b) { + %bb = load <1 x i64>* %b + %tt = xor <1 x i64> %x, %bb + store <1 x i64> %tt, <1 x i64>* %b + br label %next + +next: + ret <1 x i64> %tt +} + + +define <1 x i128> @test_1xi128(<1 x i128> %x, <1 x i128>* %b) { + %bb = load <1 x i128>* %b + %tt = xor <1 x i128> %x, %bb + store <1 x i128> %tt, <1 x i128>* %b + br label %next + +next: + ret <1 x i128> %tt +} + + +define <1 x i256> @test_1xi256(<1 x i256> %x, <1 x i256>* %b) { + %bb = load <1 x i256>* %b + %tt = xor <1 x i256> %x, %bb + store <1 x i256> %tt, <1 x i256>* %b + br label %next + +next: + ret <1 x i256> %tt +} + + +define <1 x i512> @test_1xi512(<1 x i512> %x, <1 x i512>* %b) { + %bb = load <1 x i512>* %b + %tt = xor <1 x i512> %x, %bb + store <1 x i512> %tt, <1 x i512>* %b + br label %next + +next: + ret <1 x i512> %tt +} + + +define <2 x i8> @test_2xi8(<2 x i8> %x, <2 x i8>* %b) { + %bb = load <2 x i8>* %b + %tt = xor <2 x i8> %x, %bb + store <2 x i8> %tt, <2 x i8>* %b + br label %next + +next: + ret <2 x i8> %tt +} + + +define <2 x i16> @test_2xi16(<2 x i16> %x, <2 x i16>* %b) { + %bb = load <2 x i16>* %b + %tt = xor <2 x i16> %x, %bb + store <2 x i16> %tt, <2 x i16>* %b + br label %next + +next: + ret <2 x i16> %tt +} + + +define <2 x i32> @test_2xi32(<2 x i32> %x, <2 x i32>* %b) { + %bb = load <2 x i32>* %b + %tt = xor <2 x i32> %x, %bb + store <2 x i32> %tt, <2 x i32>* %b + br label %next + +next: + ret <2 x i32> %tt +} + + +define <2 x i64> @test_2xi64(<2 x i64> %x, <2 x i64>* %b) { + %bb = load <2 x i64>* %b + %tt = xor <2 x i64> %x, %bb + store <2 x i64> %tt, <2 x i64>* %b + br label %next + +next: + ret <2 x i64> %tt +} + + +define <2 x i128> @test_2xi128(<2 x i128> %x, <2 x i128>* %b) { + %bb = load <2 x i128>* %b + %tt = xor <2 x i128> %x, %bb + store <2 x i128> %tt, <2 x i128>* %b + br label %next + +next: + ret <2 x i128> %tt +} + + +define <2 x i256> @test_2xi256(<2 x i256> %x, <2 x i256>* %b) { + %bb = load <2 x i256>* %b + %tt = xor <2 x i256> %x, %bb + store <2 x i256> %tt, <2 x i256>* %b + br label %next + +next: + ret <2 x i256> %tt +} + + +define <2 x i512> @test_2xi512(<2 x i512> %x, <2 x i512>* %b) { + %bb = load <2 x i512>* %b + %tt = xor <2 x i512> %x, %bb + store <2 x i512> %tt, <2 x i512>* %b + br label %next + +next: + ret <2 x i512> %tt +} + + +define <3 x i8> @test_3xi8(<3 x i8> %x, <3 x i8>* %b) { + %bb = load <3 x i8>* %b + %tt = xor <3 x i8> %x, %bb + store <3 x i8> %tt, <3 x i8>* %b + br label %next + +next: + ret <3 x i8> %tt +} + + +define <3 x i16> @test_3xi16(<3 x i16> %x, <3 x i16>* %b) { + %bb = load <3 x i16>* %b + %tt = xor <3 x i16> %x, %bb + store <3 x i16> %tt, <3 x i16>* %b + br label %next + +next: + ret <3 x i16> %tt +} + + +define <3 x i32> @test_3xi32(<3 x i32> %x, <3 x i32>* %b) { + %bb = load <3 x i32>* %b + %tt = xor <3 x i32> %x, %bb + store <3 x i32> %tt, <3 x i32>* %b + br label %next + +next: + ret <3 x i32> %tt +} + + +define <3 x i64> @test_3xi64(<3 x i64> %x, <3 x i64>* %b) { + %bb = load <3 x i64>* %b + %tt = xor <3 x i64> %x, %bb + store <3 x i64> %tt, <3 x i64>* %b + br label %next + +next: + ret <3 x i64> %tt +} + + +define <3 x i128> @test_3xi128(<3 x i128> %x, <3 x i128>* %b) { + %bb = load <3 x i128>* %b + %tt = xor <3 x i128> %x, %bb + store <3 x i128> %tt, <3 x i128>* %b + br label %next + +next: + ret <3 x i128> %tt +} + + +define <3 x i256> @test_3xi256(<3 x i256> %x, <3 x i256>* %b) { + %bb = load <3 x i256>* %b + %tt = xor <3 x i256> %x, %bb + store <3 x i256> %tt, <3 x i256>* %b + br label %next + +next: + ret <3 x i256> %tt +} + + +define <3 x i512> @test_3xi512(<3 x i512> %x, <3 x i512>* %b) { + %bb = load <3 x i512>* %b + %tt = xor <3 x i512> %x, %bb + store <3 x i512> %tt, <3 x i512>* %b + br label %next + +next: + ret <3 x i512> %tt +} + + +define <4 x i8> @test_4xi8(<4 x i8> %x, <4 x i8>* %b) { + %bb = load <4 x i8>* %b + %tt = xor <4 x i8> %x, %bb + store <4 x i8> %tt, <4 x i8>* %b + br label %next + +next: + ret <4 x i8> %tt +} + + +define <4 x i16> @test_4xi16(<4 x i16> %x, <4 x i16>* %b) { + %bb = load <4 x i16>* %b + %tt = xor <4 x i16> %x, %bb + store <4 x i16> %tt, <4 x i16>* %b + br label %next + +next: + ret <4 x i16> %tt +} + + +define <4 x i32> @test_4xi32(<4 x i32> %x, <4 x i32>* %b) { + %bb = load <4 x i32>* %b + %tt = xor <4 x i32> %x, %bb + store <4 x i32> %tt, <4 x i32>* %b + br label %next + +next: + ret <4 x i32> %tt +} + + +define <4 x i64> @test_4xi64(<4 x i64> %x, <4 x i64>* %b) { + %bb = load <4 x i64>* %b + %tt = xor <4 x i64> %x, %bb + store <4 x i64> %tt, <4 x i64>* %b + br label %next + +next: + ret <4 x i64> %tt +} + + +define <4 x i128> @test_4xi128(<4 x i128> %x, <4 x i128>* %b) { + %bb = load <4 x i128>* %b + %tt = xor <4 x i128> %x, %bb + store <4 x i128> %tt, <4 x i128>* %b + br label %next + +next: + ret <4 x i128> %tt +} + + +define <4 x i256> @test_4xi256(<4 x i256> %x, <4 x i256>* %b) { + %bb = load <4 x i256>* %b + %tt = xor <4 x i256> %x, %bb + store <4 x i256> %tt, <4 x i256>* %b + br label %next + +next: + ret <4 x i256> %tt +} + + +define <4 x i512> @test_4xi512(<4 x i512> %x, <4 x i512>* %b) { + %bb = load <4 x i512>* %b + %tt = xor <4 x i512> %x, %bb + store <4 x i512> %tt, <4 x i512>* %b + br label %next + +next: + ret <4 x i512> %tt +} + + +define <5 x i8> @test_5xi8(<5 x i8> %x, <5 x i8>* %b) { + %bb = load <5 x i8>* %b + %tt = xor <5 x i8> %x, %bb + store <5 x i8> %tt, <5 x i8>* %b + br label %next + +next: + ret <5 x i8> %tt +} + + +define <5 x i16> @test_5xi16(<5 x i16> %x, <5 x i16>* %b) { + %bb = load <5 x i16>* %b + %tt = xor <5 x i16> %x, %bb + store <5 x i16> %tt, <5 x i16>* %b + br label %next + +next: + ret <5 x i16> %tt +} + + +define <5 x i32> @test_5xi32(<5 x i32> %x, <5 x i32>* %b) { + %bb = load <5 x i32>* %b + %tt = xor <5 x i32> %x, %bb + store <5 x i32> %tt, <5 x i32>* %b + br label %next + +next: + ret <5 x i32> %tt +} + + +define <5 x i64> @test_5xi64(<5 x i64> %x, <5 x i64>* %b) { + %bb = load <5 x i64>* %b + %tt = xor <5 x i64> %x, %bb + store <5 x i64> %tt, <5 x i64>* %b + br label %next + +next: + ret <5 x i64> %tt +} + + +define <5 x i128> @test_5xi128(<5 x i128> %x, <5 x i128>* %b) { + %bb = load <5 x i128>* %b + %tt = xor <5 x i128> %x, %bb + store <5 x i128> %tt, <5 x i128>* %b + br label %next + +next: + ret <5 x i128> %tt +} + + +define <5 x i256> @test_5xi256(<5 x i256> %x, <5 x i256>* %b) { + %bb = load <5 x i256>* %b + %tt = xor <5 x i256> %x, %bb + store <5 x i256> %tt, <5 x i256>* %b + br label %next + +next: + ret <5 x i256> %tt +} + + +define <5 x i512> @test_5xi512(<5 x i512> %x, <5 x i512>* %b) { + %bb = load <5 x i512>* %b + %tt = xor <5 x i512> %x, %bb + store <5 x i512> %tt, <5 x i512>* %b + br label %next + +next: + ret <5 x i512> %tt +} + + diff --git a/test/CodeGen/X86/membarrier.ll b/test/CodeGen/X86/membarrier.ll new file mode 100644 index 0000000000000..42f8ef5ff0475 --- /dev/null +++ b/test/CodeGen/X86/membarrier.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=x86-64 -mattr=-sse -O0 +; PR9675 + +define i32 @t() { +entry: + %i = alloca i32, align 4 + store i32 1, i32* %i, align 4 + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) + %0 = call i32 @llvm.atomic.load.sub.i32.p0i32(i32* %i, i32 1) + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) + ret i32 0 +} + +declare i32 @llvm.atomic.load.sub.i32.p0i32(i32* nocapture, i32) nounwind +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/X86/memcpy-2.ll b/test/CodeGen/X86/memcpy-2.ll index 17cd8e868a254..eae2e708349cd 100644 --- a/test/CodeGen/X86/memcpy-2.ll +++ b/test/CodeGen/X86/memcpy-2.ll @@ -38,7 +38,7 @@ entry: ; X86-64: movq $0 %tmp1 = alloca [25 x i8] %tmp2 = bitcast [25 x i8]* %tmp1 to i8* - call void @llvm.memcpy.i32( i8* %tmp2, i8* getelementptr ([25 x i8]* @.str, i32 0, i32 0), i32 25, i32 1 ) nounwind + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp2, i8* getelementptr inbounds ([25 x i8]* @.str, i32 0, i32 0), i32 25, i32 1, i1 false) unreachable } @@ -72,7 +72,7 @@ entry: ; X86-64: movaps %xmm0, (%rdi) %tmp2 = bitcast %struct.s0* %a to i8* ; <i8*> [#uses=1] %tmp3 = bitcast %struct.s0* %b to i8* ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %tmp2, i8* %tmp3, i32 16, i32 16) + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp2, i8* %tmp3, i32 16, i32 16, i1 false) ret void } @@ -115,7 +115,7 @@ entry: ; X86-64: movq %rax, (%rdi) %tmp2 = bitcast %struct.s0* %a to i8* ; <i8*> [#uses=1] %tmp3 = bitcast %struct.s0* %b to i8* ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %tmp2, i8* %tmp3, i32 16, i32 8) + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp2, i8* %tmp3, i32 16, i32 8, i1 false) ret void } @@ -160,8 +160,8 @@ entry: ; X86-64: movl $2021161080 %tmp1 = alloca [30 x i8] %tmp2 = bitcast [30 x i8]* %tmp1 to i8* - call void @llvm.memcpy.i32(i8* %tmp2, i8* getelementptr inbounds ([30 x i8]* @.str2, i32 0, i32 0), i32 30, i32 1) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp2, i8* getelementptr inbounds ([30 x i8]* @.str2, i32 0, i32 0), i32 30, i32 1, i1 false) unreachable } -declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll index 72342cbacb4f5..f43b0bf509cae 100644 --- a/test/CodeGen/X86/memcpy.ll +++ b/test/CodeGen/X86/memcpy.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=DARWIN declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/memmove-4.ll b/test/CodeGen/X86/memmove-4.ll deleted file mode 100644 index 027db1f48395a..0000000000000 --- a/test/CodeGen/X86/memmove-4.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s | not grep call - -target triple = "i686-pc-linux-gnu" - -define void @a(i8* %a, i8* %b) nounwind { - %tmp2 = bitcast i8* %a to i8* - %tmp3 = bitcast i8* %b to i8* - tail call void @llvm.memmove.i32( i8* %tmp2, i8* %tmp3, i32 12, i32 4 ) - ret void -} - -declare void @llvm.memmove.i32(i8*, i8*, i32, i32) diff --git a/test/CodeGen/X86/memset-2.ll b/test/CodeGen/X86/memset-2.ll index 993583b4a49b2..b2bd72bb312be 100644 --- a/test/CodeGen/X86/memset-2.ll +++ b/test/CodeGen/X86/memset-2.ll @@ -6,7 +6,7 @@ define fastcc void @t1() nounwind { entry: ; CHECK: t1: ; CHECK: calll _memset - call void @llvm.memset.i32( i8* null, i8 0, i32 188, i32 1 ) nounwind + call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false) unreachable } @@ -14,7 +14,7 @@ define fastcc void @t2(i8 signext %c) nounwind { entry: ; CHECK: t2: ; CHECK: calll _memset - call void @llvm.memset.i32( i8* undef, i8 %c, i32 76, i32 1 ) nounwind + call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false) unreachable } diff --git a/test/CodeGen/X86/memset-3.ll b/test/CodeGen/X86/memset-3.ll index 9b20ad506a5f9..29febfab29af9 100644 --- a/test/CodeGen/X86/memset-3.ll +++ b/test/CodeGen/X86/memset-3.ll @@ -5,8 +5,8 @@ define void @t() nounwind ssp { entry: %buf = alloca [512 x i8], align 1 %ptr = getelementptr inbounds [512 x i8]* %buf, i32 0, i32 0 - call void @llvm.memset.i32(i8* %ptr, i8 undef, i32 512, i32 1) + call void @llvm.memset.p0i8.i32(i8* %ptr, i8 undef, i32 512, i32 1, i1 false) unreachable } -declare void @llvm.memset.i32(i8* nocapture, i8, i32, i32) nounwind +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind diff --git a/test/CodeGen/X86/memset.ll b/test/CodeGen/X86/memset.ll index cf7464d03bf26..72b3e0fa3d513 100644 --- a/test/CodeGen/X86/memset.ll +++ b/test/CodeGen/X86/memset.ll @@ -8,11 +8,11 @@ entry: %up_mvd = alloca [8 x %struct.x] ; <[8 x %struct.x]*> [#uses=2] %up_mvd116 = getelementptr [8 x %struct.x]* %up_mvd, i32 0, i32 0 ; <%struct.x*> [#uses=1] %tmp110117 = bitcast [8 x %struct.x]* %up_mvd to i8* ; <i8*> [#uses=1] - call void @llvm.memset.i64( i8* %tmp110117, i8 0, i64 32, i32 8 ) + call void @llvm.memset.p0i8.i64(i8* %tmp110117, i8 0, i64 32, i32 8, i1 false) call void @foo( %struct.x* %up_mvd116 ) nounwind ret void } declare void @foo(%struct.x*) -declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/memset64-on-x86-32.ll b/test/CodeGen/X86/memset64-on-x86-32.ll index 3f069b4a1aa82..e20fce172f273 100644 --- a/test/CodeGen/X86/memset64-on-x86-32.ll +++ b/test/CodeGen/X86/memset64-on-x86-32.ll @@ -4,9 +4,8 @@ define void @bork() nounwind { entry: - call void @llvm.memset.i64( i8* null, i8 0, i64 80, i32 4 ) - ret void + call void @llvm.memset.p0i8.i64(i8* null, i8 0, i64 80, i32 4, i1 false) + ret void } -declare void @llvm.memset.i64(i8*, i8, i64, i32) nounwind - +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/mmx-shuffle.ll b/test/CodeGen/X86/mmx-shuffle.ll index 9f7501eb7c5de..869f32b89fb7e 100644 --- a/test/CodeGen/X86/mmx-shuffle.ll +++ b/test/CodeGen/X86/mmx-shuffle.ll @@ -5,12 +5,12 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 target triple = "i686-pc-linux-gnu" %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* } %struct.QBasicAtomic = type { i32 } - %struct.QClipData = type { i32, "struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 } - "struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* } + %struct.QClipData = type { i32, %"struct.QClipData::ClipLine"*, i32, i32, %struct.QT_FT_Span*, i32, i32, i32, i32 } + %"struct.QClipData::ClipLine" = type { i32, %struct.QT_FT_Span* } %struct.QRasterBuffer = type { %struct.QRect, %struct.QRegion, %struct.QClipData*, %struct.QClipData*, i8, i32, i32, %struct.DrawHelper*, i32, i32, i32, i8* } %struct.QRect = type { i32, i32, i32, i32 } - %struct.QRegion = type { "struct.QRegion::QRegionData"* } - "struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* } + %struct.QRegion = type { %"struct.QRegion::QRegionData"* } + %"struct.QRegion::QRegionData" = type { %struct.QBasicAtomic, %struct._XRegion*, i8*, %struct.QRegionPrivate* } %struct.QRegionPrivate = type opaque %struct.QT_FT_Span = type { i16, i16, i16, i8 } %struct._XRegion = type opaque diff --git a/test/CodeGen/X86/muloti.ll b/test/CodeGen/X86/muloti.ll new file mode 100644 index 0000000000000..2f0986e831e27 --- /dev/null +++ b/test/CodeGen/X86/muloti.ll @@ -0,0 +1,81 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +%0 = type { i64, i64 } +%1 = type { i128, i1 } + +define %0 @x(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp { +; CHECK: x +entry: + %tmp16 = zext i64 %a.coerce0 to i128 + %tmp11 = zext i64 %a.coerce1 to i128 + %tmp12 = shl nuw i128 %tmp11, 64 + %ins14 = or i128 %tmp12, %tmp16 + %tmp6 = zext i64 %b.coerce0 to i128 + %tmp3 = zext i64 %b.coerce1 to i128 + %tmp4 = shl nuw i128 %tmp3, 64 + %ins = or i128 %tmp4, %tmp6 + %0 = tail call %1 @llvm.smul.with.overflow.i128(i128 %ins14, i128 %ins) +; CHECK: callq ___muloti4 + %1 = extractvalue %1 %0, 0 + %2 = extractvalue %1 %0, 1 + br i1 %2, label %overflow, label %nooverflow + +overflow: ; preds = %entry + tail call void @llvm.trap() + unreachable + +nooverflow: ; preds = %entry + %tmp20 = trunc i128 %1 to i64 + %tmp21 = insertvalue %0 undef, i64 %tmp20, 0 + %tmp22 = lshr i128 %1, 64 + %tmp23 = trunc i128 %tmp22 to i64 + %tmp24 = insertvalue %0 %tmp21, i64 %tmp23, 1 + ret %0 %tmp24 +} + +define %0 @foo(i64 %a.coerce0, i64 %a.coerce1, i64 %b.coerce0, i64 %b.coerce1) nounwind uwtable ssp { +entry: +; CHECK: foo + %retval = alloca i128, align 16 + %coerce = alloca i128, align 16 + %a.addr = alloca i128, align 16 + %coerce1 = alloca i128, align 16 + %b.addr = alloca i128, align 16 + %0 = bitcast i128* %coerce to %0* + %1 = getelementptr %0* %0, i32 0, i32 0 + store i64 %a.coerce0, i64* %1 + %2 = getelementptr %0* %0, i32 0, i32 1 + store i64 %a.coerce1, i64* %2 + %a = load i128* %coerce, align 16 + store i128 %a, i128* %a.addr, align 16 + %3 = bitcast i128* %coerce1 to %0* + %4 = getelementptr %0* %3, i32 0, i32 0 + store i64 %b.coerce0, i64* %4 + %5 = getelementptr %0* %3, i32 0, i32 1 + store i64 %b.coerce1, i64* %5 + %b = load i128* %coerce1, align 16 + store i128 %b, i128* %b.addr, align 16 + %tmp = load i128* %a.addr, align 16 + %tmp2 = load i128* %b.addr, align 16 + %6 = call %1 @llvm.umul.with.overflow.i128(i128 %tmp, i128 %tmp2) +; CHECK: cmov +; CHECK: divti3 + %7 = extractvalue %1 %6, 0 + %8 = extractvalue %1 %6, 1 + br i1 %8, label %overflow, label %nooverflow + +overflow: ; preds = %entry + call void @llvm.trap() + unreachable + +nooverflow: ; preds = %entry + store i128 %7, i128* %retval + %9 = bitcast i128* %retval to %0* + %10 = load %0* %9, align 1 + ret %0 %10 +} + +declare %1 @llvm.umul.with.overflow.i128(i128, i128) nounwind readnone + +declare %1 @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone + +declare void @llvm.trap() nounwind diff --git a/test/CodeGen/X86/multiple-return-values-cross-block.ll b/test/CodeGen/X86/multiple-return-values-cross-block.ll index e9837d0ebbf5c..b0cb061113484 100644 --- a/test/CodeGen/X86/multiple-return-values-cross-block.ll +++ b/test/CodeGen/X86/multiple-return-values-cross-block.ll @@ -4,12 +4,12 @@ declare {x86_fp80, x86_fp80} @test() define void @call2(x86_fp80 *%P1, x86_fp80 *%P2) { %a = call {x86_fp80,x86_fp80} @test() - %b = getresult {x86_fp80,x86_fp80} %a, 1 + %b = extractvalue {x86_fp80,x86_fp80} %a, 1 store x86_fp80 %b, x86_fp80* %P1 br label %L L: - %c = getresult {x86_fp80,x86_fp80} %a, 0 + %c = extractvalue {x86_fp80,x86_fp80} %a, 0 store x86_fp80 %c, x86_fp80* %P2 ret void } diff --git a/test/CodeGen/X86/multiple-return-values.ll b/test/CodeGen/X86/multiple-return-values.ll deleted file mode 100644 index 018d997599a97..0000000000000 --- a/test/CodeGen/X86/multiple-return-values.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc < %s -march=x86 - -define {i64, float} @bar(i64 %a, float %b) { - %y = add i64 %a, 7 - %z = fadd float %b, 7.0 - ret i64 %y, float %z -} - -define i64 @foo() { - %M = call {i64, float} @bar(i64 21, float 21.0) - %N = getresult {i64, float} %M, 0 - %O = getresult {i64, float} %M, 1 - %P = fptosi float %O to i64 - %Q = add i64 %P, %N - ret i64 %Q -} diff --git a/test/CodeGen/X86/non-lazy-bind.ll b/test/CodeGen/X86/non-lazy-bind.ll new file mode 100644 index 0000000000000..f72965877ddb3 --- /dev/null +++ b/test/CodeGen/X86/non-lazy-bind.ll @@ -0,0 +1,27 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +declare void @lazy() nonlazybind +declare void @not() + +; CHECK: foo: +; CHECK: callq _not +; CHECK: callq *_lazy@GOTPCREL(%rip) +define void @foo() nounwind { + call void @not() + call void @lazy() + ret void +} + +; CHECK: tail_call_regular: +; CHECK: jmp _not +define void @tail_call_regular() nounwind { + tail call void @not() + ret void +} + +; CHECK: tail_call_eager: +; CHECK: jmpq *_lazy@GOTPCREL(%rip) +define void @tail_call_eager() nounwind { + tail call void @lazy() + ret void +} diff --git a/test/CodeGen/X86/opt-ext-uses.ll b/test/CodeGen/X86/opt-ext-uses.ll index fa2aef517477b..72fb38b27dfe6 100644 --- a/test/CodeGen/X86/opt-ext-uses.ll +++ b/test/CodeGen/X86/opt-ext-uses.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | grep movw | count 1 -define i16 @t() signext { +define signext i16 @t() { entry: %tmp180 = load i16* null, align 2 ; <i16> [#uses=3] %tmp180181 = sext i16 %tmp180 to i32 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/optimize-max-0.ll b/test/CodeGen/X86/optimize-max-0.ll index 162c7a568fdf4..981a16a44971e 100644 --- a/test/CodeGen/X86/optimize-max-0.ll +++ b/test/CodeGen/X86/optimize-max-0.ll @@ -8,454 +8,454 @@ target triple = "i386-apple-darwin9" define void @foo(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind { entry: - %0 = mul i32 %x, %w ; <i32> [#uses=2] - %1 = mul i32 %x, %w ; <i32> [#uses=1] - %2 = sdiv i32 %1, 4 ; <i32> [#uses=1] - %.sum2 = add i32 %2, %0 ; <i32> [#uses=2] - %cond = icmp eq i32 %d, 1 ; <i1> [#uses=1] - br i1 %cond, label %bb29, label %bb10.preheader - -bb10.preheader: ; preds = %entry - %3 = icmp sgt i32 %x, 0 ; <i1> [#uses=1] - br i1 %3, label %bb.nph9, label %bb18.loopexit - -bb.nph7: ; preds = %bb7.preheader - %4 = mul i32 %y.08, %w ; <i32> [#uses=1] - %5 = mul i32 %y.08, %s ; <i32> [#uses=1] - %6 = add i32 %5, 1 ; <i32> [#uses=1] - %tmp8 = icmp sgt i32 1, %w ; <i1> [#uses=1] - %smax9 = select i1 %tmp8, i32 1, i32 %w ; <i32> [#uses=1] - br label %bb6 - -bb6: ; preds = %bb7, %bb.nph7 - %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] ; <i32> [#uses=3] - %7 = add i32 %x.06, %4 ; <i32> [#uses=1] - %8 = shl i32 %x.06, 1 ; <i32> [#uses=1] - %9 = add i32 %6, %8 ; <i32> [#uses=1] - %10 = getelementptr i8* %r, i32 %9 ; <i8*> [#uses=1] - %11 = load i8* %10, align 1 ; <i8> [#uses=1] - %12 = getelementptr i8* %j, i32 %7 ; <i8*> [#uses=1] - store i8 %11, i8* %12, align 1 - br label %bb7 - -bb7: ; preds = %bb6 - %indvar.next7 = add i32 %x.06, 1 ; <i32> [#uses=2] - %exitcond10 = icmp ne i32 %indvar.next7, %smax9 ; <i1> [#uses=1] - br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge - -bb7.bb9_crit_edge: ; preds = %bb7 - br label %bb9 - -bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge - br label %bb10 - -bb10: ; preds = %bb9 - %indvar.next11 = add i32 %y.08, 1 ; <i32> [#uses=2] - %exitcond12 = icmp ne i32 %indvar.next11, %x ; <i1> [#uses=1] - br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge - -bb10.bb18.loopexit_crit_edge: ; preds = %bb10 - br label %bb10.bb18.loopexit_crit_edge.split - -bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge - br label %bb18.loopexit - -bb.nph9: ; preds = %bb10.preheader - %13 = icmp sgt i32 %w, 0 ; <i1> [#uses=1] - br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split - -bb.nph9.split: ; preds = %bb.nph9 - br label %bb7.preheader - -bb7.preheader: ; preds = %bb.nph9.split, %bb10 - %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] ; <i32> [#uses=3] - br i1 true, label %bb.nph7, label %bb9 - -bb.nph5: ; preds = %bb18.loopexit - %14 = sdiv i32 %w, 2 ; <i32> [#uses=1] - %15 = icmp slt i32 %w, 2 ; <i1> [#uses=1] - %16 = sdiv i32 %x, 2 ; <i32> [#uses=2] - br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split - -bb.nph5.split: ; preds = %bb.nph5 - %tmp2 = icmp sgt i32 1, %16 ; <i1> [#uses=1] - %smax3 = select i1 %tmp2, i32 1, i32 %16 ; <i32> [#uses=1] - br label %bb13 - -bb13: ; preds = %bb18, %bb.nph5.split - %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] ; <i32> [#uses=4] - %17 = mul i32 %14, %y.14 ; <i32> [#uses=2] - %18 = shl i32 %y.14, 1 ; <i32> [#uses=1] - %19 = srem i32 %y.14, 2 ; <i32> [#uses=1] - %20 = add i32 %19, %18 ; <i32> [#uses=1] - %21 = mul i32 %20, %s ; <i32> [#uses=2] - br i1 true, label %bb.nph3, label %bb17 - -bb.nph3: ; preds = %bb13 - %22 = add i32 %17, %0 ; <i32> [#uses=1] - %23 = add i32 %17, %.sum2 ; <i32> [#uses=1] - %24 = sdiv i32 %w, 2 ; <i32> [#uses=2] - %tmp = icmp sgt i32 1, %24 ; <i1> [#uses=1] - %smax = select i1 %tmp, i32 1, i32 %24 ; <i32> [#uses=1] - br label %bb14 - -bb14: ; preds = %bb15, %bb.nph3 - %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] ; <i32> [#uses=5] - %25 = shl i32 %x.12, 2 ; <i32> [#uses=1] - %26 = add i32 %25, %21 ; <i32> [#uses=1] - %27 = getelementptr i8* %r, i32 %26 ; <i8*> [#uses=1] - %28 = load i8* %27, align 1 ; <i8> [#uses=1] - %.sum = add i32 %22, %x.12 ; <i32> [#uses=1] - %29 = getelementptr i8* %j, i32 %.sum ; <i8*> [#uses=1] - store i8 %28, i8* %29, align 1 - %30 = shl i32 %x.12, 2 ; <i32> [#uses=1] - %31 = or i32 %30, 2 ; <i32> [#uses=1] - %32 = add i32 %31, %21 ; <i32> [#uses=1] - %33 = getelementptr i8* %r, i32 %32 ; <i8*> [#uses=1] - %34 = load i8* %33, align 1 ; <i8> [#uses=1] - %.sum6 = add i32 %23, %x.12 ; <i32> [#uses=1] - %35 = getelementptr i8* %j, i32 %.sum6 ; <i8*> [#uses=1] - store i8 %34, i8* %35, align 1 - br label %bb15 - -bb15: ; preds = %bb14 - %indvar.next = add i32 %x.12, 1 ; <i32> [#uses=2] - %exitcond = icmp ne i32 %indvar.next, %smax ; <i1> [#uses=1] - br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge - -bb15.bb17_crit_edge: ; preds = %bb15 - br label %bb17 - -bb17: ; preds = %bb15.bb17_crit_edge, %bb13 - br label %bb18 - -bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader - %36 = icmp slt i32 %x, 2 ; <i1> [#uses=1] - br i1 %36, label %bb20, label %bb.nph5 - -bb18: ; preds = %bb17 - %indvar.next1 = add i32 %y.14, 1 ; <i32> [#uses=2] - %exitcond4 = icmp ne i32 %indvar.next1, %smax3 ; <i1> [#uses=1] - br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge - -bb18.bb20_crit_edge: ; preds = %bb18 - br label %bb18.bb20_crit_edge.split - -bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5 - br label %bb20 - -bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit - switch i32 %d, label %return [ - i32 3, label %bb22 - i32 1, label %bb29 - ] - -bb22: ; preds = %bb20 - %37 = mul i32 %x, %w ; <i32> [#uses=1] - %38 = sdiv i32 %37, 4 ; <i32> [#uses=1] - %.sum3 = add i32 %38, %.sum2 ; <i32> [#uses=2] - %39 = add i32 %x, 15 ; <i32> [#uses=1] - %40 = and i32 %39, -16 ; <i32> [#uses=1] - %41 = add i32 %w, 15 ; <i32> [#uses=1] - %42 = and i32 %41, -16 ; <i32> [#uses=1] - %43 = mul i32 %40, %s ; <i32> [#uses=1] - %44 = icmp sgt i32 %x, 0 ; <i1> [#uses=1] - br i1 %44, label %bb.nph, label %bb26 - -bb.nph: ; preds = %bb22 - br label %bb23 - -bb23: ; preds = %bb24, %bb.nph - %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] ; <i32> [#uses=3] - %45 = mul i32 %y.21, %42 ; <i32> [#uses=1] - %.sum1 = add i32 %45, %43 ; <i32> [#uses=1] - %46 = getelementptr i8* %r, i32 %.sum1 ; <i8*> [#uses=1] - %47 = mul i32 %y.21, %w ; <i32> [#uses=1] - %.sum5 = add i32 %47, %.sum3 ; <i32> [#uses=1] - %48 = getelementptr i8* %j, i32 %.sum5 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %48, i8* %46, i32 %w, i32 1) - br label %bb24 - -bb24: ; preds = %bb23 - %indvar.next5 = add i32 %y.21, 1 ; <i32> [#uses=2] - %exitcond6 = icmp ne i32 %indvar.next5, %x ; <i1> [#uses=1] - br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge - -bb24.bb26_crit_edge: ; preds = %bb24 - br label %bb26 - -bb26: ; preds = %bb24.bb26_crit_edge, %bb22 - %49 = mul i32 %x, %w ; <i32> [#uses=1] - %.sum4 = add i32 %.sum3, %49 ; <i32> [#uses=1] - %50 = getelementptr i8* %j, i32 %.sum4 ; <i8*> [#uses=1] - %51 = mul i32 %x, %w ; <i32> [#uses=1] - %52 = sdiv i32 %51, 2 ; <i32> [#uses=1] - tail call void @llvm.memset.i32(i8* %50, i8 -128, i32 %52, i32 1) - ret void - -bb29: ; preds = %bb20, %entry - %53 = add i32 %w, 15 ; <i32> [#uses=1] - %54 = and i32 %53, -16 ; <i32> [#uses=1] - %55 = icmp sgt i32 %x, 0 ; <i1> [#uses=1] - br i1 %55, label %bb.nph11, label %bb33 - -bb.nph11: ; preds = %bb29 - br label %bb30 - -bb30: ; preds = %bb31, %bb.nph11 - %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] ; <i32> [#uses=3] - %56 = mul i32 %y.310, %54 ; <i32> [#uses=1] - %57 = getelementptr i8* %r, i32 %56 ; <i8*> [#uses=1] - %58 = mul i32 %y.310, %w ; <i32> [#uses=1] - %59 = getelementptr i8* %j, i32 %58 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %59, i8* %57, i32 %w, i32 1) - br label %bb31 - -bb31: ; preds = %bb30 - %indvar.next13 = add i32 %y.310, 1 ; <i32> [#uses=2] - %exitcond14 = icmp ne i32 %indvar.next13, %x ; <i1> [#uses=1] - br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge - -bb31.bb33_crit_edge: ; preds = %bb31 - br label %bb33 - -bb33: ; preds = %bb31.bb33_crit_edge, %bb29 - %60 = mul i32 %x, %w ; <i32> [#uses=1] - %61 = getelementptr i8* %j, i32 %60 ; <i8*> [#uses=1] - %62 = mul i32 %x, %w ; <i32> [#uses=1] - %63 = sdiv i32 %62, 2 ; <i32> [#uses=1] - tail call void @llvm.memset.i32(i8* %61, i8 -128, i32 %63, i32 1) - ret void - -return: ; preds = %bb20 - ret void + %0 = mul i32 %x, %w + %1 = mul i32 %x, %w + %2 = sdiv i32 %1, 4 + %.sum2 = add i32 %2, %0 + %cond = icmp eq i32 %d, 1 + br i1 %cond, label %bb29, label %bb10.preheader + +bb10.preheader: ; preds = %entry + %3 = icmp sgt i32 %x, 0 + br i1 %3, label %bb.nph9, label %bb18.loopexit + +bb.nph7: ; preds = %bb7.preheader + %4 = mul i32 %y.08, %w + %5 = mul i32 %y.08, %s + %6 = add i32 %5, 1 + %tmp8 = icmp sgt i32 1, %w + %smax9 = select i1 %tmp8, i32 1, i32 %w + br label %bb6 + +bb6: ; preds = %bb7, %bb.nph7 + %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] + %7 = add i32 %x.06, %4 + %8 = shl i32 %x.06, 1 + %9 = add i32 %6, %8 + %10 = getelementptr i8* %r, i32 %9 + %11 = load i8* %10, align 1 + %12 = getelementptr i8* %j, i32 %7 + store i8 %11, i8* %12, align 1 + br label %bb7 + +bb7: ; preds = %bb6 + %indvar.next7 = add i32 %x.06, 1 + %exitcond10 = icmp ne i32 %indvar.next7, %smax9 + br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge + +bb7.bb9_crit_edge: ; preds = %bb7 + br label %bb9 + +bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge + br label %bb10 + +bb10: ; preds = %bb9 + %indvar.next11 = add i32 %y.08, 1 + %exitcond12 = icmp ne i32 %indvar.next11, %x + br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge + +bb10.bb18.loopexit_crit_edge: ; preds = %bb10 + br label %bb10.bb18.loopexit_crit_edge.split + +bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge + br label %bb18.loopexit + +bb.nph9: ; preds = %bb10.preheader + %13 = icmp sgt i32 %w, 0 + br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split + +bb.nph9.split: ; preds = %bb.nph9 + br label %bb7.preheader + +bb7.preheader: ; preds = %bb.nph9.split, %bb10 + %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] + br i1 true, label %bb.nph7, label %bb9 + +bb.nph5: ; preds = %bb18.loopexit + %14 = sdiv i32 %w, 2 + %15 = icmp slt i32 %w, 2 + %16 = sdiv i32 %x, 2 + br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split + +bb.nph5.split: ; preds = %bb.nph5 + %tmp2 = icmp sgt i32 1, %16 + %smax3 = select i1 %tmp2, i32 1, i32 %16 + br label %bb13 + +bb13: ; preds = %bb18, %bb.nph5.split + %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] + %17 = mul i32 %14, %y.14 + %18 = shl i32 %y.14, 1 + %19 = srem i32 %y.14, 2 + %20 = add i32 %19, %18 + %21 = mul i32 %20, %s + br i1 true, label %bb.nph3, label %bb17 + +bb.nph3: ; preds = %bb13 + %22 = add i32 %17, %0 + %23 = add i32 %17, %.sum2 + %24 = sdiv i32 %w, 2 + %tmp = icmp sgt i32 1, %24 + %smax = select i1 %tmp, i32 1, i32 %24 + br label %bb14 + +bb14: ; preds = %bb15, %bb.nph3 + %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] + %25 = shl i32 %x.12, 2 + %26 = add i32 %25, %21 + %27 = getelementptr i8* %r, i32 %26 + %28 = load i8* %27, align 1 + %.sum = add i32 %22, %x.12 + %29 = getelementptr i8* %j, i32 %.sum + store i8 %28, i8* %29, align 1 + %30 = shl i32 %x.12, 2 + %31 = or i32 %30, 2 + %32 = add i32 %31, %21 + %33 = getelementptr i8* %r, i32 %32 + %34 = load i8* %33, align 1 + %.sum6 = add i32 %23, %x.12 + %35 = getelementptr i8* %j, i32 %.sum6 + store i8 %34, i8* %35, align 1 + br label %bb15 + +bb15: ; preds = %bb14 + %indvar.next = add i32 %x.12, 1 + %exitcond = icmp ne i32 %indvar.next, %smax + br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge + +bb15.bb17_crit_edge: ; preds = %bb15 + br label %bb17 + +bb17: ; preds = %bb15.bb17_crit_edge, %bb13 + br label %bb18 + +bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader + %36 = icmp slt i32 %x, 2 + br i1 %36, label %bb20, label %bb.nph5 + +bb18: ; preds = %bb17 + %indvar.next1 = add i32 %y.14, 1 + %exitcond4 = icmp ne i32 %indvar.next1, %smax3 + br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge + +bb18.bb20_crit_edge: ; preds = %bb18 + br label %bb18.bb20_crit_edge.split + +bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5 + br label %bb20 + +bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit + switch i32 %d, label %return [ + i32 3, label %bb22 + i32 1, label %bb29 + ] + +bb22: ; preds = %bb20 + %37 = mul i32 %x, %w + %38 = sdiv i32 %37, 4 + %.sum3 = add i32 %38, %.sum2 + %39 = add i32 %x, 15 + %40 = and i32 %39, -16 + %41 = add i32 %w, 15 + %42 = and i32 %41, -16 + %43 = mul i32 %40, %s + %44 = icmp sgt i32 %x, 0 + br i1 %44, label %bb.nph, label %bb26 + +bb.nph: ; preds = %bb22 + br label %bb23 + +bb23: ; preds = %bb24, %bb.nph + %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] + %45 = mul i32 %y.21, %42 + %.sum1 = add i32 %45, %43 + %46 = getelementptr i8* %r, i32 %.sum1 + %47 = mul i32 %y.21, %w + %.sum5 = add i32 %47, %.sum3 + %48 = getelementptr i8* %j, i32 %.sum5 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %48, i8* %46, i32 %w, i32 1, i1 false) + br label %bb24 + +bb24: ; preds = %bb23 + %indvar.next5 = add i32 %y.21, 1 + %exitcond6 = icmp ne i32 %indvar.next5, %x + br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge + +bb24.bb26_crit_edge: ; preds = %bb24 + br label %bb26 + +bb26: ; preds = %bb24.bb26_crit_edge, %bb22 + %49 = mul i32 %x, %w + %.sum4 = add i32 %.sum3, %49 + %50 = getelementptr i8* %j, i32 %.sum4 + %51 = mul i32 %x, %w + %52 = sdiv i32 %51, 2 + tail call void @llvm.memset.p0i8.i32(i8* %50, i8 -128, i32 %52, i32 1, i1 false) + ret void + +bb29: ; preds = %bb20, %entry + %53 = add i32 %w, 15 + %54 = and i32 %53, -16 + %55 = icmp sgt i32 %x, 0 + br i1 %55, label %bb.nph11, label %bb33 + +bb.nph11: ; preds = %bb29 + br label %bb30 + +bb30: ; preds = %bb31, %bb.nph11 + %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] + %56 = mul i32 %y.310, %54 + %57 = getelementptr i8* %r, i32 %56 + %58 = mul i32 %y.310, %w + %59 = getelementptr i8* %j, i32 %58 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %59, i8* %57, i32 %w, i32 1, i1 false) + br label %bb31 + +bb31: ; preds = %bb30 + %indvar.next13 = add i32 %y.310, 1 + %exitcond14 = icmp ne i32 %indvar.next13, %x + br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge + +bb31.bb33_crit_edge: ; preds = %bb31 + br label %bb33 + +bb33: ; preds = %bb31.bb33_crit_edge, %bb29 + %60 = mul i32 %x, %w + %61 = getelementptr i8* %j, i32 %60 + %62 = mul i32 %x, %w + %63 = sdiv i32 %62, 2 + tail call void @llvm.memset.p0i8.i32(i8* %61, i8 -128, i32 %63, i32 1, i1 false) + ret void + +return: ; preds = %bb20 + ret void } define void @bar(i8* %r, i32 %s, i32 %w, i32 %x, i8* %j, i32 %d) nounwind { entry: - %0 = mul i32 %x, %w ; <i32> [#uses=2] - %1 = mul i32 %x, %w ; <i32> [#uses=1] - %2 = udiv i32 %1, 4 ; <i32> [#uses=1] - %.sum2 = add i32 %2, %0 ; <i32> [#uses=2] - %cond = icmp eq i32 %d, 1 ; <i1> [#uses=1] - br i1 %cond, label %bb29, label %bb10.preheader - -bb10.preheader: ; preds = %entry - %3 = icmp ne i32 %x, 0 ; <i1> [#uses=1] - br i1 %3, label %bb.nph9, label %bb18.loopexit - -bb.nph7: ; preds = %bb7.preheader - %4 = mul i32 %y.08, %w ; <i32> [#uses=1] - %5 = mul i32 %y.08, %s ; <i32> [#uses=1] - %6 = add i32 %5, 1 ; <i32> [#uses=1] - %tmp8 = icmp ugt i32 1, %w ; <i1> [#uses=1] - %smax9 = select i1 %tmp8, i32 1, i32 %w ; <i32> [#uses=1] - br label %bb6 - -bb6: ; preds = %bb7, %bb.nph7 - %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] ; <i32> [#uses=3] - %7 = add i32 %x.06, %4 ; <i32> [#uses=1] - %8 = shl i32 %x.06, 1 ; <i32> [#uses=1] - %9 = add i32 %6, %8 ; <i32> [#uses=1] - %10 = getelementptr i8* %r, i32 %9 ; <i8*> [#uses=1] - %11 = load i8* %10, align 1 ; <i8> [#uses=1] - %12 = getelementptr i8* %j, i32 %7 ; <i8*> [#uses=1] - store i8 %11, i8* %12, align 1 - br label %bb7 - -bb7: ; preds = %bb6 - %indvar.next7 = add i32 %x.06, 1 ; <i32> [#uses=2] - %exitcond10 = icmp ne i32 %indvar.next7, %smax9 ; <i1> [#uses=1] - br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge - -bb7.bb9_crit_edge: ; preds = %bb7 - br label %bb9 - -bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge - br label %bb10 - -bb10: ; preds = %bb9 - %indvar.next11 = add i32 %y.08, 1 ; <i32> [#uses=2] - %exitcond12 = icmp ne i32 %indvar.next11, %x ; <i1> [#uses=1] - br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge - -bb10.bb18.loopexit_crit_edge: ; preds = %bb10 - br label %bb10.bb18.loopexit_crit_edge.split - -bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge - br label %bb18.loopexit - -bb.nph9: ; preds = %bb10.preheader - %13 = icmp ugt i32 %w, 0 ; <i1> [#uses=1] - br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split - -bb.nph9.split: ; preds = %bb.nph9 - br label %bb7.preheader - -bb7.preheader: ; preds = %bb.nph9.split, %bb10 - %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] ; <i32> [#uses=3] - br i1 true, label %bb.nph7, label %bb9 - -bb.nph5: ; preds = %bb18.loopexit - %14 = udiv i32 %w, 2 ; <i32> [#uses=1] - %15 = icmp ult i32 %w, 2 ; <i1> [#uses=1] - %16 = udiv i32 %x, 2 ; <i32> [#uses=2] - br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split - -bb.nph5.split: ; preds = %bb.nph5 - %tmp2 = icmp ugt i32 1, %16 ; <i1> [#uses=1] - %smax3 = select i1 %tmp2, i32 1, i32 %16 ; <i32> [#uses=1] - br label %bb13 - -bb13: ; preds = %bb18, %bb.nph5.split - %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] ; <i32> [#uses=4] - %17 = mul i32 %14, %y.14 ; <i32> [#uses=2] - %18 = shl i32 %y.14, 1 ; <i32> [#uses=1] - %19 = urem i32 %y.14, 2 ; <i32> [#uses=1] - %20 = add i32 %19, %18 ; <i32> [#uses=1] - %21 = mul i32 %20, %s ; <i32> [#uses=2] - br i1 true, label %bb.nph3, label %bb17 - -bb.nph3: ; preds = %bb13 - %22 = add i32 %17, %0 ; <i32> [#uses=1] - %23 = add i32 %17, %.sum2 ; <i32> [#uses=1] - %24 = udiv i32 %w, 2 ; <i32> [#uses=2] - %tmp = icmp ugt i32 1, %24 ; <i1> [#uses=1] - %smax = select i1 %tmp, i32 1, i32 %24 ; <i32> [#uses=1] - br label %bb14 - -bb14: ; preds = %bb15, %bb.nph3 - %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] ; <i32> [#uses=5] - %25 = shl i32 %x.12, 2 ; <i32> [#uses=1] - %26 = add i32 %25, %21 ; <i32> [#uses=1] - %27 = getelementptr i8* %r, i32 %26 ; <i8*> [#uses=1] - %28 = load i8* %27, align 1 ; <i8> [#uses=1] - %.sum = add i32 %22, %x.12 ; <i32> [#uses=1] - %29 = getelementptr i8* %j, i32 %.sum ; <i8*> [#uses=1] - store i8 %28, i8* %29, align 1 - %30 = shl i32 %x.12, 2 ; <i32> [#uses=1] - %31 = or i32 %30, 2 ; <i32> [#uses=1] - %32 = add i32 %31, %21 ; <i32> [#uses=1] - %33 = getelementptr i8* %r, i32 %32 ; <i8*> [#uses=1] - %34 = load i8* %33, align 1 ; <i8> [#uses=1] - %.sum6 = add i32 %23, %x.12 ; <i32> [#uses=1] - %35 = getelementptr i8* %j, i32 %.sum6 ; <i8*> [#uses=1] - store i8 %34, i8* %35, align 1 - br label %bb15 - -bb15: ; preds = %bb14 - %indvar.next = add i32 %x.12, 1 ; <i32> [#uses=2] - %exitcond = icmp ne i32 %indvar.next, %smax ; <i1> [#uses=1] - br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge - -bb15.bb17_crit_edge: ; preds = %bb15 - br label %bb17 - -bb17: ; preds = %bb15.bb17_crit_edge, %bb13 - br label %bb18 - -bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader - %36 = icmp ult i32 %x, 2 ; <i1> [#uses=1] - br i1 %36, label %bb20, label %bb.nph5 - -bb18: ; preds = %bb17 - %indvar.next1 = add i32 %y.14, 1 ; <i32> [#uses=2] - %exitcond4 = icmp ne i32 %indvar.next1, %smax3 ; <i1> [#uses=1] - br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge - -bb18.bb20_crit_edge: ; preds = %bb18 - br label %bb18.bb20_crit_edge.split - -bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5 - br label %bb20 - -bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit - switch i32 %d, label %return [ - i32 3, label %bb22 - i32 1, label %bb29 - ] - -bb22: ; preds = %bb20 - %37 = mul i32 %x, %w ; <i32> [#uses=1] - %38 = udiv i32 %37, 4 ; <i32> [#uses=1] - %.sum3 = add i32 %38, %.sum2 ; <i32> [#uses=2] - %39 = add i32 %x, 15 ; <i32> [#uses=1] - %40 = and i32 %39, -16 ; <i32> [#uses=1] - %41 = add i32 %w, 15 ; <i32> [#uses=1] - %42 = and i32 %41, -16 ; <i32> [#uses=1] - %43 = mul i32 %40, %s ; <i32> [#uses=1] - %44 = icmp ugt i32 %x, 0 ; <i1> [#uses=1] - br i1 %44, label %bb.nph, label %bb26 - -bb.nph: ; preds = %bb22 - br label %bb23 - -bb23: ; preds = %bb24, %bb.nph - %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] ; <i32> [#uses=3] - %45 = mul i32 %y.21, %42 ; <i32> [#uses=1] - %.sum1 = add i32 %45, %43 ; <i32> [#uses=1] - %46 = getelementptr i8* %r, i32 %.sum1 ; <i8*> [#uses=1] - %47 = mul i32 %y.21, %w ; <i32> [#uses=1] - %.sum5 = add i32 %47, %.sum3 ; <i32> [#uses=1] - %48 = getelementptr i8* %j, i32 %.sum5 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %48, i8* %46, i32 %w, i32 1) - br label %bb24 - -bb24: ; preds = %bb23 - %indvar.next5 = add i32 %y.21, 1 ; <i32> [#uses=2] - %exitcond6 = icmp ne i32 %indvar.next5, %x ; <i1> [#uses=1] - br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge - -bb24.bb26_crit_edge: ; preds = %bb24 - br label %bb26 - -bb26: ; preds = %bb24.bb26_crit_edge, %bb22 - %49 = mul i32 %x, %w ; <i32> [#uses=1] - %.sum4 = add i32 %.sum3, %49 ; <i32> [#uses=1] - %50 = getelementptr i8* %j, i32 %.sum4 ; <i8*> [#uses=1] - %51 = mul i32 %x, %w ; <i32> [#uses=1] - %52 = udiv i32 %51, 2 ; <i32> [#uses=1] - tail call void @llvm.memset.i32(i8* %50, i8 -128, i32 %52, i32 1) - ret void - -bb29: ; preds = %bb20, %entry - %53 = add i32 %w, 15 ; <i32> [#uses=1] - %54 = and i32 %53, -16 ; <i32> [#uses=1] - %55 = icmp ugt i32 %x, 0 ; <i1> [#uses=1] - br i1 %55, label %bb.nph11, label %bb33 - -bb.nph11: ; preds = %bb29 - br label %bb30 - -bb30: ; preds = %bb31, %bb.nph11 - %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] ; <i32> [#uses=3] - %56 = mul i32 %y.310, %54 ; <i32> [#uses=1] - %57 = getelementptr i8* %r, i32 %56 ; <i8*> [#uses=1] - %58 = mul i32 %y.310, %w ; <i32> [#uses=1] - %59 = getelementptr i8* %j, i32 %58 ; <i8*> [#uses=1] - tail call void @llvm.memcpy.i32(i8* %59, i8* %57, i32 %w, i32 1) - br label %bb31 - -bb31: ; preds = %bb30 - %indvar.next13 = add i32 %y.310, 1 ; <i32> [#uses=2] - %exitcond14 = icmp ne i32 %indvar.next13, %x ; <i1> [#uses=1] - br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge - -bb31.bb33_crit_edge: ; preds = %bb31 - br label %bb33 - -bb33: ; preds = %bb31.bb33_crit_edge, %bb29 - %60 = mul i32 %x, %w ; <i32> [#uses=1] - %61 = getelementptr i8* %j, i32 %60 ; <i8*> [#uses=1] - %62 = mul i32 %x, %w ; <i32> [#uses=1] - %63 = udiv i32 %62, 2 ; <i32> [#uses=1] - tail call void @llvm.memset.i32(i8* %61, i8 -128, i32 %63, i32 1) - ret void - -return: ; preds = %bb20 - ret void + %0 = mul i32 %x, %w + %1 = mul i32 %x, %w + %2 = udiv i32 %1, 4 + %.sum2 = add i32 %2, %0 + %cond = icmp eq i32 %d, 1 + br i1 %cond, label %bb29, label %bb10.preheader + +bb10.preheader: ; preds = %entry + %3 = icmp ne i32 %x, 0 + br i1 %3, label %bb.nph9, label %bb18.loopexit + +bb.nph7: ; preds = %bb7.preheader + %4 = mul i32 %y.08, %w + %5 = mul i32 %y.08, %s + %6 = add i32 %5, 1 + %tmp8 = icmp ugt i32 1, %w + %smax9 = select i1 %tmp8, i32 1, i32 %w + br label %bb6 + +bb6: ; preds = %bb7, %bb.nph7 + %x.06 = phi i32 [ 0, %bb.nph7 ], [ %indvar.next7, %bb7 ] + %7 = add i32 %x.06, %4 + %8 = shl i32 %x.06, 1 + %9 = add i32 %6, %8 + %10 = getelementptr i8* %r, i32 %9 + %11 = load i8* %10, align 1 + %12 = getelementptr i8* %j, i32 %7 + store i8 %11, i8* %12, align 1 + br label %bb7 + +bb7: ; preds = %bb6 + %indvar.next7 = add i32 %x.06, 1 + %exitcond10 = icmp ne i32 %indvar.next7, %smax9 + br i1 %exitcond10, label %bb6, label %bb7.bb9_crit_edge + +bb7.bb9_crit_edge: ; preds = %bb7 + br label %bb9 + +bb9: ; preds = %bb7.preheader, %bb7.bb9_crit_edge + br label %bb10 + +bb10: ; preds = %bb9 + %indvar.next11 = add i32 %y.08, 1 + %exitcond12 = icmp ne i32 %indvar.next11, %x + br i1 %exitcond12, label %bb7.preheader, label %bb10.bb18.loopexit_crit_edge + +bb10.bb18.loopexit_crit_edge: ; preds = %bb10 + br label %bb10.bb18.loopexit_crit_edge.split + +bb10.bb18.loopexit_crit_edge.split: ; preds = %bb.nph9, %bb10.bb18.loopexit_crit_edge + br label %bb18.loopexit + +bb.nph9: ; preds = %bb10.preheader + %13 = icmp ugt i32 %w, 0 + br i1 %13, label %bb.nph9.split, label %bb10.bb18.loopexit_crit_edge.split + +bb.nph9.split: ; preds = %bb.nph9 + br label %bb7.preheader + +bb7.preheader: ; preds = %bb.nph9.split, %bb10 + %y.08 = phi i32 [ 0, %bb.nph9.split ], [ %indvar.next11, %bb10 ] + br i1 true, label %bb.nph7, label %bb9 + +bb.nph5: ; preds = %bb18.loopexit + %14 = udiv i32 %w, 2 + %15 = icmp ult i32 %w, 2 + %16 = udiv i32 %x, 2 + br i1 %15, label %bb18.bb20_crit_edge.split, label %bb.nph5.split + +bb.nph5.split: ; preds = %bb.nph5 + %tmp2 = icmp ugt i32 1, %16 + %smax3 = select i1 %tmp2, i32 1, i32 %16 + br label %bb13 + +bb13: ; preds = %bb18, %bb.nph5.split + %y.14 = phi i32 [ 0, %bb.nph5.split ], [ %indvar.next1, %bb18 ] + %17 = mul i32 %14, %y.14 + %18 = shl i32 %y.14, 1 + %19 = urem i32 %y.14, 2 + %20 = add i32 %19, %18 + %21 = mul i32 %20, %s + br i1 true, label %bb.nph3, label %bb17 + +bb.nph3: ; preds = %bb13 + %22 = add i32 %17, %0 + %23 = add i32 %17, %.sum2 + %24 = udiv i32 %w, 2 + %tmp = icmp ugt i32 1, %24 + %smax = select i1 %tmp, i32 1, i32 %24 + br label %bb14 + +bb14: ; preds = %bb15, %bb.nph3 + %x.12 = phi i32 [ 0, %bb.nph3 ], [ %indvar.next, %bb15 ] + %25 = shl i32 %x.12, 2 + %26 = add i32 %25, %21 + %27 = getelementptr i8* %r, i32 %26 + %28 = load i8* %27, align 1 + %.sum = add i32 %22, %x.12 + %29 = getelementptr i8* %j, i32 %.sum + store i8 %28, i8* %29, align 1 + %30 = shl i32 %x.12, 2 + %31 = or i32 %30, 2 + %32 = add i32 %31, %21 + %33 = getelementptr i8* %r, i32 %32 + %34 = load i8* %33, align 1 + %.sum6 = add i32 %23, %x.12 + %35 = getelementptr i8* %j, i32 %.sum6 + store i8 %34, i8* %35, align 1 + br label %bb15 + +bb15: ; preds = %bb14 + %indvar.next = add i32 %x.12, 1 + %exitcond = icmp ne i32 %indvar.next, %smax + br i1 %exitcond, label %bb14, label %bb15.bb17_crit_edge + +bb15.bb17_crit_edge: ; preds = %bb15 + br label %bb17 + +bb17: ; preds = %bb15.bb17_crit_edge, %bb13 + br label %bb18 + +bb18.loopexit: ; preds = %bb10.bb18.loopexit_crit_edge.split, %bb10.preheader + %36 = icmp ult i32 %x, 2 + br i1 %36, label %bb20, label %bb.nph5 + +bb18: ; preds = %bb17 + %indvar.next1 = add i32 %y.14, 1 + %exitcond4 = icmp ne i32 %indvar.next1, %smax3 + br i1 %exitcond4, label %bb13, label %bb18.bb20_crit_edge + +bb18.bb20_crit_edge: ; preds = %bb18 + br label %bb18.bb20_crit_edge.split + +bb18.bb20_crit_edge.split: ; preds = %bb18.bb20_crit_edge, %bb.nph5 + br label %bb20 + +bb20: ; preds = %bb18.bb20_crit_edge.split, %bb18.loopexit + switch i32 %d, label %return [ + i32 3, label %bb22 + i32 1, label %bb29 + ] + +bb22: ; preds = %bb20 + %37 = mul i32 %x, %w + %38 = udiv i32 %37, 4 + %.sum3 = add i32 %38, %.sum2 + %39 = add i32 %x, 15 + %40 = and i32 %39, -16 + %41 = add i32 %w, 15 + %42 = and i32 %41, -16 + %43 = mul i32 %40, %s + %44 = icmp ugt i32 %x, 0 + br i1 %44, label %bb.nph, label %bb26 + +bb.nph: ; preds = %bb22 + br label %bb23 + +bb23: ; preds = %bb24, %bb.nph + %y.21 = phi i32 [ 0, %bb.nph ], [ %indvar.next5, %bb24 ] + %45 = mul i32 %y.21, %42 + %.sum1 = add i32 %45, %43 + %46 = getelementptr i8* %r, i32 %.sum1 + %47 = mul i32 %y.21, %w + %.sum5 = add i32 %47, %.sum3 + %48 = getelementptr i8* %j, i32 %.sum5 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %48, i8* %46, i32 %w, i32 1, i1 false) + br label %bb24 + +bb24: ; preds = %bb23 + %indvar.next5 = add i32 %y.21, 1 + %exitcond6 = icmp ne i32 %indvar.next5, %x + br i1 %exitcond6, label %bb23, label %bb24.bb26_crit_edge + +bb24.bb26_crit_edge: ; preds = %bb24 + br label %bb26 + +bb26: ; preds = %bb24.bb26_crit_edge, %bb22 + %49 = mul i32 %x, %w + %.sum4 = add i32 %.sum3, %49 + %50 = getelementptr i8* %j, i32 %.sum4 + %51 = mul i32 %x, %w + %52 = udiv i32 %51, 2 + tail call void @llvm.memset.p0i8.i32(i8* %50, i8 -128, i32 %52, i32 1, i1 false) + ret void + +bb29: ; preds = %bb20, %entry + %53 = add i32 %w, 15 + %54 = and i32 %53, -16 + %55 = icmp ugt i32 %x, 0 + br i1 %55, label %bb.nph11, label %bb33 + +bb.nph11: ; preds = %bb29 + br label %bb30 + +bb30: ; preds = %bb31, %bb.nph11 + %y.310 = phi i32 [ 0, %bb.nph11 ], [ %indvar.next13, %bb31 ] + %56 = mul i32 %y.310, %54 + %57 = getelementptr i8* %r, i32 %56 + %58 = mul i32 %y.310, %w + %59 = getelementptr i8* %j, i32 %58 + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %59, i8* %57, i32 %w, i32 1, i1 false) + br label %bb31 + +bb31: ; preds = %bb30 + %indvar.next13 = add i32 %y.310, 1 + %exitcond14 = icmp ne i32 %indvar.next13, %x + br i1 %exitcond14, label %bb30, label %bb31.bb33_crit_edge + +bb31.bb33_crit_edge: ; preds = %bb31 + br label %bb33 + +bb33: ; preds = %bb31.bb33_crit_edge, %bb29 + %60 = mul i32 %x, %w + %61 = getelementptr i8* %j, i32 %60 + %62 = mul i32 %x, %w + %63 = udiv i32 %62, 2 + tail call void @llvm.memset.p0i8.i32(i8* %61, i8 -128, i32 %63, i32 1, i1 false) + ret void + +return: ; preds = %bb20 + ret void } -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind -declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind diff --git a/test/CodeGen/X86/peep-test-3.ll b/test/CodeGen/X86/peep-test-3.ll index a34a9784cdf81..528c4bcc74df5 100644 --- a/test/CodeGen/X86/peep-test-3.ll +++ b/test/CodeGen/X86/peep-test-3.ll @@ -9,7 +9,7 @@ entry: %0 = ptrtoint float* %A to i32 ; <i32> [#uses=1] %1 = and i32 %0, 3 ; <i32> [#uses=1] %2 = xor i32 %IA, 1 ; <i32> [#uses=1] -; CHECK: orl %ecx, %edx +; CHECK: orl %e ; CHECK-NEXT: je %3 = or i32 %2, %1 ; <i32> [#uses=1] %4 = icmp eq i32 %3, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/personality.ll b/test/CodeGen/X86/personality.ll index e952a9bb25a41..d3d8e3f14af33 100644 --- a/test/CodeGen/X86/personality.ll +++ b/test/CodeGen/X86/personality.ll @@ -4,40 +4,41 @@ define void @_Z1fv() { entry: - invoke void @_Z1gv( ) - to label %return unwind label %unwind + invoke void @_Z1gv() + to label %return unwind label %unwind -unwind: ; preds = %entry - br i1 false, label %eh_then, label %cleanup20 +unwind: ; preds = %entry + br i1 false, label %eh_then, label %cleanup20 -eh_then: ; preds = %unwind - invoke void @__cxa_end_catch( ) - to label %return unwind label %unwind10 +eh_then: ; preds = %unwind + invoke void @__cxa_end_catch() + to label %return unwind label %unwind10 -unwind10: ; preds = %eh_then - %eh_select13 = tail call i64 (i8*, i8*, ...)* @llvm.eh.selector.i64( i8* null, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i32 1 ) ; <i32> [#uses=2] - %tmp18 = icmp slt i64 %eh_select13, 0 ; <i1> [#uses=1] - br i1 %tmp18, label %filter, label %cleanup20 +unwind10: ; preds = %eh_then + %upgraded.eh_select13 = tail call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* null, i8* bitcast (void ()* @__gxx_personality_v0 to i8*), i32 1) + %upgraded.eh_select131 = sext i32 %upgraded.eh_select13 to i64 + %tmp18 = icmp slt i64 %upgraded.eh_select131, 0 + br i1 %tmp18, label %filter, label %cleanup20 -filter: ; preds = %unwind10 - unreachable +filter: ; preds = %unwind10 + unreachable -cleanup20: ; preds = %unwind10, %unwind - %eh_selector.0 = phi i64 [ 0, %unwind ], [ %eh_select13, %unwind10 ] ; <i32> [#uses=0] - ret void +cleanup20: ; preds = %unwind10, %unwind + %eh_selector.0 = phi i64 [ 0, %unwind ], [ %upgraded.eh_select131, %unwind10 ] + ret void -return: ; preds = %eh_then, %entry - ret void +return: ; preds = %eh_then, %entry + ret void } declare void @_Z1gv() -declare i64 @llvm.eh.selector.i64(i8*, i8*, ...) - declare void @__gxx_personality_v0() declare void @__cxa_end_catch() +declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind + ; X64: zPLR ; X64: .byte 155 ; X64-NEXT: .long ___gxx_personality_v0@GOTPCREL+4 diff --git a/test/CodeGen/X86/pic_jumptable.ll b/test/CodeGen/X86/pic_jumptable.ll index b6761e338aa9d..8c16dc68b291d 100644 --- a/test/CodeGen/X86/pic_jumptable.ll +++ b/test/CodeGen/X86/pic_jumptable.ll @@ -1,11 +1,14 @@ -; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false | grep -F .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat -; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false | FileCheck %s +; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false \ +; RUN: | FileCheck %s --check-prefix=CHECK-LINUX +; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false \ +; RUN: | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI' ; rdar://6971437 ; rdar://7738756 declare void @_Z3bari(i32) +; CHECK-LINUX: .text._Z3fooILi1EEvi,"axG",@progbits,_Z3fooILi1EEvi,comdat define linkonce void @_Z3fooILi1EEvi(i32 %Y) nounwind { entry: ; CHECK: L0$pb diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll index 6a08dae51f8ae..945ec4c6b6212 100644 --- a/test/CodeGen/X86/pr1505b.ll +++ b/test/CodeGen/X86/pr1505b.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5 -; RUN: llc < %s -mcpu=i486 | grep fstps | count 2 +; RUN: llc < %s -mcpu=i486 | FileCheck %s ; PR1505 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" @@ -30,19 +29,41 @@ declare void @_ZNSt8ios_base4InitC1Ev(%"struct.std::ctype_base"*) declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) +; CHECK: main define i32 @main() { entry: +; CHECK: flds %tmp6 = volatile load float* @a ; <float> [#uses=1] +; CHECK: fstps (%esp) +; CHECK: tanf %tmp9 = tail call float @tanf( float %tmp6 ) ; <float> [#uses=1] +; Spill returned value: +; CHECK: fstp + +; CHECK: fldl %tmp12 = volatile load double* @b ; <double> [#uses=1] +; CHECK: fstpl (%esp) +; CHECK: tan %tmp13 = tail call double @tan( double %tmp12 ) ; <double> [#uses=1] +; Spill returned value: +; CHECK: fstp %tmp1314 = fptrunc double %tmp13 to float ; <float> [#uses=1] %tmp16 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([12 x i8]* @.str, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] %tmp1920 = fpext float %tmp9 to double ; <double> [#uses=1] +; reload: +; CHECK: fld +; CHECK: fstpl +; CHECK: ZNSolsEd %tmp22 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp16, double %tmp1920 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] %tmp30 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp22 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] +; reload: +; CHECK: fld +; CHECK: fstps +; CHECK: ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc %tmp34 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc( %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4cout, i8* getelementptr ([13 x i8]* @.str1, i32 0, i32 0) ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] %tmp3940 = fpext float %tmp1314 to double ; <double> [#uses=1] +; CHECK: fstpl +; CHECK: ZNSolsEd %tmp42 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZNSolsEd( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp34, double %tmp3940 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=1] %tmp51 = tail call %"struct.std::basic_ostream<char,std::char_traits<char> >"* @_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_( %"struct.std::basic_ostream<char,std::char_traits<char> >"* %tmp42 ) ; <%"struct.std::basic_ostream<char,std::char_traits<char> >"*> [#uses=0] ret i32 0 diff --git a/test/CodeGen/X86/pr2182.ll b/test/CodeGen/X86/pr2182.ll index f97663c6c1ffe..2a8bb358014d2 100644 --- a/test/CodeGen/X86/pr2182.ll +++ b/test/CodeGen/X86/pr2182.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | grep {addl \$3, (%eax)} | count 4 +; RUN: llc < %s | FileCheck %s ; PR2182 target datalayout = @@ -7,18 +7,25 @@ target triple = "i386-apple-darwin8" @x = weak global i32 0 ; <i32*> [#uses=8] define void @loop_2() nounwind { -entry: - %tmp = volatile load i32* @x, align 4 ; <i32> [#uses=1] - %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1] - volatile store i32 %tmp1, i32* @x, align 4 - %tmp.1 = volatile load i32* @x, align 4 ; <i32> [#uses=1] - %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1] - volatile store i32 %tmp1.1, i32* @x, align 4 - %tmp.2 = volatile load i32* @x, align 4 ; <i32> [#uses=1] - %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1] - volatile store i32 %tmp1.2, i32* @x, align 4 - %tmp.3 = volatile load i32* @x, align 4 ; <i32> [#uses=1] - %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1] - volatile store i32 %tmp1.3, i32* @x, align 4 - ret void +; CHECK: loop_2: +; CHECK-NOT: ret +; CHECK: addl $3, (%{{.*}}) +; CHECK-NEXT: addl $3, (%{{.*}}) +; CHECK-NEXT: addl $3, (%{{.*}}) +; CHECK-NEXT: addl $3, (%{{.*}}) +; CHECK-NEXT: ret + + %tmp = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1, i32* @x, align 4 + %tmp.1 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.1, i32* @x, align 4 + %tmp.2 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.2, i32* @x, align 4 + %tmp.3 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.3, i32* @x, align 4 + ret void } diff --git a/test/CodeGen/X86/pr2623.ll b/test/CodeGen/X86/pr2623.ll deleted file mode 100644 index 5d0eb5da2155b..0000000000000 --- a/test/CodeGen/X86/pr2623.ll +++ /dev/null @@ -1,44 +0,0 @@ -; RUN: llc < %s -; PR2623 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-unknown-freebsd7.0" - %.objc_id = type { %.objc_id }* - %.objc_selector = type { i8*, i8* }* -@.objc_sel_ptr = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr13 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr14 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr15 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr16 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr17 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr18 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr19 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr20 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] -@.objc_sel_ptr21 = external constant %.objc_selector ; <%.objc_selector*> [#uses=1] - -@.objc_untyped_selector_alias = alias internal %.objc_selector* @.objc_sel_ptr15 ; <%.objc_selector*> [#uses=0] -@.objc_untyped_selector_alias1 = alias internal %.objc_selector* @.objc_sel_ptr ; <%.objc_selector*> [#uses=0] -@.objc_untyped_selector_alias2 = alias internal %.objc_selector* @.objc_sel_ptr17 ; <%.objc_selector*> [#uses=0] -@.objc_untyped_selector_alias3 = alias internal %.objc_selector* @.objc_sel_ptr16 ; <%.objc_selector*> [#uses=0] -@.objc_untyped_selector_alias4 = alias internal %.objc_selector* @.objc_sel_ptr13 ; <%.objc_selector*> [#uses=0] -@.objc_untyped_selector_alias7 = alias internal %.objc_selector* @.objc_sel_ptr14 ; <%.objc_selector*> [#uses=0] -@getRange = alias internal %.objc_selector* @.objc_sel_ptr18 ; <%.objc_selector*> [#uses=0] -@"valueWithRange:" = alias internal %.objc_selector* @.objc_sel_ptr21 ; <%.objc_selector*> [#uses=0] -@rangeValue = alias internal %.objc_selector* @.objc_sel_ptr20 ; <%.objc_selector*> [#uses=0] -@"printRange:" = alias internal %.objc_selector* @.objc_sel_ptr19 ; <%.objc_selector*> [#uses=0] - -define void @"._objc_method_SmalltalkTool()-run"(i8* %self, %.objc_selector %_cmd) { -entry: - br i1 false, label %small_int_messagerangeValue, label %real_object_messagerangeValue - -small_int_messagerangeValue: ; preds = %entry - br label %Continue - -real_object_messagerangeValue: ; preds = %entry - br label %Continue - -Continue: ; preds = %real_object_messagerangeValue, %small_int_messagerangeValue - %rangeValue = phi { i32, i32 } [ undef, %small_int_messagerangeValue ], [ undef, %real_object_messagerangeValue ] ; <{ i32, i32 }> [#uses=1] - call void (%.objc_id, %.objc_selector, ...)* null( %.objc_id null, %.objc_selector null, { i32, i32 } %rangeValue ) - ret void -} diff --git a/test/CodeGen/X86/pr3216.ll b/test/CodeGen/X86/pr3216.ll index 38c9f324ccac4..63676d9d2ce1b 100644 --- a/test/CodeGen/X86/pr3216.ll +++ b/test/CodeGen/X86/pr3216.ll @@ -1,14 +1,18 @@ -; RUN: llc < %s -march=x86 | grep {sar. \$5} +; RUN: llc < %s -march=x86 | FileCheck %s @foo = global i8 127 define i32 @main() nounwind { -entry: - %tmp = load i8* @foo - %bf.lo = lshr i8 %tmp, 5 - %bf.lo.cleared = and i8 %bf.lo, 7 - %0 = shl i8 %bf.lo.cleared, 5 - %bf.val.sext = ashr i8 %0, 5 - %conv = sext i8 %bf.val.sext to i32 - ret i32 %conv +; CHECK: main: +; CHECK-NOT: ret +; CHECK: sar{{.}} $5 +; CHECK: ret + + %tmp = load i8* @foo + %bf.lo = lshr i8 %tmp, 5 + %bf.lo.cleared = and i8 %bf.lo, 7 + %1 = shl i8 %bf.lo.cleared, 5 + %bf.val.sext = ashr i8 %1, 5 + %conv = sext i8 %bf.val.sext to i32 + ret i32 %conv } diff --git a/test/CodeGen/X86/pr3317.ll b/test/CodeGen/X86/pr3317.ll index 9d6626b324d54..d83daf01d3b0b 100644 --- a/test/CodeGen/X86/pr3317.ll +++ b/test/CodeGen/X86/pr3317.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=x86 ; PR3317 +%VT = type [0 x i32 (...)*] %ArraySInt16 = type { %JavaObject, i8*, [0 x i16] } %ArraySInt8 = type { %JavaObject, i8*, [0 x i8] } %Attribut = type { %ArraySInt16*, i32, i32 } @@ -14,7 +15,6 @@ %JavaObject = type { %VT*, %JavaCommonClass*, i8* } %TaskClassMirror = type { i32, i8* } %UTF8 = type { %JavaObject, i8*, [0 x i16] } - %VT = type [0 x i32 (...)*] declare void @jnjvmNullPointerException() diff --git a/test/CodeGen/X86/pre-split1.ll b/test/CodeGen/X86/pre-split1.ll deleted file mode 100644 index b55bf5710767d..0000000000000 --- a/test/CodeGen/X86/pre-split1.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 -; XFAIL: * - -define void @test(double* %P, i32 %cond) nounwind { -entry: - %0 = load double* %P, align 8 ; <double> [#uses=1] - %1 = fadd double %0, 4.000000e+00 ; <double> [#uses=2] - %2 = icmp eq i32 %cond, 0 ; <i1> [#uses=1] - br i1 %2, label %bb1, label %bb - -bb: ; preds = %entry - %3 = fadd double %1, 4.000000e+00 ; <double> [#uses=1] - br label %bb1 - -bb1: ; preds = %bb, %entry - %A.0 = phi double [ %3, %bb ], [ %1, %entry ] ; <double> [#uses=1] - %4 = fmul double %A.0, 4.000000e+00 ; <double> [#uses=1] - %5 = tail call i32 (...)* @bar() nounwind ; <i32> [#uses=0] - store double %4, double* %P, align 8 - ret void -} - -declare i32 @bar(...) diff --git a/test/CodeGen/X86/pre-split10.ll b/test/CodeGen/X86/pre-split10.ll deleted file mode 100644 index 83c6450c0ab9f..0000000000000 --- a/test/CodeGen/X86/pre-split10.ll +++ /dev/null @@ -1,51 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan - -define i32 @main(i32 %argc, i8** %argv) nounwind { -entry: - br label %bb14.i - -bb14.i: ; preds = %bb14.i, %entry - %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %0, %bb14.i ] ; <i32> [#uses=1] - %0 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] - %2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] - %3 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] - %exitcond75.i = icmp eq i32 %0, 32 ; <i1> [#uses=1] - br i1 %exitcond75.i, label %bb24.i, label %bb14.i - -bb24.i: ; preds = %bb14.i - %4 = fdiv double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] - %5 = fdiv double %1, 0.000000e+00 ; <double> [#uses=1] - %6 = fdiv double %2, 0.000000e+00 ; <double> [#uses=1] - %7 = fdiv double %3, 0.000000e+00 ; <double> [#uses=1] - br label %bb31.i - -bb31.i: ; preds = %bb31.i, %bb24.i - %tmp.0.reg2mem.0.i = phi i32 [ 0, %bb24.i ], [ %indvar.next64.i, %bb31.i ] ; <i32> [#uses=1] - %indvar.next64.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2] - %exitcond65.i = icmp eq i32 %indvar.next64.i, 64 ; <i1> [#uses=1] - br i1 %exitcond65.i, label %bb33.i, label %bb31.i - -bb33.i: ; preds = %bb31.i - br label %bb35.preheader.i - -bb5.i.i: ; preds = %bb35.preheader.i - %8 = call double @floor(double 0.000000e+00) nounwind readnone ; <double> [#uses=0] - br label %bb7.i.i - -bb7.i.i: ; preds = %bb35.preheader.i, %bb5.i.i - br label %bb35.preheader.i - -bb35.preheader.i: ; preds = %bb7.i.i, %bb33.i - %9 = fsub double 0.000000e+00, %4 ; <double> [#uses=1] - store double %9, double* null, align 8 - %10 = fsub double 0.000000e+00, %5 ; <double> [#uses=1] - store double %10, double* null, align 8 - %11 = fsub double 0.000000e+00, %6 ; <double> [#uses=1] - store double %11, double* null, align 8 - %12 = fsub double 0.000000e+00, %7 ; <double> [#uses=1] - store double %12, double* null, align 8 - br i1 false, label %bb7.i.i, label %bb5.i.i -} - -declare double @floor(double) nounwind readnone diff --git a/test/CodeGen/X86/pre-split11.ll b/test/CodeGen/X86/pre-split11.ll deleted file mode 100644 index 3d549f9111ec8..0000000000000 --- a/test/CodeGen/X86/pre-split11.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | FileCheck %s - -@.str = private constant [28 x i8] c"\0A\0ADOUBLE D = %f\0A\00", align 1 ; <[28 x i8]*> [#uses=1] -@.str1 = private constant [37 x i8] c"double to long l1 = %ld\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1] -@.str2 = private constant [35 x i8] c"double to uint ui1 = %u\09\09(0x%x)\0A\00", align 8 ; <[35 x i8]*> [#uses=1] -@.str3 = private constant [37 x i8] c"double to ulong ul1 = %lu\09\09(0x%lx)\0A\00", align 8 ; <[37 x i8]*> [#uses=1] - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { -; CHECK: movsd %xmm0, (%rsp) -entry: - %0 = icmp sgt i32 %argc, 4 ; <i1> [#uses=1] - br i1 %0, label %bb, label %bb2 - -bb: ; preds = %entry - %1 = getelementptr inbounds i8** %argv, i64 4 ; <i8**> [#uses=1] - %2 = load i8** %1, align 8 ; <i8*> [#uses=1] - %3 = tail call double @atof(i8* %2) nounwind ; <double> [#uses=1] - br label %bb2 - -bb2: ; preds = %bb, %entry - %storemerge = phi double [ %3, %bb ], [ 2.000000e+00, %entry ] ; <double> [#uses=4] - %4 = fptoui double %storemerge to i32 ; <i32> [#uses=2] - %5 = fptoui double %storemerge to i64 ; <i64> [#uses=2] - %6 = fptosi double %storemerge to i64 ; <i64> [#uses=2] - %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i64 0, i64 0), double %storemerge) nounwind ; <i32> [#uses=0] - %8 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str1, i64 0, i64 0), i64 %6, i64 %6) nounwind ; <i32> [#uses=0] - %9 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([35 x i8]* @.str2, i64 0, i64 0), i32 %4, i32 %4) nounwind ; <i32> [#uses=0] - %10 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([37 x i8]* @.str3, i64 0, i64 0), i64 %5, i64 %5) nounwind ; <i32> [#uses=0] - ret i32 0 -} - -declare double @atof(i8* nocapture) nounwind readonly - -declare i32 @printf(i8* nocapture, ...) nounwind diff --git a/test/CodeGen/X86/pre-split2.ll b/test/CodeGen/X86/pre-split2.ll deleted file mode 100644 index 670737b72df1b..0000000000000 --- a/test/CodeGen/X86/pre-split2.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -stats -regalloc=linearscan |& \ -; RUN: grep {pre-alloc-split} | count 2 - -define i32 @t(i32 %arg) { -entry: - br label %bb6 - -.noexc6: ; preds = %bb6 - %0 = and i32 %2, -8 ; <i32> [#uses=1] - tail call void @llvm.memmove.i32(i8* %3, i8* null, i32 %0, i32 1) nounwind - store double %1, double* null, align 8 - br label %bb6 - -bb6: ; preds = %.noexc6, %entry - %1 = uitofp i32 %arg to double ; <double> [#uses=1] - %2 = sub i32 0, 0 ; <i32> [#uses=1] - %3 = invoke i8* @_Znwm(i32 0) - to label %.noexc6 unwind label %lpad32 ; <i8*> [#uses=1] - -lpad32: ; preds = %bb6 - unreachable -} - -declare void @llvm.memmove.i32(i8*, i8*, i32, i32) nounwind - -declare i8* @_Znwm(i32) diff --git a/test/CodeGen/X86/pre-split3.ll b/test/CodeGen/X86/pre-split3.ll deleted file mode 100644 index 0c49a913353c8..0000000000000 --- a/test/CodeGen/X86/pre-split3.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 - -define i32 @t(i32 %arg) { -entry: - br label %bb6 - -.noexc6: ; preds = %bb6 - %0 = and i32 %2, -8 ; <i32> [#uses=1] - tail call void @llvm.memmove.i32(i8* %3, i8* null, i32 %0, i32 1) nounwind - store double %1, double* null, align 8 - br label %bb6 - -bb6: ; preds = %.noexc6, %entry - %1 = uitofp i32 %arg to double ; <double> [#uses=1] - %2 = sub i32 0, 0 ; <i32> [#uses=1] - %3 = invoke i8* @_Znwm(i32 0) - to label %.noexc6 unwind label %lpad32 ; <i8*> [#uses=1] - -lpad32: ; preds = %bb6 - unreachable -} - -declare void @llvm.memmove.i32(i8*, i8*, i32, i32) nounwind - -declare i8* @_Znwm(i32) diff --git a/test/CodeGen/X86/pre-split4.ll b/test/CodeGen/X86/pre-split4.ll deleted file mode 100644 index 37d1ac6301f08..0000000000000 --- a/test/CodeGen/X86/pre-split4.ll +++ /dev/null @@ -1,26 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 2 - -define i32 @main(i32 %argc, i8** %argv) nounwind { -entry: - br label %bb - -bb: ; preds = %bb, %entry - %k.0.reg2mem.0 = phi double [ 1.000000e+00, %entry ], [ %6, %bb ] ; <double> [#uses=2] - %Flint.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %5, %bb ] ; <double> [#uses=1] - %twoThrd.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=1] - %0 = tail call double @llvm.pow.f64(double 0x3FE5555555555555, double 0.000000e+00) ; <double> [#uses=1] - %1 = fadd double %0, %twoThrd.0.reg2mem.0 ; <double> [#uses=1] - %2 = tail call double @sin(double %k.0.reg2mem.0) nounwind readonly ; <double> [#uses=1] - %3 = fmul double 0.000000e+00, %2 ; <double> [#uses=1] - %4 = fdiv double 1.000000e+00, %3 ; <double> [#uses=1] - store double %Flint.0.reg2mem.0, double* null - store double %twoThrd.0.reg2mem.0, double* null - %5 = fadd double %4, %Flint.0.reg2mem.0 ; <double> [#uses=1] - %6 = fadd double %k.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=1] - br label %bb -} - -declare double @llvm.pow.f64(double, double) nounwind readonly - -declare double @sin(double) nounwind readonly diff --git a/test/CodeGen/X86/pre-split5.ll b/test/CodeGen/X86/pre-split5.ll deleted file mode 100644 index 9f41f24c73e5b..0000000000000 --- a/test/CodeGen/X86/pre-split5.ll +++ /dev/null @@ -1,56 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan - -target triple = "i386-apple-darwin9.5" - %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } - %struct.__sFILEX = type opaque - %struct.__sbuf = type { i8*, i32 } -@"\01LC1" = external constant [48 x i8] ; <[48 x i8]*> [#uses=1] - -define i32 @main() nounwind { -entry: - br label %bb5.us - -bb5.us: ; preds = %bb8.split, %bb5.us, %entry - %i.0.reg2mem.0.ph = phi i32 [ 0, %entry ], [ %indvar.next53, %bb8.split ], [ %i.0.reg2mem.0.ph, %bb5.us ] ; <i32> [#uses=2] - %j.0.reg2mem.0.us = phi i32 [ %indvar.next47, %bb5.us ], [ 0, %bb8.split ], [ 0, %entry ] ; <i32> [#uses=1] - %indvar.next47 = add i32 %j.0.reg2mem.0.us, 1 ; <i32> [#uses=2] - %exitcond48 = icmp eq i32 %indvar.next47, 256 ; <i1> [#uses=1] - br i1 %exitcond48, label %bb8.split, label %bb5.us - -bb8.split: ; preds = %bb5.us - %indvar.next53 = add i32 %i.0.reg2mem.0.ph, 1 ; <i32> [#uses=2] - %exitcond54 = icmp eq i32 %indvar.next53, 256 ; <i1> [#uses=1] - br i1 %exitcond54, label %bb11, label %bb5.us - -bb11: ; preds = %bb11, %bb8.split - %i.1.reg2mem.0 = phi i32 [ %indvar.next44, %bb11 ], [ 0, %bb8.split ] ; <i32> [#uses=1] - %indvar.next44 = add i32 %i.1.reg2mem.0, 1 ; <i32> [#uses=2] - %exitcond45 = icmp eq i32 %indvar.next44, 63 ; <i1> [#uses=1] - br i1 %exitcond45, label %bb14, label %bb11 - -bb14: ; preds = %bb14, %bb11 - %indvar = phi i32 [ %indvar.next40, %bb14 ], [ 0, %bb11 ] ; <i32> [#uses=1] - %indvar.next40 = add i32 %indvar, 1 ; <i32> [#uses=2] - %exitcond41 = icmp eq i32 %indvar.next40, 32768 ; <i1> [#uses=1] - br i1 %exitcond41, label %bb28, label %bb14 - -bb28: ; preds = %bb14 - %0 = fdiv double 2.550000e+02, 0.000000e+00 ; <double> [#uses=1] - br label %bb30 - -bb30: ; preds = %bb36, %bb28 - %m.1.reg2mem.0 = phi i32 [ %m.0, %bb36 ], [ 0, %bb28 ] ; <i32> [#uses=1] - %1 = fmul double 0.000000e+00, %0 ; <double> [#uses=1] - %2 = fptosi double %1 to i32 ; <i32> [#uses=1] - br i1 false, label %bb36, label %bb35 - -bb35: ; preds = %bb30 - %3 = tail call i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* null, i8* getelementptr ([48 x i8]* @"\01LC1", i32 0, i32 0), i32 0, i32 0, i32 0, i32 %2) nounwind ; <i32> [#uses=0] - br label %bb36 - -bb36: ; preds = %bb35, %bb30 - %m.0 = phi i32 [ 0, %bb35 ], [ %m.1.reg2mem.0, %bb30 ] ; <i32> [#uses=1] - br label %bb30 -} - -declare i32 @fprintf(%struct.FILE*, i8*, ...) nounwind diff --git a/test/CodeGen/X86/pre-split6.ll b/test/CodeGen/X86/pre-split6.ll deleted file mode 100644 index d8f274db2c9a8..0000000000000 --- a/test/CodeGen/X86/pre-split6.ll +++ /dev/null @@ -1,36 +0,0 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -pre-alloc-split -regalloc=linearscan | grep {divsd 24} | count 1 - -@current_surfaces.b = external global i1 ; <i1*> [#uses=1] - -declare double @sin(double) nounwind readonly - -declare double @asin(double) nounwind readonly - -define fastcc void @trace_line(i32 %line) nounwind { -entry: - %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1] - br i1 %.b3, label %bb.nph, label %return - -bb.nph: ; preds = %entry - %0 = load double* null, align 8 ; <double> [#uses=1] - %1 = load double* null, align 8 ; <double> [#uses=2] - %2 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1] - br i1 %2, label %bb9.i, label %bb13.i - -bb9.i: ; preds = %bb.nph - %3 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=0] - %4 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1] - %5 = fmul double %4, 0.000000e+00 ; <double> [#uses=1] - %6 = tail call double @asin(double %5) nounwind readonly ; <double> [#uses=0] - unreachable - -bb13.i: ; preds = %bb.nph - %7 = fdiv double 1.000000e+00, %1 ; <double> [#uses=1] - %8 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1] - %9 = fmul double %7, %8 ; <double> [#uses=1] - %10 = tail call double @asin(double %9) nounwind readonly ; <double> [#uses=0] - unreachable - -return: ; preds = %entry - ret void -} diff --git a/test/CodeGen/X86/pre-split7.ll b/test/CodeGen/X86/pre-split7.ll deleted file mode 100644 index 8c93faac677c0..0000000000000 --- a/test/CodeGen/X86/pre-split7.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan - -@object_distance = external global double, align 8 ; <double*> [#uses=1] -@axis_slope_angle = external global double, align 8 ; <double*> [#uses=1] -@current_surfaces.b = external global i1 ; <i1*> [#uses=1] - -declare double @sin(double) nounwind readonly - -declare double @asin(double) nounwind readonly - -declare double @tan(double) nounwind readonly - -define fastcc void @trace_line(i32 %line) nounwind { -entry: - %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1] - br i1 %.b3, label %bb, label %return - -bb: ; preds = %bb, %entry - %0 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1] - %1 = fadd double 0.000000e+00, %0 ; <double> [#uses=2] - %2 = tail call double @asin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1] - %3 = fsub double %1, %2 ; <double> [#uses=2] - store double %3, double* @axis_slope_angle, align 8 - %4 = fdiv double %1, 2.000000e+00 ; <double> [#uses=1] - %5 = tail call double @sin(double %4) nounwind readonly ; <double> [#uses=1] - %6 = fmul double 0.000000e+00, %5 ; <double> [#uses=1] - %7 = tail call double @tan(double %3) nounwind readonly ; <double> [#uses=0] - %8 = fadd double 0.000000e+00, %6 ; <double> [#uses=1] - store double %8, double* @object_distance, align 8 - br label %bb - -return: ; preds = %entry - ret void -} diff --git a/test/CodeGen/X86/pre-split8.ll b/test/CodeGen/X86/pre-split8.ll deleted file mode 100644 index 7e6ad6e17695b..0000000000000 --- a/test/CodeGen/X86/pre-split8.ll +++ /dev/null @@ -1,35 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 - -@current_surfaces.b = external global i1 ; <i1*> [#uses=1] - -declare double @asin(double) nounwind readonly - -declare double @tan(double) nounwind readonly - -define fastcc void @trace_line(i32 %line) nounwind { -entry: - %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1] - br i1 %.b3, label %bb, label %return - -bb: ; preds = %bb9.i, %entry - %.rle4 = phi double [ %7, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1] - %0 = load double* null, align 8 ; <double> [#uses=3] - %1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1] - br i1 %1, label %bb9.i, label %bb13.i - -bb9.i: ; preds = %bb - %2 = fsub double %.rle4, %0 ; <double> [#uses=0] - %3 = tail call double @asin(double %.rle4) nounwind readonly ; <double> [#uses=0] - %4 = fmul double 0.000000e+00, %0 ; <double> [#uses=1] - %5 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0] - %6 = fmul double %4, 0.000000e+00 ; <double> [#uses=1] - %7 = fadd double %6, 0.000000e+00 ; <double> [#uses=1] - br i1 false, label %return, label %bb - -bb13.i: ; preds = %bb - unreachable - -return: ; preds = %bb9.i, %entry - ret void -} diff --git a/test/CodeGen/X86/pre-split9.ll b/test/CodeGen/X86/pre-split9.ll deleted file mode 100644 index 951e6fb28a11e..0000000000000 --- a/test/CodeGen/X86/pre-split9.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -pre-alloc-split -regalloc=linearscan -stats |& \ -; RUN: grep {pre-alloc-split} | grep {Number of intervals split} | grep 1 - -@current_surfaces.b = external global i1 ; <i1*> [#uses=1] - -declare double @sin(double) nounwind readonly - -declare double @asin(double) nounwind readonly - -declare double @tan(double) nounwind readonly - -define fastcc void @trace_line(i32 %line) nounwind { -entry: - %.b3 = load i1* @current_surfaces.b ; <i1> [#uses=1] - br i1 %.b3, label %bb, label %return - -bb: ; preds = %bb9.i, %entry - %.rle4 = phi double [ %8, %bb9.i ], [ 0.000000e+00, %entry ] ; <double> [#uses=1] - %0 = load double* null, align 8 ; <double> [#uses=3] - %1 = fcmp une double %0, 0.000000e+00 ; <i1> [#uses=1] - br i1 %1, label %bb9.i, label %bb13.i - -bb9.i: ; preds = %bb - %2 = fsub double %.rle4, %0 ; <double> [#uses=0] - %3 = tail call double @asin(double %.rle4) nounwind readonly ; <double> [#uses=0] - %4 = tail call double @sin(double 0.000000e+00) nounwind readonly ; <double> [#uses=1] - %5 = fmul double %4, %0 ; <double> [#uses=1] - %6 = tail call double @tan(double 0.000000e+00) nounwind readonly ; <double> [#uses=0] - %7 = fmul double %5, 0.000000e+00 ; <double> [#uses=1] - %8 = fadd double %7, 0.000000e+00 ; <double> [#uses=1] - br i1 false, label %return, label %bb - -bb13.i: ; preds = %bb - unreachable - -return: ; preds = %bb9.i, %entry - ret void -} diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index 48d2673e4884f..ebe11a5e8e4a4 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -6,11 +6,11 @@ entry: ; CHECK: prefetcht1 ; CHECK: prefetcht0 ; CHECK: prefetchnta - tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1 ) - tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2 ) - tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 ) - tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 ) ret void } -declare void @llvm.prefetch(i8*, i32, i32) nounwind +declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind diff --git a/test/CodeGen/X86/private.ll b/test/CodeGen/X86/private.ll index f52f8c7af8c16..484afc9b5af37 100644 --- a/test/CodeGen/X86/private.ll +++ b/test/CodeGen/X86/private.ll @@ -5,8 +5,6 @@ ; RUN: llc < %s -mtriple=x86_64-pc-linux | grep .Lbaz: ; RUN: llc < %s -mtriple=x86_64-pc-linux | grep movl.*\.Lbaz -declare void @foo() - define private void @foo() { ret void } diff --git a/test/CodeGen/X86/promote-i16.ll b/test/CodeGen/X86/promote-i16.ll index 101bb29593cc8..3c91d740c86d4 100644 --- a/test/CodeGen/X86/promote-i16.ll +++ b/test/CodeGen/X86/promote-i16.ll @@ -3,9 +3,19 @@ define signext i16 @foo(i16 signext %x) nounwind { entry: ; CHECK: foo: -; CHECK: movzwl 4(%esp), %eax +; CHECK-NOT: movzwl +; CHECK: movswl 4(%esp), %eax ; CHECK: xorl $21998, %eax -; CHECK: movswl %ax, %eax %0 = xor i16 %x, 21998 ret i16 %0 } + +define signext i16 @bar(i16 signext %x) nounwind { +entry: +; CHECK: bar: +; CHECK-NOT: movzwl +; CHECK: movswl 4(%esp), %eax +; CHECK: xorl $-10770, %eax + %0 = xor i16 %x, 54766 + ret i16 %0 +} diff --git a/test/CodeGen/X86/promote-trunc.ll b/test/CodeGen/X86/promote-trunc.ll new file mode 100644 index 0000000000000..4211d82268d27 --- /dev/null +++ b/test/CodeGen/X86/promote-trunc.ll @@ -0,0 +1,11 @@ +; RUN: llc -promote-elements < %s -march=x86-64 + +define<4 x i8> @func_8_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i8> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i8> + %T = add <4 x i8> %Y, %G + ret <4 x i8> %T +} + diff --git a/test/CodeGen/X86/reghinting.ll b/test/CodeGen/X86/reghinting.ll new file mode 100644 index 0000000000000..87f65ed6247aa --- /dev/null +++ b/test/CodeGen/X86/reghinting.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s +; PR10221 + +;; The registers %x and %y must both spill across the finit call. +;; Check that they are spilled early enough that not copies are needed for the +;; fadd and fpext. + +; CHECK: pr10221 +; CHECK-NOT: movaps +; CHECK: movss +; CHECK-NEXT: movss +; CHECK-NEXT: addss +; CHECK-NEXT: cvtss2sd +; CHECK-NEXT: finit + +define i32 @pr10221(float %x, float %y, i8** nocapture %_retval) nounwind uwtable ssp { +entry: + %add = fadd float %x, %y + %conv = fpext float %add to double + %call = tail call i32 @finit(double %conv) nounwind + %tobool = icmp eq i32 %call, 0 + br i1 %tobool, label %return, label %if.end + +if.end: ; preds = %entry + tail call void @foo(float %x, float %y) nounwind + br label %return + +return: ; preds = %entry, %if.end + %retval.0 = phi i32 [ 0, %if.end ], [ 5, %entry ] + ret i32 %retval.0 +} + +declare i32 @finit(double) + +declare void @foo(float, float) diff --git a/test/CodeGen/X86/sdiv-exact.ll b/test/CodeGen/X86/sdiv-exact.ll new file mode 100644 index 0000000000000..48bb8836e8967 --- /dev/null +++ b/test/CodeGen/X86/sdiv-exact.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=x86 < %s | FileCheck %s + +define i32 @test1(i32 %x) { + %div = sdiv exact i32 %x, 25 + ret i32 %div +; CHECK: test1: +; CHECK: imull $-1030792151, 4(%esp) +; CHECK-NEXT: ret +} + +define i32 @test2(i32 %x) { + %div = sdiv exact i32 %x, 24 + ret i32 %div +; CHECK: test2: +; CHECK: sarl $3 +; CHECK-NEXT: imull $-1431655765 +; CHECK-NEXT: ret +} diff --git a/test/CodeGen/X86/sext-trunc.ll b/test/CodeGen/X86/sext-trunc.ll index 2eaf42577c701..22b3791ba5783 100644 --- a/test/CodeGen/X86/sext-trunc.ll +++ b/test/CodeGen/X86/sext-trunc.ll @@ -3,7 +3,7 @@ ; RUN: not grep movz %t ; RUN: not grep and %t -define i8 @foo(i16 signext %x) signext nounwind { +define signext i8 @foo(i16 signext %x) nounwind { %retval56 = trunc i16 %x to i8 ret i8 %retval56 } diff --git a/test/CodeGen/X86/shift-codegen.ll b/test/CodeGen/X86/shift-codegen.ll index 4cba1834bf6c2..7d961e8a9c04d 100644 --- a/test/CodeGen/X86/shift-codegen.ll +++ b/test/CodeGen/X86/shift-codegen.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -relocation-model=static -march=x86 | \ -; RUN: grep {shll \$3} | count 2 +; RUN: llc < %s -relocation-model=static -march=x86 | FileCheck %s ; This should produce two shll instructions, not any lea's. @@ -9,19 +8,31 @@ target triple = "i686-apple-darwin8" define void @fn1() { -entry: - %tmp = load i32* @Y ; <i32> [#uses=1] - %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] - %tmp2 = load i32* @X ; <i32> [#uses=1] - %tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1] - store i32 %tmp3, i32* @X - ret void +; CHECK: fn1: +; CHECK-NOT: ret +; CHECK-NOT: lea +; CHECK: shll $3 +; CHECK-NOT: lea +; CHECK: ret + + %tmp = load i32* @Y ; <i32> [#uses=1] + %tmp1 = shl i32 %tmp, 3 ; <i32> [#uses=1] + %tmp2 = load i32* @X ; <i32> [#uses=1] + %tmp3 = or i32 %tmp1, %tmp2 ; <i32> [#uses=1] + store i32 %tmp3, i32* @X + ret void } define i32 @fn2(i32 %X, i32 %Y) { -entry: - %tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1] - %tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1] - ret i32 %tmp4 +; CHECK: fn2: +; CHECK-NOT: ret +; CHECK-NOT: lea +; CHECK: shll $3 +; CHECK-NOT: lea +; CHECK: ret + + %tmp2 = shl i32 %Y, 3 ; <i32> [#uses=1] + %tmp4 = or i32 %tmp2, %X ; <i32> [#uses=1] + ret i32 %tmp4 } diff --git a/test/CodeGen/X86/shl_undef.ll b/test/CodeGen/X86/shl_undef.ll new file mode 100644 index 0000000000000..54b74cc52eceb --- /dev/null +++ b/test/CodeGen/X86/shl_undef.ll @@ -0,0 +1,53 @@ +; RUN: llc < %s -O1 -mtriple=i386-apple-darwin | FileCheck %s +; +; Interesting test case where %tmp1220 = xor i32 %tmp862, %tmp592 and +; %tmp1676 = xor i32 %tmp1634, %tmp1530 have zero demanded bits after +; DAGCombiner optimization pass. These are changed to undef and in turn +; the successor shl(s) become shl undef, 1. This pattern then matches +; shl x, 1 -> add x, x. add undef, undef doesn't guarentee the low +; order bit is zero and is incorrect. +; +; See rdar://9453156 and rdar://9487392. +; + +; CHECK-NOT: shl +define i32 @foo(i8* %a0, i32* %a2) nounwind { +entry: + %tmp0 = alloca i8 + %tmp1 = alloca i32 + store i8 1, i8* %tmp0 + %tmp921.i7845 = load i8* %a0, align 1 + %tmp309 = xor i8 %tmp921.i7845, 104 + %tmp592 = zext i8 %tmp309 to i32 + %tmp862 = xor i32 1293461297, %tmp592 + %tmp1220 = xor i32 %tmp862, %tmp592 + %tmp1506 = shl i32 %tmp1220, 1 + %tmp1530 = sub i32 %tmp592, %tmp1506 + %tmp1557 = sub i32 %tmp1530, 542767629 + %tmp1607 = and i32 %tmp1557, 1 + store i32 %tmp1607, i32* %tmp1 + %tmp1634 = and i32 %tmp1607, 2080309246 + %tmp1676 = xor i32 %tmp1634, %tmp1530 + %tmp1618 = shl i32 %tmp1676, 1 + %tmp1645 = sub i32 %tmp862, %tmp1618 + %tmp1697 = and i32 %tmp1645, 1 + store i32 %tmp1697, i32* %a2 + ret i32 %tmp1607 +} + +; CHECK-NOT: shl +; shl undef, 0 -> undef +define i32 @foo2_undef() nounwind { +entry: + %tmp2 = shl i32 undef, 0; + ret i32 %tmp2 +} + +; CHECK-NOT: shl +; shl undef, x -> 0 +define i32 @foo1_undef(i32* %a0) nounwind { +entry: + %tmp1 = load i32* %a0, align 1 + %tmp2 = shl i32 undef, %tmp1; + ret i32 %tmp2 +} diff --git a/test/CodeGen/X86/sibcall-byval.ll b/test/CodeGen/X86/sibcall-byval.ll new file mode 100644 index 0000000000000..c335f30a93a28 --- /dev/null +++ b/test/CodeGen/X86/sibcall-byval.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=64 + +%struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } + +define i32 @f(%struct.p* byval align 4 %q) nounwind ssp { +entry: +; 32: _f: +; 32: jmp L_g$stub + +; 64: _f: +; 64: jmp _g + %call = tail call i32 @g(%struct.p* byval align 4 %q) nounwind + ret i32 %call +} + +declare i32 @g(%struct.p* byval align 4) + +define i32 @h(%struct.p* byval align 4 %q, i32 %r) nounwind ssp { +entry: +; 32: _h: +; 32: jmp L_i$stub + +; 64: _h: +; 64: jmp _i + + %call = tail call i32 @i(%struct.p* byval align 4 %q, i32 %r) nounwind + ret i32 %call +} + +declare i32 @i(%struct.p* byval align 4, i32) diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index 4a98efb4d45e1..a9a5420cbcd83 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -312,8 +312,6 @@ entry: ret void } -declare void @foo() - ; If caller / callee calling convention mismatch then check if the return ; values are returned in the same registers. ; rdar://7874780 diff --git a/test/CodeGen/X86/sse1.ll b/test/CodeGen/X86/sse1.ll index 73f88aec643f3..9b2e05b5bedde 100644 --- a/test/CodeGen/X86/sse1.ll +++ b/test/CodeGen/X86/sse1.ll @@ -1,6 +1,6 @@ ; Tests for SSE1 and below, without SSE2+. ; RUN: llc < %s -march=x86 -mcpu=pentium3 -O3 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=pentium3 -O3 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=-sse2,+sse -O3 | FileCheck %s define <8 x i16> @test1(<8 x i32> %a) nounwind { ; CHECK: test1 diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index 8c2e58d503029..8b3a317ffb78c 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -1,6 +1,6 @@ -; These are tests for SSE3 codegen. Yonah has SSE3 and earlier but not SSSE3+. +; These are tests for SSE3 codegen. -; RUN: llc < %s -march=x86-64 -mcpu=yonah -mtriple=i686-apple-darwin9 -O3 \ +; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 \ ; RUN: | FileCheck %s --check-prefix=X64 ; Test for v8xi16 lowering where we extract the first element of the vector and @@ -169,10 +169,10 @@ define internal void @t10() nounwind { ; X64: t10: ; X64: pextrw $4, [[X0:%xmm[0-9]+]], %eax ; X64: unpcklpd [[X1:%xmm[0-9]+]] -; X64: pshuflw $8, [[X1]], [[X1]] -; X64: pinsrw $2, %eax, [[X1]] +; X64: pshuflw $8, [[X1]], [[X2:%xmm[0-9]+]] +; X64: pinsrw $2, %eax, [[X2]] ; X64: pextrw $6, [[X0]], %eax -; X64: pinsrw $3, %eax, [[X1]] +; X64: pinsrw $3, %eax, [[X2]] } diff --git a/test/CodeGen/X86/switch-bt.ll b/test/CodeGen/X86/switch-bt.ll index 9f491d452fa80..8e39342214357 100644 --- a/test/CodeGen/X86/switch-bt.ll +++ b/test/CodeGen/X86/switch-bt.ll @@ -79,3 +79,23 @@ if.end: ; preds = %entry } declare void @bar() + +define void @test3(i32 %x) nounwind { +; CHECK: test3: +; CHECK: cmpl $5 +; CHECK: ja +; CHECK: cmpl $4 +; CHECK: jne + switch i32 %x, label %if.end [ + i32 0, label %if.then + i32 1, label %if.then + i32 2, label %if.then + i32 3, label %if.then + i32 5, label %if.then + ] +if.then: + tail call void @bar() nounwind + ret void +if.end: + ret void +} diff --git a/test/CodeGen/X86/tail-dup-addr.ll b/test/CodeGen/X86/tail-dup-addr.ll new file mode 100644 index 0000000000000..c5a105cb587f2 --- /dev/null +++ b/test/CodeGen/X86/tail-dup-addr.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +; Test that we don't drop a block that has its address taken. + +; CHECK: Ltmp1: ## Block address taken +; CHECK: Ltmp2: ## Block address taken + +@a = common global i32 0, align 4 +@p = common global i8* null, align 8 + +define void @foo() noreturn nounwind uwtable ssp { +entry: + %tmp = load i32* @a, align 4 + %foo = icmp eq i32 0, %tmp + br i1 %foo, label %sw.bb, label %sw.default + +sw.bb: ; preds = %entry + store i8* blockaddress(@foo, %sw.bb1), i8** @p, align 8 + br label %sw.bb1 + +sw.bb1: ; preds = %sw.default, %sw.bb, %entry + store i8* blockaddress(@foo, %sw.default), i8** @p, align 8 + br label %sw.default + +sw.default: ; preds = %sw.bb1, %entry + store i8* blockaddress(@foo, %sw.bb1), i8** @p, align 8 + br label %sw.bb1 +} diff --git a/test/CodeGen/X86/tail-threshold.ll b/test/CodeGen/X86/tail-threshold.ll new file mode 100644 index 0000000000000..f2296a0bd69f4 --- /dev/null +++ b/test/CodeGen/X86/tail-threshold.ll @@ -0,0 +1,44 @@ +; RUN: llc -mtriple=x86_64-pc-linux-gnu -tail-merge-threshold 2 < %s | FileCheck %s + +; Test that we still do some merging if a block has more than +; tail-merge-threshold predecessors. + +; CHECK: callq bar +; CHECK: callq bar +; CHECK: callq bar +; CHECK-NOT: callq + +declare void @bar() + +define void @foo(i32 %xxx) { +entry: + switch i32 %xxx, label %bb4 [ + i32 0, label %bb0 + i32 1, label %bb1 + i32 2, label %bb2 + i32 3, label %bb3 + ] + +bb0: + call void @bar() + br label %bb5 + +bb1: + call void @bar() + br label %bb5 + +bb2: + call void @bar() + br label %bb5 + +bb3: + call void @bar() + br label %bb5 + +bb4: + call void @bar() + br label %bb5 + +bb5: + ret void +} diff --git a/test/CodeGen/X86/tailcallbyval.ll b/test/CodeGen/X86/tailcallbyval.ll index 7002560c82a05..03d6f9411e68e 100644 --- a/test/CodeGen/X86/tailcallbyval.ll +++ b/test/CodeGen/X86/tailcallbyval.ll @@ -13,6 +13,6 @@ entry: define fastcc i32 @tailcaller(%struct.s* byval %a) nounwind { entry: - %tmp4 = tail call fastcc i32 @tailcallee(%struct.s* %a byval) + %tmp4 = tail call fastcc i32 @tailcallee(%struct.s* byval %a ) ret i32 %tmp4 } diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll index 1b1efe713c6e3..7ecf379cd9c55 100644 --- a/test/CodeGen/X86/tailcallbyval64.ll +++ b/test/CodeGen/X86/tailcallbyval64.ll @@ -37,6 +37,6 @@ define fastcc i64 @tailcaller(i64 %b, %struct.s* byval %a) { entry: %tmp2 = getelementptr %struct.s* %a, i32 0, i32 1 %tmp3 = load i64* %tmp2, align 8 - %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* %a byval, i64 %tmp3, i64 %b, i64 7, i64 13, i64 17) + %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* byval %a , i64 %tmp3, i64 %b, i64 7, i64 13, i64 17) ret i64 %tmp4 } diff --git a/test/CodeGen/X86/testl-commute.ll b/test/CodeGen/X86/testl-commute.ll index 3d5f672f98fce..0e6f6363cb89f 100644 --- a/test/CodeGen/X86/testl-commute.ll +++ b/test/CodeGen/X86/testl-commute.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | grep {testl.*\(%r.i\), %} | count 3 +; RUN: llc < %s | FileCheck %s ; rdar://5671654 ; The loads should fold into the testl instructions, no matter how ; the inputs are commuted. @@ -7,6 +7,11 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin7" define i32 @test(i32* %P, i32* %G) nounwind { +; CHECK: test: +; CHECK-NOT: ret +; CHECK: testl (%{{.*}}), %{{.*}} +; CHECK: ret + entry: %0 = load i32* %P, align 4 ; <i32> [#uses=3] %1 = load i32* %G, align 4 ; <i32> [#uses=1] @@ -23,6 +28,11 @@ bb1: ; preds = %entry } define i32 @test2(i32* %P, i32* %G) nounwind { +; CHECK: test2: +; CHECK-NOT: ret +; CHECK: testl (%{{.*}}), %{{.*}} +; CHECK: ret + entry: %0 = load i32* %P, align 4 ; <i32> [#uses=3] %1 = load i32* %G, align 4 ; <i32> [#uses=1] @@ -37,7 +47,13 @@ bb: ; preds = %entry bb1: ; preds = %entry ret i32 %0 } + define i32 @test3(i32* %P, i32* %G) nounwind { +; CHECK: test3: +; CHECK-NOT: ret +; CHECK: testl (%{{.*}}), %{{.*}} +; CHECK: ret + entry: %0 = load i32* %P, align 4 ; <i32> [#uses=3] %1 = load i32* %G, align 4 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/tlv-1.ll b/test/CodeGen/X86/tlv-1.ll index 42940f147ed83..5773260f68dfa 100644 --- a/test/CodeGen/X86/tlv-1.ll +++ b/test/CodeGen/X86/tlv-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple x86_64-apple-darwin -mcpu=core2 | FileCheck %s %struct.A = type { [48 x i8], i32, i32, i32 } diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll index 60620841064f6..92b6859d1dc4d 100644 --- a/test/CodeGen/X86/trunc-to-bool.ll +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -3,7 +3,7 @@ ; value and as the operand of a branch. ; RUN: llc < %s -march=x86 | FileCheck %s -define i1 @test1(i32 %X) zeroext nounwind { +define zeroext i1 @test1(i32 %X) nounwind { %Y = trunc i32 %X to i1 ret i1 %Y } diff --git a/test/CodeGen/X86/twoaddr-remat.ll b/test/CodeGen/X86/twoaddr-remat.ll deleted file mode 100644 index 4940c78371d9d..0000000000000 --- a/test/CodeGen/X86/twoaddr-remat.ll +++ /dev/null @@ -1,67 +0,0 @@ -; RUN: llc < %s -march=x86 | grep 59796 | count 3 - - %Args = type %Value* - %Exec = type opaque* - %Identifier = type opaque* - %JSFunction = type %Value (%Exec, %Scope, %Value, %Args) - %PropertyNameArray = type opaque* - %Scope = type opaque* - %Value = type opaque* - -declare i1 @X1(%Exec) readonly - -declare %Value @X2(%Exec) - -declare i32 @X3(%Exec, %Value) - -declare %Value @X4(i32) readnone - -define internal %Value @fast3bitlookup(%Exec %exec, %Scope %scope, %Value %this, %Args %args) nounwind { -prologue: - %eh_check = tail call i1 @X1( %Exec %exec ) readonly ; <i1> [#uses=1] - br i1 %eh_check, label %exception, label %no_exception - -exception: ; preds = %no_exception, %prologue - %rethrow_result = tail call %Value @X2( %Exec %exec ) ; <%Value> [#uses=1] - ret %Value %rethrow_result - -no_exception: ; preds = %prologue - %args_intptr = bitcast %Args %args to i32* ; <i32*> [#uses=1] - %argc_val = load i32* %args_intptr ; <i32> [#uses=1] - %cmpParamArgc = icmp sgt i32 %argc_val, 0 ; <i1> [#uses=1] - %arg_ptr = getelementptr %Args %args, i32 1 ; <%Args> [#uses=1] - %arg_val = load %Args %arg_ptr ; <%Value> [#uses=1] - %ext_arg_val = select i1 %cmpParamArgc, %Value %arg_val, %Value inttoptr (i32 5 to %Value) ; <%Value> [#uses=1] - %toInt325 = tail call i32 @X3( %Exec %exec, %Value %ext_arg_val ) ; <i32> [#uses=3] - %eh_check6 = tail call i1 @X1( %Exec %exec ) readonly ; <i1> [#uses=1] - br i1 %eh_check6, label %exception, label %no_exception7 - -no_exception7: ; preds = %no_exception - %shl_tmp_result = shl i32 %toInt325, 1 ; <i32> [#uses=1] - %rhs_masked13 = and i32 %shl_tmp_result, 14 ; <i32> [#uses=1] - %ashr_tmp_result = lshr i32 59796, %rhs_masked13 ; <i32> [#uses=1] - %and_tmp_result15 = and i32 %ashr_tmp_result, 3 ; <i32> [#uses=1] - %ashr_tmp_result3283 = lshr i32 %toInt325, 2 ; <i32> [#uses=1] - %rhs_masked38 = and i32 %ashr_tmp_result3283, 14 ; <i32> [#uses=1] - %ashr_tmp_result39 = lshr i32 59796, %rhs_masked38 ; <i32> [#uses=1] - %and_tmp_result41 = and i32 %ashr_tmp_result39, 3 ; <i32> [#uses=1] - %addconv = add i32 %and_tmp_result15, %and_tmp_result41 ; <i32> [#uses=1] - %ashr_tmp_result6181 = lshr i32 %toInt325, 5 ; <i32> [#uses=1] - %rhs_masked67 = and i32 %ashr_tmp_result6181, 6 ; <i32> [#uses=1] - %ashr_tmp_result68 = lshr i32 59796, %rhs_masked67 ; <i32> [#uses=1] - %and_tmp_result70 = and i32 %ashr_tmp_result68, 3 ; <i32> [#uses=1] - %addconv82 = add i32 %addconv, %and_tmp_result70 ; <i32> [#uses=3] - %rangetmp = add i32 %addconv82, 536870912 ; <i32> [#uses=1] - %rangecmp = icmp ult i32 %rangetmp, 1073741824 ; <i1> [#uses=1] - br i1 %rangecmp, label %NumberLiteralIntFast, label %NumberLiteralIntSlow - -NumberLiteralIntFast: ; preds = %no_exception7 - %imm_shift = shl i32 %addconv82, 2 ; <i32> [#uses=1] - %imm_or = or i32 %imm_shift, 3 ; <i32> [#uses=1] - %imm_val = inttoptr i32 %imm_or to %Value ; <%Value> [#uses=1] - ret %Value %imm_val - -NumberLiteralIntSlow: ; preds = %no_exception7 - %toVal = call %Value @X4( i32 %addconv82 ) ; <%Value> [#uses=1] - ret %Value %toVal -} diff --git a/test/CodeGen/X86/umul-with-overflow.ll b/test/CodeGen/X86/umul-with-overflow.ll index 84fcbc7f82950..e5858de6ed714 100644 --- a/test/CodeGen/X86/umul-with-overflow.ll +++ b/test/CodeGen/X86/umul-with-overflow.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=x86 | FileCheck %s declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b) -define i1 @a(i32 %x) zeroext nounwind { +define zeroext i1 @a(i32 %x) nounwind { %res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3) %obil = extractvalue {i32, i1} %res, 1 ret i1 %obil diff --git a/test/CodeGen/X86/unaligned-load.ll b/test/CodeGen/X86/unaligned-load.ll index 9f704898d6888..d8fffbec4f0fd 100644 --- a/test/CodeGen/X86/unaligned-load.ll +++ b/test/CodeGen/X86/unaligned-load.ll @@ -10,9 +10,17 @@ entry: %String2Loc = alloca [31 x i8], align 1 br label %bb -bb: +bb: ; preds = %bb, %entry %String2Loc9 = getelementptr inbounds [31 x i8]* %String2Loc, i64 0, i64 0 - call void @llvm.memcpy.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %String2Loc9, i8* getelementptr inbounds ([31 x i8]* @.str3, i64 0, i64 0), i64 31, i32 1, i1 false) + br label %bb + +return: ; No predecessors! + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + ; I386: calll {{_?}}memcpy ; CORE2: movabsq @@ -20,13 +28,6 @@ bb: ; CORE2: movabsq ; COREI7: movups _.str3 - br label %bb - -return: - ret void -} - -declare void @llvm.memcpy.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind ; CORE2: .section ; CORE2: .align 3 diff --git a/test/CodeGen/X86/undef-label.ll b/test/CodeGen/X86/undef-label.ll new file mode 100644 index 0000000000000..1afd93527b821 --- /dev/null +++ b/test/CodeGen/X86/undef-label.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s + +; This is a case where we would incorrectly conclude that LBB0_1 could only +; be reached via fall through and would therefore omit the label. + +; CHECK: jne .LBB0_1 +; CHECK-NEXT: jnp .LBB0_3 +; CHECK-NEXT: .LBB0_1: + +define void @xyz() { +entry: + br i1 fcmp oeq (double fsub (double undef, double undef), double 0.000000e+00), label %bar, label %foo + +foo: + br i1 fcmp ogt (double fdiv (double fsub (double fmul (double undef, double undef), double fsub (double undef, double undef)), double fmul (double undef, double undef)), double 1.0), label %foo, label %bar + +bar: + ret void +} diff --git a/test/CodeGen/X86/variable-sized-darwin-bzero.ll b/test/CodeGen/X86/variable-sized-darwin-bzero.ll index 4817db22c355a..1e86d75bf09cf 100644 --- a/test/CodeGen/X86/variable-sized-darwin-bzero.ll +++ b/test/CodeGen/X86/variable-sized-darwin-bzero.ll @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero -declare void @llvm.memset.i64(i8*, i8, i64, i32) - define void @foo(i8* %p, i64 %n) { - call void @llvm.memset.i64(i8* %p, i8 0, i64 %n, i32 4) + call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 %n, i32 4, i1 false) ret void } + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/vec_insert-2.ll b/test/CodeGen/X86/vec_insert-2.ll index b08044bb869bf..dee91fd01468a 100644 --- a/test/CodeGen/X86/vec_insert-2.ll +++ b/test/CodeGen/X86/vec_insert-2.ll @@ -1,25 +1,42 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2 -; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2 -; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1 -; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1 -; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X32 %s +; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X64 %s define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind { - %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3 - ret <4 x float> %tmp1 +; X32: t1: +; X32: shufps $36 +; X32: ret + + %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3 + ret <4 x float> %tmp1 } define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind { - %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3 - ret <4 x i32> %tmp1 +; X32: t2: +; X32: shufps $36 +; X32: ret + + %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3 + ret <4 x i32> %tmp1 } define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind { - %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1 - ret <2 x double> %tmp1 +; X32: t3: +; X32: movhpd +; X32: ret + +; X64: t3: +; X64: unpcklpd +; X64: ret + + %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1 + ret <2 x double> %tmp1 } define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind { - %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5 - ret <8 x i16> %tmp1 +; X32: t4: +; X32: pinsrw +; X32: ret + + %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5 + ret <8 x i16> %tmp1 } diff --git a/test/CodeGen/X86/vec_set-A.ll b/test/CodeGen/X86/vec_set-A.ll index f05eecf8c3aed..92dda4c11b880 100644 --- a/test/CodeGen/X86/vec_set-A.ll +++ b/test/CodeGen/X86/vec_set-A.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep {movl.*\$1, %} +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; CHECK: movl $1, %{{.*}} define <2 x i64> @test1() nounwind { entry: ret <2 x i64> < i64 1, i64 0 > diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll index 3fff8497dfdaf..46b0e1890f11a 100644 --- a/test/CodeGen/X86/vector.ll +++ b/test/CodeGen/X86/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llc < %s -march=x86 -mcpu=i386 > %t -; RUN: llc < %s -march=x86 -mcpu=yonah > %t +; RUN: llc < %s -march=x86 -mcpu=yonah >> %t %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/test/CodeGen/X86/x86-64-malloc.ll b/test/CodeGen/X86/x86-64-malloc.ll deleted file mode 100644 index 4aa0ec3dc9f7b..0000000000000 --- a/test/CodeGen/X86/x86-64-malloc.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -; CHECK: shll $3, {{%edi|%ecx}} -; PR3829 -; The generated code should multiply by 3 (sizeof i8*) as an i32, -; not as an i64! - -define i8** @test(i32 %sz) { - %sub = add i32 %sz, 536870911 ; <i32> [#uses=1] - %call = malloc i8*, i32 %sub ; <i8**> [#uses=1] - ret i8** %call -} diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll index 7f96543ba49d4..cbf658888ceda 100644 --- a/test/CodeGen/X86/x86-64-shortint.ll +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -5,7 +5,7 @@ target triple = "x86_64-apple-darwin8" define void @bar(i16 zeroext %A) { - tail call void @foo( i16 %A signext ) + tail call void @foo( i16 signext %A ) ret void } declare void @foo(i16 signext ) diff --git a/test/CodeGen/X86/zext-fold.ll b/test/CodeGen/X86/zext-fold.ll new file mode 100644 index 0000000000000..b3f5cdbb88d11 --- /dev/null +++ b/test/CodeGen/X86/zext-fold.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +;; Simple case +define i32 @test1(i8 %x) nounwind readnone { + %A = and i8 %x, -32 + %B = zext i8 %A to i32 + ret i32 %B +} +; CHECK: test1 +; CHECK: movzbl +; CHECK-NEXT: andl {{.*}}224 + +;; Multiple uses of %x but easily extensible. +define i32 @test2(i8 %x) nounwind readnone { + %A = and i8 %x, -32 + %B = zext i8 %A to i32 + %C = or i8 %x, 63 + %D = zext i8 %C to i32 + %E = add i32 %B, %D + ret i32 %E +} +; CHECK: test2 +; CHECK: movzbl +; CHECK: orl $63 +; CHECK: andl $224 + +declare void @use(i32, i8) + +;; Multiple uses of %x where we shouldn't extend the load. +define void @test3(i8 %x) nounwind readnone { + %A = and i8 %x, -32 + %B = zext i8 %A to i32 + call void @use(i32 %B, i8 %x) + ret void +} +; CHECK: test3 +; CHECK: movzbl 16(%esp), [[REGISTER:%e[a-z]{2}]] +; CHECK-NEXT: movl [[REGISTER]], 4(%esp) +; CHECK-NEXT: andl $224, [[REGISTER]] +; CHECK-NEXT: movl [[REGISTER]], (%esp) +; CHECK-NEXT: call{{.*}}use diff --git a/test/CodeGen/XCore/private.ll b/test/CodeGen/XCore/private.ll index c595a6df4950f..537d63b903a04 100644 --- a/test/CodeGen/XCore/private.ll +++ b/test/CodeGen/XCore/private.ll @@ -6,8 +6,6 @@ ; RUN: grep .Lbaz: %t ; RUN: grep ldw.*\.Lbaz %t -declare void @foo() - define private void @foo() { ret void } |