diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2012-12-22 14:58:30 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2012-12-22 14:58:30 +0000 |
commit | 482e7bddf617ae804dc47133cb07eb4aa81e45de (patch) | |
tree | c074bb56c422dea536a85cc2d80fd620bb6af08e /test | |
parent | 522600a229b950314b5f4af84eba4f3e8a0ffea1 (diff) |
Notes
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/biggot.ll | 50 | ||||
-rw-r--r-- | test/MC/Mips/xgot.ll | 42 | ||||
-rw-r--r-- | test/Transforms/SROA/basictest.ll | 42 | ||||
-rw-r--r-- | test/Transforms/SROA/big-endian.ll | 9 |
4 files changed, 136 insertions, 7 deletions
diff --git a/test/CodeGen/Mips/biggot.ll b/test/CodeGen/Mips/biggot.ll new file mode 100644 index 0000000000000..c4ad851c82587 --- /dev/null +++ b/test/CodeGen/Mips/biggot.ll @@ -0,0 +1,50 @@ +; RUN: llc -march=mipsel -mxgot < %s | FileCheck %s -check-prefix=O32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+n64 -mxgot < %s | \ +; RUN: FileCheck %s -check-prefix=N64 + +@v0 = external global i32 + +define void @foo1() nounwind { +entry: +; O32: lui $[[R0:[0-9]+]], %got_hi(v0) +; O32: addu $[[R1:[0-9]+]], $[[R0]], ${{[a-z0-9]+}} +; O32: lw ${{[0-9]+}}, %got_lo(v0)($[[R1]]) +; O32: lui $[[R2:[0-9]+]], %call_hi(foo0) +; O32: addu $[[R3:[0-9]+]], $[[R2]], ${{[a-z0-9]+}} +; O32: lw ${{[0-9]+}}, %call_lo(foo0)($[[R3]]) + +; N64: lui $[[R0:[0-9]+]], %got_hi(v0) +; N64: daddu $[[R1:[0-9]+]], $[[R0]], ${{[a-z0-9]+}} +; N64: ld ${{[0-9]+}}, %got_lo(v0)($[[R1]]) +; N64: lui $[[R2:[0-9]+]], %call_hi(foo0) +; N64: daddu $[[R3:[0-9]+]], $[[R2]], ${{[a-z0-9]+}} +; N64: ld ${{[0-9]+}}, %call_lo(foo0)($[[R3]]) + + %0 = load i32* @v0, align 4 + tail call void @foo0(i32 %0) nounwind + ret void +} + +declare void @foo0(i32) + +; call to external function. + +define void @foo2(i32* nocapture %d, i32* nocapture %s, i32 %n) nounwind { +entry: +; O32: foo2: +; O32: lui $[[R2:[0-9]+]], %call_hi(memcpy) +; O32: addu $[[R3:[0-9]+]], $[[R2]], ${{[a-z0-9]+}} +; O32: lw ${{[0-9]+}}, %call_lo(memcpy)($[[R3]]) + +; N64: foo2: +; N64: lui $[[R2:[0-9]+]], %call_hi(memcpy) +; N64: daddu $[[R3:[0-9]+]], $[[R2]], ${{[a-z0-9]+}} +; N64: ld ${{[0-9]+}}, %call_lo(memcpy)($[[R3]]) + + %0 = bitcast i32* %d to i8* + %1 = bitcast i32* %s to i8* + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 %n, i32 4, i1 false) + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/MC/Mips/xgot.ll b/test/MC/Mips/xgot.ll new file mode 100644 index 0000000000000..bfe9b9ad6604c --- /dev/null +++ b/test/MC/Mips/xgot.ll @@ -0,0 +1,42 @@ +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mxgot %s -o - | elf-dump --dump-section-data | FileCheck %s + +@.str = private unnamed_addr constant [16 x i8] c"ext_1=%d, i=%d\0A\00", align 1 +@ext_1 = external global i32 + +define void @fill() nounwind { +entry: + +; Check that the appropriate relocations were created. +; For the xgot case we want to see R_MIPS_[GOT|CALL]_[HI|LO]16. + +; R_MIPS_HI16 +; CHECK: ('r_type', 0x05) + +; R_MIPS_LO16 +; CHECK: ('r_type', 0x06) + +; R_MIPS_GOT_HI16 +; CHECK: ('r_type', 0x16) + +; R_MIPS_GOT_LO16 +; CHECK: ('r_type', 0x17) + +; R_MIPS_GOT +; CHECK: ('r_type', 0x09) + +; R_MIPS_LO16 +; CHECK: ('r_type', 0x06) + +; R_MIPS_CALL_HI16 +; CHECK: ('r_type', 0x1e) + +; R_MIPS_CALL_LO16 +; CHECK: ('r_type', 0x1f) + + %0 = load i32* @ext_1, align 4 + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([16 x i8]* @.str, i32 0, i32 0), i32 %0) nounwind + ret void +} + +declare i32 @printf(i8* nocapture, ...) nounwind + diff --git a/test/Transforms/SROA/basictest.ll b/test/Transforms/SROA/basictest.ll index b363eefb3f9d9..9fe926ee2cc1c 100644 --- a/test/Transforms/SROA/basictest.ll +++ b/test/Transforms/SROA/basictest.ll @@ -1134,3 +1134,45 @@ entry: ret void ; CHECK: ret } + +define void @PR14465() { +; Ensure that we don't crash when analyzing a alloca larger than the maximum +; integer type width (MAX_INT_BITS) supported by llvm (1048576*32 > (1<<23)-1). +; CHECK: @PR14465 + + %stack = alloca [1048576 x i32], align 16 +; CHECK: alloca [1048576 x i32] + %cast = bitcast [1048576 x i32]* %stack to i8* + call void @llvm.memset.p0i8.i64(i8* %cast, i8 -2, i64 4194304, i32 16, i1 false) + ret void +; CHECK: ret +} + +define void @PR14548(i1 %x) { +; Handle a mixture of i1 and i8 loads and stores to allocas. This particular +; pattern caused crashes and invalid output in the PR, and its nature will +; trigger a mixture in several permutations as we resolve each alloca +; iteratively. +; Note that we don't do a particularly good *job* of handling these mixtures, +; but the hope is that this is very rare. +; CHECK: @PR14548 + +entry: + %a = alloca <{ i1 }>, align 8 + %b = alloca <{ i1 }>, align 8 +; Nothing of interest is simplified here. +; CHECK: alloca +; CHECK: alloca + + %b.i1 = bitcast <{ i1 }>* %b to i1* + store i1 %x, i1* %b.i1, align 8 + %b.i8 = bitcast <{ i1 }>* %b to i8* + %foo = load i8* %b.i8, align 1 + + %a.i8 = bitcast <{ i1 }>* %a to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.i8, i8* %b.i8, i32 1, i32 1, i1 false) nounwind + %bar = load i8* %a.i8, align 1 + %a.i1 = getelementptr inbounds <{ i1 }>* %a, i32 0, i32 0 + %baz = load i1* %a.i1, align 1 + ret void +} diff --git a/test/Transforms/SROA/big-endian.ll b/test/Transforms/SROA/big-endian.ll index ce82d1f30b57c..1ac6d25d6341d 100644 --- a/test/Transforms/SROA/big-endian.ll +++ b/test/Transforms/SROA/big-endian.ll @@ -82,14 +82,9 @@ entry: %a0i16ptr = bitcast i8* %a0ptr to i16* store i16 1, i16* %a0i16ptr -; CHECK: %[[mask0:.*]] = and i16 1, -16 - - %a1i4ptr = bitcast i8* %a1ptr to i4* - store i4 1, i4* %a1i4ptr -; CHECK-NEXT: %[[insert0:.*]] = or i16 %[[mask0]], 1 store i8 1, i8* %a2ptr -; CHECK-NEXT: %[[mask1:.*]] = and i40 undef, 4294967295 +; CHECK: %[[mask1:.*]] = and i40 undef, 4294967295 ; CHECK-NEXT: %[[insert1:.*]] = or i40 %[[mask1]], 4294967296 %a3i24ptr = bitcast i8* %a3ptr to i24* @@ -110,7 +105,7 @@ entry: %ai = load i56* %aiptr %ret = zext i56 %ai to i64 ret i64 %ret -; CHECK-NEXT: %[[ext4:.*]] = zext i16 %[[insert0]] to i56 +; CHECK-NEXT: %[[ext4:.*]] = zext i16 1 to i56 ; CHECK-NEXT: %[[shift4:.*]] = shl i56 %[[ext4]], 40 ; CHECK-NEXT: %[[mask4:.*]] = and i56 %[[insert3]], 1099511627775 ; CHECK-NEXT: %[[insert4:.*]] = or i56 %[[mask4]], %[[shift4]] |