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-rw-r--r--usr.sbin/cxgbtool/cxgbtool.c363
-rw-r--r--usr.sbin/cxgbtool/reg_defs.c22
-rw-r--r--usr.sbin/cxgbtool/reg_defs_t3.c48
-rw-r--r--usr.sbin/cxgbtool/reg_defs_t3b.c48
-rw-r--r--usr.sbin/cxgbtool/reg_defs_t3c.c48
-rw-r--r--usr.sbin/cxgbtool/version.h4
6 files changed, 361 insertions, 172 deletions
diff --git a/usr.sbin/cxgbtool/cxgbtool.c b/usr.sbin/cxgbtool/cxgbtool.c
index f47b972ff8d3a..28d91f96dfe5d 100644
--- a/usr.sbin/cxgbtool/cxgbtool.c
+++ b/usr.sbin/cxgbtool/cxgbtool.c
@@ -1,6 +1,6 @@
/**************************************************************************
-Copyright (c) 2007-2008, Chelsio Inc.
+Copyright (c) 2007-2009, Chelsio Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -85,13 +85,16 @@ struct reg_info {
static const char *progname;
-static void __attribute__((noreturn)) usage(FILE *fp)
+static void
+usage(FILE *fp)
{
fprintf(fp, "Usage: %s <interface> [operation]\n", progname);
fprintf(fp,
"\tclearstats clear MAC statistics\n"
"\tcontext <type> <id> show an SGE context\n"
"\tdesc <qset> <queue> <idx> [<cnt>] dump SGE descriptors\n"
+ "\tioqs dump uP IOQs\n"
+ "\tla dump uP logic analyzer info\n"
"\tloadboot <boot image> download boot image\n"
"\tloadfw <FW image> download firmware\n"
"\tmdio <phy_addr> <mmd_addr>\n"
@@ -134,7 +137,8 @@ doit(const char *iff_name, unsigned long cmd, void *data)
return ioctl(fd, cmd, data) < 0 ? -1 : 0;
}
-static int get_int_arg(const char *s, uint32_t *valp)
+static int
+get_int_arg(const char *s, uint32_t *valp)
{
char *p;
@@ -170,11 +174,12 @@ write_reg(const char *iff_name, uint32_t addr, uint32_t val)
err(1, "register write");
}
-static int register_io(int argc, char *argv[], int start_arg,
+static int
+register_io(int argc, char *argv[], int start_arg,
const char *iff_name)
{
char *p;
- uint32_t addr, val = 0, write = 0;
+ uint32_t addr, val = 0, w = 0;
if (argc != start_arg + 1) return -1;
@@ -182,14 +187,14 @@ static int register_io(int argc, char *argv[], int start_arg,
if (p == argv[start_arg]) return -1;
if (*p == '=' && p[1]) {
val = strtoul(p + 1, &p, 0);
- write = 1;
+ w = 1;
}
if (*p) {
warnx("bad parameter \"%s\"", argv[start_arg]);
return -1;
}
- if (write)
+ if (w)
write_reg(iff_name, addr, val);
else {
val = read_reg(iff_name, addr);
@@ -198,9 +203,9 @@ static int register_io(int argc, char *argv[], int start_arg,
return 0;
}
-static int mdio_io(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+mdio_io(int argc, char *argv[], int start_arg, const char *iff_name)
{
- struct ifreq ifr;
struct ch_mii_data p;
unsigned int cmd, phy_addr, reg, mmd, val;
@@ -228,12 +233,14 @@ static int mdio_io(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static inline uint32_t xtract(uint32_t val, int shift, int len)
+static inline
+uint32_t xtract(uint32_t val, int shift, int len)
{
return (val >> shift) & ((1 << len) - 1);
}
-static int dump_block_regs(const struct reg_info *reg_array, uint32_t *regs)
+static int
+dump_block_regs(const struct reg_info *reg_array, uint32_t *regs)
{
uint32_t reg_val = 0; // silence compiler warning
@@ -252,7 +259,8 @@ static int dump_block_regs(const struct reg_info *reg_array, uint32_t *regs)
return 1;
}
-static int dump_regs_t2(int argc, char *argv[], int start_arg, uint32_t *regs)
+static int
+dump_regs_t2(int argc, char *argv[], int start_arg, uint32_t *regs)
{
int match = 0;
char *block_name = NULL;
@@ -290,8 +298,8 @@ static int dump_regs_t2(int argc, char *argv[], int start_arg, uint32_t *regs)
}
#if defined(CONFIG_T3_REGS)
-static int dump_regs_t3(int argc, char *argv[], int start_arg, uint32_t *regs,
- int is_pcie)
+static int
+dump_regs_t3(int argc, char *argv[], int start_arg, uint32_t *regs, int is_pcie)
{
int match = 0;
char *block_name = NULL;
@@ -351,8 +359,9 @@ static int dump_regs_t3(int argc, char *argv[], int start_arg, uint32_t *regs,
return 0;
}
-static int dump_regs_t3b(int argc, char *argv[], int start_arg, uint32_t *regs,
- int is_pcie)
+static int
+dump_regs_t3b(int argc, char *argv[], int start_arg, uint32_t *regs,
+ int is_pcie)
{
int match = 0;
char *block_name = NULL;
@@ -412,8 +421,9 @@ static int dump_regs_t3b(int argc, char *argv[], int start_arg, uint32_t *regs,
return 0;
}
-static int dump_regs_t3c(int argc, char *argv[], int start_arg, uint32_t *regs,
- int is_pcie)
+static int
+dump_regs_t3c(int argc, char *argv[], int start_arg, uint32_t *regs,
+ int is_pcie)
{
int match = 0;
char *block_name = NULL;
@@ -477,7 +487,7 @@ static int dump_regs_t3c(int argc, char *argv[], int start_arg, uint32_t *regs,
static int
dump_regs(int argc, char *argv[], int start_arg, const char *iff_name)
{
- int i, vers, revision, is_pcie;
+ int vers, revision, is_pcie;
struct ch_ifconf_regs regs;
regs.len = REGDUMP_SIZE;
@@ -512,7 +522,8 @@ dump_regs(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static int t3_meminfo(const uint32_t *regs)
+static int
+t3_meminfo(const uint32_t *regs)
{
enum {
SG_EGR_CNTX_BADDR = 0x58,
@@ -590,11 +601,16 @@ static int t3_meminfo(const uint32_t *regs)
return 0;
}
-static int meminfo(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+meminfo(int argc, char *argv[], int start_arg, const char *iff_name)
{
int vers;
struct ch_ifconf_regs regs;
+ (void) argc;
+ (void) argv;
+ (void) start_arg;
+
regs.len = REGDUMP_SIZE;
if ((regs.data = malloc(regs.len)) == NULL)
err(1, "can't malloc");
@@ -610,11 +626,11 @@ static int meminfo(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static int mtu_tab_op(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+mtu_tab_op(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_mtus m;
- int i;
+ unsigned int i;
if (argc == start_arg) {
if (doit(iff_name, CHELSIO_GETMTUTAB, &m) < 0)
@@ -647,13 +663,14 @@ static int mtu_tab_op(int argc, char *argv[], int start_arg,
}
#ifdef CHELSIO_INTERNAL
-static void show_egress_cntxt(uint32_t data[])
+static void
+show_egress_cntxt(uint32_t data[])
{
printf("credits: %u\n", data[0] & 0x7fff);
printf("GTS: %u\n", (data[0] >> 15) & 1);
printf("index: %u\n", data[0] >> 16);
printf("queue size: %u\n", data[1] & 0xffff);
- printf("base address: 0x%llx\n",
+ printf("base address: 0x%" PRIx64 "\n",
((data[1] >> 16) | ((uint64_t)data[2] << 16) |
(((uint64_t)data[3] & 0xf) << 48)) << 12);
printf("rsp queue #: %u\n", (data[3] >> 4) & 7);
@@ -665,24 +682,26 @@ static void show_egress_cntxt(uint32_t data[])
printf("valid: %u\n", (data[3] >> 31) & 1);
}
-static void show_fl_cntxt(uint32_t data[])
+static void
+show_fl_cntxt(uint32_t data[])
{
- printf("base address: 0x%llx\n",
+ printf("base address: 0x%" PRIx64 "\n",
((uint64_t)data[0] | ((uint64_t)data[1] & 0xfffff) << 32) << 12);
printf("index: %u\n", (data[1] >> 20) | ((data[2] & 0xf) << 12));
printf("queue size: %u\n", (data[2] >> 4) & 0xffff);
printf("generation: %u\n", (data[2] >> 20) & 1);
printf("entry size: %u\n",
- ((data[2] >> 21) & 0x7ff) | (data[3] & 0x1fffff));
+ (data[2] >> 21) | (data[3] & 0x1fffff) << 11);
printf("congest thr: %u\n", (data[3] >> 21) & 0x3ff);
printf("GTS: %u\n", (data[3] >> 31) & 1);
}
-static void show_response_cntxt(uint32_t data[])
+static void
+show_response_cntxt(uint32_t data[])
{
printf("index: %u\n", data[0] & 0xffff);
printf("size: %u\n", data[0] >> 16);
- printf("base address: 0x%llx\n",
+ printf("base address: 0x%" PRIx64 "\n",
((uint64_t)data[1] | ((uint64_t)data[2] & 0xfffff) << 32) << 12);
printf("MSI-X/RspQ: %u\n", (data[2] >> 20) & 0x3f);
printf("intr enable: %u\n", (data[2] >> 26) & 1);
@@ -692,11 +711,12 @@ static void show_response_cntxt(uint32_t data[])
printf("FL threshold: %u\n", data[3]);
}
-static void show_cq_cntxt(uint32_t data[])
+static void
+show_cq_cntxt(uint32_t data[])
{
printf("index: %u\n", data[0] & 0xffff);
printf("size: %u\n", data[0] >> 16);
- printf("base address: 0x%llx\n",
+ printf("base address: 0x%" PRIx64 "\n",
((uint64_t)data[1] | ((uint64_t)data[2] & 0xfffff) << 32) << 12);
printf("rsp queue #: %u\n", (data[2] >> 20) & 0x3f);
printf("AN: %u\n", (data[2] >> 26) & 1);
@@ -708,8 +728,8 @@ static void show_cq_cntxt(uint32_t data[])
printf("credit threshold: %u\n", data[3] >> 16);
}
-static int get_sge_context(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+get_sge_context(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_cntxt ctx;
@@ -748,8 +768,8 @@ static int get_sge_context(int argc, char *argv[], int start_arg,
#define ntohll(x) be64toh((x))
-static int get_sge_desc(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+get_sge_desc(int argc, char *argv[], int start_arg, const char *iff_name)
{
uint64_t *p, wr_hdr;
unsigned int n = 1, qset, qnum;
@@ -794,7 +814,8 @@ static int get_sge_desc(int argc, char *argv[], int start_arg,
}
#endif
-static int get_tcb2(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+get_tcb2(int argc, char *argv[], int start_arg, const char *iff_name)
{
uint64_t *d;
unsigned int i;
@@ -833,8 +854,9 @@ static int get_tcb2(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static int get_pm_page_spec(const char *s, unsigned int *page_size,
- unsigned int *num_pages)
+static int
+get_pm_page_spec(const char *s, unsigned int *page_size,
+ unsigned int *num_pages)
{
char *p;
unsigned long val;
@@ -852,7 +874,8 @@ static int get_pm_page_spec(const char *s, unsigned int *page_size,
return *p;
}
-static int conf_pm(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+conf_pm(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_pm pm;
@@ -882,8 +905,8 @@ static int conf_pm(int argc, char *argv[], int start_arg, const char *iff_name)
}
#ifdef CHELSIO_INTERNAL
-static int dump_tcam(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+dump_tcam(int argc, char *argv[], int start_arg, const char *iff_name)
{
unsigned int nwords;
struct ch_tcam_word op;
@@ -905,7 +928,8 @@ static int dump_tcam(int argc, char *argv[], int start_arg,
return 0;
}
-static void hexdump_8b(unsigned int start, uint64_t *data, unsigned int len)
+static void
+hexdump_8b(unsigned int start, uint64_t *data, unsigned int len)
{
int i;
@@ -918,8 +942,8 @@ static void hexdump_8b(unsigned int start, uint64_t *data, unsigned int len)
}
}
-static int dump_mc7(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+dump_mc7(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_mem_range mem;
unsigned int mem_id, addr, len;
@@ -957,10 +981,11 @@ static int dump_mc7(int argc, char *argv[], int start_arg,
}
#endif
-/* Max FW size is 32K including version, +4 bytes for the checksum. */
-#define MAX_FW_IMAGE_SIZE (32768 + 4)
+/* Max FW size is 64K including version, +4 bytes for the checksum. */
+#define MAX_FW_IMAGE_SIZE (64 * 1024)
-static int load_fw(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+load_fw(int argc, char *argv[], int start_arg, const char *iff_name)
{
int fd, len;
struct ch_mem_range op;
@@ -977,12 +1002,13 @@ static int load_fw(int argc, char *argv[], int start_arg, const char *iff_name)
if (!op.buf)
err(1, "load firmware");
- op.len = read(fd, op.buf, MAX_FW_IMAGE_SIZE + 1);
- if (op.len < 0)
+ len = read(fd, op.buf, MAX_FW_IMAGE_SIZE + 1);
+ if (len < 0)
err(1, "load firmware");
- if (op.len > MAX_FW_IMAGE_SIZE)
+ if (len > MAX_FW_IMAGE_SIZE)
errx(1, "FW image too large");
+ op.len = len;
if (doit(iff_name, CHELSIO_LOAD_FW, &op) < 0)
err(1, "load firmware");
return 0;
@@ -991,8 +1017,8 @@ static int load_fw(int argc, char *argv[], int start_arg, const char *iff_name)
/* Max BOOT size is 255*512 bytes including the BIOS boot ROM basic header */
#define MAX_BOOT_IMAGE_SIZE (0xff * 512)
-static int load_boot(int argc, char *argv[],
- int start_arg, const char *iff_name)
+static int
+load_boot(int argc, char *argv[], int start_arg, const char *iff_name)
{
int fd, len;
struct ch_mem_range op;
@@ -1022,7 +1048,8 @@ static int load_boot(int argc, char *argv[],
return 0;
}
-static int dump_proto_sram(const char *iff_name)
+static int
+dump_proto_sram(const char *iff_name)
{
int i, j;
uint8_t buf[PROTO_SRAM_SIZE];
@@ -1052,15 +1079,20 @@ static int dump_proto_sram(const char *iff_name)
return 0;
}
-static int proto_sram_op(int argc, char *argv[], int start_arg,
+static int
+proto_sram_op(int argc, char *argv[], int start_arg,
const char *iff_name)
{
+ (void) argv;
+ (void) start_arg;
+
if (argc == start_arg)
return dump_proto_sram(iff_name);
return -1;
}
-static int dump_qset_params(const char *iff_name)
+static int
+dump_qset_params(const char *iff_name)
{
struct ch_qset_params qp;
@@ -1082,10 +1114,10 @@ static int dump_qset_params(const char *iff_name)
return 0;
}
-static int qset_config(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+qset_config(int argc, char *argv[], int start_arg, const char *iff_name)
{
- struct ch_qset_params qp;
+ (void) argv;
if (argc == start_arg)
return dump_qset_params(iff_name);
@@ -1093,11 +1125,13 @@ static int qset_config(int argc, char *argv[], int start_arg,
return -1;
}
-static int qset_num_config(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+qset_num_config(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_reg reg;
+ (void) argv;
+
if (argc == start_arg) {
if (doit(iff_name, CHELSIO_GET_QSET_NUM, &reg) < 0)
err(1, "get qsets");
@@ -1111,7 +1145,8 @@ static int qset_num_config(int argc, char *argv[], int start_arg,
/*
* Parse a string containing an IP address with an optional network prefix.
*/
-static int parse_ipaddr(const char *s, uint32_t *addr, uint32_t *mask)
+static int
+parse_ipaddr(const char *s, uint32_t *addr, uint32_t *mask)
{
char *p, *slash;
struct in_addr ia;
@@ -1141,7 +1176,8 @@ static int parse_ipaddr(const char *s, uint32_t *addr, uint32_t *mask)
/*
* Parse a string containing a value and an optional colon separated mask.
*/
-static int parse_val_mask_param(const char *s, uint32_t *val, uint32_t *mask)
+static int
+parse_val_mask_param(const char *s, uint32_t *val, uint32_t *mask)
{
char *p;
@@ -1154,14 +1190,15 @@ static int parse_val_mask_param(const char *s, uint32_t *val, uint32_t *mask)
return *p ? -1 : 0;
}
-static int parse_trace_param(const char *s, uint32_t *val, uint32_t *mask)
+static int
+parse_trace_param(const char *s, uint32_t *val, uint32_t *mask)
{
return strchr(s, '.') ? parse_ipaddr(s, val, mask) :
parse_val_mask_param(s, val, mask);
}
-static int trace_config(int argc, char *argv[], int start_arg,
- const char *iff_name)
+static int
+trace_config(int argc, char *argv[], int start_arg, const char *iff_name)
{
uint32_t val, mask;
struct ch_trace trace;
@@ -1236,7 +1273,8 @@ static int trace_config(int argc, char *argv[], int start_arg,
return 0;
}
-static int get_sched_param(int argc, char *argv[], int pos, unsigned int *valp)
+static int
+get_sched_param(int argc, char *argv[], int pos, unsigned int *valp)
{
if (pos + 1 >= argc)
errx(1, "missing value for %s", argv[pos]);
@@ -1245,7 +1283,8 @@ static int get_sched_param(int argc, char *argv[], int pos, unsigned int *valp)
return 0;
}
-static int tx_sched(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+tx_sched(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_hw_sched op;
unsigned int idx, val;
@@ -1291,7 +1330,8 @@ static int tx_sched(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static int pktsched(int argc, char *argv[], int start_arg, const char *iff_name)
+static int
+pktsched(int argc, char *argv[], int start_arg, const char *iff_name)
{
struct ch_pktsched_params op;
unsigned int idx, min = -1, max, binding = -1;
@@ -1330,35 +1370,101 @@ static int pktsched(int argc, char *argv[], int start_arg, const char *iff_name)
return 0;
}
-static int clear_stats(int argc, char *argv[], int start_arg,
- const char *iff_name)
+
+static int
+clear_stats(int argc, char *argv[], int start_arg, const char *iff_name)
{
+ (void) argc;
+ (void) argv;
+ (void) start_arg;
+
if (doit(iff_name, CHELSIO_CLEAR_STATS, NULL) < 0)
err(1, "clearstats");
return 0;
}
-int main(int argc, char *argv[])
+static int
+get_up_la(int argc, char *argv[], int start_arg, const char *iff_name)
{
- int r = -1;
- const char *iff_name;
+ struct ch_up_la la;
+ int i, idx, max_idx, entries;
+
+ (void) argc;
+ (void) argv;
+ (void) start_arg;
+
+ la.stopped = 0;
+ la.idx = -1;
+ la.bufsize = LA_BUFSIZE;
+ la.data = malloc(la.bufsize);
+ if (!la.data)
+ err(1, "uP_LA malloc");
+
+ if (doit(iff_name, CHELSIO_GET_UP_LA, &la) < 0)
+ err(1, "uP_LA");
+
+ if (la.stopped)
+ printf("LA is not running\n");
+
+ entries = la.bufsize / 4;
+ idx = (int)la.idx;
+ max_idx = (entries / 4) - 1;
+ for (i = 0; i < max_idx; i++) {
+ printf("%04x %08x %08x\n",
+ la.data[idx], la.data[idx+2], la.data[idx+1]);
+ idx = (idx + 4) & (entries - 1);
+ }
- progname = argv[0];
+ return 0;
+}
- if (argc == 2) {
- if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help"))
- usage(stdout);
- if (!strcmp(argv[1], "-v") || !strcmp(argv[1], "--version")) {
- printf("%s version %s\n", PROGNAME, VERSION);
- printf("%s\n", COPYRIGHT);
- exit(0);
- }
+static int
+get_up_ioqs(int argc, char *argv[], int start_arg, const char *iff_name)
+{
+ struct ch_up_ioqs ioqs;
+ int i, entries;
+
+ (void) argc;
+ (void) argv;
+ (void) start_arg;
+
+ bzero(&ioqs, sizeof(ioqs));
+ ioqs.bufsize = IOQS_BUFSIZE;
+ ioqs.data = malloc(IOQS_BUFSIZE);
+ if (!ioqs.data)
+ err(1, "uP_IOQs malloc");
+
+ if (doit(iff_name, CHELSIO_GET_UP_IOQS, &ioqs) < 0)
+ err(1, "uP_IOQs");
+
+ printf("ioq_rx_enable : 0x%08x\n", ioqs.ioq_rx_enable);
+ printf("ioq_tx_enable : 0x%08x\n", ioqs.ioq_tx_enable);
+ printf("ioq_rx_status : 0x%08x\n", ioqs.ioq_rx_status);
+ printf("ioq_tx_status : 0x%08x\n", ioqs.ioq_tx_status);
+
+ entries = ioqs.bufsize / sizeof(struct t3_ioq_entry);
+ for (i = 0; i < entries; i++) {
+ printf("\nioq[%d].cp : 0x%08x\n", i,
+ ioqs.data[i].ioq_cp);
+ printf("ioq[%d].pp : 0x%08x\n", i,
+ ioqs.data[i].ioq_pp);
+ printf("ioq[%d].alen : 0x%08x\n", i,
+ ioqs.data[i].ioq_alen);
+ printf("ioq[%d].stats : 0x%08x\n", i,
+ ioqs.data[i].ioq_stats);
+ printf(" sop %u\n", ioqs.data[i].ioq_stats >> 16);
+ printf(" eop %u\n", ioqs.data[i].ioq_stats & 0xFFFF);
}
- if (argc < 3) usage(stderr);
+ return 0;
+}
+
+static int
+run_cmd(int argc, char *argv[], const char *iff_name)
+{
+ int r = -1;
- iff_name = argv[1];
if (!strcmp(argv[2], "reg"))
r = register_io(argc, argv, 3, iff_name);
else if (!strcmp(argv[2], "mdio"))
@@ -1397,9 +1503,92 @@ int main(int argc, char *argv[])
r = get_tcb2(argc, argv, 3, iff_name);
else if (!strcmp(argv[2], "clearstats"))
r = clear_stats(argc, argv, 3, iff_name);
+ else if (!strcmp(argv[2], "la"))
+ r = get_up_la(argc, argv, 3, iff_name);
+ else if (!strcmp(argv[2], "ioqs"))
+ r = get_up_ioqs(argc, argv, 3, iff_name);
if (r == -1)
usage(stderr);
- return 0;
+ return (0);
+}
+
+static int
+run_cmd_loop(int argc, char *argv[], const char *iff_name)
+{
+ int n;
+ unsigned int i;
+ char buf[64];
+ char *args[8], *s;
+
+ (void) argc;
+ args[0] = argv[0];
+ args[1] = argv[1];
+
+ /*
+ * Fairly simplistic loop. Displays a "> " prompt and processes any
+ * input as a cxgbtool command. You're supposed to enter only the part
+ * after "cxgbtool cxgbX". Use "quit" or "exit" to exit. Any error in
+ * the command will also terminate cxgbtool.
+ */
+ for (;;) {
+ fprintf(stdout, "> ");
+ fflush(stdout);
+ n = read(STDIN_FILENO, buf, sizeof(buf) - 1);
+ if (n <= 0)
+ return (0);
+
+ if (buf[--n] != '\n')
+ continue;
+ else
+ buf[n] = 0;
+
+ s = &buf[0];
+ for (i = 2; i < sizeof(args)/sizeof(args[0]) - 1; i++) {
+ while (s && (*s == ' ' || *s == '\t'))
+ s++;
+ if ((args[i] = strsep(&s, " \t")) == NULL)
+ break;
+ }
+ args[sizeof(args)/sizeof(args[0]) - 1] = 0;
+
+ if (!strcmp(args[2], "quit") || !strcmp(args[2], "exit"))
+ return (0);
+
+ (void) run_cmd(i, args, iff_name);
+ }
+
+ /* Can't really get here */
+ return (0);
+}
+
+int
+main(int argc, char *argv[])
+{
+ int r = -1;
+ const char *iff_name;
+
+ progname = argv[0];
+
+ if (argc == 2) {
+ if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help"))
+ usage(stdout);
+ if (!strcmp(argv[1], "-v") || !strcmp(argv[1], "--version")) {
+ printf("%s version %s\n", PROGNAME, VERSION);
+ printf("%s\n", COPYRIGHT);
+ exit(0);
+ }
+ }
+
+ if (argc < 3) usage(stderr);
+
+ iff_name = argv[1];
+
+ if (argc == 3 && !strcmp(argv[2], "stdio"))
+ r = run_cmd_loop(argc, argv, iff_name);
+ else
+ r = run_cmd(argc, argv, iff_name);
+
+ return (r);
}
diff --git a/usr.sbin/cxgbtool/reg_defs.c b/usr.sbin/cxgbtool/reg_defs.c
index 734061fa17a64..687bb75cee9f4 100644
--- a/usr.sbin/cxgbtool/reg_defs.c
+++ b/usr.sbin/cxgbtool/reg_defs.c
@@ -106,7 +106,7 @@ struct reg_info sge_regs[] = {
{ "Packet_Too_Big", 3, 1 },
{ "Packet_Mismatch", 4, 1 },
{ "SG_RESPACCUTIMER", 0xc0, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc3_regs[] = {
@@ -196,7 +196,7 @@ struct reg_info mc3_regs[] = {
{ "MC3_Uncorr_Err", 1, 1 },
{ "MC3_Parity_Err", 2, 8 },
{ "MC3_Addr_Err", 10, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc4_regs[] = {
@@ -276,7 +276,7 @@ struct reg_info mc4_regs[] = {
{ "MC4_Corr_Err", 0, 1 },
{ "MC4_Uncorr_Err", 1, 1 },
{ "MC4_Addr_Err", 2, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info tpi_regs[] = {
@@ -290,7 +290,7 @@ struct reg_info tpi_regs[] = {
{ "INT_DIR", 31, 1 },
{ "TPI_PAR", 0x29c, 0 },
{ "TPIPAR", 0, 7 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info tp_regs[] = {
@@ -509,7 +509,7 @@ struct reg_info tp_regs[] = {
{ "DROP_TICKS_CNT", 4, 26 },
{ "NUM_PKTS_DROPPED", 0, 4 },
{ "TP_TX_DROP_COUNT", 0x4bc, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info rat_regs[] = {
@@ -532,7 +532,7 @@ struct reg_info rat_regs[] = {
{ "CspiFramingError", 1, 1 },
{ "SgeFramingError", 2, 1 },
{ "TpFramingError", 3, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info cspi_regs[] = {
@@ -560,7 +560,7 @@ struct reg_info cspi_regs[] = {
{ "TXDrop", 2, 1 },
{ "RXOverflow", 3, 1 },
{ "RAMParityErr", 4, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info espi_regs[] = {
@@ -660,7 +660,7 @@ struct reg_info espi_regs[] = {
{ "Error_Ack", 9, 1 },
{ "Unmapped_Err", 10, 1 },
{ "Transaction_Timer", 16, 8 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info ulp_regs[] = {
@@ -682,7 +682,7 @@ struct reg_info ulp_regs[] = {
{ "Pm_E2C_Wrt_Full", 24, 1 },
{ "Pm_C2E_Wrt_Full", 25, 1 },
{ "ULP_PIO_CTRL", 0x998, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pl_regs[] = {
@@ -712,7 +712,7 @@ struct reg_info pl_regs[] = {
{ "PL_Intr_CSPI", 9, 1 },
{ "PL_Intr_PCIX", 10, 1 },
{ "PL_Intr_EXT", 11, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc5_regs[] = {
@@ -833,5 +833,5 @@ struct reg_info mc5_regs[] = {
{ "MC5_DATA_WRITE_CMD", 0xcf4, 0 },
{ "MC5_DATA_READ_CMD", 0xcf8, 0 },
{ "MC5_MASK_WRITE_CMD", 0xcfc, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3.c b/usr.sbin/cxgbtool/reg_defs_t3.c
index ffa4aefa78f39..6e9b8b1176f0c 100644
--- a/usr.sbin/cxgbtool/reg_defs_t3.c
+++ b/usr.sbin/cxgbtool/reg_defs_t3.c
@@ -140,7 +140,7 @@ struct reg_info sge3_regs[] = {
{ "DrbPriThrsh", 0, 16 },
{ "SG_DEBUG_INDEX", 0x78, 0 },
{ "SG_DEBUG_DATA", 0x7c, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pcix1_regs[] = {
@@ -212,7 +212,7 @@ struct reg_info pcix1_regs[] = {
{ "WakeUp0", 2, 1 },
{ "SleepMode1", 1, 1 },
{ "SleepMode0", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pcie0_regs[] = {
@@ -411,7 +411,7 @@ struct reg_info pcie0_regs[] = {
{ "BISTDone", 24, 8 },
{ "BISTCycleThresh", 3, 16 },
{ "BISTMode", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3dbg_regs[] = {
@@ -557,7 +557,7 @@ struct reg_info t3dbg_regs[] = {
{ "PMON_CDEL_MANUAL", 4, 1 },
{ "PMON_MANUAL", 1, 1 },
{ "PMON_AUTO", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc7_pmrx_regs[] = {
@@ -674,7 +674,7 @@ struct reg_info mc7_pmrx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc7_pmtx_regs[] = {
@@ -791,7 +791,7 @@ struct reg_info mc7_pmtx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc7_cm_regs[] = {
@@ -908,7 +908,7 @@ struct reg_info mc7_cm_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info cim_regs[] = {
@@ -1024,7 +1024,7 @@ struct reg_info cim_regs[] = {
{ "CIM_CDEBUGDATA", 0x2d0, 0 },
{ "CDebugDataH", 16, 16 },
{ "CDebugDataL", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info tp1_regs[] = {
@@ -1384,7 +1384,7 @@ struct reg_info tp1_regs[] = {
{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info ulp2_rx_regs[] = {
@@ -1428,7 +1428,7 @@ struct reg_info ulp2_rx_regs[] = {
{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info ulp2_tx_regs[] = {
@@ -1456,7 +1456,7 @@ struct reg_info ulp2_tx_regs[] = {
{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
{ "D1_WEIGHT", 16, 16 },
{ "D0_WEIGHT", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pm1_rx_regs[] = {
@@ -1500,7 +1500,7 @@ struct reg_info pm1_rx_regs[] = {
{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "iespi_par_error", 3, 3 },
{ "ocspi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pm1_tx_regs[] = {
@@ -1544,7 +1544,7 @@ struct reg_info pm1_tx_regs[] = {
{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "icspi_par_error", 3, 3 },
{ "oespi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mps0_regs[] = {
@@ -1585,7 +1585,7 @@ struct reg_info mps0_regs[] = {
{ "RXTpParErr", 4, 2 },
{ "TX1TpParErr", 2, 2 },
{ "TX0TpParErr", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info cpl_switch_regs[] = {
@@ -1616,7 +1616,7 @@ struct reg_info cpl_switch_regs[] = {
{ "cpl_map_tbl_idx", 0, 8 },
{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
{ "cpl_map_tbl_data", 0, 8 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info smb0_regs[] = {
@@ -1682,7 +1682,7 @@ struct reg_info smb0_regs[] = {
{ "DebugDataL", 0, 16 },
{ "SMB_DEBUG_LA", 0x69c, 0 },
{ "DebugLAReqAddr", 0, 10 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info i2cm0_regs[] = {
@@ -1695,7 +1695,7 @@ struct reg_info i2cm0_regs[] = {
{ "Ack", 30, 1 },
{ "Cont", 1, 1 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mi1_regs[] = {
@@ -1714,7 +1714,7 @@ struct reg_info mi1_regs[] = {
{ "Busy", 31, 1 },
{ "Inc", 2, 1 },
{ "Op", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info jm1_regs[] = {
@@ -1727,7 +1727,7 @@ struct reg_info jm1_regs[] = {
{ "JM_OP", 0x6cc, 0 },
{ "Busy", 31, 1 },
{ "Cnt", 0, 5 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info sf1_regs[] = {
@@ -1737,7 +1737,7 @@ struct reg_info sf1_regs[] = {
{ "Cont", 3, 1 },
{ "ByteCnt", 1, 2 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info pl3_regs[] = {
@@ -1839,7 +1839,7 @@ struct reg_info pl3_regs[] = {
{ "PL_REV", 0x6f4, 0 },
{ "Rev", 0, 4 },
{ "PL_CLI", 0x6f8, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info mc5a_regs[] = {
@@ -2010,7 +2010,7 @@ struct reg_info mc5a_regs[] = {
{ "ReadCmd", 0, 20 },
{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
{ "MaskWr", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info xgmac0_0_regs[] = {
@@ -2341,7 +2341,7 @@ struct reg_info xgmac0_0_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info xgmac0_1_regs[] = {
@@ -2672,5 +2672,5 @@ struct reg_info xgmac0_1_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3b.c b/usr.sbin/cxgbtool/reg_defs_t3b.c
index 539742ce3c9cb..cd85d840a1dd1 100644
--- a/usr.sbin/cxgbtool/reg_defs_t3b.c
+++ b/usr.sbin/cxgbtool/reg_defs_t3b.c
@@ -150,7 +150,7 @@ struct reg_info t3b_sge3_regs[] = {
{ "DrbPriThrsh", 0, 16 },
{ "SG_DEBUG_INDEX", 0x78, 0 },
{ "SG_DEBUG_DATA", 0x7c, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_pcix1_regs[] = {
@@ -222,7 +222,7 @@ struct reg_info t3b_pcix1_regs[] = {
{ "WakeUp0", 2, 1 },
{ "SleepMode1", 1, 1 },
{ "SleepMode0", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_pcie0_regs[] = {
@@ -376,7 +376,7 @@ struct reg_info t3b_pcie0_regs[] = {
{ "BeaconDetect", 2, 1 },
{ "RxDetect", 1, 1 },
{ "TxIdleDetect", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_t3dbg_regs[] = {
@@ -557,7 +557,7 @@ struct reg_info t3b_t3dbg_regs[] = {
{ "BSEnLane1", 4, 1 },
{ "BSInSelLane0", 1, 2 },
{ "BSEnLane0", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mc7_pmrx_regs[] = {
@@ -678,7 +678,7 @@ struct reg_info t3b_mc7_pmrx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mc7_pmtx_regs[] = {
@@ -799,7 +799,7 @@ struct reg_info t3b_mc7_pmtx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mc7_cm_regs[] = {
@@ -920,7 +920,7 @@ struct reg_info t3b_mc7_cm_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_cim_regs[] = {
@@ -1047,7 +1047,7 @@ struct reg_info t3b_cim_regs[] = {
{ "PILADbgWrPtr", 0, 9 },
{ "CIM_PO_LA_DEBUGDATA", 0x2e8, 0 },
{ "CIM_PI_LA_DEBUGDATA", 0x2ec, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_tp1_regs[] = {
@@ -1453,7 +1453,7 @@ struct reg_info t3b_tp1_regs[] = {
{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_ulp2_rx_regs[] = {
@@ -1497,7 +1497,7 @@ struct reg_info t3b_ulp2_rx_regs[] = {
{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_ulp2_tx_regs[] = {
@@ -1525,7 +1525,7 @@ struct reg_info t3b_ulp2_tx_regs[] = {
{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
{ "D1_WEIGHT", 16, 16 },
{ "D0_WEIGHT", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_pm1_rx_regs[] = {
@@ -1569,7 +1569,7 @@ struct reg_info t3b_pm1_rx_regs[] = {
{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "iespi_par_error", 3, 3 },
{ "ocspi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_pm1_tx_regs[] = {
@@ -1613,7 +1613,7 @@ struct reg_info t3b_pm1_tx_regs[] = {
{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "icspi_par_error", 3, 3 },
{ "oespi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mps0_regs[] = {
@@ -1655,7 +1655,7 @@ struct reg_info t3b_mps0_regs[] = {
{ "RXTpParErr", 4, 2 },
{ "TX1TpParErr", 2, 2 },
{ "TX0TpParErr", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_cpl_switch_regs[] = {
@@ -1686,7 +1686,7 @@ struct reg_info t3b_cpl_switch_regs[] = {
{ "cpl_map_tbl_idx", 0, 8 },
{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
{ "cpl_map_tbl_data", 0, 8 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_smb0_regs[] = {
@@ -1752,7 +1752,7 @@ struct reg_info t3b_smb0_regs[] = {
{ "DebugDataL", 0, 16 },
{ "SMB_DEBUG_LA", 0x69c, 0 },
{ "DebugLAReqAddr", 0, 10 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_i2cm0_regs[] = {
@@ -1765,7 +1765,7 @@ struct reg_info t3b_i2cm0_regs[] = {
{ "Ack", 30, 1 },
{ "Cont", 1, 1 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mi1_regs[] = {
@@ -1784,7 +1784,7 @@ struct reg_info t3b_mi1_regs[] = {
{ "Busy", 31, 1 },
{ "Inc", 2, 1 },
{ "Op", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_jm1_regs[] = {
@@ -1797,7 +1797,7 @@ struct reg_info t3b_jm1_regs[] = {
{ "JM_OP", 0x6cc, 0 },
{ "Busy", 31, 1 },
{ "Cnt", 0, 5 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_sf1_regs[] = {
@@ -1807,7 +1807,7 @@ struct reg_info t3b_sf1_regs[] = {
{ "Cont", 3, 1 },
{ "ByteCnt", 1, 2 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_pl3_regs[] = {
@@ -1917,7 +1917,7 @@ struct reg_info t3b_pl3_regs[] = {
{ "PL_CLI", 0x6f8, 0 },
{ "PL_LCK", 0x6fc, 0 },
{ "Lck", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_mc5a_regs[] = {
@@ -2100,7 +2100,7 @@ struct reg_info t3b_mc5a_regs[] = {
{ "ReadCmd", 0, 20 },
{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
{ "MaskWr", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_xgmac0_0_regs[] = {
@@ -2464,7 +2464,7 @@ struct reg_info t3b_xgmac0_0_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3b_xgmac0_1_regs[] = {
@@ -2828,5 +2828,5 @@ struct reg_info t3b_xgmac0_1_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
diff --git a/usr.sbin/cxgbtool/reg_defs_t3c.c b/usr.sbin/cxgbtool/reg_defs_t3c.c
index 6127fa4ce863f..b9181b68e9a91 100644
--- a/usr.sbin/cxgbtool/reg_defs_t3c.c
+++ b/usr.sbin/cxgbtool/reg_defs_t3c.c
@@ -177,7 +177,7 @@ struct reg_info t3c_sge3_regs[] = {
{ "DrbPriThrsh", 0, 16 },
{ "SG_DEBUG_INDEX", 0x78, 0 },
{ "SG_DEBUG_DATA", 0x7c, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_pcix1_regs[] = {
@@ -282,7 +282,7 @@ struct reg_info t3c_pcix1_regs[] = {
{ "IntSt", 4, 3 },
{ "PIOSt", 2, 2 },
{ "RFReqRdSt", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_pcie0_regs[] = {
@@ -475,7 +475,7 @@ struct reg_info t3c_pcie0_regs[] = {
{ "P_WMark", 18, 11 },
{ "NP_WMark", 11, 7 },
{ "CPL_WMark", 0, 11 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_t3dbg_regs[] = {
@@ -656,7 +656,7 @@ struct reg_info t3c_t3dbg_regs[] = {
{ "BSEnLane1", 4, 1 },
{ "BSInSelLane0", 1, 2 },
{ "BSEnLane0", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mc7_pmrx_regs[] = {
@@ -777,7 +777,7 @@ struct reg_info t3c_mc7_pmrx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mc7_pmtx_regs[] = {
@@ -898,7 +898,7 @@ struct reg_info t3c_mc7_pmtx_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mc7_cm_regs[] = {
@@ -1019,7 +1019,7 @@ struct reg_info t3c_mc7_cm_regs[] = {
{ "PE", 2, 15 },
{ "UE", 1, 1 },
{ "CE", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_cim_regs[] = {
@@ -1194,7 +1194,7 @@ struct reg_info t3c_cim_regs[] = {
{ "PILADbgWrPtr", 0, 9 },
{ "CIM_PO_LA_DEBUGDATA", 0x2e8, 0 },
{ "CIM_PI_LA_DEBUGDATA", 0x2ec, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_tp1_regs[] = {
@@ -1667,7 +1667,7 @@ struct reg_info t3c_tp1_regs[] = {
{ "TP_EMBED_OP_FIELD3", 0x4f4, 0 },
{ "TP_EMBED_OP_FIELD4", 0x4f8, 0 },
{ "TP_EMBED_OP_FIELD5", 0x4fc, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_ulp2_rx_regs[] = {
@@ -1725,7 +1725,7 @@ struct reg_info t3c_ulp2_rx_regs[] = {
{ "ULPRX_RQ_ULIMIT", 0x538, 0 },
{ "ULPRX_PBL_LLIMIT", 0x53c, 0 },
{ "ULPRX_PBL_ULIMIT", 0x540, 0 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_ulp2_tx_regs[] = {
@@ -1766,7 +1766,7 @@ struct reg_info t3c_ulp2_tx_regs[] = {
{ "ULPTX_DMA_WEIGHT", 0x5ac, 0 },
{ "D1_WEIGHT", 16, 16 },
{ "D0_WEIGHT", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_pm1_rx_regs[] = {
@@ -1810,7 +1810,7 @@ struct reg_info t3c_pm1_rx_regs[] = {
{ "ocspi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "iespi_par_error", 3, 3 },
{ "ocspi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_pm1_tx_regs[] = {
@@ -1854,7 +1854,7 @@ struct reg_info t3c_pm1_tx_regs[] = {
{ "oespi1_ofifo2x_Tx_framing_error", 6, 1 },
{ "icspi_par_error", 3, 3 },
{ "oespi_par_error", 0, 3 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mps0_regs[] = {
@@ -1896,7 +1896,7 @@ struct reg_info t3c_mps0_regs[] = {
{ "RXTpParErr", 4, 2 },
{ "TX1TpParErr", 2, 2 },
{ "TX0TpParErr", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_cpl_switch_regs[] = {
@@ -1930,7 +1930,7 @@ struct reg_info t3c_cpl_switch_regs[] = {
{ "cpl_map_tbl_idx", 0, 8 },
{ "CPL_MAP_TBL_DATA", 0x65c, 0 },
{ "cpl_map_tbl_data", 0, 8 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_smb0_regs[] = {
@@ -1996,7 +1996,7 @@ struct reg_info t3c_smb0_regs[] = {
{ "DebugDataL", 0, 16 },
{ "SMB_DEBUG_LA", 0x69c, 0 },
{ "DebugLAReqAddr", 0, 10 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_i2cm0_regs[] = {
@@ -2009,7 +2009,7 @@ struct reg_info t3c_i2cm0_regs[] = {
{ "Ack", 30, 1 },
{ "Cont", 1, 1 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mi1_regs[] = {
@@ -2028,7 +2028,7 @@ struct reg_info t3c_mi1_regs[] = {
{ "Busy", 31, 1 },
{ "Inc", 2, 1 },
{ "Op", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_jm1_regs[] = {
@@ -2041,7 +2041,7 @@ struct reg_info t3c_jm1_regs[] = {
{ "JM_OP", 0x6cc, 0 },
{ "Busy", 31, 1 },
{ "Cnt", 0, 5 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_sf1_regs[] = {
@@ -2051,7 +2051,7 @@ struct reg_info t3c_sf1_regs[] = {
{ "Cont", 3, 1 },
{ "ByteCnt", 1, 2 },
{ "Op", 0, 1 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_pl3_regs[] = {
@@ -2162,7 +2162,7 @@ struct reg_info t3c_pl3_regs[] = {
{ "PL_CLI", 0x6f8, 0 },
{ "PL_LCK", 0x6fc, 0 },
{ "Lck", 0, 2 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_mc5a_regs[] = {
@@ -2346,7 +2346,7 @@ struct reg_info t3c_mc5a_regs[] = {
{ "ReadCmd", 0, 20 },
{ "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 },
{ "MaskWr", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_xgmac0_0_regs[] = {
@@ -2730,7 +2730,7 @@ struct reg_info t3c_xgmac0_0_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
struct reg_info t3c_xgmac0_1_regs[] = {
@@ -3114,6 +3114,6 @@ struct reg_info t3c_xgmac0_1_regs[] = {
{ "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 },
{ "RxSPI4SopCnt", 16, 16 },
{ "RxSPI4EopCnt", 0, 16 },
- { NULL }
+ { NULL, 0, 0 }
};
diff --git a/usr.sbin/cxgbtool/version.h b/usr.sbin/cxgbtool/version.h
index 53fe7aa23183e..403a8beeafc2c 100644
--- a/usr.sbin/cxgbtool/version.h
+++ b/usr.sbin/cxgbtool/version.h
@@ -26,7 +26,7 @@
#define __CXGBTOOL_VERSION_H
#define PROGNAME "cxgbtool"
-#define VERSION "1.15f"
-#define COPYRIGHT "Copyright (c) 2004-2008 Chelsio Communications"
+#define VERSION "1.16f"
+#define COPYRIGHT "Copyright (c) 2004-2009 Chelsio Communications"
#endif //__CXGBTOOL_VERSION_H
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-15 04:53:24 +0000