summaryrefslogtreecommitdiff
path: root/contrib/gcc/doc/invoke.texi
diff options
context:
space:
mode:
Diffstat (limited to 'contrib/gcc/doc/invoke.texi')
-rw-r--r--contrib/gcc/doc/invoke.texi11152
1 files changed, 6813 insertions, 4339 deletions
diff --git a/contrib/gcc/doc/invoke.texi b/contrib/gcc/doc/invoke.texi
index e683d0c97d408..96ba634db5ff0 100644
--- a/contrib/gcc/doc/invoke.texi
+++ b/contrib/gcc/doc/invoke.texi
@@ -1,12 +1,16 @@
@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-@c 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+@c 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@ignore
+@c man begin INCLUDE
+@include gcc-vers.texi
+@c man end
+
@c man begin COPYRIGHT
-Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
-1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.2 or
@@ -36,21 +40,20 @@ gcc [@option{-c}|@option{-S}|@option{-E}] [@option{-std=}@var{standard}]
[@option{-I}@var{dir}@dots{}] [@option{-L}@var{dir}@dots{}]
[@option{-D}@var{macro}[=@var{defn}]@dots{}] [@option{-U}@var{macro}]
[@option{-f}@var{option}@dots{}] [@option{-m}@var{machine-option}@dots{}]
- [@option{-o} @var{outfile}] @var{infile}@dots{}
+ [@option{-o} @var{outfile}] [@@@var{file}] @var{infile}@dots{}
Only the most useful options are listed here; see below for the
remainder. @samp{g++} accepts mostly the same options as @samp{gcc}.
@c man end
@c man begin SEEALSO
gpl(7), gfdl(7), fsf-funding(7),
-cpp(1), gcov(1), g77(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1)
-and the Info entries for @file{gcc}, @file{cpp}, @file{g77}, @file{as},
+cpp(1), gcov(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1)
+and the Info entries for @file{gcc}, @file{cpp}, @file{as},
@file{ld}, @file{binutils} and @file{gdb}.
@c man end
@c man begin BUGS
For instructions on reporting bugs, see
-@w{@uref{http://gcc.gnu.org/bugs.html}}. Use of the @command{gccbug}
-script to report bugs is recommended.
+@w{@uref{http://gcc.gnu.org/bugs.html}}.
@c man end
@c man begin AUTHOR
See the Info entry for @command{gcc}, or
@@ -103,8 +106,8 @@ of the same kind; for example, if you specify @option{-L} more than once,
the directories are searched in the order specified.
Many options have long names starting with @samp{-f} or with
-@samp{-W}---for example, @option{-fforce-mem},
-@option{-fstrength-reduce}, @option{-Wformat} and so on. Most of
+@samp{-W}---for example,
+@option{-fmove-loop-invariants}, @option{-Wformat} and so on. Most of
these have both positive and negative forms; the negative form of
@option{-ffoo} would be @option{-fno-foo}. This manual documents
only one of these two forms, whichever one is not the default.
@@ -121,7 +124,8 @@ only one of these two forms, whichever one is not the default.
* Invoking G++:: Compiling C++ programs.
* C Dialect Options:: Controlling the variant of C language compiled.
* C++ Dialect Options:: Variations on C++.
-* Objective-C Dialect Options:: Variations on Objective-C.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+ and Objective-C++.
* Language Independent Options:: Controlling how diagnostics should be
formatted.
* Warning Options:: How picky should the compiler be?
@@ -155,24 +159,24 @@ in the following sections.
@table @emph
@item Overall Options
@xref{Overall Options,,Options Controlling the Kind of Output}.
-@gccoptlist{-c -S -E -o @var{file} -pipe -pass-exit-codes @gol
--x @var{language} -v -### --help --target-help --version}
+@gccoptlist{-c -S -E -o @var{file} -combine -pipe -pass-exit-codes @gol
+-x @var{language} -v -### --help --target-help --version @@@var{file}}
@item C Language Options
@xref{C Dialect Options,,Options Controlling C Dialect}.
-@gccoptlist{-ansi -std=@var{standard} -aux-info @var{filename} @gol
+@gccoptlist{-ansi -std=@var{standard} -fgnu89-inline @gol
+-aux-info @var{filename} @gol
-fno-asm -fno-builtin -fno-builtin-@var{function} @gol
--fhosted -ffreestanding -fms-extensions @gol
+-fhosted -ffreestanding -fopenmp -fms-extensions @gol
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
-fallow-single-precision -fcond-mismatch @gol
-fsigned-bitfields -fsigned-char @gol
--funsigned-bitfields -funsigned-char @gol
--fwritable-strings}
+-funsigned-bitfields -funsigned-char}
@item C++ Language Options
@xref{C++ Dialect Options,,Options Controlling C++ Dialect}.
@gccoptlist{-fabi-version=@var{n} -fno-access-control -fcheck-new @gol
--fconserve-space -fno-const-strings @gol
+-fconserve-space -ffriend-injection @gol
-fno-elide-constructors @gol
-fno-enforce-eh-specs @gol
-ffor-scope -fno-for-scope -fno-gnu-keywords @gol
@@ -182,76 +186,112 @@ in the following sections.
-fno-nonansi-builtins -fno-operator-names @gol
-fno-optional-diags -fpermissive @gol
-frepo -fno-rtti -fstats -ftemplate-depth-@var{n} @gol
--fuse-cxa-atexit -fno-weak -nostdinc++ @gol
--fno-default-inline -Wabi -Wctor-dtor-privacy @gol
+-fno-threadsafe-statics -fuse-cxa-atexit -fno-weak -nostdinc++ @gol
+-fno-default-inline -fvisibility-inlines-hidden @gol
+-Wabi -Wctor-dtor-privacy @gol
-Wnon-virtual-dtor -Wreorder @gol
--Weffc++ -Wno-deprecated @gol
+-Weffc++ -Wno-deprecated -Wstrict-null-sentinel @gol
-Wno-non-template-friend -Wold-style-cast @gol
-Woverloaded-virtual -Wno-pmf-conversions @gol
-Wsign-promo}
-@item Objective-C Language Options
-@xref{Objective-C Dialect Options,,Options Controlling Objective-C Dialect}.
-@gccoptlist{
--fconstant-string-class=@var{class-name} @gol
+@item Objective-C and Objective-C++ Language Options
+@xref{Objective-C and Objective-C++ Dialect Options,,Options Controlling
+Objective-C and Objective-C++ Dialects}.
+@gccoptlist{-fconstant-string-class=@var{class-name} @gol
-fgnu-runtime -fnext-runtime @gol
-fno-nil-receivers @gol
+-fobjc-call-cxx-cdtors @gol
+-fobjc-direct-dispatch @gol
-fobjc-exceptions @gol
+-fobjc-gc @gol
-freplace-objc-classes @gol
-fzero-link @gol
-gen-decls @gol
--Wno-protocol -Wselector -Wundeclared-selector}
+-Wassign-intercept @gol
+-Wno-protocol -Wselector @gol
+-Wstrict-selector-match @gol
+-Wundeclared-selector}
@item Language Independent Options
@xref{Language Independent Options,,Options to Control Diagnostic Messages Formatting}.
@gccoptlist{-fmessage-length=@var{n} @gol
--fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]}}
+-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol
+-fdiagnostics-show-option}
@item Warning Options
@xref{Warning Options,,Options to Request or Suppress Warnings}.
@gccoptlist{-fsyntax-only -pedantic -pedantic-errors @gol
--w -Wextra -Wall -Waggregate-return @gol
--Wcast-align -Wcast-qual -Wchar-subscripts -Wcomment @gol
+-w -Wextra -Wall -Waddress -Waggregate-return -Wno-attributes @gol
+-Wc++-compat -Wcast-align -Wcast-qual -Wchar-subscripts -Wcomment @gol
-Wconversion -Wno-deprecated-declarations @gol
--Wdisabled-optimization -Wno-div-by-zero -Wendif-labels @gol
--Werror -Werror-implicit-function-declaration @gol
--Wfloat-equal -Wformat -Wformat=2 @gol
+-Wdisabled-optimization -Wno-div-by-zero -Wno-endif-labels @gol
+-Werror -Werror=* -Werror-implicit-function-declaration @gol
+-Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol
-Wno-format-extra-args -Wformat-nonliteral @gol
-Wformat-security -Wformat-y2k @gol
-Wimplicit -Wimplicit-function-declaration -Wimplicit-int @gol
-Wimport -Wno-import -Winit-self -Winline @gol
+-Wno-int-to-pointer-cast @gol
-Wno-invalid-offsetof -Winvalid-pch @gol
--Wlarger-than-@var{len} -Wlong-long @gol
--Wmain -Wmissing-braces @gol
--Wmissing-format-attribute -Wmissing-noreturn @gol
--Wno-multichar -Wnonnull -Wpacked -Wpadded @gol
--Wparentheses -Wpointer-arith -Wredundant-decls @gol
+-Wlarger-than-@var{len} -Wunsafe-loop-optimizations -Wlong-long @gol
+-Wmain -Wmissing-braces -Wmissing-field-initializers @gol
+-Wmissing-format-attribute -Wmissing-include-dirs @gol
+-Wmissing-noreturn @gol
+-Wno-multichar -Wnonnull -Wno-overflow @gol
+-Woverlength-strings -Wpacked -Wpadded @gol
+-Wparentheses -Wpointer-arith -Wno-pointer-to-int-cast @gol
+-Wredundant-decls @gol
-Wreturn-type -Wsequence-point -Wshadow @gol
--Wsign-compare -Wstrict-aliasing @gol
+-Wsign-compare -Wstack-protector @gol
+-Wstrict-aliasing -Wstrict-aliasing=2 @gol
+-Wstrict-overflow -Wstrict-overflow=@var{n} @gol
-Wswitch -Wswitch-default -Wswitch-enum @gol
-Wsystem-headers -Wtrigraphs -Wundef -Wuninitialized @gol
--Wunknown-pragmas -Wunreachable-code @gol
+-Wunknown-pragmas -Wno-pragmas -Wunreachable-code @gol
-Wunused -Wunused-function -Wunused-label -Wunused-parameter @gol
--Wunused-value -Wunused-variable -Wwrite-strings}
+-Wunused-value -Wunused-variable -Wvariadic-macros @gol
+-Wvolatile-register-var -Wwrite-strings}
@item C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-Wmissing-prototypes -Wnested-externs -Wold-style-definition @gol
-Wstrict-prototypes -Wtraditional @gol
--Wdeclaration-after-statement}
+-Wdeclaration-after-statement -Wpointer-sign}
@item Debugging Options
@xref{Debugging Options,,Options for Debugging Your Program or GCC}.
@gccoptlist{-d@var{letters} -dumpspecs -dumpmachine -dumpversion @gol
--fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} @gol
+-fdump-noaddr -fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} @gol
-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
+-fdump-ipa-all -fdump-ipa-cgraph @gol
+-fdump-tree-all @gol
-fdump-tree-original@r{[}-@var{n}@r{]} @gol
-fdump-tree-optimized@r{[}-@var{n}@r{]} @gol
-fdump-tree-inlined@r{[}-@var{n}@r{]} @gol
+-fdump-tree-cfg -fdump-tree-vcg -fdump-tree-alias @gol
+-fdump-tree-ch @gol
+-fdump-tree-ssa@r{[}-@var{n}@r{]} -fdump-tree-pre@r{[}-@var{n}@r{]} @gol
+-fdump-tree-ccp@r{[}-@var{n}@r{]} -fdump-tree-dce@r{[}-@var{n}@r{]} @gol
+-fdump-tree-gimple@r{[}-raw@r{]} -fdump-tree-mudflap@r{[}-@var{n}@r{]} @gol
+-fdump-tree-dom@r{[}-@var{n}@r{]} @gol
+-fdump-tree-dse@r{[}-@var{n}@r{]} @gol
+-fdump-tree-phiopt@r{[}-@var{n}@r{]} @gol
+-fdump-tree-forwprop@r{[}-@var{n}@r{]} @gol
+-fdump-tree-copyrename@r{[}-@var{n}@r{]} @gol
+-fdump-tree-nrv -fdump-tree-vect @gol
+-fdump-tree-sink @gol
+-fdump-tree-sra@r{[}-@var{n}@r{]} @gol
+-fdump-tree-salias @gol
+-fdump-tree-fre@r{[}-@var{n}@r{]} @gol
+-fdump-tree-vrp@r{[}-@var{n}@r{]} @gol
+-ftree-vectorizer-verbose=@var{n} @gol
+-fdump-tree-storeccp@r{[}-@var{n}@r{]} @gol
-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol
--feliminate-unused-debug-symbols -fmem-report -fprofile-arcs @gol
+-feliminate-unused-debug-symbols -femit-class-debug-always @gol
+-fmem-report -fprofile-arcs @gol
-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
--ftest-coverage -ftime-report @gol
+-ftest-coverage -ftime-report -fvar-tracking @gol
-g -g@var{level} -gcoff -gdwarf-2 @gol
-ggdb -gstabs -gstabs+ -gvms -gxcoff -gxcoff+ @gol
-p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol
@@ -263,38 +303,50 @@ in the following sections.
@xref{Optimize Options,,Options that Control Optimization}.
@gccoptlist{-falign-functions=@var{n} -falign-jumps=@var{n} @gol
-falign-labels=@var{n} -falign-loops=@var{n} @gol
+-fbounds-check -fmudflap -fmudflapth -fmudflapir @gol
-fbranch-probabilities -fprofile-values -fvpt -fbranch-target-load-optimize @gol
--fbranch-target-load-optimize2 -fcaller-saves -fcprop-registers @gol
--fcse-follow-jumps -fcse-skip-blocks -fdata-sections @gol
--fdelayed-branch -fdelete-null-pointer-checks @gol
+-fbranch-target-load-optimize2 -fbtr-bb-exclusive @gol
+-fcaller-saves -fcprop-registers -fcse-follow-jumps @gol
+-fcse-skip-blocks -fcx-limited-range -fdata-sections @gol
+-fdelayed-branch -fdelete-null-pointer-checks -fearly-inlining @gol
-fexpensive-optimizations -ffast-math -ffloat-store @gol
--fforce-addr -fforce-mem -ffunction-sections @gol
--fgcse -fgcse-lm -fgcse-sm -fgcse-las -floop-optimize @gol
+-fforce-addr -ffunction-sections @gol
+-fgcse -fgcse-lm -fgcse-sm -fgcse-las -fgcse-after-reload @gol
-fcrossjumping -fif-conversion -fif-conversion2 @gol
--finline-functions -finline-limit=@var{n} -fkeep-inline-functions @gol
+-finline-functions -finline-functions-called-once @gol
+-finline-limit=@var{n} -fkeep-inline-functions @gol
-fkeep-static-consts -fmerge-constants -fmerge-all-constants @gol
--fmove-all-movables -fnew-ra -fno-branch-count-reg @gol
--fno-default-inline -fno-defer-pop @gol
+-fmodulo-sched -fno-branch-count-reg @gol
+-fno-default-inline -fno-defer-pop -fmove-loop-invariants @gol
-fno-function-cse -fno-guess-branch-probability @gol
-fno-inline -fno-math-errno -fno-peephole -fno-peephole2 @gol
--funsafe-math-optimizations -ffinite-math-only @gol
--fno-trapping-math -fno-zero-initialized-in-bss @gol
+-funsafe-math-optimizations -funsafe-loop-optimizations -ffinite-math-only @gol
+-fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss @gol
-fomit-frame-pointer -foptimize-register-move @gol
-foptimize-sibling-calls -fprefetch-loop-arrays @gol
-fprofile-generate -fprofile-use @gol
--freduce-all-givs -fregmove -frename-registers @gol
--freorder-blocks -freorder-functions @gol
--frerun-cse-after-loop -frerun-loop-opt @gol
--frounding-math -fschedule-insns -fschedule-insns2 @gol
+-fregmove -frename-registers @gol
+-freorder-blocks -freorder-blocks-and-partition -freorder-functions @gol
+-frerun-cse-after-loop @gol
+-frounding-math -frtl-abstract-sequences @gol
+-fschedule-insns -fschedule-insns2 @gol
-fno-sched-interblock -fno-sched-spec -fsched-spec-load @gol
-fsched-spec-load-dangerous @gol
--fsched-stalled-insns=@var{n} -sched-stalled-insns-dep=@var{n} @gol
+-fsched-stalled-insns=@var{n} -fsched-stalled-insns-dep=@var{n} @gol
-fsched2-use-superblocks @gol
--fsched2-use-traces -fsignaling-nans @gol
--fsingle-precision-constant @gol
--fstrength-reduce -fstrict-aliasing -ftracer -fthread-jumps @gol
+-fsched2-use-traces -fsee -freschedule-modulo-scheduled-loops @gol
+-fsection-anchors -fsignaling-nans -fsingle-precision-constant @gol
+-fstack-protector -fstack-protector-all @gol
+-fstrict-aliasing -fstrict-overflow -ftracer -fthread-jumps @gol
-funroll-all-loops -funroll-loops -fpeel-loops @gol
--funswitch-loops -fold-unroll-loops -fold-unroll-all-loops @gol
+-fsplit-ivs-in-unroller -funswitch-loops @gol
+-fvariable-expansion-in-unroller @gol
+-ftree-pre -ftree-ccp -ftree-dce -ftree-loop-optimize @gol
+-ftree-loop-linear -ftree-loop-im -ftree-loop-ivcanon -fivopts @gol
+-ftree-dominator-opts -ftree-dse -ftree-copyrename -ftree-sink @gol
+-ftree-ch -ftree-sra -ftree-ter -ftree-lrs -ftree-fre -ftree-vectorize @gol
+-ftree-vect-loop-version -ftree-salias -fipa-pta -fweb @gol
+-ftree-copy-prop -ftree-store-ccp -ftree-store-copy-prop -fwhole-program @gol
--param @var{name}=@var{value}
-O -O0 -O1 -O2 -O3 -Os}
@@ -308,6 +360,7 @@ in the following sections.
-include @var{file} -imacros @var{file} @gol
-iprefix @var{file} -iwithprefix @var{dir} @gol
-iwithprefixbefore @var{dir} -isystem @var{dir} @gol
+-imultilib @var{dir} -isysroot @var{dir} @gol
-M -MM -MF -MG -MP -MQ -MT -nostdinc @gol
-P -fworking-directory -remap @gol
-trigraphs -undef -U@var{macro} -Wp,@var{option} @gol
@@ -320,14 +373,15 @@ in the following sections.
@item Linker Options
@xref{Link Options,,Options for Linking}.
@gccoptlist{@var{object-file-name} -l@var{library} @gol
--nostartfiles -nodefaultlibs -nostdlib -pie @gol
+-nostartfiles -nodefaultlibs -nostdlib -pie -rdynamic @gol
-s -static -static-libgcc -shared -shared-libgcc -symbolic @gol
-Wl,@var{option} -Xlinker @var{option} @gol
-u @var{symbol}}
@item Directory Options
@xref{Directory Options,,Options for Directory Search}.
-@gccoptlist{-B@var{prefix} -I@var{dir} -I- -L@var{dir} -specs=@var{file}}
+@gccoptlist{-B@var{prefix} -I@var{dir} -iquote@var{dir} -L@var{dir}
+-specs=@var{file} -I- --sysroot=@var{dir}}
@item Target Options
@c I wrote this xref this way to avoid overfull hbox. -- rms
@@ -336,51 +390,26 @@ in the following sections.
@item Machine Dependent Options
@xref{Submodel Options,,Hardware Models and Configurations}.
+@c This list is ordered alphanumerically by subsection name.
+@c Try and put the significant identifier (CPU or system) first,
+@c so users have a clue at guessing where the ones they want will be.
-@emph{M680x0 Options}
-@gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
--m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 @gol
--mnobitfield -mrtd -mshort -msoft-float -mpcrel @gol
--malign-int -mstrict-align -msep-data -mno-sep-data @gol
--mshared-library-id=n -mid-shared-library -mno-id-shared-library}
-
-@emph{M68hc1x Options}
-@gccoptlist{-m6811 -m6812 -m68hc11 -m68hc12 -m68hcs12 @gol
--mauto-incdec -minmax -mlong-calls -mshort @gol
--msoft-reg-count=@var{count}}
-
-@emph{VAX Options}
-@gccoptlist{-mg -mgnu -munix}
-
-@emph{SPARC Options}
-@gccoptlist{-mcpu=@var{cpu-type} @gol
--mtune=@var{cpu-type} @gol
--mcmodel=@var{code-model} @gol
--m32 -m64 -mapp-regs -mno-app-regs @gol
--mfaster-structs -mno-faster-structs @gol
--mflat -mno-flat -mfpu -mno-fpu @gol
--mhard-float -msoft-float @gol
--mhard-quad-float -msoft-quad-float @gol
--mimpure-text -mno-impure-text -mlittle-endian @gol
--mstack-bias -mno-stack-bias @gol
--munaligned-doubles -mno-unaligned-doubles @gol
--mv8plus -mno-v8plus -mvis -mno-vis @gol
--mcypress -mf930 -mf934 @gol
--msparclite -msupersparc -mv8
--threads -pthreads}
+@emph{ARC Options}
+@gccoptlist{-EB -EL @gol
+-mmangle-cpu -mcpu=@var{cpu} -mtext=@var{text-section} @gol
+-mdata=@var{data-section} -mrodata=@var{readonly-data-section}}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
--mapcs-26 -mapcs-32 @gol
+-mabi=@var{name} @gol
-mapcs-stack-check -mno-apcs-stack-check @gol
-mapcs-float -mno-apcs-float @gol
-mapcs-reentrant -mno-apcs-reentrant @gol
-msched-prolog -mno-sched-prolog @gol
-mlittle-endian -mbig-endian -mwords-little-endian @gol
--malignment-traps -mno-alignment-traps @gol
--msoft-float -mhard-float -mfpe @gol
+-mfloat-abi=@var{name} -msoft-float -mhard-float -mfpe @gol
-mthumb-interwork -mno-thumb-interwork @gol
--mcpu=@var{name} -march=@var{name} -mfpe=@var{name} @gol
+-mcpu=@var{name} -march=@var{name} -mfpu=@var{name} @gol
-mstructure-size-boundary=@var{n} @gol
-mabort-on-noreturn @gol
-mlong-calls -mno-long-calls @gol
@@ -391,13 +420,145 @@ in the following sections.
-mpoke-function-name @gol
-mthumb -marm @gol
-mtpcs-frame -mtpcs-leaf-frame @gol
--mcaller-super-interworking -mcallee-super-interworking}
+-mcaller-super-interworking -mcallee-super-interworking @gol
+-mtp=@var{name}}
-@emph{MN10300 Options}
-@gccoptlist{-mmult-bug -mno-mult-bug @gol
--mam33 -mno-am33 @gol
--mam33-2 -mno-am33-2 @gol
--mno-crt0 -mrelax}
+@emph{AVR Options}
+@gccoptlist{-mmcu=@var{mcu} -msize -minit-stack=@var{n} -mno-interrupts @gol
+-mcall-prologues -mno-tablejump -mtiny-stack -mint8}
+
+@emph{Blackfin Options}
+@gccoptlist{-momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol
+-mspecld-anomaly -mno-specld-anomaly -mcsync-anomaly -mno-csync-anomaly @gol
+-mlow-64k -mno-low64k -mid-shared-library @gol
+-mno-id-shared-library -mshared-library-id=@var{n} @gol
+-mlong-calls -mno-long-calls}
+
+@emph{CRIS Options}
+@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol
+-mmax-stack-frame=@var{n} -melinux-stacksize=@var{n} @gol
+-metrax4 -metrax100 -mpdebug -mcc-init -mno-side-effects @gol
+-mstack-align -mdata-align -mconst-align @gol
+-m32-bit -m16-bit -m8-bit -mno-prologue-epilogue -mno-gotplt @gol
+-melf -maout -melinux -mlinux -sim -sim2 @gol
+-mmul-bug-workaround -mno-mul-bug-workaround}
+
+@emph{CRX Options}
+@gccoptlist{-mmac -mpush-args}
+
+@emph{Darwin Options}
+@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol
+-arch_only -bind_at_load -bundle -bundle_loader @gol
+-client_name -compatibility_version -current_version @gol
+-dead_strip @gol
+-dependency-file -dylib_file -dylinker_install_name @gol
+-dynamic -dynamiclib -exported_symbols_list @gol
+-filelist -flat_namespace -force_cpusubtype_ALL @gol
+-force_flat_namespace -headerpad_max_install_names @gol
+-image_base -init -install_name -keep_private_externs @gol
+-multi_module -multiply_defined -multiply_defined_unused @gol
+-noall_load -no_dead_strip_inits_and_terms @gol
+-nofixprebinding -nomultidefs -noprebind -noseglinkedit @gol
+-pagezero_size -prebind -prebind_all_twolevel_modules @gol
+-private_bundle -read_only_relocs -sectalign @gol
+-sectobjectsymbols -whyload -seg1addr @gol
+-sectcreate -sectobjectsymbols -sectorder @gol
+-segaddr -segs_read_only_addr -segs_read_write_addr @gol
+-seg_addr_table -seg_addr_table_filename -seglinkedit @gol
+-segprot -segs_read_only_addr -segs_read_write_addr @gol
+-single_module -static -sub_library -sub_umbrella @gol
+-twolevel_namespace -umbrella -undefined @gol
+-unexported_symbols_list -weak_reference_mismatches @gol
+-whatsloaded -F -gused -gfull -mmacosx-version-min=@var{version} @gol
+-mkernel -mone-byte-bool}
+
+@emph{DEC Alpha Options}
+@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
+-mieee -mieee-with-inexact -mieee-conformant @gol
+-mfp-trap-mode=@var{mode} -mfp-rounding-mode=@var{mode} @gol
+-mtrap-precision=@var{mode} -mbuild-constants @gol
+-mcpu=@var{cpu-type} -mtune=@var{cpu-type} @gol
+-mbwx -mmax -mfix -mcix @gol
+-mfloat-vax -mfloat-ieee @gol
+-mexplicit-relocs -msmall-data -mlarge-data @gol
+-msmall-text -mlarge-text @gol
+-mmemory-latency=@var{time}}
+
+@emph{DEC Alpha/VMS Options}
+@gccoptlist{-mvms-return-codes}
+
+@emph{FRV Options}
+@gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol
+-mhard-float -msoft-float @gol
+-malloc-cc -mfixed-cc -mdword -mno-dword @gol
+-mdouble -mno-double @gol
+-mmedia -mno-media -mmuladd -mno-muladd @gol
+-mfdpic -minline-plt -mgprel-ro -multilib-library-pic @gol
+-mlinked-fp -mlong-calls -malign-labels @gol
+-mlibrary-pic -macc-4 -macc-8 @gol
+-mpack -mno-pack -mno-eflags -mcond-move -mno-cond-move @gol
+-moptimize-membar -mno-optimize-membar @gol
+-mscc -mno-scc -mcond-exec -mno-cond-exec @gol
+-mvliw-branch -mno-vliw-branch @gol
+-mmulti-cond-exec -mno-multi-cond-exec -mnested-cond-exec @gol
+-mno-nested-cond-exec -mtomcat-stats @gol
+-mTLS -mtls @gol
+-mcpu=@var{cpu}}
+
+@emph{GNU/Linux Options}
+@gccoptlist{-muclibc}
+
+@emph{H8/300 Options}
+@gccoptlist{-mrelax -mh -ms -mn -mint32 -malign-300}
+
+@emph{HPPA Options}
+@gccoptlist{-march=@var{architecture-type} @gol
+-mbig-switch -mdisable-fpregs -mdisable-indexing @gol
+-mfast-indirect-calls -mgas -mgnu-ld -mhp-ld @gol
+-mfixed-range=@var{register-range} @gol
+-mjump-in-delay -mlinker-opt -mlong-calls @gol
+-mlong-load-store -mno-big-switch -mno-disable-fpregs @gol
+-mno-disable-indexing -mno-fast-indirect-calls -mno-gas @gol
+-mno-jump-in-delay -mno-long-load-store @gol
+-mno-portable-runtime -mno-soft-float @gol
+-mno-space-regs -msoft-float -mpa-risc-1-0 @gol
+-mpa-risc-1-1 -mpa-risc-2-0 -mportable-runtime @gol
+-mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol
+-munix=@var{unix-std} -nolibdld -static -threads}
+
+@emph{i386 and x86-64 Options}
+@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
+-mfpmath=@var{unit} @gol
+-masm=@var{dialect} -mno-fancy-math-387 @gol
+-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
+-mno-wide-multiply -mrtd -malign-double @gol
+-mpreferred-stack-boundary=@var{num} @gol
+-mmmx -msse -msse2 -msse3 -m3dnow @gol
+-mthreads -mno-align-stringops -minline-all-stringops @gol
+-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
+-m96bit-long-double -mregparm=@var{num} -msseregparm @gol
+-mstackrealign @gol
+-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
+-mcmodel=@var{code-model} @gol
+-m32 -m64 -mlarge-data-threshold=@var{num}}
+
+@emph{IA-64 Options}
+@gccoptlist{-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol
+-mvolatile-asm-stop -mregister-names -mno-sdata @gol
+-mconstant-gp -mauto-pic -minline-float-divide-min-latency @gol
+-minline-float-divide-max-throughput @gol
+-minline-int-divide-min-latency @gol
+-minline-int-divide-max-throughput @gol
+-minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
+-mno-dwarf2-asm -mearly-stop-bits @gol
+-mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
+-mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64 @gol
+-mno-sched-br-data-spec -msched-ar-data-spec -mno-sched-control-spec @gol
+-msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec @gol
+-msched-ldc -mno-sched-control-ldc -mno-sched-spec-verbose @gol
+-mno-sched-prefer-non-data-spec-insns @gol
+-mno-sched-prefer-non-control-spec-insns @gol
+-mno-sched-count-spec-in-critical-path}
@emph{M32R/D Options}
@gccoptlist{-m32r2 -m32rx -m32r @gol
@@ -411,6 +572,81 @@ in the following sections.
-mno-flush-trap -mflush-trap=@var{number} @gol
-G @var{num}}
+@emph{M32C Options}
+@gccoptlist{-mcpu=@var{cpu} -msim -memregs=@var{number}}
+
+@emph{M680x0 Options}
+@gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
+-m68060 -mcpu32 -m5200 -mcfv4e -m68881 -mbitfield @gol
+-mc68000 -mc68020 @gol
+-mnobitfield -mrtd -mshort -msoft-float -mpcrel @gol
+-malign-int -mstrict-align -msep-data -mno-sep-data @gol
+-mshared-library-id=n -mid-shared-library -mno-id-shared-library}
+
+@emph{M68hc1x Options}
+@gccoptlist{-m6811 -m6812 -m68hc11 -m68hc12 -m68hcs12 @gol
+-mauto-incdec -minmax -mlong-calls -mshort @gol
+-msoft-reg-count=@var{count}}
+
+@emph{MCore Options}
+@gccoptlist{-mhardlit -mno-hardlit -mdiv -mno-div -mrelax-immediates @gol
+-mno-relax-immediates -mwide-bitfields -mno-wide-bitfields @gol
+-m4byte-functions -mno-4byte-functions -mcallgraph-data @gol
+-mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol
+-mlittle-endian -mbig-endian -m210 -m340 -mstack-increment}
+
+@emph{MIPS Options}
+@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
+-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol
+-mips16 -mno-mips16 -mabi=@var{abi} -mabicalls -mno-abicalls @gol
+-mshared -mno-shared -mxgot -mno-xgot -mgp32 -mgp64 @gol
+-mfp32 -mfp64 -mhard-float -msoft-float @gol
+-msingle-float -mdouble-float -mdsp -mpaired-single -mips3d @gol
+-mlong64 -mlong32 -msym32 -mno-sym32 @gol
+-G@var{num} -membedded-data -mno-embedded-data @gol
+-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
+-msplit-addresses -mno-split-addresses @gol
+-mexplicit-relocs -mno-explicit-relocs @gol
+-mcheck-zero-division -mno-check-zero-division @gol
+-mdivide-traps -mdivide-breaks @gol
+-mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol
+-mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol
+-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol
+-mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130 @gol
+-mfix-sb1 -mno-fix-sb1 @gol
+-mflush-func=@var{func} -mno-flush-func @gol
+-mbranch-likely -mno-branch-likely @gol
+-mfp-exceptions -mno-fp-exceptions @gol
+-mvr4130-align -mno-vr4130-align}
+
+@emph{MMIX Options}
+@gccoptlist{-mlibfuncs -mno-libfuncs -mepsilon -mno-epsilon -mabi=gnu @gol
+-mabi=mmixware -mzero-extend -mknuthdiv -mtoplevel-symbols @gol
+-melf -mbranch-predict -mno-branch-predict -mbase-addresses @gol
+-mno-base-addresses -msingle-exit -mno-single-exit}
+
+@emph{MN10300 Options}
+@gccoptlist{-mmult-bug -mno-mult-bug @gol
+-mam33 -mno-am33 @gol
+-mam33-2 -mno-am33-2 @gol
+-mreturn-pointer-on-d0 @gol
+-mno-crt0 -mrelax}
+
+@emph{MT Options}
+@gccoptlist{-mno-crt0 -mbacc -msim @gol
+-march=@var{cpu-type} }
+
+@emph{PDP-11 Options}
+@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
+-mbcopy -mbcopy-builtin -mint32 -mno-int16 @gol
+-mint16 -mno-int32 -mfloat32 -mno-float64 @gol
+-mfloat64 -mno-float32 -mabshi -mno-abshi @gol
+-mbranch-expensive -mbranch-cheap @gol
+-msplit -mno-split -munix-asm -mdec-asm}
+
+@emph{PowerPC Options}
+See RS/6000 and PowerPC Options.
+
@emph{RS/6000 and PowerPC Options}
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
@@ -419,6 +655,7 @@ in the following sections.
-maltivec -mno-altivec @gol
-mpowerpc-gpopt -mno-powerpc-gpopt @gol
-mpowerpc-gfxopt -mno-powerpc-gfxopt @gol
+-mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb -mfprnd -mno-fprnd @gol
-mnew-mnemonics -mold-mnemonics @gol
-mfull-toc -mminimal-toc -mno-fp-in-toc -mno-sum-in-toc @gol
-m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol
@@ -429,137 +666,73 @@ in the following sections.
-mstrict-align -mno-strict-align -mrelocatable @gol
-mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol
-mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol
--mdynamic-no-pic @gol
+-mdynamic-no-pic -maltivec -mswdiv @gol
-mprioritize-restricted-insns=@var{priority} @gol
-msched-costly-dep=@var{dependence_type} @gol
-minsert-sched-nops=@var{scheme} @gol
-mcall-sysv -mcall-netbsd @gol
-maix-struct-return -msvr4-struct-return @gol
--mabi=altivec -mabi=no-altivec @gol
--mabi=spe -mabi=no-spe @gol
+-mabi=@var{abi-type} -msecure-plt -mbss-plt @gol
+-misel -mno-isel @gol
-misel=yes -misel=no @gol
+-mspe -mno-spe @gol
-mspe=yes -mspe=no @gol
--mfloat-gprs=yes -mfloat-gprs=no @gol
+-mvrsave -mno-vrsave @gol
+-mmulhw -mno-mulhw @gol
+-mdlmzb -mno-dlmzb @gol
+-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol
-mprototype -mno-prototype @gol
-msim -mmvme -mads -myellowknife -memb -msdata @gol
-msdata=@var{opt} -mvxworks -mwindiss -G @var{num} -pthread}
-@emph{Darwin Options}
-@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol
--arch_only -bind_at_load -bundle -bundle_loader @gol
--client_name -compatibility_version -current_version @gol
--dependency-file -dylib_file -dylinker_install_name @gol
--dynamic -dynamiclib -exported_symbols_list @gol
--filelist -flat_namespace -force_cpusubtype_ALL @gol
--force_flat_namespace -headerpad_max_install_names @gol
--image_base -init -install_name -keep_private_externs @gol
--multi_module -multiply_defined -multiply_defined_unused @gol
--noall_load -nofixprebinding -nomultidefs -noprebind -noseglinkedit @gol
--pagezero_size -prebind -prebind_all_twolevel_modules @gol
--private_bundle -read_only_relocs -sectalign @gol
--sectobjectsymbols -whyload -seg1addr @gol
--sectcreate -sectobjectsymbols -sectorder @gol
--seg_addr_table -seg_addr_table_filename -seglinkedit @gol
--segprot -segs_read_only_addr -segs_read_write_addr @gol
--single_module -static -sub_library -sub_umbrella @gol
--twolevel_namespace -umbrella -undefined @gol
--unexported_symbols_list -weak_reference_mismatches @gol
--whatsloaded}
-
-@emph{MIPS Options}
-@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
--mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol
--mips16 -mno-mips16 -mabi=@var{abi} -mabicalls -mno-abicalls @gol
--mxgot -mno-xgot -membedded-pic -mno-embedded-pic @gol
--mgp32 -mgp64 -mfp32 -mfp64 -mhard-float -msoft-float @gol
--msingle-float -mdouble-float -mint64 -mlong64 -mlong32 @gol
--G@var{num} -membedded-data -mno-embedded-data @gol
--muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
--msplit-addresses -mno-split-addresses @gol
--mexplicit-relocs -mno-explicit-relocs @gol
--mrnames -mno-rnames @gol
--mcheck-zero-division -mno-check-zero-division @gol
--mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol
--mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol
--mfix-sb1 -mno-fix-sb1 -mflush-func=@var{func} @gol
--mno-flush-func -mbranch-likely -mno-branch-likely}
-
-@emph{i386 and x86-64 Options}
+@emph{S/390 and zSeries Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
--mfpmath=@var{unit} @gol
--masm=@var{dialect} -mno-fancy-math-387 @gol
--mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
--mno-wide-multiply -mrtd -malign-double @gol
--mpreferred-stack-boundary=@var{num} @gol
--mmmx -msse -msse2 -msse3 -m3dnow @gol
--mthreads -mno-align-stringops -minline-all-stringops @gol
--mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
--m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer @gol
--mno-red-zone -mno-tls-direct-seg-refs @gol
--mcmodel=@var{code-model} @gol
--m32 -m64}
-
-@emph{HPPA Options}
-@gccoptlist{-march=@var{architecture-type} @gol
--mbig-switch -mdisable-fpregs -mdisable-indexing @gol
--mfast-indirect-calls -mgas -mgnu-ld -mhp-ld @gol
--mjump-in-delay -mlinker-opt -mlong-calls @gol
--mlong-load-store -mno-big-switch -mno-disable-fpregs @gol
--mno-disable-indexing -mno-fast-indirect-calls -mno-gas @gol
--mno-jump-in-delay -mno-long-load-store @gol
--mno-portable-runtime -mno-soft-float @gol
--mno-space-regs -msoft-float -mpa-risc-1-0 @gol
--mpa-risc-1-1 -mpa-risc-2-0 -mportable-runtime @gol
--mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol
--nolibdld -static -threads}
-
-@emph{Intel 960 Options}
-@gccoptlist{-m@var{cpu-type} -masm-compat -mclean-linkage @gol
--mcode-align -mcomplex-addr -mleaf-procedures @gol
--mic-compat -mic2.0-compat -mic3.0-compat @gol
--mintel-asm -mno-clean-linkage -mno-code-align @gol
--mno-complex-addr -mno-leaf-procedures @gol
--mno-old-align -mno-strict-align -mno-tail-call @gol
--mnumerics -mold-align -msoft-float -mstrict-align @gol
--mtail-call}
-
-@emph{DEC Alpha Options}
-@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
--mieee -mieee-with-inexact -mieee-conformant @gol
--mfp-trap-mode=@var{mode} -mfp-rounding-mode=@var{mode} @gol
--mtrap-precision=@var{mode} -mbuild-constants @gol
--mcpu=@var{cpu-type} -mtune=@var{cpu-type} @gol
--mbwx -mmax -mfix -mcix @gol
--mfloat-vax -mfloat-ieee @gol
--mexplicit-relocs -msmall-data -mlarge-data @gol
--msmall-text -mlarge-text @gol
--mmemory-latency=@var{time}}
-
-@emph{DEC Alpha/VMS Options}
-@gccoptlist{-mvms-return-codes}
-
-@emph{H8/300 Options}
-@gccoptlist{-mrelax -mh -ms -mn -mint32 -malign-300}
-
+-mhard-float -msoft-float -mlong-double-64 -mlong-double-128 @gol
+-mbackchain -mno-backchain -mpacked-stack -mno-packed-stack @gol
+-msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol
+-m64 -m31 -mdebug -mno-debug -mesa -mzarch @gol
+-mtpf-trace -mno-tpf-trace -mfused-madd -mno-fused-madd @gol
+-mwarn-framesize -mwarn-dynamicstack -mstack-size -mstack-guard}
+
+@emph{Score Options}
+@gccoptlist{-meb -mel @gol
+-mnhwloop @gol
+-muls @gol
+-mmac @gol
+-mscore5 -mscore5u -mscore7 -mscore7d}
+
@emph{SH Options}
@gccoptlist{-m1 -m2 -m2e -m3 -m3e @gol
-m4-nofpu -m4-single-only -m4-single -m4 @gol
+-m4a-nofpu -m4a-single-only -m4a-single -m4a -m4al @gol
-m5-64media -m5-64media-nofpu @gol
-m5-32media -m5-32media-nofpu @gol
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
--mbigtable -mfmovd -mhitachi -mnomacsave @gol
+-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
-mieee -misize -mpadstruct -mspace @gol
--mprefergot -musermode}
+-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
+-mdivsi3_libfunc=@var{name} @gol
+-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
+ -minvalid-symbols}
+
+@emph{SPARC Options}
+@gccoptlist{-mcpu=@var{cpu-type} @gol
+-mtune=@var{cpu-type} @gol
+-mcmodel=@var{code-model} @gol
+-m32 -m64 -mapp-regs -mno-app-regs @gol
+-mfaster-structs -mno-faster-structs @gol
+-mfpu -mno-fpu -mhard-float -msoft-float @gol
+-mhard-quad-float -msoft-quad-float @gol
+-mimpure-text -mno-impure-text -mlittle-endian @gol
+-mstack-bias -mno-stack-bias @gol
+-munaligned-doubles -mno-unaligned-doubles @gol
+-mv8plus -mno-v8plus -mvis -mno-vis
+-threads -pthreads -pthread}
@emph{System V Options}
@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
-@emph{ARC Options}
-@gccoptlist{-EB -EL @gol
--mmangle-cpu -mcpu=@var{cpu} -mtext=@var{text-section} @gol
--mdata=@var{data-section} -mrodata=@var{readonly-data-section}}
-
@emph{TMS320C3x/C4x Options}
@gccoptlist{-mcpu=@var{cpu} -mbig -msmall -mregparm -mmemparm @gol
-mfast-fix -mmpyi -mbk -mti -mdp-isr-reload @gol
@@ -576,67 +749,11 @@ in the following sections.
-mv850e @gol
-mv850 -mbig-switch}
-@emph{NS32K Options}
-@gccoptlist{-m32032 -m32332 -m32532 -m32081 -m32381 @gol
--mmult-add -mnomult-add -msoft-float -mrtd -mnortd @gol
--mregparam -mnoregparam -msb -mnosb @gol
--mbitfield -mnobitfield -mhimem -mnohimem}
-
-@emph{AVR Options}
-@gccoptlist{-mmcu=@var{mcu} -msize -minit-stack=@var{n} -mno-interrupts @gol
--mcall-prologues -mno-tablejump -mtiny-stack}
-
-@emph{MCore Options}
-@gccoptlist{-mhardlit -mno-hardlit -mdiv -mno-div -mrelax-immediates @gol
--mno-relax-immediates -mwide-bitfields -mno-wide-bitfields @gol
--m4byte-functions -mno-4byte-functions -mcallgraph-data @gol
--mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol
--mlittle-endian -mbig-endian -m210 -m340 -mstack-increment}
-
-@emph{MMIX Options}
-@gccoptlist{-mlibfuncs -mno-libfuncs -mepsilon -mno-epsilon -mabi=gnu @gol
--mabi=mmixware -mzero-extend -mknuthdiv -mtoplevel-symbols @gol
--melf -mbranch-predict -mno-branch-predict -mbase-addresses @gol
--mno-base-addresses -msingle-exit -mno-single-exit}
-
-@emph{IA-64 Options}
-@gccoptlist{-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol
--mvolatile-asm-stop -mb-step -mregister-names -mno-sdata @gol
--mconstant-gp -mauto-pic -minline-float-divide-min-latency @gol
--minline-float-divide-max-throughput @gol
--minline-int-divide-min-latency @gol
--minline-int-divide-max-throughput @gol
--minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
--mno-dwarf2-asm -mearly-stop-bits @gol
--mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
--mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64}
-
-@emph{D30V Options}
-@gccoptlist{-mextmem -mextmemory -monchip -mno-asm-optimize @gol
--masm-optimize -mbranch-cost=@var{n} -mcond-exec=@var{n}}
-
-@emph{S/390 and zSeries Options}
-@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
--mhard-float -msoft-float -mbackchain -mno-backchain @gol
--msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol
--m64 -m31 -mdebug -mno-debug -mesa -mzarch -mfused-madd -mno-fused-madd}
-
-@emph{CRIS Options}
-@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol
--mmax-stack-frame=@var{n} -melinux-stacksize=@var{n} @gol
--metrax4 -metrax100 -mpdebug -mcc-init -mno-side-effects @gol
--mstack-align -mdata-align -mconst-align @gol
--m32-bit -m16-bit -m8-bit -mno-prologue-epilogue -mno-gotplt @gol
--melf -maout -melinux -mlinux -sim -sim2 @gol
--mmul-bug-workaround -mno-mul-bug-workaround}
+@emph{VAX Options}
+@gccoptlist{-mg -mgnu -munix}
-@emph{PDP-11 Options}
-@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
--mbcopy -mbcopy-builtin -mint32 -mno-int16 @gol
--mint16 -mno-int32 -mfloat32 -mno-float64 @gol
--mfloat64 -mno-float32 -mabshi -mno-abshi @gol
--mbranch-expensive -mbranch-cheap @gol
--msplit -mno-split -munix-asm -mdec-asm}
+@emph{x86-64 Options}
+See i386 and x86-64 Options.
@emph{Xstormy16 Options}
@gccoptlist{-msim}
@@ -648,19 +765,8 @@ in the following sections.
-mtarget-align -mno-target-align @gol
-mlongcalls -mno-longcalls}
-@emph{FRV Options}
-@gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol
--mhard-float -msoft-float @gol
--malloc-cc -mfixed-cc -mdword -mno-dword @gol
--mdouble -mno-double @gol
--mmedia -mno-media -mmuladd -mno-muladd @gol
--mlibrary-pic -macc-4 -macc-8 @gol
--mpack -mno-pack -mno-eflags -mcond-move -mno-cond-move @gol
--mscc -mno-scc -mcond-exec -mno-cond-exec @gol
--mvliw-branch -mno-vliw-branch @gol
--mmulti-cond-exec -mno-multi-cond-exec -mnested-cond-exec @gol
--mno-nested-cond-exec -mtomcat-stats @gol
--mcpu=@var{cpu}}
+@emph{zSeries Options}
+See S/390 and zSeries Options.
@item Code Generation Options
@xref{Code Gen Options,,Options for Code Generation Conventions}.
@@ -671,14 +777,16 @@ in the following sections.
-finhibit-size-directive -finstrument-functions @gol
-fno-common -fno-ident @gol
-fpcc-struct-return -fpic -fPIC -fpie -fPIE @gol
--freg-struct-return -fshared-data -fshort-enums @gol
+-fno-jump-tables @gol
+-freg-struct-return -fshort-enums @gol
-fshort-double -fshort-wchar @gol
--fverbose-asm -fpack-struct -fstack-check @gol
+-fverbose-asm -fpack-struct[=@var{n}] -fstack-check @gol
-fstack-limit-register=@var{reg} -fstack-limit-symbol=@var{sym} @gol
-fargument-alias -fargument-noalias @gol
--fargument-noalias-global -fleading-underscore @gol
--ftls-model=@var{model} @gol
--ftrapv -fwrapv -fbounds-check}
+-fargument-noalias-global -fargument-noalias-anything
+-fleading-underscore -ftls-model=@var{model} @gol
+-ftrapv -fwrapv -fbounds-check @gol
+-fvisibility}
@end table
@menu
@@ -687,7 +795,8 @@ in the following sections.
or preprocessed source.
* C Dialect Options:: Controlling the variant of C language compiled.
* C++ Dialect Options:: Variations on C++.
-* Objective-C Dialect Options:: Variations on Objective-C.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+ and Objective-C++.
* Language Independent Options:: Controlling how diagnostics should be
formatted.
* Warning Options:: How picky should the compiler be?
@@ -729,14 +838,24 @@ C source code which should not be preprocessed.
C++ source code which should not be preprocessed.
@item @var{file}.m
-Objective-C source code. Note that you must link with the library
-@file{libobjc.a} to make an Objective-C program work.
+Objective-C source code. Note that you must link with the @file{libobjc}
+library to make an Objective-C program work.
@item @var{file}.mi
Objective-C source code which should not be preprocessed.
+@item @var{file}.mm
+@itemx @var{file}.M
+Objective-C++ source code. Note that you must link with the @file{libobjc}
+library to make an Objective-C++ program work. Note that @samp{.M} refers
+to a literal capital M@.
+
+@item @var{file}.mii
+Objective-C++ source code which should not be preprocessed.
+
@item @var{file}.h
-C or C++ header file to be turned into a precompiled header.
+C, C++, Objective-C or Objective-C++ header file to be turned into a
+precompiled header.
@item @var{file}.cc
@itemx @var{file}.cp
@@ -749,6 +868,13 @@ C++ source code which must be preprocessed. Note that in @samp{.cxx},
the last two letters must both be literally @samp{x}. Likewise,
@samp{.C} refers to a literal capital C@.
+@item @var{file}.mm
+@itemx @var{file}.M
+Objective-C++ source code which must be preprocessed.
+
+@item @var{file}.mii
+Objective-C++ source code which should not be preprocessed.
+
@item @var{file}.hh
@itemx @var{file}.H
C++ header file to be turned into a precompiled header.
@@ -756,21 +882,22 @@ C++ header file to be turned into a precompiled header.
@item @var{file}.f
@itemx @var{file}.for
@itemx @var{file}.FOR
-Fortran source code which should not be preprocessed.
+Fixed form Fortran source code which should not be preprocessed.
@item @var{file}.F
@itemx @var{file}.fpp
@itemx @var{file}.FPP
-Fortran source code which must be preprocessed (with the traditional
+Fixed form Fortran source code which must be preprocessed (with the traditional
preprocessor).
-@item @var{file}.r
-Fortran source code which must be preprocessed with a RATFOR
-preprocessor (not included with GCC)@.
+@item @var{file}.f90
+@itemx @var{file}.f95
+Free form Fortran source code which should not be preprocessed.
-@xref{Overall Options,,Options Controlling the Kind of Output, g77,
-Using and Porting GNU Fortran}, for more details of the handling of
-Fortran input files.
+@item @var{file}.F90
+@itemx @var{file}.F95
+Free form Fortran source code which must be preprocessed (with the
+traditional preprocessor).
@c FIXME: Descriptions of Java file types.
@c @var{file}.java
@@ -793,6 +920,8 @@ package body). Such files are also called @dfn{bodies}.
@c Pascal:
@c @var{file}.p
@c @var{file}.pas
+@c Ratfor:
+@c @var{file}.r
@item @var{file}.s
Assembler code.
@@ -815,12 +944,13 @@ Specify explicitly the @var{language} for the following input files
name suffix). This option applies to all following input files until
the next @option{-x} option. Possible values for @var{language} are:
@smallexample
-c c-header cpp-output
+c c-header c-cpp-output
c++ c++-header c++-cpp-output
-objective-c objective-c-header objc-cpp-output
+objective-c objective-c-header objective-c-cpp-output
+objective-c++ objective-c++-header objective-c++-cpp-output
assembler assembler-with-cpp
ada
-f77 f77-cpp-input ratfor
+f95 f95-cpp-input
java
treelang
@end smallexample
@@ -836,7 +966,8 @@ Normally the @command{gcc} program will exit with the code of 1 if any
phase of the compiler returns a non-success return code. If you specify
@option{-pass-exit-codes}, the @command{gcc} program will instead return with
numerically highest error produced by any phase that returned an error
-indication.
+indication. The C, C++, and Fortran frontends return 4, if an internal
+compiler error is encountered.
@end table
If you only want some of the stages of compilation, you can use
@@ -884,14 +1015,12 @@ Place output in file @var{file}. This applies regardless to whatever
sort of output is being produced, whether it be an executable file,
an object file, an assembler file or preprocessed C code.
-If you specify @option{-o} when compiling more than one input file, or
-you are producing an executable file as output, all the source files
-on the command line will be compiled at once.
-
-If @option{-o} is not specified, the default is to put an executable file
-in @file{a.out}, the object file for @file{@var{source}.@var{suffix}} in
-@file{@var{source}.o}, its assembler file in @file{@var{source}.s}, and
-all preprocessed C source on standard output.
+If @option{-o} is not specified, the default is to put an executable
+file in @file{a.out}, the object file for
+@file{@var{source}.@var{suffix}} in @file{@var{source}.o}, its
+assembler file in @file{@var{source}.s}, a precompiled header file in
+@file{@var{source}.@var{suffix}.gch}, and all preprocessed C source on
+standard output.
@item -v
@opindex v
@@ -912,6 +1041,23 @@ various stages of compilation. This fails to work on some systems where
the assembler is unable to read from a pipe; but the GNU assembler has
no trouble.
+@item -combine
+@opindex combine
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (IMA) to be performed by the compiler. Currently the only
+language for which this is supported is C@. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support IMA once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+IMA this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with @option{-save-temps}, the compiler will generate multiple
+pre-processed files
+(one for each source file), but only one (combined) @file{.o} or
+@file{.s} file.
+
@item --help
@opindex help
Print (on the standard output) a description of the command line options
@@ -929,7 +1075,9 @@ line options for each tool.
@item --version
@opindex version
-Display the version number and copyrights of the invoked GCC.
+Display the version number and copyrights of the invoked GCC@.
+
+@include @value{srcdir}/../libiberty/at-file.texi
@end table
@node Invoking G++
@@ -947,15 +1095,14 @@ with the name @command{gcc}).
@findex g++
@findex c++
-However, C++ programs often require class libraries as well as a
-compiler that understands the C++ language---and under some
-circumstances, you might want to compile programs or header files from
-standard input, or otherwise without a suffix that flags them as C++
-programs. You might also like to precompile a C header file with a
-@samp{.h} extension to be used in C++ compilations. @command{g++} is a
-program that calls GCC with the default language set to C++, and
-automatically specifies linking against the C++ library. On many
-systems, @command{g++} is also installed with the name @command{c++}.
+However, the use of @command{gcc} does not add the C++ library.
+@command{g++} is a program that calls GCC and treats @samp{.c},
+@samp{.h} and @samp{.i} files as C++ source files instead of C source
+files unless @option{-x} is used, and automatically specifies linking
+against the C++ library. This program is also useful when
+precompiling a C header file with a @samp{.h} extension for use in C++
+compilations. On many systems, @command{g++} is also installed with
+the name @command{c++}.
@cindex invoking @command{g++}
When you compile C++ programs, you may specify many of the same
@@ -974,7 +1121,8 @@ explanations of options that are meaningful only for C++ programs.
@cindex options, dialect
The following options control the dialect of C (or languages derived
-from C, such as C++ and Objective-C) that the compiler accepts:
+from C, such as C++, Objective-C and Objective-C++) that the compiler
+accepts:
@table @gcctabopt
@cindex ANSI support
@@ -1036,7 +1184,7 @@ ISO C90 as modified in amendment 1.
@itemx iso9899:1999
@itemx iso9899:199x
ISO C99. Note that this standard is not yet fully supported; see
-@w{@uref{http://gcc.gnu.org/gcc-3.4/c99status.html}} for more information. The
+@w{@uref{http://gcc.gnu.org/gcc-4.2/c99status.html}} for more information. The
names @samp{c9x} and @samp{iso9899:199x} are deprecated.
@item gnu89
@@ -1068,6 +1216,28 @@ the @code{inline} keyword in ISO C99) are not disabled.
@xref{Standards,,Language Standards Supported by GCC}, for details of
these standard versions.
+@item -fgnu89-inline
+@opindex fgnu89-inline
+The option @option{-fgnu89-inline} tells GCC to use the traditional
+GNU semantics for @code{inline} functions when in C99 mode.
+@xref{Inline,,An Inline Function is As Fast As a Macro}. Using this
+option is roughly equivalent to adding the @code{gnu_inline} function
+attribute to all inline functions (@pxref{Function Attributes}).
+
+This option is accepted by GCC versions 4.1.3 and up. In GCC versions
+prior to 4.3, C99 inline semantics are not supported, and thus this
+option is effectively assumed to be present regardless of whether or not
+it is specified; the only effect of specifying it explicitly is to
+disable warnings about using inline functions in C99 mode. Likewise,
+the option @option{-fno-gnu89-inline} is not supported in versions of
+GCC before 4.3. It will be supported only in C99 or gnu99 mode, not in
+C89 or gnu89 mode.
+
+The preprocesor macros @code{__GNUC_GNU_INLINE__} and
+@code{__GNUC_STDC_INLINE__} may be used to check which semantics are
+in effect for @code{inline} functions. @xref{Common Predefined
+Macros,,,cpp,The C Preprocessor}.
+
@item -aux-info @var{filename}
@opindex aux-info
Output to the given filename prototyped declarations for all functions
@@ -1115,7 +1285,14 @@ instructions that adjust the stack directly, and calls to @code{memcpy}
may become inline copy loops. The resulting code is often both smaller
and faster, but since the function calls no longer appear as such, you
cannot set a breakpoint on those calls, nor can you change the behavior
-of the functions by linking with a different library.
+of the functions by linking with a different library. In addition,
+when a function is recognized as a built-in function, GCC may use
+information about that function to warn about problems with calls to
+that function, or to generate more efficient code, even if the
+resulting code still contains calls to that function. For example,
+warnings are given with @option{-Wformat} for bad calls to
+@code{printf}, when @code{printf} is built in, and @code{strlen} is
+known not to modify global memory.
With the @option{-fno-builtin-@var{function}} option
only the built-in function @var{function} is
@@ -1154,10 +1331,22 @@ This is equivalent to @option{-fno-hosted}.
@xref{Standards,,Language Standards Supported by GCC}, for details of
freestanding and hosted environments.
+@item -fopenmp
+@opindex fopenmp
+@cindex openmp parallel
+Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and
+@code{!$omp} in Fortran. When @option{-fopenmp} is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 @w{@uref{http://www.openmp.org/}}.
+
@item -fms-extensions
@opindex fms-extensions
Accept some non-standard constructs used in Microsoft header files.
+Some cases of unnamed fields in structures and unions are only
+accepted with this option. @xref{Unnamed Fields,,Unnamed struct/union
+fields within structs/unions}, for details.
+
@item -trigraphs
@opindex trigraphs
Support ISO C trigraphs. The @option{-ansi} option (and @option{-std}
@@ -1167,9 +1356,9 @@ options for strict ISO C conformance) implies @option{-trigraphs}.
@opindex no-integrated-cpp
Performs a compilation in two passes: preprocessing and compiling. This
option allows a user supplied "cc1", "cc1plus", or "cc1obj" via the
-@option{-B} option. The user supplied compilation step can then add in
+@option{-B} option. The user supplied compilation step can then add in
an additional preprocessing step after normal preprocessing but before
-compiling. The default is to use the integrated cpp (internal cpp)
+compiling. The default is to use the integrated cpp (internal cpp)
The semantics of this option will change if "cc1", "cc1plus", and
"cc1obj" are merged.
@@ -1230,17 +1419,6 @@ These options control whether a bit-field is signed or unsigned, when the
declaration does not use either @code{signed} or @code{unsigned}. By
default, such a bit-field is signed, because this is consistent: the
basic integer types such as @code{int} are signed types.
-
-@item -fwritable-strings
-@opindex fwritable-strings
-Store string constants in the writable data segment and don't uniquize
-them. This is for compatibility with old programs which assume they can
-write into string constants.
-
-Writing into string constants is a very bad idea; ``constants'' should
-be constant.
-
-This option is deprecated.
@end table
@node C++ Dialect Options
@@ -1269,7 +1447,7 @@ Here is a list of options that are @emph{only} for compiling C++ programs:
@item -fabi-version=@var{n}
@opindex fabi-version
-Use version @var{n} of the C++ ABI. Version 2 is the version of the
+Use version @var{n} of the C++ ABI@. Version 2 is the version of the
C++ ABI that first appeared in G++ 3.4. Version 1 is the version of
the C++ ABI that first appeared in G++ 3.2. Version 0 will always be
the version that conforms most closely to the C++ ABI specification.
@@ -1307,17 +1485,19 @@ two definitions were merged.
This option is no longer useful on most targets, now that support has
been added for putting variables into BSS without making them common.
-@item -fno-const-strings
-@opindex fno-const-strings
-Give string constants type @code{char *} instead of type @code{const
-char *}. By default, G++ uses type @code{const char *} as required by
-the standard. Even if you use @option{-fno-const-strings}, you cannot
-actually modify the value of a string constant, unless you also use
-@option{-fwritable-strings}.
+@item -ffriend-injection
+@opindex ffriend-injection
+Inject friend functions into the enclosing namespace, so that they are
+visible outside the scope of the class in which they are declared.
+Friend functions were documented to work this way in the old Annotated
+C++ Reference Manual, and versions of G++ before 4.1 always worked
+that way. However, in ISO C++ a friend function which is not declared
+in an enclosing scope can only be found using argument dependent
+lookup. This option causes friends to be injected as they were in
+earlier releases.
-This option might be removed in a future release of G++. For maximum
-portability, you should structure your code so that it works with
-string constants that have type @code{const char *}.
+This option is for compatibility, and may be removed in a future
+release of G++.
@item -fno-elide-constructors
@opindex fno-elide-constructors
@@ -1328,10 +1508,13 @@ call the copy constructor in all cases.
@item -fno-enforce-eh-specs
@opindex fno-enforce-eh-specs
-Don't check for violation of exception specifications at runtime. This
-option violates the C++ standard, but may be useful for reducing code
-size in production builds, much like defining @samp{NDEBUG}. The compiler
-will still optimize based on the exception specifications.
+Don't generate code to check for violation of exception specifications
+at runtime. This option violates the C++ standard, but may be useful
+for reducing code size in production builds, much like defining
+@samp{NDEBUG}. This does not give user code permission to throw
+exceptions in violation of the exception specifications; the compiler
+will still optimize based on the specifications, so throwing an
+unexpected exception will result in undefined behavior.
@item -ffor-scope
@itemx -fno-for-scope
@@ -1415,7 +1598,9 @@ functions for use by the C++ runtime type identification features
(@samp{dynamic_cast} and @samp{typeid}). If you don't use those parts
of the language, you can save some space by using this flag. Note that
exception handling uses the same information, but it will generate it as
-needed.
+needed. The @samp{dynamic_cast} operator can still be used for casts that
+do not require runtime type information, i.e. casts to @code{void *} or to
+unambiguous base classes.
@item -fstats
@opindex fstats
@@ -1429,6 +1614,13 @@ A limit on the template instantiation depth is needed to detect
endless recursions during template class instantiation. ANSI/ISO C++
conforming programs must not rely on a maximum depth greater than 17.
+@item -fno-threadsafe-statics
+@opindex fno-threadsafe-statics
+Do not emit the extra code to use the routines specified in the C++
+ABI for thread-safe initialization of local statics. You can use this
+option to reduce code size slightly in code that doesn't need to be
+thread-safe.
+
@item -fuse-cxa-atexit
@opindex fuse-cxa-atexit
Register destructors for objects with static storage duration with the
@@ -1437,6 +1629,40 @@ This option is required for fully standards-compliant handling of static
destructors, but will only work if your C library supports
@code{__cxa_atexit}.
+@item -fno-use-cxa-get-exception-ptr
+@opindex fno-use-cxa-get-exception-ptr
+Don't use the @code{__cxa_get_exception_ptr} runtime routine. This
+will cause @code{std::uncaught_exception} to be incorrect, but is necessary
+if the runtime routine is not available.
+
+@item -fvisibility-inlines-hidden
+@opindex fvisibility-inlines-hidden
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+
+The effect of this is that GCC may, effectively, mark inline methods with
+@code{__attribute__ ((visibility ("hidden")))} so that they do not
+appear in the export table of a DSO and do not require a PLT indirection
+when used within the DSO@. Enabling this option can have a dramatic effect
+on load and link times of a DSO as it massively reduces the size of the
+dynamic export table when the library makes heavy use of templates.
+
+The behaviour of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+@xref{Template Instantiation}.
+
@item -fno-weak
@opindex fno-weak
Do not use weak symbol support, even if it is provided by the linker.
@@ -1466,7 +1692,7 @@ inlined by default.
@item -Wabi @r{(C++ only)}
@opindex Wabi
Warn when G++ generates code that is probably not compatible with the
-vendor-neutral C++ ABI. Although an effort has been made to warn about
+vendor-neutral C++ ABI@. Although an effort has been made to warn about
all such cases, there are probably some cases that are not warned about,
even though G++ is generating incompatible code. There may also be
cases where warnings are emitted even though the code that is generated
@@ -1571,8 +1797,8 @@ public static member functions.
@item -Wnon-virtual-dtor @r{(C++ only)}
@opindex Wnon-virtual-dtor
Warn when a class appears to be polymorphic, thereby requiring a virtual
-destructor, yet it declares a non-virtual one.
-This warning is enabled by @option{-Wall}.
+destructor, yet it declares a non-virtual one. This warning is also
+enabled if -Weffc++ is specified.
@item -Wreorder @r{(C++ only)}
@opindex Wreorder
@@ -1642,6 +1868,14 @@ to filter out those warnings.
@opindex Wno-deprecated
Do not warn about usage of deprecated features. @xref{Deprecated Features}.
+@item -Wstrict-null-sentinel @r{(C++ only)}
+@opindex Wstrict-null-sentinel
+Warn also about the use of an uncasted @code{NULL} as sentinel. When
+compiling only with GCC this is a valid sentinel, as @code{NULL} is defined
+to @code{__null}. Although it is a null pointer constant not a null pointer,
+it is guaranteed to of the same size as a pointer. But this use is
+not portable across different compilers.
+
@item -Wno-non-template-friend @r{(C++ only)}
@opindex Wno-non-template-friend
Disable warnings when non-templatized friend functions are declared
@@ -1661,9 +1895,9 @@ but disables the helpful warning.
@item -Wold-style-cast @r{(C++ only)}
@opindex Wold-style-cast
Warn if an old-style (C-style) cast to a non-void type is used within
-a C++ program. The new-style casts (@samp{static_cast},
-@samp{reinterpret_cast}, and @samp{const_cast}) are less vulnerable to
-unintended effects and much easier to search for.
+a C++ program. The new-style casts (@samp{dynamic_cast},
+@samp{static_cast}, @samp{reinterpret_cast}, and @samp{const_cast}) are
+less vulnerable to unintended effects and much easier to search for.
@item -Woverloaded-virtual @r{(C++ only)}
@opindex Woverloaded-virtual
@@ -1721,19 +1955,20 @@ In this example, G++ will synthesize a default @samp{A& operator =
(const A&);}, while cfront will use the user-defined @samp{operator =}.
@end table
-@node Objective-C Dialect Options
-@section Options Controlling Objective-C Dialect
+@node Objective-C and Objective-C++ Dialect Options
+@section Options Controlling Objective-C and Objective-C++ Dialects
-@cindex compiler options, Objective-C
-@cindex Objective-C options, command line
-@cindex options, Objective-C
-(NOTE: This manual does not describe the Objective-C language itself. See
-@w{@uref{http://gcc.gnu.org/readings.html}} for references.)
+@cindex compiler options, Objective-C and Objective-C++
+@cindex Objective-C and Objective-C++ options, command line
+@cindex options, Objective-C and Objective-C++
+(NOTE: This manual does not describe the Objective-C and Objective-C++
+languages themselves. See @xref{Standards,,Language Standards
+Supported by GCC}, for references.)
This section describes the command-line options that are only meaningful
-for Objective-C programs, but you can also use most of the GNU compiler
-options regardless of what language your program is in. For example,
-you might compile a file @code{some_class.m} like this:
+for Objective-C and Objective-C++ programs, but you can also use most of
+the language-independent GNU compiler options.
+For example, you might compile a file @code{some_class.m} like this:
@smallexample
gcc -g -fgnu-runtime -O -c some_class.m
@@ -1741,11 +1976,16 @@ gcc -g -fgnu-runtime -O -c some_class.m
@noindent
In this example, @option{-fgnu-runtime} is an option meant only for
-Objective-C programs; you can use the other options with any language
-supported by GCC@.
+Objective-C and Objective-C++ programs; you can use the other options with
+any language supported by GCC@.
+
+Note that since Objective-C is an extension of the C language, Objective-C
+compilations may also use options specific to the C front-end (e.g.,
+@option{-Wtraditional}). Similarly, Objective-C++ compilations may use
+C++-specific options (e.g., @option{-Wabi}).
Here is a list of options that are @emph{only} for compiling Objective-C
-programs:
+and Objective-C++ programs:
@table @gcctabopt
@item -fconstant-string-class=@var{class-name}
@@ -1774,15 +2014,45 @@ used.
@opindex fno-nil-receivers
Assume that all Objective-C message dispatches (e.g.,
@code{[receiver message:arg]}) in this translation unit ensure that the receiver
-is not @code{nil}. This allows for more efficient entry points in the runtime to be
-used. Currently, this option is only available in conjunction with
+is not @code{nil}. This allows for more efficient entry points in the runtime
+to be used. Currently, this option is only available in conjunction with
the NeXT runtime on Mac OS X 10.3 and later.
+@item -fobjc-call-cxx-cdtors
+@opindex fobjc-call-cxx-cdtors
+For each Objective-C class, check if any of its instance variables is a
+C++ object with a non-trivial default constructor. If so, synthesize a
+special @code{- (id) .cxx_construct} instance method that will run
+non-trivial default constructors on any such instance variables, in order,
+and then return @code{self}. Similarly, check if any instance variable
+is a C++ object with a non-trivial destructor, and if so, synthesize a
+special @code{- (void) .cxx_destruct} method that will run
+all such default destructors, in reverse order.
+
+The @code{- (id) .cxx_construct} and/or @code{- (void) .cxx_destruct} methods
+thusly generated will only operate on instance variables declared in the
+current Objective-C class, and not those inherited from superclasses. It
+is the responsibility of the Objective-C runtime to invoke all such methods
+in an object's inheritance hierarchy. The @code{- (id) .cxx_construct} methods
+will be invoked by the runtime immediately after a new object
+instance is allocated; the @code{- (void) .cxx_destruct} methods will
+be invoked immediately before the runtime deallocates an object instance.
+
+As of this writing, only the NeXT runtime on Mac OS X 10.4 and later has
+support for invoking the @code{- (id) .cxx_construct} and
+@code{- (void) .cxx_destruct} methods.
+
+@item -fobjc-direct-dispatch
+@opindex fobjc-direct-dispatch
+Allow fast jumps to the message dispatcher. On Darwin this is
+accomplished via the comm page.
+
@item -fobjc-exceptions
@opindex fobjc-exceptions
Enable syntactic support for structured exception handling in Objective-C,
-similar to what is offered by C++ and Java. Currently, this option is only
-available in conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+similar to what is offered by C++ and Java. This option is
+unavailable in conjunction with the NeXT runtime on Mac OS X 10.2 and
+earlier.
@smallexample
@@try @{
@@ -1870,6 +2140,10 @@ Unlike Java, Objective-C does not allow for entire methods to be marked
@code{@@synchronized} blocks is allowed, and will cause the guarding object
to be unlocked properly.
+@item -fobjc-gc
+@opindex fobjc-gc
+Enable garbage collection (GC) in Objective-C and Objective-C++ programs.
+
@item -freplace-objc-classes
@opindex freplace-objc-classes
Emit a special marker instructing @command{ld(1)} not to statically link in
@@ -1896,13 +2170,18 @@ for individual class implementations to be modified during program execution.
Dump interface declarations for all classes seen in the source file to a
file named @file{@var{sourcename}.decl}.
+@item -Wassign-intercept
+@opindex Wassign-intercept
+Warn whenever an Objective-C assignment is being intercepted by the
+garbage collector.
+
@item -Wno-protocol
@opindex Wno-protocol
If a class is declared to implement a protocol, a warning is issued for
every method in the protocol that is not implemented by the class. The
default behavior is to issue a warning for every method not explicitly
implemented in the class, even if a method implementation is inherited
-from the superclass. If you use the @code{-Wno-protocol} option, then
+from the superclass. If you use the @option{-Wno-protocol} option, then
methods inherited from the superclass are considered to be implemented,
and no warning is issued for them.
@@ -1916,9 +2195,18 @@ expression, and a corresponding method for that selector has been found
during compilation. Because these checks scan the method table only at
the end of compilation, these warnings are not produced if the final
stage of compilation is not reached, for example because an error is
-found during compilation, or because the @code{-fsyntax-only} option is
+found during compilation, or because the @option{-fsyntax-only} option is
being used.
+@item -Wstrict-selector-match
+@opindex Wstrict-selector-match
+Warn if multiple methods with differing argument and/or return types are
+found for a given selector when attempting to send a message using this
+selector to a receiver of type @code{id} or @code{Class}. When this flag
+is off (which is the default behavior), the compiler will omit such warnings
+if any differences found are confined to types which share the same size
+and alignment.
+
@item -Wundeclared-selector
@opindex Wundeclared-selector
Warn if a @code{@@selector(@dots{})} expression referring to an
@@ -1928,7 +2216,7 @@ method with that name has been declared before the
@code{@@interface} or @code{@@protocol} declaration, or implicitly in
an @code{@@implementation} section. This option always performs its
checks as soon as a @code{@@selector(@dots{})} expression is found,
-while @code{-Wselector} only performs its checks in the final stage of
+while @option{-Wselector} only performs its checks in the final stage of
compilation. This also enforces the coding style convention
that methods and selectors must be declared before being used.
@@ -1977,6 +2265,13 @@ messages reporter to emit the same source location information (as
prefix) for physical lines that result from the process of breaking
a message which is too long to fit on a single line.
+@item -fdiagnostics-show-option
+@opindex fdiagnostics-show-option
+This option instructs the diagnostic machinery to add text to each
+diagnostic emitted, which indicates which command line option directly
+controls that diagnostic, when such an option is known to the
+diagnostic machinery.
+
@end table
@node Warning Options
@@ -1999,7 +2294,8 @@ two forms, whichever is not the default.
The following options control the amount and kinds of warnings produced
by GCC; for further, language-specific options also refer to
-@ref{C++ Dialect Options} and @ref{Objective-C Dialect Options}.
+@ref{C++ Dialect Options} and @ref{Objective-C and Objective-C++ Dialect
+Options}.
@table @gcctabopt
@cindex syntax checking
@@ -2066,21 +2362,35 @@ Inhibit warning messages about the use of @samp{#import}.
Warn if an array subscript has type @code{char}. This is a common cause
of error, as programmers often forget that this type is signed on some
machines.
+This warning is enabled by @option{-Wall}.
@item -Wcomment
@opindex Wcomment
Warn whenever a comment-start sequence @samp{/*} appears in a @samp{/*}
comment, or whenever a Backslash-Newline appears in a @samp{//} comment.
+This warning is enabled by @option{-Wall}.
+
+@item -Wfatal-errors
+@opindex Wfatal-errors
+This option causes the compiler to abort compilation on the first error
+occurred rather than trying to keep going and printing further error
+messages.
@item -Wformat
@opindex Wformat
+@opindex ffreestanding
+@opindex fno-builtin
Check calls to @code{printf} and @code{scanf}, etc., to make sure that
the arguments supplied have types appropriate to the format string
specified, and that the conversions specified in the format string make
sense. This includes standard functions, and others specified by format
attributes (@pxref{Function Attributes}), in the @code{printf},
@code{scanf}, @code{strftime} and @code{strfmon} (an X/Open extension,
-not in the C standard) families.
+not in the C standard) families (or other target-specific families).
+Which functions are checked without format attributes having been
+specified depends on the standard version selected, and such checks of
+functions without the attribute specified are disabled by
+@option{-ffreestanding} or @option{-fno-builtin}.
The formats are checked against the format features supported by GNU
libc version 2.2. These include all ISO C90 and C99 features, as well
@@ -2158,7 +2468,7 @@ requiring a non-null value by the @code{nonnull} function attribute.
@option{-Wnonnull} is included in @option{-Wall} and @option{-Wformat}. It
can be disabled with the @option{-Wno-nonnull} option.
-@item -Winit-self @r{(C, C++, and Objective-C only)}
+@item -Winit-self @r{(C, C++, Objective-C and Objective-C++ only)}
@opindex Winit-self
Warn about uninitialized variables which are initialized with themselves.
Note this option can only be used with the @option{-Wuninitialized} option,
@@ -2179,23 +2489,28 @@ int f()
@item -Wimplicit-int
@opindex Wimplicit-int
Warn when a declaration does not specify a type.
+This warning is enabled by @option{-Wall}.
@item -Wimplicit-function-declaration
@itemx -Werror-implicit-function-declaration
@opindex Wimplicit-function-declaration
@opindex Werror-implicit-function-declaration
Give a warning (or error) whenever a function is used before being
-declared.
+declared. The form @option{-Wno-error-implicit-function-declaration}
+is not supported.
+This warning is enabled by @option{-Wall} (as a warning, not an error).
@item -Wimplicit
@opindex Wimplicit
Same as @option{-Wimplicit-int} and @option{-Wimplicit-function-declaration}.
+This warning is enabled by @option{-Wall}.
@item -Wmain
@opindex Wmain
Warn if the type of @samp{main} is suspicious. @samp{main} should be a
function with external linkage, returning int, taking either zero
arguments, two, or three arguments of appropriate types.
+This warning is enabled by @option{-Wall}.
@item -Wmissing-braces
@opindex Wmissing-braces
@@ -2208,12 +2523,24 @@ int a[2][2] = @{ 0, 1, 2, 3 @};
int b[2][2] = @{ @{ 0, 1 @}, @{ 2, 3 @} @};
@end smallexample
+This warning is enabled by @option{-Wall}.
+
+@item -Wmissing-include-dirs @r{(C, C++, Objective-C and Objective-C++ only)}
+@opindex Wmissing-include-dirs
+Warn if a user-supplied include directory does not exist.
+
@item -Wparentheses
@opindex Wparentheses
Warn if parentheses are omitted in certain contexts, such
as when there is an assignment in a context where a truth value
is expected, or when operators are nested whose precedence people
-often get confused about.
+often get confused about. Only the warning for an assignment used as
+a truth value is supported when compiling C++; the other warnings are
+only supported when compiling C@.
+
+Also warn if a comparison like @samp{x<=y<=z} appears; this is
+equivalent to @samp{(x<=y ? 1 : 0) <= z}, which is a different
+interpretation from that of ordinary mathematical notation.
Also warn about constructions where there may be confusion to which
@code{if} statement an @code{else} branch belongs. Here is an example of
@@ -2254,17 +2581,19 @@ the enclosing @code{if}. The resulting code would look like this:
@end group
@end smallexample
+This warning is enabled by @option{-Wall}.
+
@item -Wsequence-point
@opindex Wsequence-point
Warn about code that may have undefined semantics because of violations
-of sequence point rules in the C standard.
-
-The C standard defines the order in which expressions in a C program are
-evaluated in terms of @dfn{sequence points}, which represent a partial
-ordering between the execution of parts of the program: those executed
-before the sequence point, and those executed after it. These occur
-after the evaluation of a full expression (one which is not part of a
-larger expression), after the evaluation of the first operand of a
+of sequence point rules in the C and C++ standards.
+
+The C and C++ standards defines the order in which expressions in a C/C++
+program are evaluated in terms of @dfn{sequence points}, which represent
+a partial ordering between the execution of parts of the program: those
+executed before the sequence point, and those executed after it. These
+occur after the evaluation of a full expression (one which is not part
+of a larger expression), after the evaluation of the first operand of a
@code{&&}, @code{||}, @code{? :} or @code{,} (comma) operator, before a
function is called (but after the evaluation of its arguments and the
expression denoting the called function), and in certain other places.
@@ -2278,11 +2607,11 @@ ruled that function calls do not overlap.
It is not specified when between sequence points modifications to the
values of objects take effect. Programs whose behavior depends on this
-have undefined behavior; the C standard specifies that ``Between the
-previous and next sequence point an object shall have its stored value
-modified at most once by the evaluation of an expression. Furthermore,
-the prior value shall be read only to determine the value to be
-stored.''. If a program breaks these rules, the results on any
+have undefined behavior; the C and C++ standards specify that ``Between
+the previous and next sequence point an object shall have its stored
+value modified at most once by the evaluation of an expression.
+Furthermore, the prior value shall be read only to determine the value
+to be stored.''. If a program breaks these rules, the results on any
particular implementation are entirely unpredictable.
Examples of code with undefined behavior are @code{a = a++;}, @code{a[n]
@@ -2291,25 +2620,32 @@ diagnosed by this option, and it may give an occasional false positive
result, but in general it has been found fairly effective at detecting
this sort of problem in programs.
-The present implementation of this option only works for C programs. A
-future implementation may also work for C++ programs.
-
-The C standard is worded confusingly, therefore there is some debate
+The standard is worded confusingly, therefore there is some debate
over the precise meaning of the sequence point rules in subtle cases.
Links to discussions of the problem, including proposed formal
definitions, may be found on the GCC readings page, at
@w{@uref{http://gcc.gnu.org/readings.html}}.
+This warning is enabled by @option{-Wall} for C and C++.
+
@item -Wreturn-type
@opindex Wreturn-type
Warn whenever a function is defined with a return-type that defaults to
@code{int}. Also warn about any @code{return} statement with no
return-value in a function whose return-type is not @code{void}.
+For C, also warn if the return type of a function has a type qualifier
+such as @code{const}. Such a type qualifier has no effect, since the
+value returned by a function is not an lvalue. ISO C prohibits
+qualified @code{void} return types on function definitions, so such
+return types always receive a warning even without this option.
+
For C++, a function without return type always produces a diagnostic
message, even when @option{-Wno-return-type} is specified. The only
exceptions are @samp{main} and functions defined in system headers.
+This warning is enabled by @option{-Wall}.
+
@item -Wswitch
@opindex Wswitch
Warn whenever a @code{switch} statement has an index of enumerated type
@@ -2317,6 +2653,7 @@ and lacks a @code{case} for one or more of the named codes of that
enumeration. (The presence of a @code{default} label prevents this
warning.) @code{case} labels outside the enumeration range also
provoke warnings when this option is used.
+This warning is enabled by @option{-Wall}.
@item -Wswitch-default
@opindex Wswitch-switch
@@ -2334,15 +2671,18 @@ provoke warnings when this option is used.
@opindex Wtrigraphs
Warn if any trigraphs are encountered that might change the meaning of
the program (trigraphs within comments are not warned about).
+This warning is enabled by @option{-Wall}.
@item -Wunused-function
@opindex Wunused-function
Warn whenever a static function is declared but not defined or a
-non\-inline static function is unused.
+non-inline static function is unused.
+This warning is enabled by @option{-Wall}.
@item -Wunused-label
@opindex Wunused-label
Warn whenever a label is declared but not used.
+This warning is enabled by @option{-Wall}.
To suppress this warning use the @samp{unused} attribute
(@pxref{Variable Attributes}).
@@ -2357,7 +2697,8 @@ To suppress this warning use the @samp{unused} attribute
@item -Wunused-variable
@opindex Wunused-variable
Warn whenever a local variable or non-constant static variable is unused
-aside from its declaration
+aside from its declaration.
+This warning is enabled by @option{-Wall}.
To suppress this warning use the @samp{unused} attribute
(@pxref{Variable Attributes}).
@@ -2365,6 +2706,7 @@ To suppress this warning use the @samp{unused} attribute
@item -Wunused-value
@opindex Wunused-value
Warn whenever a statement computes a result that is explicitly not used.
+This warning is enabled by @option{-Wall}.
To suppress this warning cast the expression to @samp{void}.
@@ -2383,17 +2725,20 @@ if a variable may be clobbered by a @code{setjmp} call.
These warnings are possible only in optimizing compilation,
because they require data flow information that is computed only
-when optimizing. If you don't specify @option{-O}, you simply won't
-get these warnings.
+when optimizing. If you do not specify @option{-O}, you will not get
+these warnings. Instead, GCC will issue a warning about @option{-Wuninitialized}
+requiring @option{-O}.
If you want to warn about code which uses the uninitialized value of the
variable in its own initializer, use the @option{-Winit-self} option.
-These warnings occur only for variables that are candidates for
-register allocation. Therefore, they do not occur for a variable that
-is declared @code{volatile}, or whose address is taken, or whose size
-is other than 1, 2, 4 or 8 bytes. Also, they do not occur for
-structures, unions or arrays, even when they are in registers.
+These warnings occur for individual uninitialized or clobbered
+elements of structure, union or array variables as well as for
+variables which are uninitialized or clobbered as a whole. They do
+not occur for variables or elements declared @code{volatile}. Because
+these warnings depend on optimization, the exact variables or elements
+for which there are warnings will depend on the precise optimization
+options and version of GCC used.
Note that there may be no warning about a variable that is used only
to compute a value that itself is never used, because such
@@ -2454,6 +2799,8 @@ Some spurious warnings can be avoided if you declare all the functions
you use that never return as @code{noreturn}. @xref{Function
Attributes}.
+This warning is enabled by @option{-Wall}.
+
@item -Wunknown-pragmas
@opindex Wunknown-pragmas
@cindex warning for unknown pragmas
@@ -2464,14 +2811,82 @@ GCC@. If this command line option is used, warnings will even be issued
for unknown pragmas in system header files. This is not the case if
the warnings were only enabled by the @option{-Wall} command line option.
+@item -Wno-pragmas
+@opindex Wno-pragmas
+@opindex Wpragmas
+Do not warn about misuses of pragmas, such as incorrect parameters,
+invalid syntax, or conflicts between pragmas. See also
+@samp{-Wunknown-pragmas}.
+
@item -Wstrict-aliasing
@opindex Wstrict-aliasing
This option is only active when @option{-fstrict-aliasing} is active.
It warns about code which might break the strict aliasing rules that the
-compiler is using for optimization. The warning does not catch all
-cases, but does attempt to catch the more common pitfalls. It is
+compiler is using for optimization. The warning does not catch all
+cases, but does attempt to catch the more common pitfalls. It is
included in @option{-Wall}.
+@item -Wstrict-aliasing=2
+@opindex Wstrict-aliasing=2
+This option is only active when @option{-fstrict-aliasing} is active.
+It warns about code which might break the strict aliasing rules that the
+compiler is using for optimization. This warning catches more cases than
+@option{-Wstrict-aliasing}, but it will also give a warning for some ambiguous
+cases that are safe.
+
+@item -Wstrict-overflow
+@item -Wstrict-overflow=@var{n}
+@opindex Wstrict-overflow
+This option is only active when @option{-fstrict-overflow} is active.
+It warns about cases where the compiler optimizes based on the
+assumption that signed overflow does not occur. Note that it does not
+warn about all cases where the code might overflow: it only warns
+about cases where the compiler implements some optimization. Thus
+this warning depends on the optimization level.
+
+An optimization which assumes that signed overflow does not occur is
+perfectly safe if the values of the variables involved are such that
+overflow never does, in fact, occur. Therefore this warning can
+easily give a false positive: a warning about code which is not
+actually a problem. To help focus on important issues, several
+warning levels are defined. No warnings are issued for the use of
+undefined signed overflow when estimating how many iterations a loop
+will require, in particular when determining whether a loop will be
+executed at all.
+
+@table @option
+@item -Wstrict-overflow=1
+Warn about cases which are both questionable and easy to avoid. For
+example: @code{x + 1 > x}; with @option{-fstrict-overflow}, the
+compiler will simplify this to @code{1}. This level of
+@option{-Wstrict-overflow} is enabled by @option{-Wall}; higher levels
+are not, and must be explicitly requested.
+
+@item -Wstrict-overflow=2
+Also warn about other cases where a comparison is simplified to a
+constant. For example: @code{abs (x) >= 0}. This can only be
+simplified when @option{-fstrict-overflow} is in effect, because
+@code{abs (INT_MIN)} overflows to @code{INT_MIN}, which is less than
+zero. @option{-Wstrict-overflow} (with no level) is the same as
+@option{-Wstrict-overflow=2}.
+
+@item -Wstrict-overflow=3
+Also warn about other cases where a comparison is simplified. For
+example: @code{x + 1 > 1} will be simplified to @code{x > 0}.
+
+@item -Wstrict-overflow=4
+Also warn about other simplifications not covered by the above cases.
+For example: @code{(x * 10) / 5} will be simplified to @code{x * 2}.
+
+@item -Wstrict-overflow=5
+Also warn about cases where the compiler reduces the magnitude of a
+constant involved in a comparison. For example: @code{x + 2 > y} will
+be simplified to @code{x + 1 >= y}. This is reported only at the
+highest warning level because this simplification applies to many
+comparisons, so this warning level will give a very large number of
+false positives.
+@end table
+
@item -Wall
@opindex Wall
All of the above @samp{-W} options combined. This enables all the
@@ -2479,7 +2894,7 @@ warnings about constructions that some users consider questionable, and
that are easy to avoid (or modify to prevent the warning), even in
conjunction with macros. This also enables some language-specific
warnings described in @ref{C++ Dialect Options} and
-@ref{Objective-C Dialect Options}.
+@ref{Objective-C and Objective-C++ Dialect Options}.
@end table
The following @option{-W@dots{}} options are not implied by @option{-Wall}.
@@ -2525,22 +2940,10 @@ but @samp{x[(void)i,j]} will not.
An unsigned value is compared against zero with @samp{<} or @samp{>=}.
@item
-A comparison like @samp{x<=y<=z} appears; this is equivalent to
-@samp{(x<=y ? 1 : 0) <= z}, which is a different interpretation from
-that of ordinary mathematical notation.
-
-@item
Storage-class specifiers like @code{static} are not the first things in
a declaration. According to the C Standard, this usage is obsolescent.
@item
-The return type of a function has a type qualifier such as @code{const}.
-Such a type qualifier has no effect, since the value returned by a
-function is not an lvalue. (But don't warn about the GNU extension of
-@code{volatile void} return types. That extension will be warned about
-if @option{-pedantic} is specified.)
-
-@item
If @option{-Wall} or @option{-Wunused} is also specified, warn about unused
arguments.
@@ -2551,13 +2954,14 @@ incorrect result when the signed value is converted to unsigned.
@item
An aggregate has an initializer which does not initialize all members.
-For example, the following code would cause such a warning, because
-@code{x.h} would be implicitly initialized to zero:
+This warning can be independently controlled by
+@option{-Wmissing-field-initializers}.
-@smallexample
-struct s @{ int f, g, h; @};
-struct s x = @{ 3, 4 @};
-@end smallexample
+@item
+An initialized field without side effects is overridden when using
+designated initializers (@pxref{Designated Inits, , Designated
+Initializers}). This warning can be independently controlled by
+@option{-Woverride-init}.
@item
A function parameter is declared without a type specifier in K&R-style
@@ -2577,10 +2981,6 @@ A pointer is compared against integer zero with @samp{<}, @samp{<=},
@item
A variable might be changed by @samp{longjmp} or @samp{vfork}.
-@item
-Any of several floating-point events that often indicate errors, such as
-overflow, underflow, loss of precision, etc.
-
@item @r{(C++ only)}
An enumerator and a non-enumerator both appear in a conditional expression.
@@ -2735,9 +3135,10 @@ GCC versions before GCC 3.0. @xref{Mixed Declarations}.
@opindex Wundef
Warn if an undefined identifier is evaluated in an @samp{#if} directive.
-@item -Wendif-labels
+@item -Wno-endif-labels
+@opindex Wno-endif-labels
@opindex Wendif-labels
-Warn whenever an @samp{#else} or an @samp{#endif} are followed by text.
+Do not warn whenever an @samp{#else} or an @samp{#endif} are followed by text.
@item -Wshadow
@opindex Wshadow
@@ -2748,6 +3149,13 @@ global variable or whenever a built-in function is shadowed.
@opindex Wlarger-than
Warn whenever an object of larger than @var{len} bytes is defined.
+@item -Wunsafe-loop-optimizations
+@opindex Wunsafe-loop-optimizations
+Warn if the loop cannot be optimized because the compiler could not
+assume anything on the bounds of the loop indices. With
+@option{-funsafe-loop-optimizations} warn if the compiler made
+such assumptions.
+
@item -Wpointer-arith
@opindex Wpointer-arith
Warn about anything that depends on the ``size of'' a function type or
@@ -2760,6 +3168,11 @@ to functions.
Warn whenever a function call is cast to a non-matching type.
For example, warn if @code{int malloc()} is cast to @code{anything *}.
+@item -Wc++-compat
+Warn about ISO C constructs that are outside of the common subset of
+ISO C and ISO C++, e.g.@: request for implicit conversion from
+@code{void *} to a pointer to non-@code{void} type.
+
@item -Wcast-qual
@opindex Wcast-qual
Warn whenever a pointer is cast so as to remove a type qualifier from
@@ -2779,7 +3192,8 @@ When compiling C, give string constants the type @code{const
char[@var{length}]} so that
copying the address of one into a non-@code{const} @code{char *}
pointer will get a warning; when compiling C++, warn about the
-deprecated conversion from string constants to @code{char *}.
+deprecated conversion from string literals to @code{char *}. This
+warning, by default, is enabled for C++ programs.
These warnings will help you find at
compile time code that can try to write into a string constant, but
only if you have been very careful about using @code{const} in
@@ -2809,12 +3223,35 @@ an incorrect result when the signed value is converted to unsigned.
This warning is also enabled by @option{-Wextra}; to get the other warnings
of @option{-Wextra} without this warning, use @samp{-Wextra -Wno-sign-compare}.
+@item -Waddress
+@opindex Waddress
+@opindex Wno-address
+Warn about suspicious uses of memory addresses. These include using
+the address of a function in a conditional expression, such as
+@code{void func(void); if (func)}, and comparisons against the memory
+address of a string literal, such as @code{if (x == "abc")}. Such
+uses typically indicate a programmer error: the address of a function
+always evaluates to true, so their use in a conditional usually
+indicate that the programmer forgot the parentheses in a function
+call; and comparisons against string literals result in unspecified
+behavior and are not portable in C, so they usually indicate that the
+programmer intended to use @code{strcmp}. This warning is enabled by
+@option{-Wall}.
+
@item -Waggregate-return
@opindex Waggregate-return
Warn if any functions that return structures or unions are defined or
called. (In languages where you can return an array, this also elicits
a warning.)
+@item -Wno-attributes
+@opindex Wno-attributes
+@opindex Wattributes
+Do not warn if an unexpected @code{__attribute__} is used, such as
+unrecognized attributes, function attributes applied to variables,
+etc. This will not stop errors for incorrect use of supported
+attributes.
+
@item -Wstrict-prototypes @r{(C only)}
@opindex Wstrict-prototypes
Warn if a function is declared or defined without specifying the
@@ -2841,6 +3278,30 @@ Do so even if the definition itself provides a prototype.
Use this option to detect global functions that are not declared in
header files.
+@item -Wmissing-field-initializers
+@opindex Wmissing-field-initializers
+@opindex W
+@opindex Wextra
+Warn if a structure's initializer has some fields missing. For
+example, the following code would cause such a warning, because
+@code{x.h} is implicitly zero:
+
+@smallexample
+struct s @{ int f, g, h; @};
+struct s x = @{ 3, 4 @};
+@end smallexample
+
+This option does not warn about designated initializers, so the following
+modification would not trigger a warning:
+
+@smallexample
+struct s @{ int f, g, h; @};
+struct s x = @{ .f = 3, .g = 4 @};
+@end smallexample
+
+This warning is included in @option{-Wextra}. To get other @option{-Wextra}
+warnings without this one, use @samp{-Wextra -Wno-missing-field-initializers}.
+
@item -Wmissing-noreturn
@opindex Wmissing-noreturn
Warn about functions which might be candidates for attribute @code{noreturn}.
@@ -2853,14 +3314,23 @@ hosted C environments.
@item -Wmissing-format-attribute
@opindex Wmissing-format-attribute
@opindex Wformat
-If @option{-Wformat} is enabled, also warn about functions which might be
-candidates for @code{format} attributes. Note these are only possible
-candidates, not absolute ones. GCC will guess that @code{format}
-attributes might be appropriate for any function that calls a function
-like @code{vprintf} or @code{vscanf}, but this might not always be the
+Warn about function pointers which might be candidates for @code{format}
+attributes. Note these are only possible candidates, not absolute ones.
+GCC will guess that function pointers with @code{format} attributes that
+are used in assignment, initialization, parameter passing or return
+statements should have a corresponding @code{format} attribute in the
+resulting type. I.e.@: the left-hand side of the assignment or
+initialization, the type of the parameter variable, or the return type
+of the containing function respectively should also have a @code{format}
+attribute to avoid the warning.
+
+GCC will also warn about function definitions which might be
+candidates for @code{format} attributes. Again, these are only
+possible candidates. GCC will guess that @code{format} attributes
+might be appropriate for any function that calls a function like
+@code{vprintf} or @code{vscanf}, but this might not always be the
case, and some functions for which @code{format} attributes are
-appropriate may not be detected. This option has no effect unless
-@option{-Wformat} is enabled (possibly by @option{-Wall}).
+appropriate may not be detected.
@item -Wno-multichar
@opindex Wno-multichar
@@ -2869,12 +3339,73 @@ Do not warn if a multicharacter constant (@samp{'FOOF'}) is used.
Usually they indicate a typo in the user's code, as they have
implementation-defined values, and should not be used in portable code.
+@item -Wnormalized=<none|id|nfc|nfkc>
+@opindex Wnormalized
+@cindex NFC
+@cindex NFKC
+@cindex character set, input normalization
+In ISO C and ISO C++, two identifiers are different if they are
+different sequences of characters. However, sometimes when characters
+outside the basic ASCII character set are used, you can have two
+different character sequences that look the same. To avoid confusion,
+the ISO 10646 standard sets out some @dfn{normalization rules} which
+when applied ensure that two sequences that look the same are turned into
+the same sequence. GCC can warn you if you are using identifiers which
+have not been normalized; this option controls that warning.
+
+There are four levels of warning that GCC supports. The default is
+@option{-Wnormalized=nfc}, which warns about any identifier which is
+not in the ISO 10646 ``C'' normalized form, @dfn{NFC}. NFC is the
+recommended form for most uses.
+
+Unfortunately, there are some characters which ISO C and ISO C++ allow
+in identifiers that when turned into NFC aren't allowable as
+identifiers. That is, there's no way to use these symbols in portable
+ISO C or C++ and have all your identifiers in NFC.
+@option{-Wnormalized=id} suppresses the warning for these characters.
+It is hoped that future versions of the standards involved will correct
+this, which is why this option is not the default.
+
+You can switch the warning off for all characters by writing
+@option{-Wnormalized=none}. You would only want to do this if you
+were using some other normalization scheme (like ``D''), because
+otherwise you can easily create bugs that are literally impossible to see.
+
+Some characters in ISO 10646 have distinct meanings but look identical
+in some fonts or display methodologies, especially once formatting has
+been applied. For instance @code{\u207F}, ``SUPERSCRIPT LATIN SMALL
+LETTER N'', will display just like a regular @code{n} which has been
+placed in a superscript. ISO 10646 defines the @dfn{NFKC}
+normalization scheme to convert all these into a standard form as
+well, and GCC will warn if your code is not in NFKC if you use
+@option{-Wnormalized=nfkc}. This warning is comparable to warning
+about every identifier that contains the letter O because it might be
+confused with the digit 0, and so is not the default, but may be
+useful as a local coding convention if the programming environment is
+unable to be fixed to display these characters distinctly.
+
@item -Wno-deprecated-declarations
@opindex Wno-deprecated-declarations
-Do not warn about uses of functions, variables, and types marked as
-deprecated by using the @code{deprecated} attribute.
-(@pxref{Function Attributes}, @pxref{Variable Attributes},
-@pxref{Type Attributes}.)
+Do not warn about uses of functions (@pxref{Function Attributes}),
+variables (@pxref{Variable Attributes}), and types (@pxref{Type
+Attributes}) marked as deprecated by using the @code{deprecated}
+attribute.
+
+@item -Wno-overflow
+@opindex Wno-overflow
+Do not warn about compile-time overflow in constant expressions.
+
+@item -Woverride-init
+@opindex Woverride-init
+@opindex W
+@opindex Wextra
+Warn if an initialized field without side effects is overridden when
+using designated initializers (@pxref{Designated Inits, , Designated
+Initializers}).
+
+This warning is included in @option{-Wextra}. To get other
+@option{-Wextra} warnings without this one, use @samp{-Wextra
+-Wno-override-init}.
@item -Wpacked
@opindex Wpacked
@@ -2944,7 +3475,7 @@ inline functions declared in system headers.
The compiler uses a variety of heuristics to determine whether or not
to inline a function. For example, the compiler takes into account
-the size of the function being inlined and the the amount of inlining
+the size of the function being inlined and the amount of inlining
that has already been done in the current function. Therefore,
seemingly insignificant changes in the source program can cause the
warnings produced by @option{-Winline} to appear or disappear.
@@ -2964,6 +3495,16 @@ warning about it.
The restrictions on @samp{offsetof} may be relaxed in a future version
of the C++ standard.
+@item -Wno-int-to-pointer-cast @r{(C only)}
+@opindex Wno-int-to-pointer-cast
+Suppress warnings from casts to pointer type of an integer of a
+different size.
+
+@item -Wno-pointer-to-int-cast @r{(C only)}
+@opindex Wno-pointer-to-int-cast
+Suppress warnings from casts from a pointer to an integer type of a
+different size.
+
@item -Winvalid-pch
@opindex Winvalid-pch
Warn if a precompiled header (@pxref{Precompiled Headers}) is found in
@@ -2977,6 +3518,20 @@ the warning messages, use @option{-Wno-long-long}. Flags
@option{-Wlong-long} and @option{-Wno-long-long} are taken into account
only when @option{-pedantic} flag is used.
+@item -Wvariadic-macros
+@opindex Wvariadic-macros
+@opindex Wno-variadic-macros
+Warn if variadic macros are used in pedantic ISO C90 mode, or the GNU
+alternate syntax when in pedantic ISO C99 mode. This is default.
+To inhibit the warning messages, use @option{-Wno-variadic-macros}.
+
+@item -Wvolatile-register-var
+@opindex Wvolatile-register-var
+@opindex Wno-volatile-register-var
+Warn if a register variable is declared volatile. The volatile
+modifier does not inhibit all optimizations that may eliminate reads
+and/or writes to register variables.
+
@item -Wdisabled-optimization
@opindex Wdisabled-optimization
Warn if a requested optimization pass is disabled. This warning does
@@ -2986,9 +3541,54 @@ effectively. Often, the problem is that your code is too big or too
complex; GCC will refuse to optimize programs when the optimization
itself is likely to take inordinate amounts of time.
+@item -Wpointer-sign
+@opindex Wpointer-sign
+@opindex Wno-pointer-sign
+Warn for pointer argument passing or assignment with different signedness.
+This option is only supported for C and Objective-C@. It is implied by
+@option{-Wall} and by @option{-pedantic}, which can be disabled with
+@option{-Wno-pointer-sign}.
+
@item -Werror
@opindex Werror
Make all warnings into errors.
+
+@item -Werror=
+@opindex Werror=
+Make the specified warning into an errors. The specifier for a
+warning is appended, for example @option{-Werror=switch} turns the
+warnings controlled by @option{-Wswitch} into errors. This switch
+takes a negative form, to be used to negate @option{-Werror} for
+specific warnings, for example @option{-Wno-error=switch} makes
+@option{-Wswitch} warnings not be errors, even when @option{-Werror}
+is in effect. You can use the @option{-fdiagnostics-show-option}
+option to have each controllable warning amended with the option which
+controls it, to determine what to use with this option.
+
+Note that specifying @option{-Werror=}@var{foo} automatically implies
+@option{-W}@var{foo}. However, @option{-Wno-error=}@var{foo} does not
+imply anything.
+
+@item -Wstack-protector
+@opindex Wstack-protector
+This option is only active when @option{-fstack-protector} is active. It
+warns about functions that will not be protected against stack smashing.
+
+@item -Woverlength-strings
+@opindex Woverlength-strings
+Warn about string constants which are longer than the ``minimum
+maximum'' length specified in the C standard. Modern compilers
+generally allow string constants which are much longer than the
+standard's minimum limit, but very portable programs should avoid
+using longer strings.
+
+The limit applies @emph{after} string constant concatenation, and does
+not count the trailing NUL@. In C89, the limit was 509 characters; in
+C99, it was raised to 4095. C++98 does not specify a normative
+minimum maximum, so we do not diagnose overlength strings in C++@.
+
+This option is implied by @option{-pedantic}, and can be disabled with
+@option{-Wno-overlength-strings}.
@end table
@node Debugging Options
@@ -3003,7 +3603,7 @@ either your program or GCC:
@item -g
@opindex g
Produce debugging information in the operating system's native format
-(stabs, COFF, XCOFF, or DWARF)@. GDB can work with this debugging
+(stabs, COFF, XCOFF, or DWARF 2)@. GDB can work with this debugging
information.
On most systems that use stabs format, @option{-g} enables use of extra
@@ -3014,7 +3614,7 @@ refuse to read the program. If you want to control for certain whether
to generate the extra information, use @option{-gstabs+}, @option{-gstabs},
@option{-gxcoff+}, @option{-gxcoff}, or @option{-gvms} (see below).
-Unlike most other C compilers, GCC allows you to use @option{-g} with
+GCC allows you to use @option{-g} with
@option{-O}. The shortcuts taken by optimized code may occasionally
produce surprising results: some variables you declared may not exist
at all; flow of control may briefly move where you did not expect it;
@@ -3048,6 +3648,14 @@ On System V Release 4 systems this option requires the GNU assembler.
Produce debugging information in stabs format (if that is supported),
for only symbols that are actually used.
+@item -femit-class-debug-always
+Instead of emitting debugging information for a C++ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way GCC
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+
@item -gstabs+
@opindex gstabs+
Produce debugging information in stabs format (if that is supported),
@@ -3077,7 +3685,10 @@ assembler (GAS) to fail with an error.
@item -gdwarf-2
@opindex gdwarf-2
Produce debugging information in DWARF version 2 format (if that is
-supported). This is the format used by DBX on IRIX 6.
+supported). This is the format used by DBX on IRIX 6. With this
+option, GCC uses features of DWARF version 3 when they are useful;
+version 3 is upward compatible with version 2, but may still cause
+problems for older debuggers.
@item -gvms
@opindex gvms
@@ -3102,10 +3713,13 @@ Level 3 includes extra information, such as all the macro definitions
present in the program. Some debuggers support macro expansion when
you use @option{-g3}.
-Note that in order to avoid confusion between DWARF1 debug level 2,
-and DWARF2 @option{-gdwarf-2} does not accept a concatenated debug
-level. Instead use an additional @option{-g@var{level}} option to
-change the debug level for DWARF2.
+@option{-gdwarf-2} does not accept a concatenated debug level, because
+GCC used to support an option @option{-gdwarf} that meant to generate
+debug information in version 1 of the DWARF format (which is very
+different from version 2), and it would have been too confusing. That
+debug format is long obsolete, but the option cannot be changed now.
+Instead use an additional @option{-g@var{level}} option to change the
+debug level for DWARF2.
@item -feliminate-dwarf2-dups
@opindex feliminate-dwarf2-dups
@@ -3150,21 +3764,31 @@ Add code so that program flow @dfn{arcs} are instrumented. During
execution the program records how many times each branch and call is
executed and how many times it is taken or returns. When the compiled
program exits it saves this data to a file called
-@file{@var{auxname}.gcda} for each source file. The data may be used for
+@file{@var{auxname}.gcda} for each source file. The data may be used for
profile-directed optimizations (@option{-fbranch-probabilities}), or for
-test coverage analysis (@option{-ftest-coverage}). Each object file's
+test coverage analysis (@option{-ftest-coverage}). Each object file's
@var{auxname} is generated from the name of the output file, if
explicitly specified and it is not the final executable, otherwise it is
-the basename of the source file. In both cases any suffix is removed
-(e.g. @file{foo.gcda} for input file @file{dir/foo.c}, or
+the basename of the source file. In both cases any suffix is removed
+(e.g.@: @file{foo.gcda} for input file @file{dir/foo.c}, or
@file{dir/foo.gcda} for output file specified as @option{-o dir/foo.o}).
+@xref{Cross-profiling}.
+
+@cindex @command{gcov}
+@item --coverage
+@opindex coverage
+
+This option is used to compile and link code instrumented for coverage
+analysis. The option is a synonym for @option{-fprofile-arcs}
+@option{-ftest-coverage} (when compiling) and @option{-lgcov} (when
+linking). See the documentation for those options for more details.
@itemize
@item
Compile the source files with @option{-fprofile-arcs} plus optimization
-and code generation options. For test coverage analysis, use the
-additional @option{-ftest-coverage} option. You do not need to profile
+and code generation options. For test coverage analysis, use the
+additional @option{-ftest-coverage} option. You do not need to profile
every source file in a program.
@item
@@ -3173,9 +3797,9 @@ Link your object files with @option{-lgcov} or @option{-fprofile-arcs}
@item
Run the program on a representative workload to generate the arc profile
-information. This may be repeated any number of times. You can run
+information. This may be repeated any number of times. You can run
concurrent instances of your program, and provided that the file system
-supports locking, the data files will be correctly updated. Also
+supports locking, the data files will be correctly updated. Also
@code{fork} calls are detected and correctly handled (double counting
will not happen).
@@ -3187,7 +3811,7 @@ Control Optimization}).
@item
For test coverage analysis, use @command{gcov} to produce human readable
-information from the @file{.gcno} and @file{.gcda} files. Refer to the
+information from the @file{.gcno} and @file{.gcda} files. Refer to the
@command{gcov} documentation for further information.
@end itemize
@@ -3205,179 +3829,300 @@ block must be created to hold the instrumentation code.
@opindex ftest-coverage
Produce a notes file that the @command{gcov} code-coverage utility
(@pxref{Gcov,, @command{gcov}---a Test Coverage Program}) can use to
-show program coverage. Each source file's note file is called
-@file{@var{auxname}.gcno}. Refer to the @option{-fprofile-arcs} option
+show program coverage. Each source file's note file is called
+@file{@var{auxname}.gcno}. Refer to the @option{-fprofile-arcs} option
above for a description of @var{auxname} and instructions on how to
-generate test coverage data. Coverage data will match the source files
+generate test coverage data. Coverage data will match the source files
more closely, if you do not optimize.
@item -d@var{letters}
+@item -fdump-rtl-@var{pass}
@opindex d
Says to make debugging dumps during compilation at times specified by
-@var{letters}. This is used for debugging the compiler. The file names
-for most of the dumps are made by appending a pass number and a word to
-the @var{dumpname}. @var{dumpname} is generated from the name of the
-output file, if explicitly specified and it is not an executable,
-otherwise it is the basename of the source file. In both cases any
-suffix is removed (e.g. @file{foo.01.rtl} or @file{foo.02.sibling}).
-Here are the possible letters for use in @var{letters}, and their
-meanings:
+@var{letters}. This is used for debugging the RTL-based passes of the
+compiler. The file names for most of the dumps are made by appending a
+pass number and a word to the @var{dumpname}. @var{dumpname} is generated
+from the name of the output file, if explicitly specified and it is not
+an executable, otherwise it is the basename of the source file.
-@table @samp
-@item A
+Most debug dumps can be enabled either passing a letter to the @option{-d}
+option, or with a long @option{-fdump-rtl} switch; here are the possible
+letters for use in @var{letters} and @var{pass}, and their meanings:
+
+@table @gcctabopt
+@item -dA
@opindex dA
Annotate the assembler output with miscellaneous debugging information.
-@item b
-@opindex db
-Dump after computing branch probabilities, to @file{@var{file}.12.bp}.
-@item B
+
+@item -dB
+@itemx -fdump-rtl-bbro
@opindex dB
-Dump after block reordering, to @file{@var{file}.31.bbro}.
-@item c
+@opindex fdump-rtl-bbro
+Dump after block reordering, to @file{@var{file}.148r.bbro}.
+
+@item -dc
+@itemx -fdump-rtl-combine
@opindex dc
-Dump after instruction combination, to the file @file{@var{file}.20.combine}.
-@item C
+@opindex fdump-rtl-combine
+Dump after instruction combination, to the file @file{@var{file}.129r.combine}.
+
+@item -dC
+@itemx -fdump-rtl-ce1
+@itemx -fdump-rtl-ce2
@opindex dC
-Dump after the first if conversion, to the file @file{@var{file}.14.ce1}.
-Also dump after the second if conversion, to the file @file{@var{file}.21.ce2}.
-@item d
+@opindex fdump-rtl-ce1
+@opindex fdump-rtl-ce2
+@option{-dC} and @option{-fdump-rtl-ce1} enable dumping after the
+first if conversion, to the file @file{@var{file}.117r.ce1}. @option{-dC}
+and @option{-fdump-rtl-ce2} enable dumping after the second if
+conversion, to the file @file{@var{file}.130r.ce2}.
+
+@item -dd
+@itemx -fdump-rtl-btl
+@itemx -fdump-rtl-dbr
@opindex dd
-Dump after branch target load optimization, to to @file{@var{file}.32.btl}.
-Also dump after delayed branch scheduling, to @file{@var{file}.36.dbr}.
-@item D
+@opindex fdump-rtl-btl
+@opindex fdump-rtl-dbr
+@option{-dd} and @option{-fdump-rtl-btl} enable dumping after branch
+target load optimization, to @file{@var{file}.31.btl}. @option{-dd}
+and @option{-fdump-rtl-dbr} enable dumping after delayed branch
+scheduling, to @file{@var{file}.36.dbr}.
+
+@item -dD
@opindex dD
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
-@item E
+
+@item -dE
+@itemx -fdump-rtl-ce3
@opindex dE
-Dump after the third if conversion, to @file{@var{file}.30.ce3}.
-@item f
+@opindex fdump-rtl-ce3
+Dump after the third if conversion, to @file{@var{file}.146r.ce3}.
+
+@item -df
+@itemx -fdump-rtl-cfg
+@itemx -fdump-rtl-life
@opindex df
-Dump after control and data flow analysis, to @file{@var{file}.11.cfg}.
-Also dump after life analysis, to @file{@var{file}.19.life}.
-@item F
-@opindex dF
-Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.07.addressof}.
-@item g
+@opindex fdump-rtl-cfg
+@opindex fdump-rtl-life
+@option{-df} and @option{-fdump-rtl-cfg} enable dumping after control
+and data flow analysis, to @file{@var{file}.116r.cfg}. @option{-df}
+and @option{-fdump-rtl-cfg} enable dumping dump after life analysis,
+to @file{@var{file}.128r.life1} and @file{@var{file}.135r.life2}.
+
+@item -dg
+@itemx -fdump-rtl-greg
@opindex dg
-Dump after global register allocation, to @file{@var{file}.25.greg}.
-@item G
+@opindex fdump-rtl-greg
+Dump after global register allocation, to @file{@var{file}.139r.greg}.
+
+@item -dG
+@itemx -fdump-rtl-gcse
+@itemx -fdump-rtl-bypass
@opindex dG
-Dump after GCSE, to @file{@var{file}.08.gcse}.
-Also dump after jump bypassing and control flow optimizations, to
-@file{@var{file}.10.bypass}.
-@item h
+@opindex fdump-rtl-gcse
+@opindex fdump-rtl-bypass
+@option{-dG} and @option{-fdump-rtl-gcse} enable dumping after GCSE, to
+@file{@var{file}.114r.gcse}. @option{-dG} and @option{-fdump-rtl-bypass}
+enable dumping after jump bypassing and control flow optimizations, to
+@file{@var{file}.115r.bypass}.
+
+@item -dh
+@itemx -fdump-rtl-eh
@opindex dh
-Dump after finalization of EH handling code, to @file{@var{file}.03.eh}.
-@item i
+@opindex fdump-rtl-eh
+Dump after finalization of EH handling code, to @file{@var{file}.02.eh}.
+
+@item -di
+@itemx -fdump-rtl-sibling
@opindex di
-Dump after sibling call optimizations, to @file{@var{file}.02.sibling}.
-@item j
+@opindex fdump-rtl-sibling
+Dump after sibling call optimizations, to @file{@var{file}.106r.sibling}.
+
+@item -dj
+@itemx -fdump-rtl-jump
@opindex dj
-Dump after the first jump optimization, to @file{@var{file}.04.jump}.
-@item k
+@opindex fdump-rtl-jump
+Dump after the first jump optimization, to @file{@var{file}.112r.jump}.
+
+@item -dk
+@itemx -fdump-rtl-stack
@opindex dk
-Dump after conversion from registers to stack, to @file{@var{file}.34.stack}.
-@item l
+@opindex fdump-rtl-stack
+Dump after conversion from registers to stack, to @file{@var{file}.152r.stack}.
+
+@item -dl
+@itemx -fdump-rtl-lreg
@opindex dl
-Dump after local register allocation, to @file{@var{file}.24.lreg}.
-@item L
+@opindex fdump-rtl-lreg
+Dump after local register allocation, to @file{@var{file}.138r.lreg}.
+
+@item -dL
+@itemx -fdump-rtl-loop2
@opindex dL
-Dump after loop optimization passes, to @file{@var{file}.09.loop} and
-@file{@var{file}.16.loop2}.
-@item M
+@opindex fdump-rtl-loop2
+@option{-dL} and @option{-fdump-rtl-loop2} enable dumping after the
+loop optimization pass, to @file{@var{file}.119r.loop2},
+@file{@var{file}.120r.loop2_init},
+@file{@var{file}.121r.loop2_invariant}, and
+@file{@var{file}.125r.loop2_done}.
+
+@item -dm
+@itemx -fdump-rtl-sms
+@opindex dm
+@opindex fdump-rtl-sms
+Dump after modulo scheduling, to @file{@var{file}.136r.sms}.
+
+@item -dM
+@itemx -fdump-rtl-mach
@opindex dM
+@opindex fdump-rtl-mach
Dump after performing the machine dependent reorganization pass, to
-@file{@var{file}.35.mach}.
-@item n
+@file{@var{file}.155r.mach}.
+
+@item -dn
+@itemx -fdump-rtl-rnreg
@opindex dn
-Dump after register renumbering, to @file{@var{file}.29.rnreg}.
-@item N
+@opindex fdump-rtl-rnreg
+Dump after register renumbering, to @file{@var{file}.147r.rnreg}.
+
+@item -dN
+@itemx -fdump-rtl-regmove
@opindex dN
-Dump after the register move pass, to @file{@var{file}.22.regmove}.
-@item o
+@opindex fdump-rtl-regmove
+Dump after the register move pass, to @file{@var{file}.132r.regmove}.
+
+@item -do
+@itemx -fdump-rtl-postreload
@opindex do
-Dump after post-reload optimizations, to @file{@var{file}.26.postreload}.
-@item r
+@opindex fdump-rtl-postreload
+Dump after post-reload optimizations, to @file{@var{file}.24.postreload}.
+
+@item -dr
+@itemx -fdump-rtl-expand
@opindex dr
-Dump after RTL generation, to @file{@var{file}.01.rtl}.
-@item R
+@opindex fdump-rtl-expand
+Dump after RTL generation, to @file{@var{file}.104r.expand}.
+
+@item -dR
+@itemx -fdump-rtl-sched2
@opindex dR
-Dump after the second scheduling pass, to @file{@var{file}.33.sched2}.
-@item s
+@opindex fdump-rtl-sched2
+Dump after the second scheduling pass, to @file{@var{file}.150r.sched2}.
+
+@item -ds
+@itemx -fdump-rtl-cse
@opindex ds
+@opindex fdump-rtl-cse
Dump after CSE (including the jump optimization that sometimes follows
-CSE), to @file{@var{file}.06.cse}.
-@item S
+CSE), to @file{@var{file}.113r.cse}.
+
+@item -dS
+@itemx -fdump-rtl-sched
@opindex dS
-Dump after the first scheduling pass, to @file{@var{file}.23.sched}.
-@item t
+@opindex fdump-rtl-sched
+Dump after the first scheduling pass, to @file{@var{file}.21.sched}.
+
+@item -dt
+@itemx -fdump-rtl-cse2
@opindex dt
+@opindex fdump-rtl-cse2
Dump after the second CSE pass (including the jump optimization that
-sometimes follows CSE), to @file{@var{file}.18.cse2}.
-@item T
+sometimes follows CSE), to @file{@var{file}.127r.cse2}.
+
+@item -dT
+@itemx -fdump-rtl-tracer
@opindex dT
-Dump after running tracer, to @file{@var{file}.15.tracer}.
-@item u
-@opindex du
-Dump after null pointer elimination pass to @file{@var{file}.05.null}.
-@item U
-@opindex dU
-Dump callgraph and unit-at-a-time optimization @file{@var{file}.00.unit}.
-@item V
+@opindex fdump-rtl-tracer
+Dump after running tracer, to @file{@var{file}.118r.tracer}.
+
+@item -dV
+@itemx -fdump-rtl-vpt
+@itemx -fdump-rtl-vartrack
@opindex dV
-Dump after the value profile transformations, to @file{@var{file}.13.vpt}.
-@item w
+@opindex fdump-rtl-vpt
+@opindex fdump-rtl-vartrack
+@option{-dV} and @option{-fdump-rtl-vpt} enable dumping after the value
+profile transformations, to @file{@var{file}.10.vpt}. @option{-dV}
+and @option{-fdump-rtl-vartrack} enable dumping after variable tracking,
+to @file{@var{file}.154r.vartrack}.
+
+@item -dw
+@itemx -fdump-rtl-flow2
@opindex dw
-Dump after the second flow pass, to @file{@var{file}.27.flow2}.
-@item z
+@opindex fdump-rtl-flow2
+Dump after the second flow pass, to @file{@var{file}.142r.flow2}.
+
+@item -dz
+@itemx -fdump-rtl-peephole2
@opindex dz
-Dump after the peephole pass, to @file{@var{file}.28.peephole2}.
-@item Z
+@opindex fdump-rtl-peephole2
+Dump after the peephole pass, to @file{@var{file}.145r.peephole2}.
+
+@item -dZ
+@itemx -fdump-rtl-web
@opindex dZ
-Dump after constructing the web, to @file{@var{file}.17.web}.
-@item a
+@opindex fdump-rtl-web
+Dump after live range splitting, to @file{@var{file}.126r.web}.
+
+@item -da
+@itemx -fdump-rtl-all
@opindex da
+@opindex fdump-rtl-all
Produce all the dumps listed above.
-@item H
+
+@item -dH
@opindex dH
Produce a core dump whenever an error occurs.
-@item m
+
+@item -dm
@opindex dm
Print statistics on memory usage, at the end of the run, to
standard error.
-@item p
+
+@item -dp
@opindex dp
Annotate the assembler output with a comment indicating which
pattern and alternative was used. The length of each instruction is
also printed.
-@item P
+
+@item -dP
@opindex dP
Dump the RTL in the assembler output as a comment before each instruction.
Also turns on @option{-dp} annotation.
-@item v
+
+@item -dv
@opindex dv
-For each of the other indicated dump files (except for
-@file{@var{file}.01.rtl}), dump a representation of the control flow graph
-suitable for viewing with VCG to @file{@var{file}.@var{pass}.vcg}.
-@item x
+For each of the other indicated dump files (either with @option{-d} or
+@option{-fdump-rtl-@var{pass}}), dump a representation of the control flow
+graph suitable for viewing with VCG to @file{@var{file}.@var{pass}.vcg}.
+
+@item -dx
@opindex dx
Just generate RTL for a function instead of compiling it. Usually used
-with @samp{r}.
-@item y
+with @samp{r} (@option{-fdump-rtl-expand}).
+
+@item -dy
@opindex dy
Dump debugging information during parsing, to standard error.
@end table
+@item -fdump-noaddr
+@opindex fdump-noaddr
+When doing debugging dumps (see @option{-d} option above), suppress
+address output. This makes it more feasible to use diff on debugging
+dumps for compiler invocations with different compiler binaries and/or
+different text / bss / data / heap / stack / dso start locations.
+
@item -fdump-unnumbered
@opindex fdump-unnumbered
When doing debugging dumps (see @option{-d} option above), suppress instruction
-numbers and line number note output. This makes it more feasible to
+numbers, line number note and address output. This makes it more feasible to
use diff on debugging dumps for compiler invocations with different
options, in particular with and without @option{-g}.
-@item -fdump-translation-unit @r{(C and C++ only)}
-@itemx -fdump-translation-unit-@var{options} @r{(C and C++ only)}
+@item -fdump-translation-unit @r{(C++ only)}
+@itemx -fdump-translation-unit-@var{options} @r{(C++ only)}
@opindex fdump-translation-unit
Dump a representation of the tree structure for the entire translation
unit to a file. The file name is made by appending @file{.tu} to the
@@ -3394,47 +4139,242 @@ to the source file name. If the @samp{-@var{options}} form is used,
@var{options} controls the details of the dump as described for the
@option{-fdump-tree} options.
-@item -fdump-tree-@var{switch} @r{(C++ only)}
-@itemx -fdump-tree-@var{switch}-@var{options} @r{(C++ only)}
+@item -fdump-ipa-@var{switch}
+@opindex fdump-ipa
+Control the dumping at various stages of inter-procedural analysis
+language tree to a file. The file name is generated by appending a switch
+specific suffix to the source file name. The following dumps are possible:
+
+@table @samp
+@item all
+Enables all inter-procedural analysis dumps; currently the only produced
+dump is the @samp{cgraph} dump.
+
+@item cgraph
+Dumps information about call-graph optimization, unused function removal,
+and inlining decisions.
+@end table
+
+@item -fdump-tree-@var{switch}
+@itemx -fdump-tree-@var{switch}-@var{options}
@opindex fdump-tree
Control the dumping at various stages of processing the intermediate
language tree to a file. The file name is generated by appending a switch
specific suffix to the source file name. If the @samp{-@var{options}}
form is used, @var{options} is a list of @samp{-} separated options that
-control the details of the dump. Not all options are applicable to all
-dumps, those which are not meaningful will be ignored. The following
+control the details of the dump. Not all options are applicable to all
+dumps, those which are not meaningful will be ignored. The following
options are available
@table @samp
@item address
Print the address of each node. Usually this is not meaningful as it
-changes according to the environment and source file. Its primary use
+changes according to the environment and source file. Its primary use
is for tying up a dump file with a debug environment.
@item slim
Inhibit dumping of members of a scope or body of a function merely
-because that scope has been reached. Only dump such items when they
-are directly reachable by some other path.
+because that scope has been reached. Only dump such items when they
+are directly reachable by some other path. When dumping pretty-printed
+trees, this option inhibits dumping the bodies of control structures.
+@item raw
+Print a raw representation of the tree. By default, trees are
+pretty-printed into a C-like representation.
+@item details
+Enable more detailed dumps (not honored by every dump option).
+@item stats
+Enable dumping various statistics about the pass (not honored by every dump
+option).
+@item blocks
+Enable showing basic block boundaries (disabled in raw dumps).
+@item vops
+Enable showing virtual operands for every statement.
+@item lineno
+Enable showing line numbers for statements.
+@item uid
+Enable showing the unique ID (@code{DECL_UID}) for each variable.
@item all
-Turn on all options.
+Turn on all options, except @option{raw}, @option{slim} and @option{lineno}.
@end table
The following tree dumps are possible:
@table @samp
+
@item original
Dump before any tree based optimization, to @file{@var{file}.original}.
+
@item optimized
Dump after all tree based optimization, to @file{@var{file}.optimized}.
+
@item inlined
Dump after function inlining, to @file{@var{file}.inlined}.
+
+@item gimple
+@opindex fdump-tree-gimple
+Dump each function before and after the gimplification pass to a file. The
+file name is made by appending @file{.gimple} to the source file name.
+
+@item cfg
+@opindex fdump-tree-cfg
+Dump the control flow graph of each function to a file. The file name is
+made by appending @file{.cfg} to the source file name.
+
+@item vcg
+@opindex fdump-tree-vcg
+Dump the control flow graph of each function to a file in VCG format. The
+file name is made by appending @file{.vcg} to the source file name. Note
+that if the file contains more than one function, the generated file cannot
+be used directly by VCG@. You will need to cut and paste each function's
+graph into its own separate file first.
+
+@item ch
+@opindex fdump-tree-ch
+Dump each function after copying loop headers. The file name is made by
+appending @file{.ch} to the source file name.
+
+@item ssa
+@opindex fdump-tree-ssa
+Dump SSA related information to a file. The file name is made by appending
+@file{.ssa} to the source file name.
+
+@item salias
+@opindex fdump-tree-salias
+Dump structure aliasing variable information to a file. This file name
+is made by appending @file{.salias} to the source file name.
+
+@item alias
+@opindex fdump-tree-alias
+Dump aliasing information for each function. The file name is made by
+appending @file{.alias} to the source file name.
+
+@item ccp
+@opindex fdump-tree-ccp
+Dump each function after CCP@. The file name is made by appending
+@file{.ccp} to the source file name.
+
+@item storeccp
+@opindex fdump-tree-storeccp
+Dump each function after STORE-CCP. The file name is made by appending
+@file{.storeccp} to the source file name.
+
+@item pre
+@opindex fdump-tree-pre
+Dump trees after partial redundancy elimination. The file name is made
+by appending @file{.pre} to the source file name.
+
+@item fre
+@opindex fdump-tree-fre
+Dump trees after full redundancy elimination. The file name is made
+by appending @file{.fre} to the source file name.
+
+@item copyprop
+@opindex fdump-tree-copyprop
+Dump trees after copy propagation. The file name is made
+by appending @file{.copyprop} to the source file name.
+
+@item store_copyprop
+@opindex fdump-tree-store_copyprop
+Dump trees after store copy-propagation. The file name is made
+by appending @file{.store_copyprop} to the source file name.
+
+@item dce
+@opindex fdump-tree-dce
+Dump each function after dead code elimination. The file name is made by
+appending @file{.dce} to the source file name.
+
+@item mudflap
+@opindex fdump-tree-mudflap
+Dump each function after adding mudflap instrumentation. The file name is
+made by appending @file{.mudflap} to the source file name.
+
+@item sra
+@opindex fdump-tree-sra
+Dump each function after performing scalar replacement of aggregates. The
+file name is made by appending @file{.sra} to the source file name.
+
+@item sink
+@opindex fdump-tree-sink
+Dump each function after performing code sinking. The file name is made
+by appending @file{.sink} to the source file name.
+
+@item dom
+@opindex fdump-tree-dom
+Dump each function after applying dominator tree optimizations. The file
+name is made by appending @file{.dom} to the source file name.
+
+@item dse
+@opindex fdump-tree-dse
+Dump each function after applying dead store elimination. The file
+name is made by appending @file{.dse} to the source file name.
+
+@item phiopt
+@opindex fdump-tree-phiopt
+Dump each function after optimizing PHI nodes into straightline code. The file
+name is made by appending @file{.phiopt} to the source file name.
+
+@item forwprop
+@opindex fdump-tree-forwprop
+Dump each function after forward propagating single use variables. The file
+name is made by appending @file{.forwprop} to the source file name.
+
+@item copyrename
+@opindex fdump-tree-copyrename
+Dump each function after applying the copy rename optimization. The file
+name is made by appending @file{.copyrename} to the source file name.
+
+@item nrv
+@opindex fdump-tree-nrv
+Dump each function after applying the named return value optimization on
+generic trees. The file name is made by appending @file{.nrv} to the source
+file name.
+
+@item vect
+@opindex fdump-tree-vect
+Dump each function after applying vectorization of loops. The file name is
+made by appending @file{.vect} to the source file name.
+
+@item vrp
+@opindex fdump-tree-vrp
+Dump each function after Value Range Propagation (VRP). The file name
+is made by appending @file{.vrp} to the source file name.
+
+@item all
+@opindex fdump-tree-all
+Enable all the available tree dumps with the flags provided in this option.
@end table
+@item -ftree-vectorizer-verbose=@var{n}
+@opindex ftree-vectorizer-verbose
+This option controls the amount of debugging output the vectorizer prints.
+This information is written to standard error, unless
+@option{-fdump-tree-all} or @option{-fdump-tree-vect} is specified,
+in which case it is output to the usual dump listing file, @file{.vect}.
+For @var{n}=0 no diagnostic information is reported.
+If @var{n}=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If @var{n}=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) - i.e. countable,
+inner-most, single-bb, single-entry/exit loops. This is the same verbosity
+level that @option{-fdump-tree-vect-stats} uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If @var{n}=3, alignment related information is added to the reports.
+If @var{n}=4, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If @var{n}=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e. may not be countable, or
+may have complicated control-flow).
+If @var{n}=6, the vectorizer reports also non-vectorized nested loops.
+For @var{n}=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that @option{-fdump-tree-vect-details} uses.
+
@item -frandom-seed=@var{string}
@opindex frandom-string
This option provides a seed that GCC uses when it would otherwise use
random numbers. It is used to generate certain symbol names
-that have to be different in every compiled file. It is also used to
+that have to be different in every compiled file. It is also used to
place unique stamps in coverage data files and the object files that
-produce them. You can use the @option{-frandom-seed} option to produce
+produce them. You can use the @option{-frandom-seed} option to produce
reproducibly identical object files.
The @var{string} should be different for every file you compile.
@@ -3465,6 +4405,12 @@ compiling @file{foo.c} with @samp{-c -save-temps} would produce files
preprocessed @file{foo.i} output file even though the compiler now
normally uses an integrated preprocessor.
+When used in combination with the @option{-x} command line option,
+@option{-save-temps} is sensible enough to avoid over writing an
+input source file with the same extension as an intermediate file.
+The corresponding intermediate file may be obtained by renaming the
+source file before using @option{-save-temps}.
+
@item -time
@opindex time
Report the CPU time taken by each subprocess in the compilation
@@ -3476,11 +4422,21 @@ sequence. For C source files, this is the compiler proper and assembler
# as 0.00 0.01
@end smallexample
-The first number on each line is the ``user time,'' that is time spent
-executing the program itself. The second number is ``system time,''
+The first number on each line is the ``user time'', that is time spent
+executing the program itself. The second number is ``system time'',
time spent executing operating system routines on behalf of the program.
Both numbers are in seconds.
+@item -fvar-tracking
+@opindex fvar-tracking
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+
+It is enabled by default when compiling with optimization (@option{-Os},
+@option{-O}, @option{-O2}, ...), debugging information (@option{-g}) and
+the debug info format supports it.
+
@item -print-file-name=@var{library}
@opindex print-file-name
Print the full absolute name of the library file @var{library} that
@@ -3527,7 +4483,7 @@ This is useful when @command{gcc} prints the error message
To resolve this you either need to put @file{cpp0} and the other compiler
components where @command{gcc} expects to find them, or you can set the environment
variable @env{GCC_EXEC_PREFIX} to the directory where you installed them.
-Don't forget the trailing '/'.
+Don't forget the trailing @samp{/}.
@xref{Environment Variables}.
@item -dumpmachine
@@ -3578,10 +4534,11 @@ the performance and/or code size at the expense of compilation time
and possibly the ability to debug the program.
The compiler performs optimization based on the knowledge it has of
-the program. Using the @option{-funit-at-a-time} flag will allow the
-compiler to consider information gained from later functions in the
-file when compiling a function. Compiling multiple files at once to a
-single output file (and using @option{-funit-at-a-time}) will allow
+the program. Optimization levels @option{-O} and above, in
+particular, enable @emph{unit-at-a-time} mode, which allows the
+compiler to consider information gained from later functions in
+the file when compiling a function. Compiling multiple files at
+once to a single output file in @emph{unit-at-a-time} mode allows
the compiler to use information gained from all of the files when
compiling each of them.
@@ -3602,14 +4559,23 @@ compilation time.
@option{-O} turns on the following optimization flags:
@gccoptlist{-fdefer-pop @gol
--fmerge-constants @gol
--fthread-jumps @gol
--floop-optimize @gol
--fif-conversion @gol
--fif-conversion2 @gol
-fdelayed-branch @gol
-fguess-branch-probability @gol
--fcprop-registers}
+-fcprop-registers @gol
+-fif-conversion @gol
+-fif-conversion2 @gol
+-ftree-ccp @gol
+-ftree-dce @gol
+-ftree-dominator-opts @gol
+-ftree-dse @gol
+-ftree-ter @gol
+-ftree-lrs @gol
+-ftree-sra @gol
+-ftree-copyrename @gol
+-ftree-fre @gol
+-ftree-ch @gol
+-funit-at-a-time @gol
+-fmerge-constants}
@option{-O} also turns on @option{-fomit-frame-pointer} on machines
where doing so does not interfere with debugging.
@@ -3624,35 +4590,38 @@ and the performance of the generated code.
@option{-O2} turns on all optimization flags specified by @option{-O}. It
also turns on the following optimization flags:
-@gccoptlist{-fforce-mem @gol
+@gccoptlist{-fthread-jumps @gol
+-fcrossjumping @gol
-foptimize-sibling-calls @gol
--fstrength-reduce @gol
-fcse-follow-jumps -fcse-skip-blocks @gol
--frerun-cse-after-loop -frerun-loop-opt @gol
--fgcse -fgcse-lm -fgcse-sm -fgcse-las @gol
--fdelete-null-pointer-checks @gol
+-fgcse -fgcse-lm @gol
-fexpensive-optimizations @gol
--fregmove @gol
--fschedule-insns -fschedule-insns2 @gol
--fsched-interblock -fsched-spec @gol
+-frerun-cse-after-loop @gol
-fcaller-saves @gol
-fpeephole2 @gol
+-fschedule-insns -fschedule-insns2 @gol
+-fsched-interblock -fsched-spec @gol
+-fregmove @gol
+-fstrict-aliasing -fstrict-overflow @gol
+-fdelete-null-pointer-checks @gol
-freorder-blocks -freorder-functions @gol
--fstrict-aliasing @gol
--funit-at-a-time @gol
-falign-functions -falign-jumps @gol
-falign-loops -falign-labels @gol
--fcrossjumping}
+-ftree-vrp @gol
+-ftree-pre}
Please note the warning under @option{-fgcse} about
invoking @option{-O2} on programs that use computed gotos.
+@option{-O2} doesn't turn on @option{-ftree-vrp} for the Ada compiler.
+This option must be explicitly specified on the command line to be
+enabled for the Ada compiler.
+
@item -O3
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified by
@option{-O2} and also turns on the @option{-finline-functions},
-@option{-fweb}, @option{-frename-registers} and @option{-funswitch-loops}
-options.
+@option{-funswitch-loops} and @option{-fgcse-after-reload} options.
@item -O0
@opindex O0
@@ -3666,7 +4635,8 @@ optimizations designed to reduce code size.
@option{-Os} disables the following optimization flags:
@gccoptlist{-falign-functions -falign-jumps -falign-loops @gol
--falign-labels -freorder-blocks -fprefetch-loop-arrays}
+-falign-labels -freorder-blocks -freorder-blocks-and-partition @gol
+-fprefetch-loop-arrays -ftree-vect-loop-version}
If you use multiple @option{-O} options, with or without level numbers,
the last such option is the one that is effective.
@@ -3708,15 +4678,12 @@ Force memory operands to be copied into registers before doing
arithmetic on them. This produces better code by making all memory
references potential common subexpressions. When they are not common
subexpressions, instruction combination should eliminate the separate
-register-load.
-
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+register-load. This option is now a nop and will be removed in 4.3.
@item -fforce-addr
@opindex fforce-addr
Force memory address constants to be copied into registers before
-doing arithmetic on them. This may produce better code just as
-@option{-fforce-mem} may.
+doing arithmetic on them.
@item -fomit-frame-pointer
@opindex fomit-frame-pointer
@@ -3759,6 +4726,25 @@ assembler code in its own right.
Enabled at level @option{-O3}.
+@item -finline-functions-called-once
+@opindex finline-functions-called-once
+Consider all @code{static} functions called once for inlining into their
+caller even if they are not marked @code{inline}. If a call to a given
+function is integrated, then the function is not output as assembler code
+in its own right.
+
+Enabled if @option{-funit-at-a-time} is enabled.
+
+@item -fearly-inlining
+@opindex fearly-inlining
+Inline functions marked by @code{always_inline} and functions whose body seems
+smaller than the function call overhead early before doing
+@option{-fprofile-generate} instrumentation and real inlining pass. Doing so
+makes profiling significantly cheaper and usually inlining faster on programs
+having large chains of nested wrapper functions.
+
+Enabled by default.
+
@item -finline-limit=@var{n}
@opindex finline-limit
By default, GCC limits the size of functions that can be inlined. This flag
@@ -3779,30 +4765,31 @@ The @option{-finline-limit=@var{n}} option sets some of these parameters
as follows:
@table @gcctabopt
- @item max-inline-insns-single
- is set to @var{n}/2.
- @item max-inline-insns-auto
- is set to @var{n}/2.
- @item min-inline-insns
- is set to 130 or @var{n}/4, whichever is smaller.
- @item max-inline-insns-rtl
- is set to @var{n}.
+@item max-inline-insns-single
+ is set to @var{n}/2.
+@item max-inline-insns-auto
+ is set to @var{n}/2.
+@item min-inline-insns
+ is set to 130 or @var{n}/4, whichever is smaller.
+@item max-inline-insns-rtl
+ is set to @var{n}.
@end table
See below for a documentation of the individual
parameters controlling inlining.
@emph{Note:} pseudo instruction represents, in this particular context, an
-abstract measurement of function's size. In no way, it represents a count
+abstract measurement of function's size. In no way does it represent a count
of assembly instructions and as such its exact meaning might change from one
release to an another.
@item -fkeep-inline-functions
@opindex fkeep-inline-functions
-Even if all calls to a given function are integrated, and the function
-is declared @code{static}, nevertheless output a separate run-time
-callable version of the function. This switch does not affect
-@code{extern inline} functions.
+In C, emit @code{static} functions that are declared @code{inline}
+into the object file, even if the function has been inlined into all
+of its callers. This switch does not affect functions using the
+@code{extern inline} extension in GNU C@. In C++, emit any and all
+inline functions into the object file.
@item -fkeep-static-consts
@opindex fkeep-static-consts
@@ -3827,17 +4814,17 @@ Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
Attempt to merge identical constants and identical variables.
This option implies @option{-fmerge-constants}. In addition to
-@option{-fmerge-constants} this considers e.g. even constant initialized
+@option{-fmerge-constants} this considers e.g.@: even constant initialized
arrays or initialized constant variables with integral or floating point
types. Languages like C or C++ require each non-automatic variable to
have distinct location, so using this option will result in non-conforming
behavior.
-@item -fnew-ra
-@opindex fnew-ra
-Use a graph coloring register allocator. Currently this option is meant
-only for testing. Users should not specify this option, since it is not
-yet ready for production use.
+@item -fmodulo-sched
+@opindex fmodulo-sched
+Perform swing modulo scheduling immediately before the first scheduling
+pass. This pass looks at innermost loops and reorders their
+instructions by overlapping different iterations.
@item -fno-branch-count-reg
@opindex fno-branch-count-reg
@@ -3847,8 +4834,7 @@ register, compare it against zero, then branch based upon the result.
This option is only meaningful on architectures that support such
instructions, which include x86, PowerPC, IA-64 and S/390.
-The default is @option{-fbranch-count-reg}, enabled when
-@option{-fstrength-reduce} is enabled.
+The default is @option{-fbranch-count-reg}.
@item -fno-function-cse
@opindex fno-function-cse
@@ -3874,12 +4860,38 @@ assumptions based on that.
The default is @option{-fzero-initialized-in-bss}.
-@item -fstrength-reduce
-@opindex fstrength-reduce
-Perform the optimizations of loop strength reduction and
-elimination of iteration variables.
+@item -fbounds-check
+@opindex fbounds-check
+For front-ends that support it, generate additional code to check that
+indices used to access arrays are within the declared range. This is
+currently only supported by the Java and Fortran front-ends, where
+this option defaults to true and false respectively.
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+@item -fmudflap -fmudflapth -fmudflapir
+@opindex fmudflap
+@opindex fmudflapth
+@opindex fmudflapir
+@cindex bounds checking
+@cindex mudflap
+For front-ends that support it (C and C++), instrument all risky
+pointer/array dereferencing operations, some standard library
+string/heap functions, and some other associated constructs with
+range/validity tests. Modules so instrumented should be immune to
+buffer overflows, invalid heap use, and some other classes of C/C++
+programming errors. The instrumentation relies on a separate runtime
+library (@file{libmudflap}), which will be linked into a program if
+@option{-fmudflap} is given at link time. Run-time behavior of the
+instrumented program is controlled by the @env{MUDFLAP_OPTIONS}
+environment variable. See @code{env MUDFLAP_OPTIONS=-help a.out}
+for its options.
+
+Use @option{-fmudflapth} instead of @option{-fmudflap} to compile and to
+link if your program is multi-threaded. Use @option{-fmudflapir}, in
+addition to @option{-fmudflap} or @option{-fmudflapth}, if
+instrumentation should ignore pointer reads. This produces less
+instrumentation (and therefore faster execution) and still provides
+some protection against outright memory corrupting writes, but allows
+erroneously read data to propagate within a program.
@item -fthread-jumps
@opindex fthread-jumps
@@ -3889,7 +4901,7 @@ so, the first branch is redirected to either the destination of the
second branch or a point immediately following it, depending on whether
the condition is known to be true or false.
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -fcse-follow-jumps
@opindex fcse-follow-jumps
@@ -3918,12 +4930,6 @@ performed.
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-@item -frerun-loop-opt
-@opindex frerun-loop-opt
-Run the loop optimizer twice.
-
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-
@item -fgcse
@opindex fgcse
Perform a global common subexpression elimination pass.
@@ -3953,7 +4959,7 @@ stores out of loops. When used in conjunction with @option{-fgcse-lm},
loops containing a load/store sequence can be changed to a load before
the loop and a store after the loop.
-Enabled by default when gcse is enabled.
+Not enabled at any optimization level.
@item -fgcse-las
@opindex fgcse-las
@@ -3961,22 +4967,29 @@ When @option{-fgcse-las} is enabled, the global common subexpression
elimination pass eliminates redundant loads that come after stores to the
same memory location (both partial and full redundancies).
-Enabled by default when gcse is enabled.
+Not enabled at any optimization level.
-@item -floop-optimize
-@opindex floop-optimize
-Perform loop optimizations: move constant expressions out of loops, simplify
-exit test conditions and optionally do strength-reduction and loop unrolling as
-well.
+@item -fgcse-after-reload
+@opindex fgcse-after-reload
+When @option{-fgcse-after-reload} is enabled, a redundant load elimination
+pass is performed after reload. The purpose of this pass is to cleanup
+redundant spilling.
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+@item -funsafe-loop-optimizations
+@opindex funsafe-loop-optimizations
+If given, the loop optimizer will assume that loop indices do not
+overflow, and that the loops with nontrivial exit condition are not
+infinite. This enables a wider range of loop optimizations even if
+the loop optimizer itself cannot prove that these assumptions are valid.
+Using @option{-Wunsafe-loop-optimizations}, the compiler will warn you
+if it finds this kind of loop.
@item -fcrossjumping
@opindex crossjumping
-Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
+Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
resulting code may or may not perform better than without cross-jumping.
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -fif-conversion
@opindex if-conversion
@@ -4110,11 +5123,22 @@ size of superblocks using tracer pass. See @option{-ftracer} for details on
trace formation.
This mode should produce faster but significantly longer programs. Also
-without @code{-fbranch-probabilities} the traces constructed may not match the
-reality and hurt the performance. This only makes
+without @option{-fbranch-probabilities} the traces constructed may not
+match the reality and hurt the performance. This only makes
sense when scheduling after register allocation, i.e.@: with
@option{-fschedule-insns2} or at @option{-O2} or higher.
+@item -fsee
+@opindex fsee
+Eliminates redundant extension instructions and move the non redundant
+ones to optimal placement using LCM.
+
+@item -freschedule-modulo-scheduled-loops
+@opindex fscheduling-in-modulo-scheduled-loops
+The modulo scheduling comes before the traditional scheduling, if a loop was modulo scheduled
+we may want to prevent the later scheduling passes from changing its schedule, we use this
+option to control that.
+
@item -fcaller-saves
@opindex fcaller-saves
Enable values to be allocated in registers that will be clobbered by
@@ -4127,31 +5151,184 @@ those which have no call-preserved registers to use instead.
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-@item -fmove-all-movables
-@opindex fmove-all-movables
-Forces all invariant computations in loops to be moved
-outside the loop.
+@item -ftree-pre
+Perform Partial Redundancy Elimination (PRE) on trees. This flag is
+enabled by default at @option{-O2} and @option{-O3}.
+
+@item -ftree-fre
+Perform Full Redundancy Elimination (FRE) on trees. The difference
+between FRE and PRE is that FRE only considers expressions
+that are computed on all paths leading to the redundant computation.
+This analysis faster than PRE, though it exposes fewer redundancies.
+This flag is enabled by default at @option{-O} and higher.
+
+@item -ftree-copy-prop
+Perform copy propagation on trees. This pass eliminates unnecessary
+copy operations. This flag is enabled by default at @option{-O} and
+higher.
+
+@item -ftree-store-copy-prop
+Perform copy propagation of memory loads and stores. This pass
+eliminates unnecessary copy operations in memory references
+(structures, global variables, arrays, etc). This flag is enabled by
+default at @option{-O2} and higher.
+
+@item -ftree-salias
+Perform structural alias analysis on trees. This flag
+is enabled by default at @option{-O} and higher.
+
+@item -fipa-pta
+Perform interprocedural pointer analysis.
+
+@item -ftree-sink
+Perform forward store motion on trees. This flag is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-ccp
+Perform sparse conditional constant propagation (CCP) on trees. This
+pass only operates on local scalar variables and is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-store-ccp
+Perform sparse conditional constant propagation (CCP) on trees. This
+pass operates on both local scalar variables and memory stores and
+loads (global variables, structures, arrays, etc). This flag is
+enabled by default at @option{-O2} and higher.
+
+@item -ftree-dce
+Perform dead code elimination (DCE) on trees. This flag is enabled by
+default at @option{-O} and higher.
+
+@item -ftree-dominator-opts
+Perform a variety of simple scalar cleanups (constant/copy
+propagation, redundancy elimination, range propagation and expression
+simplification) based on a dominator tree traversal. This also
+performs jump threading (to reduce jumps to jumps). This flag is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-ch
+Perform loop header copying on trees. This is beneficial since it increases
+effectiveness of code motion optimizations. It also saves one jump. This flag
+is enabled by default at @option{-O} and higher. It is not enabled
+for @option{-Os}, since it usually increases code size.
+
+@item -ftree-loop-optimize
+Perform loop optimizations on trees. This flag is enabled by default
+at @option{-O} and higher.
+
+@item -ftree-loop-linear
+Perform linear loop transformations on tree. This flag can improve cache
+performance and allow further loop optimizations to take place.
+
+@item -ftree-loop-im
+Perform loop invariant motion on trees. This pass moves only invariants that
+would be hard to handle at RTL level (function calls, operations that expand to
+nontrivial sequences of insns). With @option{-funswitch-loops} it also moves
+operands of conditions that are invariant out of the loop, so that we can use
+just trivial invariantness analysis in loop unswitching. The pass also includes
+store motion.
+
+@item -ftree-loop-ivcanon
+Create a canonical counter for number of iterations in the loop for that
+determining number of iterations requires complicated analysis. Later
+optimizations then may determine the number easily. Useful especially
+in connection with unrolling.
+
+@item -fivopts
+Perform induction variable optimizations (strength reduction, induction
+variable merging and induction variable elimination) on trees.
+
+@item -ftree-sra
+Perform scalar replacement of aggregates. This pass replaces structure
+references with scalars to prevent committing structures to memory too
+early. This flag is enabled by default at @option{-O} and higher.
+
+@item -ftree-copyrename
+Perform copy renaming on trees. This pass attempts to rename compiler
+temporaries to other variables at copy locations, usually resulting in
+variable names which more closely resemble the original variables. This flag
+is enabled by default at @option{-O} and higher.
+
+@item -ftree-ter
+Perform temporary expression replacement during the SSA->normal phase. Single
+use/single def temporaries are replaced at their use location with their
+defining expression. This results in non-GIMPLE code, but gives the expanders
+much more complex trees to work on resulting in better RTL generation. This is
+enabled by default at @option{-O} and higher.
+
+@item -ftree-lrs
+Perform live range splitting during the SSA->normal phase. Distinct live
+ranges of a variable are split into unique variables, allowing for better
+optimization later. This is enabled by default at @option{-O} and higher.
+
+@item -ftree-vectorize
+Perform loop vectorization on trees.
+
+@item -ftree-vect-loop-version
+@opindex ftree-vect-loop-version
+Perform loop versioning when doing loop vectorization on trees. When a loop
+appears to be vectorizable except that data alignment or data dependence cannot
+be determined at compile time then vectorized and non-vectorized versions of
+the loop are generated along with runtime checks for alignment or dependence
+to control which version is executed. This option is enabled by default
+except at level @option{-Os} where it is disabled.
+
+@item -ftree-vrp
+Perform Value Range Propagation on trees. This is similar to the
+constant propagation pass, but instead of values, ranges of values are
+propagated. This allows the optimizers to remove unnecessary range
+checks like array bound checks and null pointer checks. This is
+enabled by default at @option{-O2} and higher. Null pointer check
+elimination is only done if @option{-fdelete-null-pointer-checks} is
+enabled.
-@item -freduce-all-givs
-@opindex freduce-all-givs
-Forces all general-induction variables in loops to be
-strength-reduced.
+@item -ftracer
+@opindex ftracer
+Perform tail duplication to enlarge superblock size. This transformation
+simplifies the control flow of the function allowing other optimizations to do
+better job.
-@emph{Note:} When compiling programs written in Fortran,
-@option{-fmove-all-movables} and @option{-freduce-all-givs} are enabled
-by default when you use the optimizer.
+@item -funroll-loops
+@opindex funroll-loops
+Unroll loops whose number of iterations can be determined at compile
+time or upon entry to the loop. @option{-funroll-loops} implies
+@option{-frerun-cse-after-loop}. This option makes code larger,
+and may or may not make it run faster.
-These options may generate better or worse code; results are highly
-dependent on the structure of loops within the source code.
+@item -funroll-all-loops
+@opindex funroll-all-loops
+Unroll all loops, even if their number of iterations is uncertain when
+the loop is entered. This usually makes programs run more slowly.
+@option{-funroll-all-loops} implies the same options as
+@option{-funroll-loops},
+
+@item -fsplit-ivs-in-unroller
+@opindex fsplit-ivs-in-unroller
+Enables expressing of values of induction variables in later iterations
+of the unrolled loop using the value in the first iteration. This breaks
+long dependency chains, thus improving efficiency of the scheduling passes.
+
+Combination of @option{-fweb} and CSE is often sufficient to obtain the
+same effect. However in cases the loop body is more complicated than
+a single basic block, this is not reliable. It also does not work at all
+on some of the architectures due to restrictions in the CSE pass.
+
+This optimization is enabled by default.
+
+@item -fvariable-expansion-in-unroller
+@opindex fvariable-expansion-in-unroller
+With this option, the compiler will create multiple copies of some
+local variables when unrolling a loop which can result in superior code.
+
+@item -fprefetch-loop-arrays
+@opindex fprefetch-loop-arrays
+If supported by the target machine, generate instructions to prefetch
+memory to improve the performance of loops that access large arrays.
-These two options are intended to be removed someday, once
-they have helped determine the efficacy of various
-approaches to improving loop optimizations.
+This option may generate better or worse code; results are highly
+dependent on the structure of loops within the source code.
-Please contact @w{@email{gcc@@gcc.gnu.org}}, and describe how use of
-these options affects the performance of your production code.
-Examples of code that runs @emph{slower} when these options are
-@emph{enabled} are very valuable.
+Disabled at level @option{-Os}.
@item -fno-peephole
@itemx -fno-peephole2
@@ -4167,19 +5344,17 @@ other, a few use both.
@item -fno-guess-branch-probability
@opindex fno-guess-branch-probability
-Do not guess branch probabilities using a randomized model.
-
-Sometimes GCC will opt to use a randomized model to guess branch
-probabilities, when none are available from either profiling feedback
-(@option{-fprofile-arcs}) or @samp{__builtin_expect}. This means that
-different runs of the compiler on the same program may produce different
-object code.
-
-In a hard real-time system, people don't want different runs of the
-compiler to produce code that has different behavior; minimizing
-non-determinism is of paramount import. This switch allows users to
-reduce non-determinism, possibly at the expense of inferior
-optimization.
+Do not guess branch probabilities using heuristics.
+
+GCC will use heuristics to guess branch probabilities if they are
+not provided by profiling feedback (@option{-fprofile-arcs}). These
+heuristics are based on the control flow graph. If some branch probabilities
+are specified by @samp{__builtin_expect}, then the heuristics will be
+used to guess branch probabilities for the rest of the control flow graph,
+taking the @samp{__builtin_expect} info into account. The interactions
+between the heuristics and @samp{__builtin_expect} can be complex, and in
+some cases, it may be useful to disable the heuristics so that the effects
+of @samp{__builtin_expect} are easier to understand.
The default is @option{-fguess-branch-probability} at levels
@option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
@@ -4191,10 +5366,22 @@ taken branches and improve code locality.
Enabled at levels @option{-O2}, @option{-O3}.
+@item -freorder-blocks-and-partition
+@opindex freorder-blocks-and-partition
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+
+This optimization is automatically turned off in the presence of
+exception handling, for linkonce sections, for functions with a user-defined
+section attribute and on any architecture that does not support named
+sections.
+
@item -freorder-functions
@opindex freorder-functions
-Reorder basic blocks in the compiled function in order to reduce number of
-taken branches and improve code locality. This is implemented by using special
+Reorder functions in the object file in order to
+improve code locality. This is implemented by using special
subsections @code{.text.hot} for most frequently executed functions and
@code{.text.unlikely} for unlikely executed functions. Reordering is done by
the linker so object file format must support named sections and linker must
@@ -4252,6 +5439,32 @@ allowed to alias. For an example, see the C front-end function
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+@item -fstrict-overflow
+@opindex fstrict-overflow
+Allow the compiler to assume strict signed overflow rules, depending
+on the language being compiled. For C (and C++) this means that
+overflow when doing arithmetic with signed numbers is undefined, which
+means that the compiler may assume that it will not happen. This
+permits various optimizations. For example, the compiler will assume
+that an expression like @code{i + 10 > i} will always be true for
+signed @code{i}. This assumption is only valid if signed overflow is
+undefined, as the expression is false if @code{i + 10} overflows when
+using twos complement arithmetic. When this option is in effect any
+attempt to determine whether an operation on signed numbers will
+overflow must be written carefully to not actually involve overflow.
+
+See also the @option{-fwrapv} option. Using @option{-fwrapv} means
+that signed overflow is fully defined: it wraps. When
+@option{-fwrapv} is used, there is no difference between
+@option{-fstrict-overflow} and @option{-fno-strict-overflow}. With
+@option{-fwrapv} certain types of overflow are permitted. For
+example, if the compiler gets an overflow when doing arithmetic on
+constants, the overflowed value can still be used with
+@option{-fwrapv}, but not otherwise.
+
+The @option{-fstrict-overflow} option is enabled at levels
+@option{-O2}, @option{-O3}, @option{-Os}.
+
@item -falign-functions
@itemx -falign-functions=@var{n}
@opindex falign-functions
@@ -4320,13 +5533,49 @@ If @var{n} is not specified or is zero, use a machine-dependent default.
Enabled at levels @option{-O2}, @option{-O3}.
-@item -frename-registers
-@opindex frename-registers
-Attempt to avoid false dependencies in scheduled code by making use
-of registers left over after register allocation. This optimization
-will most benefit processors with lots of registers. It can, however,
-make debugging impossible, since variables will no longer stay in
-a ``home register''.
+@item -funit-at-a-time
+@opindex funit-at-a-time
+Parse the whole compilation unit before starting to produce code.
+This allows some extra optimizations to take place but consumes
+more memory (in general). There are some compatibility issues
+with @emph{unit-at-a-time} mode:
+@itemize @bullet
+@item
+enabling @emph{unit-at-a-time} mode may change the order
+in which functions, variables, and top-level @code{asm} statements
+are emitted, and will likely break code relying on some particular
+ordering. The majority of such top-level @code{asm} statements,
+though, can be replaced by @code{section} attributes. The
+@option{fno-toplevel-reorder} option may be used to keep the ordering
+used in the input file, at the cost of some optimizations.
+
+@item
+@emph{unit-at-a-time} mode removes unreferenced static variables
+and functions. This may result in undefined references
+when an @code{asm} statement refers directly to variables or functions
+that are otherwise unused. In that case either the variable/function
+shall be listed as an operand of the @code{asm} statement operand or,
+in the case of top-level @code{asm} statements the attribute @code{used}
+shall be used on the declaration.
+
+@item
+Static functions now can use non-standard passing conventions that
+may break @code{asm} statements calling functions directly. Again,
+attribute @code{used} will prevent this behavior.
+@end itemize
+
+As a temporary workaround, @option{-fno-unit-at-a-time} can be used,
+but this scheme may not be supported by future releases of GCC@.
+
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+
+@item -fno-toplevel-reorder
+Do not reorder top-level functions, variables, and @code{asm}
+statements. Output them in the same order that they appear in the
+input file. When this option is used, unreferenced static variables
+will not be removed. This option is intended to support existing code
+which relies on a particular ordering. For new code, it is better to
+use attributes.
@item -fweb
@opindex fweb
@@ -4337,7 +5586,20 @@ passes, such as CSE, loop optimizer and trivial dead code remover. It can,
however, make debugging impossible, since variables will no longer stay in a
``home register''.
-Enabled at levels @option{-O3}.
+Enabled by default with @option{-funroll-loops}.
+
+@item -fwhole-program
+@opindex fwhole-program
+Assume that the current compilation unit represents whole program being
+compiled. All public functions and variables with the exception of @code{main}
+and those merged by attribute @code{externally_visible} become static functions
+and in a affect gets more aggressively optimized by interprocedural optimizers.
+While this option is equivalent to proper use of @code{static} keyword for
+programs consisting of single file, in combination with option
+@option{--combine} this flag can be used to compile most of smaller scale C
+programs since the functions and variables become local for the whole combined
+compilation unit, not for the single source file itself.
+
@item -fno-cprop-registers
@opindex fno-cprop-registers
@@ -4352,7 +5614,7 @@ Disabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
Enable options usually used for instrumenting application to produce
profile useful for later recompilation with profile feedback based
-optimization. You must use @code{-fprofile-generate} both when
+optimization. You must use @option{-fprofile-generate} both when
compiling and when linking your program.
The following options are enabled: @code{-fprofile-arcs}, @code{-fprofile-values}, @code{-fvpt}.
@@ -4362,8 +5624,8 @@ The following options are enabled: @code{-fprofile-arcs}, @code{-fprofile-values
Enable profile feedback directed optimizations, and optimizations
generally profitable only with profile feedback available.
-The following options are enabled: @code{-fbranch-probabilities},
-@code{-fvpt}, @code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer}.
+The following options are enabled: @code{-fbranch-probabilities}, @code{-fvpt},
+@code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer}
@end table
@@ -4391,7 +5653,8 @@ them to store all pertinent intermediate computations into variables.
@opindex ffast-math
Sets @option{-fno-math-errno}, @option{-funsafe-math-optimizations}, @*
@option{-fno-trapping-math}, @option{-ffinite-math-only},
-@option{-fno-rounding-math} and @option{-fno-signaling-nans}.
+@option{-fno-rounding-math}, @option{-fno-signaling-nans}
+and @option{fcx-limited-range}.
This option causes the preprocessor macro @code{__FAST_MATH__} to be defined.
@@ -4414,6 +5677,10 @@ math functions.
The default is @option{-fmath-errno}.
+On Darwin systems, the math library never sets @code{errno}. There is therefore
+no reason for the compiler to consider the possibility that it might,
+and @option{-fno-math-errno} is the default.
+
@item -funsafe-math-optimizations
@opindex funsafe-math-optimizations
Allow optimizations for floating-point arithmetic that (a) assume
@@ -4475,6 +5742,14 @@ Future versions of GCC may provide finer control of this setting
using C99's @code{FENV_ACCESS} pragma. This command line option
will be used to specify the default state for @code{FENV_ACCESS}.
+@item -frtl-abstract-sequences
+@opindex frtl-abstract-sequences
+It is a size optimization method. This option is to find identical
+sequences of code, which can be turned into pseudo-procedures and
+then replace all occurrences with calls to the newly created
+subroutine. It is kind of an opposite of @option{-finline-functions}.
+This optimization runs at RTL level.
+
@item -fsignaling-nans
@opindex fsignaling-nans
Compile code assuming that IEEE signaling NaNs may generate user-visible
@@ -4495,6 +5770,17 @@ disable all GCC optimizations that affect signaling NaN behavior.
Treat floating point constant as single precision constant instead of
implicitly converting it to double precision constant.
+@item -fcx-limited-range
+@itemx -fno-cx-limited-range
+@opindex fcx-limited-range
+@opindex fno-cx-limited-range
+When enabled, this option states that a range reduction step is not
+needed when performing complex division. The default is
+@option{-fno-cx-limited-range}, but is enabled by @option{-ffast-math}.
+
+This option controls the default setting of the ISO C99
+@code{CX_LIMITED_RANGE} pragma. Nevertheless, the option applies to
+all languages.
@end table
@@ -4532,6 +5818,8 @@ With @option{-fbranch-probabilities}, it reads back the data gathered
from profiling values of expressions and adds @samp{REG_VALUE_PROFILE}
notes to instructions for their later usage in optimizations.
+Enabled with @option{-fprofile-generate} and @option{-fprofile-use}.
+
@item -fvpt
@opindex fvpt
If combined with @option{-fprofile-arcs}, it instructs the compiler to add
@@ -4542,31 +5830,35 @@ and actually performs the optimizations based on them.
Currently the optimizations include specialization of division operation
using the knowledge about the value of the denominator.
-@item -fnew-ra
-@opindex fnew-ra
-Use a graph coloring register allocator. Currently this option is meant
-for testing, so we are interested to hear about miscompilations with
-@option{-fnew-ra}.
+@item -frename-registers
+@opindex frename-registers
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a ``home register''.
+
+Enabled by default with @option{-funroll-loops}.
@item -ftracer
@opindex ftracer
-Perform tail duplication to enlarge superblock size. This transformation
+Perform tail duplication to enlarge superblock size. This transformation
simplifies the control flow of the function allowing other optimizations to do
better job.
-@item -funit-at-a-time
-@opindex funit-at-a-time
-Parse the whole compilation unit before starting to produce code.
-This allows some extra optimizations to take place but consumes more
-memory.
+Enabled with @option{-fprofile-use}.
@item -funroll-loops
@opindex funroll-loops
Unroll loops whose number of iterations can be determined at compile time or
upon entry to the loop. @option{-funroll-loops} implies
-@option{-frerun-cse-after-loop}. It also turns on complete loop peeling
-(i.e. complete removal of loops with small constant number of iterations).
-This option makes code larger, and may or may not make it run faster.
+@option{-frerun-cse-after-loop}, @option{-fweb} and @option{-frename-registers}.
+It also turns on complete loop peeling (i.e.@: complete removal of loops with
+small constant number of iterations). This option makes code larger, and may
+or may not make it run faster.
+
+Enabled with @option{-fprofile-use}.
@item -funroll-all-loops
@opindex funroll-all-loops
@@ -4579,46 +5871,20 @@ the loop is entered. This usually makes programs run more slowly.
@opindex fpeel-loops
Peels the loops for that there is enough information that they do not
roll much (from profile feedback). It also turns on complete loop peeling
-(i.e. complete removal of loops with small constant number of iterations).
+(i.e.@: complete removal of loops with small constant number of iterations).
-@item -funswitch-loops
-@opindex funswitch-loops
-Move branches with loop invariant conditions out of the loop, with duplicates
-of the loop on both branches (modified according to result of the condition).
-
-@item -fold-unroll-loops
-@opindex fold-unroll-loops
-Unroll loops whose number of iterations can be determined at compile
-time or upon entry to the loop, using the old loop unroller whose loop
-recognition is based on notes from frontend. @option{-fold-unroll-loops} implies
-both @option{-fstrength-reduce} and @option{-frerun-cse-after-loop}. This
-option makes code larger, and may or may not make it run faster.
-
-@item -fold-unroll-all-loops
-@opindex fold-unroll-all-loops
-Unroll all loops, even if their number of iterations is uncertain when
-the loop is entered. This is done using the old loop unroller whose loop
-recognition is based on notes from frontend. This usually makes programs run more slowly.
-@option{-fold-unroll-all-loops} implies the same options as
-@option{-fold-unroll-loops}.
+Enabled with @option{-fprofile-use}.
-@item -funswitch-loops
-@opindex funswitch-loops
-Move branches with loop invariant conditions out of the loop, with duplicates
-of the loop on both branches (modified according to result of the condition).
+@item -fmove-loop-invariants
+@opindex fmove-loop-invariants
+Enables the loop invariant motion pass in the RTL loop optimizer. Enabled
+at level @option{-O1}
@item -funswitch-loops
@opindex funswitch-loops
Move branches with loop invariant conditions out of the loop, with duplicates
of the loop on both branches (modified according to result of the condition).
-@item -fprefetch-loop-arrays
-@opindex fprefetch-loop-arrays
-If supported by the target machine, generate instructions to prefetch
-memory to improve the performance of loops that access large arrays.
-
-Disabled at level @option{-Os}.
-
@item -ffunction-sections
@itemx -fdata-sections
@opindex ffunction-sections
@@ -4654,6 +5920,51 @@ a separate optimization pass.
Perform branch target register load optimization after prologue / epilogue
threading.
+@item -fbtr-bb-exclusive
+@opindex fbtr-bb-exclusive
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
+
+@item -fstack-protector
+Emit extra code to check for buffer overflows, such as stack smashing
+attacks. This is done by adding a guard variable to functions with
+vulnerable objects. This includes functions that call alloca, and
+functions with buffers larger than 8 bytes. The guards are initialized
+when a function is entered and then checked when the function exits.
+If a guard check fails, an error message is printed and the program exits.
+
+@item -fstack-protector-all
+Like @option{-fstack-protector} except that all functions are protected.
+
+@item -fsection-anchors
+@opindex fsection-anchors
+Try to reduce the number of symbolic address calculations by using
+shared ``anchor'' symbols to address nearby objects. This transformation
+can help to reduce the number of GOT entries and GOT accesses on some
+targets.
+
+For example, the implementation of the following function @code{foo}:
+
+@smallexample
+static int a, b, c;
+int foo (void) @{ return a + b + c; @}
+@end smallexample
+
+would usually calculate the addresses of all three variables, but if you
+compile it with @option{-fsection-anchors}, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+
+@smallexample
+int foo (void)
+@{
+ register int *xr = &x;
+ return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+@}
+@end smallexample
+
+Not all targets support this option.
+
@item --param @var{name}=@var{value}
@opindex param
In some places, GCC uses various constants to control the amount of
@@ -4670,6 +5981,28 @@ In each case, the @var{value} is an integer. The allowable choices for
@var{name} are given in the following table:
@table @gcctabopt
+@item salias-max-implicit-fields
+The maximum number of fields in a variable without direct
+structure accesses for which structure aliasing will consider trying
+to track each field. The default is 5
+
+@item salias-max-array-elements
+The maximum number of elements an array can have and its elements
+still be tracked individually by structure aliasing. The default is 4
+
+@item sra-max-structure-size
+The maximum structure size, in bytes, at which the scalar replacement
+of aggregates (SRA) optimization will perform block copies. The
+default value, 0, implies that GCC will select the most appropriate
+size itself.
+
+@item sra-field-structure-ratio
+The threshold ratio (as a percentage) between instantiated fields and
+the complete structure size. We say that if the ratio of the number
+of bytes in instantiated fields to the number of bytes in the complete
+structure exceeds this parameter, then block copies are not used. The
+default is 75.
+
@item max-crossjump-edges
The maximum number of incoming edges to consider for crossjumping.
The algorithm used by @option{-fcrossjumping} is @math{O(N^2)} in
@@ -4677,6 +6010,25 @@ the number of edges incoming to each block. Increasing values mean
more aggressive optimization, making the compile time increase with
probably small improvement in executable size.
+@item min-crossjump-insns
+The minimum number of instructions which must be matched at the end
+of two blocks before crossjumping will be performed on them. This
+value is ignored in the case where all instructions in the block being
+crossjumped from are matched. The default value is 5.
+
+@item max-grow-copy-bb-insns
+The maximum code size expansion factor when copying basic blocks
+instead of jumping. The expansion is relative to a jump instruction.
+The default value is 8.
+
+@item max-goto-duplication-insns
+The maximum number of instructions to duplicate to a block that jumps
+to a computed goto. To avoid @math{O(N^2)} behavior in a number of
+passes, GCC factors computed gotos early in the compilation process,
+and unfactors them as late as possible. Only computed jumps at the
+end of a basic blocks with no more than max-goto-duplication-insns are
+unfactored. The default value is 8.
+
@item max-delay-slot-insn-search
The maximum number of instructions to consider when looking for an
instruction to fill a delay slot. If more than this arbitrary number of
@@ -4700,7 +6052,7 @@ optimization. If more memory than specified is required, the
optimization will not be done.
@item max-gcse-passes
-The maximum number of passes of GCSE to run.
+The maximum number of passes of GCSE to run. The default is 1.
@item max-pending-list-length
The maximum number of pending dependencies scheduling will allow
@@ -4714,7 +6066,7 @@ This number sets the maximum number of instructions (counted in GCC's
internal representation) in a single function that the tree inliner
will consider for inlining. This only affects functions declared
inline and methods implemented in a class declaration (C++).
-The default value is 500.
+The default value is 450.
@item max-inline-insns-auto
When you use @option{-finline-functions} (included in @option{-O3}),
@@ -4722,31 +6074,81 @@ a lot of functions that would otherwise not be considered for inlining
by the compiler will be investigated. To those functions, a different
(more restrictive) limit compared to functions declared inline can
be applied.
-The default value is 100.
+The default value is 90.
@item large-function-insns
-The limit specifying really large functions. For functions greater than this
-limit inlining is constrained by @option{--param large-function-growth}.
-This parameter is useful primarily to avoid extreme compilation time caused by non-linear
-algorithms used by the backend.
+The limit specifying really large functions. For functions larger than this
+limit after inlining inlining is constrained by
+@option{--param large-function-growth}. This parameter is useful primarily
+to avoid extreme compilation time caused by non-linear algorithms used by the
+backend.
This parameter is ignored when @option{-funit-at-a-time} is not used.
-The default value is 3000.
+The default value is 2700.
@item large-function-growth
Specifies maximal growth of large function caused by inlining in percents.
This parameter is ignored when @option{-funit-at-a-time} is not used.
-The default value is 200.
+The default value is 100 which limits large function growth to 2.0 times
+the original size.
+
+@item large-unit-insns
+The limit specifying large translation unit. Growth caused by inlining of
+units larger than this limit is limited by @option{--param inline-unit-growth}.
+For small units this might be too tight (consider unit consisting of function A
+that is inline and B that just calls A three time. If B is small relative to
+A, the growth of unit is 300\% and yet such inlining is very sane. For very
+large units consisting of small inlininable functions however the overall unit
+growth limit is needed to avoid exponential explosion of code size. Thus for
+smaller units, the size is increased to @option{--param large-unit-insns}
+before applying @option{--param inline-unit-growth}. The default is 10000
@item inline-unit-growth
Specifies maximal overall growth of the compilation unit caused by inlining.
This parameter is ignored when @option{-funit-at-a-time} is not used.
-The default value is 150.
+The default value is 50 which limits unit growth to 1.5 times the original
+size.
-@item max-inline-insns-rtl
-For languages that use the RTL inliner (this happens at a later stage
-than tree inlining), you can set the maximum allowable size (counted
-in RTL instructions) for the RTL inliner with this parameter.
-The default value is 600.
+@item max-inline-insns-recursive
+@itemx max-inline-insns-recursive-auto
+Specifies maximum number of instructions out-of-line copy of self recursive inline
+function can grow into by performing recursive inlining.
+
+For functions declared inline @option{--param max-inline-insns-recursive} is
+taken into account. For function not declared inline, recursive inlining
+happens only when @option{-finline-functions} (included in @option{-O3}) is
+enabled and @option{--param max-inline-insns-recursive-auto} is used. The
+default value is 450.
+
+@item max-inline-recursive-depth
+@itemx max-inline-recursive-depth-auto
+Specifies maximum recursion depth used by the recursive inlining.
+
+For functions declared inline @option{--param max-inline-recursive-depth} is
+taken into account. For function not declared inline, recursive inlining
+happens only when @option{-finline-functions} (included in @option{-O3}) is
+enabled and @option{--param max-inline-recursive-depth-auto} is used. The
+default value is 450.
+
+@item min-inline-recursive-probability
+Recursive inlining is profitable only for function having deep recursion
+in average and can hurt for function having little recursion depth by
+increasing the prologue size or complexity of function body to other
+optimizers.
+
+When profile feedback is available (see @option{-fprofile-generate}) the actual
+recursion depth can be guessed from probability that function will recurse via
+given call expression. This parameter limits inlining only to call expression
+whose probability exceeds given threshold (in percents). The default value is
+10.
+
+@item inline-call-cost
+Specify cost of call instruction relative to simple arithmetics operations
+(having cost of 1). Increasing this cost disqualifies inlining of non-leaf
+functions and at the same time increases size of leaf function that is believed to
+reduce function size by being inlined. In effect it increases amount of
+inlining for code having large abstraction penalty (many functions that just
+pass the arguments to other functions) and decrease inlining for code with low
+abstraction penalty. The default value is 16.
@item max-unrolled-insns
The maximum number of instructions that a loop should have if that loop
@@ -4781,6 +6183,38 @@ The maximum number of insns of an unswitched loop.
@item max-unswitch-level
The maximum number of branches unswitched in a single loop.
+@item lim-expensive
+The minimum cost of an expensive expression in the loop invariant motion.
+
+@item iv-consider-all-candidates-bound
+Bound on number of candidates for induction variables below that
+all candidates are considered for each use in induction variable
+optimizations. Only the most relevant candidates are considered
+if there are more candidates, to avoid quadratic time complexity.
+
+@item iv-max-considered-uses
+The induction variable optimizations give up on loops that contain more
+induction variable uses.
+
+@item iv-always-prune-cand-set-bound
+If number of candidates in the set is smaller than this value,
+we always try to remove unnecessary ivs from the set during its
+optimization when a new iv is added to the set.
+
+@item scev-max-expr-size
+Bound on size of expressions used in the scalar evolutions analyzer.
+Large expressions slow the analyzer.
+
+@item vect-max-version-checks
+The maximum number of runtime checks that can be performed when doing
+loop versioning in the vectorizer. See option ftree-vect-loop-version
+for more information.
+
+@item max-iterations-to-track
+
+The maximum number of iterations of a loop the brute force algorithm
+for analysis of # of iterations of the loop tries to evaluate.
+
@item hot-bb-count-fraction
Select fraction of the maximal count of repetitions of basic block in program
given basic block needs to have to be considered hot.
@@ -4789,6 +6223,13 @@ given basic block needs to have to be considered hot.
Select fraction of the maximal frequency of executions of basic block in
function given basic block needs to have to be considered hot
+@item max-predicted-iterations
+The maximum number of loop iterations we predict statically. This is useful
+in cases where function contain single loop with known bound and other loop
+with unknown. We predict the known number of iterations correctly, while
+the unknown number of iterations average to roughly 10. This means that the
+loop without bounds would appear artificially cold relative to the other one.
+
@item tracer-dynamic-coverage
@itemx tracer-dynamic-coverage-feedback
@@ -4824,13 +6265,26 @@ order to make tracer effective.
@item max-cse-path-length
-Maximum number of basic blocks on path that cse considers.
+Maximum number of basic blocks on path that cse considers. The default is 10.
-@item max-last-value-rtl
+@item max-cse-insns
+The maximum instructions CSE process before flushing. The default is 1000.
+
+@item global-var-threshold
-The maximum size measured as number of RTLs that can be recorded in an
-expression in combiner for a pseudo register as last known value of that
-register. The default is 10000.
+Counts the number of function calls (@var{n}) and the number of
+call-clobbered variables (@var{v}). If @var{n}x@var{v} is larger than this limit, a
+single artificial variable will be created to represent all the
+call-clobbered variables at function call sites. This artificial
+variable will then be made to alias every call-clobbered variable.
+(done as @code{int * size_t} on the host machine; beware overflow).
+
+@item max-aliased-vops
+
+Maximum number of virtual operands allowed to represent aliases
+before triggering the alias grouping heuristic. Alias grouping
+reduces compile times and memory consumption needed for aliasing at
+the expense of precision loss in alias information.
@item ggc-min-expand
@@ -4841,8 +6295,8 @@ Tuning this may improve compilation speed; it has no effect on code
generation.
The default is 30% + 70% * (RAM/1GB) with an upper bound of 100% when
-RAM >= 1GB. If @code{getrlimit} is available, the notion of "RAM" is
-the smallest of actual RAM, RLIMIT_RSS, RLIMIT_DATA and RLIMIT_AS. If
+RAM >= 1GB@. If @code{getrlimit} is available, the notion of "RAM" is
+the smallest of actual RAM and @code{RLIMIT_DATA} or @code{RLIMIT_AS}. If
GCC is not able to calculate RAM on a particular platform, the lower
bound of 30% is used. Setting this parameter and
@option{ggc-min-heapsize} to zero causes a full collection to occur at
@@ -4857,14 +6311,14 @@ by @option{ggc-min-expand}% beyond @option{ggc-min-heapsize}. Again,
tuning this may improve compilation speed, and has no effect on code
generation.
-The default is RAM/8, with a lower bound of 4096 (four megabytes) and an
-upper bound of 131072 (128 megabytes). If @code{getrlimit} is
-available, the notion of "RAM" is the smallest of actual RAM,
-RLIMIT_RSS, RLIMIT_DATA and RLIMIT_AS. If GCC is not able to calculate
-RAM on a particular platform, the lower bound is used. Setting this
-parameter very large effectively disables garbage collection. Setting
-this parameter and @option{ggc-min-expand} to zero causes a full
-collection to occur at every opportunity.
+The default is the smaller of RAM/8, RLIMIT_RSS, or a limit which
+tries to ensure that RLIMIT_DATA or RLIMIT_AS are not exceeded, but
+with a lower bound of 4096 (four megabytes) and an upper bound of
+131072 (128 megabytes). If GCC is not able to calculate RAM on a
+particular platform, the lower bound is used. Setting this parameter
+very large effectively disables garbage collection. Setting this
+parameter and @option{ggc-min-expand} to zero causes a full collection
+to occur at every opportunity.
@item max-reload-search-insns
The maximum number of instruction reload should look backward for equivalent
@@ -4872,11 +6326,15 @@ register. Increasing values mean more aggressive optimization, making the
compile time increase with probably slightly better performance. The default
value is 100.
-@item max-cselib-memory-location
-The maximum number of memory locations cselib should take into acount.
+@item max-cselib-memory-locations
+The maximum number of memory locations cselib should take into account.
Increasing values mean more aggressive optimization, making the compile time
increase with probably slightly better performance. The default value is 500.
+@item max-flow-memory-locations
+Similar as @option{max-cselib-memory-locations} but for dataflow liveness.
+The default value is 100.
+
@item reorder-blocks-duplicate
@itemx reorder-blocks-duplicate-feedback
@@ -4889,6 +6347,75 @@ The @option{reorder-block-duplicate-feedback} is used only when profile
feedback is available and may be set to higher values than
@option{reorder-block-duplicate} since information about the hot spots is more
accurate.
+
+@item max-sched-ready-insns
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+
+@item max-sched-region-blocks
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+
+@item max-sched-region-insns
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
+
+@item min-spec-prob
+The minimum probability (in percents) of reaching a source block
+for interblock speculative scheduling. The default value is 40.
+
+@item max-sched-extend-regions-iters
+The maximum number of iterations through CFG to extend regions.
+0 - disable region extension,
+N - do at most N iterations.
+The default value is 0.
+
+@item max-sched-insn-conflict-delay
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+
+@item sched-spec-prob-cutoff
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+
+@item max-last-value-rtl
+
+The maximum size measured as number of RTLs that can be recorded in an expression
+in combiner for a pseudo register as last known value of that register. The default
+is 10000.
+
+@item integer-share-limit
+Small integer constants can use a shared data structure, reducing the
+compiler's memory usage and increasing its speed. This sets the maximum
+value of a shared integer constant's. The default value is 256.
+
+@item min-virtual-mappings
+Specifies the minimum number of virtual mappings in the incremental
+SSA updater that should be registered to trigger the virtual mappings
+heuristic defined by virtual-mappings-ratio. The default value is
+100.
+
+@item virtual-mappings-ratio
+If the number of virtual mappings is virtual-mappings-ratio bigger
+than the number of virtual symbols to be updated, then the incremental
+SSA updater switches to a full update for those symbols. The default
+ratio is 3.
+
+@item ssp-buffer-size
+The minimum size of buffers (i.e. arrays) that will receive stack smashing
+protection when @option{-fstack-protection} is used.
+
+@item max-jump-thread-duplication-stmts
+Maximum number of statements allowed in a block that needs to be
+duplicated when threading jumps.
+
+@item max-fields-for-field-sensitive
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis.
+
@end table
@end table
@@ -5013,7 +6540,7 @@ and searches several directories.
@item -lobjc
@opindex lobjc
You need this special case of the @option{-l} option in order to
-link an Objective-C program.
+link an Objective-C or Objective-C++ program.
@item -nostartfiles
@opindex nostartfiles
@@ -5026,9 +6553,9 @@ or @option{-nodefaultlibs} is used.
Do not use the standard system libraries when linking.
Only the libraries you specify will be passed to the linker.
The standard startup files are used normally, unless @option{-nostartfiles}
-is used. The compiler may generate calls to memcmp, memset, and memcpy
-for System V (and ISO C) environments or to bcopy and bzero for
-BSD environments. These entries are usually resolved by entries in
+is used. The compiler may generate calls to @code{memcmp},
+@code{memset}, @code{memcpy} and @code{memmove}.
+These entries are usually resolved by entries in
libc. These entry points should be supplied through some other
mechanism when this option is specified.
@@ -5036,9 +6563,9 @@ mechanism when this option is specified.
@opindex nostdlib
Do not use the standard system startup files or libraries when linking.
No startup files and only the libraries you specify will be passed to
-the linker. The compiler may generate calls to memcmp, memset, and memcpy
-for System V (and ISO C) environments or to bcopy and bzero for
-BSD environments. These entries are usually resolved by entries in
+the linker. The compiler may generate calls to @code{memcmp}, @code{memset},
+@code{memcpy} and @code{memmove}.
+These entries are usually resolved by entries in
libc. These entry points should be supplied through some other
mechanism when this option is specified.
@@ -5070,6 +6597,14 @@ For predictable results, you must also specify the same set of options
that were used to generate code (@option{-fpie}, @option{-fPIE},
or model suboptions) when you specify this option.
+@item -rdynamic
+@opindex rdynamic
+Pass the flag @option{-export-dynamic} to the ELF linker, on targets
+that support it. This instructs the linker to add all symbols, not
+only used ones, to the dynamic symbol table. This option is needed
+for some uses of @code{dlopen} or to allow obtaining backtraces
+from within a program.
+
@item -s
@opindex s
Remove all symbol table and relocation information from the executable.
@@ -5191,28 +6726,12 @@ the ordering for the include_next directive are not inadvertently changed.
If you really need to change the search order for system directories,
use the @option{-nostdinc} and/or @option{-isystem} options.
-@item -I-
-@opindex I-
-Any directories you specify with @option{-I} options before the @option{-I-}
-option are searched only for the case of @samp{#include "@var{file}"};
-they are not searched for @samp{#include <@var{file}>}.
-
-If additional directories are specified with @option{-I} options after
-the @option{-I-}, these directories are searched for all @samp{#include}
-directives. (Ordinarily @emph{all} @option{-I} directories are used
-this way.)
-
-In addition, the @option{-I-} option inhibits the use of the current
-directory (where the current input file came from) as the first search
-directory for @samp{#include "@var{file}"}. There is no way to
-override this effect of @option{-I-}. With @option{-I.} you can specify
-searching the directory which was current when the compiler was
-invoked. That is not exactly the same as what the preprocessor does
-by default, but it is often satisfactory.
-
-@option{-I-} does not inhibit the use of the standard system directories
-for header files. Thus, @option{-I-} and @option{-nostdinc} are
-independent.
+@item -iquote@var{dir}
+@opindex iquote
+Add the directory @var{dir} to the head of the list of directories to
+be searched for header files only for the case of @samp{#include
+"@var{file}"}; they are not searched for @samp{#include <@var{file}>},
+otherwise just like @option{-I}.
@item -L@var{dir}
@opindex L
@@ -5270,6 +6789,47 @@ program uses when determining what switches to pass to @file{cc1},
@file{cc1plus}, @file{as}, @file{ld}, etc. More than one
@option{-specs=@var{file}} can be specified on the command line, and they
are processed in order, from left to right.
+
+@item --sysroot=@var{dir}
+@opindex sysroot
+Use @var{dir} as the logical root directory for headers and libraries.
+For example, if the compiler would normally search for headers in
+@file{/usr/include} and libraries in @file{/usr/lib}, it will instead
+search @file{@var{dir}/usr/include} and @file{@var{dir}/usr/lib}.
+
+If you use both this option and the @option{-isysroot} option, then
+the @option{--sysroot} option will apply to libraries, but the
+@option{-isysroot} option will apply to header files.
+
+The GNU linker (beginning with version 2.16) has the necessary support
+for this option. If your linker does not support this option, the
+header file aspect of @option{--sysroot} will still work, but the
+library aspect will not.
+
+@item -I-
+@opindex I-
+This option has been deprecated. Please use @option{-iquote} instead for
+@option{-I} directories before the @option{-I-} and remove the @option{-I-}.
+Any directories you specify with @option{-I} options before the @option{-I-}
+option are searched only for the case of @samp{#include "@var{file}"};
+they are not searched for @samp{#include <@var{file}>}.
+
+If additional directories are specified with @option{-I} options after
+the @option{-I-}, these directories are searched for all @samp{#include}
+directives. (Ordinarily @emph{all} @option{-I} directories are used
+this way.)
+
+In addition, the @option{-I-} option inhibits the use of the current
+directory (where the current input file came from) as the first search
+directory for @samp{#include "@var{file}"}. There is no way to
+override this effect of @option{-I-}. With @option{-I.} you can specify
+searching the directory which was current when the compiler was
+invoked. That is not exactly the same as what the preprocessor does
+by default, but it is often satisfactory.
+
+@option{-I-} does not inhibit the use of the standard system directories
+for header files. Thus, @option{-I-} and @option{-nostdinc} are
+independent.
@end table
@c man end
@@ -5526,9 +7086,9 @@ C@.
@item %I
Substitute any of @option{-iprefix} (made from @env{GCC_EXEC_PREFIX}),
-@option{-isysroot} (made from @env{TARGET_SYSTEM_ROOT}), and
+@option{-isysroot} (made from @env{TARGET_SYSTEM_ROOT}),
@option{-isystem} (made from @env{COMPILER_PATH} and @option{-B} options)
-as necessary.
+and @option{-imultilib} as necessary.
@item %s
Current argument is the name of a library or startup file of some sort.
@@ -5577,11 +7137,6 @@ Dump out a @option{-L} option for each directory that GCC believes might
contain startup files. If the target supports multilibs then the
current multilib directory will be prepended to each of these paths.
-@item %M
-Output the multilib directory with directory separators replaced with
-@samp{_}. If multilib directories are not set, or the multilib directory is
-@file{.} then this option emits nothing.
-
@item %L
Process the @code{lib} spec. This is a spec string for deciding which
libraries should be included on the command line to the linker.
@@ -5603,13 +7158,6 @@ the last object files that will be passed to the linker.
Process the @code{cpp} spec. This is used to construct the arguments
to be passed to the C preprocessor.
-@item %c
-Process the @code{signed_char} spec. This is intended to be used
-to tell cpp whether a char is signed. It typically has the definition:
-@smallexample
-%@{funsigned-char:-D__CHAR_UNSIGNED__@}
-@end smallexample
-
@item %1
Process the @code{cc1} spec. This is used to construct the options to be
passed to the actual C compiler (@samp{cc1}).
@@ -5662,6 +7210,16 @@ based on the existence of the first. Here is a small example of its usage:
crt0%O%s %:if-exists(crti%O%s) \
%:if-exists-else(crtbeginT%O%s crtbegin%O%s)
@end smallexample
+
+@item @code{replace-outfile}
+The @code{replace-outfile} spec function takes two arguments. It looks for the
+first argument in the outfiles array and replaces it with the second argument. Here
+is a small example of its usage:
+
+@smallexample
+%@{fgnu-runtime:%:replace-outfile(-lobjc -lobjc-gnu)@}
+@end smallexample
+
@end table
@item %@{@code{S}@}
@@ -5798,14 +7356,16 @@ The argument @var{machine} specifies the target machine for compilation.
The value to use for @var{machine} is the same as was specified as the
machine type when configuring GCC as a cross-compiler. For
example, if a cross-compiler was configured with @samp{configure
-i386v}, meaning to compile for an 80386 running System V, then you
-would specify @option{-b i386v} to run that cross compiler.
+arm-elf}, meaning to compile for an arm processor with elf binaries,
+then you would specify @option{-b arm-elf} to run that cross compiler.
+Because there are other options beginning with @option{-b}, the
+configuration must contain a hyphen.
@item -V @var{version}
@opindex V
The argument @var{version} specifies which version of GCC to run.
This is useful when multiple versions are installed. For example,
-@var{version} might be @samp{2.0}, meaning to run GCC version 2.0.
+@var{version} might be @samp{4.0}, meaning to run GCC version 4.0.
@end table
The @option{-V} and @option{-b} options work by running the
@@ -5834,624 +7394,93 @@ Some configurations of the compiler also support additional special
options, usually for compatibility with other compilers on the same
platform.
-These options are defined by the macro @code{TARGET_SWITCHES} in the
-machine description. The default for the options is also defined by
-that macro, which enables you to change the defaults.
+@c This list is ordered alphanumerically by subsection name.
+@c It should be the same order and spelling as these options are listed
+@c in Machine Dependent Options
@menu
-* M680x0 Options::
-* M68hc1x Options::
-* VAX Options::
-* SPARC Options::
+* ARC Options::
* ARM Options::
-* MN10300 Options::
-* M32R/D Options::
-* RS/6000 and PowerPC Options::
+* AVR Options::
+* Blackfin Options::
+* CRIS Options::
+* CRX Options::
* Darwin Options::
-* MIPS Options::
-* i386 and x86-64 Options::
-* HPPA Options::
-* Intel 960 Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
+* FRV Options::
+* GNU/Linux Options::
* H8/300 Options::
+* HPPA Options::
+* i386 and x86-64 Options::
+* IA-64 Options::
+* M32C Options::
+* M32R/D Options::
+* M680x0 Options::
+* M68hc1x Options::
+* MCore Options::
+* MIPS Options::
+* MMIX Options::
+* MN10300 Options::
+* MT Options::
+* PDP-11 Options::
+* PowerPC Options::
+* RS/6000 and PowerPC Options::
+* S/390 and zSeries Options::
+* Score Options::
* SH Options::
+* SPARC Options::
* System V Options::
* TMS320C3x/C4x Options::
* V850 Options::
-* ARC Options::
-* NS32K Options::
-* AVR Options::
-* MCore Options::
-* IA-64 Options::
-* D30V Options::
-* S/390 and zSeries Options::
-* CRIS Options::
-* MMIX Options::
-* PDP-11 Options::
+* VAX Options::
+* x86-64 Options::
* Xstormy16 Options::
* Xtensa Options::
-* FRV Options::
+* zSeries Options::
@end menu
-@node M680x0 Options
-@subsection M680x0 Options
-@cindex M680x0 options
-
-These are the @samp{-m} options defined for the 68000 series. The default
-values for these options depends on which style of 68000 was selected when
-the compiler was configured; the defaults for the most common choices are
-given below.
-
-@table @gcctabopt
-@item -m68000
-@itemx -mc68000
-@opindex m68000
-@opindex mc68000
-Generate output for a 68000. This is the default
-when the compiler is configured for 68000-based systems.
-
-Use this option for microcontrollers with a 68000 or EC000 core,
-including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
-
-@item -m68020
-@itemx -mc68020
-@opindex m68020
-@opindex mc68020
-Generate output for a 68020. This is the default
-when the compiler is configured for 68020-based systems.
-
-@item -m68881
-@opindex m68881
-Generate output containing 68881 instructions for floating point.
-This is the default for most 68020 systems unless @option{--nfp} was
-specified when the compiler was configured.
-
-@item -m68030
-@opindex m68030
-Generate output for a 68030. This is the default when the compiler is
-configured for 68030-based systems.
-
-@item -m68040
-@opindex m68040
-Generate output for a 68040. This is the default when the compiler is
-configured for 68040-based systems.
-
-This option inhibits the use of 68881/68882 instructions that have to be
-emulated by software on the 68040. Use this option if your 68040 does not
-have code to emulate those instructions.
-
-@item -m68060
-@opindex m68060
-Generate output for a 68060. This is the default when the compiler is
-configured for 68060-based systems.
-
-This option inhibits the use of 68020 and 68881/68882 instructions that
-have to be emulated by software on the 68060. Use this option if your 68060
-does not have code to emulate those instructions.
-
-@item -mcpu32
-@opindex mcpu32
-Generate output for a CPU32. This is the default
-when the compiler is configured for CPU32-based systems.
-
-Use this option for microcontrollers with a
-CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
-68336, 68340, 68341, 68349 and 68360.
-
-@item -m5200
-@opindex m5200
-Generate output for a 520X ``coldfire'' family cpu. This is the default
-when the compiler is configured for 520X-based systems.
-
-Use this option for microcontroller with a 5200 core, including
-the MCF5202, MCF5203, MCF5204 and MCF5202.
-
-
-@item -m68020-40
-@opindex m68020-40
-Generate output for a 68040, without using any of the new instructions.
-This results in code which can run relatively efficiently on either a
-68020/68881 or a 68030 or a 68040. The generated code does use the
-68881 instructions that are emulated on the 68040.
-
-@item -m68020-60
-@opindex m68020-60
-Generate output for a 68060, without using any of the new instructions.
-This results in code which can run relatively efficiently on either a
-68020/68881 or a 68030 or a 68040. The generated code does use the
-68881 instructions that are emulated on the 68060.
-
-@item -msoft-float
-@opindex msoft-float
-Generate output containing library calls for floating point.
-@strong{Warning:} the requisite libraries are not available for all m68k
-targets. Normally the facilities of the machine's usual C compiler are
-used, but this can't be done directly in cross-compilation. You must
-make your own arrangements to provide suitable library functions for
-cross-compilation. The embedded targets @samp{m68k-*-aout} and
-@samp{m68k-*-coff} do provide software floating point support.
-
-@item -mshort
-@opindex mshort
-Consider type @code{int} to be 16 bits wide, like @code{short int}.
-
-@item -mnobitfield
-@opindex mnobitfield
-Do not use the bit-field instructions. The @option{-m68000}, @option{-mcpu32}
-and @option{-m5200} options imply @w{@option{-mnobitfield}}.
-
-@item -mbitfield
-@opindex mbitfield
-Do use the bit-field instructions. The @option{-m68020} option implies
-@option{-mbitfield}. This is the default if you use a configuration
-designed for a 68020.
-
-@item -mrtd
-@opindex mrtd
-Use a different function-calling convention, in which functions
-that take a fixed number of arguments return with the @code{rtd}
-instruction, which pops their arguments while returning. This
-saves one instruction in the caller since there is no need to pop
-the arguments there.
-
-This calling convention is incompatible with the one normally
-used on Unix, so you cannot use it if you need to call libraries
-compiled with the Unix compiler.
-
-Also, you must provide function prototypes for all functions that
-take variable numbers of arguments (including @code{printf});
-otherwise incorrect code will be generated for calls to those
-functions.
-
-In addition, seriously incorrect code will result if you call a
-function with too many arguments. (Normally, extra arguments are
-harmlessly ignored.)
-
-The @code{rtd} instruction is supported by the 68010, 68020, 68030,
-68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
-
-@item -malign-int
-@itemx -mno-align-int
-@opindex malign-int
-@opindex mno-align-int
-Control whether GCC aligns @code{int}, @code{long}, @code{long long},
-@code{float}, @code{double}, and @code{long double} variables on a 32-bit
-boundary (@option{-malign-int}) or a 16-bit boundary (@option{-mno-align-int}).
-Aligning variables on 32-bit boundaries produces code that runs somewhat
-faster on processors with 32-bit busses at the expense of more memory.
-
-@strong{Warning:} if you use the @option{-malign-int} switch, GCC will
-align structures containing the above types differently than
-most published application binary interface specifications for the m68k.
-
-@item -mpcrel
-@opindex mpcrel
-Use the pc-relative addressing mode of the 68000 directly, instead of
-using a global offset table. At present, this option implies @option{-fpic},
-allowing at most a 16-bit offset for pc-relative addressing. @option{-fPIC} is
-not presently supported with @option{-mpcrel}, though this could be supported for
-68020 and higher processors.
-
-@item -mno-strict-align
-@itemx -mstrict-align
-@opindex mno-strict-align
-@opindex mstrict-align
-Do not (do) assume that unaligned memory references will be handled by
-the system.
-
-@item -msep-data
-Generate code that allows the data segment to be located in a different
-area of memory from the text segment. This allows for execute in place in
-an environment without virtual memory management. This option implies -fPIC.
-
-@item -mno-sep-data
-Generate code that assumes that the data segment follows the text segment.
-This is the default.
-
-@item -mid-shared-library
-Generate code that supports shared libraries via the library ID method.
-This allows for execute in place and shared libraries in an environment
-without virtual memory management. This option implies -fPIC.
-
-@item -mno-id-shared-library
-Generate code that doesn't assume ID based shared libraries are being used.
-This is the default.
-
-@item -mshared-library-id=n
-Specified the identification number of the ID based shared library being
-compiled. Specifying a value of 0 will generate more compact code, specifying
-other values will force the allocation of that number to the current
-library but is no more space or time efficient than omitting this option.
-
-@end table
-
-@node M68hc1x Options
-@subsection M68hc1x Options
-@cindex M68hc1x options
-
-These are the @samp{-m} options defined for the 68hc11 and 68hc12
-microcontrollers. The default values for these options depends on
-which style of microcontroller was selected when the compiler was configured;
-the defaults for the most common choices are given below.
-
-@table @gcctabopt
-@item -m6811
-@itemx -m68hc11
-@opindex m6811
-@opindex m68hc11
-Generate output for a 68HC11. This is the default
-when the compiler is configured for 68HC11-based systems.
-
-@item -m6812
-@itemx -m68hc12
-@opindex m6812
-@opindex m68hc12
-Generate output for a 68HC12. This is the default
-when the compiler is configured for 68HC12-based systems.
-
-@item -m68S12
-@itemx -m68hcs12
-@opindex m68S12
-@opindex m68hcs12
-Generate output for a 68HCS12.
-
-@item -mauto-incdec
-@opindex mauto-incdec
-Enable the use of 68HC12 pre and post auto-increment and auto-decrement
-addressing modes.
-
-@item -minmax
-@itemx -nominmax
-@opindex minmax
-@opindex mnominmax
-Enable the use of 68HC12 min and max instructions.
-
-@item -mlong-calls
-@itemx -mno-long-calls
-@opindex mlong-calls
-@opindex mno-long-calls
-Treat all calls as being far away (near). If calls are assumed to be
-far away, the compiler will use the @code{call} instruction to
-call a function and the @code{rtc} instruction for returning.
-
-@item -mshort
-@opindex mshort
-Consider type @code{int} to be 16 bits wide, like @code{short int}.
-
-@item -msoft-reg-count=@var{count}
-@opindex msoft-reg-count
-Specify the number of pseudo-soft registers which are used for the
-code generation. The maximum number is 32. Using more pseudo-soft
-register may or may not result in better code depending on the program.
-The default is 4 for 68HC11 and 2 for 68HC12.
-
-@end table
-
-@node VAX Options
-@subsection VAX Options
-@cindex VAX options
-
-These @samp{-m} options are defined for the VAX:
-
-@table @gcctabopt
-@item -munix
-@opindex munix
-Do not output certain jump instructions (@code{aobleq} and so on)
-that the Unix assembler for the VAX cannot handle across long
-ranges.
-
-@item -mgnu
-@opindex mgnu
-Do output those jump instructions, on the assumption that you
-will assemble with the GNU assembler.
-
-@item -mg
-@opindex mg
-Output code for g-format floating point numbers instead of d-format.
-@end table
-
-@node SPARC Options
-@subsection SPARC Options
-@cindex SPARC options
+@node ARC Options
+@subsection ARC Options
+@cindex ARC Options
-These @samp{-m} options are supported on the SPARC:
+These options are defined for ARC implementations:
@table @gcctabopt
-@item -mno-app-regs
-@itemx -mapp-regs
-@opindex mno-app-regs
-@opindex mapp-regs
-Specify @option{-mapp-regs} to generate output using the global registers
-2 through 4, which the SPARC SVR4 ABI reserves for applications. This
-is the default, except on Solaris.
-
-To be fully SVR4 ABI compliant at the cost of some performance loss,
-specify @option{-mno-app-regs}. You should compile libraries and system
-software with this option.
-
-@item -mfpu
-@itemx -mhard-float
-@opindex mfpu
-@opindex mhard-float
-Generate output containing floating point instructions. This is the
-default.
-
-@item -mno-fpu
-@itemx -msoft-float
-@opindex mno-fpu
-@opindex msoft-float
-Generate output containing library calls for floating point.
-@strong{Warning:} the requisite libraries are not available for all SPARC
-targets. Normally the facilities of the machine's usual C compiler are
-used, but this cannot be done directly in cross-compilation. You must make
-your own arrangements to provide suitable library functions for
-cross-compilation. The embedded targets @samp{sparc-*-aout} and
-@samp{sparclite-*-*} do provide software floating point support.
-
-@option{-msoft-float} changes the calling convention in the output file;
-therefore, it is only useful if you compile @emph{all} of a program with
-this option. In particular, you need to compile @file{libgcc.a}, the
-library that comes with GCC, with @option{-msoft-float} in order for
-this to work.
-
-@item -mhard-quad-float
-@opindex mhard-quad-float
-Generate output containing quad-word (long double) floating point
-instructions.
-
-@item -msoft-quad-float
-@opindex msoft-quad-float
-Generate output containing library calls for quad-word (long double)
-floating point instructions. The functions called are those specified
-in the SPARC ABI@. This is the default.
-
-As of this writing, there are no SPARC implementations that have hardware
-support for the quad-word floating point instructions. They all invoke
-a trap handler for one of these instructions, and then the trap handler
-emulates the effect of the instruction. Because of the trap handler overhead,
-this is much slower than calling the ABI library routines. Thus the
-@option{-msoft-quad-float} option is the default.
-
-@item -mno-flat
-@itemx -mflat
-@opindex mno-flat
-@opindex mflat
-With @option{-mflat}, the compiler does not generate save/restore instructions
-and will use a ``flat'' or single register window calling convention.
-This model uses %i7 as the frame pointer and is compatible with the normal
-register window model. Code from either may be intermixed.
-The local registers and the input registers (0--5) are still treated as
-``call saved'' registers and will be saved on the stack as necessary.
-
-With @option{-mno-flat} (the default), the compiler emits save/restore
-instructions (except for leaf functions) and is the normal mode of operation.
-
-These options are deprecated and will be deleted in a future GCC release.
-
-@item -mno-unaligned-doubles
-@itemx -munaligned-doubles
-@opindex mno-unaligned-doubles
-@opindex munaligned-doubles
-Assume that doubles have 8 byte alignment. This is the default.
-
-With @option{-munaligned-doubles}, GCC assumes that doubles have 8 byte
-alignment only if they are contained in another type, or if they have an
-absolute address. Otherwise, it assumes they have 4 byte alignment.
-Specifying this option avoids some rare compatibility problems with code
-generated by other compilers. It is not the default because it results
-in a performance loss, especially for floating point code.
-
-@item -mno-faster-structs
-@itemx -mfaster-structs
-@opindex mno-faster-structs
-@opindex mfaster-structs
-With @option{-mfaster-structs}, the compiler assumes that structures
-should have 8 byte alignment. This enables the use of pairs of
-@code{ldd} and @code{std} instructions for copies in structure
-assignment, in place of twice as many @code{ld} and @code{st} pairs.
-However, the use of this changed alignment directly violates the SPARC
-ABI@. Thus, it's intended only for use on targets where the developer
-acknowledges that their resulting code will not be directly in line with
-the rules of the ABI@.
-
-@item -mimpure-text
-@opindex mimpure-text
-@option{-mimpure-text}, used in addition to @option{-shared}, tells
-the compiler to not pass @option{-z text} to the linker when linking a
-shared object. Using this option, you can link position-dependent
-code into a shared object.
-
-@option{-mimpure-text} suppresses the ``relocations remain against
-allocatable but non-writable sections'' linker error message.
-However, the necessary relocations will trigger copy-on-write, and the
-shared object is not actually shared across processes. Instead of
-using @option{-mimpure-text}, you should compile all source code with
-@option{-fpic} or @option{-fPIC}.
+@item -EL
+@opindex EL
+Compile code for little endian mode. This is the default.
-This option is only available on SunOS and Solaris.
+@item -EB
+@opindex EB
+Compile code for big endian mode.
-@item -mv8
-@itemx -msparclite
-@opindex mv8
-@opindex msparclite
-These two options select variations on the SPARC architecture.
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
-
-@item -mcypress
-@itemx -msupersparc
-@itemx -mf930
-@itemx -mf934
-@opindex mcypress
-@opindex msupersparc
-@opindex -mf930
-@opindex -mf934
-These four options select the processor for which the code is optimized.
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
+@item -mmangle-cpu
+@opindex mmangle-cpu
+Prepend the name of the cpu to all public symbol names.
+In multiple-processor systems, there are many ARC variants with different
+instruction and register set characteristics. This flag prevents code
+compiled for one cpu to be linked with code compiled for another.
+No facility exists for handling variants that are ``almost identical''.
+This is an all or nothing option.
-@item -mcpu=@var{cpu_type}
+@item -mcpu=@var{cpu}
@opindex mcpu
-Set the instruction set, register set, and instruction scheduling parameters
-for machine type @var{cpu_type}. Supported values for @var{cpu_type} are
-@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite},
-@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x},
-@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, and
-@samp{ultrasparc3}.
-
-Default instruction scheduling parameters are used for values that select
-an architecture and not an implementation. These are @samp{v7}, @samp{v8},
-@samp{sparclite}, @samp{sparclet}, @samp{v9}.
-
-Here is a list of each supported architecture and their supported
-implementations.
-
-@smallexample
- v7: cypress
- v8: supersparc, hypersparc
- sparclite: f930, f934, sparclite86x
- sparclet: tsc701
- v9: ultrasparc, ultrasparc3
-@end smallexample
-
-By default (unless configured otherwise), GCC generates code for the V7
-variant of the SPARC architecture. With @option{-mcpu=cypress}, the compiler
-additionally optimizes it for the Cypress CY7C602 chip, as used in the
-SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
-SPARCStation 1, 2, IPX etc.
-
-With @option{-mcpu=v8}, GCC generates code for the V8 variant of the SPARC
-architecture. The only difference from V7 code is that the compiler emits
-the integer multiply and integer divide instructions which exist in SPARC-V8
-but not in SPARC-V7. With @option{-mcpu=supersparc}, the compiler additionally
-optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
-2000 series.
-
-With @option{-mcpu=sparclite}, GCC generates code for the SPARClite variant of
-the SPARC architecture. This adds the integer multiply, integer divide step
-and scan (@code{ffs}) instructions which exist in SPARClite but not in SPARC-V7.
-With @option{-mcpu=f930}, the compiler additionally optimizes it for the
-Fujitsu MB86930 chip, which is the original SPARClite, with no FPU. With
-@option{-mcpu=f934}, the compiler additionally optimizes it for the Fujitsu
-MB86934 chip, which is the more recent SPARClite with FPU.
-
-With @option{-mcpu=sparclet}, GCC generates code for the SPARClet variant of
-the SPARC architecture. This adds the integer multiply, multiply/accumulate,
-integer divide step and scan (@code{ffs}) instructions which exist in SPARClet
-but not in SPARC-V7. With @option{-mcpu=tsc701}, the compiler additionally
-optimizes it for the TEMIC SPARClet chip.
-
-With @option{-mcpu=v9}, GCC generates code for the V9 variant of the SPARC
-architecture. This adds 64-bit integer and floating-point move instructions,
-3 additional floating-point condition code registers and conditional move
-instructions. With @option{-mcpu=ultrasparc}, the compiler additionally
-optimizes it for the Sun UltraSPARC I/II chips. With
-@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
-Sun UltraSPARC III chip.
-
-@item -mtune=@var{cpu_type}
-@opindex mtune
-Set the instruction scheduling parameters for machine type
-@var{cpu_type}, but do not set the instruction set or register set that the
-option @option{-mcpu=@var{cpu_type}} would.
-
-The same values for @option{-mcpu=@var{cpu_type}} can be used for
-@option{-mtune=@var{cpu_type}}, but the only useful values are those
-that select a particular cpu implementation. Those are @samp{cypress},
-@samp{supersparc}, @samp{hypersparc}, @samp{f930}, @samp{f934},
-@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, and
-@samp{ultrasparc3}.
-
-@item -mv8plus
-@itemx -mno-v8plus
-@opindex mv8plus
-@opindex mno-v8plus
-With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI. The
-difference from the V8 ABI is that the global and out registers are
-considered 64-bit wide. This is enabled by default on Solaris in 32-bit
-mode for all SPARC-V9 processors.
-
-@item -mvis
-@itemx -mno-vis
-@opindex mvis
-@opindex mno-vis
-With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
-Visual Instruction Set extensions. The default is @option{-mno-vis}.
-@end table
-
-These @samp{-m} options are supported in addition to the above
-on SPARC-V9 processors in 64-bit environments:
-
-@table @gcctabopt
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a processor running in little-endian mode. It is only
-available for a few configurations and most notably not on Solaris and Linux.
-
-@item -m32
-@itemx -m64
-@opindex m32
-@opindex m64
-Generate code for a 32-bit or 64-bit environment.
-The 32-bit environment sets int, long and pointer to 32 bits.
-The 64-bit environment sets int to 32 bits and long and pointer
-to 64 bits.
-
-@item -mcmodel=medlow
-@opindex mcmodel=medlow
-Generate code for the Medium/Low code model: 64-bit addresses, programs
-must be linked in the low 32 bits of memory. Programs can be statically
-or dynamically linked.
-
-@item -mcmodel=medmid
-@opindex mcmodel=medmid
-Generate code for the Medium/Middle code model: 64-bit addresses, programs
-must be linked in the low 44 bits of memory, the text and data segments must
-be less than 2GB in size and the data segment must be located within 2GB of
-the text segment.
-
-@item -mcmodel=medany
-@opindex mcmodel=medany
-Generate code for the Medium/Anywhere code model: 64-bit addresses, programs
-may be linked anywhere in memory, the text and data segments must be less
-than 2GB in size and the data segment must be located within 2GB of the
-text segment.
+Compile code for ARC variant @var{cpu}.
+Which variants are supported depend on the configuration.
+All variants support @option{-mcpu=base}, this is the default.
-@item -mcmodel=embmedany
-@opindex mcmodel=embmedany
-Generate code for the Medium/Anywhere code model for embedded systems:
-64-bit addresses, the text and data segments must be less than 2GB in
-size, both starting anywhere in memory (determined at link time). The
-global register %g4 points to the base of the data segment. Programs
-are statically linked and PIC is not supported.
+@item -mtext=@var{text-section}
+@itemx -mdata=@var{data-section}
+@itemx -mrodata=@var{readonly-data-section}
+@opindex mtext
+@opindex mdata
+@opindex mrodata
+Put functions, data, and readonly data in @var{text-section},
+@var{data-section}, and @var{readonly-data-section} respectively
+by default. This can be overridden with the @code{section} attribute.
+@xref{Variable Attributes}.
-@item -mstack-bias
-@itemx -mno-stack-bias
-@opindex mstack-bias
-@opindex mno-stack-bias
-With @option{-mstack-bias}, GCC assumes that the stack pointer, and
-frame pointer if present, are offset by @minus{}2047 which must be added back
-when making stack frame references. This is the default in 64-bit mode.
-Otherwise, assume no such offset is present.
-@end table
-
-These switches are supported in addition to the above on Solaris:
-
-@table @gcctabopt
-@item -threads
-@opindex threads
-Add support for multithreading using the Solaris threads library. This
-option sets flags for both the preprocessor and linker. This option does
-not affect the thread safety of object code produced by the compiler or
-that of libraries supplied with it.
-
-@item -pthreads
-@opindex pthreads
-Add support for multithreading using the POSIX threads library. This
-option sets flags for both the preprocessor and linker. This option does
-not affect the thread safety of object code produced by the compiler or
-that of libraries supplied with it.
@end table
@node ARM Options
@@ -6462,6 +7491,11 @@ These @samp{-m} options are defined for Advanced RISC Machines (ARM)
architectures:
@table @gcctabopt
+@item -mabi=@var{name}
+@opindex mabi
+Generate code for the specified ABI@. Permissible values are: @samp{apcs-gnu},
+@samp{atpcs}, @samp{aapcs}, @samp{aapcs-linux} and @samp{iwmmxt}.
+
@item -mapcs-frame
@opindex mapcs-frame
Generate a stack frame that is compliant with the ARM Procedure Call
@@ -6474,24 +7508,6 @@ leaf functions. The default is @option{-mno-apcs-frame}.
@opindex mapcs
This is a synonym for @option{-mapcs-frame}.
-@item -mapcs-26
-@opindex mapcs-26
-Generate code for a processor running with a 26-bit program counter,
-and conforming to the function calling standards for the APCS 26-bit
-option.
-
-This option is deprecated. Future releases of the GCC will only support
-generating code that runs in apcs-32 mode.
-
-@item -mapcs-32
-@opindex mapcs-32
-Generate code for a processor running with a 32-bit program counter,
-and conforming to the function calling standards for the APCS 32-bit
-option.
-
-This flag is deprecated. Future releases of GCC will make this flag
-unconditional.
-
@ignore
@c not currently implemented
@item -mapcs-stack-check
@@ -6559,6 +7575,16 @@ this option. In particular, you need to compile @file{libgcc.a}, the
library that comes with GCC, with @option{-msoft-float} in order for
this to work.
+@item -mfloat-abi=@var{name}
+@opindex mfloat-abi
+Specifies which ABI to use for floating point values. Permissible values
+are: @samp{soft}, @samp{softfp} and @samp{hard}.
+
+@samp{soft} and @samp{hard} are equivalent to @option{-msoft-float}
+and @option{-mhard-float} respectively. @samp{softfp} allows the generation
+of floating point instructions, but still uses the soft-float calling
+conventions.
+
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a processor running in little-endian mode. This is
@@ -6578,40 +7604,6 @@ option should only be used if you require compatibility with code for
big-endian ARM processors generated by versions of the compiler prior to
2.8.
-@item -malignment-traps
-@opindex malignment-traps
-Generate code that will not trap if the MMU has alignment traps enabled.
-On ARM architectures prior to ARMv4, there were no instructions to
-access half-word objects stored in memory. However, when reading from
-memory a feature of the ARM architecture allows a word load to be used,
-even if the address is unaligned, and the processor core will rotate the
-data as it is being loaded. This option tells the compiler that such
-misaligned accesses will cause a MMU trap and that it should instead
-synthesize the access as a series of byte accesses. The compiler can
-still use word accesses to load half-word data if it knows that the
-address is aligned to a word boundary.
-
-This option has no effect when compiling for ARM architecture 4 or later,
-since these processors have instructions to directly access half-word
-objects in memory.
-
-@item -mno-alignment-traps
-@opindex mno-alignment-traps
-Generate code that assumes that the MMU will not trap unaligned
-accesses. This produces better code when the target instruction set
-does not have half-word memory operations (i.e.@: implementations prior to
-ARMv4).
-
-Note that you cannot use this option to access unaligned word objects,
-since the processor will only fetch one 32-bit aligned object from
-memory.
-
-The default setting is @option{-malignment-traps}, since this produces
-code that will also run on processors implementing ARM architecture
-version 6 or later.
-
-This option is deprecated and will be removed in the next release of GCC.
-
@item -mcpu=@var{name}
@opindex mcpu
This specifies the name of the target ARM processor. GCC uses this name
@@ -6621,12 +7613,15 @@ assembly code. Permissible names are: @samp{arm2}, @samp{arm250},
@samp{arm620}, @samp{arm7}, @samp{arm7m}, @samp{arm7d}, @samp{arm7dm},
@samp{arm7di}, @samp{arm7dmi}, @samp{arm70}, @samp{arm700},
@samp{arm700i}, @samp{arm710}, @samp{arm710c}, @samp{arm7100},
-@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm8},
-@samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
+@samp{arm7500}, @samp{arm7500fe}, @samp{arm7tdmi}, @samp{arm7tdmi-s},
+@samp{arm8}, @samp{strongarm}, @samp{strongarm110}, @samp{strongarm1100},
@samp{arm8}, @samp{arm810}, @samp{arm9}, @samp{arm9e}, @samp{arm920},
-@samp{arm920t}, @samp{arm926ejs}, @samp{arm940t}, @samp{arm9tdmi},
-@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ejs},
-@samp{arm1136js}, @samp{arm1136jfs} ,@samp{xscale}, @samp{iwmmxt},
+@samp{arm920t}, @samp{arm922t}, @samp{arm946e-s}, @samp{arm966e-s},
+@samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
+@samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
+@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
+@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
+@samp{arm1176jz-s}, @samp{arm1176jzf-s}, @samp{xscale}, @samp{iwmmxt},
@samp{ep9312}.
@itemx -mtune=@var{name}
@@ -6647,28 +7642,37 @@ name to determine what kind of instructions it can emit when generating
assembly code. This option can be used in conjunction with or instead
of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
-@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6j},
+@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6}, @samp{armv6j},
@samp{iwmmxt}, @samp{ep9312}.
-@item -mfpe=@var{number}
+@item -mfpu=@var{name}
+@itemx -mfpe=@var{number}
@itemx -mfp=@var{number}
+@opindex mfpu
@opindex mfpe
@opindex mfp
-This specifies the version of the floating point emulation available on
-the target. Permissible values are 2 and 3. @option{-mfp=} is a synonym
-for @option{-mfpe=}, for compatibility with older versions of GCC@.
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: @samp{fpa}, @samp{fpe2},
+@samp{fpe3}, @samp{maverick}, @samp{vfp}. @option{-mfp} and @option{-mfpe}
+are synonyms for @option{-mfpu}=@samp{fpe}@var{number}, for compatibility
+with older versions of GCC@.
+
+If @option{-msoft-float} is specified this specifies the format of
+floating point values.
@item -mstructure-size-boundary=@var{n}
@opindex mstructure-size-boundary
The size of all structures and unions will be rounded up to a multiple
-of the number of bits set by this option. Permissible values are 8 and
-32. The default value varies for different toolchains. For the COFF
-targeted toolchain the default value is 8. Specifying the larger number
-can produce faster, more efficient code, but can also increase the size
-of the program. The two values are potentially incompatible. Code
-compiled with one value cannot necessarily expect to work with code or
-libraries compiled with the other value, if they exchange information
-using structures or unions.
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the COFF
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying ABI supports it.
+
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
@item -mabort-on-noreturn
@opindex mabort-on-noreturn
@@ -6786,811 +7790,320 @@ execute correctly regardless of whether the target code has been
compiled for interworking or not. There is a small overhead in the cost
of executing a function pointer if this option is enabled.
-@end table
+@item -mtp=@var{name}
+@opindex mtp
+Specify the access model for the thread local storage pointer. The valid
+models are @option{soft}, which generates calls to @code{__aeabi_read_tp},
+@option{cp15}, which fetches the thread pointer from @code{cp15} directly
+(supported in the arm6k architecture), and @option{auto}, which uses the
+best available method for the selected processor. The default setting is
+@option{auto}.
-@node MN10300 Options
-@subsection MN10300 Options
-@cindex MN10300 options
-
-These @option{-m} options are defined for Matsushita MN10300 architectures:
-
-@table @gcctabopt
-@item -mmult-bug
-@opindex mmult-bug
-Generate code to avoid bugs in the multiply instructions for the MN10300
-processors. This is the default.
-
-@item -mno-mult-bug
-@opindex mno-mult-bug
-Do not generate code to avoid bugs in the multiply instructions for the
-MN10300 processors.
-
-@item -mam33
-@opindex mam33
-Generate code which uses features specific to the AM33 processor.
-
-@item -mno-am33
-@opindex mno-am33
-Do not generate code which uses features specific to the AM33 processor. This
-is the default.
-
-@item -mno-crt0
-@opindex mno-crt0
-Do not link in the C run-time initialization object file.
-
-@item -mrelax
-@opindex mrelax
-Indicate to the linker that it should perform a relaxation optimization pass
-to shorten branches, calls and absolute memory addresses. This option only
-has an effect when used on the command line for the final link step.
-
-This option makes symbolic debugging impossible.
@end table
+@node AVR Options
+@subsection AVR Options
+@cindex AVR Options
-@node M32R/D Options
-@subsection M32R/D Options
-@cindex M32R/D options
-
-These @option{-m} options are defined for Renesas M32R/D architectures:
+These options are defined for AVR implementations:
@table @gcctabopt
-@item -m32r2
-@opindex m32r2
-Generate code for the M32R/2@.
-
-@item -m32rx
-@opindex m32rx
-Generate code for the M32R/X@.
-
-@item -m32r
-@opindex m32r
-Generate code for the M32R@. This is the default.
-
-@item -mmodel=small
-@opindex mmodel=small
-Assume all objects live in the lower 16MB of memory (so that their addresses
-can be loaded with the @code{ld24} instruction), and assume all subroutines
-are reachable with the @code{bl} instruction.
-This is the default.
-
-The addressability of a particular object can be set with the
-@code{model} attribute.
-
-@item -mmodel=medium
-@opindex mmodel=medium
-Assume objects may be anywhere in the 32-bit address space (the compiler
-will generate @code{seth/add3} instructions to load their addresses), and
-assume all subroutines are reachable with the @code{bl} instruction.
-
-@item -mmodel=large
-@opindex mmodel=large
-Assume objects may be anywhere in the 32-bit address space (the compiler
-will generate @code{seth/add3} instructions to load their addresses), and
-assume subroutines may not be reachable with the @code{bl} instruction
-(the compiler will generate the much slower @code{seth/add3/jl}
-instruction sequence).
-
-@item -msdata=none
-@opindex msdata=none
-Disable use of the small data area. Variables will be put into
-one of @samp{.data}, @samp{bss}, or @samp{.rodata} (unless the
-@code{section} attribute has been specified).
-This is the default.
-
-The small data area consists of sections @samp{.sdata} and @samp{.sbss}.
-Objects may be explicitly put in the small data area with the
-@code{section} attribute using one of these sections.
-
-@item -msdata=sdata
-@opindex msdata=sdata
-Put small global and static data in the small data area, but do not
-generate special code to reference them.
-
-@item -msdata=use
-@opindex msdata=use
-Put small global and static data in the small data area, and generate
-special instructions to reference them.
+@item -mmcu=@var{mcu}
+@opindex mmcu
+Specify ATMEL AVR instruction set or MCU type.
-@item -G @var{num}
-@opindex G
-@cindex smaller data references
-Put global and static objects less than or equal to @var{num} bytes
-into the small data or bss sections instead of the normal data or bss
-sections. The default value of @var{num} is 8.
-The @option{-msdata} option must be set to one of @samp{sdata} or @samp{use}
-for this option to have any effect.
+Instruction set avr1 is for the minimal AVR core, not supported by the C
+compiler, only for assembler programs (MCU types: at90s1200, attiny10,
+attiny11, attiny12, attiny15, attiny28).
-All modules should be compiled with the same @option{-G @var{num}} value.
-Compiling with different values of @var{num} may or may not work; if it
-doesn't the linker will give an error message---incorrect code will not be
-generated.
+Instruction set avr2 (default) is for the classic AVR core with up to
+8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
+at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
+at90c8534, at90s8535).
-@item -mdebug
-@opindex mdebug
-Makes the M32R specific code in the compiler display some statistics
-that might help in debugging programs.
+Instruction set avr3 is for the classic AVR core with up to 128K program
+memory space (MCU types: atmega103, atmega603, at43usb320, at76c711).
-@item -malign-loops
-@opindex malign-loops
-Align all loops to a 32-byte boundary.
+Instruction set avr4 is for the enhanced AVR core with up to 8K program
+memory space (MCU types: atmega8, atmega83, atmega85).
-@item -mno-align-loops
-@opindex mno-align-loops
-Do not enforce a 32-byte alignment for loops. This is the default.
+Instruction set avr5 is for the enhanced AVR core with up to 128K program
+memory space (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323,
+atmega64, atmega128, at43usb355, at94k).
-@item -missue-rate=@var{number}
-@opindex missue-rate=@var{number}
-Issue @var{number} instructions per cycle. @var{number} can only be 1
-or 2.
+@item -msize
+@opindex msize
+Output instruction sizes to the asm file.
-@item -mbranch-cost=@var{number}
-@opindex mbranch-cost=@var{number}
-@var{number} can only be 1 or 2. If it is 1 then branches will be
-preferred over conditional code, if it is 2, then the opposite will
-apply.
+@item -minit-stack=@var{N}
+@opindex minit-stack
+Specify the initial stack address, which may be a symbol or numeric value,
+@samp{__stack} is the default.
-@item -mflush-trap=@var{number}
-@opindex mflush-trap=@var{number}
-Specifies the trap number to use to flush the cache. The default is
-12. Valid numbers are between 0 and 15 inclusive.
+@item -mno-interrupts
+@opindex mno-interrupts
+Generated code is not compatible with hardware interrupts.
+Code size will be smaller.
-@item -mno-flush-trap
-@opindex mno-flush-trap
-Specifies that the cache cannot be flushed by using a trap.
+@item -mcall-prologues
+@opindex mcall-prologues
+Functions prologues/epilogues expanded as call to appropriate
+subroutines. Code size will be smaller.
-@item -mflush-func=@var{name}
-@opindex mflush-func=@var{name}
-Specifies the name of the operating system function to call to flush
-the cache. The default is @emph{_flush_cache}, but a function call
-will only be used if a trap is not available.
+@item -mno-tablejump
+@opindex mno-tablejump
+Do not generate tablejump insns which sometimes increase code size.
-@item -mno-flush-func
-@opindex mno-flush-func
-Indicates that there is no OS function for flushing the cache.
+@item -mtiny-stack
+@opindex mtiny-stack
+Change only the low 8 bits of the stack pointer.
+@item -mint8
+@opindex mint8
+Assume int to be 8 bit integer. This affects the sizes of all types: A
+char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
+and long long will be 4 bytes. Please note that this option does not
+comply to the C standards, but it will provide you with smaller code
+size.
@end table
-@node RS/6000 and PowerPC Options
-@subsection IBM RS/6000 and PowerPC Options
-@cindex RS/6000 and PowerPC Options
-@cindex IBM RS/6000 and PowerPC Options
+@node Blackfin Options
+@subsection Blackfin Options
+@cindex Blackfin Options
-These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
@table @gcctabopt
-@item -mpower
-@itemx -mno-power
-@itemx -mpower2
-@itemx -mno-power2
-@itemx -mpowerpc
-@itemx -mno-powerpc
-@itemx -mpowerpc-gpopt
-@itemx -mno-powerpc-gpopt
-@itemx -mpowerpc-gfxopt
-@itemx -mno-powerpc-gfxopt
-@itemx -mpowerpc64
-@itemx -mno-powerpc64
-@opindex mpower
-@opindex mno-power
-@opindex mpower2
-@opindex mno-power2
-@opindex mpowerpc
-@opindex mno-powerpc
-@opindex mpowerpc-gpopt
-@opindex mno-powerpc-gpopt
-@opindex mpowerpc-gfxopt
-@opindex mno-powerpc-gfxopt
-@opindex mpowerpc64
-@opindex mno-powerpc64
-GCC supports two related instruction set architectures for the
-RS/6000 and PowerPC@. The @dfn{POWER} instruction set are those
-instructions supported by the @samp{rios} chip set used in the original
-RS/6000 systems and the @dfn{PowerPC} instruction set is the
-architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and
-the IBM 4xx microprocessors.
+@item -momit-leaf-frame-pointer
+@opindex momit-leaf-frame-pointer
+Don't keep the frame pointer in a register for leaf functions. This
+avoids the instructions to save, set up and restore frame pointers and
+makes an extra register available in leaf functions. The option
+@option{-fomit-frame-pointer} removes the frame pointer for all functions
+which might make debugging harder.
-Neither architecture is a subset of the other. However there is a
-large common subset of instructions supported by both. An MQ
-register is included in processors supporting the POWER architecture.
+@item -mspecld-anomaly
+@opindex mspecld-anomaly
+When enabled, the compiler will ensure that the generated code does not
+contain speculative loads after jump instructions. This option is enabled
+by default.
-You use these options to specify which instructions are available on the
-processor you are using. The default value of these options is
-determined when configuring GCC@. Specifying the
-@option{-mcpu=@var{cpu_type}} overrides the specification of these
-options. We recommend you use the @option{-mcpu=@var{cpu_type}} option
-rather than the options listed above.
+@item -mno-specld-anomaly
+@opindex mno-specld-anomaly
+Don't generate extra code to prevent speculative loads from occurring.
-The @option{-mpower} option allows GCC to generate instructions that
-are found only in the POWER architecture and to use the MQ register.
-Specifying @option{-mpower2} implies @option{-power} and also allows GCC
-to generate instructions that are present in the POWER2 architecture but
-not the original POWER architecture.
+@item -mcsync-anomaly
+@opindex mcsync-anomaly
+When enabled, the compiler will ensure that the generated code does not
+contain CSYNC or SSYNC instructions too soon after conditional branches.
+This option is enabled by default.
-The @option{-mpowerpc} option allows GCC to generate instructions that
-are found only in the 32-bit subset of the PowerPC architecture.
-Specifying @option{-mpowerpc-gpopt} implies @option{-mpowerpc} and also allows
-GCC to use the optional PowerPC architecture instructions in the
-General Purpose group, including floating-point square root. Specifying
-@option{-mpowerpc-gfxopt} implies @option{-mpowerpc} and also allows GCC to
-use the optional PowerPC architecture instructions in the Graphics
-group, including floating-point select.
+@item -mno-csync-anomaly
+@opindex mno-csync-anomaly
+Don't generate extra code to prevent CSYNC or SSYNC instructions from
+occurring too soon after a conditional branch.
-The @option{-mpowerpc64} option allows GCC to generate the additional
-64-bit instructions that are found in the full PowerPC64 architecture
-and to treat GPRs as 64-bit, doubleword quantities. GCC defaults to
-@option{-mno-powerpc64}.
+@item -mlow-64k
+@opindex mlow-64k
+When enabled, the compiler is free to take advantage of the knowledge that
+the entire program fits into the low 64k of memory.
-If you specify both @option{-mno-power} and @option{-mno-powerpc}, GCC
-will use only the instructions in the common subset of both
-architectures plus some special AIX common-mode calls, and will not use
-the MQ register. Specifying both @option{-mpower} and @option{-mpowerpc}
-permits GCC to use any instruction from either architecture and to
-allow use of the MQ register; specify this for the Motorola MPC601.
+@item -mno-low-64k
+@opindex mno-low-64k
+Assume that the program is arbitrarily large. This is the default.
-@item -mnew-mnemonics
-@itemx -mold-mnemonics
-@opindex mnew-mnemonics
-@opindex mold-mnemonics
-Select which mnemonics to use in the generated assembler code. With
-@option{-mnew-mnemonics}, GCC uses the assembler mnemonics defined for
-the PowerPC architecture. With @option{-mold-mnemonics} it uses the
-assembler mnemonics defined for the POWER architecture. Instructions
-defined in only one architecture have only one mnemonic; GCC uses that
-mnemonic irrespective of which of these options is specified.
+@item -mid-shared-library
+@opindex mid-shared-library
+Generate code that supports shared libraries via the library ID method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies @option{-fPIC}.
-GCC defaults to the mnemonics appropriate for the architecture in
-use. Specifying @option{-mcpu=@var{cpu_type}} sometimes overrides the
-value of these option. Unless you are building a cross-compiler, you
-should normally not specify either @option{-mnew-mnemonics} or
-@option{-mold-mnemonics}, but should instead accept the default.
+@item -mno-id-shared-library
+@opindex mno-id-shared-library
+Generate code that doesn't assume ID based shared libraries are being used.
+This is the default.
-@item -mcpu=@var{cpu_type}
-@opindex mcpu
-Set architecture type, register usage, choice of mnemonics, and
-instruction scheduling parameters for machine type @var{cpu_type}.
-Supported values for @var{cpu_type} are @samp{401}, @samp{403},
-@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{505},
-@samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604},
-@samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400},
-@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823},
-@samp{860}, @samp{970}, @samp{8540}, @samp{common}, @samp{ec603e}, @samp{G3},
-@samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3},
-@samp{power4}, @samp{power5}, @samp{powerpc}, @samp{powerpc64},
-@samp{rios}, @samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64a}.
+@item -mshared-library-id=n
+@opindex mshared-library-id
+Specified the identification number of the ID based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
-@option{-mcpu=common} selects a completely generic processor. Code
-generated under this option will run on any POWER or PowerPC processor.
-GCC will use only the instructions in the common subset of both
-architectures, and will not use the MQ register. GCC assumes a generic
-processor model for scheduling purposes.
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Tells the compiler to perform function calls by first loading the
+address of the function into a register and then performing a subroutine
+call on this register. This switch is needed if the target function
+will lie outside of the 24 bit addressing range of the offset based
+version of subroutine call instruction.
-@option{-mcpu=power}, @option{-mcpu=power2}, @option{-mcpu=powerpc}, and
-@option{-mcpu=powerpc64} specify generic POWER, POWER2, pure 32-bit
-PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
-types, with an appropriate, generic processor model assumed for
-scheduling purposes.
+This feature is not enabled by default. Specifying
+@option{-mno-long-calls} will restore the default behavior. Note these
+switches have no effect on how the compiler generates code to handle
+function calls via function pointers.
+@end table
-The other options specify a specific processor. Code generated under
-those options will run best on that processor, and may not run at all on
-others.
+@node CRIS Options
+@subsection CRIS Options
+@cindex CRIS Options
-The @option{-mcpu} options automatically enable or disable the
-following options: @option{-maltivec}, @option{-mhard-float},
-@option{-mmfcrf}, @option{-mmultiple}, @option{-mnew-mnemonics},
-@option{-mpower}, @option{-mpower2}, @option{-mpowerpc64},
-@option{-mpowerpc-gpopt}, @option{-mpowerpc-gfxopt},
-@option{-mstring}. The particular options set for any particular CPU
-will vary between compiler versions, depending on what setting seems
-to produce optimal code for that CPU; it doesn't necessarily reflect
-the actual hardware's capabilities. If you wish to set an individual
-option to a particular value, you may specify it after the
-@option{-mcpu} option, like @samp{-mcpu=970 -mno-altivec}.
+These options are defined specifically for the CRIS ports.
-On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are
-not enabled or disabled by the @option{-mcpu} option at present, since
-AIX does not have full support for these options. You may still
-enable or disable them individually if you're sure it'll work in your
-environment.
+@table @gcctabopt
+@item -march=@var{architecture-type}
+@itemx -mcpu=@var{architecture-type}
+@opindex march
+@opindex mcpu
+Generate code for the specified architecture. The choices for
+@var{architecture-type} are @samp{v3}, @samp{v8} and @samp{v10} for
+respectively ETRAX@w{ }4, ETRAX@w{ }100, and ETRAX@w{ }100@w{ }LX@.
+Default is @samp{v0} except for cris-axis-linux-gnu, where the default is
+@samp{v10}.
-@item -mtune=@var{cpu_type}
+@item -mtune=@var{architecture-type}
@opindex mtune
-Set the instruction scheduling parameters for machine type
-@var{cpu_type}, but do not set the architecture type, register usage, or
-choice of mnemonics, as @option{-mcpu=@var{cpu_type}} would. The same
-values for @var{cpu_type} are used for @option{-mtune} as for
-@option{-mcpu}. If both are specified, the code generated will use the
-architecture, registers, and mnemonics set by @option{-mcpu}, but the
-scheduling parameters set by @option{-mtune}.
-
-@item -maltivec
-@itemx -mno-altivec
-@opindex maltivec
-@opindex mno-altivec
-These switches enable or disable the use of built-in functions that
-allow access to the AltiVec instruction set. You may also need to set
-@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI
-enhancements.
-
-@item -mabi=spe
-@opindex mabi=spe
-Extend the current ABI with SPE ABI extensions. This does not change
-the default ABI, instead it adds the SPE ABI extensions to the current
-ABI@.
-
-@item -mabi=no-spe
-@opindex mabi=no-spe
-Disable Booke SPE ABI extensions for the current ABI.
-
-@item -misel=@var{yes/no}
-@itemx -misel
-@opindex misel
-This switch enables or disables the generation of ISEL instructions.
-
-@item -mspe=@var{yes/no}
-@itemx -mspe
-@opindex mspe
-This switch enables or disables the generation of SPE simd
-instructions.
-
-@item -mfloat-gprs=@var{yes/no}
-@itemx -mfloat-gprs
-@opindex mfloat-gprs
-This switch enables or disables the generation of floating point
-operations on the general purpose registers for architectures that
-support it. This option is currently only available on the MPC8540.
-
-@item -mfull-toc
-@itemx -mno-fp-in-toc
-@itemx -mno-sum-in-toc
-@itemx -mminimal-toc
-@opindex mfull-toc
-@opindex mno-fp-in-toc
-@opindex mno-sum-in-toc
-@opindex mminimal-toc
-Modify generation of the TOC (Table Of Contents), which is created for
-every executable file. The @option{-mfull-toc} option is selected by
-default. In that case, GCC will allocate at least one TOC entry for
-each unique non-automatic variable reference in your program. GCC
-will also place floating-point constants in the TOC@. However, only
-16,384 entries are available in the TOC@.
-
-If you receive a linker error message that saying you have overflowed
-the available TOC space, you can reduce the amount of TOC space used
-with the @option{-mno-fp-in-toc} and @option{-mno-sum-in-toc} options.
-@option{-mno-fp-in-toc} prevents GCC from putting floating-point
-constants in the TOC and @option{-mno-sum-in-toc} forces GCC to
-generate code to calculate the sum of an address and a constant at
-run-time instead of putting that sum into the TOC@. You may specify one
-or both of these options. Each causes GCC to produce very slightly
-slower and larger code at the expense of conserving TOC space.
-
-If you still run out of space in the TOC even when you specify both of
-these options, specify @option{-mminimal-toc} instead. This option causes
-GCC to make only one TOC entry for every file. When you specify this
-option, GCC will produce code that is slower and larger but which
-uses extremely little TOC space. You may wish to use this option
-only on files that contain less frequently executed code.
-
-@item -maix64
-@itemx -maix32
-@opindex maix64
-@opindex maix32
-Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit
-@code{long} type, and the infrastructure needed to support them.
-Specifying @option{-maix64} implies @option{-mpowerpc64} and
-@option{-mpowerpc}, while @option{-maix32} disables the 64-bit ABI and
-implies @option{-mno-powerpc64}. GCC defaults to @option{-maix32}.
-
-@item -mxl-compat
-@itemx -mno-xl-compat
-@opindex mxl-compat
-@opindex mno-xl-compat
-Produce code that conforms more closely to IBM XLC semantics when using
-AIX-compatible ABI. Pass floating-point arguments to prototyped
-functions beyond the register save area (RSA) on the stack in addition
-to argument FPRs. Do not assume that most significant double in 128
-bit long double value is properly rounded when comparing values.
-
-The AIX calling convention was extended but not initially documented to
-handle an obscure K&R C case of calling a function that takes the
-address of its arguments with fewer arguments than declared. AIX XL
-compilers access floating point arguments which do not fit in the
-RSA from the stack when a subroutine is compiled without
-optimization. Because always storing floating-point arguments on the
-stack is inefficient and rarely needed, this option is not enabled by
-default and only is necessary when calling subroutines compiled by AIX
-XL compilers without optimization.
-
-@item -mpe
-@opindex mpe
-Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE)@. Link an
-application written to use message passing with special startup code to
-enable the application to run. The system must have PE installed in the
-standard location (@file{/usr/lpp/ppe.poe/}), or the @file{specs} file
-must be overridden with the @option{-specs=} option to specify the
-appropriate directory location. The Parallel Environment does not
-support threads, so the @option{-mpe} option and the @option{-pthread}
-option are incompatible.
-
-@item -malign-natural
-@itemx -malign-power
-@opindex malign-natural
-@opindex malign-power
-On AIX, Darwin, and 64-bit PowerPC GNU/Linux, the option
-@option{-malign-natural} overrides the ABI-defined alignment of larger
-types, such as floating-point doubles, on their natural size-based boundary.
-The option @option{-malign-power} instructs GCC to follow the ABI-specified
-alignment rules. GCC defaults to the standard alignment defined in the ABI.
-
-@item -msoft-float
-@itemx -mhard-float
-@opindex msoft-float
-@opindex mhard-float
-Generate code that does not use (uses) the floating-point register set.
-Software floating point emulation is provided if you use the
-@option{-msoft-float} option, and pass the option to GCC when linking.
-
-@item -mmultiple
-@itemx -mno-multiple
-@opindex mmultiple
-@opindex mno-multiple
-Generate code that uses (does not use) the load multiple word
-instructions and the store multiple word instructions. These
-instructions are generated by default on POWER systems, and not
-generated on PowerPC systems. Do not use @option{-mmultiple} on little
-endian PowerPC systems, since those instructions do not work when the
-processor is in little endian mode. The exceptions are PPC740 and
-PPC750 which permit the instructions usage in little endian mode.
-
-@item -mstring
-@itemx -mno-string
-@opindex mstring
-@opindex mno-string
-Generate code that uses (does not use) the load string instructions
-and the store string word instructions to save multiple registers and
-do small block moves. These instructions are generated by default on
-POWER systems, and not generated on PowerPC systems. Do not use
-@option{-mstring} on little endian PowerPC systems, since those
-instructions do not work when the processor is in little endian mode.
-The exceptions are PPC740 and PPC750 which permit the instructions
-usage in little endian mode.
-
-@item -mupdate
-@itemx -mno-update
-@opindex mupdate
-@opindex mno-update
-Generate code that uses (does not use) the load or store instructions
-that update the base register to the address of the calculated memory
-location. These instructions are generated by default. If you use
-@option{-mno-update}, there is a small window between the time that the
-stack pointer is updated and the address of the previous frame is
-stored, which means code that walks the stack frame across interrupts or
-signals may get corrupted data.
-
-@item -mfused-madd
-@itemx -mno-fused-madd
-@opindex mfused-madd
-@opindex mno-fused-madd
-Generate code that uses (does not use) the floating point multiply and
-accumulate instructions. These instructions are generated by default if
-hardware floating is used.
-
-@item -mno-bit-align
-@itemx -mbit-align
-@opindex mno-bit-align
-@opindex mbit-align
-On System V.4 and embedded PowerPC systems do not (do) force structures
-and unions that contain bit-fields to be aligned to the base type of the
-bit-field.
-
-For example, by default a structure containing nothing but 8
-@code{unsigned} bit-fields of length 1 would be aligned to a 4 byte
-boundary and have a size of 4 bytes. By using @option{-mno-bit-align},
-the structure would be aligned to a 1 byte boundary and be one byte in
-size.
-
-@item -mno-strict-align
-@itemx -mstrict-align
-@opindex mno-strict-align
-@opindex mstrict-align
-On System V.4 and embedded PowerPC systems do not (do) assume that
-unaligned memory references will be handled by the system.
-
-@item -mrelocatable
-@itemx -mno-relocatable
-@opindex mrelocatable
-@opindex mno-relocatable
-On embedded PowerPC systems generate code that allows (does not allow)
-the program to be relocated to a different address at runtime. If you
-use @option{-mrelocatable} on any module, all objects linked together must
-be compiled with @option{-mrelocatable} or @option{-mrelocatable-lib}.
-
-@item -mrelocatable-lib
-@itemx -mno-relocatable-lib
-@opindex mrelocatable-lib
-@opindex mno-relocatable-lib
-On embedded PowerPC systems generate code that allows (does not allow)
-the program to be relocated to a different address at runtime. Modules
-compiled with @option{-mrelocatable-lib} can be linked with either modules
-compiled without @option{-mrelocatable} and @option{-mrelocatable-lib} or
-with modules compiled with the @option{-mrelocatable} options.
-
-@item -mno-toc
-@itemx -mtoc
-@opindex mno-toc
-@opindex mtoc
-On System V.4 and embedded PowerPC systems do not (do) assume that
-register 2 contains a pointer to a global area pointing to the addresses
-used in the program.
-
-@item -mlittle
-@itemx -mlittle-endian
-@opindex mlittle
-@opindex mlittle-endian
-On System V.4 and embedded PowerPC systems compile code for the
-processor in little endian mode. The @option{-mlittle-endian} option is
-the same as @option{-mlittle}.
-
-@item -mbig
-@itemx -mbig-endian
-@opindex mbig
-@opindex mbig-endian
-On System V.4 and embedded PowerPC systems compile code for the
-processor in big endian mode. The @option{-mbig-endian} option is
-the same as @option{-mbig}.
-
-@item -mdynamic-no-pic
-@opindex mdynamic-no-pic
-On Darwin and Mac OS X systems, compile code so that it is not
-relocatable, but that its external references are relocatable. The
-resulting code is suitable for applications, but not shared
-libraries.
-
-@item -mprioritize-restricted-insns=@var{priority}
-@opindex mprioritize-restricted-insns
-This option controls the priority that is assigned to
-dispatch-slot restricted instructions during the second scheduling
-pass. The argument @var{priority} takes the value @var{0/1/2} to assign
-@var{no/highest/second-highest} priority to dispatch slot restricted
-instructions.
-
-@item -msched-costly-dep=@var{dependence_type}
-@opindex msched-costly-dep
-This option controls which dependences are considered costly
-by the target during instruction scheduling. The argument
-@var{dependence_type} takes one of the following values:
-@var{no}: no dependence is costly,
-@var{all}: all dependences are costly,
-@var{true_store_to_load}: a true dependence from store to load is costly,
-@var{store_to_load}: any dependence from store to load is costly,
-@var{number}: any dependence which latency >= @var{number} is costly.
-
-@item -minsert-sched-nops=@var{scheme}
-@opindex minsert-sched-nops
-This option controls which nop insertion scheme will be used during
-the second scheduling pass. The argument @var{scheme} takes one of the
-following values:
-@var{no}: Don't insert nops.
-@var{pad}: Pad with nops any dispatch group which has vacant issue slots,
-according to the scheduler's grouping.
-@var{regroup_exact}: Insert nops to force costly dependent insns into
-separate groups. Insert exactly as many nops as needed to force an insn
-to a new group, according to the estimated processor grouping.
-@var{number}: Insert nops to force costly dependent insns into
-separate groups. Insert @var{number} nops to force an insn to a new group.
-
-@item -mcall-sysv
-@opindex mcall-sysv
-On System V.4 and embedded PowerPC systems compile code using calling
-conventions that adheres to the March 1995 draft of the System V
-Application Binary Interface, PowerPC processor supplement. This is the
-default unless you configured GCC using @samp{powerpc-*-eabiaix}.
-
-@item -mcall-sysv-eabi
-@opindex mcall-sysv-eabi
-Specify both @option{-mcall-sysv} and @option{-meabi} options.
-
-@item -mcall-sysv-noeabi
-@opindex mcall-sysv-noeabi
-Specify both @option{-mcall-sysv} and @option{-mno-eabi} options.
-
-@item -mcall-solaris
-@opindex mcall-solaris
-On System V.4 and embedded PowerPC systems compile code for the Solaris
-operating system.
-
-@item -mcall-linux
-@opindex mcall-linux
-On System V.4 and embedded PowerPC systems compile code for the
-Linux-based GNU system.
-
-@item -mcall-gnu
-@opindex mcall-gnu
-On System V.4 and embedded PowerPC systems compile code for the
-Hurd-based GNU system.
-
-@item -mcall-netbsd
-@opindex mcall-netbsd
-On System V.4 and embedded PowerPC systems compile code for the
-NetBSD operating system.
-
-@item -maix-struct-return
-@opindex maix-struct-return
-Return all structures in memory (as specified by the AIX ABI)@.
-
-@item -msvr4-struct-return
-@opindex msvr4-struct-return
-Return structures smaller than 8 bytes in registers (as specified by the
-SVR4 ABI)@.
-
-@item -mabi=altivec
-@opindex mabi=altivec
-Extend the current ABI with AltiVec ABI extensions. This does not
-change the default ABI, instead it adds the AltiVec ABI extensions to
-the current ABI@.
-
-@item -mabi=no-altivec
-@opindex mabi=no-altivec
-Disable AltiVec ABI extensions for the current ABI.
+Tune to @var{architecture-type} everything applicable about the generated
+code, except for the ABI and the set of available instructions. The
+choices for @var{architecture-type} are the same as for
+@option{-march=@var{architecture-type}}.
-@item -mprototype
-@itemx -mno-prototype
-@opindex mprototype
-@opindex mno-prototype
-On System V.4 and embedded PowerPC systems assume that all calls to
-variable argument functions are properly prototyped. Otherwise, the
-compiler must insert an instruction before every non prototyped call to
-set or clear bit 6 of the condition code register (@var{CR}) to
-indicate whether floating point values were passed in the floating point
-registers in case the function takes a variable arguments. With
-@option{-mprototype}, only calls to prototyped variable argument functions
-will set or clear the bit.
+@item -mmax-stack-frame=@var{n}
+@opindex mmax-stack-frame
+Warn when the stack frame of a function exceeds @var{n} bytes.
-@item -msim
-@opindex msim
-On embedded PowerPC systems, assume that the startup module is called
-@file{sim-crt0.o} and that the standard C libraries are @file{libsim.a} and
-@file{libc.a}. This is the default for @samp{powerpc-*-eabisim}.
-configurations.
+@item -melinux-stacksize=@var{n}
+@opindex melinux-stacksize
+Only available with the @samp{cris-axis-aout} target. Arranges for
+indications in the program to the kernel loader that the stack of the
+program should be set to @var{n} bytes.
-@item -mmvme
-@opindex mmvme
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libmvme.a} and
-@file{libc.a}.
+@item -metrax4
+@itemx -metrax100
+@opindex metrax4
+@opindex metrax100
+The options @option{-metrax4} and @option{-metrax100} are synonyms for
+@option{-march=v3} and @option{-march=v8} respectively.
-@item -mads
-@opindex mads
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libads.a} and
-@file{libc.a}.
+@item -mmul-bug-workaround
+@itemx -mno-mul-bug-workaround
+@opindex mmul-bug-workaround
+@opindex mno-mul-bug-workaround
+Work around a bug in the @code{muls} and @code{mulu} instructions for CPU
+models where it applies. This option is active by default.
-@item -myellowknife
-@opindex myellowknife
-On embedded PowerPC systems, assume that the startup module is called
-@file{crt0.o} and the standard C libraries are @file{libyk.a} and
-@file{libc.a}.
+@item -mpdebug
+@opindex mpdebug
+Enable CRIS-specific verbose debug-related information in the assembly
+code. This option also has the effect to turn off the @samp{#NO_APP}
+formatted-code indicator to the assembler at the beginning of the
+assembly file.
-@item -mvxworks
-@opindex mvxworks
-On System V.4 and embedded PowerPC systems, specify that you are
-compiling for a VxWorks system.
+@item -mcc-init
+@opindex mcc-init
+Do not use condition-code results from previous instruction; always emit
+compare and test instructions before use of condition codes.
-@item -mwindiss
-@opindex mwindiss
-Specify that you are compiling for the WindISS simulation environment.
+@item -mno-side-effects
+@opindex mno-side-effects
+Do not emit instructions with side-effects in addressing modes other than
+post-increment.
-@item -memb
-@opindex memb
-On embedded PowerPC systems, set the @var{PPC_EMB} bit in the ELF flags
-header to indicate that @samp{eabi} extended relocations are used.
+@item -mstack-align
+@itemx -mno-stack-align
+@itemx -mdata-align
+@itemx -mno-data-align
+@itemx -mconst-align
+@itemx -mno-const-align
+@opindex mstack-align
+@opindex mno-stack-align
+@opindex mdata-align
+@opindex mno-data-align
+@opindex mconst-align
+@opindex mno-const-align
+These options (no-options) arranges (eliminate arrangements) for the
+stack-frame, individual data and constants to be aligned for the maximum
+single data access size for the chosen CPU model. The default is to
+arrange for 32-bit alignment. ABI details such as structure layout are
+not affected by these options.
-@item -meabi
-@itemx -mno-eabi
-@opindex meabi
-@opindex mno-eabi
-On System V.4 and embedded PowerPC systems do (do not) adhere to the
-Embedded Applications Binary Interface (eabi) which is a set of
-modifications to the System V.4 specifications. Selecting @option{-meabi}
-means that the stack is aligned to an 8 byte boundary, a function
-@code{__eabi} is called to from @code{main} to set up the eabi
-environment, and the @option{-msdata} option can use both @code{r2} and
-@code{r13} to point to two separate small data areas. Selecting
-@option{-mno-eabi} means that the stack is aligned to a 16 byte boundary,
-do not call an initialization function from @code{main}, and the
-@option{-msdata} option will only use @code{r13} to point to a single
-small data area. The @option{-meabi} option is on by default if you
-configured GCC using one of the @samp{powerpc*-*-eabi*} options.
+@item -m32-bit
+@itemx -m16-bit
+@itemx -m8-bit
+@opindex m32-bit
+@opindex m16-bit
+@opindex m8-bit
+Similar to the stack- data- and const-align options above, these options
+arrange for stack-frame, writable data and constants to all be 32-bit,
+16-bit or 8-bit aligned. The default is 32-bit alignment.
-@item -msdata=eabi
-@opindex msdata=eabi
-On System V.4 and embedded PowerPC systems, put small initialized
-@code{const} global and static data in the @samp{.sdata2} section, which
-is pointed to by register @code{r2}. Put small initialized
-non-@code{const} global and static data in the @samp{.sdata} section,
-which is pointed to by register @code{r13}. Put small uninitialized
-global and static data in the @samp{.sbss} section, which is adjacent to
-the @samp{.sdata} section. The @option{-msdata=eabi} option is
-incompatible with the @option{-mrelocatable} option. The
-@option{-msdata=eabi} option also sets the @option{-memb} option.
+@item -mno-prologue-epilogue
+@itemx -mprologue-epilogue
+@opindex mno-prologue-epilogue
+@opindex mprologue-epilogue
+With @option{-mno-prologue-epilogue}, the normal function prologue and
+epilogue that sets up the stack-frame are omitted and no return
+instructions or return sequences are generated in the code. Use this
+option only together with visual inspection of the compiled code: no
+warnings or errors are generated when call-saved registers must be saved,
+or storage for local variable needs to be allocated.
-@item -msdata=sysv
-@opindex msdata=sysv
-On System V.4 and embedded PowerPC systems, put small global and static
-data in the @samp{.sdata} section, which is pointed to by register
-@code{r13}. Put small uninitialized global and static data in the
-@samp{.sbss} section, which is adjacent to the @samp{.sdata} section.
-The @option{-msdata=sysv} option is incompatible with the
-@option{-mrelocatable} option.
+@item -mno-gotplt
+@itemx -mgotplt
+@opindex mno-gotplt
+@opindex mgotplt
+With @option{-fpic} and @option{-fPIC}, don't generate (do generate)
+instruction sequences that load addresses for functions from the PLT part
+of the GOT rather than (traditional on other architectures) calls to the
+PLT@. The default is @option{-mgotplt}.
-@item -msdata=default
-@itemx -msdata
-@opindex msdata=default
-@opindex msdata
-On System V.4 and embedded PowerPC systems, if @option{-meabi} is used,
-compile code the same as @option{-msdata=eabi}, otherwise compile code the
-same as @option{-msdata=sysv}.
+@item -maout
+@opindex maout
+Legacy no-op option only recognized with the cris-axis-aout target.
-@item -msdata-data
-@opindex msdata-data
-On System V.4 and embedded PowerPC systems, put small global and static
-data in the @samp{.sdata} section. Put small uninitialized global and
-static data in the @samp{.sbss} section. Do not use register @code{r13}
-to address small data however. This is the default behavior unless
-other @option{-msdata} options are used.
+@item -melf
+@opindex melf
+Legacy no-op option only recognized with the cris-axis-elf and
+cris-axis-linux-gnu targets.
-@item -msdata=none
-@itemx -mno-sdata
-@opindex msdata=none
-@opindex mno-sdata
-On embedded PowerPC systems, put all initialized global and static data
-in the @samp{.data} section, and all uninitialized data in the
-@samp{.bss} section.
+@item -melinux
+@opindex melinux
+Only recognized with the cris-axis-aout target, where it selects a
+GNU/linux-like multilib, include files and instruction set for
+@option{-march=v8}.
-@item -G @var{num}
-@opindex G
-@cindex smaller data references (PowerPC)
-@cindex .sdata/.sdata2 references (PowerPC)
-On embedded PowerPC systems, put global and static items less than or
-equal to @var{num} bytes into the small data or bss sections instead of
-the normal data or bss section. By default, @var{num} is 8. The
-@option{-G @var{num}} switch is also passed to the linker.
-All modules should be compiled with the same @option{-G @var{num}} value.
+@item -mlinux
+@opindex mlinux
+Legacy no-op option only recognized with the cris-axis-linux-gnu target.
-@item -mregnames
-@itemx -mno-regnames
-@opindex mregnames
-@opindex mno-regnames
-On System V.4 and embedded PowerPC systems do (do not) emit register
-names in the assembly language output using symbolic forms.
+@item -sim
+@opindex sim
+This option, recognized for the cris-axis-aout and cris-axis-elf arranges
+to link with input-output functions from a simulator library. Code,
+initialized data and zero-initialized data are allocated consecutively.
-@item -mlongcall
-@itemx -mno-longcall
-@opindex mlongcall
-@opindex mno-longcall
-Default to making all function calls via pointers, so that functions
-which reside further than 64 megabytes (67,108,864 bytes) from the
-current location can be called. This setting can be overridden by the
-@code{shortcall} function attribute, or by @code{#pragma longcall(0)}.
+@item -sim2
+@opindex sim2
+Like @option{-sim}, but pass linker options to locate initialized data at
+0x40000000 and zero-initialized data at 0x80000000.
+@end table
-Some linkers are capable of detecting out-of-range calls and generating
-glue code on the fly. On these systems, long calls are unnecessary and
-generate slower code. As of this writing, the AIX linker can do this,
-as can the GNU linker for PowerPC/64. It is planned to add this feature
-to the GNU linker for 32-bit PowerPC systems as well.
+@node CRX Options
+@subsection CRX Options
+@cindex CRX Options
-On Mach-O (Darwin) systems, this option directs the compiler emit to
-the glue for every direct call, and the Darwin linker decides whether
-to use or discard it.
+These options are defined specifically for the CRX ports.
-In the future, we may cause GCC to ignore all longcall specifications
-when the linker is known to generate glue.
+@table @gcctabopt
-@item -pthread
-@opindex pthread
-Adds support for multithreading with the @dfn{pthreads} library.
-This option sets flags for both the preprocessor and linker.
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+@item -mpush-args
+@opindex mpush-args
+Push instructions will be used to pass outgoing arguments when functions
+are called. Enabled by default.
@end table
@node Darwin Options
@@ -7598,9 +8111,112 @@ This option sets flags for both the preprocessor and linker.
@cindex Darwin options
These options are defined for all architectures running the Darwin operating
-system. They are useful for compatibility with other Mac OS compilers.
+system.
+
+FSF GCC on Darwin does not create ``fat'' object files; it will create
+an object file for the single architecture that it was built to
+target. Apple's GCC on Darwin does create ``fat'' files if multiple
+@option{-arch} options are used; it does so by running the compiler or
+linker multiple times and joining the results together with
+@file{lipo}.
+
+The subtype of the file created (like @samp{ppc7400} or @samp{ppc970} or
+@samp{i686}) is determined by the flags that specify the ISA
+that GCC is targetting, like @option{-mcpu} or @option{-march}. The
+@option{-force_cpusubtype_ALL} option can be used to override this.
+
+The Darwin tools vary in their behavior when presented with an ISA
+mismatch. The assembler, @file{as}, will only permit instructions to
+be used that are valid for the subtype of the file it is generating,
+so you cannot put 64-bit instructions in an @samp{ppc750} object file.
+The linker for shared libraries, @file{/usr/bin/libtool}, will fail
+and print an error if asked to create a shared library with a less
+restrictive subtype than its input files (for instance, trying to put
+a @samp{ppc970} object file in a @samp{ppc7400} library). The linker
+for executables, @file{ld}, will quietly give the executable the most
+restrictive subtype of any of its input files.
@table @gcctabopt
+@item -F@var{dir}
+@opindex F
+Add the framework directory @var{dir} to the head of the list of
+directories to be searched for header files. These directories are
+interleaved with those specified by @option{-I} options and are
+scanned in a left-to-right order.
+
+A framework directory is a directory with frameworks in it. A
+framework is a directory with a @samp{"Headers"} and/or
+@samp{"PrivateHeaders"} directory contained directly in it that ends
+in @samp{".framework"}. The name of a framework is the name of this
+directory excluding the @samp{".framework"}. Headers associated with
+the framework are found in one of those two directories, with
+@samp{"Headers"} being searched first. A subframework is a framework
+directory that is in a framework's @samp{"Frameworks"} directory.
+Includes of subframework headers can only appear in a header of a
+framework that contains the subframework, or in a sibling subframework
+header. Two subframeworks are siblings if they occur in the same
+framework. A subframework should not have the same name as a
+framework, a warning will be issued if this is violated. Currently a
+subframework cannot have subframeworks, in the future, the mechanism
+may be extended to support this. The standard frameworks can be found
+in @samp{"/System/Library/Frameworks"} and
+@samp{"/Library/Frameworks"}. An example include looks like
+@code{#include <Framework/header.h>}, where @samp{Framework} denotes
+the name of the framework and header.h is found in the
+@samp{"PrivateHeaders"} or @samp{"Headers"} directory.
+
+@item -gused
+@opindex gused
+Emit debugging information for symbols that are used. For STABS
+debugging format, this enables @option{-feliminate-unused-debug-symbols}.
+This is by default ON@.
+
+@item -gfull
+@opindex gfull
+Emit debugging information for all symbols and types.
+
+@item -mmacosx-version-min=@var{version}
+The earliest version of MacOS X that this executable will run on
+is @var{version}. Typical values of @var{version} include @code{10.1},
+@code{10.2}, and @code{10.3.9}.
+
+The default for this option is to make choices that seem to be most
+useful.
+
+@item -mkernel
+@opindex mkernel
+Enable kernel development mode. The @option{-mkernel} option sets
+@option{-static}, @option{-fno-common}, @option{-fno-cxa-atexit},
+@option{-fno-exceptions}, @option{-fno-non-call-exceptions},
+@option{-fapple-kext}, @option{-fno-weak} and @option{-fno-rtti} where
+applicable. This mode also sets @option{-mno-altivec},
+@option{-msoft-float}, @option{-fno-builtin} and
+@option{-mlong-branch} for PowerPC targets.
+
+@item -mone-byte-bool
+@opindex mone-byte-bool
+Override the defaults for @samp{bool} so that @samp{sizeof(bool)==1}.
+By default @samp{sizeof(bool)} is @samp{4} when compiling for
+Darwin/PowerPC and @samp{1} when compiling for Darwin/x86, so this
+option has no effect on x86.
+
+@strong{Warning:} The @option{-mone-byte-bool} switch causes GCC
+to generate code that is not binary compatible with code generated
+without that switch. Using this switch may require recompiling all
+other modules in a program, including system libraries. Use this
+switch to conform to a non-default data model.
+
+@item -mfix-and-continue
+@itemx -ffix-and-continue
+@itemx -findirect-data
+@opindex mfix-and-continue
+@opindex ffix-and-continue
+@opindex findirect-data
+Generate code suitable for fast turn around development. Needed to
+enable gdb to dynamically load @code{.o} files into already running
+programs. @option{-findirect-data} and @option{-ffix-and-continue}
+are provided for backwards compatibility.
+
@item -all_load
@opindex all_load
Loads all members of static archive libraries.
@@ -7623,24 +8239,31 @@ See man ld(1) for more information.
@item -bundle_loader @var{executable}
@opindex bundle_loader
-This specifies the @var{executable} that will be loading the build
-output file being linked. See man ld(1) for more information.
+This option specifies the @var{executable} that will be loading the build
+output file being linked. See man ld(1) for more information.
-@item -allowable_client @var{client_name}
-@itemx -arch_only
+@item -dynamiclib
+@opindex dynamiclib
+When passed this option, GCC will produce a dynamic library instead of
+an executable when linking, using the Darwin @file{libtool} command.
+@item -force_cpusubtype_ALL
+@opindex force_cpusubtype_ALL
+This causes GCC's output file to have the @var{ALL} subtype, instead of
+one controlled by the @option{-mcpu} or @option{-march} option.
+
+@item -allowable_client @var{client_name}
@itemx -client_name
@itemx -compatibility_version
@itemx -current_version
+@itemx -dead_strip
@itemx -dependency-file
@itemx -dylib_file
@itemx -dylinker_install_name
@itemx -dynamic
-@itemx -dynamiclib
@itemx -exported_symbols_list
@itemx -filelist
@itemx -flat_namespace
-@itemx -force_cpusubtype_ALL
@itemx -force_flat_namespace
@itemx -headerpad_max_install_names
@itemx -image_base
@@ -7651,6 +8274,7 @@ output file being linked. See man ld(1) for more information.
@itemx -multiply_defined
@itemx -multiply_defined_unused
@itemx -noall_load
+@itemx -no_dead_strip_inits_and_terms
@itemx -nofixprebinding
@itemx -nomultidefs
@itemx -noprebind
@@ -7667,6 +8291,9 @@ output file being linked. See man ld(1) for more information.
@itemx -sectcreate
@itemx -sectobjectsymbols
@itemx -sectorder
+@itemx -segaddr
+@itemx -segs_read_only_addr
+@itemx -segs_read_write_addr
@itemx -seg_addr_table
@itemx -seg_addr_table_filename
@itemx -seglinkedit
@@ -7685,19 +8312,17 @@ output file being linked. See man ld(1) for more information.
@itemx -whatsloaded
@opindex allowable_client
-@opindex arch_only
@opindex client_name
@opindex compatibility_version
@opindex current_version
+@opindex dead_strip
@opindex dependency-file
@opindex dylib_file
@opindex dylinker_install_name
@opindex dynamic
-@opindex dynamiclib
@opindex exported_symbols_list
@opindex filelist
@opindex flat_namespace
-@opindex force_cpusubtype_ALL
@opindex force_flat_namespace
@opindex headerpad_max_install_names
@opindex image_base
@@ -7708,6 +8333,7 @@ output file being linked. See man ld(1) for more information.
@opindex multiply_defined
@opindex multiply_defined_unused
@opindex noall_load
+@opindex no_dead_strip_inits_and_terms
@opindex nofixprebinding
@opindex nomultidefs
@opindex noprebind
@@ -7724,6 +8350,9 @@ output file being linked. See man ld(1) for more information.
@opindex sectcreate
@opindex sectobjectsymbols
@opindex sectorder
+@opindex segaddr
+@opindex segs_read_only_addr
+@opindex segs_read_write_addr
@opindex seg_addr_table
@opindex seg_addr_table_filename
@opindex seglinkedit
@@ -7741,387 +8370,932 @@ output file being linked. See man ld(1) for more information.
@opindex weak_reference_mismatches
@opindex whatsloaded
-These options are available for Darwin linker. Darwin linker man page
+These options are passed to the Darwin linker. The Darwin linker man page
describes them in detail.
@end table
+@node DEC Alpha Options
+@subsection DEC Alpha Options
-@node MIPS Options
-@subsection MIPS Options
-@cindex MIPS options
+These @samp{-m} options are defined for the DEC Alpha implementations:
@table @gcctabopt
+@item -mno-soft-float
+@itemx -msoft-float
+@opindex mno-soft-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions for
+floating-point operations. When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations. Unless they are replaced by routines that emulate the
+floating-point operations, or compiled in such a way as to call such
+emulations routines, these routines will issue floating-point
+operations. If you are compiling for an Alpha without floating-point
+operations, you must ensure that the library is built so as not to call
+them.
-@item -EB
-@opindex EB
-Generate big-endian code.
+Note that Alpha implementations without floating-point operations are
+required to have floating-point registers.
-@item -EL
-@opindex EL
-Generate little-endian code. This is the default for @samp{mips*el-*-*}
-configurations.
+@item -mfp-reg
+@itemx -mno-fp-regs
+@opindex mfp-reg
+@opindex mno-fp-regs
+Generate code that uses (does not use) the floating-point register set.
+@option{-mno-fp-regs} implies @option{-msoft-float}. If the floating-point
+register set is not used, floating point operands are passed in integer
+registers as if they were integers and floating-point results are passed
+in @code{$0} instead of @code{$f0}. This is a non-standard calling sequence,
+so any function with a floating-point argument or return value called by code
+compiled with @option{-mno-fp-regs} must also be compiled with that
+option.
-@item -march=@var{arch}
-@opindex march
-Generate code that will run on @var{arch}, which can be the name of a
-generic MIPS ISA, or the name of a particular processor.
-The ISA names are:
-@samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4},
-@samp{mips32}, @samp{mips32r2}, and @samp{mips64}.
-The processor names are:
-@samp{4kc}, @samp{4kp}, @samp{5kc}, @samp{20kc},
-@samp{m4k},
-@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
-@samp{r4600}, @samp{r4650}, @samp{r6000}, @samp{r8000}, @samp{rm7000},
-@samp{rm9000},
-@samp{orion},
-@samp{sb1},
-@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4300},
-@samp{vr5000}, @samp{vr5400} and @samp{vr5500}.
-The special value @samp{from-abi} selects the
-most compatible architecture for the selected ABI (that is,
-@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
+A typical use of this option is building a kernel that does not use,
+and hence need not save and restore, any floating-point registers.
-In processor names, a final @samp{000} can be abbreviated as @samp{k}
-(for example, @samp{-march=r2k}). Prefixes are optional, and
-@samp{vr} may be written @samp{r}.
+@item -mieee
+@opindex mieee
+The Alpha architecture implements floating-point hardware optimized for
+maximum performance. It is mostly compliant with the IEEE floating
+point standard. However, for full compliance, software assistance is
+required. This option generates code fully IEEE compliant code
+@emph{except} that the @var{inexact-flag} is not maintained (see below).
+If this option is turned on, the preprocessor macro @code{_IEEE_FP} is
+defined during compilation. The resulting code is less efficient but is
+able to correctly support denormalized numbers and exceptional IEEE
+values such as not-a-number and plus/minus infinity. Other Alpha
+compilers call this option @option{-ieee_with_no_inexact}.
-GCC defines two macros based on the value of this option. The first
-is @samp{_MIPS_ARCH}, which gives the name of target architecture, as
-a string. The second has the form @samp{_MIPS_ARCH_@var{foo}},
-where @var{foo} is the capitalized value of @samp{_MIPS_ARCH}@.
-For example, @samp{-march=r2000} will set @samp{_MIPS_ARCH}
-to @samp{"r2000"} and define the macro @samp{_MIPS_ARCH_R2000}.
+@item -mieee-with-inexact
+@opindex mieee-with-inexact
+This is like @option{-mieee} except the generated code also maintains
+the IEEE @var{inexact-flag}. Turning on this option causes the
+generated code to implement fully-compliant IEEE math. In addition to
+@code{_IEEE_FP}, @code{_IEEE_FP_EXACT} is defined as a preprocessor
+macro. On some Alpha implementations the resulting code may execute
+significantly slower than the code generated by default. Since there is
+very little code that depends on the @var{inexact-flag}, you should
+normally not specify this option. Other Alpha compilers call this
+option @option{-ieee_with_inexact}.
-Note that the @samp{_MIPS_ARCH} macro uses the processor names given
-above. In other words, it will have the full prefix and will not
-abbreviate @samp{000} as @samp{k}. In the case of @samp{from-abi},
-the macro names the resolved architecture (either @samp{"mips1"} or
-@samp{"mips3"}). It names the default architecture when no
-@option{-march} option is given.
+@item -mfp-trap-mode=@var{trap-mode}
+@opindex mfp-trap-mode
+This option controls what floating-point related traps are enabled.
+Other Alpha compilers call this option @option{-fptm @var{trap-mode}}.
+The trap mode can be set to one of four values:
-@item -mtune=@var{arch}
-@opindex mtune
-Optimize for @var{arch}. Among other things, this option controls
-the way instructions are scheduled, and the perceived cost of arithmetic
-operations. The list of @var{arch} values is the same as for
-@option{-march}.
+@table @samp
+@item n
+This is the default (normal) setting. The only traps that are enabled
+are the ones that cannot be disabled in software (e.g., division by zero
+trap).
-When this option is not used, GCC will optimize for the processor
-specified by @option{-march}. By using @option{-march} and
-@option{-mtune} together, it is possible to generate code that will
-run on a family of processors, but optimize the code for one
-particular member of that family.
+@item u
+In addition to the traps enabled by @samp{n}, underflow traps are enabled
+as well.
-@samp{-mtune} defines the macros @samp{_MIPS_TUNE} and
-@samp{_MIPS_TUNE_@var{foo}}, which work in the same way as the
-@samp{-march} ones described above.
+@item su
+Like @samp{u}, but the instructions are marked to be safe for software
+completion (see Alpha architecture manual for details).
-@item -mips1
-@opindex mips1
-Equivalent to @samp{-march=mips1}.
+@item sui
+Like @samp{su}, but inexact traps are enabled as well.
+@end table
-@item -mips2
-@opindex mips2
-Equivalent to @samp{-march=mips2}.
+@item -mfp-rounding-mode=@var{rounding-mode}
+@opindex mfp-rounding-mode
+Selects the IEEE rounding mode. Other Alpha compilers call this option
+@option{-fprm @var{rounding-mode}}. The @var{rounding-mode} can be one
+of:
-@item -mips3
-@opindex mips3
-Equivalent to @samp{-march=mips3}.
+@table @samp
+@item n
+Normal IEEE rounding mode. Floating point numbers are rounded towards
+the nearest machine number or towards the even machine number in case
+of a tie.
-@item -mips4
-@opindex mips4
-Equivalent to @samp{-march=mips4}.
+@item m
+Round towards minus infinity.
-@item -mips32
-@opindex mips32
-Equivalent to @samp{-march=mips32}.
+@item c
+Chopped rounding mode. Floating point numbers are rounded towards zero.
-@item -mips32r2
-@opindex mips32r2
-Equivalent to @samp{-march=mips32r2}.
+@item d
+Dynamic rounding mode. A field in the floating point control register
+(@var{fpcr}, see Alpha architecture reference manual) controls the
+rounding mode in effect. The C library initializes this register for
+rounding towards plus infinity. Thus, unless your program modifies the
+@var{fpcr}, @samp{d} corresponds to round towards plus infinity.
+@end table
-@item -mips64
-@opindex mips64
-Equivalent to @samp{-march=mips64}.
+@item -mtrap-precision=@var{trap-precision}
+@opindex mtrap-precision
+In the Alpha architecture, floating point traps are imprecise. This
+means without software assistance it is impossible to recover from a
+floating trap and program execution normally needs to be terminated.
+GCC can generate code that can assist operating system trap handlers
+in determining the exact location that caused a floating point trap.
+Depending on the requirements of an application, different levels of
+precisions can be selected:
-@item -mips16
-@itemx -mno-mips16
-@opindex mips16
-@opindex mno-mips16
-Use (do not use) the MIPS16 ISA.
+@table @samp
+@item p
+Program precision. This option is the default and means a trap handler
+can only identify which program caused a floating point exception.
-@item -mabi=32
-@itemx -mabi=o64
-@itemx -mabi=n32
-@itemx -mabi=64
-@itemx -mabi=eabi
-@opindex mabi=32
-@opindex mabi=o64
-@opindex mabi=n32
-@opindex mabi=64
-@opindex mabi=eabi
-Generate code for the given ABI@.
+@item f
+Function precision. The trap handler can determine the function that
+caused a floating point exception.
-Note that the EABI has a 32-bit and a 64-bit variant. GCC normally
-generates 64-bit code when you select a 64-bit architecture, but you
-can use @option{-mgp32} to get 32-bit code instead.
+@item i
+Instruction precision. The trap handler can determine the exact
+instruction that caused a floating point exception.
+@end table
-@item -mabicalls
-@itemx -mno-abicalls
-@opindex mabicalls
-@opindex mno-abicalls
-Generate (do not generate) SVR4-style position-independent code.
-@option{-mabicalls} is the default for SVR4-based systems.
+Other Alpha compilers provide the equivalent options called
+@option{-scope_safe} and @option{-resumption_safe}.
-@item -mxgot
-@itemx -mno-xgot
-@opindex mxgot
-@opindex mno-xgot
-Lift (do not lift) the usual restrictions on the size of the global
-offset table.
+@item -mieee-conformant
+@opindex mieee-conformant
+This option marks the generated code as IEEE conformant. You must not
+use this option unless you also specify @option{-mtrap-precision=i} and either
+@option{-mfp-trap-mode=su} or @option{-mfp-trap-mode=sui}. Its only effect
+is to emit the line @samp{.eflag 48} in the function prologue of the
+generated assembly file. Under DEC Unix, this has the effect that
+IEEE-conformant math library routines will be linked in.
-GCC normally uses a single instruction to load values from the GOT.
-While this is relatively efficient, it will only work if the GOT
-is smaller than about 64k. Anything larger will cause the linker
-to report an error such as:
+@item -mbuild-constants
+@opindex mbuild-constants
+Normally GCC examines a 32- or 64-bit integer constant to
+see if it can construct it from smaller constants in two or three
+instructions. If it cannot, it will output the constant as a literal and
+generate code to load it from the data segment at runtime.
-@cindex relocation truncated to fit (MIPS)
-@smallexample
-relocation truncated to fit: R_MIPS_GOT16 foobar
-@end smallexample
+Use this option to require GCC to construct @emph{all} integer constants
+using code, even if it takes more instructions (the maximum is six).
-If this happens, you should recompile your code with @option{-mxgot}.
-It should then work with very large GOTs, although it will also be
-less efficient, since it will take three instructions to fetch the
-value of a global symbol.
+You would typically use this option to build a shared library dynamic
+loader. Itself a shared library, it must relocate itself in memory
+before it can find the variables and constants in its own data segment.
-Note that some linkers can create multiple GOTs. If you have such a
-linker, you should only need to use @option{-mxgot} when a single object
-file accesses more than 64k's worth of GOT entries. Very few do.
+@item -malpha-as
+@itemx -mgas
+@opindex malpha-as
+@opindex mgas
+Select whether to generate code to be assembled by the vendor-supplied
+assembler (@option{-malpha-as}) or by the GNU assembler @option{-mgas}.
-These options have no effect unless GCC is generating position
-independent code.
+@item -mbwx
+@itemx -mno-bwx
+@itemx -mcix
+@itemx -mno-cix
+@itemx -mfix
+@itemx -mno-fix
+@itemx -mmax
+@itemx -mno-max
+@opindex mbwx
+@opindex mno-bwx
+@opindex mcix
+@opindex mno-cix
+@opindex mfix
+@opindex mno-fix
+@opindex mmax
+@opindex mno-max
+Indicate whether GCC should generate code to use the optional BWX,
+CIX, FIX and MAX instruction sets. The default is to use the instruction
+sets supported by the CPU type specified via @option{-mcpu=} option or that
+of the CPU on which GCC was built if none was specified.
-@item -membedded-pic
-@itemx -mno-embedded-pic
-@opindex membedded-pic
-@opindex mno-embedded-pic
-Generate (do not generate) position-independent code suitable for some
-embedded systems. All calls are made using PC relative addresses, and
-all data is addressed using the $gp register. No more than 65536
-bytes of global data may be used. This requires GNU as and GNU ld,
-which do most of the work.
+@item -mfloat-vax
+@itemx -mfloat-ieee
+@opindex mfloat-vax
+@opindex mfloat-ieee
+Generate code that uses (does not use) VAX F and G floating point
+arithmetic instead of IEEE single and double precision.
-@item -mgp32
-@opindex mgp32
-Assume that general-purpose registers are 32 bits wide.
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Older Alpha assemblers provided no way to generate symbol relocations
+except via assembler macros. Use of these macros does not allow
+optimal instruction scheduling. GNU binutils as of version 2.12
+supports a new syntax that allows the compiler to explicitly mark
+which relocations should apply to which instructions. This option
+is mostly useful for debugging, as GCC detects the capabilities of
+the assembler when it is built and sets the default accordingly.
-@item -mgp64
-@opindex mgp64
-Assume that general-purpose registers are 64 bits wide.
+@item -msmall-data
+@itemx -mlarge-data
+@opindex msmall-data
+@opindex mlarge-data
+When @option{-mexplicit-relocs} is in effect, static data is
+accessed via @dfn{gp-relative} relocations. When @option{-msmall-data}
+is used, objects 8 bytes long or smaller are placed in a @dfn{small data area}
+(the @code{.sdata} and @code{.sbss} sections) and are accessed via
+16-bit relocations off of the @code{$gp} register. This limits the
+size of the small data area to 64KB, but allows the variables to be
+directly accessed via a single instruction.
-@item -mfp32
-@opindex mfp32
-Assume that floating-point registers are 32 bits wide.
+The default is @option{-mlarge-data}. With this option the data area
+is limited to just below 2GB@. Programs that require more than 2GB of
+data must use @code{malloc} or @code{mmap} to allocate the data in the
+heap instead of in the program's data segment.
-@item -mfp64
-@opindex mfp64
-Assume that floating-point registers are 64 bits wide.
+When generating code for shared libraries, @option{-fpic} implies
+@option{-msmall-data} and @option{-fPIC} implies @option{-mlarge-data}.
+
+@item -msmall-text
+@itemx -mlarge-text
+@opindex msmall-text
+@opindex mlarge-text
+When @option{-msmall-text} is used, the compiler assumes that the
+code of the entire program (or shared library) fits in 4MB, and is
+thus reachable with a branch instruction. When @option{-msmall-data}
+is used, the compiler can assume that all local symbols share the
+same @code{$gp} value, and thus reduce the number of instructions
+required for a function call from 4 to 1.
+
+The default is @option{-mlarge-text}.
+
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set the instruction set and instruction scheduling parameters for
+machine type @var{cpu_type}. You can specify either the @samp{EV}
+style name or the corresponding chip number. GCC supports scheduling
+parameters for the EV4, EV5 and EV6 family of processors and will
+choose the default values for the instruction set from the processor
+you specify. If you do not specify a processor type, GCC will default
+to the processor on which the compiler was built.
+
+Supported values for @var{cpu_type} are
+
+@table @samp
+@item ev4
+@itemx ev45
+@itemx 21064
+Schedules as an EV4 and has no instruction set extensions.
+
+@item ev5
+@itemx 21164
+Schedules as an EV5 and has no instruction set extensions.
+
+@item ev56
+@itemx 21164a
+Schedules as an EV5 and supports the BWX extension.
+
+@item pca56
+@itemx 21164pc
+@itemx 21164PC
+Schedules as an EV5 and supports the BWX and MAX extensions.
+
+@item ev6
+@itemx 21264
+Schedules as an EV6 and supports the BWX, FIX, and MAX extensions.
+
+@item ev67
+@itemx 21264a
+Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX extensions.
+@end table
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set only the instruction scheduling parameters for machine type
+@var{cpu_type}. The instruction set is not changed.
+
+@item -mmemory-latency=@var{time}
+@opindex mmemory-latency
+Sets the latency the scheduler should assume for typical memory
+references as seen by the application. This number is highly
+dependent on the memory access patterns used by the application
+and the size of the external cache on the machine.
+
+Valid options for @var{time} are
+
+@table @samp
+@item @var{number}
+A decimal number representing clock cycles.
+
+@item L1
+@itemx L2
+@itemx L3
+@itemx main
+The compiler contains estimates of the number of clock cycles for
+``typical'' EV4 & EV5 hardware for the Level 1, 2 & 3 caches
+(also called Dcache, Scache, and Bcache), as well as to main memory.
+Note that L3 is only valid for EV5.
+
+@end table
+@end table
+
+@node DEC Alpha/VMS Options
+@subsection DEC Alpha/VMS Options
+
+These @samp{-m} options are defined for the DEC Alpha/VMS implementations:
+
+@table @gcctabopt
+@item -mvms-return-codes
+@opindex mvms-return-codes
+Return VMS condition codes from main. The default is to return POSIX
+style condition (e.g.@ error) codes.
+@end table
+
+@node FRV Options
+@subsection FRV Options
+@cindex FRV Options
+
+@table @gcctabopt
+@item -mgpr-32
+@opindex mgpr-32
+
+Only use the first 32 general purpose registers.
+
+@item -mgpr-64
+@opindex mgpr-64
+
+Use all 64 general purpose registers.
+
+@item -mfpr-32
+@opindex mfpr-32
+
+Use only the first 32 floating point registers.
+
+@item -mfpr-64
+@opindex mfpr-64
+
+Use all 64 floating point registers
@item -mhard-float
@opindex mhard-float
-Use floating-point coprocessor instructions.
+
+Use hardware instructions for floating point operations.
@item -msoft-float
@opindex msoft-float
-Do not use floating-point coprocessor instructions. Implement
-floating-point calculations using library calls instead.
-@item -msingle-float
-@opindex msingle-float
-Assume that the floating-point coprocessor only supports single-precision
-operations.
+Use library routines for floating point operations.
-@itemx -mdouble-float
-@opindex mdouble-float
-Assume that the floating-point coprocessor supports double-precision
-operations. This is the default.
+@item -malloc-cc
+@opindex malloc-cc
-@item -mint64
-@opindex mint64
-Force @code{int} and @code{long} types to be 64 bits wide. See
-@option{-mlong32} for an explanation of the default and the way
-that the pointer size is determined.
+Dynamically allocate condition code registers.
-@item -mlong64
-@opindex mlong64
-Force @code{long} types to be 64 bits wide. See @option{-mlong32} for
-an explanation of the default and the way that the pointer size is
-determined.
+@item -mfixed-cc
+@opindex mfixed-cc
-@item -mlong32
-@opindex mlong32
-Force @code{long}, @code{int}, and pointer types to be 32 bits wide.
+Do not try to dynamically allocate condition code registers, only
+use @code{icc0} and @code{fcc0}.
-The default size of @code{int}s, @code{long}s and pointers depends on
-the ABI@. All the supported ABIs use 32-bit @code{int}s. The n64 ABI
-uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
-32-bit @code{long}s. Pointers are the same size as @code{long}s,
-or the same size as integer registers, whichever is smaller.
+@item -mdword
+@opindex mdword
-@item -G @var{num}
-@opindex G
-@cindex smaller data references (MIPS)
-@cindex gp-relative references (MIPS)
-Put global and static items less than or equal to @var{num} bytes into
-the small data or bss section instead of the normal data or bss section.
-This allows the data to be accessed using a single instruction.
+Change ABI to use double word insns.
-All modules should be compiled with the same @option{-G @var{num}}
-value.
+@item -mno-dword
+@opindex mno-dword
-@item -membedded-data
-@itemx -mno-embedded-data
-@opindex membedded-data
-@opindex mno-embedded-data
-Allocate variables to the read-only data section first if possible, then
-next in the small data section if possible, otherwise in data. This gives
-slightly slower code than the default, but reduces the amount of RAM required
-when executing, and thus may be preferred for some embedded systems.
+Do not use double word instructions.
-@item -muninit-const-in-rodata
-@itemx -mno-uninit-const-in-rodata
-@opindex muninit-const-in-rodata
-@opindex mno-uninit-const-in-rodata
-Put uninitialized @code{const} variables in the read-only data section.
-This option is only meaningful in conjunction with @option{-membedded-data}.
+@item -mdouble
+@opindex mdouble
-@item -msplit-addresses
-@itemx -mno-split-addresses
-@opindex msplit-addresses
-@opindex mno-split-addresses
-Enable (disable) use of the @code{%hi()} and @code{%lo()} assembler
-relocation operators. This option has been superceded by
-@option{-mexplicit-relocs} but is retained for backwards compatibility.
+Use floating point double instructions.
-@item -mexplicit-relocs
-@itemx -mno-explicit-relocs
-@opindex mexplicit-relocs
-@opindex mno-explicit-relocs
-Use (do not use) assembler relocation operators when dealing with symbolic
-addresses. The alternative, selected by @option{-mno-explicit-relocs},
-is to use assembler macros instead.
+@item -mno-double
+@opindex mno-double
-@option{-mexplicit-relocs} is usually the default if GCC was
-configured to use an assembler that supports relocation operators.
-However, there are two exceptions:
+Do not use floating point double instructions.
-@itemize @bullet
-@item
-GCC is not yet able to generate explicit relocations for the combination
-of @option{-mabi=64} and @option{-mno-abicalls}. This will be addressed
-in a future release.
+@item -mmedia
+@opindex mmedia
-@item
-The combination of @option{-mabicalls} and @option{-fno-unit-at-a-time}
-implies @option{-mno-explicit-relocs} unless explicitly overridden.
-This is because, when generating abicalls, the choice of relocation
-depends on whether a symbol is local or global. In some rare cases,
-GCC will not be able to decide this until the whole compilation unit
-has been read.
-@end itemize
+Use media instructions.
-@item -mrnames
-@itemx -mno-rnames
-@opindex mrnames
-@opindex mno-rnames
-Generate (do not generate) code that refers to registers using their
-software names. The default is @option{-mno-rnames}, which tells GCC
-to use hardware names like @samp{$4} instead of software names like
-@samp{a0}. The only assembler known to support @option{-rnames} is
-the Algorithmics assembler.
+@item -mno-media
+@opindex mno-media
-@item -mcheck-zero-division
-@itemx -mno-check-zero-division
-@opindex mcheck-zero-division
-@opindex mno-check-zero-division
-Trap (do not trap) on integer division by zero. The default is
-@option{-mcheck-zero-division}.
+Do not use media instructions.
-@item -mmemcpy
-@itemx -mno-memcpy
-@opindex mmemcpy
-@opindex mno-memcpy
-Force (do not force) the use of @code{memcpy()} for non-trivial block
-moves. The default is @option{-mno-memcpy}, which allows GCC to inline
-most constant-sized copies.
+@item -mmuladd
+@opindex mmuladd
+
+Use multiply and add/subtract instructions.
+
+@item -mno-muladd
+@opindex mno-muladd
+
+Do not use multiply and add/subtract instructions.
+
+@item -mfdpic
+@opindex mfdpic
+
+Select the FDPIC ABI, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE-related options, it
+implies @option{-fPIE}. With @option{-fpic} or @option{-fpie}, it
+assumes GOT entries and small data are within a 12-bit range from the
+GOT base address; with @option{-fPIC} or @option{-fPIE}, GOT offsets
+are computed with 32 bits.
+
+@item -minline-plt
+@opindex minline-plt
+
+Enable inlining of PLT entries in function calls to functions that are
+not known to bind locally. It has no effect without @option{-mfdpic}.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., @option{-fPIC} or @option{-fpic}), or when an
+optimization option such as @option{-O3} or above is present in the
+command line.
+
+@item -mTLS
+@opindex TLS
+
+Assume a large TLS segment when generating thread-local code.
+
+@item -mtls
+@opindex tls
+
+Do not assume a large TLS segment when generating thread-local code.
+
+@item -mgprel-ro
+@opindex mgprel-ro
+
+Enable the use of @code{GPREL} relocations in the FDPIC ABI for data
+that is known to be in read-only sections. It's enabled by default,
+except for @option{-fpic} or @option{-fpie}: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With @option{-fPIC} or @option{-fPIE}, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a GOT entry for the referenced symbol, so it's more likely to be a
+win. If it is not, @option{-mno-gprel-ro} can be used to disable it.
+
+@item -multilib-library-pic
+@opindex multilib-library-pic
+
+Link with the (library, not FD) pic libraries. It's implied by
+@option{-mlibrary-pic}, as well as by @option{-fPIC} and
+@option{-fpic} without @option{-mfdpic}. You should never have to use
+it explicitly.
+
+@item -mlinked-fp
+@opindex mlinked-fp
+
+Follow the EABI requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with @option{-mno-linked-fp}.
@item -mlong-calls
-@itemx -mno-long-calls
@opindex mlong-calls
+
+Use indirect addressing to call functions outside the current
+compilation unit. This allows the functions to be placed anywhere
+within the 32-bit address space.
+
+@item -malign-labels
+@opindex malign-labels
+
+Try to align labels to an 8-byte boundary by inserting nops into the
+previous packet. This option only has an effect when VLIW packing
+is enabled. It doesn't create new packets; it merely adds nops to
+existing ones.
+
+@item -mlibrary-pic
+@opindex mlibrary-pic
+
+Generate position-independent EABI code.
+
+@item -macc-4
+@opindex macc-4
+
+Use only the first four media accumulator registers.
+
+@item -macc-8
+@opindex macc-8
+
+Use all eight media accumulator registers.
+
+@item -mpack
+@opindex mpack
+
+Pack VLIW instructions.
+
+@item -mno-pack
+@opindex mno-pack
+
+Do not pack VLIW instructions.
+
+@item -mno-eflags
+@opindex mno-eflags
+
+Do not mark ABI switches in e_flags.
+
+@item -mcond-move
+@opindex mcond-move
+
+Enable the use of conditional-move instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-cond-move
+@opindex mno-cond-move
+
+Disable the use of conditional-move instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mscc
+@opindex mscc
+
+Enable the use of conditional set instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-scc
+@opindex mno-scc
+
+Disable the use of conditional set instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mcond-exec
+@opindex mcond-exec
+
+Enable the use of conditional execution (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-cond-exec
+@opindex mno-cond-exec
+
+Disable the use of conditional execution.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mvliw-branch
+@opindex mvliw-branch
+
+Run a pass to pack branches into VLIW instructions (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-vliw-branch
+@opindex mno-vliw-branch
+
+Do not run a pass to pack branches into VLIW instructions.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mmulti-cond-exec
+@opindex mmulti-cond-exec
+
+Enable optimization of @code{&&} and @code{||} in conditional execution
+(default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-multi-cond-exec
+@opindex mno-multi-cond-exec
+
+Disable optimization of @code{&&} and @code{||} in conditional execution.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mnested-cond-exec
+@opindex mnested-cond-exec
+
+Enable nested conditional execution optimizations (default).
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -mno-nested-cond-exec
+@opindex mno-nested-cond-exec
+
+Disable nested conditional execution optimizations.
+
+This switch is mainly for debugging the compiler and will likely be removed
+in a future version.
+
+@item -moptimize-membar
+@opindex moptimize-membar
+
+This switch removes redundant @code{membar} instructions from the
+compiler generated code. It is enabled by default.
+
+@item -mno-optimize-membar
+@opindex mno-optimize-membar
+
+This switch disables the automatic removal of redundant @code{membar}
+instructions from the generated code.
+
+@item -mtomcat-stats
+@opindex mtomcat-stats
+
+Cause gas to print out tomcat statistics.
+
+@item -mcpu=@var{cpu}
+@opindex mcpu
+
+Select the processor type for which to generate code. Possible values are
+@samp{frv}, @samp{fr550}, @samp{tomcat}, @samp{fr500}, @samp{fr450},
+@samp{fr405}, @samp{fr400}, @samp{fr300} and @samp{simple}.
+
+@end table
+
+@node GNU/Linux Options
+@subsection GNU/Linux Options
+
+These @samp{-m} options are defined for GNU/Linux targets:
+
+@table @gcctabopt
+@item -mglibc
+@opindex mglibc
+Use the GNU C library instead of uClibc. This is the default except
+on @samp{*-*-linux-*uclibc*} targets.
+
+@item -muclibc
+@opindex muclibc
+Use uClibc instead of the GNU C library. This is the default on
+@samp{*-*-linux-*uclibc*} targets.
+@end table
+
+@node H8/300 Options
+@subsection H8/300 Options
+
+These @samp{-m} options are defined for the H8/300 implementations:
+
+@table @gcctabopt
+@item -mrelax
+@opindex mrelax
+Shorten some address references at link time, when possible; uses the
+linker option @option{-relax}. @xref{H8/300,, @code{ld} and the H8/300,
+ld, Using ld}, for a fuller description.
+
+@item -mh
+@opindex mh
+Generate code for the H8/300H@.
+
+@item -ms
+@opindex ms
+Generate code for the H8S@.
+
+@item -mn
+@opindex mn
+Generate code for the H8S and H8/300H in the normal mode. This switch
+must be used either with @option{-mh} or @option{-ms}.
+
+@item -ms2600
+@opindex ms2600
+Generate code for the H8S/2600. This switch must be used with @option{-ms}.
+
+@item -mint32
+@opindex mint32
+Make @code{int} data 32 bits by default.
+
+@item -malign-300
+@opindex malign-300
+On the H8/300H and H8S, use the same alignment rules as for the H8/300.
+The default for the H8/300H and H8S is to align longs and floats on 4
+byte boundaries.
+@option{-malign-300} causes them to be aligned on 2 byte boundaries.
+This option has no effect on the H8/300.
+@end table
+
+@node HPPA Options
+@subsection HPPA Options
+@cindex HPPA Options
+
+These @samp{-m} options are defined for the HPPA family of computers:
+
+@table @gcctabopt
+@item -march=@var{architecture-type}
+@opindex march
+Generate code for the specified architecture. The choices for
+@var{architecture-type} are @samp{1.0} for PA 1.0, @samp{1.1} for PA
+1.1, and @samp{2.0} for PA 2.0 processors. Refer to
+@file{/usr/lib/sched.models} on an HP-UX system to determine the proper
+architecture option for your machine. Code compiled for lower numbered
+architectures will run on higher numbered architectures, but not the
+other way around.
+
+@item -mpa-risc-1-0
+@itemx -mpa-risc-1-1
+@itemx -mpa-risc-2-0
+@opindex mpa-risc-1-0
+@opindex mpa-risc-1-1
+@opindex mpa-risc-2-0
+Synonyms for @option{-march=1.0}, @option{-march=1.1}, and @option{-march=2.0} respectively.
+
+@item -mbig-switch
+@opindex mbig-switch
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+
+@item -mjump-in-delay
+@opindex mjump-in-delay
+Fill delay slots of function calls with unconditional jump instructions
+by modifying the return pointer for the function call to be the target
+of the conditional jump.
+
+@item -mdisable-fpregs
+@opindex mdisable-fpregs
+Prevent floating point registers from being used in any manner. This is
+necessary for compiling kernels which perform lazy context switching of
+floating point registers. If you use this option and attempt to perform
+floating point operations, the compiler will abort.
+
+@item -mdisable-indexing
+@opindex mdisable-indexing
+Prevent the compiler from using indexing address modes. This avoids some
+rather obscure problems when compiling MIG generated code under MACH@.
+
+@item -mno-space-regs
+@opindex mno-space-regs
+Generate code that assumes the target has no space registers. This allows
+GCC to generate faster indirect calls and use unscaled index address modes.
+
+Such code is suitable for level 0 PA systems and kernels.
+
+@item -mfast-indirect-calls
+@opindex mfast-indirect-calls
+Generate code that assumes calls never cross space boundaries. This
+allows GCC to emit code which performs faster indirect calls.
+
+This option will not work in the presence of shared libraries or nested
+functions.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+
+@item -mlong-load-store
+@opindex mlong-load-store
+Generate 3-instruction load and store sequences as sometimes required by
+the HP-UX 10 linker. This is equivalent to the @samp{+k} option to
+the HP compilers.
+
+@item -mportable-runtime
+@opindex mportable-runtime
+Use the portable calling conventions proposed by HP for ELF systems.
+
+@item -mgas
+@opindex mgas
+Enable the use of assembler directives only GAS understands.
+
+@item -mschedule=@var{cpu-type}
+@opindex mschedule
+Schedule code according to the constraints for the machine type
+@var{cpu-type}. The choices for @var{cpu-type} are @samp{700}
+@samp{7100}, @samp{7100LC}, @samp{7200}, @samp{7300} and @samp{8000}. Refer
+to @file{/usr/lib/sched.models} on an HP-UX system to determine the
+proper scheduling option for your machine. The default scheduling is
+@samp{8000}.
+
+@item -mlinker-opt
+@opindex mlinker-opt
+Enable the optimization pass in the HP-UX linker. Note this makes symbolic
+debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
+linkers in which they give bogus error messages when linking some programs.
+
+@item -msoft-float
+@opindex msoft-float
+Generate output containing library calls for floating point.
+@strong{Warning:} the requisite libraries are not available for all HPPA
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation. The embedded target @samp{hppa1.1-*-pro}
+does provide software floating point support.
+
+@option{-msoft-float} changes the calling convention in the output file;
+therefore, it is only useful if you compile @emph{all} of a program with
+this option. In particular, you need to compile @file{libgcc.a}, the
+library that comes with GCC, with @option{-msoft-float} in order for
+this to work.
+
+@item -msio
+@opindex msio
+Generate the predefine, @code{_SIO}, for server IO@. The default is
+@option{-mwsio}. This generates the predefines, @code{__hp9000s700},
+@code{__hp9000s700__} and @code{_WSIO}, for workstation IO@. These
+options are available under HP-UX and HI-UX@.
+
+@item -mgnu-ld
+@opindex gnu-ld
+Use GNU ld specific options. This passes @option{-shared} to ld when
+building a shared library. It is the default when GCC is configured,
+explicitly or implicitly, with the GNU linker. This option does not
+have any affect on which ld is called, it only changes what parameters
+are passed to that ld. The ld that is called is determined by the
+@option{--with-ld} configure option, GCC's program search path, and
+finally by the user's @env{PATH}. The linker used by GCC can be printed
+using @samp{which `gcc -print-prog-name=ld`}. This option is only available
+on the 64 bit HP-UX GCC, i.e. configured with @samp{hppa*64*-*-hpux*}.
+
+@item -mhp-ld
+@opindex hp-ld
+Use HP ld specific options. This passes @option{-b} to ld when building
+a shared library and passes @option{+Accept TypeMismatch} to ld on all
+links. It is the default when GCC is configured, explicitly or
+implicitly, with the HP linker. This option does not have any affect on
+which ld is called, it only changes what parameters are passed to that
+ld. The ld that is called is determined by the @option{--with-ld}
+configure option, GCC's program search path, and finally by the user's
+@env{PATH}. The linker used by GCC can be printed using @samp{which
+`gcc -print-prog-name=ld`}. This option is only available on the 64 bit
+HP-UX GCC, i.e. configured with @samp{hppa*64*-*-hpux*}.
+
+@item -mlong-calls
@opindex mno-long-calls
-Disable (do not disable) use of the @code{jal} instruction. Calling
-functions using @code{jal} is more efficient but requires the caller
-and callee to be in the same 256 megabyte segment.
+Generate code that uses long call sequences. This ensures that a call
+is always able to reach linker generated stubs. The default is to generate
+long calls only when the distance from the call site to the beginning
+of the function or translation unit, as the case may be, exceeds a
+predefined limit set by the branch type being used. The limits for
+normal calls are 7,600,000 and 240,000 bytes, respectively for the
+PA 2.0 and PA 1.X architectures. Sibcalls are always limited at
+240,000 bytes.
-This option has no effect on abicalls code. The default is
-@option{-mno-long-calls}.
+Distances are measured from the beginning of functions when using the
+@option{-ffunction-sections} option, or when using the @option{-mgas}
+and @option{-mno-portable-runtime} options together under HP-UX with
+the SOM linker.
-@item -mmad
-@itemx -mno-mad
-@opindex mmad
-@opindex mno-mad
-Enable (disable) use of the @code{mad}, @code{madu} and @code{mul}
-instructions, as provided by the R4650 ISA.
+It is normally not desirable to use this option as it will degrade
+performance. However, it may be useful in large applications,
+particularly when partial linking is used to build the application.
-@item -mfused-madd
-@itemx -mno-fused-madd
-@opindex mfused-madd
-@opindex mno-fused-madd
-Enable (disable) use of the floating point multiply-accumulate
-instructions, when they are available. The default is
-@option{-mfused-madd}.
+The types of long calls used depends on the capabilities of the
+assembler and linker, and the type of code being generated. The
+impact on systems that support long absolute calls, and long pic
+symbol-difference or pc-relative calls should be relatively small.
+However, an indirect call is used on 32-bit ELF systems in pic code
+and it is quite long.
-When multiply-accumulate instructions are used, the intermediate
-product is calculated to infinite precision and is not subject to
-the FCSR Flush to Zero bit. This may be undesirable in some
-circumstances.
+@item -munix=@var{unix-std}
+@opindex march
+Generate compiler predefines and select a startfile for the specified
+UNIX standard. The choices for @var{unix-std} are @samp{93}, @samp{95}
+and @samp{98}. @samp{93} is supported on all HP-UX versions. @samp{95}
+is available on HP-UX 10.10 and later. @samp{98} is available on HP-UX
+11.11 and later. The default values are @samp{93} for HP-UX 10.00,
+@samp{95} for HP-UX 10.10 though to 11.00, and @samp{98} for HP-UX 11.11
+and later.
-@item -nocpp
-@opindex nocpp
-Tell the MIPS assembler to not run its preprocessor over user
-assembler files (with a @samp{.s} suffix) when assembling them.
+@option{-munix=93} provides the same predefines as GCC 3.3 and 3.4.
+@option{-munix=95} provides additional predefines for @code{XOPEN_UNIX}
+and @code{_XOPEN_SOURCE_EXTENDED}, and the startfile @file{unix95.o}.
+@option{-munix=98} provides additional predefines for @code{_XOPEN_UNIX},
+@code{_XOPEN_SOURCE_EXTENDED}, @code{_INCLUDE__STDC_A1_SOURCE} and
+@code{_INCLUDE_XOPEN_SOURCE_500}, and the startfile @file{unix98.o}.
-@item -mfix-sb1
-@itemx -mno-fix-sb1
-@opindex mfix-sb1
-Work around certain SB-1 CPU core errata.
-(This flag currently works around the SB-1 revision 2
-``F1'' and ``F2'' floating point errata.)
+It is @emph{important} to note that this option changes the interfaces
+for various library routines. It also affects the operational behavior
+of the C library. Thus, @emph{extreme} care is needed in using this
+option.
-@item -mflush-func=@var{func}
-@itemx -mno-flush-func
-@opindex mflush-func
-Specifies the function to call to flush the I and D caches, or to not
-call any such function. If called, the function must take the same
-arguments as the common @code{_flush_func()}, that is, the address of the
-memory range for which the cache is being flushed, the size of the
-memory range, and the number 3 (to flush both caches). The default
-depends on the target GCC was configured for, but commonly is either
-@samp{_flush_func} or @samp{__cpu_flush}.
+Library code that is intended to operate with more than one UNIX
+standard must test, set and restore the variable @var{__xpg4_extended_mask}
+as appropriate. Most GNU software doesn't provide this capability.
-@item -mbranch-likely
-@itemx -mno-branch-likely
-@opindex mbranch-likely
-@opindex mno-branch-likely
-Enable or disable use of Branch Likely instructions, regardless of the
-default for the selected architecture. By default, Branch Likely
-instructions may be generated if they are supported by the selected
-architecture. An exception is for the MIPS32 and MIPS64 architectures
-and processors which implement those architectures; for those, Branch
-Likely instructions will not be generated by default because the MIPS32
-and MIPS64 architectures specifically deprecate their use.
+@item -nolibdld
+@opindex nolibdld
+Suppress the generation of link options to search libdld.sl when the
+@option{-static} option is specified on HP-UX 10 and later.
+
+@item -static
+@opindex static
+The HP-UX implementation of setlocale in libc has a dependency on
+libdld.sl. There isn't an archive version of libdld.sl. Thus,
+when the @option{-static} option is specified, special link options
+are needed to resolve this dependency.
+
+On HP-UX 10 and later, the GCC driver adds the necessary options to
+link with libdld.sl when the @option{-static} option is specified.
+This causes the resulting binary to be dynamic. On the 64-bit port,
+the linkers generate dynamic binaries by default in any case. The
+@option{-nolibdld} option can be used to prevent the GCC driver from
+adding these link options.
+
+@item -threads
+@opindex threads
+Add support for multithreading with the @dfn{dce thread} library
+under HP-UX@. This option sets flags for both the preprocessor and
+linker.
@end table
@node i386 and x86-64 Options
@@ -8141,16 +9315,43 @@ Tune to @var{cpu-type} everything applicable about the generated code, except
for the ABI and the set of available instructions. The choices for
@var{cpu-type} are:
@table @emph
+@item generic
+Produce code optimized for the most common IA32/AMD64/EM64T processors.
+If you know the CPU on which your code will run, then you should use
+the corresponding @option{-mtune} option instead of
+@option{-mtune=generic}. But, if you do not know exactly what CPU users
+of your application will have, then you should use this option.
+
+As new processors are deployed in the marketplace, the behavior of this
+option will change. Therefore, if you upgrade to a newer version of
+GCC, the code generated option will change to reflect the processors
+that were most common when that version of GCC was released.
+
+There is no @option{-march=generic} option because @option{-march}
+indicates the instruction set the compiler can use, and there is no
+generic instruction set applicable to all processors. In contrast,
+@option{-mtune} indicates the processor (or, in this case, collection of
+processors) for which the code is optimized.
+@item native
+This selects the CPU to tune for at compilation time by determining
+the processor type of the compiling machine. Using @option{-mtune=native}
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using @option{-march=native} will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
@item i386
-Original Intel's i386 CPU.
+Original Intel's i386 CPU@.
@item i486
-Intel's i486 CPU. (No scheduling is implemented for this chip.)
+Intel's i486 CPU@. (No scheduling is implemented for this chip.)
@item i586, pentium
Intel Pentium CPU with no MMX support.
@item pentium-mmx
Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
-@item i686, pentiumpro
-Intel PentiumPro CPU.
+@item pentiumpro
+Intel PentiumPro CPU@.
+@item i686
+Same as @code{generic}, but when used as @code{march} option, PentiumPro
+instruction set will be used, so the code will run on all i686 family chips.
@item pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
@item pentium3, pentium3m
@@ -8187,7 +9388,7 @@ set support.
IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!
instruction set support.
@item c3
-Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
+Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
implemented for this chip.)
@item c3-2
Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is
@@ -8232,7 +9433,7 @@ Use the standard 387 floating point coprocessor present majority of chips and
emulated otherwise. Code compiled with this option will run almost everywhere.
The temporary results are computed in 80bit precision instead of precision
specified by the type resulting in slightly different results compared to most
-of other chips. See @option{-ffloat-store} for more detailed description.
+of other chips. See @option{-ffloat-store} for more detailed description.
This is the default choice for i386 compiler.
@@ -8245,9 +9446,9 @@ extended precision arithmetics is still done using 387. Later version, present
only in Pentium4 and the future AMD x86-64 chips supports double precision
arithmetics too.
-For i387 you need to use @option{-march=@var{cpu-type}}, @option{-msse} or
-@option{-msse2} switches to enable SSE extensions and make this option
-effective. For x86-64 compiler, these extensions are enabled by default.
+For the i386 compiler, you need to use @option{-march=@var{cpu-type}}, @option{-msse}
+or @option{-msse2} switches to enable SSE extensions and make this option
+effective. For the x86-64 compiler, these extensions are enabled by default.
The resulting code should be considerably faster in the majority of cases and avoid
the numerical instability problems of 387 code, but may break some existing
@@ -8265,8 +9466,9 @@ functional units well resulting in instable performance.
@item -masm=@var{dialect}
@opindex masm=@var{dialect}
-Output asm instructions using selected @var{dialect}. Supported choices are
-@samp{intel} or @samp{att} (the default one).
+Output asm instructions using selected @var{dialect}. Supported
+choices are @samp{intel} or @samp{att} (the default one). Darwin does
+not support @samp{intel}.
@item -mieee-fp
@itemx -mno-ieee-fp
@@ -8322,6 +9524,8 @@ boundary. Aligning @code{double} variables on a two word boundary will
produce code that runs somewhat faster on a @samp{Pentium} at the
expense of more memory.
+On x86-64, @option{-malign-double} is enabled by default.
+
@strong{Warning:} if you use the @option{-malign-double} switch,
structures containing the above types will be aligned differently than
the published application binary interface specifications for the 386
@@ -8332,7 +9536,7 @@ without that switch.
@itemx -m128bit-long-double
@opindex m96bit-long-double
@opindex m128bit-long-double
-These switches control the size of @code{long double} type. The i386
+These switches control the size of @code{long double} type. The i386
application binary interface specifies the size to be 96 bits,
so @option{-m96bit-long-double} is the default in 32 bit mode.
@@ -8355,6 +9559,11 @@ their size as well as function calling convention for function taking
@code{long double} will be modified. Hence they will not be binary
compatible with arrays or structures in code compiled without that switch.
+@item -mmlarge-data-threshold=@var{number}
+@opindex mlarge-data-threshold=@var{number}
+When @option{-mcmodel=medium} is specified, the data greater than
+@var{threshold} are placed in large data section. This value must be the
+same across all object linked into the binary and defaults to 65535.
@item -msvr3-shlib
@itemx -mno-svr3-shlib
@@ -8403,19 +9612,43 @@ function by using the function attribute @samp{regparm}.
value, including any libraries. This includes the system libraries and
startup modules.
+@item -msseregparm
+@opindex msseregparm
+Use SSE register passing conventions for float and double arguments
+and return values. You can control this behavior for a specific
+function by using the function attribute @samp{sseregparm}.
+@xref{Function Attributes}.
+
+@strong{Warning:} if you use this switch then you must build all
+modules with the same value, including any libraries. This includes
+the system libraries and startup modules.
+
+@item -mstackrealign
+@opindex mstackrealign
+Realign the stack at entry. On the Intel x86, the
+@option{-mstackrealign} option will generate an alternate prologue and
+epilogue that realigns the runtime stack. This supports mixing legacy
+codes that keep a 4-byte aligned stack with modern codes that keep a
+16-byte stack for SSE compatibility. The alternate prologue and
+epilogue are slower and bigger than the regular ones, and the
+alternate prologue requires an extra scratch register; this lowers the
+number of registers available if used in conjunction with the
+@code{regparm} attribute. The @option{-mstackrealign} option is
+incompatible with the nested function prologue; this is considered a
+hard error. See also the attribute @code{force_align_arg_pointer},
+applicable to individual functions.
+
@item -mpreferred-stack-boundary=@var{num}
@opindex mpreferred-stack-boundary
Attempt to keep the stack boundary aligned to a 2 raised to @var{num}
byte boundary. If @option{-mpreferred-stack-boundary} is not specified,
-the default is 4 (16 bytes or 128 bits), except when optimizing for code
-size (@option{-Os}), in which case the default is the minimum correct
-alignment (4 bytes for x86, and 8 bytes for x86-64).
+the default is 4 (16 bytes or 128 bits).
On Pentium and PentiumPro, @code{double} and @code{long double} values
should be aligned to an 8 byte boundary (see @option{-malign-double}) or
suffer significant run time performance penalties. On Pentium III, the
-Streaming SIMD Extension (SSE) data type @code{__m128} suffers similar
-penalties if it is not 16 byte aligned.
+Streaming SIMD Extension (SSE) data type @code{__m128} may not work
+properly if it is not 16 byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary
must be as aligned as that required by any value stored on the stack.
@@ -8446,15 +9679,20 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@opindex mno-sse
@opindex m3dnow
@opindex mno-3dnow
-These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
-instruction set.
-
-@xref{X86 Built-in Functions}, for details of the functions enabled
-and disabled by these switches.
+These switches enable or disable the use of instructions in the MMX,
+SSE, SSE2 or 3DNow! extended instruction sets. These extensions are
+also available as built-in functions: see @ref{X86 Built-in Functions},
+for details of the functions enabled and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-point
-code, see @option{-mfpmath=sse}.
+code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
+
+These options will enable GCC to use these extended instructions in
+generated code, even without @option{-mfpmath=sse}. Applications which
+perform runtime CPU detection must compile separate files for each
+supported architecture, using the appropriate flags. In particular,
+the file containing the CPU detection code should be compiled without
+these options.
@item -mpush-args
@itemx -mno-push-args
@@ -8526,7 +9764,9 @@ Generate code for a 32-bit or 64-bit environment.
The 32-bit environment sets int, long and pointer to 32 bits and
generates code that runs on any i386 system.
The 64-bit environment sets int to 32 bits and long and pointer
-to 64 bits and generates code for AMD's x86-64 architecture.
+to 64 bits and generates code for AMD's x86-64 architecture. For
+darwin only the -m64 option turns off the @option{-fno-pic} and
+@option{-mdynamic-no-pic} options.
@item -mno-red-zone
@opindex no-red-zone
@@ -8563,1210 +9803,546 @@ about addresses and sizes of sections. Currently GCC does not implement
this model.
@end table
-@node HPPA Options
-@subsection HPPA Options
-@cindex HPPA Options
+@node IA-64 Options
+@subsection IA-64 Options
+@cindex IA-64 Options
-These @samp{-m} options are defined for the HPPA family of computers:
+These are the @samp{-m} options defined for the Intel IA-64 architecture.
@table @gcctabopt
-@item -march=@var{architecture-type}
-@opindex march
-Generate code for the specified architecture. The choices for
-@var{architecture-type} are @samp{1.0} for PA 1.0, @samp{1.1} for PA
-1.1, and @samp{2.0} for PA 2.0 processors. Refer to
-@file{/usr/lib/sched.models} on an HP-UX system to determine the proper
-architecture option for your machine. Code compiled for lower numbered
-architectures will run on higher numbered architectures, but not the
-other way around.
-
-PA 2.0 support currently requires gas snapshot 19990413 or later. The
-next release of binutils (current is 2.9.1) will probably contain PA 2.0
-support.
-
-@item -mpa-risc-1-0
-@itemx -mpa-risc-1-1
-@itemx -mpa-risc-2-0
-@opindex mpa-risc-1-0
-@opindex mpa-risc-1-1
-@opindex mpa-risc-2-0
-Synonyms for @option{-march=1.0}, @option{-march=1.1}, and @option{-march=2.0} respectively.
-
-@item -mbig-switch
-@opindex mbig-switch
-Generate code suitable for big switch tables. Use this option only if
-the assembler/linker complain about out of range branches within a switch
-table.
-
-@item -mjump-in-delay
-@opindex mjump-in-delay
-Fill delay slots of function calls with unconditional jump instructions
-by modifying the return pointer for the function call to be the target
-of the conditional jump.
-
-@item -mdisable-fpregs
-@opindex mdisable-fpregs
-Prevent floating point registers from being used in any manner. This is
-necessary for compiling kernels which perform lazy context switching of
-floating point registers. If you use this option and attempt to perform
-floating point operations, the compiler will abort.
-
-@item -mdisable-indexing
-@opindex mdisable-indexing
-Prevent the compiler from using indexing address modes. This avoids some
-rather obscure problems when compiling MIG generated code under MACH@.
-
-@item -mno-space-regs
-@opindex mno-space-regs
-Generate code that assumes the target has no space registers. This allows
-GCC to generate faster indirect calls and use unscaled index address modes.
-
-Such code is suitable for level 0 PA systems and kernels.
-
-@item -mfast-indirect-calls
-@opindex mfast-indirect-calls
-Generate code that assumes calls never cross space boundaries. This
-allows GCC to emit code which performs faster indirect calls.
-
-This option will not work in the presence of shared libraries or nested
-functions.
-
-@item -mlong-load-store
-@opindex mlong-load-store
-Generate 3-instruction load and store sequences as sometimes required by
-the HP-UX 10 linker. This is equivalent to the @samp{+k} option to
-the HP compilers.
-
-@item -mportable-runtime
-@opindex mportable-runtime
-Use the portable calling conventions proposed by HP for ELF systems.
-
-@item -mgas
-@opindex mgas
-Enable the use of assembler directives only GAS understands.
-
-@item -mschedule=@var{cpu-type}
-@opindex mschedule
-Schedule code according to the constraints for the machine type
-@var{cpu-type}. The choices for @var{cpu-type} are @samp{700}
-@samp{7100}, @samp{7100LC}, @samp{7200}, @samp{7300} and @samp{8000}. Refer
-to @file{/usr/lib/sched.models} on an HP-UX system to determine the
-proper scheduling option for your machine. The default scheduling is
-@samp{8000}.
-
-@item -mlinker-opt
-@opindex mlinker-opt
-Enable the optimization pass in the HP-UX linker. Note this makes symbolic
-debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
-linkers in which they give bogus error messages when linking some programs.
-
-@item -msoft-float
-@opindex msoft-float
-Generate output containing library calls for floating point.
-@strong{Warning:} the requisite libraries are not available for all HPPA
-targets. Normally the facilities of the machine's usual C compiler are
-used, but this cannot be done directly in cross-compilation. You must make
-your own arrangements to provide suitable library functions for
-cross-compilation. The embedded target @samp{hppa1.1-*-pro}
-does provide software floating point support.
+@item -mbig-endian
+@opindex mbig-endian
+Generate code for a big endian target. This is the default for HP-UX@.
-@option{-msoft-float} changes the calling convention in the output file;
-therefore, it is only useful if you compile @emph{all} of a program with
-this option. In particular, you need to compile @file{libgcc.a}, the
-library that comes with GCC, with @option{-msoft-float} in order for
-this to work.
+@item -mlittle-endian
+@opindex mlittle-endian
+Generate code for a little endian target. This is the default for AIX5
+and GNU/Linux.
-@item -msio
-@opindex msio
-Generate the predefine, @code{_SIO}, for server IO. The default is
-@option{-mwsio}. This generates the predefines, @code{__hp9000s700},
-@code{__hp9000s700__} and @code{_WSIO}, for workstation IO. These
-options are available under HP-UX and HI-UX.
+@item -mgnu-as
+@itemx -mno-gnu-as
+@opindex mgnu-as
+@opindex mno-gnu-as
+Generate (or don't) code for the GNU assembler. This is the default.
+@c Also, this is the default if the configure option @option{--with-gnu-as}
+@c is used.
@item -mgnu-ld
-@opindex gnu-ld
-Use GNU ld specific options. This passes @option{-shared} to ld when
-building a shared library. It is the default when GCC is configured,
-explicitly or implicitly, with the GNU linker. This option does not
-have any affect on which ld is called, it only changes what parameters
-are passed to that ld. The ld that is called is determined by the
-@option{--with-ld} configure option, GCC's program search path, and
-finally by the user's @env{PATH}. The linker used by GCC can be printed
-using @samp{which `gcc -print-prog-name=ld`}. This option is only available
-on the 64 bit HP-UX GCC, i.e. configured with @samp{hppa*64*-*-hpux*}.
-
-@item -mhp-ld
-@opindex hp-ld
-Use HP ld specific options. This passes @option{-b} to ld when building
-a shared library and passes @option{+Accept TypeMismatch} to ld on all
-links. It is the default when GCC is configured, explicitly or
-implicitly, with the HP linker. This option does not have any affect on
-which ld is called, it only changes what parameters are passed to that
-ld. The ld that is called is determined by the @option{--with-ld}
-configure option, GCC's program search path, and finally by the user's
-@env{PATH}. The linker used by GCC can be printed using @samp{which
-`gcc -print-prog-name=ld`}. This option is only available on the 64 bit
-HP-UX GCC, i.e. configured with @samp{hppa*64*-*-hpux*}.
-
-@item -mlong-calls
-@opindex mno-long-calls
-Generate code that uses long call sequences. This ensures that a call
-is always able to reach linker generated stubs. The default is to generate
-long calls only when the distance from the call site to the beginning
-of the function or translation unit, as the case may be, exceeds a
-predefined limit set by the branch type being used. The limits for
-normal calls are 7,600,000 and 240,000 bytes, respectively for the
-PA 2.0 and PA 1.X architectures. Sibcalls are always limited at
-240,000 bytes.
-
-Distances are measured from the beginning of functions when using the
-@option{-ffunction-sections} option, or when using the @option{-mgas}
-and @option{-mno-portable-runtime} options together under HP-UX with
-the SOM linker.
-
-It is normally not desirable to use this option as it will degrade
-performance. However, it may be useful in large applications,
-particularly when partial linking is used to build the application.
-
-The types of long calls used depends on the capabilities of the
-assembler and linker, and the type of code being generated. The
-impact on systems that support long absolute calls, and long pic
-symbol-difference or pc-relative calls should be relatively small.
-However, an indirect call is used on 32-bit ELF systems in pic code
-and it is quite long.
-
-@item -nolibdld
-@opindex nolibdld
-Suppress the generation of link options to search libdld.sl when the
-@option{-static} option is specified on HP-UX 10 and later.
-
-@item -static
-@opindex static
-The HP-UX implementation of setlocale in libc has a dependency on
-libdld.sl. There isn't an archive version of libdld.sl. Thus,
-when the @option{-static} option is specified, special link options
-are needed to resolve this dependency.
-
-On HP-UX 10 and later, the GCC driver adds the necessary options to
-link with libdld.sl when the @option{-static} option is specified.
-This causes the resulting binary to be dynamic. On the 64-bit port,
-the linkers generate dynamic binaries by default in any case. The
-@option{-nolibdld} option can be used to prevent the GCC driver from
-adding these link options.
-
-@item -threads
-@opindex threads
-Add support for multithreading with the @dfn{dce thread} library
-under HP-UX. This option sets flags for both the preprocessor and
-linker.
-@end table
-
-@node Intel 960 Options
-@subsection Intel 960 Options
-
-These @samp{-m} options are defined for the Intel 960 implementations:
-
-@table @gcctabopt
-@item -m@var{cpu-type}
-@opindex mka
-@opindex mkb
-@opindex mmc
-@opindex mca
-@opindex mcf
-@opindex msa
-@opindex msb
-Assume the defaults for the machine type @var{cpu-type} for some of
-the other options, including instruction scheduling, floating point
-support, and addressing modes. The choices for @var{cpu-type} are
-@samp{ka}, @samp{kb}, @samp{mc}, @samp{ca}, @samp{cf},
-@samp{sa}, and @samp{sb}.
-The default is
-@samp{kb}.
-
-@item -mnumerics
-@itemx -msoft-float
-@opindex mnumerics
-@opindex msoft-float
-The @option{-mnumerics} option indicates that the processor does support
-floating-point instructions. The @option{-msoft-float} option indicates
-that floating-point support should not be assumed.
-
-@item -mleaf-procedures
-@itemx -mno-leaf-procedures
-@opindex mleaf-procedures
-@opindex mno-leaf-procedures
-Do (or do not) attempt to alter leaf procedures to be callable with the
-@code{bal} instruction as well as @code{call}. This will result in more
-efficient code for explicit calls when the @code{bal} instruction can be
-substituted by the assembler or linker, but less efficient code in other
-cases, such as calls via function pointers, or using a linker that doesn't
-support this optimization.
-
-@item -mtail-call
-@itemx -mno-tail-call
-@opindex mtail-call
-@opindex mno-tail-call
-Do (or do not) make additional attempts (beyond those of the
-machine-independent portions of the compiler) to optimize tail-recursive
-calls into branches. You may not want to do this because the detection of
-cases where this is not valid is not totally complete. The default is
-@option{-mno-tail-call}.
-
-@item -mcomplex-addr
-@itemx -mno-complex-addr
-@opindex mcomplex-addr
-@opindex mno-complex-addr
-Assume (or do not assume) that the use of a complex addressing mode is a
-win on this implementation of the i960. Complex addressing modes may not
-be worthwhile on the K-series, but they definitely are on the C-series.
-The default is currently @option{-mcomplex-addr} for all processors except
-the CB and CC@.
-
-@item -mcode-align
-@itemx -mno-code-align
-@opindex mcode-align
-@opindex mno-code-align
-Align code to 8-byte boundaries for faster fetching (or don't bother).
-Currently turned on by default for C-series implementations only.
-
-@ignore
-@item -mclean-linkage
-@itemx -mno-clean-linkage
-@opindex mclean-linkage
-@opindex mno-clean-linkage
-These options are not fully implemented.
-@end ignore
-
-@item -mic-compat
-@itemx -mic2.0-compat
-@itemx -mic3.0-compat
-@opindex mic-compat
-@opindex mic2.0-compat
-@opindex mic3.0-compat
-Enable compatibility with iC960 v2.0 or v3.0.
-
-@item -masm-compat
-@itemx -mintel-asm
-@opindex masm-compat
-@opindex mintel-asm
-Enable compatibility with the iC960 assembler.
-
-@item -mstrict-align
-@itemx -mno-strict-align
-@opindex mstrict-align
-@opindex mno-strict-align
-Do not permit (do permit) unaligned accesses.
-
-@item -mold-align
-@opindex mold-align
-Enable structure-alignment compatibility with Intel's gcc release version
-1.3 (based on gcc 1.37). This option implies @option{-mstrict-align}.
-
-@item -mlong-double-64
-@opindex mlong-double-64
-Implement type @samp{long double} as 64-bit floating point numbers.
-Without the option @samp{long double} is implemented by 80-bit
-floating point numbers. The only reason we have it because there is
-no 128-bit @samp{long double} support in @samp{fp-bit.c} yet. So it
-is only useful for people using soft-float targets. Otherwise, we
-should recommend against use of it.
-
-@end table
-
-@node DEC Alpha Options
-@subsection DEC Alpha Options
-
-These @samp{-m} options are defined for the DEC Alpha implementations:
-
-@table @gcctabopt
-@item -mno-soft-float
-@itemx -msoft-float
-@opindex mno-soft-float
-@opindex msoft-float
-Use (do not use) the hardware floating-point instructions for
-floating-point operations. When @option{-msoft-float} is specified,
-functions in @file{libgcc.a} will be used to perform floating-point
-operations. Unless they are replaced by routines that emulate the
-floating-point operations, or compiled in such a way as to call such
-emulations routines, these routines will issue floating-point
-operations. If you are compiling for an Alpha without floating-point
-operations, you must ensure that the library is built so as not to call
-them.
-
-Note that Alpha implementations without floating-point operations are
-required to have floating-point registers.
-
-@item -mfp-reg
-@itemx -mno-fp-regs
-@opindex mfp-reg
-@opindex mno-fp-regs
-Generate code that uses (does not use) the floating-point register set.
-@option{-mno-fp-regs} implies @option{-msoft-float}. If the floating-point
-register set is not used, floating point operands are passed in integer
-registers as if they were integers and floating-point results are passed
-in @code{$0} instead of @code{$f0}. This is a non-standard calling sequence,
-so any function with a floating-point argument or return value called by code
-compiled with @option{-mno-fp-regs} must also be compiled with that
-option.
-
-A typical use of this option is building a kernel that does not use,
-and hence need not save and restore, any floating-point registers.
-
-@item -mieee
-@opindex mieee
-The Alpha architecture implements floating-point hardware optimized for
-maximum performance. It is mostly compliant with the IEEE floating
-point standard. However, for full compliance, software assistance is
-required. This option generates code fully IEEE compliant code
-@emph{except} that the @var{inexact-flag} is not maintained (see below).
-If this option is turned on, the preprocessor macro @code{_IEEE_FP} is
-defined during compilation. The resulting code is less efficient but is
-able to correctly support denormalized numbers and exceptional IEEE
-values such as not-a-number and plus/minus infinity. Other Alpha
-compilers call this option @option{-ieee_with_no_inexact}.
-
-@item -mieee-with-inexact
-@opindex mieee-with-inexact
-This is like @option{-mieee} except the generated code also maintains
-the IEEE @var{inexact-flag}. Turning on this option causes the
-generated code to implement fully-compliant IEEE math. In addition to
-@code{_IEEE_FP}, @code{_IEEE_FP_EXACT} is defined as a preprocessor
-macro. On some Alpha implementations the resulting code may execute
-significantly slower than the code generated by default. Since there is
-very little code that depends on the @var{inexact-flag}, you should
-normally not specify this option. Other Alpha compilers call this
-option @option{-ieee_with_inexact}.
-
-@item -mfp-trap-mode=@var{trap-mode}
-@opindex mfp-trap-mode
-This option controls what floating-point related traps are enabled.
-Other Alpha compilers call this option @option{-fptm @var{trap-mode}}.
-The trap mode can be set to one of four values:
-
-@table @samp
-@item n
-This is the default (normal) setting. The only traps that are enabled
-are the ones that cannot be disabled in software (e.g., division by zero
-trap).
-
-@item u
-In addition to the traps enabled by @samp{n}, underflow traps are enabled
-as well.
-
-@item su
-Like @samp{su}, but the instructions are marked to be safe for software
-completion (see Alpha architecture manual for details).
-
-@item sui
-Like @samp{su}, but inexact traps are enabled as well.
-@end table
-
-@item -mfp-rounding-mode=@var{rounding-mode}
-@opindex mfp-rounding-mode
-Selects the IEEE rounding mode. Other Alpha compilers call this option
-@option{-fprm @var{rounding-mode}}. The @var{rounding-mode} can be one
-of:
-
-@table @samp
-@item n
-Normal IEEE rounding mode. Floating point numbers are rounded towards
-the nearest machine number or towards the even machine number in case
-of a tie.
-
-@item m
-Round towards minus infinity.
-
-@item c
-Chopped rounding mode. Floating point numbers are rounded towards zero.
-
-@item d
-Dynamic rounding mode. A field in the floating point control register
-(@var{fpcr}, see Alpha architecture reference manual) controls the
-rounding mode in effect. The C library initializes this register for
-rounding towards plus infinity. Thus, unless your program modifies the
-@var{fpcr}, @samp{d} corresponds to round towards plus infinity.
-@end table
-
-@item -mtrap-precision=@var{trap-precision}
-@opindex mtrap-precision
-In the Alpha architecture, floating point traps are imprecise. This
-means without software assistance it is impossible to recover from a
-floating trap and program execution normally needs to be terminated.
-GCC can generate code that can assist operating system trap handlers
-in determining the exact location that caused a floating point trap.
-Depending on the requirements of an application, different levels of
-precisions can be selected:
-
-@table @samp
-@item p
-Program precision. This option is the default and means a trap handler
-can only identify which program caused a floating point exception.
-
-@item f
-Function precision. The trap handler can determine the function that
-caused a floating point exception.
-
-@item i
-Instruction precision. The trap handler can determine the exact
-instruction that caused a floating point exception.
-@end table
-
-Other Alpha compilers provide the equivalent options called
-@option{-scope_safe} and @option{-resumption_safe}.
-
-@item -mieee-conformant
-@opindex mieee-conformant
-This option marks the generated code as IEEE conformant. You must not
-use this option unless you also specify @option{-mtrap-precision=i} and either
-@option{-mfp-trap-mode=su} or @option{-mfp-trap-mode=sui}. Its only effect
-is to emit the line @samp{.eflag 48} in the function prologue of the
-generated assembly file. Under DEC Unix, this has the effect that
-IEEE-conformant math library routines will be linked in.
-
-@item -mbuild-constants
-@opindex mbuild-constants
-Normally GCC examines a 32- or 64-bit integer constant to
-see if it can construct it from smaller constants in two or three
-instructions. If it cannot, it will output the constant as a literal and
-generate code to load it from the data segment at runtime.
-
-Use this option to require GCC to construct @emph{all} integer constants
-using code, even if it takes more instructions (the maximum is six).
-
-You would typically use this option to build a shared library dynamic
-loader. Itself a shared library, it must relocate itself in memory
-before it can find the variables and constants in its own data segment.
-
-@item -malpha-as
-@itemx -mgas
-@opindex malpha-as
-@opindex mgas
-Select whether to generate code to be assembled by the vendor-supplied
-assembler (@option{-malpha-as}) or by the GNU assembler @option{-mgas}.
+@itemx -mno-gnu-ld
+@opindex mgnu-ld
+@opindex mno-gnu-ld
+Generate (or don't) code for the GNU linker. This is the default.
+@c Also, this is the default if the configure option @option{--with-gnu-ld}
+@c is used.
-@item -mbwx
-@itemx -mno-bwx
-@itemx -mcix
-@itemx -mno-cix
-@itemx -mfix
-@itemx -mno-fix
-@itemx -mmax
-@itemx -mno-max
-@opindex mbwx
-@opindex mno-bwx
-@opindex mcix
-@opindex mno-cix
-@opindex mfix
-@opindex mno-fix
-@opindex mmax
-@opindex mno-max
-Indicate whether GCC should generate code to use the optional BWX,
-CIX, FIX and MAX instruction sets. The default is to use the instruction
-sets supported by the CPU type specified via @option{-mcpu=} option or that
-of the CPU on which GCC was built if none was specified.
+@item -mno-pic
+@opindex mno-pic
+Generate code that does not use a global pointer register. The result
+is not position independent code, and violates the IA-64 ABI@.
-@item -mfloat-vax
-@itemx -mfloat-ieee
-@opindex mfloat-vax
-@opindex mfloat-ieee
-Generate code that uses (does not use) VAX F and G floating point
-arithmetic instead of IEEE single and double precision.
+@item -mvolatile-asm-stop
+@itemx -mno-volatile-asm-stop
+@opindex mvolatile-asm-stop
+@opindex mno-volatile-asm-stop
+Generate (or don't) a stop bit immediately before and after volatile asm
+statements.
-@item -mexplicit-relocs
-@itemx -mno-explicit-relocs
-@opindex mexplicit-relocs
-@opindex mno-explicit-relocs
-Older Alpha assemblers provided no way to generate symbol relocations
-except via assembler macros. Use of these macros does not allow
-optimal instruction scheduling. GNU binutils as of version 2.12
-supports a new syntax that allows the compiler to explicitly mark
-which relocations should apply to which instructions. This option
-is mostly useful for debugging, as GCC detects the capabilities of
-the assembler when it is built and sets the default accordingly.
+@item -mregister-names
+@itemx -mno-register-names
+@opindex mregister-names
+@opindex mno-register-names
+Generate (or don't) @samp{in}, @samp{loc}, and @samp{out} register names for
+the stacked registers. This may make assembler output more readable.
-@item -msmall-data
-@itemx -mlarge-data
-@opindex msmall-data
-@opindex mlarge-data
-When @option{-mexplicit-relocs} is in effect, static data is
-accessed via @dfn{gp-relative} relocations. When @option{-msmall-data}
-is used, objects 8 bytes long or smaller are placed in a @dfn{small data area}
-(the @code{.sdata} and @code{.sbss} sections) and are accessed via
-16-bit relocations off of the @code{$gp} register. This limits the
-size of the small data area to 64KB, but allows the variables to be
-directly accessed via a single instruction.
+@item -mno-sdata
+@itemx -msdata
+@opindex mno-sdata
+@opindex msdata
+Disable (or enable) optimizations that use the small data section. This may
+be useful for working around optimizer bugs.
-The default is @option{-mlarge-data}. With this option the data area
-is limited to just below 2GB. Programs that require more than 2GB of
-data must use @code{malloc} or @code{mmap} to allocate the data in the
-heap instead of in the program's data segment.
+@item -mconstant-gp
+@opindex mconstant-gp
+Generate code that uses a single constant global pointer value. This is
+useful when compiling kernel code.
-When generating code for shared libraries, @option{-fpic} implies
-@option{-msmall-data} and @option{-fPIC} implies @option{-mlarge-data}.
+@item -mauto-pic
+@opindex mauto-pic
+Generate code that is self-relocatable. This implies @option{-mconstant-gp}.
+This is useful when compiling firmware code.
-@item -msmall-text
-@itemx -mlarge-text
-@opindex msmall-text
-@opindex mlarge-text
-When @option{-msmall-text} is used, the compiler assumes that the
-code of the entire program (or shared library) fits in 4MB, and is
-thus reachable with a branch instruction. When @option{-msmall-data}
-is used, the compiler can assume that all local symbols share the
-same @code{$gp} value, and thus reduce the number of instructions
-required for a function call from 4 to 1.
+@item -minline-float-divide-min-latency
+@opindex minline-float-divide-min-latency
+Generate code for inline divides of floating point values
+using the minimum latency algorithm.
-The default is @option{-mlarge-text}.
+@item -minline-float-divide-max-throughput
+@opindex minline-float-divide-max-throughput
+Generate code for inline divides of floating point values
+using the maximum throughput algorithm.
-@item -mcpu=@var{cpu_type}
-@opindex mcpu
-Set the instruction set and instruction scheduling parameters for
-machine type @var{cpu_type}. You can specify either the @samp{EV}
-style name or the corresponding chip number. GCC supports scheduling
-parameters for the EV4, EV5 and EV6 family of processors and will
-choose the default values for the instruction set from the processor
-you specify. If you do not specify a processor type, GCC will default
-to the processor on which the compiler was built.
+@item -minline-int-divide-min-latency
+@opindex minline-int-divide-min-latency
+Generate code for inline divides of integer values
+using the minimum latency algorithm.
-Supported values for @var{cpu_type} are
+@item -minline-int-divide-max-throughput
+@opindex minline-int-divide-max-throughput
+Generate code for inline divides of integer values
+using the maximum throughput algorithm.
-@table @samp
-@item ev4
-@itemx ev45
-@itemx 21064
-Schedules as an EV4 and has no instruction set extensions.
+@item -minline-sqrt-min-latency
+@opindex minline-sqrt-min-latency
+Generate code for inline square roots
+using the minimum latency algorithm.
-@item ev5
-@itemx 21164
-Schedules as an EV5 and has no instruction set extensions.
+@item -minline-sqrt-max-throughput
+@opindex minline-sqrt-max-throughput
+Generate code for inline square roots
+using the maximum throughput algorithm.
-@item ev56
-@itemx 21164a
-Schedules as an EV5 and supports the BWX extension.
+@item -mno-dwarf2-asm
+@itemx -mdwarf2-asm
+@opindex mno-dwarf2-asm
+@opindex mdwarf2-asm
+Don't (or do) generate assembler code for the DWARF2 line number debugging
+info. This may be useful when not using the GNU assembler.
-@item pca56
-@itemx 21164pc
-@itemx 21164PC
-Schedules as an EV5 and supports the BWX and MAX extensions.
+@item -mearly-stop-bits
+@itemx -mno-early-stop-bits
+@opindex mearly-stop-bits
+@opindex mno-early-stop-bits
+Allow stop bits to be placed earlier than immediately preceding the
+instruction that triggered the stop bit. This can improve instruction
+scheduling, but does not always do so.
-@item ev6
-@itemx 21264
-Schedules as an EV6 and supports the BWX, FIX, and MAX extensions.
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
-@item ev67
-@itemx 21264a
-Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX extensions.
-@end table
+@item -mtls-size=@var{tls-size}
+@opindex mtls-size
+Specify bit size of immediate TLS offsets. Valid values are 14, 22, and
+64.
-@item -mtune=@var{cpu_type}
+@item -mtune=@var{cpu-type}
@opindex mtune
-Set only the instruction scheduling parameters for machine type
-@var{cpu_type}. The instruction set is not changed.
-
-@item -mmemory-latency=@var{time}
-@opindex mmemory-latency
-Sets the latency the scheduler should assume for typical memory
-references as seen by the application. This number is highly
-dependent on the memory access patterns used by the application
-and the size of the external cache on the machine.
-
-Valid options for @var{time} are
-
-@table @samp
-@item @var{number}
-A decimal number representing clock cycles.
-
-@item L1
-@itemx L2
-@itemx L3
-@itemx main
-The compiler contains estimates of the number of clock cycles for
-``typical'' EV4 & EV5 hardware for the Level 1, 2 & 3 caches
-(also called Dcache, Scache, and Bcache), as well as to main memory.
-Note that L3 is only valid for EV5.
+Tune the instruction scheduling for a particular CPU, Valid values are
+itanium, itanium1, merced, itanium2, and mckinley.
-@end table
-@end table
+@item -mt
+@itemx -pthread
+@opindex mt
+@opindex pthread
+Add support for multithreading using the POSIX threads library. This
+option sets flags for both the preprocessor and linker. It does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it. These are HP-UX specific flags.
-@node DEC Alpha/VMS Options
-@subsection DEC Alpha/VMS Options
+@item -milp32
+@itemx -mlp64
+@opindex milp32
+@opindex mlp64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits. These are HP-UX specific flags.
-These @samp{-m} options are defined for the DEC Alpha/VMS implementations:
+@item -mno-sched-br-data-spec
+@itemx -msched-br-data-spec
+@opindex mno-sched-br-data-spec
+@opindex msched-br-data-spec
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+
+@item -msched-ar-data-spec
+@itemx -mno-sched-ar-data-spec
+@opindex msched-ar-data-spec
+@opindex mno-sched-ar-data-spec
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+
+@item -mno-sched-control-spec
+@itemx -msched-control-spec
+@opindex mno-sched-control-spec
+@opindex msched-control-spec
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+
+@item -msched-br-in-data-spec
+@itemx -mno-sched-br-in-data-spec
+@opindex msched-br-in-data-spec
+@opindex mno-sched-br-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with @option{-msched-br-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-ar-in-data-spec
+@itemx -mno-sched-ar-in-data-spec
+@opindex msched-ar-in-data-spec
+@opindex mno-sched-ar-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with @option{-msched-ar-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-in-control-spec
+@itemx -mno-sched-in-control-spec
+@opindex msched-in-control-spec
+@opindex mno-sched-in-control-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with @option{-msched-control-spec} enabled.
+The default is 'enable'.
+
+@item -msched-ldc
+@itemx -mno-sched-ldc
+@opindex msched-ldc
+@opindex mno-sched-ldc
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+
+@item -mno-sched-control-ldc
+@itemx -msched-control-ldc
+@opindex mno-sched-control-ldc
+@opindex msched-control-ldc
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+
+@item -mno-sched-spec-verbose
+@itemx -msched-spec-verbose
+@opindex mno-sched-spec-verbose
+@opindex msched-spec-verbose
+(Dis/En)able printing of the information about speculative motions.
+
+@item -mno-sched-prefer-non-data-spec-insns
+@itemx -msched-prefer-non-data-spec-insns
+@opindex mno-sched-prefer-non-data-spec-insns
+@opindex msched-prefer-non-data-spec-insns
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-prefer-non-control-spec-insns
+@itemx -msched-prefer-non-control-spec-insns
+@opindex mno-sched-prefer-non-control-spec-insns
+@opindex msched-prefer-non-control-spec-insns
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-count-spec-in-critical-path
+@itemx -msched-count-spec-in-critical-path
+@opindex mno-sched-count-spec-in-critical-path
+@opindex msched-count-spec-in-critical-path
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
-@table @gcctabopt
-@item -mvms-return-codes
-@opindex mvms-return-codes
-Return VMS condition codes from main. The default is to return POSIX
-style condition (e.g.@ error) codes.
@end table
-@node H8/300 Options
-@subsection H8/300 Options
-
-These @samp{-m} options are defined for the H8/300 implementations:
+@node M32C Options
+@subsection M32C Options
+@cindex M32C options
@table @gcctabopt
-@item -mrelax
-@opindex mrelax
-Shorten some address references at link time, when possible; uses the
-linker option @option{-relax}. @xref{H8/300,, @code{ld} and the H8/300,
-ld, Using ld}, for a fuller description.
-
-@item -mh
-@opindex mh
-Generate code for the H8/300H@.
-
-@item -ms
-@opindex ms
-Generate code for the H8S@.
-
-@item -mn
-@opindex mn
-Generate code for the H8S and H8/300H in the normal mode. This switch
-must be used either with -mh or -ms.
-
-@item -ms2600
-@opindex ms2600
-Generate code for the H8S/2600. This switch must be used with @option{-ms}.
+@item -mcpu=@var{name}
+@opindex mcpu=
+Select the CPU for which code is generated. @var{name} may be one of
+@samp{r8c} for the R8C/Tiny series, @samp{m16c} for the M16C (up to
+/60) series, @samp{m32cm} for the M16C/80 series, or @samp{m32c} for
+the M32C/80 series.
-@item -mint32
-@opindex mint32
-Make @code{int} data 32 bits by default.
+@item -msim
+@opindex msim
+Specifies that the program will be run on the simulator. This causes
+an alternate runtime library to be linked in which supports, for
+example, file I/O. You must not use this option when generating
+programs that will run on real hardware; you must provide your own
+runtime library for whatever I/O functions are needed.
+
+@item -memregs=@var{number}
+@opindex memregs=
+Specifies the number of memory-based pseudo-registers GCC will use
+during code generation. These pseudo-registers will be used like real
+registers, so there is a tradeoff between GCC's ability to fit the
+code into available registers, and the performance penalty of using
+memory instead of registers. Note that all modules in a program must
+be compiled with the same value for this option. Because of that, you
+must not use this option with the default runtime libraries gcc
+builds.
-@item -malign-300
-@opindex malign-300
-On the H8/300H and H8S, use the same alignment rules as for the H8/300.
-The default for the H8/300H and H8S is to align longs and floats on 4
-byte boundaries.
-@option{-malign-300} causes them to be aligned on 2 byte boundaries.
-This option has no effect on the H8/300.
@end table
-@node SH Options
-@subsection SH Options
+@node M32R/D Options
+@subsection M32R/D Options
+@cindex M32R/D options
-These @samp{-m} options are defined for the SH implementations:
+These @option{-m} options are defined for Renesas M32R/D architectures:
@table @gcctabopt
-@item -m1
-@opindex m1
-Generate code for the SH1.
-
-@item -m2
-@opindex m2
-Generate code for the SH2.
-
-@item -m2e
-Generate code for the SH2e.
-
-@item -m3
-@opindex m3
-Generate code for the SH3.
-
-@item -m3e
-@opindex m3e
-Generate code for the SH3e.
-
-@item -m4-nofpu
-@opindex m4-nofpu
-Generate code for the SH4 without a floating-point unit.
-
-@item -m4-single-only
-@opindex m4-single-only
-Generate code for the SH4 with a floating-point unit that only
-supports single-precision arithmetic.
-
-@item -m4-single
-@opindex m4-single
-Generate code for the SH4 assuming the floating-point unit is in
-single-precision mode by default.
-
-@item -m4
-@opindex m4
-Generate code for the SH4.
-
-@item -mb
-@opindex mb
-Compile code for the processor in big endian mode.
-
-@item -ml
-@opindex ml
-Compile code for the processor in little endian mode.
-
-@item -mdalign
-@opindex mdalign
-Align doubles at 64-bit boundaries. Note that this changes the calling
-conventions, and thus some functions from the standard C library will
-not work unless you recompile it first with @option{-mdalign}.
-
-@item -mrelax
-@opindex mrelax
-Shorten some address references at link time, when possible; uses the
-linker option @option{-relax}.
-
-@item -mbigtable
-@opindex mbigtable
-Use 32-bit offsets in @code{switch} tables. The default is to use
-16-bit offsets.
-
-@item -mfmovd
-@opindex mfmovd
-Enable the use of the instruction @code{fmovd}.
+@item -m32r2
+@opindex m32r2
+Generate code for the M32R/2@.
-@item -mhitachi
-@opindex mhitachi
-Comply with the calling conventions defined by Renesas.
+@item -m32rx
+@opindex m32rx
+Generate code for the M32R/X@.
-@item -mnomacsave
-@opindex mnomacsave
-Mark the @code{MAC} register as call-clobbered, even if
-@option{-mhitachi} is given.
+@item -m32r
+@opindex m32r
+Generate code for the M32R@. This is the default.
-@item -mieee
-@opindex mieee
-Increase IEEE-compliance of floating-point code.
+@item -mmodel=small
+@opindex mmodel=small
+Assume all objects live in the lower 16MB of memory (so that their addresses
+can be loaded with the @code{ld24} instruction), and assume all subroutines
+are reachable with the @code{bl} instruction.
+This is the default.
-@item -misize
-@opindex misize
-Dump instruction size and location in the assembly code.
+The addressability of a particular object can be set with the
+@code{model} attribute.
-@item -mpadstruct
-@opindex mpadstruct
-This option is deprecated. It pads structures to multiple of 4 bytes,
-which is incompatible with the SH ABI@.
+@item -mmodel=medium
+@opindex mmodel=medium
+Assume objects may be anywhere in the 32-bit address space (the compiler
+will generate @code{seth/add3} instructions to load their addresses), and
+assume all subroutines are reachable with the @code{bl} instruction.
-@item -mspace
-@opindex mspace
-Optimize for space instead of speed. Implied by @option{-Os}.
+@item -mmodel=large
+@opindex mmodel=large
+Assume objects may be anywhere in the 32-bit address space (the compiler
+will generate @code{seth/add3} instructions to load their addresses), and
+assume subroutines may not be reachable with the @code{bl} instruction
+(the compiler will generate the much slower @code{seth/add3/jl}
+instruction sequence).
-@item -mprefergot
-@opindex mprefergot
-When generating position-independent code, emit function calls using
-the Global Offset Table instead of the Procedure Linkage Table.
+@item -msdata=none
+@opindex msdata=none
+Disable use of the small data area. Variables will be put into
+one of @samp{.data}, @samp{bss}, or @samp{.rodata} (unless the
+@code{section} attribute has been specified).
+This is the default.
-@item -musermode
-@opindex musermode
-Generate a library function call to invalidate instruction cache
-entries, after fixing up a trampoline. This library function call
-doesn't assume it can write to the whole memory address space. This
-is the default when the target is @code{sh-*-linux*}.
-@end table
+The small data area consists of sections @samp{.sdata} and @samp{.sbss}.
+Objects may be explicitly put in the small data area with the
+@code{section} attribute using one of these sections.
-@node System V Options
-@subsection Options for System V
+@item -msdata=sdata
+@opindex msdata=sdata
+Put small global and static data in the small data area, but do not
+generate special code to reference them.
-These additional options are available on System V Release 4 for
-compatibility with other compilers on those systems:
+@item -msdata=use
+@opindex msdata=use
+Put small global and static data in the small data area, and generate
+special instructions to reference them.
-@table @gcctabopt
-@item -G
+@item -G @var{num}
@opindex G
-Create a shared object.
-It is recommended that @option{-symbolic} or @option{-shared} be used instead.
-
-@item -Qy
-@opindex Qy
-Identify the versions of each tool used by the compiler, in a
-@code{.ident} assembler directive in the output.
-
-@item -Qn
-@opindex Qn
-Refrain from adding @code{.ident} directives to the output file (this is
-the default).
-
-@item -YP,@var{dirs}
-@opindex YP
-Search the directories @var{dirs}, and no others, for libraries
-specified with @option{-l}.
-
-@item -Ym,@var{dir}
-@opindex Ym
-Look in the directory @var{dir} to find the M4 preprocessor.
-The assembler uses this option.
-@c This is supposed to go with a -Yd for predefined M4 macro files, but
-@c the generic assembler that comes with Solaris takes just -Ym.
-@end table
-
-@node TMS320C3x/C4x Options
-@subsection TMS320C3x/C4x Options
-@cindex TMS320C3x/C4x Options
-
-These @samp{-m} options are defined for TMS320C3x/C4x implementations:
-
-@table @gcctabopt
-
-@item -mcpu=@var{cpu_type}
-@opindex mcpu
-Set the instruction set, register set, and instruction scheduling
-parameters for machine type @var{cpu_type}. Supported values for
-@var{cpu_type} are @samp{c30}, @samp{c31}, @samp{c32}, @samp{c40}, and
-@samp{c44}. The default is @samp{c40} to generate code for the
-TMS320C40.
-
-@item -mbig-memory
-@itemx -mbig
-@itemx -msmall-memory
-@itemx -msmall
-@opindex mbig-memory
-@opindex mbig
-@opindex msmall-memory
-@opindex msmall
-Generates code for the big or small memory model. The small memory
-model assumed that all data fits into one 64K word page. At run-time
-the data page (DP) register must be set to point to the 64K page
-containing the .bss and .data program sections. The big memory model is
-the default and requires reloading of the DP register for every direct
-memory access.
-
-@item -mbk
-@itemx -mno-bk
-@opindex mbk
-@opindex mno-bk
-Allow (disallow) allocation of general integer operands into the block
-count register BK@.
-
-@item -mdb
-@itemx -mno-db
-@opindex mdb
-@opindex mno-db
-Enable (disable) generation of code using decrement and branch,
-DBcond(D), instructions. This is enabled by default for the C4x. To be
-on the safe side, this is disabled for the C3x, since the maximum
-iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
-@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
-that it can utilize the decrement and branch instruction, but will give
-up if there is more than one memory reference in the loop. Thus a loop
-where the loop counter is decremented can generate slightly more
-efficient code, in cases where the RPTB instruction cannot be utilized.
+@cindex smaller data references
+Put global and static objects less than or equal to @var{num} bytes
+into the small data or bss sections instead of the normal data or bss
+sections. The default value of @var{num} is 8.
+The @option{-msdata} option must be set to one of @samp{sdata} or @samp{use}
+for this option to have any effect.
-@item -mdp-isr-reload
-@itemx -mparanoid
-@opindex mdp-isr-reload
-@opindex mparanoid
-Force the DP register to be saved on entry to an interrupt service
-routine (ISR), reloaded to point to the data section, and restored on
-exit from the ISR@. This should not be required unless someone has
-violated the small memory model by modifying the DP register, say within
-an object library.
+All modules should be compiled with the same @option{-G @var{num}} value.
+Compiling with different values of @var{num} may or may not work; if it
+doesn't the linker will give an error message---incorrect code will not be
+generated.
-@item -mmpyi
-@itemx -mno-mpyi
-@opindex mmpyi
-@opindex mno-mpyi
-For the C3x use the 24-bit MPYI instruction for integer multiplies
-instead of a library call to guarantee 32-bit results. Note that if one
-of the operands is a constant, then the multiplication will be performed
-using shifts and adds. If the @option{-mmpyi} option is not specified for the C3x,
-then squaring operations are performed inline instead of a library call.
+@item -mdebug
+@opindex mdebug
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
-@item -mfast-fix
-@itemx -mno-fast-fix
-@opindex mfast-fix
-@opindex mno-fast-fix
-The C3x/C4x FIX instruction to convert a floating point value to an
-integer value chooses the nearest integer less than or equal to the
-floating point value rather than to the nearest integer. Thus if the
-floating point number is negative, the result will be incorrectly
-truncated an additional code is necessary to detect and correct this
-case. This option can be used to disable generation of the additional
-code required to correct the result.
+@item -malign-loops
+@opindex malign-loops
+Align all loops to a 32-byte boundary.
-@item -mrptb
-@itemx -mno-rptb
-@opindex mrptb
-@opindex mno-rptb
-Enable (disable) generation of repeat block sequences using the RPTB
-instruction for zero overhead looping. The RPTB construct is only used
-for innermost loops that do not call functions or jump across the loop
-boundaries. There is no advantage having nested RPTB loops due to the
-overhead required to save and restore the RC, RS, and RE registers.
-This is enabled by default with @option{-O2}.
+@item -mno-align-loops
+@opindex mno-align-loops
+Do not enforce a 32-byte alignment for loops. This is the default.
-@item -mrpts=@var{count}
-@itemx -mno-rpts
-@opindex mrpts
-@opindex mno-rpts
-Enable (disable) the use of the single instruction repeat instruction
-RPTS@. If a repeat block contains a single instruction, and the loop
-count can be guaranteed to be less than the value @var{count}, GCC will
-emit a RPTS instruction instead of a RPTB@. If no value is specified,
-then a RPTS will be emitted even if the loop count cannot be determined
-at compile time. Note that the repeated instruction following RPTS does
-not have to be reloaded from memory each iteration, thus freeing up the
-CPU buses for operands. However, since interrupts are blocked by this
-instruction, it is disabled by default.
+@item -missue-rate=@var{number}
+@opindex missue-rate=@var{number}
+Issue @var{number} instructions per cycle. @var{number} can only be 1
+or 2.
-@item -mloop-unsigned
-@itemx -mno-loop-unsigned
-@opindex mloop-unsigned
-@opindex mno-loop-unsigned
-The maximum iteration count when using RPTS and RPTB (and DB on the C40)
-is @math{2^{31} + 1} since these instructions test if the iteration count is
-negative to terminate the loop. If the iteration count is unsigned
-there is a possibility than the @math{2^{31} + 1} maximum iteration count may be
-exceeded. This switch allows an unsigned iteration count.
+@item -mbranch-cost=@var{number}
+@opindex mbranch-cost=@var{number}
+@var{number} can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
-@item -mti
-@opindex mti
-Try to emit an assembler syntax that the TI assembler (asm30) is happy
-with. This also enforces compatibility with the API employed by the TI
-C3x C compiler. For example, long doubles are passed as structures
-rather than in floating point registers.
+@item -mflush-trap=@var{number}
+@opindex mflush-trap=@var{number}
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
-@item -mregparm
-@itemx -mmemparm
-@opindex mregparm
-@opindex mmemparm
-Generate code that uses registers (stack) for passing arguments to functions.
-By default, arguments are passed in registers where possible rather
-than by pushing arguments on to the stack.
+@item -mno-flush-trap
+@opindex mno-flush-trap
+Specifies that the cache cannot be flushed by using a trap.
-@item -mparallel-insns
-@itemx -mno-parallel-insns
-@opindex mparallel-insns
-@opindex mno-parallel-insns
-Allow the generation of parallel instructions. This is enabled by
-default with @option{-O2}.
+@item -mflush-func=@var{name}
+@opindex mflush-func=@var{name}
+Specifies the name of the operating system function to call to flush
+the cache. The default is @emph{_flush_cache}, but a function call
+will only be used if a trap is not available.
-@item -mparallel-mpy
-@itemx -mno-parallel-mpy
-@opindex mparallel-mpy
-@opindex mno-parallel-mpy
-Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
-provided @option{-mparallel-insns} is also specified. These instructions have
-tight register constraints which can pessimize the code generation
-of large functions.
+@item -mno-flush-func
+@opindex mno-flush-func
+Indicates that there is no OS function for flushing the cache.
@end table
-@node V850 Options
-@subsection V850 Options
-@cindex V850 Options
+@node M680x0 Options
+@subsection M680x0 Options
+@cindex M680x0 options
-These @samp{-m} options are defined for V850 implementations:
+These are the @samp{-m} options defined for the 68000 series. The default
+values for these options depends on which style of 68000 was selected when
+the compiler was configured; the defaults for the most common choices are
+given below.
@table @gcctabopt
-@item -mlong-calls
-@itemx -mno-long-calls
-@opindex mlong-calls
-@opindex mno-long-calls
-Treat all calls as being far away (near). If calls are assumed to be
-far away, the compiler will always load the functions address up into a
-register, and call indirect through the pointer.
-
-@item -mno-ep
-@itemx -mep
-@opindex mno-ep
-@opindex mep
-Do not optimize (do optimize) basic blocks that use the same index
-pointer 4 or more times to copy pointer into the @code{ep} register, and
-use the shorter @code{sld} and @code{sst} instructions. The @option{-mep}
-option is on by default if you optimize.
-
-@item -mno-prolog-function
-@itemx -mprolog-function
-@opindex mno-prolog-function
-@opindex mprolog-function
-Do not use (do use) external functions to save and restore registers
-at the prologue and epilogue of a function. The external functions
-are slower, but use less code space if more than one function saves
-the same number of registers. The @option{-mprolog-function} option
-is on by default if you optimize.
-
-@item -mspace
-@opindex mspace
-Try to make the code as small as possible. At present, this just turns
-on the @option{-mep} and @option{-mprolog-function} options.
-
-@item -mtda=@var{n}
-@opindex mtda
-Put static or global variables whose size is @var{n} bytes or less into
-the tiny data area that register @code{ep} points to. The tiny data
-area can hold up to 256 bytes in total (128 bytes for byte references).
-
-@item -msda=@var{n}
-@opindex msda
-Put static or global variables whose size is @var{n} bytes or less into
-the small data area that register @code{gp} points to. The small data
-area can hold up to 64 kilobytes.
-
-@item -mzda=@var{n}
-@opindex mzda
-Put static or global variables whose size is @var{n} bytes or less into
-the first 32 kilobytes of memory.
-
-@item -mv850
-@opindex mv850
-Specify that the target processor is the V850.
-
-@item -mbig-switch
-@opindex mbig-switch
-Generate code suitable for big switch tables. Use this option only if
-the assembler/linker complain about out of range branches within a switch
-table.
-
-@item -mapp-regs
-@opindex mapp-regs
-This option will cause r2 and r5 to be used in the code generated by
-the compiler. This setting is the default.
-
-@item -mno-app-regs
-@opindex mno-app-regs
-This option will cause r2 and r5 to be treated as fixed registers.
-
-@item -mv850e1
-@opindex mv850e1
-Specify that the target processor is the V850E1. The preprocessor
-constants @samp{__v850e1__} and @samp{__v850e__} will be defined if
-this option is used.
-
-@item -mv850e
-@opindex mv850e
-Specify that the target processor is the V850E. The preprocessor
-constant @samp{__v850e__} will be defined if this option is used.
+@item -m68000
+@itemx -mc68000
+@opindex m68000
+@opindex mc68000
+Generate output for a 68000. This is the default
+when the compiler is configured for 68000-based systems.
-If neither @option{-mv850} nor @option{-mv850e} nor @option{-mv850e1}
-are defined then a default target processor will be chosen and the
-relevant @samp{__v850*__} preprocessor constant will be defined.
+Use this option for microcontrollers with a 68000 or EC000 core,
+including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
-The preprocessor constants @samp{__v850} and @samp{__v851__} are always
-defined, regardless of which processor variant is the target.
+@item -m68020
+@itemx -mc68020
+@opindex m68020
+@opindex mc68020
+Generate output for a 68020. This is the default
+when the compiler is configured for 68020-based systems.
-@item -mdisable-callt
-@opindex mdisable-callt
-This option will suppress generation of the CALLT instruction for the
-v850e and v850e1 flavors of the v850 architecture. The default is
-@option{-mno-disable-callt} which allows the CALLT instruction to be used.
+@item -m68881
+@opindex m68881
+Generate output containing 68881 instructions for floating point.
+This is the default for most 68020 systems unless @option{--nfp} was
+specified when the compiler was configured.
-@end table
+@item -m68030
+@opindex m68030
+Generate output for a 68030. This is the default when the compiler is
+configured for 68030-based systems.
-@node ARC Options
-@subsection ARC Options
-@cindex ARC Options
+@item -m68040
+@opindex m68040
+Generate output for a 68040. This is the default when the compiler is
+configured for 68040-based systems.
-These options are defined for ARC implementations:
+This option inhibits the use of 68881/68882 instructions that have to be
+emulated by software on the 68040. Use this option if your 68040 does not
+have code to emulate those instructions.
-@table @gcctabopt
-@item -EL
-@opindex EL
-Compile code for little endian mode. This is the default.
+@item -m68060
+@opindex m68060
+Generate output for a 68060. This is the default when the compiler is
+configured for 68060-based systems.
-@item -EB
-@opindex EB
-Compile code for big endian mode.
+This option inhibits the use of 68020 and 68881/68882 instructions that
+have to be emulated by software on the 68060. Use this option if your 68060
+does not have code to emulate those instructions.
-@item -mmangle-cpu
-@opindex mmangle-cpu
-Prepend the name of the cpu to all public symbol names.
-In multiple-processor systems, there are many ARC variants with different
-instruction and register set characteristics. This flag prevents code
-compiled for one cpu to be linked with code compiled for another.
-No facility exists for handling variants that are ``almost identical''.
-This is an all or nothing option.
+@item -mcpu32
+@opindex mcpu32
+Generate output for a CPU32. This is the default
+when the compiler is configured for CPU32-based systems.
-@item -mcpu=@var{cpu}
-@opindex mcpu
-Compile code for ARC variant @var{cpu}.
-Which variants are supported depend on the configuration.
-All variants support @option{-mcpu=base}, this is the default.
+Use this option for microcontrollers with a
+CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
+68336, 68340, 68341, 68349 and 68360.
-@item -mtext=@var{text-section}
-@itemx -mdata=@var{data-section}
-@itemx -mrodata=@var{readonly-data-section}
-@opindex mtext
-@opindex mdata
-@opindex mrodata
-Put functions, data, and readonly data in @var{text-section},
-@var{data-section}, and @var{readonly-data-section} respectively
-by default. This can be overridden with the @code{section} attribute.
-@xref{Variable Attributes}.
+@item -m5200
+@opindex m5200
+Generate output for a 520X ``coldfire'' family cpu. This is the default
+when the compiler is configured for 520X-based systems.
-@end table
+Use this option for microcontroller with a 5200 core, including
+the MCF5202, MCF5203, MCF5204 and MCF5202.
-@node NS32K Options
-@subsection NS32K Options
-@cindex NS32K options
+@item -mcfv4e
+@opindex mcfv4e
+Generate output for a ColdFire V4e family cpu (e.g.@: 547x/548x).
+This includes use of hardware floating point instructions.
-These are the @samp{-m} options defined for the 32000 series. The default
-values for these options depends on which style of 32000 was selected when
-the compiler was configured; the defaults for the most common choices are
-given below.
+@item -m68020-40
+@opindex m68020-40
+Generate output for a 68040, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68040.
-@table @gcctabopt
-@item -m32032
-@itemx -m32032
-@opindex m32032
-@opindex m32032
-Generate output for a 32032. This is the default
-when the compiler is configured for 32032 and 32016 based systems.
-
-@item -m32332
-@itemx -m32332
-@opindex m32332
-@opindex m32332
-Generate output for a 32332. This is the default
-when the compiler is configured for 32332-based systems.
-
-@item -m32532
-@itemx -m32532
-@opindex m32532
-@opindex m32532
-Generate output for a 32532. This is the default
-when the compiler is configured for 32532-based systems.
-
-@item -m32081
-@opindex m32081
-Generate output containing 32081 instructions for floating point.
-This is the default for all systems.
-
-@item -m32381
-@opindex m32381
-Generate output containing 32381 instructions for floating point. This
-also implies @option{-m32081}. The 32381 is only compatible with the 32332
-and 32532 cpus. This is the default for the pc532-netbsd configuration.
-
-@item -mmulti-add
-@opindex mmulti-add
-Try and generate multiply-add floating point instructions @code{polyF}
-and @code{dotF}. This option is only available if the @option{-m32381}
-option is in effect. Using these instructions requires changes to
-register allocation which generally has a negative impact on
-performance. This option should only be enabled when compiling code
-particularly likely to make heavy use of multiply-add instructions.
-
-@item -mnomulti-add
-@opindex mnomulti-add
-Do not try and generate multiply-add floating point instructions
-@code{polyF} and @code{dotF}. This is the default on all platforms.
+@item -m68020-60
+@opindex m68020-60
+Generate output for a 68060, without using any of the new instructions.
+This results in code which can run relatively efficiently on either a
+68020/68881 or a 68030 or a 68040. The generated code does use the
+68881 instructions that are emulated on the 68060.
@item -msoft-float
@opindex msoft-float
Generate output containing library calls for floating point.
-@strong{Warning:} the requisite libraries may not be available.
+@strong{Warning:} the requisite libraries are not available for all m68k
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this can't be done directly in cross-compilation. You must
+make your own arrangements to provide suitable library functions for
+cross-compilation. The embedded targets @samp{m68k-*-aout} and
+@samp{m68k-*-coff} do provide software floating point support.
-@item -mieee-compare
-@itemx -mno-ieee-compare
-@opindex mieee-compare
-@opindex mno-ieee-compare
-Control whether or not the compiler uses IEEE floating point
-comparisons. These handle correctly the case where the result of a
-comparison is unordered.
-@strong{Warning:} the requisite kernel support may not be available.
+@item -mshort
+@opindex mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
+Additionally, parameters passed on the stack are also aligned to a
+16-bit boundary even on targets whose API mandates promotion to 32-bit.
@item -mnobitfield
@opindex mnobitfield
-Do not use the bit-field instructions. On some machines it is faster to
-use shifting and masking operations. This is the default for the pc532.
+Do not use the bit-field instructions. The @option{-m68000}, @option{-mcpu32}
+and @option{-m5200} options imply @w{@option{-mnobitfield}}.
@item -mbitfield
@opindex mbitfield
-Do use the bit-field instructions. This is the default for all platforms
-except the pc532.
+Do use the bit-field instructions. The @option{-m68020} option implies
+@option{-mbitfield}. This is the default if you use a configuration
+designed for a 68020.
@item -mrtd
@opindex mrtd
Use a different function-calling convention, in which functions
-that take a fixed number of arguments return pop their
-arguments on return with the @code{ret} instruction.
+that take a fixed number of arguments return with the @code{rtd}
+instruction, which pops their arguments while returning. This
+saves one instruction in the caller since there is no need to pop
+the arguments there.
This calling convention is incompatible with the one normally
used on Unix, so you cannot use it if you need to call libraries
@@ -9781,106 +10357,125 @@ In addition, seriously incorrect code will result if you call a
function with too many arguments. (Normally, extra arguments are
harmlessly ignored.)
-This option takes its name from the 680x0 @code{rtd} instruction.
+The @code{rtd} instruction is supported by the 68010, 68020, 68030,
+68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
+@item -malign-int
+@itemx -mno-align-int
+@opindex malign-int
+@opindex mno-align-int
+Control whether GCC aligns @code{int}, @code{long}, @code{long long},
+@code{float}, @code{double}, and @code{long double} variables on a 32-bit
+boundary (@option{-malign-int}) or a 16-bit boundary (@option{-mno-align-int}).
+Aligning variables on 32-bit boundaries produces code that runs somewhat
+faster on processors with 32-bit busses at the expense of more memory.
-@item -mregparam
-@opindex mregparam
-Use a different function-calling convention where the first two arguments
-are passed in registers.
+@strong{Warning:} if you use the @option{-malign-int} switch, GCC will
+align structures containing the above types differently than
+most published application binary interface specifications for the m68k.
-This calling convention is incompatible with the one normally
-used on Unix, so you cannot use it if you need to call libraries
-compiled with the Unix compiler.
+@item -mpcrel
+@opindex mpcrel
+Use the pc-relative addressing mode of the 68000 directly, instead of
+using a global offset table. At present, this option implies @option{-fpic},
+allowing at most a 16-bit offset for pc-relative addressing. @option{-fPIC} is
+not presently supported with @option{-mpcrel}, though this could be supported for
+68020 and higher processors.
-@item -mnoregparam
-@opindex mnoregparam
-Do not pass any arguments in registers. This is the default for all
-targets.
+@item -mno-strict-align
+@itemx -mstrict-align
+@opindex mno-strict-align
+@opindex mstrict-align
+Do not (do) assume that unaligned memory references will be handled by
+the system.
-@item -msb
-@opindex msb
-It is OK to use the sb as an index register which is always loaded with
-zero. This is the default for the pc532-netbsd target.
+@item -msep-data
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies
+@option{-fPIC}.
-@item -mnosb
-@opindex mnosb
-The sb register is not available for use or has not been initialized to
-zero by the run time system. This is the default for all targets except
-the pc532-netbsd. It is also implied whenever @option{-mhimem} or
-@option{-fpic} is set.
+@item -mno-sep-data
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
-@item -mhimem
-@opindex mhimem
-Many ns32000 series addressing modes use displacements of up to 512MB@.
-If an address is above 512MB then displacements from zero can not be used.
-This option causes code to be generated which can be loaded above 512MB@.
-This may be useful for operating systems or ROM code.
+@item -mid-shared-library
+Generate code that supports shared libraries via the library ID method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies @option{-fPIC}.
-@item -mnohimem
-@opindex mnohimem
-Assume code will be loaded in the first 512MB of virtual address space.
-This is the default for all platforms.
+@item -mno-id-shared-library
+Generate code that doesn't assume ID based shared libraries are being used.
+This is the default.
+@item -mshared-library-id=n
+Specified the identification number of the ID based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
@end table
-@node AVR Options
-@subsection AVR Options
-@cindex AVR Options
+@node M68hc1x Options
+@subsection M68hc1x Options
+@cindex M68hc1x options
-These options are defined for AVR implementations:
+These are the @samp{-m} options defined for the 68hc11 and 68hc12
+microcontrollers. The default values for these options depends on
+which style of microcontroller was selected when the compiler was configured;
+the defaults for the most common choices are given below.
@table @gcctabopt
-@item -mmcu=@var{mcu}
-@opindex mmcu
-Specify ATMEL AVR instruction set or MCU type.
-
-Instruction set avr1 is for the minimal AVR core, not supported by the C
-compiler, only for assembler programs (MCU types: at90s1200, attiny10,
-attiny11, attiny12, attiny15, attiny28).
-
-Instruction set avr2 (default) is for the classic AVR core with up to
-8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
-at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
-at90c8534, at90s8535).
-
-Instruction set avr3 is for the classic AVR core with up to 128K program
-memory space (MCU types: atmega103, atmega603, at43usb320, at76c711).
+@item -m6811
+@itemx -m68hc11
+@opindex m6811
+@opindex m68hc11
+Generate output for a 68HC11. This is the default
+when the compiler is configured for 68HC11-based systems.
-Instruction set avr4 is for the enhanced AVR core with up to 8K program
-memory space (MCU types: atmega8, atmega83, atmega85).
+@item -m6812
+@itemx -m68hc12
+@opindex m6812
+@opindex m68hc12
+Generate output for a 68HC12. This is the default
+when the compiler is configured for 68HC12-based systems.
-Instruction set avr5 is for the enhanced AVR core with up to 128K program
-memory space (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323,
-atmega64, atmega128, at43usb355, at94k).
+@item -m68S12
+@itemx -m68hcs12
+@opindex m68S12
+@opindex m68hcs12
+Generate output for a 68HCS12.
-@item -msize
-@opindex msize
-Output instruction sizes to the asm file.
+@item -mauto-incdec
+@opindex mauto-incdec
+Enable the use of 68HC12 pre and post auto-increment and auto-decrement
+addressing modes.
-@item -minit-stack=@var{N}
-@opindex minit-stack
-Specify the initial stack address, which may be a symbol or numeric value,
-@samp{__stack} is the default.
+@item -minmax
+@itemx -nominmax
+@opindex minmax
+@opindex mnominmax
+Enable the use of 68HC12 min and max instructions.
-@item -mno-interrupts
-@opindex mno-interrupts
-Generated code is not compatible with hardware interrupts.
-Code size will be smaller.
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will use the @code{call} instruction to
+call a function and the @code{rtc} instruction for returning.
-@item -mcall-prologues
-@opindex mcall-prologues
-Functions prologues/epilogues expanded as call to appropriate
-subroutines. Code size will be smaller.
+@item -mshort
+@opindex mshort
+Consider type @code{int} to be 16 bits wide, like @code{short int}.
-@item -mno-tablejump
-@opindex mno-tablejump
-Do not generate tablejump insns which sometimes increase code size.
+@item -msoft-reg-count=@var{count}
+@opindex msoft-reg-count
+Specify the number of pseudo-soft registers which are used for the
+code generation. The maximum number is 32. Using more pseudo-soft
+register may or may not result in better code depending on the program.
+The default is 4 for 68HC11 and 2 for 68HC12.
-@item -mtiny-stack
-@opindex mtiny-stack
-Change only the low 8 bits of the stack pointer.
@end table
@node MCore Options
@@ -9948,448 +10543,495 @@ Generate code for a little endian target.
Generate code for the 210 processor.
@end table
-@node IA-64 Options
-@subsection IA-64 Options
-@cindex IA-64 Options
-
-These are the @samp{-m} options defined for the Intel IA-64 architecture.
+@node MIPS Options
+@subsection MIPS Options
+@cindex MIPS options
@table @gcctabopt
-@item -mbig-endian
-@opindex mbig-endian
-Generate code for a big endian target. This is the default for HP-UX@.
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a little endian target. This is the default for AIX5
-and GNU/Linux.
+@item -EB
+@opindex EB
+Generate big-endian code.
-@item -mgnu-as
-@itemx -mno-gnu-as
-@opindex mgnu-as
-@opindex mno-gnu-as
-Generate (or don't) code for the GNU assembler. This is the default.
-@c Also, this is the default if the configure option @option{--with-gnu-as}
-@c is used.
+@item -EL
+@opindex EL
+Generate little-endian code. This is the default for @samp{mips*el-*-*}
+configurations.
-@item -mgnu-ld
-@itemx -mno-gnu-ld
-@opindex mgnu-ld
-@opindex mno-gnu-ld
-Generate (or don't) code for the GNU linker. This is the default.
-@c Also, this is the default if the configure option @option{--with-gnu-ld}
-@c is used.
+@item -march=@var{arch}
+@opindex march
+Generate code that will run on @var{arch}, which can be the name of a
+generic MIPS ISA, or the name of a particular processor.
+The ISA names are:
+@samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4},
+@samp{mips32}, @samp{mips32r2}, and @samp{mips64}.
+The processor names are:
+@samp{4kc}, @samp{4km}, @samp{4kp},
+@samp{5kc}, @samp{5kf},
+@samp{20kc},
+@samp{24k}, @samp{24kc}, @samp{24kf}, @samp{24kx},
+@samp{m4k},
+@samp{orion},
+@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
+@samp{r4600}, @samp{r4650}, @samp{r6000}, @samp{r8000},
+@samp{rm7000}, @samp{rm9000},
+@samp{sb1},
+@samp{sr71000},
+@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4130}, @samp{vr4300},
+@samp{vr5000}, @samp{vr5400} and @samp{vr5500}.
+The special value @samp{from-abi} selects the
+most compatible architecture for the selected ABI (that is,
+@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
-@item -mno-pic
-@opindex mno-pic
-Generate code that does not use a global pointer register. The result
-is not position independent code, and violates the IA-64 ABI@.
+In processor names, a final @samp{000} can be abbreviated as @samp{k}
+(for example, @samp{-march=r2k}). Prefixes are optional, and
+@samp{vr} may be written @samp{r}.
-@item -mvolatile-asm-stop
-@itemx -mno-volatile-asm-stop
-@opindex mvolatile-asm-stop
-@opindex mno-volatile-asm-stop
-Generate (or don't) a stop bit immediately before and after volatile asm
-statements.
+GCC defines two macros based on the value of this option. The first
+is @samp{_MIPS_ARCH}, which gives the name of target architecture, as
+a string. The second has the form @samp{_MIPS_ARCH_@var{foo}},
+where @var{foo} is the capitalized value of @samp{_MIPS_ARCH}@.
+For example, @samp{-march=r2000} will set @samp{_MIPS_ARCH}
+to @samp{"r2000"} and define the macro @samp{_MIPS_ARCH_R2000}.
-@item -mb-step
-@opindex mb-step
-Generate code that works around Itanium B step errata.
+Note that the @samp{_MIPS_ARCH} macro uses the processor names given
+above. In other words, it will have the full prefix and will not
+abbreviate @samp{000} as @samp{k}. In the case of @samp{from-abi},
+the macro names the resolved architecture (either @samp{"mips1"} or
+@samp{"mips3"}). It names the default architecture when no
+@option{-march} option is given.
-@item -mregister-names
-@itemx -mno-register-names
-@opindex mregister-names
-@opindex mno-register-names
-Generate (or don't) @samp{in}, @samp{loc}, and @samp{out} register names for
-the stacked registers. This may make assembler output more readable.
+@item -mtune=@var{arch}
+@opindex mtune
+Optimize for @var{arch}. Among other things, this option controls
+the way instructions are scheduled, and the perceived cost of arithmetic
+operations. The list of @var{arch} values is the same as for
+@option{-march}.
-@item -mno-sdata
-@itemx -msdata
-@opindex mno-sdata
-@opindex msdata
-Disable (or enable) optimizations that use the small data section. This may
-be useful for working around optimizer bugs.
+When this option is not used, GCC will optimize for the processor
+specified by @option{-march}. By using @option{-march} and
+@option{-mtune} together, it is possible to generate code that will
+run on a family of processors, but optimize the code for one
+particular member of that family.
-@item -mconstant-gp
-@opindex mconstant-gp
-Generate code that uses a single constant global pointer value. This is
-useful when compiling kernel code.
+@samp{-mtune} defines the macros @samp{_MIPS_TUNE} and
+@samp{_MIPS_TUNE_@var{foo}}, which work in the same way as the
+@samp{-march} ones described above.
-@item -mauto-pic
-@opindex mauto-pic
-Generate code that is self-relocatable. This implies @option{-mconstant-gp}.
-This is useful when compiling firmware code.
+@item -mips1
+@opindex mips1
+Equivalent to @samp{-march=mips1}.
-@item -minline-float-divide-min-latency
-@opindex minline-float-divide-min-latency
-Generate code for inline divides of floating point values
-using the minimum latency algorithm.
+@item -mips2
+@opindex mips2
+Equivalent to @samp{-march=mips2}.
-@item -minline-float-divide-max-throughput
-@opindex minline-float-divide-max-throughput
-Generate code for inline divides of floating point values
-using the maximum throughput algorithm.
+@item -mips3
+@opindex mips3
+Equivalent to @samp{-march=mips3}.
-@item -minline-int-divide-min-latency
-@opindex minline-int-divide-min-latency
-Generate code for inline divides of integer values
-using the minimum latency algorithm.
+@item -mips4
+@opindex mips4
+Equivalent to @samp{-march=mips4}.
-@item -minline-int-divide-max-throughput
-@opindex minline-int-divide-max-throughput
-Generate code for inline divides of integer values
-using the maximum throughput algorithm.
+@item -mips32
+@opindex mips32
+Equivalent to @samp{-march=mips32}.
-@item -minline-sqrt-min-latency
-@opindex minline-sqrt-min-latency
-Generate code for inline square roots
-using the minimum latency algorithm.
+@item -mips32r2
+@opindex mips32r2
+Equivalent to @samp{-march=mips32r2}.
-@item -minline-sqrt-max-throughput
-@opindex minline-sqrt-max-throughput
-Generate code for inline square roots
-using the maximum throughput algorithm.
+@item -mips64
+@opindex mips64
+Equivalent to @samp{-march=mips64}.
-@item -mno-dwarf2-asm
-@itemx -mdwarf2-asm
-@opindex mno-dwarf2-asm
-@opindex mdwarf2-asm
-Don't (or do) generate assembler code for the DWARF2 line number debugging
-info. This may be useful when not using the GNU assembler.
+@item -mips16
+@itemx -mno-mips16
+@opindex mips16
+@opindex mno-mips16
+Generate (do not generate) MIPS16 code. If GCC is targetting a
+MIPS32 or MIPS64 architecture, it will make use of the MIPS16e ASE@.
-@item -mearly-stop-bits
-@itemx -mno-early-stop-bits
-@opindex mearly-stop-bits
-@opindex mno-early-stop-bits
-Allow stop bits to be placed earlier than immediately preceding the
-instruction that triggered the stop bit. This can improve instruction
-scheduling, but does not always do so.
+@item -mabi=32
+@itemx -mabi=o64
+@itemx -mabi=n32
+@itemx -mabi=64
+@itemx -mabi=eabi
+@opindex mabi=32
+@opindex mabi=o64
+@opindex mabi=n32
+@opindex mabi=64
+@opindex mabi=eabi
+Generate code for the given ABI@.
-@item -mfixed-range=@var{register-range}
-@opindex mfixed-range
-Generate code treating the given register range as fixed registers.
-A fixed register is one that the register allocator can not use. This is
-useful when compiling kernel code. A register range is specified as
-two registers separated by a dash. Multiple register ranges can be
-specified separated by a comma.
+Note that the EABI has a 32-bit and a 64-bit variant. GCC normally
+generates 64-bit code when you select a 64-bit architecture, but you
+can use @option{-mgp32} to get 32-bit code instead.
-@item -mtls-size=@var{tls-size}
-@opindex mtls-size
-Specify bit size of immediate TLS offsets. Valid values are 14, 22, and
-64.
+For information about the O64 ABI, see
+@w{@uref{http://gcc.gnu.org/projects/mipso64-abi.html}}.
-@item -mtune=@var{cpu-type}
-@opindex mtune
-Tune the instruction scheduling for a particular CPU, Valid values are
-itanium, itanium1, merced, itanium2, and mckinley.
+@item -mabicalls
+@itemx -mno-abicalls
+@opindex mabicalls
+@opindex mno-abicalls
+Generate (do not generate) code that is suitable for SVR4-style
+dynamic objects. @option{-mabicalls} is the default for SVR4-based
+systems.
+
+@item -mshared
+@itemx -mno-shared
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries. This option
+only affects @option{-mabicalls}.
+
+All @option{-mabicalls} code has traditionally been position-independent,
+regardless of options like @option{-fPIC} and @option{-fpic}. However,
+as an extension, the GNU toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter GP
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by @option{-mno-shared}.
+
+@option{-mno-shared} depends on binutils 2.16 or higher and generates
+objects that can only be linked by the GNU linker. However, the option
+does not affect the ABI of the final executable; it only affects the ABI
+of relocatable objects. Using @option{-mno-shared} will generally make
+executables both smaller and quicker.
+
+@option{-mshared} is the default.
-@item -mt
-@itemx -pthread
-@opindex mt
-@opindex pthread
-Add support for multithreading using the POSIX threads library. This
-option sets flags for both the preprocessor and linker. It does
-not affect the thread safety of object code produced by the compiler or
-that of libraries supplied with it. These are HP-UX specific flags.
+@item -mxgot
+@itemx -mno-xgot
+@opindex mxgot
+@opindex mno-xgot
+Lift (do not lift) the usual restrictions on the size of the global
+offset table.
-@item -milp32
-@itemx -mlp64
-@opindex milp32
-@opindex mlp64
-Generate code for a 32-bit or 64-bit environment.
-The 32-bit environment sets int, long and pointer to 32 bits.
-The 64-bit environment sets int to 32 bits and long and pointer
-to 64 bits. These are HP-UX specific flags.
+GCC normally uses a single instruction to load values from the GOT@.
+While this is relatively efficient, it will only work if the GOT
+is smaller than about 64k. Anything larger will cause the linker
+to report an error such as:
-@end table
+@cindex relocation truncated to fit (MIPS)
+@smallexample
+relocation truncated to fit: R_MIPS_GOT16 foobar
+@end smallexample
+
+If this happens, you should recompile your code with @option{-mxgot}.
+It should then work with very large GOTs, although it will also be
+less efficient, since it will take three instructions to fetch the
+value of a global symbol.
-@node D30V Options
-@subsection D30V Options
-@cindex D30V Options
+Note that some linkers can create multiple GOTs. If you have such a
+linker, you should only need to use @option{-mxgot} when a single object
+file accesses more than 64k's worth of GOT entries. Very few do.
-These @samp{-m} options are defined for D30V implementations:
+These options have no effect unless GCC is generating position
+independent code.
-@table @gcctabopt
-@item -mextmem
-@opindex mextmem
-Link the @samp{.text}, @samp{.data}, @samp{.bss}, @samp{.strings},
-@samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections into external
-memory, which starts at location @code{0x80000000}.
-
-@item -mextmemory
-@opindex mextmemory
-Same as the @option{-mextmem} switch.
-
-@item -monchip
-@opindex monchip
-Link the @samp{.text} section into onchip text memory, which starts at
-location @code{0x0}. Also link @samp{.data}, @samp{.bss},
-@samp{.strings}, @samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections
-into onchip data memory, which starts at location @code{0x20000000}.
-
-@item -mno-asm-optimize
-@itemx -masm-optimize
-@opindex mno-asm-optimize
-@opindex masm-optimize
-Disable (enable) passing @option{-O} to the assembler when optimizing.
-The assembler uses the @option{-O} option to automatically parallelize
-adjacent short instructions where possible.
-
-@item -mbranch-cost=@var{n}
-@opindex mbranch-cost
-Increase the internal costs of branches to @var{n}. Higher costs means
-that the compiler will issue more instructions to avoid doing a branch.
-The default is 2.
-
-@item -mcond-exec=@var{n}
-@opindex mcond-exec
-Specify the maximum number of conditionally executed instructions that
-replace a branch. The default is 4.
-@end table
+@item -mgp32
+@opindex mgp32
+Assume that general-purpose registers are 32 bits wide.
-@node S/390 and zSeries Options
-@subsection S/390 and zSeries Options
-@cindex S/390 and zSeries Options
+@item -mgp64
+@opindex mgp64
+Assume that general-purpose registers are 64 bits wide.
-These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+@item -mfp32
+@opindex mfp32
+Assume that floating-point registers are 32 bits wide.
+
+@item -mfp64
+@opindex mfp64
+Assume that floating-point registers are 64 bits wide.
-@table @gcctabopt
@item -mhard-float
-@itemx -msoft-float
@opindex mhard-float
+Use floating-point coprocessor instructions.
+
+@item -msoft-float
@opindex msoft-float
-Use (do not use) the hardware floating-point instructions and registers
-for floating-point operations. When @option{-msoft-float} is specified,
-functions in @file{libgcc.a} will be used to perform floating-point
-operations. When @option{-mhard-float} is specified, the compiler
-generates IEEE floating-point instructions. This is the default.
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
-@item -mbackchain
-@itemx -mno-backchain
-@opindex mbackchain
-@opindex mno-backchain
-Generate (or do not generate) code which maintains an explicit
-backchain within the stack frame that points to the caller's frame.
-This may be needed to allow debugging using tools that do not understand
-DWARF-2 call frame information. The default is not to generate the
-backchain.
+@item -msingle-float
+@opindex msingle-float
+Assume that the floating-point coprocessor only supports single-precision
+operations.
-@item -msmall-exec
-@itemx -mno-small-exec
-@opindex msmall-exec
-@opindex mno-small-exec
-Generate (or do not generate) code using the @code{bras} instruction
-to do subroutine calls.
-This only works reliably if the total executable size does not
-exceed 64k. The default is to use the @code{basr} instruction instead,
-which does not have this limitation.
+@itemx -mdouble-float
+@opindex mdouble-float
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
-@item -m64
-@itemx -m31
-@opindex m64
-@opindex m31
-When @option{-m31} is specified, generate code compliant to the
-GNU/Linux for S/390 ABI@. When @option{-m64} is specified, generate
-code compliant to the GNU/Linux for zSeries ABI@. This allows GCC in
-particular to generate 64-bit instructions. For the @samp{s390}
-targets, the default is @option{-m31}, while the @samp{s390x}
-targets default to @option{-m64}.
+@itemx -mdsp
+@itemx -mno-dsp
+@opindex mdsp
+@opindex mno-dsp
+Use (do not use) the MIPS DSP ASE. @xref{MIPS DSP Built-in Functions}.
+
+@itemx -mpaired-single
+@itemx -mno-paired-single
+@opindex mpaired-single
+@opindex mno-paired-single
+Use (do not use) paired-single floating-point instructions.
+@xref{MIPS Paired-Single Support}. This option can only be used
+when generating 64-bit code and requires hardware floating-point
+support to be enabled.
+
+@itemx -mips3d
+@itemx -mno-mips3d
+@opindex mips3d
+@opindex mno-mips3d
+Use (do not use) the MIPS-3D ASE@. @xref{MIPS-3D Built-in Functions}.
+The option @option{-mips3d} implies @option{-mpaired-single}.
-@item -mzarch
-@itemx -mesa
-@opindex mzarch
-@opindex mesa
-When @option{-mzarch} is specified, generate code using the
-instructions available on z/Architecture.
-When @option{-mesa} is specified, generate code using the
-instructions available on ESA/390. Note that @option{-mesa} is
-not possible with @option{-m64}.
-When generating code compliant to the GNU/Linux for S/390 ABI,
-the default is @option{-mesa}. When generating code compliant
-to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
+@item -mlong64
+@opindex mlong64
+Force @code{long} types to be 64 bits wide. See @option{-mlong32} for
+an explanation of the default and the way that the pointer size is
+determined.
-@item -mmvcle
-@itemx -mno-mvcle
-@opindex mmvcle
-@opindex mno-mvcle
-Generate (or do not generate) code using the @code{mvcle} instruction
-to perform block moves. When @option{-mno-mvcle} is specified,
-use a @code{mvc} loop instead. This is the default.
+@item -mlong32
+@opindex mlong32
+Force @code{long}, @code{int}, and pointer types to be 32 bits wide.
-@item -mdebug
-@itemx -mno-debug
-@opindex mdebug
-@opindex mno-debug
-Print (or do not print) additional debug information when compiling.
-The default is to not print debug information.
+The default size of @code{int}s, @code{long}s and pointers depends on
+the ABI@. All the supported ABIs use 32-bit @code{int}s. The n64 ABI
+uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
+32-bit @code{long}s. Pointers are the same size as @code{long}s,
+or the same size as integer registers, whichever is smaller.
-@item -march=@var{cpu-type}
-@opindex march
-Generate code that will run on @var{cpu-type}, which is the name of a system
-representing a certain processor type. Possible values for
-@var{cpu-type} are @samp{g5}, @samp{g6}, @samp{z900}, and @samp{z990}.
-When generating code using the instructions available on z/Architecture,
-the default is @option{-march=z900}. Otherwise, the default is
-@option{-march=g5}.
+@item -msym32
+@itemx -mno-sym32
+@opindex msym32
+@opindex mno-sym32
+Assume (do not assume) that all symbols have 32-bit values, regardless
+of the selected ABI@. This option is useful in combination with
+@option{-mabi=64} and @option{-mno-abicalls} because it allows GCC
+to generate shorter and faster references to symbolic addresses.
-@item -mtune=@var{cpu-type}
-@opindex mtune
-Tune to @var{cpu-type} everything applicable about the generated code,
-except for the ABI and the set of available instructions.
-The list of @var{cpu-type} values is the same as for @option{-march}.
-The default is the value used for @option{-march}.
+@item -G @var{num}
+@opindex G
+@cindex smaller data references (MIPS)
+@cindex gp-relative references (MIPS)
+Put global and static items less than or equal to @var{num} bytes into
+the small data or bss section instead of the normal data or bss section.
+This allows the data to be accessed using a single instruction.
-@item -mfused-madd
-@itemx -mno-fused-madd
-@opindex mfused-madd
-@opindex mno-fused-madd
-Generate code that uses (does not use) the floating point multiply and
-accumulate instructions. These instructions are generated by default if
-hardware floating point is used.
-@end table
+All modules should be compiled with the same @option{-G @var{num}}
+value.
-@node CRIS Options
-@subsection CRIS Options
-@cindex CRIS Options
+@item -membedded-data
+@itemx -mno-embedded-data
+@opindex membedded-data
+@opindex mno-embedded-data
+Allocate variables to the read-only data section first if possible, then
+next in the small data section if possible, otherwise in data. This gives
+slightly slower code than the default, but reduces the amount of RAM required
+when executing, and thus may be preferred for some embedded systems.
-These options are defined specifically for the CRIS ports.
+@item -muninit-const-in-rodata
+@itemx -mno-uninit-const-in-rodata
+@opindex muninit-const-in-rodata
+@opindex mno-uninit-const-in-rodata
+Put uninitialized @code{const} variables in the read-only data section.
+This option is only meaningful in conjunction with @option{-membedded-data}.
-@table @gcctabopt
-@item -march=@var{architecture-type}
-@itemx -mcpu=@var{architecture-type}
-@opindex march
-@opindex mcpu
-Generate code for the specified architecture. The choices for
-@var{architecture-type} are @samp{v3}, @samp{v8} and @samp{v10} for
-respectively ETRAX@w{ }4, ETRAX@w{ }100, and ETRAX@w{ }100@w{ }LX.
-Default is @samp{v0} except for cris-axis-linux-gnu, where the default is
-@samp{v10}.
+@item -msplit-addresses
+@itemx -mno-split-addresses
+@opindex msplit-addresses
+@opindex mno-split-addresses
+Enable (disable) use of the @code{%hi()} and @code{%lo()} assembler
+relocation operators. This option has been superseded by
+@option{-mexplicit-relocs} but is retained for backwards compatibility.
-@item -mtune=@var{architecture-type}
-@opindex mtune
-Tune to @var{architecture-type} everything applicable about the generated
-code, except for the ABI and the set of available instructions. The
-choices for @var{architecture-type} are the same as for
-@option{-march=@var{architecture-type}}.
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by @option{-mno-explicit-relocs},
+is to use assembler macros instead.
-@item -mmax-stack-frame=@var{n}
-@opindex mmax-stack-frame
-Warn when the stack frame of a function exceeds @var{n} bytes.
+@option{-mexplicit-relocs} is the default if GCC was configured
+to use an assembler that supports relocation operators.
-@item -melinux-stacksize=@var{n}
-@opindex melinux-stacksize
-Only available with the @samp{cris-axis-aout} target. Arranges for
-indications in the program to the kernel loader that the stack of the
-program should be set to @var{n} bytes.
+@item -mcheck-zero-division
+@itemx -mno-check-zero-division
+@opindex mcheck-zero-division
+@opindex mno-check-zero-division
+Trap (do not trap) on integer division by zero. The default is
+@option{-mcheck-zero-division}.
-@item -metrax4
-@itemx -metrax100
-@opindex metrax4
-@opindex metrax100
-The options @option{-metrax4} and @option{-metrax100} are synonyms for
-@option{-march=v3} and @option{-march=v8} respectively.
+@item -mdivide-traps
+@itemx -mdivide-breaks
+@opindex mdivide-traps
+@opindex mdivide-breaks
+MIPS systems check for division by zero by generating either a
+conditional trap or a break instruction. Using traps results in
+smaller code, but is only supported on MIPS II and later. Also, some
+versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (@code{SIGFPE}). Use @option{-mdivide-traps} to
+allow conditional traps on architectures that support them and
+@option{-mdivide-breaks} to force the use of breaks.
+
+The default is usually @option{-mdivide-traps}, but this can be
+overridden at configure time using @option{--with-divide=breaks}.
+Divide-by-zero checks can be completely disabled using
+@option{-mno-check-zero-division}.
-@item -mmul-bug-workaround
-@itemx -mno-mul-bug-workaround
-@opindex mmul-bug-workaround
-@opindex mno-mul-bug-workaround
-Work around a bug in the @code{muls} and @code{mulu} instructions for CPU
-models where it applies. This option is active by default.
+@item -mmemcpy
+@itemx -mno-memcpy
+@opindex mmemcpy
+@opindex mno-memcpy
+Force (do not force) the use of @code{memcpy()} for non-trivial block
+moves. The default is @option{-mno-memcpy}, which allows GCC to inline
+most constant-sized copies.
-@item -mpdebug
-@opindex mpdebug
-Enable CRIS-specific verbose debug-related information in the assembly
-code. This option also has the effect to turn off the @samp{#NO_APP}
-formatted-code indicator to the assembler at the beginning of the
-assembly file.
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Disable (do not disable) use of the @code{jal} instruction. Calling
+functions using @code{jal} is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
-@item -mcc-init
-@opindex mcc-init
-Do not use condition-code results from previous instruction; always emit
-compare and test instructions before use of condition codes.
+This option has no effect on abicalls code. The default is
+@option{-mno-long-calls}.
-@item -mno-side-effects
-@opindex mno-side-effects
-Do not emit instructions with side-effects in addressing modes other than
-post-increment.
+@item -mmad
+@itemx -mno-mad
+@opindex mmad
+@opindex mno-mad
+Enable (disable) use of the @code{mad}, @code{madu} and @code{mul}
+instructions, as provided by the R4650 ISA@.
-@item -mstack-align
-@itemx -mno-stack-align
-@itemx -mdata-align
-@itemx -mno-data-align
-@itemx -mconst-align
-@itemx -mno-const-align
-@opindex mstack-align
-@opindex mno-stack-align
-@opindex mdata-align
-@opindex mno-data-align
-@opindex mconst-align
-@opindex mno-const-align
-These options (no-options) arranges (eliminate arrangements) for the
-stack-frame, individual data and constants to be aligned for the maximum
-single data access size for the chosen CPU model. The default is to
-arrange for 32-bit alignment. ABI details such as structure layout are
-not affected by these options.
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+@option{-mfused-madd}.
-@item -m32-bit
-@itemx -m16-bit
-@itemx -m8-bit
-@opindex m32-bit
-@opindex m16-bit
-@opindex m8-bit
-Similar to the stack- data- and const-align options above, these options
-arrange for stack-frame, writable data and constants to all be 32-bit,
-16-bit or 8-bit aligned. The default is 32-bit alignment.
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the FCSR Flush to Zero bit. This may be undesirable in some
+circumstances.
-@item -mno-prologue-epilogue
-@itemx -mprologue-epilogue
-@opindex mno-prologue-epilogue
-@opindex mprologue-epilogue
-With @option{-mno-prologue-epilogue}, the normal function prologue and
-epilogue that sets up the stack-frame are omitted and no return
-instructions or return sequences are generated in the code. Use this
-option only together with visual inspection of the compiled code: no
-warnings or errors are generated when call-saved registers must be saved,
-or storage for local variable needs to be allocated.
+@item -nocpp
+@opindex nocpp
+Tell the MIPS assembler to not run its preprocessor over user
+assembler files (with a @samp{.s} suffix) when assembling them.
-@item -mno-gotplt
-@itemx -mgotplt
-@opindex mno-gotplt
-@opindex mgotplt
-With @option{-fpic} and @option{-fPIC}, don't generate (do generate)
-instruction sequences that load addresses for functions from the PLT part
-of the GOT rather than (traditional on other architectures) calls to the
-PLT. The default is @option{-mgotplt}.
+@item -mfix-r4000
+@itemx -mno-fix-r4000
+@opindex mfix-r4000
+@opindex mno-fix-r4000
+Work around certain R4000 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@item
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+@item
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+@end itemize
-@item -maout
-@opindex maout
-Legacy no-op option only recognized with the cris-axis-aout target.
+@item -mfix-r4400
+@itemx -mno-fix-r4400
+@opindex mfix-r4400
+@opindex mno-fix-r4400
+Work around certain R4400 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@end itemize
-@item -melf
-@opindex melf
-Legacy no-op option only recognized with the cris-axis-elf and
-cris-axis-linux-gnu targets.
+@item -mfix-vr4120
+@itemx -mno-fix-vr4120
+@opindex mfix-vr4120
+Work around certain VR4120 errata:
+@itemize @minus
+@item
+@code{dmultu} does not always produce the correct result.
+@item
+@code{div} and @code{ddiv} do not always produce the correct result if one
+of the operands is negative.
+@end itemize
+The workarounds for the division errata rely on special functions in
+@file{libgcc.a}. At present, these functions are only provided by
+the @code{mips64vr*-elf} configurations.
-@item -melinux
-@opindex melinux
-Only recognized with the cris-axis-aout target, where it selects a
-GNU/linux-like multilib, include files and instruction set for
-@option{-march=v8}.
+Other VR4120 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by GCC itself.
-@item -mlinux
-@opindex mlinux
-Legacy no-op option only recognized with the cris-axis-linux-gnu target.
+@item -mfix-vr4130
+@opindex mfix-vr4130
+Work around the VR4130 @code{mflo}/@code{mfhi} errata. The
+workarounds are implemented by the assembler rather than by GCC,
+although GCC will avoid using @code{mflo} and @code{mfhi} if the
+VR4130 @code{macc}, @code{macchi}, @code{dmacc} and @code{dmacchi}
+instructions are available instead.
-@item -sim
-@opindex sim
-This option, recognized for the cris-axis-aout and cris-axis-elf arranges
-to link with input-output functions from a simulator library. Code,
-initialized data and zero-initialized data are allocated consecutively.
+@item -mfix-sb1
+@itemx -mno-fix-sb1
+@opindex mfix-sb1
+Work around certain SB-1 CPU core errata.
+(This flag currently works around the SB-1 revision 2
+``F1'' and ``F2'' floating point errata.)
-@item -sim2
-@opindex sim2
-Like @option{-sim}, but pass linker options to locate initialized data at
-0x40000000 and zero-initialized data at 0x80000000.
+@item -mflush-func=@var{func}
+@itemx -mno-flush-func
+@opindex mflush-func
+Specifies the function to call to flush the I and D caches, or to not
+call any such function. If called, the function must take the same
+arguments as the common @code{_flush_func()}, that is, the address of the
+memory range for which the cache is being flushed, the size of the
+memory range, and the number 3 (to flush both caches). The default
+depends on the target GCC was configured for, but commonly is either
+@samp{_flush_func} or @samp{__cpu_flush}.
+
+@item -mbranch-likely
+@itemx -mno-branch-likely
+@opindex mbranch-likely
+@opindex mno-branch-likely
+Enable or disable use of Branch Likely instructions, regardless of the
+default for the selected architecture. By default, Branch Likely
+instructions may be generated if they are supported by the selected
+architecture. An exception is for the MIPS32 and MIPS64 architectures
+and processors which implement those architectures; for those, Branch
+Likely instructions will not be generated by default because the MIPS32
+and MIPS64 architectures specifically deprecate their use.
+
+@item -mfp-exceptions
+@itemx -mno-fp-exceptions
+@opindex mfp-exceptions
+Specifies whether FP exceptions are enabled. This affects how we schedule
+FP instructions for some processors. The default is that FP exceptions are
+enabled.
+
+For instance, on the SB-1, if FP exceptions are disabled, and we are emitting
+64-bit code, then we can use both FP pipes. Otherwise, we can only use one
+FP pipe.
+
+@item -mvr4130-align
+@itemx -mno-vr4130-align
+@opindex mvr4130-align
+The VR4130 pipeline is two-way superscalar, but can only issue two
+instructions together if the first one is 8-byte aligned. When this
+option is enabled, GCC will align pairs of instructions that it
+thinks should execute in parallel.
+
+This option only has an effect when optimizing for the VR4130.
+It normally makes code faster, but at the expense of making it bigger.
+It is enabled by default at optimization level @option{-O3}.
@end table
@node MMIX Options
@@ -10478,6 +11120,91 @@ Force (do not force) generated code to have a single exit point in each
function.
@end table
+@node MN10300 Options
+@subsection MN10300 Options
+@cindex MN10300 options
+
+These @option{-m} options are defined for Matsushita MN10300 architectures:
+
+@table @gcctabopt
+@item -mmult-bug
+@opindex mmult-bug
+Generate code to avoid bugs in the multiply instructions for the MN10300
+processors. This is the default.
+
+@item -mno-mult-bug
+@opindex mno-mult-bug
+Do not generate code to avoid bugs in the multiply instructions for the
+MN10300 processors.
+
+@item -mam33
+@opindex mam33
+Generate code which uses features specific to the AM33 processor.
+
+@item -mno-am33
+@opindex mno-am33
+Do not generate code which uses features specific to the AM33 processor. This
+is the default.
+
+@item -mreturn-pointer-on-d0
+@opindex mreturn-pointer-on-d0
+When generating a function which returns a pointer, return the pointer
+in both @code{a0} and @code{d0}. Otherwise, the pointer is returned
+only in a0, and attempts to call such functions without a prototype
+would result in errors. Note that this option is on by default; use
+@option{-mno-return-pointer-on-d0} to disable it.
+
+@item -mno-crt0
+@opindex mno-crt0
+Do not link in the C run-time initialization object file.
+
+@item -mrelax
+@opindex mrelax
+Indicate to the linker that it should perform a relaxation optimization pass
+to shorten branches, calls and absolute memory addresses. This option only
+has an effect when used on the command line for the final link step.
+
+This option makes symbolic debugging impossible.
+@end table
+
+@node MT Options
+@subsection MT Options
+@cindex MT options
+
+These @option{-m} options are defined for Morpho MT architectures:
+
+@table @gcctabopt
+
+@item -march=@var{cpu-type}
+@opindex march
+Generate code that will run on @var{cpu-type}, which is the name of a system
+representing a certain processor type. Possible values for
+@var{cpu-type} are @samp{ms1-64-001}, @samp{ms1-16-002},
+@samp{ms1-16-003} and @samp{ms2}.
+
+When this option is not used, the default is @option{-march=ms1-16-002}.
+
+@item -mbacc
+@opindex mbacc
+Use byte loads and stores when generating code.
+
+@item -mno-bacc
+@opindex mno-bacc
+Do not use byte loads and stores when generating code.
+
+@item -msim
+@opindex msim
+Use simulator runtime
+
+@item -mno-crt0
+@opindex mno-crt0
+Do not link in the C run-time initialization object file
+@file{crti.o}. Other run-time initialization and termination files
+such as @file{startup.o} and @file{exit.o} are still included on the
+linker command line.
+
+@end table
+
@node PDP-11 Options
@subsection PDP-11 Options
@cindex PDP-11 Options
@@ -10516,12 +11243,12 @@ Generate code for a PDP-11/10.
@item -mbcopy-builtin
@opindex bcopy-builtin
-Use inline @code{movstrhi} patterns for copying memory. This is the
+Use inline @code{movmemhi} patterns for copying memory. This is the
default.
@item -mbcopy
@opindex mbcopy
-Do not use inline @code{movstrhi} patterns for copying memory.
+Do not use inline @code{movmemhi} patterns for copying memory.
@item -mint16
@itemx -mno-int32
@@ -10566,11 +11293,11 @@ Do not pretend that branches are expensive. This is the default.
@item -msplit
@opindex msplit
-Generate code for a system with split I&D.
+Generate code for a system with split I&D@.
@item -mno-split
@opindex mno-split
-Generate code for a system without split I&D. This is the default.
+Generate code for a system without split I&D@. This is the default.
@item -munix-asm
@opindex munix-asm
@@ -10583,245 +11310,1866 @@ Use DEC assembler syntax. This is the default when configured for any
PDP-11 target other than @samp{pdp11-*-bsd}.
@end table
-@node Xstormy16 Options
-@subsection Xstormy16 Options
-@cindex Xstormy16 Options
+@node PowerPC Options
+@subsection PowerPC Options
+@cindex PowerPC options
-These options are defined for Xstormy16:
+These are listed under @xref{RS/6000 and PowerPC Options}.
+@node RS/6000 and PowerPC Options
+@subsection IBM RS/6000 and PowerPC Options
+@cindex RS/6000 and PowerPC Options
+@cindex IBM RS/6000 and PowerPC Options
+
+These @samp{-m} options are defined for the IBM RS/6000 and PowerPC:
@table @gcctabopt
+@item -mpower
+@itemx -mno-power
+@itemx -mpower2
+@itemx -mno-power2
+@itemx -mpowerpc
+@itemx -mno-powerpc
+@itemx -mpowerpc-gpopt
+@itemx -mno-powerpc-gpopt
+@itemx -mpowerpc-gfxopt
+@itemx -mno-powerpc-gfxopt
+@itemx -mpowerpc64
+@itemx -mno-powerpc64
+@itemx -mmfcrf
+@itemx -mno-mfcrf
+@itemx -mpopcntb
+@itemx -mno-popcntb
+@itemx -mfprnd
+@itemx -mno-fprnd
+@opindex mpower
+@opindex mno-power
+@opindex mpower2
+@opindex mno-power2
+@opindex mpowerpc
+@opindex mno-powerpc
+@opindex mpowerpc-gpopt
+@opindex mno-powerpc-gpopt
+@opindex mpowerpc-gfxopt
+@opindex mno-powerpc-gfxopt
+@opindex mpowerpc64
+@opindex mno-powerpc64
+@opindex mmfcrf
+@opindex mno-mfcrf
+@opindex mpopcntb
+@opindex mno-popcntb
+@opindex mfprnd
+@opindex mno-fprnd
+GCC supports two related instruction set architectures for the
+RS/6000 and PowerPC@. The @dfn{POWER} instruction set are those
+instructions supported by the @samp{rios} chip set used in the original
+RS/6000 systems and the @dfn{PowerPC} instruction set is the
+architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
+the IBM 4xx, 6xx, and follow-on microprocessors.
+
+Neither architecture is a subset of the other. However there is a
+large common subset of instructions supported by both. An MQ
+register is included in processors supporting the POWER architecture.
+
+You use these options to specify which instructions are available on the
+processor you are using. The default value of these options is
+determined when configuring GCC@. Specifying the
+@option{-mcpu=@var{cpu_type}} overrides the specification of these
+options. We recommend you use the @option{-mcpu=@var{cpu_type}} option
+rather than the options listed above.
+
+The @option{-mpower} option allows GCC to generate instructions that
+are found only in the POWER architecture and to use the MQ register.
+Specifying @option{-mpower2} implies @option{-power} and also allows GCC
+to generate instructions that are present in the POWER2 architecture but
+not the original POWER architecture.
+
+The @option{-mpowerpc} option allows GCC to generate instructions that
+are found only in the 32-bit subset of the PowerPC architecture.
+Specifying @option{-mpowerpc-gpopt} implies @option{-mpowerpc} and also allows
+GCC to use the optional PowerPC architecture instructions in the
+General Purpose group, including floating-point square root. Specifying
+@option{-mpowerpc-gfxopt} implies @option{-mpowerpc} and also allows GCC to
+use the optional PowerPC architecture instructions in the Graphics
+group, including floating-point select.
+
+The @option{-mmfcrf} option allows GCC to generate the move from
+condition register field instruction implemented on the POWER4
+processor and other processors that support the PowerPC V2.01
+architecture.
+The @option{-mpopcntb} option allows GCC to generate the popcount and
+double precision FP reciprocal estimate instruction implemented on the
+POWER5 processor and other processors that support the PowerPC V2.02
+architecture.
+The @option{-mfprnd} option allows GCC to generate the FP round to
+integer instructions implemented on the POWER5+ processor and other
+processors that support the PowerPC V2.03 architecture.
+
+The @option{-mpowerpc64} option allows GCC to generate the additional
+64-bit instructions that are found in the full PowerPC64 architecture
+and to treat GPRs as 64-bit, doubleword quantities. GCC defaults to
+@option{-mno-powerpc64}.
+
+If you specify both @option{-mno-power} and @option{-mno-powerpc}, GCC
+will use only the instructions in the common subset of both
+architectures plus some special AIX common-mode calls, and will not use
+the MQ register. Specifying both @option{-mpower} and @option{-mpowerpc}
+permits GCC to use any instruction from either architecture and to
+allow use of the MQ register; specify this for the Motorola MPC601.
+
+@item -mnew-mnemonics
+@itemx -mold-mnemonics
+@opindex mnew-mnemonics
+@opindex mold-mnemonics
+Select which mnemonics to use in the generated assembler code. With
+@option{-mnew-mnemonics}, GCC uses the assembler mnemonics defined for
+the PowerPC architecture. With @option{-mold-mnemonics} it uses the
+assembler mnemonics defined for the POWER architecture. Instructions
+defined in only one architecture have only one mnemonic; GCC uses that
+mnemonic irrespective of which of these options is specified.
+
+GCC defaults to the mnemonics appropriate for the architecture in
+use. Specifying @option{-mcpu=@var{cpu_type}} sometimes overrides the
+value of these option. Unless you are building a cross-compiler, you
+should normally not specify either @option{-mnew-mnemonics} or
+@option{-mold-mnemonics}, but should instead accept the default.
+
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set architecture type, register usage, choice of mnemonics, and
+instruction scheduling parameters for machine type @var{cpu_type}.
+Supported values for @var{cpu_type} are @samp{401}, @samp{403},
+@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{505},
+@samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604},
+@samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400},
+@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823},
+@samp{860}, @samp{970}, @samp{8540}, @samp{ec603e}, @samp{G3},
+@samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3},
+@samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6},
+@samp{common}, @samp{powerpc}, @samp{powerpc64},
+@samp{rios}, @samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64}.
+
+@option{-mcpu=common} selects a completely generic processor. Code
+generated under this option will run on any POWER or PowerPC processor.
+GCC will use only the instructions in the common subset of both
+architectures, and will not use the MQ register. GCC assumes a generic
+processor model for scheduling purposes.
+
+@option{-mcpu=power}, @option{-mcpu=power2}, @option{-mcpu=powerpc}, and
+@option{-mcpu=powerpc64} specify generic POWER, POWER2, pure 32-bit
+PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
+types, with an appropriate, generic processor model assumed for
+scheduling purposes.
+
+The other options specify a specific processor. Code generated under
+those options will run best on that processor, and may not run at all on
+others.
+
+The @option{-mcpu} options automatically enable or disable the
+following options: @option{-maltivec}, @option{-mfprnd},
+@option{-mhard-float}, @option{-mmfcrf}, @option{-mmultiple},
+@option{-mnew-mnemonics}, @option{-mpopcntb}, @option{-mpower},
+@option{-mpower2}, @option{-mpowerpc64}, @option{-mpowerpc-gpopt},
+@option{-mpowerpc-gfxopt}, @option{-mstring}, @option{-mmulhw}, @option{-mdlmzb}.
+The particular options
+set for any particular CPU will vary between compiler versions,
+depending on what setting seems to produce optimal code for that CPU;
+it doesn't necessarily reflect the actual hardware's capabilities. If
+you wish to set an individual option to a particular value, you may
+specify it after the @option{-mcpu} option, like @samp{-mcpu=970
+-mno-altivec}.
+
+On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are
+not enabled or disabled by the @option{-mcpu} option at present because
+AIX does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set the instruction scheduling parameters for machine type
+@var{cpu_type}, but do not set the architecture type, register usage, or
+choice of mnemonics, as @option{-mcpu=@var{cpu_type}} would. The same
+values for @var{cpu_type} are used for @option{-mtune} as for
+@option{-mcpu}. If both are specified, the code generated will use the
+architecture, registers, and mnemonics set by @option{-mcpu}, but the
+scheduling parameters set by @option{-mtune}.
+
+@item -mswdiv
+@itemx -mno-swdiv
+@opindex mswdiv
+@opindex mno-swdiv
+Generate code to compute division as reciprocal estimate and iterative
+refinement, creating opportunities for increased throughput. This
+feature requires: optional PowerPC Graphics instruction set for single
+precision and FRE instruction for double precision, assuming divides
+cannot generate user-visible traps, and the domain values not include
+Infinities, denormals or zero denominator.
+
+@item -maltivec
+@itemx -mno-altivec
+@opindex maltivec
+@opindex mno-altivec
+Generate code that uses (does not use) AltiVec instructions, and also
+enable the use of built-in functions that allow more direct access to
+the AltiVec instruction set. You may also need to set
+@option{-mabi=altivec} to adjust the current ABI with AltiVec ABI
+enhancements.
+
+@item -mvrsave
+@item -mno-vrsave
+@opindex mvrsave
+@opindex mno-vrsave
+Generate VRSAVE instructions when generating AltiVec code.
+
+@item -msecure-plt
+@opindex msecure-plt
+Generate code that allows ld and ld.so to build executables and shared
+libraries with non-exec .plt and .got sections. This is a PowerPC
+32-bit SYSV ABI option.
+
+@item -mbss-plt
+@opindex mbss-plt
+Generate code that uses a BSS .plt section that ld.so fills in, and
+requires .plt and .got sections that are both writable and executable.
+This is a PowerPC 32-bit SYSV ABI option.
+
+@item -misel
+@itemx -mno-isel
+@opindex misel
+@opindex mno-isel
+This switch enables or disables the generation of ISEL instructions.
+
+@item -misel=@var{yes/no}
+This switch has been deprecated. Use @option{-misel} and
+@option{-mno-isel} instead.
+
+@item -mspe
+@itemx -mno-spe
+@opindex mspe
+@opindex mno-spe
+This switch enables or disables the generation of SPE simd
+instructions.
+
+@item -mspe=@var{yes/no}
+This option has been deprecated. Use @option{-mspe} and
+@option{-mno-spe} instead.
+
+@item -mfloat-gprs=@var{yes/single/double/no}
+@itemx -mfloat-gprs
+@opindex mfloat-gprs
+This switch enables or disables the generation of floating point
+operations on the general purpose registers for architectures that
+support it.
+
+The argument @var{yes} or @var{single} enables the use of
+single-precision floating point operations.
+
+The argument @var{double} enables the use of single and
+double-precision floating point operations.
+
+The argument @var{no} disables floating point operations on the
+general purpose registers.
+
+This option is currently only available on the MPC854x.
+
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for 32-bit or 64-bit environments of Darwin and SVR4
+targets (including GNU/Linux). The 32-bit environment sets int, long
+and pointer to 32 bits and generates code that runs on any PowerPC
+variant. The 64-bit environment sets int to 32 bits and long and
+pointer to 64 bits, and generates code for PowerPC64, as for
+@option{-mpowerpc64}.
+
+@item -mfull-toc
+@itemx -mno-fp-in-toc
+@itemx -mno-sum-in-toc
+@itemx -mminimal-toc
+@opindex mfull-toc
+@opindex mno-fp-in-toc
+@opindex mno-sum-in-toc
+@opindex mminimal-toc
+Modify generation of the TOC (Table Of Contents), which is created for
+every executable file. The @option{-mfull-toc} option is selected by
+default. In that case, GCC will allocate at least one TOC entry for
+each unique non-automatic variable reference in your program. GCC
+will also place floating-point constants in the TOC@. However, only
+16,384 entries are available in the TOC@.
+
+If you receive a linker error message that saying you have overflowed
+the available TOC space, you can reduce the amount of TOC space used
+with the @option{-mno-fp-in-toc} and @option{-mno-sum-in-toc} options.
+@option{-mno-fp-in-toc} prevents GCC from putting floating-point
+constants in the TOC and @option{-mno-sum-in-toc} forces GCC to
+generate code to calculate the sum of an address and a constant at
+run-time instead of putting that sum into the TOC@. You may specify one
+or both of these options. Each causes GCC to produce very slightly
+slower and larger code at the expense of conserving TOC space.
+
+If you still run out of space in the TOC even when you specify both of
+these options, specify @option{-mminimal-toc} instead. This option causes
+GCC to make only one TOC entry for every file. When you specify this
+option, GCC will produce code that is slower and larger but which
+uses extremely little TOC space. You may wish to use this option
+only on files that contain less frequently executed code.
+
+@item -maix64
+@itemx -maix32
+@opindex maix64
+@opindex maix32
+Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit
+@code{long} type, and the infrastructure needed to support them.
+Specifying @option{-maix64} implies @option{-mpowerpc64} and
+@option{-mpowerpc}, while @option{-maix32} disables the 64-bit ABI and
+implies @option{-mno-powerpc64}. GCC defaults to @option{-maix32}.
+
+@item -mxl-compat
+@itemx -mno-xl-compat
+@opindex mxl-compat
+@opindex mno-xl-compat
+Produce code that conforms more closely to IBM XL compiler semantics
+when using AIX-compatible ABI. Pass floating-point arguments to
+prototyped functions beyond the register save area (RSA) on the stack
+in addition to argument FPRs. Do not assume that most significant
+double in 128-bit long double value is properly rounded when comparing
+values and converting to double. Use XL symbol names for long double
+support routines.
+
+The AIX calling convention was extended but not initially documented to
+handle an obscure K&R C case of calling a function that takes the
+address of its arguments with fewer arguments than declared. IBM XL
+compilers access floating point arguments which do not fit in the
+RSA from the stack when a subroutine is compiled without
+optimization. Because always storing floating-point arguments on the
+stack is inefficient and rarely needed, this option is not enabled by
+default and only is necessary when calling subroutines compiled by IBM
+XL compilers without optimization.
+
+@item -mpe
+@opindex mpe
+Support @dfn{IBM RS/6000 SP} @dfn{Parallel Environment} (PE)@. Link an
+application written to use message passing with special startup code to
+enable the application to run. The system must have PE installed in the
+standard location (@file{/usr/lpp/ppe.poe/}), or the @file{specs} file
+must be overridden with the @option{-specs=} option to specify the
+appropriate directory location. The Parallel Environment does not
+support threads, so the @option{-mpe} option and the @option{-pthread}
+option are incompatible.
+
+@item -malign-natural
+@itemx -malign-power
+@opindex malign-natural
+@opindex malign-power
+On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
+@option{-malign-natural} overrides the ABI-defined alignment of larger
+types, such as floating-point doubles, on their natural size-based boundary.
+The option @option{-malign-power} instructs GCC to follow the ABI-specified
+alignment rules. GCC defaults to the standard alignment defined in the ABI@.
+
+On 64-bit Darwin, natural alignment is the default, and @option{-malign-power}
+is not supported.
+
+@item -msoft-float
+@itemx -mhard-float
+@opindex msoft-float
+@opindex mhard-float
+Generate code that does not use (uses) the floating-point register set.
+Software floating point emulation is provided if you use the
+@option{-msoft-float} option, and pass the option to GCC when linking.
+
+@item -mmultiple
+@itemx -mno-multiple
+@opindex mmultiple
+@opindex mno-multiple
+Generate code that uses (does not use) the load multiple word
+instructions and the store multiple word instructions. These
+instructions are generated by default on POWER systems, and not
+generated on PowerPC systems. Do not use @option{-mmultiple} on little
+endian PowerPC systems, since those instructions do not work when the
+processor is in little endian mode. The exceptions are PPC740 and
+PPC750 which permit the instructions usage in little endian mode.
+
+@item -mstring
+@itemx -mno-string
+@opindex mstring
+@opindex mno-string
+Generate code that uses (does not use) the load string instructions
+and the store string word instructions to save multiple registers and
+do small block moves. These instructions are generated by default on
+POWER systems, and not generated on PowerPC systems. Do not use
+@option{-mstring} on little endian PowerPC systems, since those
+instructions do not work when the processor is in little endian mode.
+The exceptions are PPC740 and PPC750 which permit the instructions
+usage in little endian mode.
+
+@item -mupdate
+@itemx -mno-update
+@opindex mupdate
+@opindex mno-update
+Generate code that uses (does not use) the load or store instructions
+that update the base register to the address of the calculated memory
+location. These instructions are generated by default. If you use
+@option{-mno-update}, there is a small window between the time that the
+stack pointer is updated and the address of the previous frame is
+stored, which means code that walks the stack frame across interrupts or
+signals may get corrupted data.
+
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating is used.
+
+@item -mmulhw
+@itemx -mno-mulhw
+@opindex mmulhw
+@opindex mno-mulhw
+Generate code that uses (does not use) the half-word multiply and
+multiply-accumulate instructions on the IBM 405 and 440 processors.
+These instructions are generated by default when targetting those
+processors.
+
+@item -mdlmzb
+@itemx -mno-dlmzb
+@opindex mdlmzb
+@opindex mno-dlmzb
+Generate code that uses (does not use) the string-search @samp{dlmzb}
+instruction on the IBM 405 and 440 processors. This instruction is
+generated by default when targetting those processors.
+
+@item -mno-bit-align
+@itemx -mbit-align
+@opindex mno-bit-align
+@opindex mbit-align
+On System V.4 and embedded PowerPC systems do not (do) force structures
+and unions that contain bit-fields to be aligned to the base type of the
+bit-field.
+
+For example, by default a structure containing nothing but 8
+@code{unsigned} bit-fields of length 1 would be aligned to a 4 byte
+boundary and have a size of 4 bytes. By using @option{-mno-bit-align},
+the structure would be aligned to a 1 byte boundary and be one byte in
+size.
+
+@item -mno-strict-align
+@itemx -mstrict-align
+@opindex mno-strict-align
+@opindex mstrict-align
+On System V.4 and embedded PowerPC systems do not (do) assume that
+unaligned memory references will be handled by the system.
+
+@item -mrelocatable
+@itemx -mno-relocatable
+@opindex mrelocatable
+@opindex mno-relocatable
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. If you
+use @option{-mrelocatable} on any module, all objects linked together must
+be compiled with @option{-mrelocatable} or @option{-mrelocatable-lib}.
+
+@item -mrelocatable-lib
+@itemx -mno-relocatable-lib
+@opindex mrelocatable-lib
+@opindex mno-relocatable-lib
+On embedded PowerPC systems generate code that allows (does not allow)
+the program to be relocated to a different address at runtime. Modules
+compiled with @option{-mrelocatable-lib} can be linked with either modules
+compiled without @option{-mrelocatable} and @option{-mrelocatable-lib} or
+with modules compiled with the @option{-mrelocatable} options.
+
+@item -mno-toc
+@itemx -mtoc
+@opindex mno-toc
+@opindex mtoc
+On System V.4 and embedded PowerPC systems do not (do) assume that
+register 2 contains a pointer to a global area pointing to the addresses
+used in the program.
+
+@item -mlittle
+@itemx -mlittle-endian
+@opindex mlittle
+@opindex mlittle-endian
+On System V.4 and embedded PowerPC systems compile code for the
+processor in little endian mode. The @option{-mlittle-endian} option is
+the same as @option{-mlittle}.
+
+@item -mbig
+@itemx -mbig-endian
+@opindex mbig
+@opindex mbig-endian
+On System V.4 and embedded PowerPC systems compile code for the
+processor in big endian mode. The @option{-mbig-endian} option is
+the same as @option{-mbig}.
+
+@item -mdynamic-no-pic
+@opindex mdynamic-no-pic
+On Darwin and Mac OS X systems, compile code so that it is not
+relocatable, but that its external references are relocatable. The
+resulting code is suitable for applications, but not shared
+libraries.
+
+@item -mprioritize-restricted-insns=@var{priority}
+@opindex mprioritize-restricted-insns
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument @var{priority} takes the value @var{0/1/2} to assign
+@var{no/highest/second-highest} priority to dispatch slot restricted
+instructions.
+
+@item -msched-costly-dep=@var{dependence_type}
+@opindex msched-costly-dep
+This option controls which dependences are considered costly
+by the target during instruction scheduling. The argument
+@var{dependence_type} takes one of the following values:
+@var{no}: no dependence is costly,
+@var{all}: all dependences are costly,
+@var{true_store_to_load}: a true dependence from store to load is costly,
+@var{store_to_load}: any dependence from store to load is costly,
+@var{number}: any dependence which latency >= @var{number} is costly.
+
+@item -minsert-sched-nops=@var{scheme}
+@opindex minsert-sched-nops
+This option controls which nop insertion scheme will be used during
+the second scheduling pass. The argument @var{scheme} takes one of the
+following values:
+@var{no}: Don't insert nops.
+@var{pad}: Pad with nops any dispatch group which has vacant issue slots,
+according to the scheduler's grouping.
+@var{regroup_exact}: Insert nops to force costly dependent insns into
+separate groups. Insert exactly as many nops as needed to force an insn
+to a new group, according to the estimated processor grouping.
+@var{number}: Insert nops to force costly dependent insns into
+separate groups. Insert @var{number} nops to force an insn to a new group.
+
+@item -mcall-sysv
+@opindex mcall-sysv
+On System V.4 and embedded PowerPC systems compile code using calling
+conventions that adheres to the March 1995 draft of the System V
+Application Binary Interface, PowerPC processor supplement. This is the
+default unless you configured GCC using @samp{powerpc-*-eabiaix}.
+
+@item -mcall-sysv-eabi
+@opindex mcall-sysv-eabi
+Specify both @option{-mcall-sysv} and @option{-meabi} options.
+
+@item -mcall-sysv-noeabi
+@opindex mcall-sysv-noeabi
+Specify both @option{-mcall-sysv} and @option{-mno-eabi} options.
+
+@item -mcall-solaris
+@opindex mcall-solaris
+On System V.4 and embedded PowerPC systems compile code for the Solaris
+operating system.
+
+@item -mcall-linux
+@opindex mcall-linux
+On System V.4 and embedded PowerPC systems compile code for the
+Linux-based GNU system.
+
+@item -mcall-gnu
+@opindex mcall-gnu
+On System V.4 and embedded PowerPC systems compile code for the
+Hurd-based GNU system.
+
+@item -mcall-netbsd
+@opindex mcall-netbsd
+On System V.4 and embedded PowerPC systems compile code for the
+NetBSD operating system.
+
+@item -maix-struct-return
+@opindex maix-struct-return
+Return all structures in memory (as specified by the AIX ABI)@.
+
+@item -msvr4-struct-return
+@opindex msvr4-struct-return
+Return structures smaller than 8 bytes in registers (as specified by the
+SVR4 ABI)@.
+
+@item -mabi=@var{abi-type}
+@opindex mabi
+Extend the current ABI with a particular extension, or remove such extension.
+Valid values are @var{altivec}, @var{no-altivec}, @var{spe},
+@var{no-spe}, @var{ibmlongdouble}, @var{ieeelongdouble}@.
+
+@item -mabi=spe
+@opindex mabi=spe
+Extend the current ABI with SPE ABI extensions. This does not change
+the default ABI, instead it adds the SPE ABI extensions to the current
+ABI@.
+
+@item -mabi=no-spe
+@opindex mabi=no-spe
+Disable Booke SPE ABI extensions for the current ABI@.
+
+@item -mabi=ibmlongdouble
+@opindex mabi=ibmlongdouble
+Change the current ABI to use IBM extended precision long double.
+This is a PowerPC 32-bit SYSV ABI option.
+
+@item -mabi=ieeelongdouble
+@opindex mabi=ieeelongdouble
+Change the current ABI to use IEEE extended precision long double.
+This is a PowerPC 32-bit Linux ABI option.
+
+@item -mprototype
+@itemx -mno-prototype
+@opindex mprototype
+@opindex mno-prototype
+On System V.4 and embedded PowerPC systems assume that all calls to
+variable argument functions are properly prototyped. Otherwise, the
+compiler must insert an instruction before every non prototyped call to
+set or clear bit 6 of the condition code register (@var{CR}) to
+indicate whether floating point values were passed in the floating point
+registers in case the function takes a variable arguments. With
+@option{-mprototype}, only calls to prototyped variable argument functions
+will set or clear the bit.
+
@item -msim
@opindex msim
-Choose startup files and linker script suitable for the simulator.
-@end table
+On embedded PowerPC systems, assume that the startup module is called
+@file{sim-crt0.o} and that the standard C libraries are @file{libsim.a} and
+@file{libc.a}. This is the default for @samp{powerpc-*-eabisim}.
+configurations.
-@node FRV Options
-@subsection FRV Options
-@cindex FRV Options
+@item -mmvme
+@opindex mmvme
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libmvme.a} and
+@file{libc.a}.
-@table @gcctabopt
-@item -mgpr-32
-@opindex mgpr-32
+@item -mads
+@opindex mads
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libads.a} and
+@file{libc.a}.
-Only use the first 32 general purpose registers.
+@item -myellowknife
+@opindex myellowknife
+On embedded PowerPC systems, assume that the startup module is called
+@file{crt0.o} and the standard C libraries are @file{libyk.a} and
+@file{libc.a}.
-@item -mgpr-64
-@opindex mgpr-64
+@item -mvxworks
+@opindex mvxworks
+On System V.4 and embedded PowerPC systems, specify that you are
+compiling for a VxWorks system.
-Use all 64 general purpose registers.
+@item -mwindiss
+@opindex mwindiss
+Specify that you are compiling for the WindISS simulation environment.
-@item -mfpr-32
-@opindex mfpr-32
+@item -memb
+@opindex memb
+On embedded PowerPC systems, set the @var{PPC_EMB} bit in the ELF flags
+header to indicate that @samp{eabi} extended relocations are used.
-Use only the first 32 floating point registers.
+@item -meabi
+@itemx -mno-eabi
+@opindex meabi
+@opindex mno-eabi
+On System V.4 and embedded PowerPC systems do (do not) adhere to the
+Embedded Applications Binary Interface (eabi) which is a set of
+modifications to the System V.4 specifications. Selecting @option{-meabi}
+means that the stack is aligned to an 8 byte boundary, a function
+@code{__eabi} is called to from @code{main} to set up the eabi
+environment, and the @option{-msdata} option can use both @code{r2} and
+@code{r13} to point to two separate small data areas. Selecting
+@option{-mno-eabi} means that the stack is aligned to a 16 byte boundary,
+do not call an initialization function from @code{main}, and the
+@option{-msdata} option will only use @code{r13} to point to a single
+small data area. The @option{-meabi} option is on by default if you
+configured GCC using one of the @samp{powerpc*-*-eabi*} options.
-@item -mfpr-64
-@opindex mfpr-64
+@item -msdata=eabi
+@opindex msdata=eabi
+On System V.4 and embedded PowerPC systems, put small initialized
+@code{const} global and static data in the @samp{.sdata2} section, which
+is pointed to by register @code{r2}. Put small initialized
+non-@code{const} global and static data in the @samp{.sdata} section,
+which is pointed to by register @code{r13}. Put small uninitialized
+global and static data in the @samp{.sbss} section, which is adjacent to
+the @samp{.sdata} section. The @option{-msdata=eabi} option is
+incompatible with the @option{-mrelocatable} option. The
+@option{-msdata=eabi} option also sets the @option{-memb} option.
-Use all 64 floating point registers
+@item -msdata=sysv
+@opindex msdata=sysv
+On System V.4 and embedded PowerPC systems, put small global and static
+data in the @samp{.sdata} section, which is pointed to by register
+@code{r13}. Put small uninitialized global and static data in the
+@samp{.sbss} section, which is adjacent to the @samp{.sdata} section.
+The @option{-msdata=sysv} option is incompatible with the
+@option{-mrelocatable} option.
+
+@item -msdata=default
+@itemx -msdata
+@opindex msdata=default
+@opindex msdata
+On System V.4 and embedded PowerPC systems, if @option{-meabi} is used,
+compile code the same as @option{-msdata=eabi}, otherwise compile code the
+same as @option{-msdata=sysv}.
+
+@item -msdata-data
+@opindex msdata-data
+On System V.4 and embedded PowerPC systems, put small global
+data in the @samp{.sdata} section. Put small uninitialized global
+data in the @samp{.sbss} section. Do not use register @code{r13}
+to address small data however. This is the default behavior unless
+other @option{-msdata} options are used.
+
+@item -msdata=none
+@itemx -mno-sdata
+@opindex msdata=none
+@opindex mno-sdata
+On embedded PowerPC systems, put all initialized global and static data
+in the @samp{.data} section, and all uninitialized data in the
+@samp{.bss} section.
+
+@item -G @var{num}
+@opindex G
+@cindex smaller data references (PowerPC)
+@cindex .sdata/.sdata2 references (PowerPC)
+On embedded PowerPC systems, put global and static items less than or
+equal to @var{num} bytes into the small data or bss sections instead of
+the normal data or bss section. By default, @var{num} is 8. The
+@option{-G @var{num}} switch is also passed to the linker.
+All modules should be compiled with the same @option{-G @var{num}} value.
+
+@item -mregnames
+@itemx -mno-regnames
+@opindex mregnames
+@opindex mno-regnames
+On System V.4 and embedded PowerPC systems do (do not) emit register
+names in the assembly language output using symbolic forms.
+
+@item -mlongcall
+@itemx -mno-longcall
+@opindex mlongcall
+@opindex mno-longcall
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the @code{shortcall} function attribute, or by @code{#pragma
+longcall(0)}.
+Some linkers are capable of detecting out-of-range calls and generating
+glue code on the fly. On these systems, long calls are unnecessary and
+generate slower code. As of this writing, the AIX linker can do this,
+as can the GNU linker for PowerPC/64. It is planned to add this feature
+to the GNU linker for 32-bit PowerPC systems as well.
+
+On Darwin/PPC systems, @code{#pragma longcall} will generate ``jbsr
+callee, L42'', plus a ``branch island'' (glue code). The two target
+addresses represent the callee and the ``branch island''. The
+Darwin/PPC linker will prefer the first address and generate a ``bl
+callee'' if the PPC ``bl'' instruction will reach the callee directly;
+otherwise, the linker will generate ``bl L42'' to call the ``branch
+island''. The ``branch island'' is appended to the body of the
+calling function; it computes the full 32-bit address of the callee
+and jumps to it.
+
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+
+In the future, we may cause GCC to ignore all longcall specifications
+when the linker is known to generate glue.
+
+@item -pthread
+@opindex pthread
+Adds support for multithreading with the @dfn{pthreads} library.
+This option sets flags for both the preprocessor and linker.
+
+@end table
+
+@node S/390 and zSeries Options
+@subsection S/390 and zSeries Options
+@cindex S/390 and zSeries Options
+
+These are the @samp{-m} options defined for the S/390 and zSeries architecture.
+
+@table @gcctabopt
@item -mhard-float
+@itemx -msoft-float
@opindex mhard-float
+@opindex msoft-float
+Use (do not use) the hardware floating-point instructions and registers
+for floating-point operations. When @option{-msoft-float} is specified,
+functions in @file{libgcc.a} will be used to perform floating-point
+operations. When @option{-mhard-float} is specified, the compiler
+generates IEEE floating-point instructions. This is the default.
-Use hardware instructions for floating point operations.
+@item -mlong-double-64
+@itemx -mlong-double-128
+@opindex mlong-double-64
+@opindex mlong-double-128
+These switches control the size of @code{long double} type. A size
+of 64bit makes the @code{long double} type equivalent to the @code{double}
+type. This is the default.
-@item -msoft-float
-@opindex msoft-float
+@item -mbackchain
+@itemx -mno-backchain
+@opindex mbackchain
+@opindex mno-backchain
+Store (do not store) the address of the caller's frame as backchain pointer
+into the callee's stack frame.
+A backchain may be needed to allow debugging using tools that do not understand
+DWARF-2 call frame information.
+When @option{-mno-packed-stack} is in effect, the backchain pointer is stored
+at the bottom of the stack frame; when @option{-mpacked-stack} is in effect,
+the backchain is placed into the topmost word of the 96/160 byte register
+save area.
+
+In general, code compiled with @option{-mbackchain} is call-compatible with
+code compiled with @option{-mmo-backchain}; however, use of the backchain
+for debugging purposes usually requires that the whole binary is built with
+@option{-mbackchain}. Note that the combination of @option{-mbackchain},
+@option{-mpacked-stack} and @option{-mhard-float} is not supported. In order
+to build a linux kernel use @option{-msoft-float}.
+
+The default is to not maintain the backchain.
+
+@item -mpacked-stack
+@item -mno-packed-stack
+@opindex mpacked-stack
+@opindex mno-packed-stack
+Use (do not use) the packed stack layout. When @option{-mno-packed-stack} is
+specified, the compiler uses the all fields of the 96/160 byte register save
+area only for their default purpose; unused fields still take up stack space.
+When @option{-mpacked-stack} is specified, register save slots are densely
+packed at the top of the register save area; unused space is reused for other
+purposes, allowing for more efficient use of the available stack space.
+However, when @option{-mbackchain} is also in effect, the topmost word of
+the save area is always used to store the backchain, and the return address
+register is always saved two words below the backchain.
+
+As long as the stack frame backchain is not used, code generated with
+@option{-mpacked-stack} is call-compatible with code generated with
+@option{-mno-packed-stack}. Note that some non-FSF releases of GCC 2.95 for
+S/390 or zSeries generated code that uses the stack frame backchain at run
+time, not just for debugging purposes. Such code is not call-compatible
+with code compiled with @option{-mpacked-stack}. Also, note that the
+combination of @option{-mbackchain},
+@option{-mpacked-stack} and @option{-mhard-float} is not supported. In order
+to build a linux kernel use @option{-msoft-float}.
+
+The default is to not use the packed stack layout.
-Use library routines for floating point operations.
+@item -msmall-exec
+@itemx -mno-small-exec
+@opindex msmall-exec
+@opindex mno-small-exec
+Generate (or do not generate) code using the @code{bras} instruction
+to do subroutine calls.
+This only works reliably if the total executable size does not
+exceed 64k. The default is to use the @code{basr} instruction instead,
+which does not have this limitation.
-@item -malloc-cc
-@opindex malloc-cc
+@item -m64
+@itemx -m31
+@opindex m64
+@opindex m31
+When @option{-m31} is specified, generate code compliant to the
+GNU/Linux for S/390 ABI@. When @option{-m64} is specified, generate
+code compliant to the GNU/Linux for zSeries ABI@. This allows GCC in
+particular to generate 64-bit instructions. For the @samp{s390}
+targets, the default is @option{-m31}, while the @samp{s390x}
+targets default to @option{-m64}.
-Dynamically allocate condition code registers.
+@item -mzarch
+@itemx -mesa
+@opindex mzarch
+@opindex mesa
+When @option{-mzarch} is specified, generate code using the
+instructions available on z/Architecture.
+When @option{-mesa} is specified, generate code using the
+instructions available on ESA/390. Note that @option{-mesa} is
+not possible with @option{-m64}.
+When generating code compliant to the GNU/Linux for S/390 ABI,
+the default is @option{-mesa}. When generating code compliant
+to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
-@item -mfixed-cc
-@opindex mfixed-cc
+@item -mmvcle
+@itemx -mno-mvcle
+@opindex mmvcle
+@opindex mno-mvcle
+Generate (or do not generate) code using the @code{mvcle} instruction
+to perform block moves. When @option{-mno-mvcle} is specified,
+use a @code{mvc} loop instead. This is the default unless optimizing for
+size.
-Do not try to dynamically allocate condition code registers, only
-use @code{icc0} and @code{fcc0}.
+@item -mdebug
+@itemx -mno-debug
+@opindex mdebug
+@opindex mno-debug
+Print (or do not print) additional debug information when compiling.
+The default is to not print debug information.
-@item -mdword
-@opindex mdword
+@item -march=@var{cpu-type}
+@opindex march
+Generate code that will run on @var{cpu-type}, which is the name of a system
+representing a certain processor type. Possible values for
+@var{cpu-type} are @samp{g5}, @samp{g6}, @samp{z900}, and @samp{z990}.
+When generating code using the instructions available on z/Architecture,
+the default is @option{-march=z900}. Otherwise, the default is
+@option{-march=g5}.
-Change ABI to use double word insns.
+@item -mtune=@var{cpu-type}
+@opindex mtune
+Tune to @var{cpu-type} everything applicable about the generated code,
+except for the ABI and the set of available instructions.
+The list of @var{cpu-type} values is the same as for @option{-march}.
+The default is the value used for @option{-march}.
-@item -mno-dword
-@opindex mno-dword
+@item -mtpf-trace
+@itemx -mno-tpf-trace
+@opindex mtpf-trace
+@opindex mno-tpf-trace
+Generate code that adds (does not add) in TPF OS specific branches to trace
+routines in the operating system. This option is off by default, even
+when compiling for the TPF OS@.
-Do not use double word instructions.
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Generate code that uses (does not use) the floating point multiply and
+accumulate instructions. These instructions are generated by default if
+hardware floating point is used.
-@item -mdouble
-@opindex mdouble
+@item -mwarn-framesize=@var{framesize}
+@opindex mwarn-framesize
+Emit a warning if the current function exceeds the given frame size. Because
+this is a compile time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions which most probably cause
+a stack overflow. It is useful to be used in an environment with limited stack
+size e.g.@: the linux kernel.
+
+@item -mwarn-dynamicstack
+@opindex mwarn-dynamicstack
+Emit a warning if the function calls alloca or uses dynamically
+sized arrays. This is generally a bad idea with a limited stack size.
+
+@item -mstack-guard=@var{stack-guard}
+@item -mstack-size=@var{stack-size}
+@opindex mstack-guard
+@opindex mstack-size
+These arguments always have to be used in conjunction. If they are present the s390
+back end emits additional instructions in the function prologue which trigger a trap
+if the stack size is @var{stack-guard} bytes above the @var{stack-size}
+(remember that the stack on s390 grows downward). These options are intended to
+be used to help debugging stack overflow problems. The additionally emitted code
+causes only little overhead and hence can also be used in production like systems
+without greater performance degradation. The given values have to be exact
+powers of 2 and @var{stack-size} has to be greater than @var{stack-guard} without
+exceeding 64k.
+In order to be efficient the extra code makes the assumption that the stack starts
+at an address aligned to the value given by @var{stack-size}.
+@end table
-Use floating point double instructions.
+@node Score Options
+@subsection Score Options
+@cindex Score Options
-@item -mno-double
-@opindex mno-double
+These options are defined for Score implementations:
-Do not use floating point double instructions.
+@table @gcctabopt
+@item -meb
+@opindex meb
+Compile code for big endian mode. This is the default.
-@item -mmedia
-@opindex mmedia
+@item -mel
+@opindex mel
+Compile code for little endian mode.
-Use media instructions.
+@item -mnhwloop
+@opindex mnhwloop
+Disable generate bcnz instruction.
-@item -mno-media
-@opindex mno-media
+@item -muls
+@opindex muls
+Enable generate unaligned load and store instruction.
-Do not use media instructions.
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
-@item -mmuladd
-@opindex mmuladd
+@item -mscore5
+@opindex mscore5
+Specify the SCORE5 as the target architecture.
-Use multiply and add/subtract instructions.
+@item -mscore5u
+@opindex mscore5u
+Specify the SCORE5U of the target architecture.
-@item -mno-muladd
-@opindex mno-muladd
+@item -mscore7
+@opindex mscore7
+Specify the SCORE7 as the target architecture. This is the default.
-Do not use multiply and add/subtract instructions.
+@item -mscore7d
+@opindex mscore7d
+Specify the SCORE7D as the target architecture.
+@end table
-@item -mlibrary-pic
-@opindex mlibrary-pic
+@node SH Options
+@subsection SH Options
-Enable PIC support for building libraries
+These @samp{-m} options are defined for the SH implementations:
-@item -macc-4
-@opindex macc-4
+@table @gcctabopt
+@item -m1
+@opindex m1
+Generate code for the SH1.
-Use only the first four media accumulator registers.
+@item -m2
+@opindex m2
+Generate code for the SH2.
-@item -macc-8
-@opindex macc-8
+@item -m2e
+Generate code for the SH2e.
-Use all eight media accumulator registers.
+@item -m3
+@opindex m3
+Generate code for the SH3.
-@item -mpack
-@opindex mpack
+@item -m3e
+@opindex m3e
+Generate code for the SH3e.
-Pack VLIW instructions.
+@item -m4-nofpu
+@opindex m4-nofpu
+Generate code for the SH4 without a floating-point unit.
-@item -mno-pack
-@opindex mno-pack
+@item -m4-single-only
+@opindex m4-single-only
+Generate code for the SH4 with a floating-point unit that only
+supports single-precision arithmetic.
-Do not pack VLIW instructions.
+@item -m4-single
+@opindex m4-single
+Generate code for the SH4 assuming the floating-point unit is in
+single-precision mode by default.
-@item -mno-eflags
-@opindex mno-eflags
+@item -m4
+@opindex m4
+Generate code for the SH4.
-Do not mark ABI switches in e_flags.
+@item -m4a-nofpu
+@opindex m4a-nofpu
+Generate code for the SH4al-dsp, or for a SH4a in such a way that the
+floating-point unit is not used.
-@item -mcond-move
-@opindex mcond-move
+@item -m4a-single-only
+@opindex m4a-single-only
+Generate code for the SH4a, in such a way that no double-precision
+floating point operations are used.
-Enable the use of conditional-move instructions (default).
+@item -m4a-single
+@opindex m4a-single
+Generate code for the SH4a assuming the floating-point unit is in
+single-precision mode by default.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -m4a
+@opindex m4a
+Generate code for the SH4a.
-@item -mno-cond-move
-@opindex mno-cond-move
+@item -m4al
+@opindex m4al
+Same as @option{-m4a-nofpu}, except that it implicitly passes
+@option{-dsp} to the assembler. GCC doesn't generate any DSP
+instructions at the moment.
-Disable the use of conditional-move instructions.
+@item -mb
+@opindex mb
+Compile code for the processor in big endian mode.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -ml
+@opindex ml
+Compile code for the processor in little endian mode.
-@item -mscc
-@opindex mscc
+@item -mdalign
+@opindex mdalign
+Align doubles at 64-bit boundaries. Note that this changes the calling
+conventions, and thus some functions from the standard C library will
+not work unless you recompile it first with @option{-mdalign}.
-Enable the use of conditional set instructions (default).
+@item -mrelax
+@opindex mrelax
+Shorten some address references at link time, when possible; uses the
+linker option @option{-relax}.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -mbigtable
+@opindex mbigtable
+Use 32-bit offsets in @code{switch} tables. The default is to use
+16-bit offsets.
-@item -mno-scc
-@opindex mno-scc
+@item -mfmovd
+@opindex mfmovd
+Enable the use of the instruction @code{fmovd}.
-Disable the use of conditional set instructions.
+@item -mhitachi
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -mrenesas
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
-@item -mcond-exec
-@opindex mcond-exec
+@item -mno-renesas
+@opindex mhitachi
+Comply with the calling conventions defined for GCC before the Renesas
+conventions were available. This option is the default for all
+targets of the SH toolchain except for @samp{sh-symbianelf}.
-Enable the use of conditional execution (default).
+@item -mnomacsave
+@opindex mnomacsave
+Mark the @code{MAC} register as call-clobbered, even if
+@option{-mhitachi} is given.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -mieee
+@opindex mieee
+Increase IEEE-compliance of floating-point code.
+At the moment, this is equivalent to @option{-fno-finite-math-only}.
+When generating 16 bit SH opcodes, getting IEEE-conforming results for
+comparisons of NANs / infinities incurs extra overhead in every
+floating point comparison, therefore the default is set to
+@option{-ffinite-math-only}.
-@item -mno-cond-exec
-@opindex mno-cond-exec
+@item -misize
+@opindex misize
+Dump instruction size and location in the assembly code.
-Disable the use of conditional execution.
+@item -mpadstruct
+@opindex mpadstruct
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the SH ABI@.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -mspace
+@opindex mspace
+Optimize for space instead of speed. Implied by @option{-Os}.
-@item -mvliw-branch
-@opindex mvliw-branch
+@item -mprefergot
+@opindex mprefergot
+When generating position-independent code, emit function calls using
+the Global Offset Table instead of the Procedure Linkage Table.
-Run a pass to pack branches into VLIW instructions (default).
+@item -musermode
+@opindex musermode
+Generate a library function call to invalidate instruction cache
+entries, after fixing up a trampoline. This library function call
+doesn't assume it can write to the whole memory address space. This
+is the default when the target is @code{sh-*-linux*}.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -multcost=@var{number}
+@opindex multcost=@var{number}
+Set the cost to assume for a multiply insn.
+
+@item -mdiv=@var{strategy}
+@opindex mdiv=@var{strategy}
+Set the division strategy to use for SHmedia code. @var{strategy} must be
+one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
+inv:call2, inv:fp .
+"fp" performs the operation in floating point. This has a very high latency,
+but needs only a few instructions, so it might be a good choice if
+your code has enough easily exploitable ILP to allow the compiler to
+schedule the floating point instructions together with other instructions.
+Division by zero causes a floating point exception.
+"inv" uses integer operations to calculate the inverse of the divisor,
+and then multiplies the dividend with the inverse. This strategy allows
+cse and hoisting of the inverse calculation. Division by zero calculates
+an unspecified result, but does not trap.
+"inv:minlat" is a variant of "inv" where if no cse / hoisting opportunities
+have been found, or if the entire operation has been hoisted to the same
+place, the last stages of the inverse calculation are intertwined with the
+final multiply to reduce the overall latency, at the expense of using a few
+more instructions, and thus offering fewer scheduling opportunities with
+other code.
+"call" calls a library function that usually implements the inv:minlat
+strategy.
+This gives high code density for m5-*media-nofpu compilations.
+"call2" uses a different entry point of the same library function, where it
+assumes that a pointer to a lookup table has already been set up, which
+exposes the pointer load to cse / code hoisting optimizations.
+"inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm for initial
+code generation, but if the code stays unoptimized, revert to the "call",
+"call2", or "fp" strategies, respectively. Note that the
+potentially-trapping side effect of division by zero is carried by a
+separate instruction, so it is possible that all the integer instructions
+are hoisted out, but the marker for the side effect stays where it is.
+A recombination to fp operations or a call is not possible in that case.
+"inv20u" and "inv20l" are variants of the "inv:minlat" strategy. In the case
+that the inverse calculation was nor separated from the multiply, they speed
+up division where the dividend fits into 20 bits (plus sign where applicable),
+by inserting a test to skip a number of operations in this case; this test
+slows down the case of larger dividends. inv20u assumes the case of a such
+a small dividend to be unlikely, and inv20l assumes it to be likely.
+
+@item -mdivsi3_libfunc=@var{name}
+@opindex mdivsi3_libfunc=@var{name}
+Set the name of the library function used for 32 bit signed division to
+@var{name}. This only affect the name used in the call and inv:call
+division strategies, and the compiler will still expect the same
+sets of input/output/clobbered registers as if this option was not present.
+
+@item -madjust-unroll
+@opindex madjust-unroll
+Throttle unrolling to avoid thrashing target registers.
+This option only has an effect if the gcc code base supports the
+TARGET_ADJUST_UNROLL_MAX target hook.
+
+@item -mindexed-addressing
+@opindex mindexed-addressing
+Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
+This is only safe if the hardware and/or OS implement 32 bit wrap-around
+semantics for the indexed addressing mode. The architecture allows the
+implementation of processors with 64 bit MMU, which the OS could use to
+get 32 bit addressing, but since no current hardware implementation supports
+this or any other way to make the indexed addressing mode safe to use in
+the 32 bit ABI, the default is -mno-indexed-addressing.
+
+@item -mgettrcost=@var{number}
+@opindex mgettrcost=@var{number}
+Set the cost assumed for the gettr instruction to @var{number}.
+The default is 2 if @option{-mpt-fixed} is in effect, 100 otherwise.
+
+@item -mpt-fixed
+@opindex mpt-fixed
+Assume pt* instructions won't trap. This will generally generate better
+scheduled code, but is unsafe on current hardware. The current architecture
+definition says that ptabs and ptrel trap when the target anded with 3 is 3.
+This has the unintentional effect of making it unsafe to schedule ptabs /
+ptrel before a branch, or hoist it out of a loop. For example,
+__do_global_ctors, a part of libgcc that runs constructors at program
+startup, calls functions in a list which is delimited by -1. With the
+-mpt-fixed option, the ptabs will be done before testing against -1.
+That means that all the constructors will be run a bit quicker, but when
+the loop comes to the end of the list, the program crashes because ptabs
+loads -1 into a target register. Since this option is unsafe for any
+hardware implementing the current architecture specification, the default
+is -mno-pt-fixed. Unless the user specifies a specific cost with
+@option{-mgettrcost}, -mno-pt-fixed also implies @option{-mgettrcost=100};
+this deters register allocation using target registers for storing
+ordinary integers.
+
+@item -minvalid-symbols
+@opindex minvalid-symbols
+Assume symbols might be invalid. Ordinary function symbols generated by
+the compiler will always be valid to load with movi/shori/ptabs or
+movi/shori/ptrel, but with assembler and/or linker tricks it is possible
+to generate symbols that will cause ptabs / ptrel to trap.
+This option is only meaningful when @option{-mno-pt-fixed} is in effect.
+It will then prevent cross-basic-block cse, hoisting and most scheduling
+of symbol loads. The default is @option{-mno-invalid-symbols}.
+@end table
-@item -mno-vliw-branch
-@opindex mno-vliw-branch
+@node SPARC Options
+@subsection SPARC Options
+@cindex SPARC options
-Do not run a pass to pack branches into VLIW instructions.
+These @samp{-m} options are supported on the SPARC:
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@table @gcctabopt
+@item -mno-app-regs
+@itemx -mapp-regs
+@opindex mno-app-regs
+@opindex mapp-regs
+Specify @option{-mapp-regs} to generate output using the global registers
+2 through 4, which the SPARC SVR4 ABI reserves for applications. This
+is the default.
-@item -mmulti-cond-exec
-@opindex mmulti-cond-exec
+To be fully SVR4 ABI compliant at the cost of some performance loss,
+specify @option{-mno-app-regs}. You should compile libraries and system
+software with this option.
-Enable optimization of @code{&&} and @code{||} in conditional execution
-(default).
+@item -mfpu
+@itemx -mhard-float
+@opindex mfpu
+@opindex mhard-float
+Generate output containing floating point instructions. This is the
+default.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -mno-fpu
+@itemx -msoft-float
+@opindex mno-fpu
+@opindex msoft-float
+Generate output containing library calls for floating point.
+@strong{Warning:} the requisite libraries are not available for all SPARC
+targets. Normally the facilities of the machine's usual C compiler are
+used, but this cannot be done directly in cross-compilation. You must make
+your own arrangements to provide suitable library functions for
+cross-compilation. The embedded targets @samp{sparc-*-aout} and
+@samp{sparclite-*-*} do provide software floating point support.
-@item -mno-multi-cond-exec
-@opindex mno-multi-cond-exec
+@option{-msoft-float} changes the calling convention in the output file;
+therefore, it is only useful if you compile @emph{all} of a program with
+this option. In particular, you need to compile @file{libgcc.a}, the
+library that comes with GCC, with @option{-msoft-float} in order for
+this to work.
-Disable optimization of @code{&&} and @code{||} in conditional execution.
+@item -mhard-quad-float
+@opindex mhard-quad-float
+Generate output containing quad-word (long double) floating point
+instructions.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@item -msoft-quad-float
+@opindex msoft-quad-float
+Generate output containing library calls for quad-word (long double)
+floating point instructions. The functions called are those specified
+in the SPARC ABI@. This is the default.
-@item -mnested-cond-exec
-@opindex mnested-cond-exec
+As of this writing, there are no SPARC implementations that have hardware
+support for the quad-word floating point instructions. They all invoke
+a trap handler for one of these instructions, and then the trap handler
+emulates the effect of the instruction. Because of the trap handler overhead,
+this is much slower than calling the ABI library routines. Thus the
+@option{-msoft-quad-float} option is the default.
-Enable nested conditional execution optimizations (default).
+@item -mno-unaligned-doubles
+@itemx -munaligned-doubles
+@opindex mno-unaligned-doubles
+@opindex munaligned-doubles
+Assume that doubles have 8 byte alignment. This is the default.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+With @option{-munaligned-doubles}, GCC assumes that doubles have 8 byte
+alignment only if they are contained in another type, or if they have an
+absolute address. Otherwise, it assumes they have 4 byte alignment.
+Specifying this option avoids some rare compatibility problems with code
+generated by other compilers. It is not the default because it results
+in a performance loss, especially for floating point code.
-@item -mno-nested-cond-exec
-@opindex mno-nested-cond-exec
+@item -mno-faster-structs
+@itemx -mfaster-structs
+@opindex mno-faster-structs
+@opindex mfaster-structs
+With @option{-mfaster-structs}, the compiler assumes that structures
+should have 8 byte alignment. This enables the use of pairs of
+@code{ldd} and @code{std} instructions for copies in structure
+assignment, in place of twice as many @code{ld} and @code{st} pairs.
+However, the use of this changed alignment directly violates the SPARC
+ABI@. Thus, it's intended only for use on targets where the developer
+acknowledges that their resulting code will not be directly in line with
+the rules of the ABI@.
-Disable nested conditional execution optimizations.
+@item -mimpure-text
+@opindex mimpure-text
+@option{-mimpure-text}, used in addition to @option{-shared}, tells
+the compiler to not pass @option{-z text} to the linker when linking a
+shared object. Using this option, you can link position-dependent
+code into a shared object.
-This switch is mainly for debugging the compiler and will likely be removed
-in a future version.
+@option{-mimpure-text} suppresses the ``relocations remain against
+allocatable but non-writable sections'' linker error message.
+However, the necessary relocations will trigger copy-on-write, and the
+shared object is not actually shared across processes. Instead of
+using @option{-mimpure-text}, you should compile all source code with
+@option{-fpic} or @option{-fPIC}.
-@item -mtomcat-stats
-@opindex mtomcat-stats
+This option is only available on SunOS and Solaris.
-Cause gas to print out tomcat statistics.
+@item -mcpu=@var{cpu_type}
+@opindex mcpu
+Set the instruction set, register set, and instruction scheduling parameters
+for machine type @var{cpu_type}. Supported values for @var{cpu_type} are
+@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite},
+@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x},
+@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc},
+@samp{ultrasparc3}, and @samp{niagara}.
-@item -mcpu=@var{cpu}
+Default instruction scheduling parameters are used for values that select
+an architecture and not an implementation. These are @samp{v7}, @samp{v8},
+@samp{sparclite}, @samp{sparclet}, @samp{v9}.
+
+Here is a list of each supported architecture and their supported
+implementations.
+
+@smallexample
+ v7: cypress
+ v8: supersparc, hypersparc
+ sparclite: f930, f934, sparclite86x
+ sparclet: tsc701
+ v9: ultrasparc, ultrasparc3, niagara
+@end smallexample
+
+By default (unless configured otherwise), GCC generates code for the V7
+variant of the SPARC architecture. With @option{-mcpu=cypress}, the compiler
+additionally optimizes it for the Cypress CY7C602 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, IPX etc.
+
+With @option{-mcpu=v8}, GCC generates code for the V8 variant of the SPARC
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in SPARC-V8
+but not in SPARC-V7. With @option{-mcpu=supersparc}, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+
+With @option{-mcpu=sparclite}, GCC generates code for the SPARClite variant of
+the SPARC architecture. This adds the integer multiply, integer divide step
+and scan (@code{ffs}) instructions which exist in SPARClite but not in SPARC-V7.
+With @option{-mcpu=f930}, the compiler additionally optimizes it for the
+Fujitsu MB86930 chip, which is the original SPARClite, with no FPU@. With
+@option{-mcpu=f934}, the compiler additionally optimizes it for the Fujitsu
+MB86934 chip, which is the more recent SPARClite with FPU@.
+
+With @option{-mcpu=sparclet}, GCC generates code for the SPARClet variant of
+the SPARC architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (@code{ffs}) instructions which exist in SPARClet
+but not in SPARC-V7. With @option{-mcpu=tsc701}, the compiler additionally
+optimizes it for the TEMIC SPARClet chip.
+
+With @option{-mcpu=v9}, GCC generates code for the V9 variant of the SPARC
+architecture. This adds 64-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With @option{-mcpu=ultrasparc}, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
+@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+@option{-mcpu=niagara}, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips.
+
+@item -mtune=@var{cpu_type}
+@opindex mtune
+Set the instruction scheduling parameters for machine type
+@var{cpu_type}, but do not set the instruction set or register set that the
+option @option{-mcpu=@var{cpu_type}} would.
+
+The same values for @option{-mcpu=@var{cpu_type}} can be used for
+@option{-mtune=@var{cpu_type}}, but the only useful values are those
+that select a particular cpu implementation. Those are @samp{cypress},
+@samp{supersparc}, @samp{hypersparc}, @samp{f930}, @samp{f934},
+@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc},
+@samp{ultrasparc3}, and @samp{niagara}.
+
+@item -mv8plus
+@itemx -mno-v8plus
+@opindex mv8plus
+@opindex mno-v8plus
+With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI@. The
+difference from the V8 ABI is that the global and out registers are
+considered 64-bit wide. This is enabled by default on Solaris in 32-bit
+mode for all SPARC-V9 processors.
+
+@item -mvis
+@itemx -mno-vis
+@opindex mvis
+@opindex mno-vis
+With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is @option{-mno-vis}.
+@end table
+
+These @samp{-m} options are supported in addition to the above
+on SPARC-V9 processors in 64-bit environments:
+
+@table @gcctabopt
+@item -mlittle-endian
+@opindex mlittle-endian
+Generate code for a processor running in little-endian mode. It is only
+available for a few configurations and most notably not on Solaris and Linux.
+
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for a 32-bit or 64-bit environment.
+The 32-bit environment sets int, long and pointer to 32 bits.
+The 64-bit environment sets int to 32 bits and long and pointer
+to 64 bits.
+
+@item -mcmodel=medlow
+@opindex mcmodel=medlow
+Generate code for the Medium/Low code model: 64-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
+
+@item -mcmodel=medmid
+@opindex mcmodel=medmid
+Generate code for the Medium/Middle code model: 64-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
+
+@item -mcmodel=medany
+@opindex mcmodel=medany
+Generate code for the Medium/Anywhere code model: 64-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
+
+@item -mcmodel=embmedany
+@opindex mcmodel=embmedany
+Generate code for the Medium/Anywhere code model for embedded systems:
+64-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register %g4 points to the base of the data segment. Programs
+are statically linked and PIC is not supported.
+
+@item -mstack-bias
+@itemx -mno-stack-bias
+@opindex mstack-bias
+@opindex mno-stack-bias
+With @option{-mstack-bias}, GCC assumes that the stack pointer, and
+frame pointer if present, are offset by @minus{}2047 which must be added back
+when making stack frame references. This is the default in 64-bit mode.
+Otherwise, assume no such offset is present.
+@end table
+
+These switches are supported in addition to the above on Solaris:
+
+@table @gcctabopt
+@item -threads
+@opindex threads
+Add support for multithreading using the Solaris threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+
+@item -pthreads
+@opindex pthreads
+Add support for multithreading using the POSIX threads library. This
+option sets flags for both the preprocessor and linker. This option does
+not affect the thread safety of object code produced by the compiler or
+that of libraries supplied with it.
+
+@item -pthread
+@opindex pthread
+This is a synonym for @option{-pthreads}.
+@end table
+
+@node System V Options
+@subsection Options for System V
+
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+
+@table @gcctabopt
+@item -G
+@opindex G
+Create a shared object.
+It is recommended that @option{-symbolic} or @option{-shared} be used instead.
+
+@item -Qy
+@opindex Qy
+Identify the versions of each tool used by the compiler, in a
+@code{.ident} assembler directive in the output.
+
+@item -Qn
+@opindex Qn
+Refrain from adding @code{.ident} directives to the output file (this is
+the default).
+
+@item -YP,@var{dirs}
+@opindex YP
+Search the directories @var{dirs}, and no others, for libraries
+specified with @option{-l}.
+
+@item -Ym,@var{dir}
+@opindex Ym
+Look in the directory @var{dir} to find the M4 preprocessor.
+The assembler uses this option.
+@c This is supposed to go with a -Yd for predefined M4 macro files, but
+@c the generic assembler that comes with Solaris takes just -Ym.
+@end table
+
+@node TMS320C3x/C4x Options
+@subsection TMS320C3x/C4x Options
+@cindex TMS320C3x/C4x Options
+
+These @samp{-m} options are defined for TMS320C3x/C4x implementations:
+
+@table @gcctabopt
+
+@item -mcpu=@var{cpu_type}
@opindex mcpu
+Set the instruction set, register set, and instruction scheduling
+parameters for machine type @var{cpu_type}. Supported values for
+@var{cpu_type} are @samp{c30}, @samp{c31}, @samp{c32}, @samp{c40}, and
+@samp{c44}. The default is @samp{c40} to generate code for the
+TMS320C40.
-Select the processor type for which to generate code. Possible values are
-@samp{simple}, @samp{tomcat}, @samp{fr500}, @samp{fr400}, @samp{fr300},
-@samp{frv}.
+@item -mbig-memory
+@itemx -mbig
+@itemx -msmall-memory
+@itemx -msmall
+@opindex mbig-memory
+@opindex mbig
+@opindex msmall-memory
+@opindex msmall
+Generates code for the big or small memory model. The small memory
+model assumed that all data fits into one 64K word page. At run-time
+the data page (DP) register must be set to point to the 64K page
+containing the .bss and .data program sections. The big memory model is
+the default and requires reloading of the DP register for every direct
+memory access.
+
+@item -mbk
+@itemx -mno-bk
+@opindex mbk
+@opindex mno-bk
+Allow (disallow) allocation of general integer operands into the block
+count register BK@.
+
+@item -mdb
+@itemx -mno-db
+@opindex mdb
+@opindex mno-db
+Enable (disable) generation of code using decrement and branch,
+DBcond(D), instructions. This is enabled by default for the C4x. To be
+on the safe side, this is disabled for the C3x, since the maximum
+iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
+@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
+that it can utilize the decrement and branch instruction, but will give
+up if there is more than one memory reference in the loop. Thus a loop
+where the loop counter is decremented can generate slightly more
+efficient code, in cases where the RPTB instruction cannot be utilized.
+
+@item -mdp-isr-reload
+@itemx -mparanoid
+@opindex mdp-isr-reload
+@opindex mparanoid
+Force the DP register to be saved on entry to an interrupt service
+routine (ISR), reloaded to point to the data section, and restored on
+exit from the ISR@. This should not be required unless someone has
+violated the small memory model by modifying the DP register, say within
+an object library.
+
+@item -mmpyi
+@itemx -mno-mpyi
+@opindex mmpyi
+@opindex mno-mpyi
+For the C3x use the 24-bit MPYI instruction for integer multiplies
+instead of a library call to guarantee 32-bit results. Note that if one
+of the operands is a constant, then the multiplication will be performed
+using shifts and adds. If the @option{-mmpyi} option is not specified for the C3x,
+then squaring operations are performed inline instead of a library call.
+
+@item -mfast-fix
+@itemx -mno-fast-fix
+@opindex mfast-fix
+@opindex mno-fast-fix
+The C3x/C4x FIX instruction to convert a floating point value to an
+integer value chooses the nearest integer less than or equal to the
+floating point value rather than to the nearest integer. Thus if the
+floating point number is negative, the result will be incorrectly
+truncated an additional code is necessary to detect and correct this
+case. This option can be used to disable generation of the additional
+code required to correct the result.
+
+@item -mrptb
+@itemx -mno-rptb
+@opindex mrptb
+@opindex mno-rptb
+Enable (disable) generation of repeat block sequences using the RPTB
+instruction for zero overhead looping. The RPTB construct is only used
+for innermost loops that do not call functions or jump across the loop
+boundaries. There is no advantage having nested RPTB loops due to the
+overhead required to save and restore the RC, RS, and RE registers.
+This is enabled by default with @option{-O2}.
+
+@item -mrpts=@var{count}
+@itemx -mno-rpts
+@opindex mrpts
+@opindex mno-rpts
+Enable (disable) the use of the single instruction repeat instruction
+RPTS@. If a repeat block contains a single instruction, and the loop
+count can be guaranteed to be less than the value @var{count}, GCC will
+emit a RPTS instruction instead of a RPTB@. If no value is specified,
+then a RPTS will be emitted even if the loop count cannot be determined
+at compile time. Note that the repeated instruction following RPTS does
+not have to be reloaded from memory each iteration, thus freeing up the
+CPU buses for operands. However, since interrupts are blocked by this
+instruction, it is disabled by default.
+
+@item -mloop-unsigned
+@itemx -mno-loop-unsigned
+@opindex mloop-unsigned
+@opindex mno-loop-unsigned
+The maximum iteration count when using RPTS and RPTB (and DB on the C40)
+is @math{2^{31} + 1} since these instructions test if the iteration count is
+negative to terminate the loop. If the iteration count is unsigned
+there is a possibility than the @math{2^{31} + 1} maximum iteration count may be
+exceeded. This switch allows an unsigned iteration count.
+
+@item -mti
+@opindex mti
+Try to emit an assembler syntax that the TI assembler (asm30) is happy
+with. This also enforces compatibility with the API employed by the TI
+C3x C compiler. For example, long doubles are passed as structures
+rather than in floating point registers.
+
+@item -mregparm
+@itemx -mmemparm
+@opindex mregparm
+@opindex mmemparm
+Generate code that uses registers (stack) for passing arguments to functions.
+By default, arguments are passed in registers where possible rather
+than by pushing arguments on to the stack.
+
+@item -mparallel-insns
+@itemx -mno-parallel-insns
+@opindex mparallel-insns
+@opindex mno-parallel-insns
+Allow the generation of parallel instructions. This is enabled by
+default with @option{-O2}.
+
+@item -mparallel-mpy
+@itemx -mno-parallel-mpy
+@opindex mparallel-mpy
+@opindex mno-parallel-mpy
+Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
+provided @option{-mparallel-insns} is also specified. These instructions have
+tight register constraints which can pessimize the code generation
+of large functions.
@end table
+@node V850 Options
+@subsection V850 Options
+@cindex V850 Options
+
+These @samp{-m} options are defined for V850 implementations:
+
+@table @gcctabopt
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Treat all calls as being far away (near). If calls are assumed to be
+far away, the compiler will always load the functions address up into a
+register, and call indirect through the pointer.
+
+@item -mno-ep
+@itemx -mep
+@opindex mno-ep
+@opindex mep
+Do not optimize (do optimize) basic blocks that use the same index
+pointer 4 or more times to copy pointer into the @code{ep} register, and
+use the shorter @code{sld} and @code{sst} instructions. The @option{-mep}
+option is on by default if you optimize.
+
+@item -mno-prolog-function
+@itemx -mprolog-function
+@opindex mno-prolog-function
+@opindex mprolog-function
+Do not use (do use) external functions to save and restore registers
+at the prologue and epilogue of a function. The external functions
+are slower, but use less code space if more than one function saves
+the same number of registers. The @option{-mprolog-function} option
+is on by default if you optimize.
+
+@item -mspace
+@opindex mspace
+Try to make the code as small as possible. At present, this just turns
+on the @option{-mep} and @option{-mprolog-function} options.
+
+@item -mtda=@var{n}
+@opindex mtda
+Put static or global variables whose size is @var{n} bytes or less into
+the tiny data area that register @code{ep} points to. The tiny data
+area can hold up to 256 bytes in total (128 bytes for byte references).
+
+@item -msda=@var{n}
+@opindex msda
+Put static or global variables whose size is @var{n} bytes or less into
+the small data area that register @code{gp} points to. The small data
+area can hold up to 64 kilobytes.
+
+@item -mzda=@var{n}
+@opindex mzda
+Put static or global variables whose size is @var{n} bytes or less into
+the first 32 kilobytes of memory.
+
+@item -mv850
+@opindex mv850
+Specify that the target processor is the V850.
+
+@item -mbig-switch
+@opindex mbig-switch
+Generate code suitable for big switch tables. Use this option only if
+the assembler/linker complain about out of range branches within a switch
+table.
+
+@item -mapp-regs
+@opindex mapp-regs
+This option will cause r2 and r5 to be used in the code generated by
+the compiler. This setting is the default.
+
+@item -mno-app-regs
+@opindex mno-app-regs
+This option will cause r2 and r5 to be treated as fixed registers.
+
+@item -mv850e1
+@opindex mv850e1
+Specify that the target processor is the V850E1. The preprocessor
+constants @samp{__v850e1__} and @samp{__v850e__} will be defined if
+this option is used.
+
+@item -mv850e
+@opindex mv850e
+Specify that the target processor is the V850E@. The preprocessor
+constant @samp{__v850e__} will be defined if this option is used.
+
+If neither @option{-mv850} nor @option{-mv850e} nor @option{-mv850e1}
+are defined then a default target processor will be chosen and the
+relevant @samp{__v850*__} preprocessor constant will be defined.
+
+The preprocessor constants @samp{__v850} and @samp{__v851__} are always
+defined, regardless of which processor variant is the target.
+
+@item -mdisable-callt
+@opindex mdisable-callt
+This option will suppress generation of the CALLT instruction for the
+v850e and v850e1 flavors of the v850 architecture. The default is
+@option{-mno-disable-callt} which allows the CALLT instruction to be used.
+
+@end table
+
+@node VAX Options
+@subsection VAX Options
+@cindex VAX options
+
+These @samp{-m} options are defined for the VAX:
+
+@table @gcctabopt
+@item -munix
+@opindex munix
+Do not output certain jump instructions (@code{aobleq} and so on)
+that the Unix assembler for the VAX cannot handle across long
+ranges.
+
+@item -mgnu
+@opindex mgnu
+Do output those jump instructions, on the assumption that you
+will assemble with the GNU assembler.
+
+@item -mg
+@opindex mg
+Output code for g-format floating point numbers instead of d-format.
+@end table
+
+@node x86-64 Options
+@subsection x86-64 Options
+@cindex x86-64 options
+
+These are listed under @xref{i386 and x86-64 Options}.
+
+@node Xstormy16 Options
+@subsection Xstormy16 Options
+@cindex Xstormy16 Options
+
+These options are defined for Xstormy16:
+
+@table @gcctabopt
+@item -msim
+@opindex msim
+Choose startup files and linker script suitable for the simulator.
+@end table
+
@node Xtensa Options
@subsection Xtensa Options
@cindex Xtensa Options
@@ -10905,6 +13253,12 @@ instructions. Note that the assembler will use an indirect call for
every cross-file call, not just those that really will be out of range.
@end table
+@node zSeries Options
+@subsection zSeries Options
+@cindex zSeries options
+
+These are listed under @xref{S/390 and zSeries Options}.
+
@node Code Gen Options
@section Options for Code Generation Conventions
@cindex code generation conventions
@@ -10925,7 +13279,7 @@ it.
@opindex fbounds-check
For front-ends that support it, generate additional code to check that
indices used to access arrays are within the declared range. This is
-currently only supported by the Java and Fortran 77 front-ends, where
+currently only supported by the Java and Fortran front-ends, where
this option defaults to true and false respectively.
@item -ftrapv
@@ -10938,7 +13292,7 @@ multiplication operations.
This option instructs the compiler to assume that signed arithmetic
overflow of addition, subtraction and multiplication wraps around
using twos-complement representation. This flag enables some optimizations
-and disables other. This option is enabled by default for the Java
+and disables others. This option is enabled by default for the Java
front-end, as required by the Java language specification.
@item -fexceptions
@@ -10972,7 +13326,7 @@ You will normally not enable this option; instead, a language processor
that needs this handling would enable it on your behalf.
@item -fasynchronous-unwind-tables
-@opindex funwind-tables
+@opindex fasynchronous-unwind-tables
Generate unwind table in dwarf2 format, if supported by target machine. The
table is exact at each instruction boundary, so it can be used for stack
unwinding from asynchronous events (such as debugger or garbage collector).
@@ -11042,14 +13396,6 @@ useful for building programs to run under WINE@.
code that is not binary compatible with code generated without that switch.
Use it to conform to a non-default application binary interface.
-@item -fshared-data
-@opindex fshared-data
-Requests that the data and non-@code{const} variables of this
-compilation be shared data rather than private data. The distinction
-makes sense only on certain operating systems, where shared data is
-shared between processes running the same program, while private data
-exists in one copy per process.
-
@item -fno-common
@opindex fno-common
In C, allocate even uninitialized global variables in the data section of the
@@ -11102,16 +13448,22 @@ only on certain machines. For the 386, GCC supports PIC for System V
but not for the Sun 386i. Code generated for the IBM RS/6000 is always
position-independent.
+When this flag is set, the macros @code{__pic__} and @code{__PIC__}
+are defined to 1.
+
@item -fPIC
@opindex fPIC
If supported for the target machine, emit position-independent code,
suitable for dynamic linking and avoiding any limit on the size of the
-global offset table. This option makes a difference on the m68k
-and the SPARC.
+global offset table. This option makes a difference on the m68k,
+PowerPC and SPARC@.
Position-independent code requires special support, and therefore works
only on certain machines.
+When this flag is set, the macros @code{__pic__} and @code{__PIC__}
+are defined to 2.
+
@item -fpie
@itemx -fPIE
@opindex fpie
@@ -11121,6 +13473,15 @@ generated position independent code can be only linked into executables.
Usually these options are used when @option{-pie} GCC option will be
used during linking.
+@item -fno-jump-tables
+@opindex fno-jump-tables
+Do not use jump tables for switch statements even where it would be
+more efficient than other code generation strategies. This option is
+of use in conjunction with @option{-fpic} or @option{-fPIC} for
+building code which forms part of a dynamic linker and cannot
+reference the address of a jump table. On some targets, jump tables
+do not require a GOT and this option is not needed.
+
@item -ffixed-@var{reg}
@opindex ffixed
Treat the register named @var{reg} as a fixed register; generated code
@@ -11165,9 +13526,13 @@ a register in which function values may be returned.
This flag does not have a negative form, because it specifies a
three-way choice.
-@item -fpack-struct
+@item -fpack-struct[=@var{n}]
@opindex fpack-struct
-Pack all structure members together without holes.
+Without a value specified, pack all structure members together without
+holes. When a value is specified (which must be a small power of two), pack
+structure members according to this value, representing the maximum
+alignment (that is, objects with default alignment requirements larger than
+this will be output potentially unaligned at the next fitting location.
@strong{Warning:} the @option{-fpack-struct} switch causes GCC to generate
code that is not binary compatible with code generated without that switch.
@@ -11194,8 +13559,16 @@ void __cyg_profile_func_exit (void *this_fn,
The first argument is the address of the start of the current function,
which may be looked up exactly in the symbol table.
-This currently disables function inlining. This restriction is
-expected to be removed in future releases.
+This instrumentation is also done for functions expanded inline in other
+functions. The profiling calls will indicate where, conceptually, the
+inline function is entered and exited. This means that addressable
+versions of such functions must be available. If all your uses of a
+function are expanded inline, this may mean an additional expansion of
+code size. If you use @samp{extern inline} in your C code, an
+addressable version of such functions must be provided. (This is
+normally the case anyways, but if you get lucky and the optimizer always
+expands the functions inline, you might have gotten away without
+providing static copies.)
A function may be given the attribute @code{no_instrument_function}, in
which case this instrumentation will not be done. This can be used, for
@@ -11239,9 +13612,11 @@ of 128KB@. Note that this may only work with the GNU linker.
@item -fargument-alias
@itemx -fargument-noalias
@itemx -fargument-noalias-global
+@itemx -fargument-noalias-anything
@opindex fargument-alias
@opindex fargument-noalias
@opindex fargument-noalias-global
+@opindex fargument-noalias-anything
Specify the possible relationships among parameters and between
parameters and global data.
@@ -11251,6 +13626,8 @@ alias each other and may alias global storage.@*
each other, but may alias global storage.@*
@option{-fargument-noalias-global} specifies that arguments do not
alias each other and do not alias global storage.
+@option{-fargument-noalias-anything} specifies that arguments do not
+alias any other storage.
Each language will automatically use whatever option is required by
the language standard. You should not need to use these options yourself.
@@ -11273,6 +13650,75 @@ The @var{model} argument should be one of @code{global-dynamic},
The default without @option{-fpic} is @code{initial-exec}; with
@option{-fpic} the default is @code{global-dynamic}.
+
+@item -fvisibility=@var{default|internal|hidden|protected}
+@opindex fvisibility
+Set the default ELF image symbol visibility to the specified option---all
+symbols will be marked with this unless overridden within the code.
+Using this feature can very substantially improve linking and
+load times of shared object libraries, produce more optimized
+code, provide near-perfect API export and prevent symbol clashes.
+It is @strong{strongly} recommended that you use this in any shared objects
+you distribute.
+
+Despite the nomenclature, @code{default} always means public ie;
+available to be linked against from outside the shared object.
+@code{protected} and @code{internal} are pretty useless in real-world
+usage so the only other commonly used option will be @code{hidden}.
+The default if @option{-fvisibility} isn't specified is
+@code{default}, i.e., make every
+symbol public---this causes the same behavior as previous versions of
+GCC@.
+
+A good explanation of the benefits offered by ensuring ELF
+symbols have the correct visibility is given by ``How To Write
+Shared Libraries'' by Ulrich Drepper (which can be found at
+@w{@uref{http://people.redhat.com/~drepper/}})---however a superior
+solution made possible by this option to marking things hidden when
+the default is public is to make the default hidden and mark things
+public. This is the norm with DLL's on Windows and with @option{-fvisibility=hidden}
+and @code{__attribute__ ((visibility("default")))} instead of
+@code{__declspec(dllexport)} you get almost identical semantics with
+identical syntax. This is a great boon to those working with
+cross-platform projects.
+
+For those adding visibility support to existing code, you may find
+@samp{#pragma GCC visibility} of use. This works by you enclosing
+the declarations you wish to set visibility for with (for example)
+@samp{#pragma GCC visibility push(hidden)} and
+@samp{#pragma GCC visibility pop}.
+Bear in mind that symbol visibility should be viewed @strong{as
+part of the API interface contract} and thus all new code should
+always specify visibility when it is not the default ie; declarations
+only for use within the local DSO should @strong{always} be marked explicitly
+as hidden as so to avoid PLT indirection overheads---making this
+abundantly clear also aids readability and self-documentation of the code.
+Note that due to ISO C++ specification requirements, operator new and
+operator delete must always be of default visibility.
+
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say @samp{#pragma GCC visibility push(default)}
+before including any such headers.
+
+@samp{extern} declarations are not affected by @samp{-fvisibility}, so
+a lot of code can be recompiled with @samp{-fvisibility=hidden} with
+no modifications. However, this means that calls to @samp{extern}
+functions with no explicit visibility will use the PLT, so it is more
+effective to use @samp{__attribute ((visibility))} and/or
+@samp{#pragma GCC visibility} to tell the compiler which @samp{extern}
+declarations should be treated as hidden.
+
+Note that @samp{-fvisibility} does affect C++ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the @samp{type_info} nodes will be unified between
+the DSOs.
+
+An overview of these techniques, their benefits and how to use them
+is at @w{@uref{http://gcc.gnu.org/wiki/Visibility}}.
+
@end table
@c man end
@@ -11435,13 +13881,6 @@ build the project. To make builds faster, GCC allows users to
`precompile' a header file; then, if builds can use the precompiled
header file they will be much faster.
-@strong{Caution:} There are a few known situations where GCC will
-crash when trying to use a precompiled header. If you have trouble
-with a precompiled header, you should remove the precompiled header
-and compile without it. In addition, please use GCC's on-line
-defect-tracking system to report any problems you encounter with
-precompiled headers. @xref{Bugs}.
-
To create a precompiled header file, simply compile it as you would any
other file, if necessary using the @option{-x} option to make the driver
treat it as a C or C++ header file. You will probably want to use a
@@ -11479,11 +13918,11 @@ they've already been included (in the precompiled header).
If you need to precompile the same header file for different
languages, targets, or compiler options, you can instead make a
@emph{directory} named like @file{all.h.gch}, and put each precompiled
-header in the directory. (It doesn't matter what you call the files
-in the directory, every precompiled header in the directory will be
-considered.) The first precompiled header encountered in the
-directory that is valid for this compilation will be used; they're
-searched in no particular order.
+header in the directory, perhaps using @option{-o}. It doesn't matter
+what you call the files in the directory, every precompiled header in
+the directory will be considered. The first precompiled header
+encountered in the directory that is valid for this compilation will
+be used; they're searched in no particular order.
There are many other possibilities, limited only by your imagination,
good sense, and the constraints of your build system.
@@ -11493,40 +13932,75 @@ A precompiled header file can be used only when these conditions apply:
@itemize
@item
Only one precompiled header can be used in a particular compilation.
+
@item
A precompiled header can't be used once the first C token is seen. You
can have preprocessor directives before a precompiled header; you can
even include a precompiled header from inside another header, so long as
there are no C tokens before the @code{#include}.
+
@item
The precompiled header file must be produced for the same language as
the current compilation. You can't use a C precompiled header for a C++
compilation.
+
@item
-The precompiled header file must be produced by the same compiler
-version and configuration as the current compilation is using.
-The easiest way to guarantee this is to use the same compiler binary
-for creating and using precompiled headers.
+The precompiled header file must have been produced by the same compiler
+binary as the current compilation is using.
+
@item
-Any macros defined before the precompiled header (including with
-@option{-D}) must either be defined in the same way as when the
-precompiled header was generated, or must not affect the precompiled
-header, which usually means that the they don't appear in the
-precompiled header at all.
+Any macros defined before the precompiled header is included must
+either be defined in the same way as when the precompiled header was
+generated, or must not affect the precompiled header, which usually
+means that they don't appear in the precompiled header at all.
+
+The @option{-D} option is one way to define a macro before a
+precompiled header is included; using a @code{#define} can also do it.
+There are also some options that define macros implicitly, like
+@option{-O} and @option{-Wdeprecated}; the same rule applies to macros
+defined this way.
+
+@item If debugging information is output when using the precompiled
+header, using @option{-g} or similar, the same kind of debugging information
+must have been output when building the precompiled header. However,
+a precompiled header built using @option{-g} can be used in a compilation
+when no debugging information is being output.
+
+@item The same @option{-m} options must generally be used when building
+and using the precompiled header. @xref{Submodel Options},
+for any cases where this rule is relaxed.
+
+@item Each of the following options must be the same when building and using
+the precompiled header:
+
+@gccoptlist{-fexceptions -funit-at-a-time}
+
@item
-Certain command-line options must be defined in the same way as when the
-precompiled header was generated. At present, it's not clear which
-options are safe to change and which are not; the safest choice is to
-use exactly the same options when generating and using the precompiled
-header.
+Some other command-line options starting with @option{-f},
+@option{-p}, or @option{-O} must be defined in the same way as when
+the precompiled header was generated. At present, it's not clear
+which options are safe to change and which are not; the safest choice
+is to use exactly the same options when generating and using the
+precompiled header. The following are known to be safe:
+
+@gccoptlist{-fmessage-length= -fpreprocessed
+-fsched-interblock -fsched-spec -fsched-spec-load -fsched-spec-load-dangerous
+-fsched-verbose=<number> -fschedule-insns -fvisibility=
+-pedantic-errors}
+
@end itemize
-For all of these but the last, the compiler will automatically ignore
-the precompiled header if the conditions aren't met. For the last item,
-some option changes will cause the precompiled header to be rejected,
-but not all incompatible option combinations have yet been found. If
-you find a new incompatible combination, please consider filing a bug
-report, see @ref{Bugs}.
+For all of these except the last, the compiler will automatically
+ignore the precompiled header if the conditions aren't met. If you
+find an option combination that doesn't work and doesn't cause the
+precompiled header to be ignored, please consider filing a bug report,
+see @ref{Bugs}.
+
+If you do use differing options when generating and using the
+precompiled header, the actual behavior will be a mixture of the
+behavior for the options. For instance, if you use @option{-g} to
+generate the precompiled header but not when using it, you may or may
+not get debugging information for routines in the precompiled header.
@node Running Protoize
@section Running Protoize
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-02 11:52:42 +0000