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-rw-r--r--docs/ReleaseNotes.rst28
1 files changed, 26 insertions, 2 deletions
diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst
index ddb31acfd0299..800a8ec115b38 100644
--- a/docs/ReleaseNotes.rst
+++ b/docs/ReleaseNotes.rst
@@ -71,6 +71,12 @@ Non-comprehensive list of changes in this release
Changes to the LLVM IR
----------------------
+* The datalayout string may now indicate an address space to use for
+ the pointer type of alloca rather than the default of 0.
+
+* Added speculatable attribute indicating a function which does has no
+ side-effects which could inhibit hoisting of calls.
+
Changes to the ARM Backend
--------------------------
@@ -91,12 +97,30 @@ Changes to the PowerPC Target
Changes to the X86 Target
-------------------------
- During this release ...
+* Added initial AMD Ryzen (znver1) scheduler support.
+
+* Added support for Intel Goldmont CPUs.
+
+* Add support for avx512vpopcntdq instructions.
+
+* Added heuristics to convert CMOV into branches when it may be profitable.
+
+* More aggressive inlining of memcmp calls.
+
+* Improve vXi64 shuffles on 32-bit targets.
+
+* Improved use of PMOVMSKB for any_of/all_of comparision reductions.
+
+* Improved Silvermont, Sandybridge, and Jaguar (btver2) schedulers.
+
+* Improved support for AVX512 vector rotations.
+
+* Added support for AMD Lightweight Profiling (LWP) instructions.
Changes to the AMDGPU Target
-----------------------------
- During this release ...
+* Initial gfx9 support
Changes to the AVR Target
-----------------------------